Fiexd Clockport-bug for >68040

# Conflicts:
#	Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd
#	Logic/LAN_IDE_V2/LAN_IDE_CP-z2v2.jed
#	Logic/LAN_IDE_V2/LAN_IDE_CP-z3v2.jed

.gitignore

@@ -121,3 +121,51 @@ Logic/LAN_IDE_V2/LAN_IDE_CP_html/tim/
 
 Logic/LAN_IDE/LAN_IDE\.zip
 /PCB/ZORRO-LAN-IDE-CP-V2F.s##
+/Logic/LAN_IDE_V2/iseconfig/LAN_IDE_CP.xreport
+/Logic/LAN_IDE_V2/iseconfig/LAN_IDEz2v2.projectmgr
+/Logic/LAN_IDE_V2/iseconfig/LAN_IDEz3v2.projectmgr
+/Logic/LAN_IDE_V2/LAN_IDE_CP.cmd_log
+/Logic/LAN_IDE_V2/LAN_IDE_CP.gyd
+/Logic/LAN_IDE_V2/LAN_IDE_CP.jed
+/Logic/LAN_IDE_V2/LAN_IDE_CP.mfd
+/Logic/LAN_IDE_V2/LAN_IDE_CP.nga
+/Logic/LAN_IDE_V2/LAN_IDE_CP.ngd
+/Logic/LAN_IDE_V2/LAN_IDE_CP.pad
+/Logic/LAN_IDE_V2/LAN_IDE_CP.rpt
+/Logic/LAN_IDE_V2/LAN_IDE_CP.syr
+/Logic/LAN_IDE_V2/LAN_IDE_CP.tspec
+/Logic/LAN_IDE/area.xds
+/Logic/LAN_IDE_V2/iseconfig/LAN_IDE_CP.xreport
+/Logic/LAN_IDE_V2/iseconfig/LAN_IDEz2v2.projectmgr
+/Logic/LAN_IDE_V2/iseconfig/LAN_IDEz3v2.projectmgr
+/Logic/LAN_IDE_V2/LAN_IDE_CP.cmd_log
+/Logic/LAN_IDE_V2/LAN_IDE_CP.gyd
+/Logic/LAN_IDE_V2/LAN_IDE_CP.jed
+/Logic/LAN_IDE/area.xds
+/Logic/LAN_IDE_V2/iseconfig/LAN_IDE_CP.xreport
+/Logic/LAN_IDE_V2/iseconfig/LAN_IDEz2v2.projectmgr
+/Logic/LAN_IDE_V2/iseconfig/LAN_IDEz3v2.projectmgr
+/Logic/LAN_IDE_V2/LAN_IDE_CP.cmd_log
+/Logic/LAN_IDE_V2/LAN_IDE_CP.gyd
+/Logic/LAN_IDE_V2/LAN_IDE_CP.jed
+/Bilder/Patch Rapidroad.png
+/Driver/rapidroadcpusb.device
+/Driver/rapidroadcpusb-.device
+/Driver/rapidroadcpusb-orig.device
+/Driver/rapidroadxs100usb.device
+/Driver/rapidroadxs100usb-orig.device
+/Logic/LAN_IDE/area.xds
+/Logic/LAN_IDE_V2/iseconfig/LAN_IDE_CP.xreport
+/Logic/LAN_IDE_V2/iseconfig/LAN_IDEz2v2.projectmgr
+/Logic/LAN_IDE_V2/iseconfig/LAN_IDEz3v2.projectmgr
+/Logic/LAN_IDE_V2/LAN_IDE_CP.cmd_log
+/Logic/LAN_IDE_V2/LAN_IDE_CP.gyd
+/Logic/LAN_IDE_V2/LAN_IDE_CP.mfd
+/Logic/LAN_IDE_V2/LAN_IDE_CP.nga
+/Logic/LAN_IDE_V2/LAN_IDE_CP.ngd
+/Logic/LAN_IDE_V2/LAN_IDE_CP.pad
+/Logic/LAN_IDE_V2/LAN_IDE_CP.rpt
+/Logic/LAN_IDE_V2/LAN_IDE_CP.syr
+/Logic/LAN_IDE_V2/LAN_IDE_CP.tspec
+/Logic/LAN_IDE_V2/LAN_IDE_CP.vm6
+/Logic/LAN_IDE_V2/ZORO_LAN_IDE_Z2.ipf

Logic/LAN_IDE/area.xds

@@ -1,16 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" standalone="no" ?>
-<DesignStrategy goal="Balanced" strategy="area" version="12.1">
-
-  <Description>The Default strategy provides a balanced optimization of performance results vs. runtime. The default property values correspond to the default values of each of the underlying implementation tools. This strategy keeps all properties in an unlocked state so that you can modify the values as you wish.</Description>
-
-  <DeviceList devices="xc9500xl"/>
-
-  <Properties>
-    <property name="Synthesize - XST:Optimization Goal" value="Speed"/>
-    <property name="Synthesize - XST:Optimization Effort" value="High"/>
-    <property name="Synthesize - XST:FSM Encoding Algorithm" value="Gray"/>
-    <property name="Synthesize - XST:Safe Implementation" value="No"/>
-    <property name="Synthesize - XST:Case Implementation Style" value="None"/>
-  </Properties>
-
-</DesignStrategy>

Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd

@@ -109,6 +109,8 @@ architecture Behavioral of LAN_IDE_CP is
 	signal CP_BASEADR:STD_LOGIC_VECTOR(7 downto 0);
 	signal IDE_ENABLE:STD_LOGIC;
 	signal ROM_OE_S:STD_LOGIC;
+	signal ROM_OE_D0:STD_LOGIC;
+	signal IDE_TERM:STD_LOGIC;
 	signal IDE_R_S:STD_LOGIC;
 	signal IDE_W_S:STD_LOGIC;
 	signal DTACK_S:STD_LOGIC;
@@ -117,7 +119,7 @@ architecture Behavioral of LAN_IDE_CP is
 	signal DECODE_RESET: std_logic;
 	signal LAN_INT_D0: std_logic;
 	signal DS: std_logic;
-   signal DS_D: std_logic;
+    signal DS_D: std_logic;
 	signal LAN_RD_S: std_logic;
 	signal LAN_WRH_S: std_logic;
 	signal LAN_WRL_S: std_logic;
@@ -151,8 +153,12 @@ begin
 	clock_init: process(CLK_EXT)
 	begin
 		if(rising_edge(CLK_EXT))then
-			if(reset = '0')then
+			if(reset = '0' )then
-				--init the clock!
+				LAN_RST_SM <= nop;
+				LAN_CS_RST<='0';
+				LAN_WR_RST<='0';
+			else
+				--init the clock afer reset finished!
 				case LAN_RST_SM is
 					when nop=>
 						LAN_CS_RST<='0';
@@ -182,29 +188,25 @@ begin
 						LAN_CS_RST<='1';
 						LAN_WR_RST<='0';						
 						LAN_RST_SM<=done;
-					when 	done=>
+					when 	done=> --stay here
 						LAN_CS_RST<='0';
 						LAN_WR_RST<='0';						
 						LAN_RST_SM<=done;
 				end case;
-			else
-				LAN_CS_RST<='0';
-				LAN_WR_RST<='0';						
-				LAN_RST_SM<=nop;
 			end if;
 		end if;
 	end process clock_init;
 	
-	ADDRESS_DECODE: process(DECODE_RESET,AS)
+	ADDRESS_DECODE: process(reset,AMIGA_CLK)
 	begin
-		if(DECODE_RESET ='0')then
+		if(reset ='0')then
 			autoconfig 	<= '0';
 			ide 			<= '0';
 			lan_adr 		<= '0';
 			lan_adr_sw  <= '0';
 			cp  			<= '0';
 			lancp                   <= '0';
-		elsif(falling_edge(AS))then		
+		elsif(rising_edge(AMIGA_CLK))then		
 			--default values
 			autoconfig 	<= '0';
 			ide 			<= '0';
@@ -214,16 +216,19 @@ begin
 			lancp                   <= '0';
 			if(A(23 downto 16) = x"E8" and AUTO_CONFIG_DONE < "11" and CFIN='0')then
 				autoconfig 	<= '1';
-			elsif(A(23 downto 16) = LAN_BASEADR and SHUT_UP(0)='0' )then	
+			end if;
+			if(A(23 downto 16) = LAN_BASEADR and SHUT_UP(0)='0' )then	
 				if(A(14 downto 13)<"11")then
 					lan_adr_sw  <= '1';
 				end if;
 				lan_adr 		<= '1';
 				lancp                   <= '1';
-			elsif(A(23 downto 16) =  CP_BASEADR and SHUT_UP(1)='0')then					
+			end if;
+			if(A(23 downto 16) =  CP_BASEADR and SHUT_UP(1)='0')then					
 				cp  			<= '1';
 				lancp                   <= '1';
-			elsif(A(23 downto 16) = IDE_BASEADR and SHUT_UP(2)='0')then					
+			end if;
+			if(A(23 downto 16) = IDE_BASEADR and SHUT_UP(2)='0')then					
 				ide 			<= '1';
 				lancp                   <= '1';
 			end if;		
@@ -254,11 +259,15 @@ begin
 	end process lan_int_proc;
 	
 	--lan signal generation: all Signals are HIGH active!
-	lan_rw_gen: process (AMIGA_CLK)
+	lan_rw_gen: process (AMIGA_CLK,AS)
 	begin
-		if falling_edge(AMIGA_CLK) then			
+		if(AS ='1') then
+			LAN_RD_S	<= '0';
+			LAN_WRH_S	<= '0';
+			LAN_WRL_S	<= '0';
+		elsif falling_edge(AMIGA_CLK) then			
 			--default values
-			LAN_RD_S		<= '0';
+			LAN_RD_S	<= '0';
 			LAN_WRH_S	<= '0';
 			LAN_WRL_S	<= '0';
 
@@ -272,42 +281,78 @@ begin
 	end process lan_rw_gen;
 	
 	--cp signal generation
-	cp_rw_gen: process (AMIGA_CLK)
+	cp_rw_gen: process (AMIGA_CLK,reset)
 	begin
-		if falling_edge(AMIGA_CLK) then			
+		if	(reset = '0') then
-			--default values
+			CP_WE_QUIRK		<= '1';
-			CP_RD_S		<= '1';
 			CP_WE_S		<= '1';
-			if(cp = '1' and DS='0')then --datastrobe instead of AS!
+			CP_RD_S		<= '1';
-				CP_RD_S		<= not RW;
+		elsif falling_edge(AMIGA_CLK) then			
-				CP_WE_S		<= RW;
+			if(cp = '1' and AS='0' and RW ='1')then 
+				CP_RD_S		<= '0';
+			else
+				CP_RD_S		<= '1';
 			end if;		
+			if(cp = '1' and DS='0' and RW ='0')then --datastrobe instead of AS!!!
+				CP_WE_S		<= '0';
+			else
+				CP_WE_S		<= '1';
+			end if;	
+			-- quirk to ensure the WE-Strobe is just one cycle!
 			CP_WE_QUIRK <= CP_WE_S;
 		end if;
 	end process cp_rw_gen;
 
 	--ide signal generation
-	ide_rw_gen: process (reset,AMIGA_CLK)
+	ide_enable_gen: process (reset,AMIGA_CLK)
 	begin
 		if	(reset = '0') then
 			IDE_ENABLE 	<= '1';
-			IDE_R_S		<= '1';
-			IDE_W_S		<= '1';
-			ROM_OE_S		<= '1';
 		elsif falling_edge(AMIGA_CLK) then					
-			--default values
+			if(ide='1' and AS='0' and RW='0')then
+				IDE_ENABLE  <= '0'; -- enable IDE on first write
+			end if;				
+		end if;
+	end process ide_enable_gen;
+	
+	ide_rw_gen: process (AS,AMIGA_CLK)
+	begin
+		if	(AS = '1') then
 			IDE_R_S		<= '1';
 			IDE_W_S		<= '1';
-			ROM_OE_S		<= '1';					
+			ROM_OE_S	<= '1';
-			if(ide='1' and AS='0')then
+			ROM_OE_D0	<= '1';
+			IDE_TERM	<= '1';
+		elsif falling_edge(AMIGA_CLK) then			
+					
+			if(ide='1')then
 				if(RW='0')then
 					--the write goes to the hdd!
-					IDE_ENABLE  <= '0'; -- enable IDE on first read
 					IDE_W_S		<= '0';	
+					IDE_R_S		<= '1';
+					ROM_OE_S	<= '1';
+					ROM_OE_D0	<= '1';
+					IDE_TERM	<= not IDE_WAIT or IDE_W_S;
+				elsif(IDE_ENABLE ='1')then
+					IDE_W_S		<= '1';
+					IDE_R_S		<= '1';
+					ROM_OE_S	<= '0'; --read from ROM instead from IDE	
+					ROM_OE_D0 <= ROM_OE_S;
+					IDE_TERM <= '0';					
 				else
-					IDE_R_S		<= IDE_ENABLE; --read from IDE instead from ROM
+					IDE_W_S		<= '1';
-					ROM_OE_S		<=	not IDE_ENABLE;						
+					IDE_R_S		<= '0'; --read from IDE instead from ROM
+					ROM_OE_S	<= '1';	
+					ROM_OE_D0	<= '1';
+					IDE_TERM	<= not IDE_WAIT or IDE_R_S;			
 				end if;	
+			else
+				--default values
+				IDE_R_S		<= '1';
+				IDE_W_S		<= '1';
+				ROM_OE_S	<= '1';	
+				ROM_OE_D0	<= '1';
+				IDE_TERM	<= '1';				
 			end if;				
 		end if;
 	end process ide_rw_gen;
@@ -336,7 +381,7 @@ begin
 						if(AUTO_CONFIG_DONE < 2)then
 							Dout1 <= 	"1100" ; --ZII, No-System-Memory, no ROM
 						else
-							Dout1 <= 	"1101" ; --ZII, no System-Memory, (perhaps)ROM
+							Dout1 <= 	"1101" ; --ZII, no System-Memory, ROM
 						end if;
 					when "000001"	=> Dout1 <=	"0001" ; --one Card, 64KB =001
 					when "000010"	=> 
@@ -401,7 +446,7 @@ begin
 							elsif(AUTO_CONFIG_DONE = 1)then									
 								CP_BASEADR(7 downto 0)	<= D(15 downto 8); --Base adress
 								SHUT_UP(1)					<= '0'; --enable board
-								AUTO_CONFIG_DONE_CYCLE	<= '1' & not AUTOBOOT_OFF; --done here, if Autoboot = 1 skip ide part!
+								AUTO_CONFIG_DONE_CYCLE	<= ('1' & not(AUTOBOOT_OFF)); --done here, if Autoboot = 1 skip ide part!
 							elsif(AUTO_CONFIG_DONE = 2)then
 								IDE_BASEADR(7 downto 0)	<= D(15 downto 8); --Base adress
 								SHUT_UP(2) 					<= '0'; --enable board
@@ -429,18 +474,10 @@ begin
 	CP_CS		<= not cp;
 
 	--the lanport is shifted by one adress line but I forgot to adopt the clockport address!
-	A_LAN(13 downto 6)<=	LAN_A_CLRREG(13 downto 6) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
+	A_LAN(13 downto 0)<=	LAN_A_CLRREG(13 downto 0) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
-								LAN_A_SETREG(13 downto 6) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
+							LAN_A_SETREG(13 downto 0) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
-								 --(A(14)&A(12)&A(13)&A(11 downto 7)); --swap A12/13 for the enj-Chip
+							A(14 downto 1) when lan_adr ='1' else
-								 A(14 downto 7); 
+							A(12 downto 1) &"00";
-	A_LAN(5 downto 2) <=		LAN_A_CLRREG(5 downto 2) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
-									LAN_A_SETREG(5 downto 2) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
---									A(5 downto 2) when cp='1' else A(6 downto 3); --mux the clock-port adresses!
-									A(4 downto 1) when cp='1' else A(6 downto 3); --mux the clock-port adresses! (shifted 1 down due to V2 bug)
-
-	A_LAN(1 downto 0)<= LAN_A_CLRREG(1 downto 0) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
-							  LAN_A_SETREG(1 downto 0) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
-							  A(2 downto 1);
 	
 	
 	
@@ -448,17 +485,18 @@ begin
 	D	<=	--RAM_D 						when RW='1' and TRANSFER_IN_PROGRES ='1' else
 			DQ                             when RW='1' and lan_adr ='1' and lan_adr_sw ='0' and AS='0' else
 			DQ(7 downto 0)&DQ(15 downto 8) when RW='1' and lan_adr ='1' and lan_adr_sw ='1' and AS='0' else
-			DQ(7 downto 0)&DQ(7 downto 0)  when RW='1' and cp = '1'     and AS='0' else
+			DQ(7 downto 0)&DQ(7 downto 0)  when RW='1' and (cp = '1' or ROM_OE_S ='0')		and AS='0' else
-			DQ                             when RW='1' and ide = '1'    and AS='0' else
+			DQ                             when RW='1' and ide = '1' and ROM_OE_S ='1'	    and AS='0' else
-			Dout1	& x"FFF"               when RW='1' and autoconfig ='1' and AS='0' else
+			Dout1	& x"FFF"               when RW='1' and autoconfig ='1' 					and AS='0' else
 			(others => 'Z');
 
 	--defined lancp signal that matches both LAN and CP addresses (and IDE for Rev2 boards)
 	DQ <=	LAN_D_CLR when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
 			LAN_D_SET when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
-			D( 7 downto 0) & D( 7 downto 0)	when RW='0' and AS='0' and lancp = '1' and LDS='0' and UDS='1' else
+			--D( 7 downto 0) & D( 7 downto 0)	when RW='0' and AS='0' and lancp = '1' and LDS='0' and UDS='1' else
-			D(15 downto 8) & D(15 downto 8)	when RW='0' and AS='0' and lancp = '1' and LDS='1' and UDS='0' else
+			--D(15 downto 8) & D(15 downto 8)	when RW='0' and AS='0' and lancp = '1' and LDS='1' and UDS='0' else
 			D( 7 downto 0) & D(15 downto 8)	when RW='0' and AS='0' and lan_adr ='1' and lan_adr_sw ='1' else
+			D(15 downto 8) & D(15 downto 8)	when RW='0' and AS='0' and cp ='1' else
 			D 	when RW='0' and AS='0' and lancp ='1'
 			else (others => 'Z');
 								
@@ -468,7 +506,6 @@ begin
 	IDE_CS(1)<= not(A(13));
 	IDE_A(2 downto 0)	<= A(11 downto 9);
 	ROM_B	<= "00";
---	ROM_OE	<= ROM_OE_S when AS='0' and AUTOBOOT_OFF = '0' else '1';				
 	ROM_OE	<= ROM_OE_S when AS='0' else '1';				
 
 --	INT_OUT <= 'Z';
@@ -485,15 +522,11 @@ begin
 	SLAVE <= '0' when AS='0' and (autoconfig  = '1' or ide = '1' or lan_adr = '1' or cp = '1') else '1';	
 	CFOUT <= '0' when AUTO_CONFIG_DONE=3 else '1';
 	
---	OVR <= 'Z';
+	--OVR <= 'Z';
 	OVR <= '0' when ide='1' and AS='0' else 'Z';
 	
---	DTACK <= DTACK_S when --TRANSFER_IN_PROGRES ='1' or 
+	DTACK <= IDE_TERM when ide='1' and AS='0' else 'Z';
---								AUTOCONFIG_IN_PROGRES ='1' 
+	--DTACK <= 'Z';
---						  else 'Z';
-	
-	DTACK <= '0' when ide='1' and AS='0' and IDE_WAIT='1' else 'Z';
---	DTACK <= 'Z';
 	A	<= (others => 'Z');
    MTACK <= 'Z';
 

Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd.orig

@@ -0,0 +1,551 @@
+----------------------------------------------------------------------------------
+-- Company:        a1k.org
+-- Engineer:       M. Heinrichs, H. Richter
+-- 
+-- Create Date:    14:45:29 07/15/2020
+-- Design Name: 
+-- Module Name:    LAN_IDE_CP-Z2v2 - Behavioral 
+-- Project Name: 
+-- Target Devices: 
+-- Tool versions: 
+-- Description: 
+--
+-- Dependencies: 
+--
+-- Revision: 
+-- Revision 0.01 - File Created
+-- Additional Comments: 
+--
+-- directory cleanup hint:
+--  svn status|grep ^M|sed "s/^M [\t ]*//"|xargs rm
+----------------------------------------------------------------------------------
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+use IEEE.STD_LOGIC_ARITH.ALL;
+use IEEE.STD_LOGIC_UNSIGNED.ALL;
+
+-- Uncomment the following library declaration if using
+-- arithmetic functions with Signed or Unsigned values
+--use IEEE.NUMERIC_STD.ALL;
+
+-- Uncomment the following library declaration if instantiating
+-- any Xilinx primitives in this code.
+--library UNISIM;
+--use UNISIM.VComponents.all;
+
+entity LAN_IDE_CP is
+    Port ( A : inout  STD_LOGIC_VECTOR (23 downto 1);
+           D : inout  STD_LOGIC_VECTOR (15 downto 0);
+           DQ : inout  STD_LOGIC_VECTOR (15 downto 0);
+           A_LAN : out  STD_LOGIC_VECTOR (13 downto 0);
+           OWN : out  STD_LOGIC;
+           SLAVE : out  STD_LOGIC;
+           CFOUT : out  STD_LOGIC;
+           CFIN : in  STD_LOGIC;
+           C1 : in  STD_LOGIC;
+           C3 : in  STD_LOGIC;
+           MTCR : in  STD_LOGIC;
+           OVR : out  STD_LOGIC;
+           BERR : in  STD_LOGIC;
+           MTACK : out  STD_LOGIC;
+           DS0 : in  STD_LOGIC;
+           DTACK : out  STD_LOGIC;
+           UDS : in  STD_LOGIC;
+           LDS : in  STD_LOGIC;
+           AS : in  STD_LOGIC;
+           RW : in  STD_LOGIC;
+           Z3 : in  STD_LOGIC;
+           DS1 : in  STD_LOGIC;
+           FCS : in  STD_LOGIC;
+           RESET : in  STD_LOGIC;
+           INT2_OUT : out  STD_LOGIC;
+			  INT6_OUT : out  STD_LOGIC;
+           AUTOBOOT_OFF : in  STD_LOGIC;
+           ROM_B : out  STD_LOGIC_VECTOR (1 downto 0);
+           ROM_OE : out  STD_LOGIC;
+           IDE_WAIT : in  STD_LOGIC;
+           CLK_EXT : in  STD_LOGIC;
+           IDE_W : out  STD_LOGIC;
+           IDE_R : out  STD_LOGIC;
+           IDE_A : out  STD_LOGIC_VECTOR (2 downto 0);
+           IDE_CS : out  STD_LOGIC_VECTOR (1 downto 0);
+           LAN_RD : out  STD_LOGIC;
+           LAN_CS : out  STD_LOGIC;
+           LAN_WRH : out  STD_LOGIC;
+           LAN_WRL : out  STD_LOGIC;
+           LAN_INT : in  STD_LOGIC;
+           CP_RD : out  STD_LOGIC;
+           CP_WE : out  STD_LOGIC;
+           CP_CS : out  STD_LOGIC;
+           CP_IRQ : in  STD_LOGIC);
+end LAN_IDE_CP;
+
+architecture Behavioral of LAN_IDE_CP is
+
+	TYPE lan_reset IS (
+				nop,
+				wait0,
+				clr,
+				clr_commit,
+				wait1,
+				set,
+				set_commit,
+				done
+	);
+
+	SIGNAL LAN_RST_SM: lan_reset :=nop;
+	SIGNAL lancp: STD_LOGIC; -- LAN or ClockPort
+	SIGNAL ide: STD_LOGIC;
+	SIGNAL autoconfig: STD_LOGIC;
+	SIGNAL lan_adr: STD_LOGIC;
+	SIGNAL lan_adr_sw: STD_LOGIC;
+	SIGNAL cp: STD_LOGIC;
+	signal Dout1:STD_LOGIC_VECTOR(3 downto 0);
+	signal AUTO_CONFIG_DONE:STD_LOGIC_VECTOR(1 downto 0);
+	signal AUTO_CONFIG_DONE_CYCLE:STD_LOGIC_VECTOR(1 downto 0);
+	signal SHUT_UP:STD_LOGIC_VECTOR(2 downto 0);
+	signal IDE_BASEADR:STD_LOGIC_VECTOR(7 downto 0);
+	signal LAN_BASEADR:STD_LOGIC_VECTOR(7 downto 0);
+	signal CP_BASEADR:STD_LOGIC_VECTOR(7 downto 0);
+	signal IDE_ENABLE:STD_LOGIC;
+	signal ROM_OE_S:STD_LOGIC;
+	signal ROM_OE_D0:STD_LOGIC;
+	signal IDE_TERM:STD_LOGIC;
+	signal IDE_R_S:STD_LOGIC;
+	signal IDE_W_S:STD_LOGIC;
+	signal DTACK_S:STD_LOGIC;
+	signal AMIGA_CLK: std_logic;
+	signal LAN_INT_ENABLE: std_logic;
+	signal DECODE_RESET: std_logic;
+	signal LAN_INT_D0: std_logic;
+	signal DS: std_logic;
+    signal DS_D: std_logic;
+	signal LAN_RD_S: std_logic;
+	signal LAN_WRH_S: std_logic;
+	signal LAN_WRL_S: std_logic;
+	signal LAN_IRQ_D0: std_logic;
+	signal LAN_IRQ_OUT: std_logic;
+	signal CP_RD_S: std_logic;
+	signal CP_WE_S: std_logic;
+	signal CP_WE_QUIRK: std_logic;
+	
+	signal LAN_CS_RST: std_logic;
+	signal LAN_WR_RST: std_logic;
+	constant LAN_A_CLRREG:STD_LOGIC_VECTOR(13 downto 0) :="11"&x"FF7";
+	constant LAN_A_SETREG:STD_LOGIC_VECTOR(13 downto 0) :="11"&x"FB7";
+	constant LAN_D_SET:STD_LOGIC_VECTOR(15 downto 0) := "0000000100010000";
+	constant LAN_D_CLR:STD_LOGIC_VECTOR(15 downto 0) := "0000111000000000";
+	
+   Function to_std_logic(X: in Boolean) return Std_Logic is
+   variable ret : std_logic;
+   begin
+   if x then ret := '1';  else ret := '0'; end if;
+   return ret;
+   end to_std_logic;
+	
+begin
+	
+	AMIGA_CLK <= not (C1 xor C3);
+	DECODE_RESET <= BERR and reset;
+	
+	DS <= UDS and LDS;
+	
+	clock_init: process(CLK_EXT)
+	begin
+		if(rising_edge(CLK_EXT))then
+			if(reset = '0' )then
+				LAN_RST_SM <= nop;
+				LAN_CS_RST<='0';
+				LAN_WR_RST<='0';
+			else
+				--init the clock afer reset finished!
+				case LAN_RST_SM is
+					when nop=>
+						LAN_CS_RST<='0';
+						LAN_WR_RST<='0';						
+						LAN_RST_SM<=wait0;
+					when wait0=>
+						LAN_CS_RST<='1';
+						LAN_WR_RST<='0';						
+						LAN_RST_SM<=clr;
+					when clr=>
+						LAN_CS_RST<='1';
+						LAN_WR_RST<='1';						
+						LAN_RST_SM<=clr_commit;
+					when clr_commit=>
+						LAN_CS_RST<='1';
+						LAN_WR_RST<='0';						
+						LAN_RST_SM<=wait1;
+					when wait1=>
+						LAN_CS_RST<='1';
+						LAN_WR_RST<='0';						
+						LAN_RST_SM<=set;
+					when 	set=>
+						LAN_CS_RST<='1';
+						LAN_WR_RST<='1';						
+						LAN_RST_SM<=set_commit;
+					when 	set_commit=>
+						LAN_CS_RST<='1';
+						LAN_WR_RST<='0';						
+						LAN_RST_SM<=done;
+					when 	done=> --stay here
+						LAN_CS_RST<='0';
+						LAN_WR_RST<='0';						
+						LAN_RST_SM<=done;
+				end case;
+			end if;
+		end if;
+	end process clock_init;
+	
+	ADDRESS_DECODE: process(reset,AMIGA_CLK)
+	begin
+		if(reset ='0')then
+			autoconfig 	<= '0';
+			ide 			<= '0';
+			lan_adr 		<= '0';
+			lan_adr_sw  <= '0';
+			cp  			<= '0';
+			lancp                   <= '0';
+		elsif(rising_edge(AMIGA_CLK))then		
+			--default values
+			autoconfig 	<= '0';
+			ide 			<= '0';
+			lan_adr 		<= '0';
+			lan_adr_sw  <= '0';
+			cp  			<= '0';
+			lancp                   <= '0';
+			if(A(23 downto 16) = x"E8" and AUTO_CONFIG_DONE < "11" and CFIN='0')then
+				autoconfig 	<= '1';
+			elsif(A(23 downto 16) = LAN_BASEADR and SHUT_UP(0)='0' )then	
+				if(A(14 downto 13)<"11")then
+					lan_adr_sw  <= '1';
+				end if;
+				lan_adr 		<= '1';
+				lancp                   <= '1';
+			elsif(A(23 downto 16) =  CP_BASEADR and SHUT_UP(1)='0')then					
+				cp  			<= '1';
+				lancp                   <= '1';
+			elsif(A(23 downto 16) = IDE_BASEADR and SHUT_UP(2)='0')then					
+				ide 			<= '1';
+				lancp                   <= '1';
+			end if;		
+		end if;				
+	end process ADDRESS_DECODE;
+	
+	--LAN interrupt enable
+	lan_int_proc: process (AMIGA_CLK,reset)
+	begin
+		if(reset ='0') then
+			LAN_INT_ENABLE <='0';
+			LAN_IRQ_D0 <='1';
+			LAN_IRQ_OUT <='1';
+		elsif falling_edge(AMIGA_CLK) then
+			LAN_IRQ_D0 <= LAN_INT;
+			if(LAN_INT ='0' and LAN_IRQ_D0 ='1') then
+				LAN_IRQ_OUT <='0';
+			elsif(LAN_INT ='1' or LAN_INT_ENABLE = '0')then
+				LAN_IRQ_OUT <='1';
+			elsif(lan_adr = '1' and DS ='0' and RW='0' and A(15)='1') then 
+				LAN_IRQ_OUT		<= D(14); --controll lan irq
+			end if;
+
+			if(lan_adr = '1' and DS ='0' and RW='0' and A(15)='1') then --enable if a write to A15 occured
+				LAN_INT_ENABLE <= D(15);
+			end if;
+		end if;
+	end process lan_int_proc;
+	
+	--lan signal generation: all Signals are HIGH active!
+	lan_rw_gen: process (AMIGA_CLK,AS)
+	begin
+		if(AS ='1') then
+			LAN_RD_S	<= '0';
+			LAN_WRH_S	<= '0';
+			LAN_WRL_S	<= '0';
+		elsif falling_edge(AMIGA_CLK) then			
+			--default values
+			LAN_RD_S	<= '0';
+			LAN_WRH_S	<= '0';
+			LAN_WRL_S	<= '0';
+
+			if(lan_adr='1' and DS='0' and A(15)='0')then
+				LAN_RD_S		<= RW;
+				-- swapped LDS/UDS here: ENC624 is little endian
+				LAN_WRH_S   <= not LDS and not RW;
+				LAN_WRL_S   <= not UDS and not RW;
+			end if;				
+		end if;
+	end process lan_rw_gen;
+	
+	--cp signal generation
+	cp_rw_gen: process (AMIGA_CLK,AS)
+	begin
+		if	(AS = '1') then
+			CP_WE_QUIRK		<= '1';
+			CP_WE_S		<= '1';
+			CP_RD_S		<= '1';
+		elsif falling_edge(AMIGA_CLK) then			
+			--default values
+			CP_RD_S		<= '1';
+			CP_WE_S		<= '1';
+			if(cp = '1' and DS='0')then --datastrobe instead of AS!
+				CP_RD_S		<= not RW;
+				CP_WE_S		<= RW;
+			end if;				
+			CP_WE_QUIRK <= CP_WE_S;
+		end if;
+	end process cp_rw_gen;
+
+	--ide signal generation
+	ide_enable_gen: process (reset,AMIGA_CLK)
+	begin
+		if	(reset = '0') then
+			IDE_ENABLE 	<= '1';
+		elsif falling_edge(AMIGA_CLK) then					
+			if(ide='1' and AS='0' and RW='0')then
+				IDE_ENABLE  <= '0'; -- enable IDE on first write
+			end if;				
+		end if;
+	end process ide_enable_gen;
+	
+	ide_rw_gen: process (AS,AMIGA_CLK)
+	begin
+		if	(AS = '1') then
+			IDE_R_S		<= '1';
+			IDE_W_S		<= '1';
+			ROM_OE_S	<= '1';
+			ROM_OE_D0	<= '1';
+			IDE_TERM	<= '1';
+		elsif falling_edge(AMIGA_CLK) then			
+					
+			if(ide='1')then
+				if(RW='0')then
+					--the write goes to the hdd!
+					IDE_W_S		<= '0';	
+					IDE_R_S		<= '1';
+					ROM_OE_S	<= '1';
+					ROM_OE_D0	<= '1';
+					IDE_TERM	<= not IDE_WAIT or IDE_W_S;
+				elsif(IDE_ENABLE ='1')then
+					IDE_W_S		<= '1';
+					IDE_R_S		<= '1';
+					ROM_OE_S	<= '0'; --read from ROM instead from IDE	
+					ROM_OE_D0 <= ROM_OE_S;
+					IDE_TERM <= '0';					
+				else
+					IDE_W_S		<= '1';
+					IDE_R_S		<= '0'; --read from IDE instead from ROM
+					ROM_OE_S	<= '1';	
+					ROM_OE_D0	<= '1';
+					IDE_TERM	<= not IDE_WAIT or IDE_R_S;			
+				end if;	
+			else
+				--default values
+				IDE_R_S		<= '1';
+				IDE_W_S		<= '1';
+				ROM_OE_S	<= '1';	
+				ROM_OE_D0	<= '1';
+				IDE_TERM	<= '1';				
+			end if;				
+		end if;
+	end process ide_rw_gen;
+		
+	
+	--autoconfig	
+	autoconfig_proc: process (reset, AMIGA_CLK)
+	begin
+		if	reset = '0' then
+			-- reset active ...
+			AUTO_CONFIG_DONE_CYCLE	<="00";
+			Dout1<="1111";
+			--Dout2<="1111";
+			SHUT_UP	<="111";
+			IDE_BASEADR<=x"FF";
+			LAN_BASEADR<=x"FF";
+			CP_BASEADR<=x"FF";
+			AUTO_CONFIG_DONE	<="00";
+		elsif falling_edge(AMIGA_CLK) then -- no reset, so wait for rising edge of the clock		
+			DS_D <= DS;
+			if(AS='1')then
+				AUTO_CONFIG_DONE <= AUTO_CONFIG_DONE_CYCLE;
+			elsif(autoconfig= '1' and DS='0') then
+				case A(6 downto 1) is
+					when "000000"	=> 
+						if(AUTO_CONFIG_DONE < 2)then
+							Dout1 <= 	"1100" ; --ZII, No-System-Memory, no ROM
+						else
+							Dout1 <= 	"1101" ; --ZII, no System-Memory, ROM
+						end if;
+					when "000001"	=> Dout1 <=	"0001" ; --one Card, 64KB =001
+					when "000010"	=> 
+						if(AUTO_CONFIG_DONE < 2)then
+							Dout1 <=	"1000" ; --ProductID high nibble : 7->1000
+						else
+							Dout1 <=	"1111" ; --ProductID high nibble : 0->1111
+						end if;
+					when "000011"	=> 
+						if(AUTO_CONFIG_DONE = 0)then
+							Dout1 <=	"0100" ; --ProductID low nibble: B->0100
+						elsif(AUTO_CONFIG_DONE = 1)then
+							Dout1 <=	"0011" ; --ProductID low nibble: C->0011
+						else
+							Dout1 <=	"1001" ; --ProductID low nibble: 6->1001 
+						end if;						
+					when "001000"	=> Dout1 <=	"1111" ; --Ventor ID 0
+					when "001001"	=> 
+						if(AUTO_CONFIG_DONE < 2)then
+							Dout1 <=	"0101" ; --Ventor ID 1
+						else
+							Dout1 <=	"0111" ; --Ventor ID 1
+						end if;						
+					when "001010"	=> 
+						if(AUTO_CONFIG_DONE < 2)then
+							Dout1 <=	"1110" ; --Ventor ID 2
+						else
+							Dout1 <=	"1101" ; --Ventor ID 2
+						end if;												
+					when "001011"	=> 
+						if(AUTO_CONFIG_DONE < 2)then
+							Dout1 <=	"0011" ; --Ventor ID 3 : $0A1C: A1K.org
+						else
+							Dout1 <=	"0011" ; --Ventor ID 3 : $082C: BSC
+						end if;						
+					when "001100"	=> Dout1 <=	"0100" ; --Serial byte 0 (msb) high nibble
+					when "001101"	=> Dout1 <=	"1110" ; --Serial byte 0 (msb) low  nibble
+					when "001110"	=> Dout1 <=	"1001" ; --Serial byte 1       high nibble
+					when "001111"	=> Dout1 <=	"0100" ; --Serial byte 1       low  nibble
+					when "010000"	=> Dout1 <=	"1111" ; --Serial byte 2       high nibble
+					when "010001"	=> Dout1 <=	"1111" ; --Serial byte 2       low  nibble
+					when "010010"	=> Dout1 <=	"0100" ; --Serial byte 3 (lsb) high nibble
+					when "010011"	=> Dout1 <=	"1010" ; --Serial byte 3 (lsb) low  nibble: B16B00B5
+					--when "010100"	=> Dout1 <=	"1111" ; --Rom vector high byte high nibble 
+					--when "010101"	=> Dout1 <=	"1111" ; --Rom vector high byte low  nibble 
+					--when "010110"	=> Dout1 <=	"1111" ; --Rom vector low byte high nibble
+					when "010111"	=> 
+						if(AUTO_CONFIG_DONE = 2)then
+							Dout1 <=	"1110" ; --Rom vector low byte low  nibble						
+						else
+							Dout1 <=	"1111" ; --Rom vector low byte low  nibble						
+						end if;
+					when "100000"	=> Dout1 <=	"0000" ; --Interrupt config: all zero
+					when "100001"	=> Dout1 <=	"0000" ; --Interrupt config: all zero
+					when "100100"	=>
+						Dout1 <=	"1111" ;
+						if(RW='0' and DS_D='1')then
+							if(AUTO_CONFIG_DONE = 0)then
+								LAN_BASEADR(7 downto 0)	<= D(15 downto 8); --Base adress
+								SHUT_UP(0)					<='0'; --enable board
+								AUTO_CONFIG_DONE_CYCLE	<= "01"; --done here
+							elsif(AUTO_CONFIG_DONE = 1)then									
+								CP_BASEADR(7 downto 0)	<= D(15 downto 8); --Base adress
+								SHUT_UP(1)					<= '0'; --enable board
+<<<<<<< HEAD
+								AUTO_CONFIG_DONE_CYCLE	<= ('1' & not(AUTOBOOT_OFF)); --done here, if Autoboot = 1 skip ide part!
+=======
+								AUTO_CONFIG_DONE_CYCLE	<= '1' & not AUTOBOOT_OFF; --done here, if Autoboot = 1 skip ide part!
+>>>>>>> 85a06c170160536d7bbf493fc16ea4577085778e
+							elsif(AUTO_CONFIG_DONE = 2)then
+								IDE_BASEADR(7 downto 0)	<= D(15 downto 8); --Base adress
+								SHUT_UP(2) 					<= '0'; --enable board
+								AUTO_CONFIG_DONE_CYCLE	<= "11"; --done here
+							end if;
+						end if;
+					when "100110"	=>
+						Dout1 <=	"1111" ;
+						if(RW='0' and DS_D='1')then
+							AUTO_CONFIG_DONE_CYCLE	<= AUTO_CONFIG_DONE_CYCLE+1; --done here
+						end if;
+					when others	=> Dout1 <=	"1111" ;
+				end case;	
+			end if;
+		end if;
+	end process autoconfig_proc; --- that's all
+
+	LAN_CS	<= lan_adr   when reset='1' else LAN_CS_RST;						
+	LAN_WRL	<= LAN_WRL_S when AS='0' and reset = '1' else LAN_WR_RST;
+	LAN_WRH	<= LAN_WRH_S when AS='0' and reset = '1' else LAN_WR_RST;
+	LAN_RD	<= LAN_RD_S  when AS='0' and reset = '1' else '0';
+	
+	CP_WE		<= CP_WE_S when AS='0' and CP_WE_QUIRK ='1' else '1';
+	CP_RD		<= CP_RD_S when AS='0' else '1';
+	CP_CS		<= not cp;
+
+	--the lanport is shifted by one adress line but I forgot to adopt the clockport address!
+<<<<<<< HEAD
+	A_LAN(13 downto 0)<=	LAN_A_CLRREG(13 downto 0) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
+							LAN_A_SETREG(13 downto 0) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
+							A(14 downto 1) when lan_adr ='1' else
+							A(12 downto 1) &"00";
+=======
+	A_LAN(13 downto 6)<=	LAN_A_CLRREG(13 downto 6) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
+								LAN_A_SETREG(13 downto 6) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
+								 --(A(14)&A(12)&A(13)&A(11 downto 7)); --swap A12/13 for the enj-Chip
+								 A(14 downto 7); 
+	A_LAN(5 downto 2) <=		LAN_A_CLRREG(5 downto 2) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
+									LAN_A_SETREG(5 downto 2) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
+--									A(5 downto 2) when cp='1' else A(6 downto 3); --mux the clock-port adresses!
+									A(4 downto 1) when cp='1' else A(6 downto 3); --mux the clock-port adresses! (shifted 1 down due to V2 bug)
+
+	A_LAN(1 downto 0)<= LAN_A_CLRREG(1 downto 0) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
+							  LAN_A_SETREG(1 downto 0) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
+							  A(2 downto 1);
+>>>>>>> 85a06c170160536d7bbf493fc16ea4577085778e
+	
+	
+	
+	--signal assignment
+	D	<=	--RAM_D 						when RW='1' and TRANSFER_IN_PROGRES ='1' else
+			DQ                             when RW='1' and lan_adr ='1' and lan_adr_sw ='0' and AS='0' else
+			DQ(7 downto 0)&DQ(15 downto 8) when RW='1' and lan_adr ='1' and lan_adr_sw ='1' and AS='0' else
+			DQ(7 downto 0)&DQ(7 downto 0)  when RW='1' and (cp = '1' or ROM_OE_S ='0')		and AS='0' else
+			DQ                             when RW='1' and ide = '1' and ROM_OE_S ='1'	    and AS='0' else
+			Dout1	& x"FFF"               when RW='1' and autoconfig ='1' 					and AS='0' else
+			(others => 'Z');
+
+	--defined lancp signal that matches both LAN and CP addresses (and IDE for Rev2 boards)
+	DQ <=	LAN_D_CLR when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
+			LAN_D_SET when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
+			--D( 7 downto 0) & D( 7 downto 0)	when RW='0' and AS='0' and lancp = '1' and LDS='0' and UDS='1' else
+			--D(15 downto 8) & D(15 downto 8)	when RW='0' and AS='0' and lancp = '1' and LDS='1' and UDS='0' else
+			D( 7 downto 0) & D(15 downto 8)	when RW='0' and AS='0' and lan_adr ='1' and lan_adr_sw ='1' else
+			D 	when RW='0' and AS='0' and lancp ='1'
+			else (others => 'Z');
+								
+	IDE_W <=	IDE_W_S when AS='0' else '1';
+	IDE_R <=	IDE_R_S when AS='0' else '1';
+	IDE_CS(0)<= not(A(12));			
+	IDE_CS(1)<= not(A(13));
+	IDE_A(2 downto 0)	<= A(11 downto 9);
+	ROM_B	<= "00";
+<<<<<<< HEAD
+	ROM_OE	<= ROM_OE_S when AS='0' else '1';				
+=======
+--	ROM_OE	<= ROM_OE_S when AS='0' and AUTOBOOT_OFF = '0' else '1';				
+	ROM_OE	<= ROM_OE_S when AS='0' else '1';
+>>>>>>> 85a06c170160536d7bbf493fc16ea4577085778e
+
+--	INT_OUT <= 'Z';
+	INT2_OUT <= '0' when 
+							(LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1')
+							else 'Z';
+
+	INT6_OUT <= '0' when 
+							CP_IRQ = '0' 
+							else 'Z';
+
+	
+	OWN 	<= 'Z';--'0' when AS='0' and (autoconfig  = '1' or ide = '1' or lan_adr = '1' or cp = '1') else 'Z';
+	SLAVE <= '0' when AS='0' and (autoconfig  = '1' or ide = '1' or lan_adr = '1' or cp = '1') else '1';	
+	CFOUT <= '0' when AUTO_CONFIG_DONE=3 else '1';
+	
+	--OVR <= 'Z';
+	OVR <= '0' when ide='1' and AS='0' else 'Z';
+	
+	DTACK <= IDE_TERM when ide='1' and AS='0' else 'Z';
+	--DTACK <= 'Z';
+	A	<= (others => 'Z');
+   MTACK <= 'Z';
+
+
+end Behavioral;
+

Logic/LAN_IDE_V2/LAN_IDE_CP.cmd_log

@@ -96,3 +96,447 @@ cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt
 XSLTProcess LAN_IDE_CP_build.xml 
 tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
 hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -exhaust -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -exhaust -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init low -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init low -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 

Logic/LAN_IDE_V2/LAN_IDE_CP.gyd

@@ -3,28 +3,40 @@ Pin Freeze File:  version P.20131013
 95288XL144 XC95288XL-10-TQ144
 AS S:PIN80
 AUTOBOOT_OFF S:PIN75
+A<12> S:PIN61
+A<13> S:PIN64
+A<14> S:PIN66
+A<15> S:PIN74
+A<16> S:PIN97
+A<17> S:PIN95
+A<18> S:PIN94
+A<19> S:PIN92
 A<1> S:PIN57
+A<20> S:PIN91
+A<21> S:PIN88
+A<22> S:PIN87
+A<23> S:PIN86
 A<2> S:PIN54
 A<3> S:PIN52
 A<4> S:PIN50
 A<5> S:PIN49
 A<6> S:PIN51
 A<7> S:PIN53
+A<8> S:PIN56
 C1 S:PIN103
 C3 S:PIN102
 CFIN S:PIN104
 CLK_EXT S:PIN30
 CP_IRQ S:PIN31
-DS0 S:PIN93
+A<9> S:PIN58
-DS1 S:PIN78
+A<10> S:PIN59
-FCS S:PIN77
+A<11> S:PIN60
+IDE_WAIT S:PIN33
 LAN_INT S:PIN111
 LDS S:PIN82
-MTCR S:PIN101
 RESET S:PIN143
 RW S:PIN83
 UDS S:PIN81
-Z3 S:PIN79
 A_LAN<0> S:PIN4
 A_LAN<10> S:PIN138
 A_LAN<11> S:PIN139
@@ -53,9 +65,11 @@ DQ<15> S:PIN112
 DQ<1> S:PIN117
 DQ<2> S:PIN120
 DQ<3> S:PIN119
+DQ<4> S:PIN124
 DQ<5> S:PIN121
 DQ<6> S:PIN126
 DQ<7> S:PIN125
+DQ<8> S:PIN128
 DQ<9> S:PIN116
 D<0> S:PIN2
 D<10> S:PIN41
@@ -79,6 +93,7 @@ IDE_A<2> S:PIN25
 IDE_CS<0> S:PIN22
 IDE_CS<1> S:PIN23
 IDE_R S:PIN27
+DTACK S:PIN85
 IDE_W S:PIN28
 LAN_CS S:PIN133
 LAN_RD S:PIN134
@@ -91,108 +106,83 @@ OVR S:PIN100
 MTACK S:PIN96
 INT6_OUT S:PIN135
 INT2_OUT S:PIN32
-DTACK S:PIN85
 ROM_OE S:PIN35
 SLAVE S:PIN106
-A<8> S:PIN56
-A<9> S:PIN58
-A<10> S:PIN59
-A<11> S:PIN60
-A<12> S:PIN61
-A<13> S:PIN64
-A<14> S:PIN66
-A<15> S:PIN74
-A<16> S:PIN97
-A<17> S:PIN95
-A<18> S:PIN94
-A<19> S:PIN92
-A<20> S:PIN91
-A<21> S:PIN88
-A<22> S:PIN87
-A<23> S:PIN86
-DQ<8> S:PIN128
-DQ<4> S:PIN124
 
 
 ;The remaining section of the .gyd file is for documentation purposes only.
 ;It shows where your internal equations were placed in the last successful fit.
 
-PARTITION FB1_4 SHUT_UP_Z2<1> D_5_IOBUFE D_4_IOBUFE AUTO_CONFIG_Z2_DONE_CYCLE<2>
+PARTITION FB1_4 LAN_IRQ_D0 D_5_IOBUFE D_4_IOBUFE LAN_WRH_S
-		 IDE_CS_0_OBUF AUTO_CONFIG_Z2_DONE<1> IDE_CS_1_OBUF LAN_BASEADR<9>
+		 IDE_CS_0_OBUF IDE_W_S IDE_CS_1_OBUF AUTO_CONFIG_DONE<1>
-		 IDE_A_0_OBUF$BUF0 LAN_BASEADR<8> IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0
+		 IDE_A_0_OBUF$BUF0 AUTO_CONFIG_DONE<0> IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0
-		 LAN_BASEADR<15> IDE_R_OBUF LAN_BASEADR<13>
+		 LAN_INT_ENABLE IDE_R_OBUF LAN_IRQ_OUT
-PARTITION FB2_1 D_Z2_OUT<1> A_LAN_4_OBUF A_LAN_7_OBUF IDE_BASEADR<4>
+PARTITION FB2_2 A_LAN_4_OBUF A_LAN_7_OBUF
-		 A_LAN_6_OBUF IDE_BASEADR<3> IDE_BASEADR<2> IDE_BASEADR<1>
+PARTITION FB2_5 A_LAN_6_OBUF
-		 EXP24_ D_6_IOBUFE IDE_BASEADR<0> D_3_IOBUFE
+PARTITION FB2_8 IDE_ENABLE CP_RD_S D_6_IOBUFE LAN_WRL_S
-		 EXP25_ D_7_IOBUFE D_1_IOBUFE EXP26_
+		 D_3_IOBUFE DS_D D_7_IOBUFE D_1_IOBUFE
-		 D_8_IOBUFE EXP27_
+		 CP_WE_S D_8_IOBUFE LAN_RD_S
-PARTITION FB3_2 IDE_W_OBUF
+PARTITION FB3_1 $OpTx$INV$143 IDE_W_OBUF EXP22_
-PARTITION FB3_13 LAN_D_INIT<8> ROM_B_0_OBUF$BUF5 LAN_D_INIT<1> LAN_A_INIT<6>
+PARTITION FB3_8 LAN_WR_RST LAN_RST_SM_FSM_FFd3 LAN_RST_SM_FSM_FFd2 LAN_RST_SM_FSM_FFd1
-		 CP_WE_S/CP_WE_S_CLKF CP_WE_QUIRK
+		 LAN_CS_RST autoconfig ROM_B_0_OBUF$BUF5 EXP23_
-PARTITION FB4_1 SHUT_UP_Z2<2> D_0_IOBUFE LAN_BASEADR<14> LAN_BASEADR<12>
+		 ide EXP24_ EXP25_
-		 A_LAN_1_OBUF A_LAN_0_OBUF LAN_BASEADR<11> A_LAN_3_OBUF
+PARTITION FB4_1 EXP26_ D_0_IOBUFE
-		 LAN_BASEADR<10> IDE_BASEADR<7> CP_BASEADR<7> A_LAN_2_OBUF
+PARTITION FB4_5 A_LAN_1_OBUF A_LAN_0_OBUF
-		 CP_BASEADR<6> A_LAN_5_OBUF CP_BASEADR<4> CP_BASEADR<3>
+PARTITION FB4_8 A_LAN_3_OBUF
-		 CP_BASEADR<2> CP_BASEADR<1>
+PARTITION FB4_12 A_LAN_2_OBUF
-PARTITION FB5_1 LAN_A_INIT<3> CP_CS_OBUF EXP28_ EXP29_
+PARTITION FB4_14 A_LAN_5_OBUF SHUT_UP<0> LAN_BASEADR<1> IDE_BASEADR<1>
-		 ROM_OE_OBUF IDE_W_S IDE_ENABLE AS_D1
+		 CP_BASEADR<1>
-		 AS_D0 D_2_IOBUFE D_8_IOBUFE/D_8_IOBUFE_TRST D_9_IOBUFE
+PARTITION FB5_1 EXP27_ CP_CS_OBUF EXP28_ EXP29_
-		 AUTOCONFIG_Z2_ACCESS D_10_IOBUFE D_11_IOBUFE EXP30_
+		 ROM_OE_OBUF
-		 D_12_IOBUFE EXP31_
+PARTITION FB5_9 EXP30_ D_2_IOBUFE EXP31_ D_9_IOBUFE
-PARTITION FB6_1 EXP32_ ROM_B_0_OBUF$BUF4 A_LAN_12_OBUF
+		 EXP32_ D_10_IOBUFE D_11_IOBUFE EXP33_
+		 D_12_IOBUFE EXP34_
+PARTITION FB6_1 EXP35_ ROM_B_0_OBUF$BUF4 A_LAN_12_OBUF
 PARTITION FB6_5 A_LAN_13_OBUF A_LAN_10_OBUF
 PARTITION FB6_8 A_LAN_11_OBUF
-PARTITION FB6_10 A_LAN_8_OBUF EXP33_ EXP34_ DQ_DATA<3>
+PARTITION FB6_10 A_LAN_8_OBUF
-		 A_LAN_9_OBUF EXP35_ DQ_DATA<11> EXP36_
+PARTITION FB6_13 EXP36_ A_LAN_9_OBUF $OpTx$INV$141 EXP37_
-		 IDE_ACCESS
+		 EXP38_ lan_adr_sw
-PARTITION FB7_1 EXP37_ EXP38_ D_13_IOBUFE EXP39_
+PARTITION FB7_1 EXP39_ CP_WE_QUIRK D_13_IOBUFE EXP40_
-		 D_14_IOBUFE DQ_9_IOBUFE/DQ_9_IOBUFE_TRST CP_BASEADR<0> CP_BASEADR<5>
+		 D_14_IOBUFE EXP41_ EXP42_ EXP43_
-		 IDE_BASEADR<5> IDE_BASEADR<6> EXP40_ D_15_IOBUFE
+		 Dout1<2> EXP44_ EXP45_ D_15_IOBUFE
-		 LAN_SM_RST EXP41_ D_Z2_OUT<2> EXP42_
+		 EXP46_ Dout1<3> EXP47_ EXP48_
-		 EXP43_ DQ<8>_BUFR.MC
+		 EXP49_ Dout1<1>
-PARTITION FB8_1 DQ_DATA<12> DQ_12_IOBUFE DQ_14_IOBUFE EXP44_
+PARTITION FB8_1 EXP50_ DQ_12_IOBUFE DQ_14_IOBUFE EXP51_
-		 LAN_WRH_OBUF EXP45_ LAN_SM_FSM_FFd4 LAN_CS_OBUF
+		 LAN_WRH_OBUF
-		 DQ_DATA<6> LAN_RD_OBUF LAN_WRH_S DQ_DATA<14>
+PARTITION FB8_8 LAN_CS_OBUF
-		 EXP46_ DQ_DATA<4> EXP47_ EXP48_
+PARTITION FB8_10 LAN_RD_OBUF
-		 EXP49_ EXP50_
+PARTITION FB8_17 CP_BASEADR<6> CP_BASEADR<4>
-PARTITION FB9_1 AUTO_CONFIG_Z2_DONE<0> EXP51_ D_Z2_OUT<3> AUTO_CONFIG_Z2_DONE_CYCLE<0>
+PARTITION FB9_17 EXP52_ lancp
-		 INT_VECTOR_CYCLE Z3_ADR<10> Z3_ADR<13> Z3_ADR<2>
+PARTITION FB10_1 EXP53_ DQ_1_IOBUFE DQ_0_IOBUFE EXP54_
-		 Z3_ADR<3> Z3_ADR<4> Z3_DATA<0> Z3_ADR<5>
+		 DQ_3_IOBUFE DQ_2_IOBUFE IDE_R_S DQ_5_IOBUFE
-		 Z3_ADR<6> Z3_DATA<1> Z3_ADR<7> Z3_ADR_0
+		 EXP55_ DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE
-		 Z3_DATA<2> Z3_ADR_1
+		 $OpTx$INV$83__$INT DQ_8_IOBUFE EXP56_ ROM_OE_S
-PARTITION FB10_1 DQ<4>_BUFR.MC DQ_1_IOBUFE DQ_0_IOBUFE EXP52_
+		 DQ_10_IOBUFE DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT
-		 DQ_3_IOBUFE DQ_2_IOBUFE EXP53_ DQ_5_IOBUFE
+PARTITION FB11_1 EXP57_ EXP58_ EXP59_ $OpTx$INV$142
-		 EXP54_ _19_ DQ_7_IOBUFE DQ_6_IOBUFE
+		 EXP60_
-		 EXP55_ _18_ EXP56_ EXP57_
+PARTITION FB11_12 ROM_B_0_OBUF$BUF0
-		 DQ_10_IOBUFE EXP58_
+PARTITION FB11_14 ROM_B_0_OBUF
-PARTITION FB11_1 Z3_DATA<30> Z3_DATA<29> Z3_DATA<3> Z3_DATA<28>
+PARTITION FB11_16 EXP61_ CP_WE_OBUF lan_adr
-		 Z3_DATA<4> Z3_DATA<27> Z3_DATA<22> Z3_DATA<21>
+PARTITION FB12_4 EXP62_ DQ_15_IOBUFE
-		 Z3_DATA<20> Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF0
+PARTITION FB12_7 EXP63_ DQ_13_IOBUFE EXP64_ DQ_11_IOBUFE
-		 Z3_DATA<19> ROM_B_0_OBUF EXP59_ DQ_DATA<8>
+		 EXP65_ DQ_9_IOBUFE EXP66_
-		 CP_WE_OBUF DQ_DATA<0>
+PARTITION FB12_18 CP_BASEADR<3>
-PARTITION FB12_1 EXP60_ EXP61_ LAN_ACCESS EXP62_
+PARTITION FB13_1 Dout1<0> CP_RD_OBUF lancp/lancp_CLKF lan_adr_sw/lan_adr_sw_CLKF
-		 DQ_15_IOBUFE EXP63_ Z3_ADR<11> DQ_13_IOBUFE
+		 lan_adr/lan_adr_CLKF ide/ide_CLKF autoconfig/autoconfig_CLKF SHUT_UP<2>/SHUT_UP<2>_CLKF
-		 Z3_ADR<12> DQ_11_IOBUFE EXP64_ DQ_9_IOBUFE
+		 CP_CS_OBUF/CP_CS_OBUF_CLKF SHUT_UP<2> LAN_BASEADR<6> LAN_BASEADR<4>
-		 EXP65_ EXP66_ EXP67_ DQ_SWAP
+		 LAN_BASEADR<2> LAN_WRL_OBUF IDE_BASEADR<6> IDE_BASEADR<4>
-		 EXP68_ EXP69_
+		 EXP67_ EXP68_
-PARTITION FB13_1 EXP70_ CP_RD_OBUF Z3_DATA<31> Z3_DATA<23>
+PARTITION FB14_3 ROM_B_0_OBUF$BUF2
-		 LAN_INT_ENABLE EXP71_ DQ_DATA<7> Z3_DATA<7>
+PARTITION FB14_7 SHUT_UP<1> LAN_BASEADR<7> LAN_BASEADR<5> LAN_BASEADR<3>
-		 EXP72_ EXP73_ DQ_DATA<5> DQ_DATA<1>
+		 CFOUT_OBUF IDE_BASEADR<7> IDE_BASEADR<5> SLAVE_OBUF
-		 EXP74_ LAN_WRL_OBUF EXP75_ DQ_DATA<13>
+		 ROM_B_0_OBUF$BUF1 IDE_BASEADR<3> CP_BASEADR<7> CP_BASEADR<5>
-		 LAN_WRL_S DQ_DATA<15>
+		
-PARTITION FB14_1 ROM_OE_S LAN_WR_RST ROM_B_0_OBUF$BUF2 LAN_RST_SM_FSM_FFd1
+PARTITION FB15_1 LAN_BASEADR<0> IDE_BASEADR<2> IDE_BASEADR<0> CP_BASEADR<2>
-		 LAN_IRQ_D0 LAN_CS_RST IDE_R_S Z3_ADR<9>
+		 CP_BASEADR<0> EXP69_ AUTO_CONFIG_DONE_CYCLE<1> AUTO_CONFIG_DONE_CYCLE<0>
-		 Z3_ADR<8> LAN_RST_SM_FSM_FFd3 CFOUT_OBUF LAN_RST_SM_FSM_FFd2
+		 EXP70_
-		 LAN_IRQ_OUT SLAVE_OBUF ROM_B_0_OBUF$BUF1 CP_WE_S
+PARTITION FB15_11 EXP71_ IDE_TERM
-		 CP_RD_S AUTO_CONFIG_Z2_DONE<2>
+
-PARTITION FB15_1 EXP76_ EXP77_ SHUT_UP_Z2<0> AUTO_CONFIG_Z2_DONE_CYCLE<1>
+PARTITION FB16_10 ROM_B_0_OBUF$BUF3
-		 LAN_SM_FSM_FFd1 LAN_RD_S LAN_SM_FSM_FFd3 EXP78_
+
-		 LAN_READY DQ_DATA<9> EXP79_ ROM_B_0_OBUF$BUF6
-		 Z3_A_LOW Z3_DATA<15> Z3_DATA<14> LAN_SM_FSM_FFd2
-		 Z3_DATA<13> D_Z2_OUT<0>
-PARTITION FB16_1 EXP80_ Z3_DATA<12> Z3_DATA<11>
-PARTITION FB16_5 Z3_DATA<26> Z3_DATA<10> Z3_DATA<25> Z3_DATA<9>
-		 Z3_DATA<24> ROM_B_0_OBUF$BUF3 Z3_DATA<8> Z3_DATA<18>
-		 Z3_DATA<17> Z3_DATA<16> EXP81_ DQ_DATA<10>
-		 DQ_DATA<2> EXP82_
 

Logic/LAN_IDE_V2/LAN_IDE_CP.pad

@@ -1,7 +1,7 @@
 Release 8.1i - Fit P.20131013
 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
 
-11-15-2019  0:25AM
+ 7-30-2021  1:05AM
 
 NOTE: This file is designed to be imported into a spreadsheet program
 such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
@@ -50,7 +50,7 @@ P29|GND||GND||||||||||
 P30|CLK_EXT|GCK|I/O/GCK1||||||||||
 P31|CP_IRQ|I|I/O|INPUT|||||||||
 P32|INT2_OUT|O|I/O/GCK2|OUTPUT|||||||||
-P33|TIE||I/O||||||||||
+P33|IDE_WAIT|I|I/O|INPUT|||||||||
 P34|CP_CS|O|I/O|OUTPUT|||||||||
 P35|ROM_OE|O|I/O|OUTPUT|||||||||
 P36|GND||GND||||||||||
@@ -73,17 +73,17 @@ P52|A<3>|I|I/O|INPUT|||||||||
 P53|A<7>|I|I/O|INPUT|||||||||
 P54|A<2>|I|I/O|INPUT|||||||||
 P55|VCC||VCCIO||||||||||
-P56|A<8>|I/O|I/O|BIDIR|||||||||
+P56|A<8>|I|I/O|INPUT|||||||||
 P57|A<1>|I|I/O|INPUT|||||||||
-P58|A<9>|I/O|I/O|BIDIR|||||||||
+P58|A<9>|I|I/O|INPUT|||||||||
-P59|A<10>|I/O|I/O|BIDIR|||||||||
+P59|A<10>|I|I/O|INPUT|||||||||
-P60|A<11>|I/O|I/O|BIDIR|||||||||
+P60|A<11>|I|I/O|INPUT|||||||||
-P61|A<12>|I/O|I/O|BIDIR|||||||||
+P61|A<12>|I|I/O|INPUT|||||||||
 P62|GND||GND||||||||||
 P63|TDI||TDI||||||||||
-P64|A<13>|I/O|I/O|BIDIR|||||||||
+P64|A<13>|I|I/O|INPUT|||||||||
 P65|TMS||TMS||||||||||
-P66|A<14>|I/O|I/O|BIDIR|||||||||
+P66|A<14>|I|I/O|INPUT|||||||||
 P67|TCK||TCK||||||||||
 P68|ROM_B<0>|O|I/O|OUTPUT|||||||||
 P69|ROM_B<1>|O|I/O|OUTPUT|||||||||
@@ -91,34 +91,34 @@ P70|CP_WE|O|I/O|OUTPUT|||||||||
 P71|CP_RD|O|I/O|OUTPUT|||||||||
 P72|GND||GND||||||||||
 P73|VCC||VCCIO||||||||||
-P74|A<15>|I/O|I/O|BIDIR|||||||||
+P74|A<15>|I|I/O|INPUT|||||||||
 P75|AUTOBOOT_OFF|I|I/O|INPUT|||||||||
 P76|LAN_WRL|O|I/O|OUTPUT|||||||||
-P77|FCS|I|I/O|INPUT|||||||||
+P77|TIE||I/O||||||||||
-P78|DS1|I|I/O|INPUT|||||||||
+P78|TIE||I/O||||||||||
-P79|Z3|I|I/O|INPUT|||||||||
+P79|TIE||I/O||||||||||
 P80|AS|I|I/O|INPUT|||||||||
 P81|UDS|I|I/O|INPUT|||||||||
 P82|LDS|I|I/O|INPUT|||||||||
 P83|RW|I|I/O|INPUT|||||||||
 P84|VCC||VCCINT||||||||||
 P85|DTACK|O|I/O|OUTPUT|||||||||
-P86|A<23>|I/O|I/O|BIDIR|||||||||
+P86|A<23>|I|I/O|INPUT|||||||||
-P87|A<22>|I/O|I/O|BIDIR|||||||||
+P87|A<22>|I|I/O|INPUT|||||||||
-P88|A<21>|I/O|I/O|BIDIR|||||||||
+P88|A<21>|I|I/O|INPUT|||||||||
 P89|GND||GND||||||||||
 P90|GND||GND||||||||||
-P91|A<20>|I/O|I/O|BIDIR|||||||||
+P91|A<20>|I|I/O|INPUT|||||||||
-P92|A<19>|I/O|I/O|BIDIR|||||||||
+P92|A<19>|I|I/O|INPUT|||||||||
-P93|DS0|I|I/O|INPUT|||||||||
+P93|TIE||I/O||||||||||
-P94|A<18>|I/O|I/O|BIDIR|||||||||
+P94|A<18>|I|I/O|INPUT|||||||||
-P95|A<17>|I/O|I/O|BIDIR|||||||||
+P95|A<17>|I|I/O|INPUT|||||||||
 P96|MTACK|O|I/O|OUTPUT|||||||||
-P97|A<16>|I/O|I/O|BIDIR|||||||||
+P97|A<16>|I|I/O|INPUT|||||||||
 P98|TIE||I/O||||||||||
 P99|GND||GND||||||||||
 P100|OVR|O|I/O|OUTPUT|||||||||
-P101|MTCR|I|I/O|INPUT|||||||||
+P101|TIE||I/O||||||||||
 P102|C3|I|I/O|INPUT|||||||||
 P103|C1|I|I/O|INPUT|||||||||
 P104|CFIN|I|I/O|INPUT|||||||||
@@ -160,7 +160,7 @@ P139|A_LAN<11>|O|I/O|OUTPUT|||||||||
 P140|A_LAN<8>|O|I/O|OUTPUT|||||||||
 P141|VCC||VCCINT||||||||||
 P142|A_LAN<9>|O|I/O|OUTPUT|||||||||
-P143|RESET|I|I/O/GSR|INPUT|||||||||
+P143|RESET|GSR/I|I/O/GSR||||||||||
 P144|GND||GND||||||||||
 
 To preserve the pinout above for future design iterations in

Logic/LAN_IDE_V2/LAN_IDE_CP.syr

@@ -3,14 +3,14 @@ Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.
 --> Parameter TMPDIR set to xst/projnav.tmp
 
 
-Total REAL time to Xst completion: 1.00 secs
+Total REAL time to Xst completion: 0.00 secs
-Total CPU time to Xst completion: 0.12 secs
+Total CPU time to Xst completion: 0.08 secs
  
 --> Parameter xsthdpdir set to xst
 
 
-Total REAL time to Xst completion: 1.00 secs
+Total REAL time to Xst completion: 0.00 secs
-Total CPU time to Xst completion: 0.12 secs
+Total CPU time to Xst completion: 0.08 secs
  
 --> Reading design: LAN_IDE_CP.prj
 
@@ -77,7 +77,7 @@ Setting FSM Encoding Algorithm to : Gray
 =========================================================================
 *                          HDL Compilation                              *
 =========================================================================
-Compiling vhdl file "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.vhd" in Library work.
+Compiling vhdl file "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd" in Library work.
 Entity <lan_ide_cp> compiled.
 Entity <lan_ide_cp> (Architecture <behavioral>) compiled.
 
@@ -91,12 +91,6 @@ Analyzing hierarchy for entity <LAN_IDE_CP> in library <work> (architecture <beh
 *                            HDL Analysis                               *
 =========================================================================
 Analyzing Entity <LAN_IDE_CP> in library <work> (Architecture <behavioral>).
-WARNING:Xst:819 - "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.vhd" line 271: One or more signals are missing in the process sensitivity list. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are:
-   <CLK_EXT>
-WARNING:Xst:819 - "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.vhd" line 517: One or more signals are missing in the process sensitivity list. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are:
-   <CLK_EXT>
-WARNING:Xst:819 - "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.vhd" line 683: One or more signals are missing in the process sensitivity list. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are:
-   <CLK_EXT>
 Entity <LAN_IDE_CP> analyzed. Unit <LAN_IDE_CP> generated.
 
 
@@ -106,43 +100,27 @@ Entity <LAN_IDE_CP> analyzed. Unit <LAN_IDE_CP> generated.
 
 Performing bidirectional port resolution...
 INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
-INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
-INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
-INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
-INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
-INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
-INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
 
 Synthesizing Unit <LAN_IDE_CP>.
-    Related source file is "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.vhd".
+    Related source file is "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd".
-WARNING:Xst:647 - Input <IDE_WAIT> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
+WARNING:Xst:647 - Input <DS0> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
-WARNING:Xst:647 - Input <BERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
+WARNING:Xst:647 - Input <DS1> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
-WARNING:Xst:646 - Signal <LAN_BASEADR<7:0>> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
+WARNING:Xst:647 - Input <FCS> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
-WARNING:Xst:1780 - Signal <CONFIG_READY> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
+WARNING:Xst:647 - Input <Z3> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
-INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
+WARNING:Xst:647 - Input <MTCR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
-    Found finite state machine <FSM_0> for signal <LAN_SM>.
+WARNING:Xst:646 - Signal <ROM_OE_D0> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
-    -----------------------------------------------------------------------
+WARNING:Xst:1780 - Signal <LAN_INT_D0> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
-    | States             | 13                                             |
+WARNING:Xst:1780 - Signal <DTACK_S> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
-    | Transitions        | 19                                             |
+WARNING:Xst:646 - Signal <DECODE_RESET> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
-    | Inputs             | 4                                              |
+    Found finite state machine <FSM_0> for signal <LAN_RST_SM>.
-    | Outputs            | 14                                             |
-    | Clock              | CLK_EXT                   (rising_edge)        |
-    | Reset              | LAN_SM_RST                (positive)           |
-    | Reset type         | asynchronous                                   |
-    | Reset State        | nop                                            |
-    | Power Up State     | nop                                            |
-    | Encoding           | gray                                           |
-    | Implementation     | automatic                                      |
-    -----------------------------------------------------------------------
-    Found finite state machine <FSM_1> for signal <LAN_RST_SM>.
     -----------------------------------------------------------------------
     | States             | 8                                              |
     | Transitions        | 8                                              |
     | Inputs             | 0                                              |
-    | Outputs            | 30                                             |
+    | Outputs            | 8                                              |
     | Clock              | CLK_EXT                   (rising_edge)        |
-    | Reset              | RESET                     (positive)           |
+    | Reset              | RESET                     (negative)           |
-    | Reset type         | asynchronous                                   |
+    | Reset type         | synchronous                                    |
     | Reset State        | nop                                            |
     | Power Up State     | nop                                            |
     | Encoding           | gray                                           |
@@ -156,73 +134,51 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
     Found 1-bit tristate buffer for signal <DTACK>.
     Found 1-bit tristate buffer for signal <INT2_OUT>.
     Found 1-bit tristate buffer for signal <INT6_OUT>.
-    Found 1-bit tristate buffer for signal <A<23>>.
+    Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 148.
-    Found 1-bit tristate buffer for signal <A<22>>.
+    Found 2-bit register for signal <AUTO_CONFIG_DONE>.
-    Found 1-bit tristate buffer for signal <A<21>>.
+    Found 2-bit register for signal <AUTO_CONFIG_DONE_CYCLE>.
-    Found 1-bit tristate buffer for signal <A<20>>.
+    Found 2-bit adder for signal <AUTO_CONFIG_DONE_CYCLE$addsub0000> created at line 459.
-    Found 1-bit tristate buffer for signal <A<19>>.
+    Found 1-bit register for signal <autoconfig>.
-    Found 1-bit tristate buffer for signal <A<18>>.
+    Found 2-bit comparator less for signal <autoconfig$cmp_lt0000> created at line 217.
-    Found 1-bit tristate buffer for signal <A<17>>.
+    Found 1-bit register for signal <cp>.
-    Found 1-bit tristate buffer for signal <A<16>>.
+    Found 8-bit comparator equal for signal <cp$cmp_eq0000> created at line 227.
-    Found 1-bit tristate buffer for signal <A<15>>.
-    Found 1-bit tristate buffer for signal <A<14>>.
-    Found 1-bit tristate buffer for signal <A<13>>.
-    Found 1-bit tristate buffer for signal <A<12>>.
-    Found 1-bit tristate buffer for signal <A<11>>.
-    Found 1-bit tristate buffer for signal <A<10>>.
-    Found 1-bit tristate buffer for signal <A<9>>.
-    Found 1-bit tristate buffer for signal <A<8>>.
-    Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 184.
-    Found 1-bit register for signal <AS_D0>.
-    Found 1-bit register for signal <AS_D1>.
-    Found 3-bit register for signal <AUTO_CONFIG_Z2_DONE>.
-    Found 3-bit register for signal <AUTO_CONFIG_Z2_DONE_CYCLE>.
-    Found 1-bit register for signal <AUTOCONFIG_Z2_ACCESS>.
-    Found 1-bit register for signal <CP_ACCESS>.
-    Found 8-bit comparator equal for signal <CP_ACCESS$cmp_eq0000> created at line 309.
     Found 8-bit register for signal <CP_BASEADR>.
     Found 1-bit register for signal <CP_RD_S>.
     Found 1-bit register for signal <CP_WE_QUIRK>.
     Found 1-bit register for signal <CP_WE_S>.
-    Found 4-bit register for signal <D_Z2_OUT>.
+    Found 4-bit register for signal <Dout1>.
-    Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 649.
+    Found 3-bit comparator less for signal <Dout1$cmp_lt0000> created at line 381.
-    Found 16-bit register for signal <DQ_DATA>.
+    Found 1-bit register for signal <DS_D>.
-    Found 1-bit register for signal <DQ_SWAP>.
+    Found 1-bit register for signal <ide>.
-    Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 284.
+    Found 8-bit comparator equal for signal <ide$cmp_eq0000> created at line 231.
-    Found 1-bit register for signal <IDE_ACCESS>.
-    Found 8-bit comparator equal for signal <IDE_ACCESS$cmp_eq0000> created at line 316.
     Found 8-bit register for signal <IDE_BASEADR>.
     Found 1-bit register for signal <IDE_ENABLE>.
     Found 1-bit register for signal <IDE_R_S>.
+    Found 1-bit register for signal <IDE_TERM>.
     Found 1-bit register for signal <IDE_W_S>.
-    Found 1-bit register for signal <INT_VECTOR_CYCLE>.
+    Found 1-bit register for signal <lan_adr>.
-    Found 14-bit register for signal <LAN_A_INIT>.
+    Found 1-bit register for signal <lan_adr_sw>.
-    Found 1-bit register for signal <LAN_ACCESS>.
+    Found 8-bit comparator equal for signal <lan_adr_sw$cmp_eq0000> created at line 220.
-    Found 8-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 283.
+    Found 2-bit comparator less for signal <lan_adr_sw$cmp_lt0000> created at line 221.
-    Found 16-bit register for signal <LAN_BASEADR>.
+    Found 8-bit register for signal <LAN_BASEADR>.
     Found 1-bit register for signal <LAN_CS_RST>.
-    Found 16-bit register for signal <LAN_D_INIT>.
     Found 1-bit register for signal <LAN_INT_ENABLE>.
     Found 1-bit register for signal <LAN_IRQ_D0>.
     Found 1-bit register for signal <LAN_IRQ_OUT>.
     Found 1-bit register for signal <LAN_RD_S>.
-    Found 1-bit register for signal <LAN_READY>.
-    Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 406.
-    Found 1-bit register for signal <LAN_SM_RST>.
     Found 1-bit register for signal <LAN_WR_RST>.
     Found 1-bit register for signal <LAN_WRH_S>.
     Found 1-bit register for signal <LAN_WRL_S>.
+    Found 1-bit register for signal <lancp>.
     Found 1-bit register for signal <ROM_OE_S>.
-    Found 3-bit register for signal <SHUT_UP_Z2>.
+    Found 3-bit register for signal <SHUT_UP>.
-    Found 1-bit register for signal <Z3_A_LOW>.
-    Found 14-bit register for signal <Z3_ADR>.
-    Found 32-bit register for signal <Z3_DATA>.
     Summary:
-	inferred   2 Finite State Machine(s).
+	inferred   1 Finite State Machine(s).
-	inferred  61 D-type flip-flop(s).
+	inferred  24 D-type flip-flop(s).
+	inferred   1 Adder/Subtractor(s).
 	inferred   6 Comparator(s).
 	inferred   1 Xor(s).
-	inferred  54 Tristate(s).
+	inferred  38 Tristate(s).
 Unit <LAN_IDE_CP> synthesized.
 
 
@@ -230,19 +186,19 @@ Unit <LAN_IDE_CP> synthesized.
 HDL Synthesis Report
 
 Macro Statistics
-# Registers                                            : 73
+# Adders/Subtractors                                   : 1
- 1-bit register                                        : 64
+ 2-bit adder                                           : 1
- 14-bit register                                       : 2
+# Registers                                            : 32
- 16-bit register                                       : 3
+ 1-bit register                                        : 26
- 3-bit register                                        : 1
+ 2-bit register                                        : 2
  4-bit register                                        : 1
- 8-bit register                                        : 2
+ 8-bit register                                        : 3
 # Comparators                                          : 6
  2-bit comparator less                                 : 2
- 4-bit comparator less                                 : 1
+ 3-bit comparator less                                 : 1
  8-bit comparator equal                                : 3
-# Tristates                                            : 24
+# Tristates                                            : 8
- 1-bit tristate buffer                                 : 22
+ 1-bit tristate buffer                                 : 6
  16-bit tristate buffer                                : 2
 # Xors                                                 : 1
  1-bit xor2                                            : 1
@@ -266,55 +222,16 @@ Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with gray encoding.
  set_commit | 101
  done       | 100
 ------------------------
-Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:4]> with gray encoding.
--------------------------------
- State             | Encoding
--------------------------------
- nop               | 0000
- start_read_upper  | unreached
- wait_read_upper   | 0011
- end_read_upper    | 0101
- start_read_lower  | 0100
- wait_read_lower   | 0010
- end_read_lower    | 1100
- start_write_upper | 0110
- wait_write_upper  | 1101
- end_write_upper   | 1111
- start_write_lower | 0111
- wait_write_lower  | 1110
- end_write_lower   | 1010
- config_rw         | 0001
--------------------------------
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <13>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <12>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <11>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <10>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <9>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <8>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <7>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <5>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <4>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <2>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <1>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <0>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <15>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <14>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <13>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <12>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <7>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <6>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <5>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <3>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <2>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <0>. This FF/Latch will be trimmed during the optimization process.
 
 =========================================================================
 Advanced HDL Synthesis Report
 
 Macro Statistics
-# FSMs                                                 : 2
+# FSMs                                                 : 1
-# Registers                                            : 61
+# Adders/Subtractors                                   : 1
- Flip-Flops                                            : 61
+ 2-bit adder                                           : 1
+# Registers                                            : 24
+ Flip-Flops                                            : 24
 # Comparators                                          : 3
  8-bit comparator equal                                : 3
 
@@ -323,65 +240,11 @@ Macro Statistics
 =========================================================================
 *                         Low Level Synthesis                           *
 =========================================================================
-WARNING:Xst:1293 - FF/Latch <LAN_D_INIT_15> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_14> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_13> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_12> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_7> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_6> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_5> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_3> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_2> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_0> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_13> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_12> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_11> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_10> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_9> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_8> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_7> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_5> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_4> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_2> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_1> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_0> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
-WARNING:Xst:2677 - Node <LAN_BASEADR_7> of sequential type is unconnected in block <LAN_IDE_CP>.
-WARNING:Xst:2677 - Node <LAN_BASEADR_6> of sequential type is unconnected in block <LAN_IDE_CP>.
-WARNING:Xst:2677 - Node <LAN_BASEADR_5> of sequential type is unconnected in block <LAN_IDE_CP>.
-WARNING:Xst:2677 - Node <LAN_BASEADR_4> of sequential type is unconnected in block <LAN_IDE_CP>.
-WARNING:Xst:2677 - Node <LAN_BASEADR_3> of sequential type is unconnected in block <LAN_IDE_CP>.
-WARNING:Xst:2677 - Node <LAN_BASEADR_2> of sequential type is unconnected in block <LAN_IDE_CP>.
-WARNING:Xst:2677 - Node <LAN_BASEADR_1> of sequential type is unconnected in block <LAN_IDE_CP>.
-WARNING:Xst:2677 - Node <LAN_BASEADR_0> of sequential type is unconnected in block <LAN_IDE_CP>.
-INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_8> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_10> <LAN_D_INIT_11> 
-INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_1> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_4> <LAN_D_INIT_9> 
 
 Optimizing unit <LAN_IDE_CP> ...
-  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_CYCLE_0
-  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_CYCLE_1
-  implementation constraint: INIT=s	 : SHUT_UP_Z2_0
-  implementation constraint: INIT=r	 : LAN_INT_ENABLE
-  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_CYCLE_2
-  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_1
-  implementation constraint: INIT=s	 : D_Z2_OUT_0
-  implementation constraint: INIT=s	 : D_Z2_OUT_2
-  implementation constraint: INIT=s	 : LAN_A_INIT_3
-  implementation constraint: INIT=s	 : LAN_A_INIT_6
-  implementation constraint: INIT=s	 : D_Z2_OUT_3
-  implementation constraint: INIT=s	 : D_Z2_OUT_1
-  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_2
-  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_0
-  implementation constraint: INIT=r	 : LAN_D_INIT_1
-  implementation constraint: INIT=r	 : LAN_D_INIT_8
-  implementation constraint: INIT=s	 : SHUT_UP_Z2_1
-  implementation constraint: INIT=s	 : SHUT_UP_Z2_2
-  implementation constraint: INIT=r	 : LAN_RST_SM_FSM_FFd1
-  implementation constraint: INIT=r	 : LAN_RST_SM_FSM_FFd2
   implementation constraint: INIT=r	 : LAN_RST_SM_FSM_FFd3
-  implementation constraint: INIT=r	 : LAN_SM_FSM_FFd1
+  implementation constraint: INIT=r	 : LAN_RST_SM_FSM_FFd2
-  implementation constraint: INIT=r	 : LAN_SM_FSM_FFd2
+  implementation constraint: INIT=r	 : LAN_RST_SM_FSM_FFd1
-  implementation constraint: INIT=r	 : LAN_SM_FSM_FFd3
-  implementation constraint: INIT=r	 : LAN_SM_FSM_FFd4
 
 =========================================================================
 *                           Partition Report                            *
@@ -413,40 +276,40 @@ Design Statistics
 # IOs                              : 113
 
 Cell Usage :
-# BELS                             : 1475
+# BELS                             : 864
-#      AND2                        : 486
+#      AND2                        : 211
 #      AND3                        : 67
-#      AND4                        : 26
+#      AND4                        : 8
-#      AND5                        : 1
+#      AND5                        : 3
 #      AND8                        : 3
 #      GND                         : 1
-#      INV                         : 558
+#      INV                         : 345
-#      OR2                         : 246
+#      OR2                         : 187
-#      OR3                         : 58
+#      OR3                         : 10
-#      OR4                         : 4
+#      OR4                         : 2
-#      XOR2                        : 25
+#      XOR2                        : 27
-# FlipFlops/Latches                : 136
+# FlipFlops/Latches                : 61
-#      FD                          : 4
+#      FD                          : 5
-#      FDC                         : 19
+#      FDC                         : 9
-#      FDCE                        : 10
+#      FDCE                        : 6
-#      FDP                         : 27
+#      FDP                         : 8
-#      FDPE                        : 76
+#      FDPE                        : 33
-# IO Buffers                       : 111
+# IO Buffers                       : 107
-#      IBUF                        : 24
+#      IBUF                        : 36
-#      IOBUFE                      : 48
+#      IOBUFE                      : 32
 #      OBUF                        : 33
 #      OBUFE                       : 6
 =========================================================================
 
 
-Total REAL time to Xst completion: 9.00 secs
+Total REAL time to Xst completion: 3.00 secs
-Total CPU time to Xst completion: 8.50 secs
+Total CPU time to Xst completion: 2.73 secs
  
 --> 
 
-Total memory usage is 4521784 kilobytes
+Total memory usage is 4514352 kilobytes
 
 Number of errors   :    0 (   0 filtered)
-Number of warnings :   59 (   0 filtered)
+Number of warnings :    9 (   0 filtered)
-Number of infos    :   10 (   0 filtered)
+Number of infos    :    1 (   0 filtered)
 

Logic/LAN_IDE_V2/LAN_IDE_CP.vhd

@@ -184,14 +184,14 @@ begin
 	
 	clock_init: process(reset,CLK_EXT)
 	begin
-		if(reset='1')then
+		if(reset='0')then
 			--default values
 			LAN_CS_RST<='0';
 			LAN_WR_RST<='0';						
 			LAN_RST_SM<=nop;
 			LAN_A_INIT<="11"&x"FFF";
 			LAN_D_INIT<= x"0000";
-		elsif(rising_edge(CLK_EXT))then --reset is low!			
+		elsif(rising_edge(CLK_EXT))then --reset is high!			
 			case LAN_RST_SM is
 				when nop=>
 					LAN_CS_RST<='0';
@@ -281,13 +281,13 @@ begin
 		end if;
 	end process ADDRESS_Z3_DECODE;
 	
-	ADDRESS_Z2_DECODE: process(AS,reset)
+	ADDRESS_Z2_DECODE: process(AMIGA_CLK,reset)
 	begin
 		if(reset='0' )then
 			AUTOCONFIG_Z2_ACCESS <= '0';
 			IDE_ACCESS 				<= '0';
 			CP_ACCESS				<= '0'; 
-		elsif(falling_edge(AS))then		
+		elsif(rising_edge(AMIGA_CLK))then		
 			if(A(23 downto 16) = x"E8" and AUTO_CONFIG_Z2_DONE /= "111" and CFIN='0' and LAN_ACCESS = '0')then
 				AUTOCONFIG_Z2_ACCESS 	<= '1';
 			else
@@ -618,7 +618,7 @@ begin
 	-- LAN_CFG	<= "ZZZZ";
 	
 
-	A_LAN(13 downto 0)<=	 LAN_A_INIT(13 downto 0) when reset ='0' else
+	A_LAN(13 downto 0)<=	 LAN_A_INIT(13 downto 0) when LAN_RST_SM/=done else
 								 Z3_ADR(14 downto 2) & Z3_A_LOW when LAN_ACCESS = '1' else
 								 A(12 downto 1)&"00"; 	
 	
@@ -635,9 +635,9 @@ begin
 	A(7 downto 1) <= (others => 'Z');
 
 	--defined lancp signal that matches both LAN and CP addresses
-	DQ <=	LAN_D_INIT 					when reset='0' else
+	DQ <=	LAN_D_INIT 					when LAN_RST_SM/=done else
 			DQ_DATA(15 downto  0)	when RW='0' and FCS='0' and Z3_DS <"1111" and LAN_ACCESS ='1' else
-			D 	when RW='0' and AS='0' and CP_ACCESS ='1' else
+			D(15 downto 8 ) & D(15 downto 8) 	when RW='0' and AS='0' and CP_ACCESS ='1' else
 			D 	when RW='0' and AS='0' and IDE_ACCESS ='1' else
 			(others => 'Z');
 
@@ -669,20 +669,21 @@ begin
 			IDE_ENABLE 	<= '1';
 			IDE_R_S		<= '1';
 			IDE_W_S		<= '1';
-			ROM_OE_S		<= '1';
+			ROM_OE_S	<= '1';
 		elsif rising_edge(CLK_EXT) then			
 			--default values
 			IDE_R_S		<= '1';
 			IDE_W_S		<= '1';
-			ROM_OE_S		<= '1';					
+			ROM_OE_S	<= '1';					
 			if(IDE_ACCESS='1' and AS='0' and DS='0')then
 				if(RW='0')then
 					--the write goes to the hdd!
 					IDE_ENABLE  <= '0'; -- enable IDE on first read
 					IDE_W_S		<= '0';	
+				elsif(IDE_ENABLE ='1')then
+					ROM_OE_S <='0';
 				else
-					IDE_R_S		<= IDE_ENABLE; --read from IDE instead from ROM
+					IDE_R_S		<= '0'; --read from IDE instead from ROM					
-					ROM_OE_S	<=	not IDE_ENABLE;						
 				end if;	
 			end if;				
 		end if;

Logic/LAN_IDE_V2/LAN_IDEz2v2.gise

@@ -38,6 +38,7 @@
     <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.rpt"/>
     <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="LAN_IDE_CP.stx"/>
     <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="LAN_IDE_CP.syr"/>
+    <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.tim"/>
     <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.tspec"/>
     <file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VM6" xil_pn:name="LAN_IDE_CP.vm6"/>
     <file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.xml"/>
@@ -67,12 +68,10 @@
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
     </transform>
-    <transform xil_pn:end_ts="1545595558" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="1235887333676579674" xil_pn:start_ts="1545595546">
+    <transform xil_pn:end_ts="1627599937" xil_pn:in_ck="-8368315473908605201" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="-5742752562858310575" xil_pn:start_ts="1627599932">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="WarningsGenerated"/>
       <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForInputs"/>
-      <status xil_pn:value="OutOfDateForProperties"/>
       <outfile xil_pn:name="LAN_IDE_CP.lso"/>
       <outfile xil_pn:name="LAN_IDE_CP.ngc"/>
       <outfile xil_pn:name="LAN_IDE_CP.ngr"/>
@@ -86,32 +85,30 @@
       <outfile xil_pn:name="webtalk_pn.xml"/>
       <outfile xil_pn:name="xst"/>
     </transform>
-    <transform xil_pn:end_ts="1545079613" xil_pn:in_ck="176569500195729039" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-8537920303570934858" xil_pn:start_ts="1545079613">
+    <transform xil_pn:end_ts="1602102352" xil_pn:in_ck="176569500195729039" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-8537920303570934858" xil_pn:start_ts="1602102352">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
     </transform>
-    <transform xil_pn:end_ts="1545595565" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1545595558">
+    <transform xil_pn:end_ts="1627599940" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1627599937">
       <status xil_pn:value="SuccessfullyRun"/>
-      <status xil_pn:value="WarningsGenerated"/>
       <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
       <outfile xil_pn:name="LAN_IDE_CP.bld"/>
       <outfile xil_pn:name="LAN_IDE_CP.ngd"/>
       <outfile xil_pn:name="LAN_IDE_CP_ngdbuild.xrpt"/>
       <outfile xil_pn:name="_ngo"/>
       <outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
     </transform>
-    <transform xil_pn:end_ts="1545595609" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-1014768965495450326" xil_pn:start_ts="1545595565">
+    <transform xil_pn:end_ts="1627599963" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-9118991997326562509" xil_pn:start_ts="1627599940">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="WarningsGenerated"/>
       <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
       <outfile xil_pn:name="LAN_IDE_CP.gyd"/>
       <outfile xil_pn:name="LAN_IDE_CP.mfd"/>
       <outfile xil_pn:name="LAN_IDE_CP.nga"/>
       <outfile xil_pn:name="LAN_IDE_CP.pad"/>
       <outfile xil_pn:name="LAN_IDE_CP.pnx"/>
       <outfile xil_pn:name="LAN_IDE_CP.rpt"/>
+      <outfile xil_pn:name="LAN_IDE_CP.tim"/>
       <outfile xil_pn:name="LAN_IDE_CP.tspec"/>
       <outfile xil_pn:name="LAN_IDE_CP.vm6"/>
       <outfile xil_pn:name="LAN_IDE_CP.xml"/>
@@ -119,30 +116,31 @@
       <outfile xil_pn:name="LAN_IDE_CP_html"/>
       <outfile xil_pn:name="LAN_IDE_CP_pad.csv"/>
     </transform>
-    <transform xil_pn:end_ts="1545595612" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1545595609">
+    <transform xil_pn:end_ts="1627600386" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1627600384">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
       <outfile xil_pn:name="LAN_IDE_CP.jed"/>
     </transform>
-    <transform xil_pn:end_ts="1545129218" xil_pn:in_ck="-2520376148396285089" xil_pn:name="TRAN_impactProgrammingTool_CPLD" xil_pn:prop_ck="-3598488201878296819" xil_pn:start_ts="1545129218">
+    <transform xil_pn:end_ts="1627596356" xil_pn:in_ck="-2520376148396285089" xil_pn:name="TRAN_impactProgrammingTool_CPLD" xil_pn:prop_ck="4303234622024928597" xil_pn:start_ts="1627596356">
-      <status xil_pn:value="AbortedRun"/>
-      <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForInputs"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
-      <status xil_pn:value="OutOfDateForced"/>
-      <status xil_pn:value="InputChanged"/>
-    </transform>
-    <transform xil_pn:end_ts="1545595676" xil_pn:in_ck="-2520376148396285089" xil_pn:name="TRAN_configureTargetDevice_CPLD" xil_pn:prop_ck="-154879694275837835" xil_pn:start_ts="1545595673">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
+      <status xil_pn:value="OutOfDateForInputs"/>
+      <status xil_pn:value="InputAdded"/>
+      <status xil_pn:value="InputChanged"/>
+      <status xil_pn:value="InputRemoved"/>
+    </transform>
+    <transform xil_pn:end_ts="1602273582" xil_pn:in_ck="-2520376148396285089" xil_pn:name="TRAN_configureTargetDevice_CPLD" xil_pn:prop_ck="-1422570904406943683" xil_pn:start_ts="1602273581">
+      <status xil_pn:value="SuccessfullyRun"/>
+      <status xil_pn:value="ReadyToRun"/>
+      <status xil_pn:value="OutOfDateForInputs"/>
+      <status xil_pn:value="InputAdded"/>
+      <status xil_pn:value="InputChanged"/>
+      <status xil_pn:value="InputRemoved"/>
     </transform>
     <transform xil_pn:name="TRAN_timRpt">
       <status xil_pn:value="AbortedRun"/>
       <status xil_pn:value="ReadyToRun"/>
       <status xil_pn:value="OutOfDateForInputs"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
       <status xil_pn:value="InputAdded"/>
       <status xil_pn:value="InputChanged"/>
     </transform>

Logic/LAN_IDE_V2/LAN_IDEz2v2.xise

@@ -44,7 +44,7 @@
     <property xil_pn:name="Case Implementation Style" xil_pn:value="None" xil_pn:valueState="default"/>
     <property xil_pn:name="Clock Enable" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Collapsing Input Limit (2-54)" xil_pn:value="54" xil_pn:valueState="default"/>
-    <property xil_pn:name="Collapsing Pterm Limit (1-90)" xil_pn:value="25" xil_pn:valueState="default"/>
+    <property xil_pn:name="Collapsing Pterm Limit (1-90)" xil_pn:value="50" xil_pn:valueState="default"/>
     <property xil_pn:name="Compile CPLD Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Compile SIMPRIM (Timing) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Compile UNISIM (Functional) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
@@ -63,7 +63,7 @@
     <property xil_pn:name="Equivalent Register Removal XST" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Evaluation Development Board" xil_pn:value="None Specified" xil_pn:valueState="default"/>
     <property xil_pn:name="Exhaustive Fit Mode" xil_pn:value="false" xil_pn:valueState="default"/>
-    <property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Compact" xil_pn:valueState="non-default" xil_pn:x_locked="true"/>
+    <property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Gray" xil_pn:valueState="non-default"/>
     <property xil_pn:name="Filter Files From Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Functional Model Target Language ArchWiz" xil_pn:value="VHDL" xil_pn:valueState="default"/>
     <property xil_pn:name="Functional Model Target Language Coregen" xil_pn:value="VHDL" xil_pn:valueState="default"/>
@@ -81,7 +81,7 @@
     <property xil_pn:name="Hierarchy Separator" xil_pn:value="/" xil_pn:valueState="default"/>
     <property xil_pn:name="I/O Pin Termination" xil_pn:value="Keeper" xil_pn:valueState="default"/>
     <property xil_pn:name="ISim UUT Instance Name" xil_pn:value="UUT" xil_pn:valueState="default"/>
-    <property xil_pn:name="Implementation Template" xil_pn:value="Optimize Balance" xil_pn:valueState="default"/>
+    <property xil_pn:name="Implementation Template" xil_pn:value="Optimize Speed" xil_pn:valueState="non-default"/>
     <property xil_pn:name="Implementation Top" xil_pn:value="Architecture|LAN_IDE_CP|Behavioral" xil_pn:valueState="non-default"/>
     <property xil_pn:name="Implementation Top File" xil_pn:value="LAN_IDE_CP-Z2v2.vhd" xil_pn:valueState="non-default"/>
     <property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/LAN_IDE_CP" xil_pn:valueState="non-default"/>
@@ -111,8 +111,8 @@
     <property xil_pn:name="Mux Extraction" xil_pn:value="Yes" xil_pn:valueState="default"/>
     <property xil_pn:name="Netlist Hierarchy" xil_pn:value="As Optimized" xil_pn:valueState="default"/>
     <property xil_pn:name="Number of Clock Buffers" xil_pn:value="4" xil_pn:valueState="default"/>
-    <property xil_pn:name="Optimization Effort" xil_pn:value="Normal" xil_pn:valueState="default"/>
+    <property xil_pn:name="Optimization Effort" xil_pn:value="High" xil_pn:valueState="non-default"/>
-    <property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default" xil_pn:x_locked="true"/>
+    <property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default"/>
     <property xil_pn:name="Other CPLD Fitter Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
     <property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/>
     <property xil_pn:name="Other Compiler Options Fit" xil_pn:value="" xil_pn:valueState="default"/>
@@ -155,7 +155,7 @@
     <property xil_pn:name="Run for Specified Time Map" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Run for Specified Time Par" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Run for Specified Time Translate" xil_pn:value="true" xil_pn:valueState="default"/>
-    <property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default" xil_pn:x_locked="true"/>
+    <property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default"/>
     <property xil_pn:name="Selected Module Instance Name" xil_pn:value="" xil_pn:valueState="default"/>
     <property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="" xil_pn:valueState="default"/>
     <property xil_pn:name="Selected Simulation Root Source Node Post-Map" xil_pn:value="" xil_pn:valueState="default"/>
@@ -209,6 +209,7 @@
     <property xil_pn:name="WYSIWYG" xil_pn:value="None" xil_pn:valueState="default"/>
     <property xil_pn:name="Working Directory" xil_pn:value="." xil_pn:valueState="non-default"/>
     <property xil_pn:name="XOR Preserve" xil_pn:value="true" xil_pn:valueState="default"/>
+    <property xil_pn:name="iMPACT Project File" xil_pn:value="ZORO_LAN_IDE_Z2.ipf" xil_pn:valueState="non-default"/>
     <!--                                                                                  -->
     <!-- The following properties are for internal use only. These should not be modified.-->
     <!--                                                                                  -->

Logic/LAN_IDE_V2/LAN_IDEz3v2.gise

@@ -68,7 +68,7 @@
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
     </transform>
-    <transform xil_pn:end_ts="1574202935" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="-5742752562858310575" xil_pn:start_ts="1574202924">
+    <transform xil_pn:end_ts="1627599635" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="-3349216317285734750" xil_pn:start_ts="1627599630">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="WarningsGenerated"/>
       <status xil_pn:value="ReadyToRun"/>
@@ -89,7 +89,7 @@
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
     </transform>
-    <transform xil_pn:end_ts="1574202943" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1574202935">
+    <transform xil_pn:end_ts="1627599638" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1627599635">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
       <outfile xil_pn:name="LAN_IDE_CP.bld"/>
@@ -98,7 +98,7 @@
       <outfile xil_pn:name="_ngo"/>
       <outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
     </transform>
-    <transform xil_pn:end_ts="1574202972" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-1014768965495450326" xil_pn:start_ts="1574202943">
+    <transform xil_pn:end_ts="1627599673" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="591735173758053258" xil_pn:start_ts="1627599638">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="WarningsGenerated"/>
       <status xil_pn:value="ReadyToRun"/>
@@ -116,7 +116,7 @@
       <outfile xil_pn:name="LAN_IDE_CP_html"/>
       <outfile xil_pn:name="LAN_IDE_CP_pad.csv"/>
     </transform>
-    <transform xil_pn:end_ts="1574202975" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1574202972">
+    <transform xil_pn:end_ts="1627599675" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1627599673">
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
       <outfile xil_pn:name="LAN_IDE_CP.jed"/>
@@ -125,7 +125,9 @@
       <status xil_pn:value="SuccessfullyRun"/>
       <status xil_pn:value="ReadyToRun"/>
       <status xil_pn:value="OutOfDateForInputs"/>
+      <status xil_pn:value="InputAdded"/>
       <status xil_pn:value="InputChanged"/>
+      <status xil_pn:value="InputRemoved"/>
     </transform>
     <transform xil_pn:end_ts="1558897401" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRAN_timRpt" xil_pn:prop_ck="111903974446" xil_pn:start_ts="1558897398">
       <status xil_pn:value="AbortedRun"/>

Logic/LAN_IDE_V2/LAN_IDEz3v2.xise

@@ -44,7 +44,7 @@
     <property xil_pn:name="Case Implementation Style" xil_pn:value="None" xil_pn:valueState="default"/>
     <property xil_pn:name="Clock Enable" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Collapsing Input Limit (2-54)" xil_pn:value="54" xil_pn:valueState="default"/>
-    <property xil_pn:name="Collapsing Pterm Limit (1-90)" xil_pn:value="25" xil_pn:valueState="default"/>
+    <property xil_pn:name="Collapsing Pterm Limit (1-90)" xil_pn:value="90" xil_pn:valueState="default"/>
     <property xil_pn:name="Compile CPLD Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Compile SIMPRIM (Timing) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Compile UNISIM (Functional) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
@@ -62,8 +62,8 @@
     <property xil_pn:name="Enable Message Filtering" xil_pn:value="false" xil_pn:valueState="default"/>
     <property xil_pn:name="Equivalent Register Removal XST" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Evaluation Development Board" xil_pn:value="None Specified" xil_pn:valueState="default"/>
-    <property xil_pn:name="Exhaustive Fit Mode" xil_pn:value="false" xil_pn:valueState="default"/>
+    <property xil_pn:name="Exhaustive Fit Mode" xil_pn:value="true" xil_pn:valueState="non-default"/>
-    <property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Gray" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Sequential" xil_pn:valueState="non-default"/>
     <property xil_pn:name="Filter Files From Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Functional Model Target Language ArchWiz" xil_pn:value="VHDL" xil_pn:valueState="default"/>
     <property xil_pn:name="Functional Model Target Language Coregen" xil_pn:value="VHDL" xil_pn:valueState="default"/>
@@ -81,7 +81,7 @@
     <property xil_pn:name="Hierarchy Separator" xil_pn:value="/" xil_pn:valueState="default"/>
     <property xil_pn:name="I/O Pin Termination" xil_pn:value="Keeper" xil_pn:valueState="default"/>
     <property xil_pn:name="ISim UUT Instance Name" xil_pn:value="UUT" xil_pn:valueState="default"/>
-    <property xil_pn:name="Implementation Template" xil_pn:value="Optimize Balance" xil_pn:valueState="default"/>
+    <property xil_pn:name="Implementation Template" xil_pn:value="Optimize Density" xil_pn:valueState="non-default"/>
     <property xil_pn:name="Implementation Top" xil_pn:value="Architecture|LAN_IDE_CP|Behavioral" xil_pn:valueState="non-default"/>
     <property xil_pn:name="Implementation Top File" xil_pn:value="LAN_IDE_CP.vhd" xil_pn:valueState="non-default"/>
     <property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/LAN_IDE_CP" xil_pn:valueState="non-default"/>
@@ -101,7 +101,7 @@
     <property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
     <property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/>
-    <property xil_pn:name="Logic Optimization" xil_pn:value="Speed" xil_pn:valueState="default"/>
+    <property xil_pn:name="Logic Optimization" xil_pn:value="Density" xil_pn:valueState="default"/>
     <property xil_pn:name="Macro Preserve" xil_pn:value="true" xil_pn:valueState="default"/>
     <property xil_pn:name="Macrocell Power Setting" xil_pn:value="Std" xil_pn:valueState="default"/>
     <property xil_pn:name="Manual Implementation Compile Order" xil_pn:value="false" xil_pn:valueState="default"/>
@@ -111,7 +111,7 @@
     <property xil_pn:name="Mux Extraction" xil_pn:value="Yes" xil_pn:valueState="default"/>
     <property xil_pn:name="Netlist Hierarchy" xil_pn:value="As Optimized" xil_pn:valueState="default"/>
     <property xil_pn:name="Number of Clock Buffers" xil_pn:value="4" xil_pn:valueState="default"/>
-    <property xil_pn:name="Optimization Effort" xil_pn:value="High" xil_pn:valueState="non-default"/>
+    <property xil_pn:name="Optimization Effort" xil_pn:value="Normal" xil_pn:valueState="default"/>
     <property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default"/>
     <property xil_pn:name="Other CPLD Fitter Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
     <property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/>

Logic/LAN_IDE_V2/iseconfig/LAN_IDE_CP.xreport

@@ -1,9 +1,9 @@
 <?xml version='1.0' encoding='UTF-8'?>
 <report-views version="2.0" >
  <header>
-  <DateModified>2019-11-15T00:18:39</DateModified>
+  <DateModified>2021-07-30T00:50:53</DateModified>
   <ModuleName>LAN_IDE_CP</ModuleName>
-  <SummaryTimeStamp>Unknown</SummaryTimeStamp>
+  <SummaryTimeStamp>2021-07-30T00:26:13</SummaryTimeStamp>
   <SavedFilePath>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/iseconfig/LAN_IDE_CP.xreport</SavedFilePath>
   <ImplementationReportsDirectory>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2\</ImplementationReportsDirectory>
   <DateInitialized>2019-01-09T22:34:04</DateInitialized>

Logic/LAN_IDE_V2/iseconfig/LAN_IDEz2v2.projectmgr

@@ -21,17 +21,17 @@
       <ClosedNodes>
          <ClosedNodesVersion>1</ClosedNodesVersion>
          <ClosedNode>Design Utilities</ClosedNode>
-         <ClosedNode>Implement Design</ClosedNode>
+         <ClosedNode>Implement Design/Optional Implementation Tools</ClosedNode>
-         <ClosedNode>User Constraints</ClosedNode>
+         <ClosedNode>Implement Design/Synthesize - XST</ClosedNode>
       </ClosedNodes>
       <SelectedItems>
-         <SelectedItem></SelectedItem>
+         <SelectedItem>Generate Programming File</SelectedItem>
       </SelectedItems>
       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
-      <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000001b0000000010000000100000000000000000000000064ffffffff000000810000000000000001000001b00000000100000000</ViewHeaderState>
+      <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000000000000000000218000000010000000100000000000000000000000064ffffffff000000810000000000000001000002180000000100000000</ViewHeaderState>
       <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
-      <CurrentItem></CurrentItem>
+      <CurrentItem>Generate Programming File</CurrentItem>
    </ItemView>
    <ItemView guiview="File" >
       <ClosedNodes>
@@ -68,7 +68,7 @@
       </SelectedItems>
       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
-      <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000f8000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f80000000100000000</ViewHeaderState>
+      <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000d6000000010000000100000000000000000000000064ffffffff000000810000000000000001000000d60000000100000000</ViewHeaderState>
       <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
       <CurrentItem/>
    </ItemView>
@@ -76,10 +76,12 @@
       <ClosedNodes>
          <ClosedNodesVersion>1</ClosedNodesVersion>
       </ClosedNodes>
-      <SelectedItems/>
+      <SelectedItems>
+         <SelectedItem/>
+      </SelectedItems>
       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
-      <ViewHeaderState orientation="horizontal" />
+      <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000d6000000010000000100000000000000000000000064ffffffff000000810000000000000001000000d60000000100000000</ViewHeaderState>
       <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
       <CurrentItem/>
    </ItemView>

Logic/LAN_IDE_V2/iseconfig/LAN_IDEz3v2.projectmgr

@@ -26,13 +26,13 @@
          <ClosedNode>User Constraints</ClosedNode>
       </ClosedNodes>
       <SelectedItems>
-         <SelectedItem></SelectedItem>
+         <SelectedItem>Generate Programming File</SelectedItem>
       </SelectedItems>
       <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
       <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
-      <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000001b0000000010000000100000000000000000000000064ffffffff000000810000000000000001000001b00000000100000000</ViewHeaderState>
+      <ViewHeaderState orientation="horizontal" >000000ff00000000000000010000000100000000000000000000000000000000000000000000000218000000010000000100000000000000000000000064ffffffff000000810000000000000001000002180000000100000000</ViewHeaderState>
       <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
-      <CurrentItem></CurrentItem>
+      <CurrentItem>Generate Programming File</CurrentItem>
    </ItemView>
    <ItemView guiview="File" >
       <ClosedNodes>

Logic/LAN_IDE_V2/pinlist.ucf

@@ -74,11 +74,9 @@ NET "DQ<14>"  LOC = "P131"  ;
 NET "DQ<15>"  LOC = "P112"  ;
 NET "DQ<1>"  LOC = "P117"  ;
 NET "DQ<2>"  LOC = "P120"  ;
-//NET "DQ<2>"  LOC = "P68"  ; //fix for broken Xilinx
 NET "DQ<3>"  LOC = "P119"  ;
 NET "DQ<4>"  LOC = "P124"  ;
 NET "DQ<5>"  LOC = "P121"  ;
-//NET "DQ<5>"  LOC = "P38"  ;//fix for broken Xilinx
 NET "DQ<6>"  LOC = "P126"  ;
 NET "DQ<7>"  LOC = "P125"  ;
 NET "DQ<8>"  LOC = "P128"  ;
@@ -112,7 +110,7 @@ NET "MTCR"  LOC = "P101"  ;
 NET "OVR"  LOC = "P100"  ; 
 NET "OWN"  LOC = "P107"  ; 
 NET "RESET"  LOC = "P143"  ;
-NET "ROM_B<0>"  LOC = "P68"  ;//comment if fix for broken Xilinx!
+NET "ROM_B<0>"  LOC = "P68"  ;
 NET "ROM_B<1>"  LOC = "P69"  ;
 NET "ROM_OE"  LOC = "P35"  ;
 NET "RW"  LOC = "P83"  ;

PCB/ZORRO-LAN-IDE-CP-V2F.brd

@@ -8092,7 +8092,7 @@ Sollten andere Lagen belegt und relevant sein, so teilen Sie uns dies bitte expl
 <wire x1="73.457221875" y1="66.142675" x2="73.457221875" y2="65.561984375" width="0.254" layer="1"/>
 <wire x1="73.457221875" y1="65.561984375" x2="73.992221875" y2="65.026984375" width="0.254" layer="1"/>
 </signal>
-<signal name="AUTO_BOOT_OFF">
+<signal name="IDE_OFF">
 <contactref element="IDE_OFF" pad="2"/>
 <contactref element="R5" pad="2"/>
 <contactref element="IC2" pad="75"/>

PCB/ZORRO-LAN-IDE-CP-V2F.sch

@@ -8,34 +8,34 @@
 </settings>
 <grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>
 <layers>
-<layer number="1" name="Top" color="4" fill="1" visible="yes" active="no"/>
+<layer number="1" name="Top" color="4" fill="1" visible="no" active="no"/>
-<layer number="2" name="Route2" color="1" fill="3" visible="yes" active="no"/>
+<layer number="2" name="Route2" color="1" fill="3" visible="no" active="no"/>
-<layer number="3" name="Route3" color="4" fill="3" visible="yes" active="no"/>
+<layer number="3" name="Route3" color="4" fill="3" visible="no" active="no"/>
-<layer number="4" name="Route4" color="1" fill="4" visible="yes" active="no"/>
+<layer number="4" name="Route4" color="1" fill="4" visible="no" active="no"/>
-<layer number="5" name="Route5" color="4" fill="4" visible="yes" active="no"/>
+<layer number="5" name="Route5" color="4" fill="4" visible="no" active="no"/>
-<layer number="6" name="Route6" color="1" fill="8" visible="yes" active="no"/>
+<layer number="6" name="Route6" color="1" fill="8" visible="no" active="no"/>
-<layer number="7" name="Route7" color="4" fill="8" visible="yes" active="no"/>
+<layer number="7" name="Route7" color="4" fill="8" visible="no" active="no"/>
-<layer number="8" name="Route8" color="1" fill="2" visible="yes" active="no"/>
+<layer number="8" name="Route8" color="1" fill="2" visible="no" active="no"/>
-<layer number="9" name="Route9" color="4" fill="2" visible="yes" active="no"/>
+<layer number="9" name="Route9" color="4" fill="2" visible="no" active="no"/>
-<layer number="10" name="Route10" color="1" fill="7" visible="yes" active="no"/>
+<layer number="10" name="Route10" color="1" fill="7" visible="no" active="no"/>
-<layer number="11" name="Route11" color="4" fill="7" visible="yes" active="no"/>
+<layer number="11" name="Route11" color="4" fill="7" visible="no" active="no"/>
-<layer number="12" name="Route12" color="1" fill="5" visible="yes" active="no"/>
+<layer number="12" name="Route12" color="1" fill="5" visible="no" active="no"/>
-<layer number="13" name="Route13" color="4" fill="5" visible="yes" active="no"/>
+<layer number="13" name="Route13" color="4" fill="5" visible="no" active="no"/>
-<layer number="14" name="Route14" color="1" fill="6" visible="yes" active="no"/>
+<layer number="14" name="Route14" color="1" fill="6" visible="no" active="no"/>
-<layer number="15" name="Route15" color="4" fill="6" visible="yes" active="no"/>
+<layer number="15" name="Route15" color="4" fill="6" visible="no" active="no"/>
-<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="no"/>
+<layer number="16" name="Bottom" color="1" fill="1" visible="no" active="no"/>
-<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="no"/>
+<layer number="17" name="Pads" color="2" fill="1" visible="no" active="no"/>
-<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="no"/>
+<layer number="18" name="Vias" color="2" fill="1" visible="no" active="no"/>
-<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="no"/>
+<layer number="19" name="Unrouted" color="6" fill="1" visible="no" active="no"/>
-<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="no"/>
+<layer number="20" name="Dimension" color="15" fill="1" visible="no" active="no"/>
-<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="no"/>
+<layer number="21" name="tPlace" color="7" fill="1" visible="no" active="no"/>
-<layer number="22" name="bPlace" color="7" fill="1" visible="yes" active="no"/>
+<layer number="22" name="bPlace" color="7" fill="1" visible="no" active="no"/>
-<layer number="23" name="tOrigins" color="15" fill="1" visible="yes" active="no"/>
+<layer number="23" name="tOrigins" color="15" fill="1" visible="no" active="no"/>
-<layer number="24" name="bOrigins" color="15" fill="1" visible="yes" active="no"/>
+<layer number="24" name="bOrigins" color="15" fill="1" visible="no" active="no"/>
-<layer number="25" name="tNames" color="7" fill="1" visible="yes" active="no"/>
+<layer number="25" name="tNames" color="7" fill="1" visible="no" active="no"/>
-<layer number="26" name="bNames" color="7" fill="1" visible="yes" active="no"/>
+<layer number="26" name="bNames" color="7" fill="1" visible="no" active="no"/>
-<layer number="27" name="tValues" color="7" fill="1" visible="yes" active="no"/>
+<layer number="27" name="tValues" color="7" fill="1" visible="no" active="no"/>
-<layer number="28" name="bValues" color="7" fill="1" visible="yes" active="no"/>
+<layer number="28" name="bValues" color="7" fill="1" visible="no" active="no"/>
 <layer number="29" name="tStop" color="7" fill="3" visible="no" active="no"/>
 <layer number="30" name="bStop" color="7" fill="6" visible="no" active="no"/>
 <layer number="31" name="tCream" color="7" fill="4" visible="no" active="no"/>
@@ -44,8 +44,8 @@
 <layer number="34" name="bFinish" color="6" fill="6" visible="no" active="no"/>
 <layer number="35" name="tGlue" color="7" fill="4" visible="no" active="no"/>
 <layer number="36" name="bGlue" color="7" fill="5" visible="no" active="no"/>
-<layer number="37" name="tTest" color="7" fill="1" visible="yes" active="no"/>
+<layer number="37" name="tTest" color="7" fill="1" visible="no" active="no"/>
-<layer number="38" name="bTest" color="7" fill="1" visible="yes" active="no"/>
+<layer number="38" name="bTest" color="7" fill="1" visible="no" active="no"/>
 <layer number="39" name="tKeepout" color="4" fill="11" visible="no" active="no"/>
 <layer number="40" name="bKeepout" color="1" fill="11" visible="no" active="no"/>
 <layer number="41" name="tRestrict" color="4" fill="10" visible="no" active="no"/>
@@ -53,16 +53,16 @@
 <layer number="43" name="vRestrict" color="2" fill="10" visible="no" active="no"/>
 <layer number="44" name="Drills" color="7" fill="1" visible="no" active="no"/>
 <layer number="45" name="Holes" color="7" fill="1" visible="no" active="no"/>
-<layer number="46" name="Milling" color="3" fill="1" visible="yes" active="no"/>
+<layer number="46" name="Milling" color="3" fill="1" visible="no" active="no"/>
-<layer number="47" name="Measures" color="7" fill="1" visible="yes" active="no"/>
+<layer number="47" name="Measures" color="7" fill="1" visible="no" active="no"/>
-<layer number="48" name="Document" color="7" fill="1" visible="yes" active="no"/>
+<layer number="48" name="Document" color="7" fill="1" visible="no" active="no"/>
-<layer number="49" name="Reference" color="7" fill="1" visible="yes" active="no"/>
+<layer number="49" name="Reference" color="7" fill="1" visible="no" active="no"/>
-<layer number="50" name="dxf" color="7" fill="1" visible="yes" active="no"/>
+<layer number="50" name="dxf" color="7" fill="1" visible="no" active="no"/>
-<layer number="51" name="tDocu" color="7" fill="1" visible="yes" active="no"/>
+<layer number="51" name="tDocu" color="7" fill="1" visible="no" active="no"/>
-<layer number="52" name="bDocu" color="7" fill="1" visible="yes" active="no"/>
+<layer number="52" name="bDocu" color="7" fill="1" visible="no" active="no"/>
-<layer number="53" name="tGND_GNDA" color="7" fill="1" visible="yes" active="no"/>
+<layer number="53" name="tGND_GNDA" color="7" fill="1" visible="no" active="no"/>
-<layer number="54" name="bGND_GNDA" color="7" fill="1" visible="yes" active="no"/>
+<layer number="54" name="bGND_GNDA" color="7" fill="1" visible="no" active="no"/>
-<layer number="56" name="wert" color="7" fill="1" visible="yes" active="no"/>
+<layer number="56" name="wert" color="7" fill="1" visible="no" active="no"/>
 <layer number="91" name="Nets" color="2" fill="1" visible="yes" active="yes"/>
 <layer number="92" name="Busses" color="1" fill="1" visible="yes" active="yes"/>
 <layer number="93" name="Pins" color="2" fill="1" visible="no" active="yes"/>
@@ -15008,11 +15008,15 @@ Low profile connectors, straight&lt;p&gt;
 <label x="129.54" y="119.38" size="1.27" layer="95" rot="R180"/>
 </segment>
 </net>
-<net name="AUTO_BOOT_OFF" class="0">
+<net name="IDE_OFF" class="0">
 <segment>
 <pinref part="IDE_OFF" gate="A" pin="2"/>
 <pinref part="R5" gate="G$1" pin="2"/>
 <wire x1="119.38" y1="121.92" x2="119.38" y2="119.38" width="0.1524" layer="91"/>
+<label x="124.46" y="111.76" size="1.778" layer="95" rot="R270"/>
+<wire x1="119.38" y1="119.38" x2="124.46" y2="119.38" width="0.1524" layer="91"/>
+<wire x1="124.46" y1="119.38" x2="124.46" y2="111.76" width="0.1524" layer="91"/>
+<junction x="119.38" y="119.38"/>
 </segment>
 </net>
 <net name="N$42" class="0">
@@ -15408,7 +15412,9 @@ Low profile connectors, straight&lt;p&gt;
 <pinref part="R1" gate="G$1" pin="2"/>
 <pinref part="AUTOBOOT_ON" gate="A" pin="2"/>
 <wire x1="119.38" y1="81.28" x2="119.38" y2="83.82" width="0.1524" layer="91"/>
-<label x="119.38" y="81.28" size="1.778" layer="95"/>
+<label x="127" y="81.28" size="1.778" layer="95"/>
+<wire x1="119.38" y1="81.28" x2="127" y2="81.28" width="0.1524" layer="91"/>
+<junction x="119.38" y="81.28"/>
 </segment>
 </net>
 <net name="DOE" class="0">
@@ -16298,7 +16304,7 @@ Low profile connectors, straight&lt;p&gt;
 <label x="147.32" y="45.72" size="1.27" layer="95"/>
 </segment>
 </net>
-<net name="AUTO_BOOT_OFF" class="0">
+<net name="IDE_OFF" class="0">
 <segment>
 <pinref part="IC2" gate="G$1" pin="P$75-FB13MC11"/>
 <wire x1="144.78" y1="48.26" x2="147.32" y2="48.26" width="0.1524" layer="91"/>