Dominick.Vansevenant/Zorro-LAN-IDE
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Start of reintegration IDE/CP AutoConfig works

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This commit is contained in:
MHeinrichs
2019-01-02 22:12:35 +01:00
parent ace45ad182
commit d11d1c5b27
33 changed files with 18078 additions and 12690 deletions
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Logic/LAN_IDE/LAN_IDE.gise
+4 -5
View File
@@ -63,7 +63,7 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1546423170" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="7640553560667877824" xil_pn:start_ts="1546423159">
<transform xil_pn:end_ts="1546445571" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="-4464240118715262847" xil_pn:start_ts="1546445559">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
@@ -84,9 +84,8 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1546423178" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1546423170">
<transform xil_pn:end_ts="1546445578" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1546445571">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="LAN_IDE_CP.bld"/>
<outfile xil_pn:name="LAN_IDE_CP.ngd"/>
@@ -94,7 +93,7 @@
<outfile xil_pn:name="_ngo"/>
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
</transform>
<transform xil_pn:end_ts="1546423207" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-1014768965495450326" xil_pn:start_ts="1546423178">
<transform xil_pn:end_ts="1546445619" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-1014768965495450326" xil_pn:start_ts="1546445578">
<status xil_pn:value="FailedRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
@@ -102,7 +101,7 @@
<outfile xil_pn:name="LAN_IDE_CP.tspec"/>
<outfile xil_pn:name="LAN_IDE_CP_html"/>
</transform>
<transform xil_pn:end_ts="1546385347" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1546385345">
<transform xil_pn:end_ts="1546443901" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1546443899">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForInputs"/>
Logic/LAN_IDE/LAN_IDE.xise
+1 -1
View File
@@ -63,7 +63,7 @@
<property xil_pn:name="Equivalent Register Removal XST" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Evaluation Development Board" xil_pn:value="None Specified" xil_pn:valueState="default"/>
<property xil_pn:name="Exhaustive Fit Mode" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Auto" xil_pn:valueState="default"/>
<property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="One-Hot" xil_pn:valueState="non-default"/>
<property xil_pn:name="Filter Files From Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Functional Model Target Language ArchWiz" xil_pn:value="VHDL" xil_pn:valueState="default"/>
<property xil_pn:name="Functional Model Target Language Coregen" xil_pn:value="VHDL" xil_pn:valueState="default"/>
Logic/LAN_IDE/LAN_IDE.zip
BIN
View File
Binary file not shown.
Logic/LAN_IDE/LAN_IDE_CP.bld
+3 -4
View File
@@ -17,7 +17,6 @@ Checking Constraint Associations...
Done...
Checking expanded design ...
WARNING:NgdBuild:470 - bidirect pad net 'A<1>' has no legal driver
Partition Implementation Status
-------------------------------
@@ -28,12 +27,12 @@ Partition Implementation Status
NGDBUILD Design Results Summary:
Number of errors: 0
Number of warnings: 1
Number of warnings: 0
Total memory usage is 4418728 kilobytes
Total memory usage is 4418724 kilobytes
Writing NGD file "LAN_IDE_CP.ngd" ...
Total REAL time to NGDBUILD completion: 5 sec
Total REAL time to NGDBUILD completion: 6 sec
Total CPU time to NGDBUILD completion: 5 sec
Writing NGDBUILD log file "LAN_IDE_CP.bld"...
Logic/LAN_IDE/LAN_IDE_CP.cmd_log
+68
View File
@@ -288,3 +288,71 @@ cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
Logic/LAN_IDE/LAN_IDE_CP.gyd
+90 -90
View File
@@ -1,7 +1,8 @@
Pin Freeze File: version P.20131013
95288XL144 XC95288XL-10-TQ144
AUTOBOOT_OFF S:PIN75
AS S:PIN80
A<1> S:PIN57
A<2> S:PIN54
A<3> S:PIN52
A<4> S:PIN50
@@ -9,6 +10,8 @@ A<5> S:PIN49
A<6> S:PIN51
A<7> S:PIN53
BERR S:PIN98
C1 S:PIN103
C3 S:PIN102
CFIN S:PIN104
CLK_EXT S:PIN30
DS0 S:PIN93
@@ -35,6 +38,9 @@ A_LAN<7> S:PIN10
A_LAN<8> S:PIN140
A_LAN<9> S:PIN142
CFOUT S:PIN105
CP_WE S:PIN70
CP_RD S:PIN71
CP_CS S:PIN34
DQ<0> S:PIN118
DQ<10> S:PIN129
DQ<11> S:PIN115
@@ -67,10 +73,19 @@ D<6> S:PIN14
D<7> S:PIN16
D<8> S:PIN19
D<9> S:PIN40
IDE_A<0> S:PIN24
IDE_A<1> S:PIN26
IDE_A<2> S:PIN25
IDE_CS<0> S:PIN22
IDE_CS<1> S:PIN23
IDE_R S:PIN27
IDE_W S:PIN28
LAN_CS S:PIN133
LAN_RD S:PIN134
LAN_WRH S:PIN132
LAN_WRL S:PIN76
ROM_B<1> S:PIN69
ROM_B<0> S:PIN68
OWN S:PIN107
OVR S:PIN100
MTACK S:PIN96
@@ -81,18 +96,6 @@ LAN_CFG<1> S:PIN12
INT_OUT S:PIN32
DTACK S:PIN85
ROM_OE S:PIN35
ROM_B<1> S:PIN69
ROM_B<0> S:PIN68
CP_RD S:PIN71
CP_CS S:PIN34
IDE_W S:PIN28
IDE_R S:PIN27
IDE_CS<1> S:PIN23
IDE_CS<0> S:PIN22
IDE_A<2> S:PIN25
IDE_A<1> S:PIN26
IDE_A<0> S:PIN24
CP_WE S:PIN70
SLAVE S:PIN106
A<8> S:PIN56
A<9> S:PIN58
@@ -115,86 +118,83 @@ A<23> S:PIN86
;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.
PARTITION FB1_5 D_5_IOBUFE D_4_IOBUFE
PARTITION FB1_8 ROM_B_0_OBUF$BUF5
PARTITION FB1_10 ROM_B_0_OBUF$BUF4
PARTITION FB1_12 ROM_B_0_OBUF$BUF8
PARTITION FB1_14 ROM_B_0_OBUF$BUF6 ROM_B_0_OBUF$BUF7
PARTITION FB1_17 ROM_B_0_OBUF$BUF3
PARTITION FB1_1 $OpTx$FX_DC$16 DQ_5_IOBUFE/DQ_5_IOBUFE_TRST Z3_ADR<9> Z3_ADR<10>
D_5_IOBUFE D_4_IOBUFE IDE_ACCESS IDE_CS_0_OBUF
LAN_ACCESS IDE_CS_1_OBUF IDE_ENABLE IDE_A_0_OBUF$BUF0
D_9_IOBUFE/D_9_IOBUFE_TRST IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0 DQ_SWAP
IDE_R_OBUF LAN_INT_ENABLE
PARTITION FB2_1 SHUT_UP A_LAN_4_OBUF A_LAN_7_OBUF LAN_BASEADR<9>
A_LAN_6_OBUF ROM_B_0_OBUF$BUF7 LAN_BASEADR<14> ROM_B_0_OBUF$BUF5
LAN_BASEADR<13> D_6_IOBUFE LAN_BASEADR<12> D_3_IOBUFE
LAN_BASEADR<11> D_7_IOBUFE D_1_IOBUFE LAN_BASEADR<10>
D_8_IOBUFE LAN_BASEADR<0>
PARTITION FB3_2 IDE_W_OBUF
PARTITION FB3_14 ROM_B_0_OBUF$BUF8
PARTITION FB2_1 LAN_BASEADR<7> A_LAN_4_OBUF A_LAN_7_OBUF LAN_BASEADR<5>
A_LAN_6_OBUF N0$BUF5 LAN_BASEADR<4> N0$BUF3
LAN_BASEADR<3> D_6_IOBUFE LAN_BASEADR<2> D_3_IOBUFE
LAN_BASEADR<1> D_7_IOBUFE D_1_IOBUFE LAN_BASEADR<15>
D_8_IOBUFE LAN_BASEADR<10>
PARTITION FB3_2 ROM_B_0_OBUF$BUF2
PARTITION FB3_14 N0$BUF6
PARTITION FB4_1 LAN_SM_RST D_0_IOBUFE LAN_WR_RST LAN_RST_SM_FSM_FFd1
A_LAN_1_OBUF A_LAN_0_OBUF LAN_IRQ_D0 A_LAN_3_OBUF
LAN_CS_RST LAN_A_INIT<6> DQ_9_IOBUFE/DQ_9_IOBUFE_TRST A_LAN_2_OBUF
CONFIG_READY A_LAN_5_OBUF LAN_RST_SM_FSM_FFd3 LAN_RST_SM_FSM_FFd2
LAN_IRQ_OUT LAN_INT_ENABLE
PARTITION FB5_1 D_OUT<7> ROM_B_0_OBUF$BUF11 D_OUT<3> D_OUT<0>
ROM_B_0_OBUF LAN_BASEADR<9> LAN_BASEADR<8> D_OUT<2>
AUTO_CONFIG_DONE_CYCLE D_2_IOBUFE D_OUT<6> D_9_IOBUFE
D_OUT<4> D_10_IOBUFE D_11_IOBUFE D_OUT<1>
D_12_IOBUFE D_9_IOBUFE/D_9_IOBUFE_TRST
PARTITION FB6_1 $OpTx$INV$1 N0$BUF4 A_LAN_12_OBUF
PARTITION FB6_5 A_LAN_13_OBUF A_LAN_10_OBUF
PARTITION FB6_8 A_LAN_11_OBUF
PARTITION FB6_10 A_LAN_8_OBUF
PARTITION FB6_14 A_LAN_9_OBUF
PARTITION FB6_16 N0$BUF7/N0$BUF7_TRST $OpTx$INV$2 EXP22_
PARTITION FB7_1 EXP23_
PARTITION FB7_3 D_13_IOBUFE
PARTITION FB7_5 D_14_IOBUFE
PARTITION FB7_8 LAN_A_INIT<3> Z3_ADR_1 Z3_ADR_0 Z3_ADR<9>
D_15_IOBUFE Z3_ADR<8> Z3_ADR<7> Z3_ADR<6>
Z3_ADR<5> DQ_DATA<9> DQ_DATA<1>
PARTITION FB8_2 DQ_12_IOBUFE DQ_14_IOBUFE
PARTITION FB8_5 LAN_WRH_OBUF BUF_CONFIG_READY $OpTx$FX_DC$24 LAN_CS_OBUF
$OpTx$FX_DC$32 LAN_RD_OBUF Z3_ADR<3> Z3_ADR<2>
Z3_ADR<13> Z3_ADR<12> Z3_ADR<11> Z3_ADR<10>
LAN_ACCESS DQ_SWAP
PARTITION FB9_1 DQ_DATA<4> EXP24_
PARTITION FB9_11 Z3_DATA<0> LAN_WRH_S DQ_DATA<5> Z3_DATA<1>
EXP25_ DQ_DATA<13> Z3_DATA<2> DQ_DATA<12>
PARTITION FB10_1 SHUT_UP DQ_1_IOBUFE DQ_0_IOBUFE LAN_BASEADR<6>
DQ_3_IOBUFE DQ_2_IOBUFE LAN_BASEADR<14> DQ_5_IOBUFE
LAN_BASEADR<13> DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE
LAN_BASEADR<12> DQ_8_IOBUFE LAN_BASEADR<11> LAN_BASEADR<0>
DQ_10_IOBUFE D_OUT<5>
PARTITION FB11_1 Z3_DATA<31> Z3_DATA<30> Z3_DATA<3> Z3_DATA<29>
Z3_DATA<4> Z3_DATA<23> Z3_DATA<22> Z3_DATA<21>
LAN_SM_FSM_FFd2 Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF1
LAN_RD_S ROM_B_0_OBUF$BUF0 LAN_SM_FSM_FFd4 DQ_DATA<8>
ROM_B_0_OBUF$BUF9 DQ_DATA<0>
PARTITION FB12_2 N0$BUF2
PARTITION FB12_5 DQ_15_IOBUFE
PARTITION FB12_8 DQ_13_IOBUFE
PARTITION FB12_10 DQ_11_IOBUFE
PARTITION FB12_12 DQ_9_IOBUFE
PARTITION FB12_15 Z3_ADR_1/Z3_ADR_1_SETF LAN_D_INIT<8> LAN_D_INIT<1> AUTOCONFIG_ACCESS
PARTITION FB13_1 LAN_READY ROM_B_0_OBUF$BUF10
PARTITION FB13_8 Z3_DATA<7>
PARTITION FB13_13 LAN_WRL_S LAN_WRL_OBUF DQ_DATA<7> DQ_DATA<6>
DQ_DATA<15> DQ_DATA<14>
PARTITION FB14_3 N0$BUF0
PARTITION FB14_8 $OpTx$FX_DC$8 $OpTx$FX_DC$10 $OpTx$FX_DC$39 CFOUT_OBUF
$OpTx$FX_DC$38 $OpTx$FX_DC$37 SLAVE_OBUF N0
$OpTx$FX_DC$36 $OpTx$FX_DC$35 Z3_ADR<4>
PARTITION FB15_1 DQ_DATA<10> DQ_DATA<11> DQ_DATA<2> DQ_DATA<3>
BUF_LAN_READY LAN_SM_FSM_FFd1 $OpTx$FX_DC$16 $OpTx$FX_SC$18
Z3_DATA<1>/Z3_DATA<1>_TRST
PARTITION FB15_12 N0$BUF7
PARTITION FB15_14 Z3_DATA<15> Z3_DATA<14>
PARTITION FB15_17 Z3_DATA<13> EXP26_
PARTITION FB4_1 D_Z2_OUT<0> D_0_IOBUFE $OpTx$FX_DC$34 D_Z2_OUT<3>
A_LAN_1_OBUF A_LAN_0_OBUF D_Z2_OUT<2> A_LAN_3_OBUF
AUTO_CONFIG_Z2_DONE_CYCLE<0> CP_BASEADR<6> AUTO_CONFIG_Z2_DONE_CYCLE<1> A_LAN_2_OBUF
BUF_D_Z2_OUT<2> A_LAN_5_OBUF BUF_D_Z2_OUT<3> D_Z2_OUT<1>
EXP22_ $OpTx$FX_DC$35
PARTITION FB5_1 LAN_BASEADR<8> CP_WE_OBUF$BUF1 LAN_BASEADR<7> LAN_BASEADR<6>
ROM_OE_OBUF LAN_BASEADR<5> LAN_BASEADR<4> LAN_BASEADR<3>
LAN_BASEADR<2> D_2_IOBUFE LAN_BASEADR<1> D_9_IOBUFE
LAN_BASEADR<15> D_10_IOBUFE D_11_IOBUFE D_OUT<6>
D_12_IOBUFE D_OUT<5>
PARTITION FB6_2 ROM_B_0_OBUF$BUF6 A_LAN_12_OBUF $OpTx$FX_DC$57 A_LAN_13_OBUF
A_LAN_10_OBUF $OpTx$FX_DC$37 A_LAN_11_OBUF $OpTx$FX_DC$12
A_LAN_8_OBUF $OpTx$FX_DC$10 SHUT_UP_Z2<1>/SHUT_UP_Z2<1>_CLKF LAN_READY
A_LAN_9_OBUF $OpTx$FX_DC$63 $OpTx$FX_DC$62 $OpTx$FX_DC$61
$OpTx$FX_DC$60
PARTITION FB7_1 CP_ACCESS EXP23_ D_13_IOBUFE EXP24_
D_14_IOBUFE
PARTITION FB7_10 SHUT_UP_Z2<0> CP_BASEADR<5> D_15_IOBUFE CP_BASEADR<4>
CP_BASEADR<3> CP_BASEADR<2> CP_BASEADR<1> CP_BASEADR<0>
EXP25_
PARTITION FB8_1 $OpTx$FX_DC$59 DQ_12_IOBUFE DQ_14_IOBUFE SHUT_UP_Z2<1>
LAN_WRH_OBUF IDE_BASEADR<7> IDE_BASEADR<6> LAN_CS_OBUF
IDE_BASEADR<5> LAN_RD_OBUF IDE_BASEADR<4> IDE_BASEADR<3>
IDE_BASEADR<2> IDE_BASEADR<1> IDE_BASEADR<0> CP_BASEADR<7>
EXP26_ BUF_IDE_ACCESS
PARTITION FB9_1 DQ_DATA<13> DQ_DATA<14> DQ_DATA<15> DQ_DATA<5>
DQ_DATA<6> DQ_DATA<7> $OpTx$INV$5 Z3_ADR<11>
Z3_ADR<12> Z3_ADR<13> Z3_DATA<0> $OpTx$FX_DC$44
LAN_A_INIT<3> Z3_DATA<1>
PARTITION FB9_17 Z3_DATA<2> EXP27_
PARTITION FB10_2 DQ_1_IOBUFE DQ_0_IOBUFE
PARTITION FB10_5 DQ_3_IOBUFE DQ_2_IOBUFE
PARTITION FB10_8 DQ_5_IOBUFE
PARTITION FB10_10 DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE AUTOCONFIG_Z3_ACCESS
DQ_8_IOBUFE AUTO_CONFIG_Z2_DONE<1> AUTO_CONFIG_Z2_DONE<0> DQ_10_IOBUFE
AUTOCONFIG_Z2_ACCESS
PARTITION FB11_1 Z3_DATA<30> Z3_DATA<29> Z3_DATA<3> Z3_DATA<22>
Z3_DATA<4> Z3_DATA<21> LAN_SM_FSM_FFd4 LAN_SM_FSM_FFd2
LAN_RD_S Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF0
LAN_SM_FSM_FFd1 ROM_B_0_OBUF DQ_DATA<8> DQ_DATA<10>
CP_WE_OBUF DQ_DATA<0>
PARTITION FB12_1 LAN_SM_RST ROM_B_0_OBUF$BUF4 LAN_IRQ_D0 LAN_D_INIT<8>
DQ_15_IOBUFE LAN_D_INIT<1> LAN_A_INIT<6> DQ_13_IOBUFE
CONFIG_READY DQ_11_IOBUFE BUF_LAN_D_INIT<1> DQ_9_IOBUFE
LAN_WR_RST LAN_RST_SM_FSM_FFd3 LAN_RST_SM_FSM_FFd2 LAN_RST_SM_FSM_FFd1
LAN_IRQ_OUT LAN_CS_RST
PARTITION FB13_1 EXP28_ CP_WE_OBUF$BUF0
PARTITION FB13_4 D_OUT<7> D_OUT<3> D_OUT<0> Z3_ADR<8>
Z3_DATA<7> Z3_ADR<7> D_OUT<2> AUTO_CONFIG_DONE_CYCLE
AUTO_CONFIG_DONE D_OUT<4> LAN_WRL_OBUF D_OUT<1>
DQ_DATA<9> DQ_DATA<2> DQ_DATA<1>
PARTITION FB14_1 $OpTx$INV$4 BUF_CONFIG_READY ROM_B_0_OBUF$BUF2 $OpTx$FX_DC$49
ROM_B_0_OBUF$BUF9/ROM_B_0_OBUF$BUF9_TRST ROM_B_0_OBUF$BUF2/ROM_B_0_OBUF$BUF2_TRST $OpTx$FX_DC$50 Z3_ADR_1
Z3_ADR_0 Z3_ADR<6> CFOUT_OBUF Z3_ADR<5>
Z3_ADR<4> SLAVE_OBUF ROM_B_0_OBUF$BUF1 Z3_ADR<3>
Z3_ADR<2> EXP29_
PARTITION FB15_1 DQ_DATA<11> DQ_DATA<12> DQ_DATA<3> DQ_DATA<4>
BUF_LAN_READY Z3_DATA<23> Z3_DATA<31> LAN_WRH_S
LAN_WRL_S $OpTx$FX_DC$30 $OpTx$FX_DC$36 ROM_B_0_OBUF$BUF9
$OpTx$FX_SC$31 Z3_DATA<15> Z3_DATA<14> $OpTx$FX_SC$66
Z3_DATA<13> Z3_DATA<9>/Z3_DATA<9>_TRST
PARTITION FB16_1 Z3_DATA<28> Z3_DATA<12> Z3_DATA<11> Z3_DATA<27>
Z3_DATA<26> Z3_DATA<10> Z3_DATA<25> Z3_DATA<9>
Z3_DATA<24> N0$BUF1 Z3_DATA<8> Z3_DATA<20>
Z3_DATA<24> ROM_B_0_OBUF$BUF3 Z3_DATA<8> Z3_DATA<20>
Z3_DATA<19> Z3_DATA<17> Z3_DATA<16> Z3_A_LOW
LAN_SM_FSM_FFd3 Z3_DATA<18>
Logic/LAN_IDE/LAN_IDE_CP.jed
+1229 -1229
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Logic/LAN_IDE/LAN_IDE_CP.mfd
+2275 -1541
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Logic/LAN_IDE/LAN_IDE_CP.nga
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.ngc
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.ngd
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.ngr
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.pad
+6 -6
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@@ -1,7 +1,7 @@
Release 8.1i - Fit P.20131013
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
1- 2-2019 11:11AM
1- 2-2019 10:08PM
NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
@@ -74,7 +74,7 @@ P53|A<7>|I|I/O|INPUT|||||||||
P54|A<2>|I|I/O|INPUT|||||||||
P55|VCC||VCCIO||||||||||
P56|A<8>|I/O|I/O|BIDIR|||||||||
P57|TIE||I/O||||||||||
P57|A<1>|I|I/O|INPUT|||||||||
P58|A<9>|I/O|I/O|BIDIR|||||||||
P59|A<10>|I/O|I/O|BIDIR|||||||||
P60|A<11>|I/O|I/O|BIDIR|||||||||
@@ -92,12 +92,12 @@ P71|CP_RD|O|I/O|OUTPUT|||||||||
P72|GND||GND||||||||||
P73|VCC||VCCIO||||||||||
P74|A<15>|I/O|I/O|BIDIR|||||||||
P75|AUTOBOOT_OFF|I|I/O|INPUT|||||||||
P75|TIE||I/O||||||||||
P76|LAN_WRL|O|I/O|OUTPUT|||||||||
P77|FCS|I|I/O|INPUT|||||||||
P78|DS1|I|I/O|INPUT|||||||||
P79|Z3|I|I/O|INPUT|||||||||
P80|TIE||I/O||||||||||
P80|AS|I|I/O|INPUT|||||||||
P81|UDS|I|I/O|INPUT|||||||||
P82|LDS|I|I/O|INPUT|||||||||
P83|RW|I|I/O|INPUT|||||||||
@@ -119,8 +119,8 @@ P98|BERR|I|I/O|INPUT|||||||||
P99|GND||GND||||||||||
P100|OVR|O|I/O|OUTPUT|||||||||
P101|TIE||I/O||||||||||
P102|TIE||I/O||||||||||
P103|TIE||I/O||||||||||
P102|C3|I|I/O|INPUT|||||||||
P103|C1|I|I/O|INPUT|||||||||
P104|CFIN|I|I/O|INPUT|||||||||
P105|CFOUT|O|I/O|OUTPUT|||||||||
P106|SLAVE|O|I/O|OUTPUT|||||||||
Logic/LAN_IDE/LAN_IDE_CP.pnx
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.rpt
+1765 -1361
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File diff suppressed because it is too large Load Diff
Logic/LAN_IDE/LAN_IDE_CP.syr
+98 -70
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@@ -4,13 +4,13 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.14 secs
Total CPU time to Xst completion: 0.13 secs
--> Parameter xsthdpdir set to xst
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.14 secs
Total CPU time to Xst completion: 0.13 secs
--> Reading design: LAN_IDE_CP.prj
@@ -43,7 +43,7 @@ Target Device : XC9500XL CPLDs
---- Source Options
Top Module Name : LAN_IDE_CP
Automatic FSM Extraction : YES
FSM Encoding Algorithm : Gray
FSM Encoding Algorithm : Compact
Safe Implementation : No
Mux Extraction : Yes
Resource Sharing : YES
@@ -71,7 +71,7 @@ wysiwyg : NO
=========================================================================
Setting FSM Encoding Algorithm to : Gray
Setting FSM Encoding Algorithm to : OPT
=========================================================================
@@ -109,13 +109,10 @@ INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP>
Synthesizing Unit <LAN_IDE_CP>.
Related source file is "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd".
WARNING:Xst:647 - Input <C3> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <IDE_WAIT> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <AS> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <AUTOBOOT_OFF> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <CP_IRQ> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:2565 - Inout <A<1>> is never assigned.
WARNING:Xst:647 - Input <MTCR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <C1> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
Found finite state machine <FSM_0> for signal <LAN_SM>.
-----------------------------------------------------------------------
@@ -128,7 +125,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
| Reset type | asynchronous |
| Reset State | nop |
| Power Up State | nop |
| Encoding | gray |
| Encoding | compact |
| Implementation | automatic |
-----------------------------------------------------------------------
Found finite state machine <FSM_1> for signal <LAN_RST_SM>.
@@ -142,7 +139,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
| Reset type | asynchronous |
| Reset State | nop |
| Power Up State | nop |
| Encoding | gray |
| Encoding | compact |
| Implementation | automatic |
-----------------------------------------------------------------------
Found 16x8-bit ROM for signal <D_OUT$mux0004>.
@@ -170,18 +167,31 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
Found 1-bit tristate buffer for signal <A<10>>.
Found 1-bit tristate buffer for signal <A<9>>.
Found 1-bit tristate buffer for signal <A<8>>.
Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 173.
Found 1-bit register for signal <AUTO_CONFIG_DONE>.
Found 1-bit register for signal <AUTO_CONFIG_DONE_CYCLE>.
Found 1-bit register for signal <AUTOCONFIG_ACCESS>.
Found 2-bit register for signal <AUTO_CONFIG_Z2_DONE>.
Found 2-bit register for signal <AUTO_CONFIG_Z2_DONE_CYCLE>.
Found 1-bit register for signal <AUTOCONFIG_Z2_ACCESS>.
Found 1-bit register for signal <AUTOCONFIG_Z3_ACCESS>.
Found 1-bit register for signal <CONFIG_READY>.
Found 1-bit register for signal <CP_ACCESS>.
Found 8-bit comparator equal for signal <CP_ACCESS$cmp_eq0000> created at line 290.
Found 8-bit register for signal <CP_BASEADR>.
Found 8-bit register for signal <D_OUT>.
Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 518.
Found 4-bit register for signal <D_Z2_OUT>.
Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 669.
Found 16-bit register for signal <DQ_DATA>.
Found 1-bit register for signal <DQ_SWAP>.
Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 249.
Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 261.
Found 1-bit register for signal <IDE_ACCESS>.
Found 8-bit comparator equal for signal <IDE_ACCESS$cmp_eq0000> created at line 297.
Found 8-bit register for signal <IDE_BASEADR>.
Found 1-bit register for signal <IDE_ENABLE>.
Found 8-bit comparator equal for signal <IDE_ENABLE$cmp_eq0000> created at line 297.
Found 14-bit register for signal <LAN_A_INIT>.
Found 1-bit register for signal <LAN_ACCESS>.
Found 16-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 248.
Found 16-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 260.
Found 16-bit register for signal <LAN_BASEADR>.
Found 1-bit register for signal <LAN_CS_RST>.
Found 16-bit register for signal <LAN_D_INIT>.
@@ -190,20 +200,22 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
Found 1-bit register for signal <LAN_IRQ_OUT>.
Found 1-bit register for signal <LAN_RD_S>.
Found 1-bit register for signal <LAN_READY>.
Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 360.
Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 405.
Found 1-bit register for signal <LAN_SM_RST>.
Found 1-bit register for signal <LAN_WR_RST>.
Found 1-bit register for signal <LAN_WRH_S>.
Found 1-bit register for signal <LAN_WRL_S>.
Found 1-bit register for signal <SHUT_UP>.
Found 2-bit register for signal <SHUT_UP_Z2>.
Found 1-bit register for signal <Z3_A_LOW>.
Found 14-bit register for signal <Z3_ADR>.
Found 32-bit register for signal <Z3_DATA>.
Summary:
inferred 2 Finite State Machine(s).
inferred 1 ROM(s).
inferred 49 D-type flip-flop(s).
inferred 4 Comparator(s).
inferred 57 D-type flip-flop(s).
inferred 7 Comparator(s).
inferred 1 Xor(s).
inferred 57 Tristate(s).
Unit <LAN_IDE_CP> synthesized.
@@ -214,18 +226,23 @@ HDL Synthesis Report
Macro Statistics
# ROMs : 1
16x8-bit ROM : 1
# Registers : 56
1-bit register : 50
# Registers : 68
1-bit register : 58
14-bit register : 2
16-bit register : 3
8-bit register : 1
# Comparators : 4
2-bit register : 1
4-bit register : 1
8-bit register : 3
# Comparators : 7
16-bit comparator equal : 1
2-bit comparator less : 2
4-bit comparator less : 1
8-bit comparator equal : 3
# Tristates : 27
1-bit tristate buffer : 25
16-bit tristate buffer : 2
# Xors : 1
1-bit xor2 : 1
=========================================================================
@@ -233,36 +250,36 @@ Macro Statistics
* Advanced HDL Synthesis *
=========================================================================
Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with gray encoding.
Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with compact encoding.
------------------------
State | Encoding
------------------------
nop | 000
wait0 | 001
clr | 011
clr_commit | 010
wait1 | 110
set | 111
set_commit | 101
done | 100
wait0 | 100
clr | 101
clr_commit | 111
wait1 | 001
set | 011
set_commit | 010
done | 110
------------------------
Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:4]> with gray encoding.
Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:4]> with compact encoding.
-------------------------------
State | Encoding
-------------------------------
nop | 0000
start_read_upper | unreached
wait_read_upper | 0001
end_read_upper | 0111
start_read_lower | 0101
wait_read_upper | 0101
end_read_upper | 1110
start_read_lower | 0001
wait_read_lower | 0011
end_read_lower | 0100
start_write_upper | 0010
wait_write_upper | 1100
end_write_upper | 1101
start_write_lower | 0110
wait_write_lower | 1111
end_write_lower | 1110
end_read_lower | 0010
start_write_upper | 1101
wait_write_upper | 0111
end_write_upper | 0110
start_write_lower | 1001
wait_write_lower | 1011
end_write_lower | 1010
-------------------------------
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <13>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <12>. This FF/Latch will be trimmed during the optimization process.
@@ -294,10 +311,11 @@ Macro Statistics
# FSMs : 2
# ROMs : 1
16x8-bit ROM : 1
# Registers : 49
Flip-Flops : 49
# Comparators : 1
# Registers : 57
Flip-Flops : 57
# Comparators : 4
16-bit comparator equal : 1
8-bit comparator equal : 3
=========================================================================
@@ -331,17 +349,27 @@ INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_1> in Unit <LAN_IDE_CP> is equivalent t
Optimizing unit <LAN_IDE_CP> ...
implementation constraint: INIT=s : D_OUT_7
implementation constraint: INIT=s : D_OUT_6
implementation constraint: INIT=s : D_OUT_5
implementation constraint: INIT=s : D_Z2_OUT_0
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_0
implementation constraint: INIT=s : D_Z2_OUT_3
implementation constraint: INIT=s : LAN_A_INIT_3
implementation constraint: INIT=s : D_OUT_4
implementation constraint: INIT=s : D_OUT_3
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_1
implementation constraint: INIT=s : LAN_A_INIT_6
implementation constraint: INIT=s : D_OUT_2
implementation constraint: INIT=s : D_OUT_1
implementation constraint: INIT=s : D_OUT_0
implementation constraint: INIT=s : D_OUT_1
implementation constraint: INIT=s : D_OUT_2
implementation constraint: INIT=r : LAN_D_INIT_1
implementation constraint: INIT=s : D_OUT_3
implementation constraint: INIT=s : SHUT_UP_Z2_0
implementation constraint: INIT=s : D_OUT_4
implementation constraint: INIT=r : LAN_D_INIT_8
implementation constraint: INIT=s : SHUT_UP_Z2_1
implementation constraint: INIT=s : D_Z2_OUT_2
implementation constraint: INIT=s : D_OUT_5
implementation constraint: INIT=s : D_OUT_6
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_0
implementation constraint: INIT=s : D_Z2_OUT_1
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_1
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd1
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd2
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd3
@@ -380,40 +408,40 @@ Design Statistics
# IOs : 116
Cell Usage :
# BELS : 1038
# AND2 : 344
# AND3 : 50
# AND4 : 7
# AND8 : 4
# BELS : 1263
# AND2 : 379
# AND3 : 54
# AND4 : 10
# AND8 : 6
# GND : 1
# INV : 382
# OR2 : 205
# OR3 : 10
# OR4 : 17
# INV : 465
# OR2 : 277
# OR3 : 18
# OR4 : 1
# VCC : 1
# XOR2 : 17
# FlipFlops/Latches : 115
# XOR2 : 51
# FlipFlops/Latches : 145
# FD : 1
# FDC : 19
# FDCE : 3
# FDP : 42
# FDPE : 50
# IO Buffers : 109
# IBUF : 19
# FDC : 22
# FDCE : 8
# FDP : 46
# FDPE : 68
# IO Buffers : 112
# IBUF : 22
# IOBUFE : 48
# OBUF : 33
# OBUFE : 9
=========================================================================
Total REAL time to Xst completion: 8.00 secs
Total CPU time to Xst completion: 8.42 secs
Total REAL time to Xst completion: 19.00 secs
Total CPU time to Xst completion: 19.05 secs
-->
Total memory usage is 4534740 kilobytes
Total memory usage is 4534736 kilobytes
Number of errors : 0 ( 0 filtered)
Number of warnings : 51 ( 0 filtered)
Number of warnings : 48 ( 0 filtered)
Number of infos : 10 ( 0 filtered)
Logic/LAN_IDE/LAN_IDE_CP.tspec
+134 -140
View File
@@ -2,138 +2,139 @@ TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<0>.D:400
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<0>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<0>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<0>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<0>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<0>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<0>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<0>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<10>.D:400
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<10>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<10>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<10>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<10>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<10>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<10>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<10>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<11>.D:400
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<11>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<11>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<11>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<11>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<11>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<11>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<11>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<12>.D:400
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<12>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<12>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<12>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<12>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<12>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<12>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<12>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<13>.D:400
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<13>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<13>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<13>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<13>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<13>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<13>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<13>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<14>.D:400
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<14>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<14>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<14>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<14>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<14>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<14>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<14>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<15>.D:400
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<15>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<15>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<15>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<15>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<15>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<15>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<15>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<1>.D:400
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<1>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<1>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<1>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<1>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<1>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<1>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<1>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<2>.D:400
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<2>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<2>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<2>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<2>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<2>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<2>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<2>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<3>.D:400
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<3>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<3>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<3>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<3>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<3>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<3>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<3>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<4>.D:400
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<4>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<4>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<4>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<4>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<4>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<4>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<4>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<5>.D:400
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<5>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<5>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<5>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<5>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<5>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<5>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<5>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<6>.D:400
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<6>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<6>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<6>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<6>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<6>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<6>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<6>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<7>.D:400
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<7>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<7>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<7>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<7>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<7>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<7>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<7>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<8>.D:400
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<8>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<8>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<8>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<8>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<8>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<8>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<8>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<9>.D:400
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<9>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<9>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<9>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<9>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<9>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<9>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<9>.CE:400
TS_CLK_EXT:FROM:AUTO_CONFIG_DONE_CYCLE.Q:TO:AUTO_CONFIG_DONE.D:400
TS_CLK_EXT:FROM:AUTO_CONFIG_DONE_CYCLE.Q:TO:AUTO_CONFIG_DONE_CYCLE.D:400
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:LAN_BASEADR<0>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:LAN_BASEADR<10>.D:400
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:LAN_BASEADR<10>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:LAN_BASEADR<11>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:LAN_BASEADR<10>.D:400
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:LAN_BASEADR<11>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:LAN_BASEADR<12>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:LAN_BASEADR<11>.D:400
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:LAN_BASEADR<12>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:LAN_BASEADR<13>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:LAN_BASEADR<12>.D:400
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:LAN_BASEADR<13>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:LAN_BASEADR<14>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:LAN_BASEADR<13>.D:400
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:LAN_BASEADR<14>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:LAN_BASEADR<15>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:LAN_BASEADR<14>.D:400
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:LAN_BASEADR<15>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:LAN_BASEADR<15>.D:400
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:LAN_BASEADR<1>.D:400
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:LAN_BASEADR<2>.D:400
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:LAN_BASEADR<3>.D:400
@@ -141,13 +142,13 @@ TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:LAN_BASEADR<4>.D:400
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:LAN_BASEADR<5>.D:400
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:LAN_BASEADR<6>.D:400
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:LAN_BASEADR<7>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:LAN_BASEADR<8>.D:400
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:LAN_BASEADR<8>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:LAN_BASEADR<9>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:LAN_BASEADR<8>.D:400
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:LAN_BASEADR<9>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:LAN_BASEADR<9>.D:400
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:LAN_INT_ENABLE.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:LAN_INT_ENABLE.D:400
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:LAN_INT_ENABLE.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:LAN_INT_ENABLE.D:400
TS_CLK_EXT:FROM:LAN_INT_ENABLE.Q:TO:LAN_INT_ENABLE.D:400
TS_CLK_EXT:FROM:LAN_IRQ_D0.Q:TO:LAN_IRQ_OUT.D:400
TS_CLK_EXT:FROM:LAN_IRQ_OUT.Q:TO:LAN_IRQ_OUT.D:400
@@ -155,357 +156,350 @@ TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<16>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<16>.D:400
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<16>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<16>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<16>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<16>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<16>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<16>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<16>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<17>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<17>.D:400
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<17>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<17>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<17>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<17>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<17>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<17>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<17>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<18>.D:400
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<18>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<18>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<18>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<18>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<18>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<18>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<18>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<18>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<19>.D:400
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<19>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<19>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<19>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<19>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<19>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<19>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<19>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<19>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<20>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<20>.D:400
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<20>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<20>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<20>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<20>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<20>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<20>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<20>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<21>.D:400
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<21>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<21>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<21>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<21>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<21>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<21>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<21>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<22>.D:400
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<22>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<22>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<22>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<22>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<22>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<22>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<22>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<23>.D:400
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<23>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<23>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<23>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<23>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<23>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<23>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<23>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<24>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<24>.D:400
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<24>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<24>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<24>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<24>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<24>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<24>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<24>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<25>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<25>.D:400
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<25>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<25>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<25>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<25>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<25>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<25>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<25>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<26>.D:400
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<26>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<26>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<26>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<26>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<26>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<26>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<26>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<26>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<27>.D:400
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<27>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<27>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<27>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<27>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<27>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<27>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<27>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<27>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<28>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<28>.D:400
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<28>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<28>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<28>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<28>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<28>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<28>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<28>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<29>.D:400
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<29>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<29>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<29>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<29>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<29>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<29>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<29>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<30>.D:400
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<30>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<30>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<30>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<30>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<30>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<30>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<30>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<31>.D:400
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<31>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<31>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<31>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<31>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<31>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<31>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<31>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd4.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd2.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd1.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd3.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd4.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd2.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd1.RSTF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_D_INIT<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_D_INIT<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_D_INIT<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_D_INIT<8>.D:400
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<0>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<10>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<11>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<12>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<13>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<14>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<15>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<1>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<2>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<3>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<4>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<5>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<6>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<7>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<8>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<9>.SETF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_WR_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_WR_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_WR_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_WR_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_A_INIT<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_CS_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_A_INIT<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_A_INIT<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_CS_RST.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_CS_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_CS_RST.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_RD_S.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_READY.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_READY.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_READY.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_READY.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_READY.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_READY.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_READY.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_WRH_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRH_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_WRH_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_WRH_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRH_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_WRH_S.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_WRH_S.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_WRL_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRL_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_WRL_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_WRL_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRL_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_WRL_S.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_WRL_S.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_A_LOW.RSTF:400
TS_CLK_EXT:FROM:AUTO_CONFIG_DONE_CYCLE.Q:TO:CFOUT_OBUF.D:400
Logic/LAN_IDE/LAN_IDE_CP.vhd
+186 -34
View File
@@ -109,18 +109,27 @@ architecture Behavioral of LAN_IDE_CP is
end_write_lower
);
SIGNAL LAN_RST_SM: lan_reset :=nop;
SIGNAL LAN_SM: lan_bus_sm :=nop;
SIGNAL AUTOCONFIG_ACCESS: STD_LOGIC;
SIGNAL LAN_ACCESS: STD_LOGIC;
SIGNAL DQ_SWAP: STD_LOGIC;
signal LAN_RST_SM: lan_reset :=nop;
signal LAN_SM: lan_bus_sm :=nop;
signal AUTOCONFIG_Z3_ACCESS: STD_LOGIC;
signal AUTOCONFIG_Z2_ACCESS: STD_LOGIC;
signal IDE_ACCESS: STD_LOGIC;
signal IDE_ENABLE: STD_LOGIC;
signal IDE_BASEADR:STD_LOGIC_VECTOR(7 downto 0);
signal CP_ACCESS: STD_LOGIC;
signal CP_BASEADR:STD_LOGIC_VECTOR(7 downto 0);
signal LAN_ACCESS: STD_LOGIC;
signal DQ_SWAP: STD_LOGIC;
signal D_OUT:STD_LOGIC_VECTOR(7 downto 0):=x"FF";
signal D_Z2_OUT:STD_LOGIC_VECTOR(3 downto 0):=x"F";
signal AUTO_CONFIG_DONE:STD_LOGIC;
signal AUTO_CONFIG_DONE_CYCLE:STD_LOGIC;
signal SHUT_UP:STD_LOGIC;
signal AUTO_CONFIG_Z2_DONE:STD_LOGIC_VECTOR(1 downto 0):="00";
signal AUTO_CONFIG_Z2_DONE_CYCLE:STD_LOGIC_VECTOR(1 downto 0):="00";
signal SHUT_UP_Z2:STD_LOGIC_VECTOR(1 downto 0):="11";
signal LAN_BASEADR:STD_LOGIC_VECTOR(15 downto 0);
signal LAN_INT_ENABLE: std_logic;
signal DECODE_RESET: std_logic;
signal LAN_RD_S: std_logic;
signal LAN_WRH_S: std_logic;
signal LAN_WRL_S: std_logic;
@@ -136,6 +145,8 @@ architecture Behavioral of LAN_IDE_CP is
signal Z3_A_LOW:STD_LOGIC;
signal LAN_SM_RST:STD_LOGIC;
signal AMIGA_CLK:STD_LOGIC;
signal DS:STD_LOGIC;
signal LAN_CS_RST: std_logic;
signal LAN_WR_RST: std_logic;
@@ -144,8 +155,6 @@ architecture Behavioral of LAN_IDE_CP is
signal LAN_D_INIT:STD_LOGIC_VECTOR(15 downto 0) := x"0000";
constant LAN_A_CLRREG:STD_LOGIC_VECTOR(13 downto 0) :="11"&x"FF7";
constant LAN_A_SETREG:STD_LOGIC_VECTOR(13 downto 0) :="11"&x"FB7";
--constant LAN_D_SET:STD_LOGIC_VECTOR(15 downto 0) := "0000000100010000"; --33MHz
--constant LAN_D_CLR:STD_LOGIC_VECTOR(15 downto 0) := "0000111000000000"; --33MHz
constant LAN_D_SET:STD_LOGIC_VECTOR(15 downto 0) := "0000001000010010"; --25MHz
constant LAN_D_CLR:STD_LOGIC_VECTOR(15 downto 0) := "0000110100000000"; --25MHz
@@ -159,9 +168,12 @@ architecture Behavioral of LAN_IDE_CP is
begin
Z3_DATA_IN <= D(15 downto 0) & A(23 downto 8);
DECODE_RESET <= BERR and reset;
Z3_DS <= UDS & LDS & DS1 & DS0;
AMIGA_CLK <= not (C1 xor C3);
DS <= UDS and LDS;
clock_init: process(reset,CLK_EXT)
begin
if(reset='1')then
@@ -225,10 +237,10 @@ begin
end if;
end process clock_init;
ADDRESS_DECODE: process(DECODE_RESET,FCS)
ADDRESS_Z3_DECODE: process(reset,FCS)
begin
if(DECODE_RESET ='0')then
AUTOCONFIG_ACCESS <= '0';
if(reset ='0')then
AUTOCONFIG_Z3_ACCESS <= '0';
LAN_ACCESS <= '0';
DQ_SWAP <= '1';
Z3_ADR <= (others => '1');
@@ -237,11 +249,11 @@ begin
Z3_ADR(15 downto 2) <= A(15 downto 2);-- latch the whole address for the whole cycle
--use D(15 downto 8)& A(23 downto 16) = A(31 downto 16) for quick response
--AUTOCONFIG_ACCESS
--AUTOCONFIG_Z3_ACCESS
if(Z3='1' and (D(15 downto 8)& A(23 downto 16)) = x"FF00" and AUTO_CONFIG_DONE = '0' and CFIN='0')then
AUTOCONFIG_ACCESS <= '1';
AUTOCONFIG_Z3_ACCESS <= '1';
else
AUTOCONFIG_ACCESS <= '0';
AUTOCONFIG_Z3_ACCESS <= '0';
end if;
--lan base
@@ -257,7 +269,40 @@ begin
DQ_SWAP <= '1';
end if;
end if;
end process ADDRESS_DECODE;
end process ADDRESS_Z3_DECODE;
ADDRESS_Z2_DECODE: process(reset,AS)
begin
if(reset ='0')then
AUTOCONFIG_Z2_ACCESS <= '0';
IDE_ACCESS <= '0';
IDE_ENABLE <= '0';
CP_ACCESS <= '0';
elsif(falling_edge(AS))then
if(A(23 downto 16) = x"E8" and AUTO_CONFIG_Z2_DONE /= "11" and CFIN='0')then
AUTOCONFIG_Z2_ACCESS <= '1';
else
AUTOCONFIG_Z2_ACCESS <= '0';
end if;
--CP base
if(A(23 downto 16) = CP_BASEADR and SHUT_UP_Z2(0)='0' )then
CP_ACCESS <= '1';
else
CP_ACCESS <= '0';
end if;
--IDE base
if(A(23 downto 16) = IDE_BASEADR and SHUT_UP_Z2(1)='0' )then
IDE_ACCESS <= '1';
IDE_ENABLE <= not RW; -- enable IDE on the first write
else
IDE_ACCESS <= '0';
end if;
end if;
end process ADDRESS_Z2_DECODE;
--LAN interrupt enable
lan_int_proc: process (CLK_EXT,reset)
@@ -450,8 +495,8 @@ begin
end process lan_rw_gen;
--AUTOCONFIG_ACCESS
AUTOCONFIG_ACCESS_proc: process (reset, CLK_EXT)
--AUTOCONFIG_Z3_ACCESS
AUTOCONFIG_Z3_ACCESS_proc: process (reset, CLK_EXT)
begin
if reset = '0' then
-- reset active ...
@@ -464,8 +509,8 @@ begin
--default value
D_OUT<=x"FF";
if(FCS='1')then
AUTO_CONFIG_DONE <= AUTO_CONFIG_DONE_CYCLE or not AUTOBOOT_OFF ;
elsif(AUTOCONFIG_ACCESS= '1' and Z3_DS(3)='0' ) then
AUTO_CONFIG_DONE <= AUTO_CONFIG_DONE_CYCLE;
elsif(AUTOCONFIG_Z3_ACCESS= '1' and Z3_DS(3)='0' ) then
case Z3_ADR(8 downto 2) is
when "0000000" => D_OUT <= "10000001" ; --Z3, No mem, no Rom, single, board, 64kb
when "1000000" => D_OUT <= "00010001" ; --Z3, No mem, no Rom, single, board, 64kb
@@ -492,7 +537,112 @@ begin
end case;
end if;
end if;
end process AUTOCONFIG_ACCESS_proc; --- that's all
end process AUTOCONFIG_Z3_ACCESS_proc; --- that's all
--autoconfig
autoconfig_proc: process (reset, AMIGA_CLK)
begin
if reset = '0' then
-- reset active ...
AUTO_CONFIG_Z2_DONE_CYCLE <="00";
D_Z2_OUT<="1111";
SHUT_UP_Z2 <="11";
IDE_BASEADR<=x"FF";
CP_BASEADR<=x"FF";
AUTO_CONFIG_Z2_DONE <="00";
elsif falling_edge(AMIGA_CLK) then -- no reset, so wait for rising edge of the clock
D_Z2_OUT<="1111";
if(AS='1')then
AUTO_CONFIG_Z2_DONE <= AUTO_CONFIG_Z2_DONE or AUTO_CONFIG_Z2_DONE_CYCLE;
elsif(AUTOCONFIG_Z2_ACCESS= '1' and DS='0') then
case A(6 downto 1) is
when "000000" =>
if(AUTO_CONFIG_Z2_DONE(0) = '0')then
D_Z2_OUT <= "1100" ; --ZII, No-System-Memory, no ROM
else
D_Z2_OUT <= "1101" ; --ZII, no System-Memory, (perhaps)ROM
end if;
when "000001" => D_Z2_OUT <= "0001" ; --one Card, 64KB =001
when "000010" =>
if(AUTO_CONFIG_Z2_DONE(0) = '0')then
D_Z2_OUT <= "1000" ; --ProductID high nibble : 7->1000
else
D_Z2_OUT <= "1111" ; --ProductID high nibble : 0->1111
end if;
when "000011" =>
if(AUTO_CONFIG_Z2_DONE(0) = '0')then
D_Z2_OUT <= "0011" ; --ProductID low nibble: C->0011
else
D_Z2_OUT <= "1001" ; --ProductID low nibble: 6->1001
end if;
when "001000" => D_Z2_OUT <= "1111" ; --Ventor ID 0
when "001001" =>
if(AUTO_CONFIG_Z2_DONE(0) = '0')then
D_Z2_OUT <= "0101" ; --Ventor ID 1
else
D_Z2_OUT <= "0111" ; --Ventor ID 1
end if;
when "001010" =>
if(AUTO_CONFIG_Z2_DONE(0) = '0')then
D_Z2_OUT <= "1110" ; --Ventor ID 2
else
D_Z2_OUT <= "1101" ; --Ventor ID 2
end if;
when "001011" =>
if(AUTO_CONFIG_Z2_DONE(0) = '0')then
D_Z2_OUT <= "0011" ; --Ventor ID 3 : $0A1C: A1K.org
else
D_Z2_OUT <= "0011" ; --Ventor ID 3 : $082C: BSC
end if;
when "001100" => D_Z2_OUT <= "0100" ; --Serial byte 0 (msb) high nibble
when "001101" => D_Z2_OUT <= "1110" ; --Serial byte 0 (msb) low nibble
when "001110" => D_Z2_OUT <= "1001" ; --Serial byte 1 high nibble
when "001111" => D_Z2_OUT <= "0100" ; --Serial byte 1 low nibble
when "010000" => D_Z2_OUT <= "1111" ; --Serial byte 2 high nibble
when "010001" => D_Z2_OUT <= "1111" ; --Serial byte 2 low nibble
when "010010" => D_Z2_OUT <= "0100" ; --Serial byte 3 (lsb) high nibble
when "010011" => D_Z2_OUT <= "1010" ; --Serial byte 3 (lsb) low nibble: B16B00B5
--when "010100" => Dout1 <= "1111" ; --Rom vector high byte high nibble
--when "010101" => Dout1 <= "1111" ; --Rom vector high byte low nibble
--when "010110" => Dout1 <= "1111" ; --Rom vector low byte high nibble
when "010111" =>
if(AUTO_CONFIG_Z2_DONE = 1)then
D_Z2_OUT <= "1110" ; --Rom vector low byte low nibble
else
D_Z2_OUT <= "1111" ; --Rom vector low byte low nibble
end if;
when "100000" => D_Z2_OUT <= "0000" ; --Interrupt config: all zero
when "100001" => D_Z2_OUT <= "0000" ; --Interrupt config: all zero
when "100100" =>
D_Z2_OUT <= "1111" ;
if(RW='0')then
if(AUTO_CONFIG_Z2_DONE(0) = '0')then
CP_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress
SHUT_UP_Z2(0) <='0'; --enable board
AUTO_CONFIG_Z2_DONE_CYCLE(0) <= '1'; --done here
elsif(AUTO_CONFIG_Z2_DONE(1) = '0')then
IDE_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress
SHUT_UP_Z2(1) <= '0'; --enable board
AUTO_CONFIG_Z2_DONE_CYCLE(1) <= '1'; --done here
end if;
end if;
when "100110" =>
D_Z2_OUT <= "1111" ;
if(RW='0')then
if(AUTO_CONFIG_Z2_DONE(0) = '0')then
AUTO_CONFIG_Z2_DONE_CYCLE(0) <= '1'; --done here
elsif(AUTO_CONFIG_Z2_DONE(1) = '0')then
AUTO_CONFIG_Z2_DONE_CYCLE(1) <= '1'; --done here
end if;
end if;
when others => D_Z2_OUT <= "1111" ;
end case;
end if;
end if;
end process autoconfig_proc; --- that's all
LAN_CS <= LAN_ACCESS when reset='1' else LAN_CS_RST;
LAN_WRL <= LAN_WRL_S when FCS='0' and reset = '1' else LAN_WR_RST;
@@ -506,7 +656,8 @@ begin
--signal assignment
D(15 downto 0) <= Z3_DATA(31 downto 16) when RW='1' and Z3_DS <"1111" and FCS='0' and LAN_ACCESS ='1' else
D_OUT & x"FF" when RW='1' and Z3_DS <"1111" and FCS='0' and AUTOCONFIG_ACCESS ='1' else
D_OUT & x"FF" when RW='1' and Z3_DS <"1111" and FCS='0' and AUTOCONFIG_Z3_ACCESS ='1' else
D_Z2_OUT & x"FFF" when RW='1' and AS='0' and AUTOCONFIG_Z2_ACCESS ='1' else
(others => 'Z');
A(23 downto 8) <= Z3_DATA(15 downto 0) when RW='1' and Z3_DS <"1111" and FCS='0' and LAN_ACCESS ='1' else
@@ -523,28 +674,29 @@ begin
'Z';
OWN <= 'Z';
SLAVE <= '0' when FCS='0' and (AUTOCONFIG_ACCESS = '1' or LAN_ACCESS = '1') else '1';
CFOUT <= '0' when AUTO_CONFIG_DONE='1' else '1';
SLAVE <= '0' when FCS='0' and (AUTOCONFIG_Z3_ACCESS = '1' or LAN_ACCESS = '1') else
'0' when AS='0' and (AUTOCONFIG_Z2_ACCESS = '1' or IDE_ACCESS = '1' or CP_ACCESS = '1') else '1';
CFOUT <= '0' when AUTO_CONFIG_DONE='1' and AUTO_CONFIG_Z2_DONE ="11" else '1';
OVR <= '0' when FCS='0' and (AUTOCONFIG_ACCESS = '1' or LAN_ACCESS = '1') else 'Z'; --is Cache inhibit ob Z3!
OVR <= '0' when FCS='0' and (AUTOCONFIG_Z3_ACCESS = '1' or LAN_ACCESS = '1') else 'Z'; --is Cache inhibit ob Z3!
DTACK <= '0' when FCS='0' and (LAN_READY = '1' or AUTOCONFIG_ACCESS ='1' or CONFIG_READY='1') else 'Z';
DTACK <= '0' when FCS='0' and (LAN_READY = '1' or AUTOCONFIG_Z3_ACCESS ='1' or CONFIG_READY='1') else 'Z';
MTACK <= 'Z';
IDE_W <= '0' when AS='0' and IDE_ACCESS='1' and RW='0' else '1';
IDE_R <= not IDE_ENABLE when AS='0' and IDE_ACCESS='1' and RW='1' else '1';
ROM_OE<= IDE_ENABLE when AS='0' and IDE_ACCESS='1' and RW='1' else '1';
IDE_CS(0)<= not(A(12));
IDE_CS(1)<= not(A(13));
IDE_A(2 downto 0) <= A(11 downto 9);
ROM_B <= "00";
--for the future
CP_WE <= '1';
CP_RD <= '1';
CP_CS <= '1';
IDE_W <= '1';
IDE_R <= '1';
IDE_CS(0)<= '1';
IDE_CS(1)<= '1';
IDE_A(2 downto 0) <= "111";
ROM_B <= "11";
ROM_OE <= '1';
end Behavioral;
Logic/LAN_IDE/LAN_IDE_CP.vm6
+9784 -7064
View File
File diff suppressed because it is too large Load Diff
Logic/LAN_IDE/LAN_IDE_CP.xml
+1 -1
View File
File diff suppressed because one or more lines are too long
Logic/LAN_IDE/LAN_IDE_CP.xst
+1 -1
View File
@@ -17,7 +17,7 @@ run
-bus_delimiter <>
-case Maintain
-verilog2001 YES
-fsm_extract YES -fsm_encoding Gray
-fsm_extract YES -fsm_encoding Compact
-safe_implementation No
-mux_extract Yes
-resource_sharing YES
Logic/LAN_IDE/LAN_IDE_CP_ngdbuild.xrpt
+24 -24
View File
@@ -5,7 +5,7 @@
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application stringID="NgdBuild" timeStamp="Wed Jan 02 11:10:32 2019">
<application stringID="NgdBuild" timeStamp="Wed Jan 02 22:06:57 2019">
<section stringID="User_Env">
<table stringID="User_EnvVar">
<column stringID="variable"/>
@@ -65,43 +65,43 @@
<section stringID="NGDBUILD_DESIGN_SUMMARY">
<item dataType="int" stringID="NGDBUILD_NUM_ERRORS" value="0"/>
<item dataType="int" stringID="NGDBUILD_FILTERED_WARNINGS" value="0"/>
<item dataType="int" stringID="NGDBUILD_NUM_WARNINGS" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_WARNINGS" value="0"/>
<item dataType="int" stringID="NGDBUILD_FILTERED_INFOS" value="0"/>
<item dataType="int" stringID="NGDBUILD_NUM_INFOS" value="0"/>
</section>
<section stringID="NGDBUILD_PRE_UNISIM_SUMMARY">
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="344"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="50"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="7"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="379"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="54"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="10"/>
<item dataType="int" stringID="NGDBUILD_NUM_FD" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDC" value="19"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="3"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDP" value="42"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDPE" value="50"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDC" value="22"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="8"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDP" value="46"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDPE" value="68"/>
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="19"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="382"/>
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="22"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="465"/>
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="205"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="10"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="17"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="277"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="18"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="17"/>
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="51"/>
</section>
<section stringID="NGDBUILD_POST_UNISIM_SUMMARY">
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="344"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="50"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="7"/>
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="63"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="379"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="54"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="10"/>
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="70"/>
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="74"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="382"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="465"/>
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="205"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="10"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="17"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="277"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="18"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_TS_TIMESPEC" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="17"/>
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="51"/>
</section>
<section stringID="NGDBUILD_CORE_GENERATION_SUMMARY">
<section stringID="NGDBUILD_CORE_INSTANCES"/>
Logic/LAN_IDE/LAN_IDE_CP_pad.csv
+6 -6
View File
@@ -1,7 +1,7 @@
Release 8.1i - Fit P.20131013
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
1- 2-2019 11:11AM
1- 2-2019 10:08PM
NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The comma ','
@@ -74,7 +74,7 @@ P53,A<7>,I,I/O,INPUT,,,,,,,,,
P54,A<2>,I,I/O,INPUT,,,,,,,,,
P55,VCC,,VCCIO,,,,,,,,,,
P56,A<8>,I/O,I/O,BIDIR,,,,,,,,,
P57,TIE,,I/O,,,,,,,,,,
P57,A<1>,I,I/O,INPUT,,,,,,,,,
P58,A<9>,I/O,I/O,BIDIR,,,,,,,,,
P59,A<10>,I/O,I/O,BIDIR,,,,,,,,,
P60,A<11>,I/O,I/O,BIDIR,,,,,,,,,
@@ -92,12 +92,12 @@ P71,CP_RD,O,I/O,OUTPUT,,,,,,,,,
P72,GND,,GND,,,,,,,,,,
P73,VCC,,VCCIO,,,,,,,,,,
P74,A<15>,I/O,I/O,BIDIR,,,,,,,,,
P75,AUTOBOOT_OFF,I,I/O,INPUT,,,,,,,,,
P75,TIE,,I/O,,,,,,,,,,
P76,LAN_WRL,O,I/O,OUTPUT,,,,,,,,,
P77,FCS,I,I/O,INPUT,,,,,,,,,
P78,DS1,I,I/O,INPUT,,,,,,,,,
P79,Z3,I,I/O,INPUT,,,,,,,,,
P80,TIE,,I/O,,,,,,,,,,
P80,AS,I,I/O,INPUT,,,,,,,,,
P81,UDS,I,I/O,INPUT,,,,,,,,,
P82,LDS,I,I/O,INPUT,,,,,,,,,
P83,RW,I,I/O,INPUT,,,,,,,,,
@@ -119,8 +119,8 @@ P98,BERR,I,I/O,INPUT,,,,,,,,,
P99,GND,,GND,,,,,,,,,,
P100,OVR,O,I/O,OUTPUT,,,,,,,,,
P101,TIE,,I/O,,,,,,,,,,
P102,TIE,,I/O,,,,,,,,,,
P103,TIE,,I/O,,,,,,,,,,
P102,C3,I,I/O,INPUT,,,,,,,,,
P103,C1,I,I/O,INPUT,,,,,,,,,
P104,CFIN,I,I/O,INPUT,,,,,,,,,
P105,CFOUT,O,I/O,OUTPUT,,,,,,,,,
P106,SLAVE,O,I/O,OUTPUT,,,,,,,,,
1 Release 8.1i - Fit P.20131013
2 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
3 1- 2-2019 11:11AM 1- 2-2019 10:08PM
4 NOTE: This file is designed to be imported into a spreadsheet program
5 such as Microsoft Excel for viewing, printing and sorting. The comma ','
6 character is used as the data field separator.
7 This file is also designed to support parsing.
74 P59,A<10>,I/O,I/O,BIDIR,,,,,,,,,
75 P60,A<11>,I/O,I/O,BIDIR,,,,,,,,,
76 P61,A<12>,I/O,I/O,BIDIR,,,,,,,,,
77 P62,GND,,GND,,,,,,,,,,
78 P63,TDI,,TDI,,,,,,,,,,
79 P64,A<13>,I/O,I/O,BIDIR,,,,,,,,,
80 P65,TMS,,TMS,,,,,,,,,,
92 P77,FCS,I,I/O,INPUT,,,,,,,,,
93 P78,DS1,I,I/O,INPUT,,,,,,,,,
94 P79,Z3,I,I/O,INPUT,,,,,,,,,
95 P80,TIE,,I/O,,,,,,,,,, P80,AS,I,I/O,INPUT,,,,,,,,,
96 P81,UDS,I,I/O,INPUT,,,,,,,,,
97 P82,LDS,I,I/O,INPUT,,,,,,,,,
98 P83,RW,I,I/O,INPUT,,,,,,,,,
99 P84,VCC,,VCCINT,,,,,,,,,,
100 P85,DTACK,O,I/O,OUTPUT,,,,,,,,,
101 P86,A<23>,I/O,I/O,BIDIR,,,,,,,,,
102 P87,A<22>,I/O,I/O,BIDIR,,,,,,,,,
103 P88,A<21>,I/O,I/O,BIDIR,,,,,,,,,
119 P104,CFIN,I,I/O,INPUT,,,,,,,,,
120 P105,CFOUT,O,I/O,OUTPUT,,,,,,,,,
121 P106,SLAVE,O,I/O,OUTPUT,,,,,,,,,
122 P107,OWN,O,I/O,OUTPUT,,,,,,,,,
123 P108,GND,,GND,,,,,,,,,,
124 P109,VCC,,VCCIO,,,,,,,,,,
125 P110,LAN_CFG<4>,O,I/O,OUTPUT,,,,,,,,,
126 P111,LAN_INT,I,I/O,INPUT,,,,,,,,,
Logic/LAN_IDE/LAN_IDE_CP_xst.xrpt
+29 -24
View File
@@ -5,7 +5,7 @@
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application stringID="Xst" timeStamp="Wed Jan 02 11:10:16 2019">
<application stringID="Xst" timeStamp="Wed Jan 02 22:06:30 2019">
<section stringID="User_Env">
<table stringID="User_EnvVar">
<column stringID="variable"/>
@@ -71,7 +71,7 @@
<item DEFAULT="MAINTAIN" stringID="XST_CASE" value="Maintain"/>
<item DEFAULT="YES" label="-verilog2001" stringID="XST_VERILOG2001" value="YES"/>
<item DEFAULT="YES" label="-fsm_extract" stringID="XST_FSMEXTRACT" value="YES"/>
<item DEFAULT="AUTO" label="-fsm_encoding" stringID="XST_FSMENCODING" value="Gray"/>
<item DEFAULT="AUTO" label="-fsm_encoding" stringID="XST_FSMENCODING" value="Compact"/>
<item DEFAULT="NO" label="-safe_implementation" stringID="XST_SAFEIMPLEMENTATION" value="No"/>
<item DEFAULT="YES" stringID="XST_MUXEXTRACT" value="Yes"/>
<item DEFAULT="YES" label="-resource_sharing" stringID="XST_RESOURCESHARING" value="YES"/>
@@ -80,24 +80,29 @@
</section>
<section stringID="XST_HDL_SYNTHESIS_REPORT">
<item dataType="int" stringID="XST_ROMS" value="1"></item>
<item dataType="int" stringID="XST_REGISTERS" value="56">
<item dataType="int" stringID="XST_1BIT_REGISTER" value="50"/>
<item dataType="int" stringID="XST_REGISTERS" value="68">
<item dataType="int" stringID="XST_1BIT_REGISTER" value="58"/>
<item dataType="int" stringID="XST_14BIT_REGISTER" value="2"/>
<item dataType="int" stringID="XST_16BIT_REGISTER" value="3"/>
<item dataType="int" stringID="XST_8BIT_REGISTER" value="1"/>
<item dataType="int" stringID="XST_2BIT_REGISTER" value="1"/>
<item dataType="int" stringID="XST_4BIT_REGISTER" value="1"/>
<item dataType="int" stringID="XST_8BIT_REGISTER" value="3"/>
</item>
<item dataType="int" stringID="XST_COMPARATORS" value="4"></item>
<item dataType="int" stringID="XST_COMPARATORS" value="7"></item>
<item dataType="int" stringID="XST_TRISTATES" value="27">
<item dataType="int" stringID="XST_1BIT_TRISTATE_BUFFER" value="25"/>
</item>
<item dataType="int" stringID="XST_XORS" value="1">
<item dataType="int" stringID="XST_1BIT_XOR2" value="1"/>
</item>
</section>
<section stringID="XST_ADVANCED_HDL_SYNTHESIS_REPORT">
<item dataType="int" stringID="XST_FSMS" value="2"/>
<item dataType="int" stringID="XST_ROMS" value="1"></item>
<item dataType="int" stringID="XST_REGISTERS" value="49">
<item dataType="int" stringID="XST_FLIPFLOPS" value="49"/>
<item dataType="int" stringID="XST_REGISTERS" value="57">
<item dataType="int" stringID="XST_FLIPFLOPS" value="57"/>
</item>
<item dataType="int" stringID="XST_COMPARATORS" value="1"></item>
<item dataType="int" stringID="XST_COMPARATORS" value="4"></item>
</section>
<section stringID="XST_PARTITION_REPORT">
<section stringID="XST_PARTITION_IMPLEMENTATION_STATUS">
@@ -116,32 +121,32 @@
<item stringID="XST_IOS" value="116"/>
</section>
<section stringID="XST_CELL_USAGE">
<item dataType="int" stringID="XST_BELS" value="1038">
<item dataType="int" stringID="XST_AND2" value="344"/>
<item dataType="int" stringID="XST_AND3" value="50"/>
<item dataType="int" stringID="XST_AND4" value="7"/>
<item dataType="int" stringID="XST_BELS" value="1263">
<item dataType="int" stringID="XST_AND2" value="379"/>
<item dataType="int" stringID="XST_AND3" value="54"/>
<item dataType="int" stringID="XST_AND4" value="10"/>
<item dataType="int" stringID="XST_GND" value="1"/>
<item dataType="int" stringID="XST_INV" value="382"/>
<item dataType="int" stringID="XST_OR2" value="205"/>
<item dataType="int" stringID="XST_INV" value="465"/>
<item dataType="int" stringID="XST_OR2" value="277"/>
<item dataType="int" stringID="XST_VCC" value="1"/>
<item dataType="int" stringID="XST_XOR2" value="17"/>
<item dataType="int" stringID="XST_XOR2" value="51"/>
</item>
<item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="115">
<item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="145">
<item dataType="int" stringID="XST_FD" value="1"/>
<item dataType="int" stringID="XST_FDC" value="19"/>
<item dataType="int" stringID="XST_FDCE" value="3"/>
<item dataType="int" stringID="XST_FDP" value="42"/>
<item dataType="int" stringID="XST_FDPE" value="50"/>
<item dataType="int" stringID="XST_FDC" value="22"/>
<item dataType="int" stringID="XST_FDCE" value="8"/>
<item dataType="int" stringID="XST_FDP" value="46"/>
<item dataType="int" stringID="XST_FDPE" value="68"/>
</item>
<item dataType="int" stringID="XST_IO_BUFFERS" value="109">
<item dataType="int" stringID="XST_IBUF" value="19"/>
<item dataType="int" stringID="XST_IO_BUFFERS" value="112">
<item dataType="int" stringID="XST_IBUF" value="22"/>
<item dataType="int" stringID="XST_OBUF" value="33"/>
</item>
</section>
</section>
<section stringID="XST_ERRORS_STATISTICS">
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_ERRORS" value="0"/>
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="51"/>
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="48"/>
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="10"/>
</section>
</application>
Logic/LAN_IDE/_ngo/netlist.lst
+1 -1
View File
@@ -1,2 +1,2 @@
C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1546423824
C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1546463209
OK
Logic/LAN_IDE/_xmsgs/cpldfit.xmsgs
+1 -10
View File
@@ -11,16 +11,7 @@
<msg type="info" file="Cpld" num="0" delta="new" >Inferring BUFG constraint for signal &apos;<arg fmt="%s" index="1">CLK_EXT</arg>&apos; based upon the LOC constraint &apos;<arg fmt="%s" index="2">P30</arg>&apos;. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.
</msg>
<msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">A&lt;1&gt;</arg>&apos;. The input(s) are unused after optimization. Please verify functionality via simulation.
</msg>
<msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">AS</arg>&apos;. The input(s) are unused after optimization. Please verify functionality via simulation.
</msg>
<msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">C1</arg>&apos;. The input(s) are unused after optimization. Please verify functionality via simulation.
</msg>
<msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">C3</arg>&apos;. The input(s) are unused after optimization. Please verify functionality via simulation.
<msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">AUTOBOOT_OFF</arg>&apos;. The input(s) are unused after optimization. Please verify functionality via simulation.
</msg>
<msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">CP_IRQ</arg>&apos;. The input(s) are unused after optimization. Please verify functionality via simulation.
Logic/LAN_IDE/_xmsgs/ngdbuild.xmsgs
-3
View File
@@ -5,8 +5,5 @@
behavior or data corruption. It is strongly advised that
users do not edit the contents of this file. -->
<messages>
<msg type="warning" file="NgdBuild" num="470" delta="old" ><arg fmt="%s" index="1">bidirect</arg> pad net &apos;<arg fmt="%s" index="2">A&lt;1&gt;</arg>&apos; has no legal driver
</msg>
</messages>
Logic/LAN_IDE/_xmsgs/xst.xmsgs
+1 -10
View File
@@ -26,27 +26,18 @@
<msg type="info" file="Xst" num="2561" delta="old" >Always blocking tristate driving signal &lt;<arg fmt="%s" index="1">A</arg>&gt; in unit &lt;<arg fmt="%s" index="2">LAN_IDE_CP</arg>&gt; is removed.
</msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">C3</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">IDE_WAIT</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">AS</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">AUTOBOOT_OFF</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">CP_IRQ</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="2565" delta="old" >Inout &lt;<arg fmt="%s" index="1">A&lt;1&gt;</arg>&gt; is never assigned.
</msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">MTCR</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">C1</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="info" file="Xst" num="1799" delta="old" >State <arg fmt="%s" index="1">start_read_upper</arg> is never reached in FSM &lt;<arg fmt="%s" index="2">LAN_SM</arg>&gt;.
</msg>
Logic/LAN_IDE/area.xds
+1 -1
View File
@@ -7,7 +7,7 @@
<Properties>
<property name="Synthesize - XST:Optimization Goal" value="Speed"/>
<property name="Synthesize - XST:FSM Encoding Algorithm" value="Gray"/>
<property name="Synthesize - XST:FSM Encoding Algorithm" value="Compact"/>
<property name="Synthesize - XST:Safe Implementation" value="No"/>
</Properties>
Logic/LAN_IDE/log.txt
+2363 -1057
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File diff suppressed because it is too large Load Diff
Logic/LAN_IDE/webtalk_pn.xml
+2 -2
View File
@@ -3,7 +3,7 @@
<!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application name="pn" timeStamp="Wed Jan 02 11:10:15 2019">
<application name="pn" timeStamp="Wed Jan 02 22:06:29 2019">
<section name="Project Information" visible="false">
<property name="ProjectID" value="A2E624B6ED1449CD92F77DE849BF7B51" type="project"/>
<property name="ProjectIteration" value="0" type="project"/>
@@ -18,7 +18,7 @@ This means code written to parse this file will need to be revisited each subseq
<property name="PROP_ManualCompileOrderImp" value="false" type="design"/>
<property name="PROP_PropSpecInProjFile" value="Store all values" type="design"/>
<property name="PROP_Simulator" value="ISim (VHDL/Verilog)" type="design"/>
<property name="PROP_SynthFsmEncode" value="Gray" type="process"/>
<property name="PROP_SynthFsmEncode" value="Compact" type="process"/>
<property name="PROP_SynthTopFile" value="changed" type="process"/>
<property name="PROP_Top_Level_Module_Type" value="HDL" type="design"/>
<property name="PROP_UseSmartGuide" value="false" type="design"/>
Logic/LAN_IDE/xlnx_auto_0_xdb/cst.xbcd
BIN
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