Logic update

- fix LAN port byte swap with byte writes
  - swap UDS/LDS mapping to WRL/WRL
  - duplicate LAN DQ bytes by re-using ClockPort logic
  - issues:
    - DQ logic doesn't fit in one Function Block anymore
    - some optimization/relaxation might be needed
This commit is contained in:
HenrykRichter
2018-04-30 08:11:45 +02:00
parent dd0537a36d
commit c8ff432e7a
2 changed files with 1764 additions and 1756 deletions
+1750 -1750
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