Dominick.Vansevenant/Zorro-LAN-IDE
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fixed hang if no IDE-device was connected

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This commit is contained in:
MHeinrichs
2022-03-08 13:51:53 +01:00
parent 65af379ced
commit 876b2adb5b
17 changed files with 11767 additions and 22370 deletions
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Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd
+34 -36
View File
@@ -60,7 +60,7 @@ entity LAN_IDE_CP is
RESET : in STD_LOGIC; RESET : in STD_LOGIC;
INT2_OUT : out STD_LOGIC; INT2_OUT : out STD_LOGIC;
INT6_OUT : out STD_LOGIC; INT6_OUT : out STD_LOGIC;
AUTOBOOT_OFF : in STD_LOGIC; IDE_OFF : in STD_LOGIC;
ROM_B : out STD_LOGIC_VECTOR (1 downto 0); ROM_B : out STD_LOGIC_VECTOR (1 downto 0);
ROM_OE : out STD_LOGIC; ROM_OE : out STD_LOGIC;
IDE_WAIT : in STD_LOGIC; IDE_WAIT : in STD_LOGIC;
@@ -132,6 +132,7 @@ architecture Behavioral of LAN_IDE_CP is
signal CP_WE_S: std_logic; signal CP_WE_S: std_logic;
signal CP_WE_QUIRK: std_logic; signal CP_WE_QUIRK: std_logic;
signal SET_FREQUENCY: std_logic :='1'; signal SET_FREQUENCY: std_logic :='1';
signal CLEAR_REGISTER: std_logic :='1';
signal LAN_CS_RST: std_logic; signal LAN_CS_RST: std_logic;
signal LAN_WR_RST: std_logic; signal LAN_WR_RST: std_logic;
@@ -173,7 +174,6 @@ begin
LAN_CS_RST<='1'; LAN_CS_RST<='1';
LAN_WR_RST<='1'; LAN_WR_RST<='1';
elsif(rising_edge(CLK_EXT))then elsif(rising_edge(CLK_EXT))then
--init the clock afer reset finished! --init the clock afer reset finished!
case LAN_RST_SM is case LAN_RST_SM is
when nop=> when nop=>
@@ -189,6 +189,7 @@ begin
LAN_WR_RST<='0'; LAN_WR_RST<='0';
LAN_RST_SM<=clr_commit; LAN_RST_SM<=clr_commit;
when clr_commit=> when clr_commit=>
CLEAR_REGISTER <='0';
LAN_CS_RST<='0'; LAN_CS_RST<='0';
LAN_WR_RST<='1'; LAN_WR_RST<='1';
LAN_RST_SM<=wait1; LAN_RST_SM<=wait1;
@@ -337,7 +338,7 @@ begin
IDE_TERM <= '1'; IDE_TERM <= '1';
elsif falling_edge(AMIGA_CLK) then elsif falling_edge(AMIGA_CLK) then
if(ide='0' and AS ='0')then if(ide='0' and DS ='0')then
if(RW='0')then if(RW='0')then
--the write goes to the hdd! --the write goes to the hdd!
IDE_W_S <= '0'; IDE_W_S <= '0';
@@ -453,7 +454,7 @@ begin
elsif(AUTO_CONFIG_DONE = 2)then elsif(AUTO_CONFIG_DONE = 2)then
CP_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress CP_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress
SHUT_UP(1) <= '0'; --enable board SHUT_UP(1) <= '0'; --enable board
AUTO_CONFIG_DONE_CYCLE <= ('0' & AUTOBOOT_OFF); --done here, if Autoboot_off = 0 skip ide part! AUTO_CONFIG_DONE_CYCLE <= ('0' & IDE_OFF); --done here, if Autoboot_off = 0 skip ide part!
elsif(AUTO_CONFIG_DONE = 1)then elsif(AUTO_CONFIG_DONE = 1)then
IDE_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress IDE_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress
SHUT_UP(2) <= '0'; --enable board SHUT_UP(2) <= '0'; --enable board
@@ -473,13 +474,14 @@ begin
ADDRESS_SAMPLE: process(CLK_EXT) ADDRESS_SAMPLE: process(CLK_EXT)
begin begin
if(rising_edge(CLK_EXT))then if(falling_edge(CLK_EXT))then
--clear and set-register adresses during initialization phase --clear and set-register adresses during initialization phase
if(LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit)then if(SET_FREQUENCY = '1')then
A_LAN_OUT <= LAN_A_CLRREG(13 downto 0); if(CLEAR_REGISTER ='1')then
end if; A_LAN_OUT <= LAN_A_CLRREG(13 downto 0);
if(LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit)then else
A_LAN_OUT <= LAN_A_SETREG(13 downto 0); A_LAN_OUT <= LAN_A_SETREG(13 downto 0);
end if;
end if; end if;
if(lan_adr ='0')then --the lanport is shifted by one adress line but I forgot to adopt the clockport address! if(lan_adr ='0')then --the lanport is shifted by one adress line but I forgot to adopt the clockport address!
@@ -494,27 +496,24 @@ begin
DATA_SAMPLE: process(CLK_EXT) DATA_SAMPLE: process(CLK_EXT)
begin begin
if(rising_edge(CLK_EXT))then if(falling_edge(CLK_EXT))then
if(SET_FREQUENCY = '1' and CLEAR_REGISTER ='1')then
D_IN <= LAN_D_CLR;
elsif(SET_FREQUENCY = '1' and CLEAR_REGISTER ='0') then
D_IN <= LAN_D_SET;
elsif(lan_adr ='0' and lan_adr_sw ='0') then
D_IN <= D( 7 downto 0) & D(15 downto 8);
elsif(cp ='0') then
D_IN <= D(15 downto 8) & D(15 downto 8);
elsif((lan_adr ='0' and lan_adr_sw ='1') or ide ='0') then
D_IN <= D( 15 downto 0);
else
D_IN <= x"FFFF";
end if;
if(DS='0')then if(DS='0')then
if(LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) then
D_IN <= LAN_D_CLR;
end if;
if(LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) then
D_IN <= LAN_D_SET;
end if;
if(lan_adr ='0' and lan_adr_sw ='0') then
D_IN <= D( 7 downto 0) & D(15 downto 8);
end if;
if(cp ='0') then
D_IN <= D(15 downto 8) & D(15 downto 8);
end if;
if((lan_adr ='0' and lan_adr_sw ='1') or ide ='0') then
D_IN <= D( 15 downto 0);
end if;
--out sample --out sample
if((lan_adr ='0' and lan_adr_sw ='1') or ide = '0') then if((lan_adr ='0' and lan_adr_sw ='1') or ide = '0') then
@@ -534,10 +533,10 @@ begin
end process; end process;
LAN_CS <= not(lan_adr) when LAN_RST_SM =done else not(LAN_CS_RST); LAN_CS <= not(lan_adr) when SET_FREQUENCY ='0' else not(LAN_CS_RST);
LAN_WRL <= not(LAN_WRL_S) when AS ='0' and LAN_RST_SM =done else not(LAN_WR_RST); LAN_WRL <= not(LAN_WRL_S) when AS ='0' and SET_FREQUENCY ='0' else not(LAN_WR_RST);
LAN_WRH <= not(LAN_WRH_S) when AS ='0' and LAN_RST_SM =done else not(LAN_WR_RST); LAN_WRH <= not(LAN_WRH_S) when AS ='0' and SET_FREQUENCY ='0' else not(LAN_WR_RST);
LAN_RD <= not(LAN_RD_S ) when (AS_D ='0' or AS ='0') and LAN_RST_SM =done else '0'; LAN_RD <= not(LAN_RD_S ) when (AS_D ='0' or AS ='0') and SET_FREQUENCY ='0' else '0';
CP_WE <= CP_WE_S when AS ='0' and CP_WE_QUIRK ='1' else '1'; CP_WE <= CP_WE_S when AS ='0' and CP_WE_QUIRK ='1' else '1';
CP_RD <= CP_RD_S when (AS_D ='0' or AS ='0') else '1'; CP_RD <= CP_RD_S when (AS_D ='0' or AS ='0') else '1';
@@ -551,6 +550,7 @@ begin
DQ <= D_IN when (RW='0' and AS='0' and (lan_adr ='0' or cp ='0' or ide ='0')) or SET_FREQUENCY ='1' DQ <= D_IN when (RW='0' and AS='0' and (lan_adr ='0' or cp ='0' or ide ='0')) or SET_FREQUENCY ='1'
else (others => '1') when (RW='1' and AS='1' and ide ='0') -- The bus must be cleared to avoid a hang, if no IDE drive is attached
else (others => 'Z'); else (others => 'Z');
IDE_W <= IDE_W_S when AS = '0' else '1'; IDE_W <= IDE_W_S when AS = '0' else '1';
@@ -578,8 +578,6 @@ begin
--DTACK <= IDE_TERM when ide='0' and (AS_D ='0' or AS ='0') else 'Z'; --DTACK <= IDE_TERM when ide='0' and (AS_D ='0' or AS ='0') else 'Z';
DTACK <= 'Z'; DTACK <= 'Z';
A <= (others => 'Z'); A <= (others => 'Z');
MTACK <= 'Z'; MTACK <= 'Z';
end Behavioral; end Behavioral;
Logic/LAN_IDE_V2/LAN_IDE_CP-z2v2.jed
+1418 -1418
View File
File diff suppressed because it is too large Load Diff
Logic/LAN_IDE_V2/LAN_IDE_CP.cmd_log
+101
View File
@@ -854,3 +854,104 @@ cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt
XSLTProcess LAN_IDE_CP_build.xml XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 50 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init high -exhaust -inputs 54 -pterms 90 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
Logic/LAN_IDE_V2/LAN_IDE_CP.gyd
+87 -86
View File
@@ -2,7 +2,6 @@ Pin Freeze File: version P.20131013
95288XL144 XC95288XL-10-TQ144 95288XL144 XC95288XL-10-TQ144
AS S:PIN80 AS S:PIN80
AUTOBOOT_OFF S:PIN75
A<12> S:PIN61 A<12> S:PIN61
A<13> S:PIN64 A<13> S:PIN64
A<14> S:PIN66 A<14> S:PIN66
@@ -31,6 +30,7 @@ CP_IRQ S:PIN31
A<9> S:PIN58 A<9> S:PIN58
A<10> S:PIN59 A<10> S:PIN59
A<11> S:PIN60 A<11> S:PIN60
IDE_OFF S:PIN75
LAN_INT S:PIN111 LAN_INT S:PIN111
LDS S:PIN82 LDS S:PIN82
RESET S:PIN143 RESET S:PIN143
@@ -54,13 +54,21 @@ CFOUT S:PIN105
CP_RD S:PIN71 CP_RD S:PIN71
CP_WE S:PIN70 CP_WE S:PIN70
DQ<0> S:PIN118 DQ<0> S:PIN118
DQ<1> S:PIN117 DQ<10> S:PIN129
DQ<2> S:PIN120
DQ<11> S:PIN115 DQ<11> S:PIN115
DQ<12> S:PIN130 DQ<12> S:PIN130
DQ<13> S:PIN113 DQ<13> S:PIN113
DQ<14> S:PIN131 DQ<14> S:PIN131
DQ<15> S:PIN112 DQ<15> S:PIN112
DQ<1> S:PIN117
DQ<2> S:PIN120
DQ<3> S:PIN119
DQ<4> S:PIN124
DQ<5> S:PIN121
DQ<6> S:PIN126
DQ<7> S:PIN125
DQ<8> S:PIN128
DQ<9> S:PIN116
D<0> S:PIN2 D<0> S:PIN2
D<1> S:PIN17 D<1> S:PIN17
D<2> S:PIN39 D<2> S:PIN39
@@ -98,97 +106,90 @@ INT2_OUT S:PIN32
DTACK S:PIN85 DTACK S:PIN85
ROM_OE S:PIN35 ROM_OE S:PIN35
SLAVE S:PIN106 SLAVE S:PIN106
DQ<8> S:PIN128
DQ<4> S:PIN124
DQ<10> S:PIN129
DQ<7> S:PIN125
DQ<6> S:PIN126
DQ<5> S:PIN121
DQ<3> S:PIN119
DQ<9> S:PIN116
CP_CS S:PIN34 CP_CS S:PIN34
;The remaining section of the .gyd file is for documentation purposes only. ;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit. ;It shows where your internal equations were placed in the last successful fit.
PARTITION FB1_1 EXP30_ PARTITION FB1_3 AUTO_CONFIG_DONE_CYCLE_0_N2/AUTO_CONFIG_DONE_CYCLE_0_N2_D2 $OpTx$FX_DC$34 D_OUT<5> D_OUT<4>
PARTITION FB1_4 EXP31_ D_OUT<5> D_OUT<4> EXP32_ AS_D IDE_CS_0_OBUF ROM_OE_S IDE_CS_1_OBUF
IDE_CS_0_OBUF LAN_BASEADR<0> IDE_CS_1_OBUF IDE_BASEADR<0> LAN_RD_S IDE_A_0_OBUF$BUF0 IDE_W_S IDE_A_2_OBUF$BUF0
IDE_A_0_OBUF$BUF0 CP_BASEADR<1> IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0 IDE_A_1_OBUF$BUF0 IDE_R_S IDE_R_OBUF IDE_ENABLE
CP_BASEADR<0> IDE_R_OBUF AUTO_CONFIG_DONE_CYCLE<0>
PARTITION FB2_1 D_OUT<13>/D_OUT<13>_TRST__$INT A_LAN_OUT<4> A_LAN_OUT<7> DQ<10>_BUFR.MC
A_LAN_OUT<6> EXP33_ EXP34_ EXP35_
EXP36_ D_OUT<6> EXP37_ D_OUT<3>
EXP38_ D_OUT<7> D_OUT<1> EXP39_
D_OUT<8> EXP40_
PARTITION FB3_1 EXP41_ IDE_W_OBUF EXP42_ EXP43_
Dout1<3> EXP44_ CP_WE_QUIRK autoconfig
PARTITION FB3_11 EXP45_ ide EXP46_ ROM_B_0_OBUF$BUF5 PARTITION FB2_2 A_LAN_OUT<4> A_LAN_OUT<7>
SHUT_UP<2> AUTO_CONFIG_DONE<1> EXP47_ Dout1<0> PARTITION FB2_5 A_LAN_OUT<6>
PARTITION FB2_10 D_OUT<6>
PARTITION FB2_12 D_OUT<3>
PARTITION FB2_14 D_OUT<7> D_OUT<1>
PARTITION FB2_17 D_OUT<8>
PARTITION FB4_1 EXP48_ D_OUT<0> EXP49_ DQ<8>_BUFR.MC PARTITION FB3_1 EXP22_ IDE_W_OBUF
A_LAN_OUT<1> A_LAN_OUT<0> EXP50_ A_LAN_OUT<3> PARTITION FB3_9 SHUT_UP<1> LAN_IRQ_D0 IDE_BASEADR<6> IDE_BASEADR<1>
DQ<5>_BUFR.MC CP_WE_S LAN_WR_RST A_LAN_OUT<2> IDE_BASEADR<0> ROM_B_0_OBUF$BUF5 CP_BASEADR<6> CP_BASEADR<1>
DQ<3>_BUFR.MC A_LAN_OUT<5> D_IN<10>/D_IN<10>_TRST__$INT DQ<4>_BUFR.MC CP_BASEADR<0> LAN_IRQ_OUT
EXP51_ LAN_RST_SM_FSM_FFd2 PARTITION FB4_2 D_OUT<0>
PARTITION FB5_1 AS_D cp EXP52_ EXP53_ PARTITION FB4_5 A_LAN_OUT<1> A_LAN_OUT<0>
ROM_OE_OBUF EXP54_ PARTITION FB4_8 A_LAN_OUT<3>
PARTITION FB5_8 EXP55_ EXP56_ D_OUT<2> EXP57_ PARTITION FB4_12 A_LAN_OUT<2>
D_OUT<9> EXP58_ D_OUT<10> D_OUT<11> PARTITION FB4_14 A_LAN_OUT<5>
EXP59_ D_OUT<12> EXP60_ PARTITION FB4_18 CP_BASEADR_not0001/CP_BASEADR_not0001_D2
PARTITION FB6_1 EXP61_ ROM_B_0_OBUF$BUF4 A_LAN_OUT<12> LAN_RST_SM_FSM_FFd1 PARTITION FB5_1 EXP23_ cp EXP24_ EXP25_
A_LAN_OUT<13> A_LAN_OUT<10> LAN_RST_SM_FSM_FFd3 A_LAN_OUT<11> ROM_OE_OBUF
LAN_RST_SM_FSM_FFd5 A_LAN_OUT<8> EXP62_ EXP63_ PARTITION FB5_10 D_OUT<2>
lan_adr_sw A_LAN_OUT<9> LAN_RST_SM_FSM_FFd4 LAN_RST_SM_FSM_FFd6 PARTITION FB5_12 D_OUT<9>
SET_FREQUENCY lan_adr PARTITION FB5_14 D_OUT<10> D_OUT<11>
PARTITION FB7_1 EXP64_ EXP65_ D_OUT<13> EXP66_ PARTITION FB5_17 D_OUT<12>
D_OUT<14> EXP67_ EXP68_ EXP69_
EXP70_ Dout1<2> EXP71_ D_OUT<15>
EXP72_ EXP73_ EXP74_ EXP75_
Dout1<1> EXP76_
PARTITION FB8_1 EXP77_ D_IN<12> D_IN<14> EXP78_
LAN_WRH_OBUF EXP79_ DQ<7>_BUFR.MC LAN_CS_OBUF
CP_BASEADR<4> LAN_RD_OBUF IDE_ENABLE
PARTITION FB8_17 EXP80_ DQ<6>_BUFR.MC
PARTITION FB9_1 IDE_W_S/IDE_W_S_CLKF IDE_R_S/IDE_R_S_CLKF IDE_ENABLE/IDE_ENABLE_CLKF IDE_BASEADR<7>/IDE_BASEADR<7>_CLKF
IDE_BASEADR<6>/IDE_BASEADR<6>_CLKF IDE_BASEADR<5>/IDE_BASEADR<5>_CLKF IDE_BASEADR<4>/IDE_BASEADR<4>_CLKF IDE_BASEADR<3>/IDE_BASEADR<3>_CLKF
IDE_BASEADR<2>/IDE_BASEADR<2>_CLKF IDE_BASEADR<1>/IDE_BASEADR<1>_CLKF IDE_BASEADR<0>/IDE_BASEADR<0>_CLKF Dout1<3>/Dout1<3>_CLKF
Dout1<2>/Dout1<2>_CLKF Dout1<1>/Dout1<1>_CLKF Dout1<0>/Dout1<0>_CLKF CP_WE_S/CP_WE_S_CLKF
CP_WE_QUIRK/CP_WE_QUIRK_CLKF CP_RD_S/CP_RD_S_CLKF
PARTITION FB10_1 EXP81_ D_IN<1> D_IN<0> EXP82_
_24_ D_IN<2> EXP83_ _23_
PARTITION FB10_10 _19_ _21_ _22_ PARTITION FB6_2 ROM_B_0_OBUF$BUF4 A_LAN_OUT<12>
PARTITION FB10_14 _18_ EXP84_ DQ<9>_BUFR.MC _20_ PARTITION FB6_5 A_LAN_OUT<13> A_LAN_OUT<10>
LAN_RD_S PARTITION FB6_8 A_LAN_OUT<11>
PARTITION FB11_1 LAN_RST_SM_FSM_FFd8 LAN_RST_SM_FSM_FFd7 LAN_CS_RST CP_BASEADR<7>/CP_BASEADR<7>_CLKF PARTITION FB6_10 A_LAN_OUT<8> $OpTx$FX_SC$321 $OpTx$FX_DC$30 $OpTx$FX_DC$3
CP_BASEADR<6>/CP_BASEADR<6>_CLKF CP_BASEADR<5>/CP_BASEADR<5>_CLKF CP_BASEADR<4>/CP_BASEADR<4>_CLKF CP_BASEADR<3>/CP_BASEADR<3>_CLKF A_LAN_OUT<9> $OpTx$FX_DC$1 $OpTx$FX_SC$52 D_IN<0>
CP_BASEADR<2>/CP_BASEADR<2>_CLKF CP_BASEADR<1>/CP_BASEADR<1>_CLKF CP_BASEADR<0>/CP_BASEADR<0>_CLKF ROM_B_0_OBUF$BUF0 DQ_or0001/DQ_or0001_D2
AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF ROM_B_0_OBUF AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF AUTO_CONFIG_DONE<1>/AUTO_CONFIG_DONE<1>_CLKF PARTITION FB7_3 D_OUT<13>
CP_WE_OBUF AUTO_CONFIG_DONE<0>/AUTO_CONFIG_DONE<0>_CLKF PARTITION FB7_5 D_OUT<14>
PARTITION FB12_1 AUTO_CONFIG_DONE<0> EXP85_ LAN_IRQ_OUT EXP86_ PARTITION FB7_12 D_OUT<15>
D_IN<15> IDE_R_S EXP87_ D_IN<13> PARTITION FB7_15 LAN_RST_SM_FSM_FFd8 D_IN<13> D_IN<5> BUF_D_IN<13>
CP_RD_S D_IN<11> EXP88_ _25_
IDE_W_S LAN_IRQ_D0 LAN_WRH_S LAN_WRL_S
ROM_OE_S LAN_INT_ENABLE
PARTITION FB13_1 IDE_BASEADR<4> CP_RD_OBUF LAN_BASEADR<6> EXP89_
PARTITION FB13_6 SHUT_UP<1> SHUT_UP<0> LAN_BASEADR<4> LAN_BASEADR<7> PARTITION FB8_2 DQ_12_IOBUFE DQ_14_IOBUFE
EXP90_ EXP91_ LAN_BASEADR<1> IDE_BASEADR<7> PARTITION FB8_5 LAN_WRH_OBUF
LAN_WRL_OBUF IDE_BASEADR<1> CP_BASEADR<7> EXP92_ PARTITION FB8_8 LAN_CS_OBUF
AUTO_CONFIG_DONE_CYCLE<1> PARTITION FB8_10 LAN_RD_OBUF
PARTITION FB14_1 LAN_BASEADR<5> LAN_BASEADR<3> ROM_B_0_OBUF$BUF2 EXP93_ PARTITION FB8_12 D_IN<9> D_IN<8> D_IN<3> D_IN<2>
IDE_BASEADR<6> IDE_BASEADR<5> IDE_BASEADR<3> IDE_BASEADR<2> D_IN<1> D_IN<11> D_IN<10>
CP_BASEADR<6> CP_BASEADR<5> CFOUT_OBUF CP_BASEADR<3> PARTITION FB9_1 EXP26_
CP_BASEADR<2> SLAVE_OBUF ROM_B_0_OBUF$BUF1 LAN_BASEADR<2> PARTITION FB9_11 LAN_BASEADR_not0001/LAN_BASEADR_not0001_D2 $OpTx$FX_DC$31 LAN_BASEADR<4> LAN_BASEADR<3>
EXP94_ EXP95_ LAN_BASEADR<2> LAN_BASEADR<1> LAN_BASEADR<0> Dout1<3>
PARTITION FB15_1 SHUT_UP<1>/SHUT_UP<1>_CLKF SHUT_UP<0>/SHUT_UP<0>_CLKF ROM_OE_S/ROM_OE_S_CLKF LAN_WRL_S/LAN_WRL_S_CLKF
LAN_WRH_S/LAN_WRH_S_CLKF LAN_RD_S/LAN_RD_S_CLKF LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF LAN_IRQ_D0/LAN_IRQ_D0_CLKF PARTITION FB10_2 DQ_1_IOBUFE DQ_0_IOBUFE $OpTx$FX_DC$19 DQ_3_IOBUFE
LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF ROM_B_0_OBUF$BUF6 DQ_2_IOBUFE DQ_9_IOBUFE/DQ_9_IOBUFE_TRST DQ_5_IOBUFE LAN_WRL_S
LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE LAN_WRH_S
LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF DQ_8_IOBUFE CP_WE_S CP_RD_S DQ_10_IOBUFE
PARTITION FB16_10 ROM_B_0_OBUF$BUF3 LAN_INT_ENABLE
PARTITION FB16_17 lan_adr_sw/lan_adr_sw_CLKF SHUT_UP<2>/SHUT_UP<2>_CLKF PARTITION FB11_1 EXP27_ EXP28_
PARTITION FB11_12 ROM_B_0_OBUF$BUF0 autoconfig ROM_B_0_OBUF SHUT_UP<0>
CP_WE_QUIRK CP_WE_OBUF ide
PARTITION FB12_1 SET_FREQUENCY D_IN<15> D_IN<14> D_IN<12>
DQ_15_IOBUFE LAN_RST_SM_FSM_FFd7 LAN_RST_SM_FSM_FFd4 DQ_13_IOBUFE
LAN_CS_RST DQ_11_IOBUFE CLEAR_REGISTER DQ_9_IOBUFE
D_IN<7> D_IN<6> BUF_D_IN<15> BUF_D_IN<14>
BUF_D_IN<12> D_IN<4>
PARTITION FB13_2 CP_RD_OBUF
PARTITION FB13_7 SHUT_UP<2> IDE_BASEADR<7> IDE_BASEADR<5> IDE_BASEADR<4>
IDE_BASEADR<3> IDE_BASEADR<2> CP_BASEADR<7> LAN_WRL_OBUF
CP_BASEADR<5> CP_BASEADR<4> CP_BASEADR<3> CP_BASEADR<2>
PARTITION FB14_1 Dout1<0> EXP29_ ROM_B_0_OBUF$BUF2 Dout1<2>
D_OUT_or0002/D_OUT_or0002_D2 AUTO_CONFIG_DONE_CYCLE<0> AUTO_CONFIG_DONE_CYCLE<1> AUTO_CONFIG_DONE<0>
AUTO_CONFIG_DONE<1> IDE_BASEADR_not0001/IDE_BASEADR_not0001_D2 CFOUT_OBUF
PARTITION FB14_14 SLAVE_OBUF ROM_B_0_OBUF$BUF1 Dout1<1> EXP30_
EXP31_
PARTITION FB15_9 LAN_WR_RST LAN_RST_SM_FSM_FFd5 LAN_RST_SM_FSM_FFd2 ROM_B_0_OBUF$BUF6
LAN_RST_SM_FSM_FFd1 lan_adr lan_adr_sw LAN_BASEADR<7>
LAN_BASEADR<6> LAN_BASEADR<5>
PARTITION FB16_6 D_OUT_and0001/D_OUT_and0001_D2 lan_adr_sw/lan_adr_sw_CLKF LAN_RST_SM_FSM_FFd6 LAN_RST_SM_FSM_FFd3
ROM_B_0_OBUF$BUF3 $OpTx$FX_DC$45 $OpTx$FX_DC$44 $OpTx$FX_DC$43
$OpTx$FX_DC$42 $OpTx$FX_DC$41 $OpTx$FX_DC$40 $OpTx$FX_DC$39
$OpTx$FX_DC$38
Logic/LAN_IDE_V2/LAN_IDE_CP.mfd
+2001 -4440
View File
File diff suppressed because it is too large Load Diff
Logic/LAN_IDE_V2/LAN_IDE_CP.nga
+1 -1
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File diff suppressed because one or more lines are too long
Logic/LAN_IDE_V2/LAN_IDE_CP.ngd
+1 -1
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File diff suppressed because one or more lines are too long
Logic/LAN_IDE_V2/LAN_IDE_CP.pad
+2 -2
View File
@@ -1,7 +1,7 @@
Release 8.1i - Fit P.20131013 Release 8.1i - Fit P.20131013
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
3- 8-2022 12:35PM 3- 8-2022 1:48PM
NOTE: This file is designed to be imported into a spreadsheet program NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The pipe '|' such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
@@ -92,7 +92,7 @@ P71|CP_RD|O|I/O|OUTPUT|||||||||
P72|GND||GND|||||||||| P72|GND||GND||||||||||
P73|VCC||VCCIO|||||||||| P73|VCC||VCCIO||||||||||
P74|A<15>|I|I/O|INPUT||||||||| P74|A<15>|I|I/O|INPUT|||||||||
P75|AUTOBOOT_OFF|I|I/O|INPUT||||||||| P75|IDE_OFF|I|I/O|INPUT|||||||||
P76|LAN_WRL|O|I/O|OUTPUT||||||||| P76|LAN_WRL|O|I/O|OUTPUT|||||||||
P77|TIE||I/O|||||||||| P77|TIE||I/O||||||||||
P78|TIE||I/O|||||||||| P78|TIE||I/O||||||||||
Logic/LAN_IDE_V2/LAN_IDE_CP.rpt
+1692 -2674
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File diff suppressed because it is too large Load Diff
Logic/LAN_IDE_V2/LAN_IDE_CP.syr
+36 -30
View File
@@ -56,7 +56,7 @@ Equivalent register Removal : YES
---- General Options ---- General Options
Optimization Goal : Speed Optimization Goal : Speed
Optimization Effort : 2 Optimization Effort : 1
Keep Hierarchy : Yes Keep Hierarchy : Yes
Netlist Hierarchy : As_Optimized Netlist Hierarchy : As_Optimized
RTL Output : Yes RTL Output : Yes
@@ -89,7 +89,7 @@ Analyzing hierarchy for entity <LAN_IDE_CP> in library <work> (architecture <beh
* HDL Analysis * * HDL Analysis *
========================================================================= =========================================================================
Analyzing Entity <LAN_IDE_CP> in library <work> (Architecture <behavioral>). Analyzing Entity <LAN_IDE_CP> in library <work> (Architecture <behavioral>).
WARNING:Xst:819 - "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd" line 160: One or more signals are missing in the process sensitivity list. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are: WARNING:Xst:819 - "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd" line 161: One or more signals are missing in the process sensitivity list. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are:
<AMIGA_CLK> <AMIGA_CLK>
Entity <LAN_IDE_CP> analyzed. Unit <LAN_IDE_CP> generated. Entity <LAN_IDE_CP> analyzed. Unit <LAN_IDE_CP> generated.
@@ -119,7 +119,7 @@ WARNING:Xst:646 - Signal <DECODE_RESET> is assigned but never used. This unconne
| States | 8 | | States | 8 |
| Transitions | 8 | | Transitions | 8 |
| Inputs | 0 | | Inputs | 0 |
| Outputs | 9 | | Outputs | 4 |
| Clock | CLK_EXT (rising_edge) | | Clock | CLK_EXT (rising_edge) |
| Reset | LAN_RST_SM$and0000 (positive) | | Reset | LAN_RST_SM$and0000 (positive) |
| Reset type | asynchronous | | Reset type | asynchronous |
@@ -137,15 +137,16 @@ WARNING:Xst:646 - Signal <DECODE_RESET> is assigned but never used. This unconne
Found 1-bit tristate buffer for signal <INT2_OUT>. Found 1-bit tristate buffer for signal <INT2_OUT>.
Found 1-bit tristate buffer for signal <INT6_OUT>. Found 1-bit tristate buffer for signal <INT6_OUT>.
Found 14-bit register for signal <A_LAN_OUT>. Found 14-bit register for signal <A_LAN_OUT>.
Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 152. Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 153.
Found 1-bit register for signal <AS_D>. Found 1-bit register for signal <AS_D>.
Found 2-bit register for signal <AUTO_CONFIG_DONE>. Found 2-bit register for signal <AUTO_CONFIG_DONE>.
Found 2-bit register for signal <AUTO_CONFIG_DONE_CYCLE>. Found 2-bit register for signal <AUTO_CONFIG_DONE_CYCLE>.
Found 2-bit subtractor for signal <AUTO_CONFIG_DONE_CYCLE$addsub0000> created at line 466. Found 2-bit subtractor for signal <AUTO_CONFIG_DONE_CYCLE$addsub0000> created at line 467.
Found 1-bit register for signal <autoconfig>. Found 1-bit register for signal <autoconfig>.
Found 2-bit comparator greater for signal <autoconfig$cmp_gt0000> created at line 232. Found 2-bit comparator greater for signal <autoconfig$cmp_gt0000> created at line 233.
Found 1-bit register for signal <CLEAR_REGISTER>.
Found 1-bit register for signal <cp>. Found 1-bit register for signal <cp>.
Found 8-bit comparator equal for signal <cp$cmp_eq0000> created at line 241. Found 8-bit comparator equal for signal <cp$cmp_eq0000> created at line 242.
Found 8-bit register for signal <CP_BASEADR>. Found 8-bit register for signal <CP_BASEADR>.
Found 1-bit register for signal <CP_RD_S>. Found 1-bit register for signal <CP_RD_S>.
Found 1-bit register for signal <CP_WE_QUIRK>. Found 1-bit register for signal <CP_WE_QUIRK>.
@@ -153,17 +154,17 @@ WARNING:Xst:646 - Signal <DECODE_RESET> is assigned but never used. This unconne
Found 16-bit register for signal <D_IN>. Found 16-bit register for signal <D_IN>.
Found 16-bit register for signal <D_OUT>. Found 16-bit register for signal <D_OUT>.
Found 4-bit register for signal <Dout1>. Found 4-bit register for signal <Dout1>.
Found 3-bit comparator greater for signal <Dout1$cmp_gt0000> created at line 393. Found 3-bit comparator greater for signal <Dout1$cmp_gt0000> created at line 394.
Found 1-bit register for signal <ide>. Found 1-bit register for signal <ide>.
Found 8-bit comparator equal for signal <ide$cmp_eq0000> created at line 244. Found 8-bit comparator equal for signal <ide$cmp_eq0000> created at line 245.
Found 8-bit register for signal <IDE_BASEADR>. Found 8-bit register for signal <IDE_BASEADR>.
Found 1-bit register for signal <IDE_ENABLE>. Found 1-bit register for signal <IDE_ENABLE>.
Found 1-bit register for signal <IDE_R_S>. Found 1-bit register for signal <IDE_R_S>.
Found 1-bit register for signal <IDE_W_S>. Found 1-bit register for signal <IDE_W_S>.
Found 1-bit register for signal <lan_adr>. Found 1-bit register for signal <lan_adr>.
Found 1-bit register for signal <lan_adr_sw>. Found 1-bit register for signal <lan_adr_sw>.
Found 8-bit comparator equal for signal <lan_adr_sw$cmp_eq0000> created at line 235. Found 8-bit comparator equal for signal <lan_adr_sw$cmp_eq0000> created at line 236.
Found 2-bit comparator less for signal <lan_adr_sw$cmp_lt0000> created at line 236. Found 2-bit comparator less for signal <lan_adr_sw$cmp_lt0000> created at line 237.
Found 8-bit register for signal <LAN_BASEADR>. Found 8-bit register for signal <LAN_BASEADR>.
Found 1-bit register for signal <LAN_CS_RST>. Found 1-bit register for signal <LAN_CS_RST>.
Found 1-bit register for signal <LAN_INT_ENABLE>. Found 1-bit register for signal <LAN_INT_ENABLE>.
@@ -178,7 +179,7 @@ WARNING:Xst:646 - Signal <DECODE_RESET> is assigned but never used. This unconne
Found 3-bit register for signal <SHUT_UP>. Found 3-bit register for signal <SHUT_UP>.
Summary: Summary:
inferred 1 Finite State Machine(s). inferred 1 Finite State Machine(s).
inferred 24 D-type flip-flop(s). inferred 25 D-type flip-flop(s).
inferred 1 Adder/Subtractor(s). inferred 1 Adder/Subtractor(s).
inferred 6 Comparator(s). inferred 6 Comparator(s).
inferred 1 Xor(s). inferred 1 Xor(s).
@@ -192,8 +193,8 @@ HDL Synthesis Report
Macro Statistics Macro Statistics
# Adders/Subtractors : 1 # Adders/Subtractors : 1
2-bit subtractor : 1 2-bit subtractor : 1
# Registers : 34 # Registers : 35
1-bit register : 25 1-bit register : 26
14-bit register : 1 14-bit register : 1
16-bit register : 2 16-bit register : 2
2-bit register : 2 2-bit register : 2
@@ -232,6 +233,8 @@ Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:8]> with one-hot encodin
------------------------ ------------------------
WARNING:Xst:1426 - The value init of the FF/Latch 0 hinder the constant cleaning in the block SET_FREQUENCY. WARNING:Xst:1426 - The value init of the FF/Latch 0 hinder the constant cleaning in the block SET_FREQUENCY.
You should achieve better results by setting this init to 0. You should achieve better results by setting this init to 0.
WARNING:Xst:1426 - The value init of the FF/Latch 0 hinder the constant cleaning in the block CLEAR_REGISTER.
You should achieve better results by setting this init to 0.
========================================================================= =========================================================================
Advanced HDL Synthesis Report Advanced HDL Synthesis Report
@@ -240,8 +243,8 @@ Macro Statistics
# FSMs : 1 # FSMs : 1
# Adders/Subtractors : 1 # Adders/Subtractors : 1
2-bit subtractor : 1 2-bit subtractor : 1
# Registers : 24 # Registers : 25
Flip-Flops : 24 Flip-Flops : 25
# Comparators : 3 # Comparators : 3
8-bit comparator equal : 3 8-bit comparator equal : 3
@@ -252,8 +255,11 @@ Macro Statistics
========================================================================= =========================================================================
WARNING:Xst:1426 - The value init of the FF/Latch SET_FREQUENCY hinder the constant cleaning in the block LAN_IDE_CP. WARNING:Xst:1426 - The value init of the FF/Latch SET_FREQUENCY hinder the constant cleaning in the block LAN_IDE_CP.
You should achieve better results by setting this init to 0. You should achieve better results by setting this init to 0.
WARNING:Xst:1426 - The value init of the FF/Latch CLEAR_REGISTER hinder the constant cleaning in the block LAN_IDE_CP.
You should achieve better results by setting this init to 0.
Optimizing unit <LAN_IDE_CP> ... Optimizing unit <LAN_IDE_CP> ...
implementation constraint: INIT=s : CLEAR_REGISTER
implementation constraint: INIT=s : SET_FREQUENCY implementation constraint: INIT=s : SET_FREQUENCY
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd1 implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd1
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd2 implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd2
@@ -294,21 +300,21 @@ Design Statistics
# IOs : 113 # IOs : 113
Cell Usage : Cell Usage :
# BELS : 884 # BELS : 822
# AND2 : 255 # AND2 : 197
# AND3 : 44 # AND3 : 52
# AND4 : 6 # AND4 : 13
# AND8 : 3 # AND8 : 3
# GND : 1 # GND : 1
# INV : 348 # INV : 346
# OR2 : 166 # OR2 : 164
# OR3 : 32 # OR3 : 19
# OR4 : 3 # OR4 : 1
# XOR2 : 26 # XOR2 : 26
# FlipFlops/Latches : 111 # FlipFlops/Latches : 112
# FD : 15 # FD : 17
# FDC : 7 # FDC : 7
# FDCE : 33 # FDCE : 32
# FDP : 18 # FDP : 18
# FDPE : 38 # FDPE : 38
# IO Buffers : 106 # IO Buffers : 106
@@ -320,13 +326,13 @@ Cell Usage :
Total REAL time to Xst completion: 3.00 secs Total REAL time to Xst completion: 3.00 secs
Total CPU time to Xst completion: 2.76 secs Total CPU time to Xst completion: 2.81 secs
--> -->
Total memory usage is 4514448 kilobytes Total memory usage is 4514408 kilobytes
Number of errors : 0 ( 0 filtered) Number of errors : 0 ( 0 filtered)
Number of warnings : 14 ( 0 filtered) Number of warnings : 16 ( 0 filtered)
Number of infos : 1 ( 0 filtered) Number of infos : 1 ( 0 filtered)
Logic/LAN_IDE_V2/LAN_IDE_CP.tspec
+107 -253
View File
@@ -1,330 +1,184 @@
TS_CLK_EXT:FROM:D_IN<8>.Q:TO:D_OUT<0>.D:400 TS_CLK_EXT:FROM:D_IN<8>.Q:TO:D_OUT<0>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<0>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<0>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:D_OUT<0>.D:400
TS_CLK_EXT:FROM:D_IN<0>.Q:TO:D_OUT<0>.D:400 TS_CLK_EXT:FROM:D_IN<0>.Q:TO:D_OUT<0>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:D_OUT<0>.D:400
TS_CLK_EXT:FROM:D_IN<2>.Q:TO:D_OUT<10>.D:400 TS_CLK_EXT:FROM:D_IN<2>.Q:TO:D_OUT<10>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<10>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<10>.D:400
TS_CLK_EXT:FROM:D_OUT<10>.Q:TO:D_OUT<10>.D:400
TS_CLK_EXT:FROM:D_IN<10>.Q:TO:D_OUT<10>.D:400 TS_CLK_EXT:FROM:D_IN<10>.Q:TO:D_OUT<10>.D:400
TS_CLK_EXT:FROM:D_OUT<10>.Q:TO:D_OUT<10>.D:400
TS_CLK_EXT:FROM:D_IN<3>.Q:TO:D_OUT<11>.D:400 TS_CLK_EXT:FROM:D_IN<3>.Q:TO:D_OUT<11>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<11>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<11>.D:400
TS_CLK_EXT:FROM:D_OUT<11>.Q:TO:D_OUT<11>.D:400
TS_CLK_EXT:FROM:D_IN<11>.Q:TO:D_OUT<11>.D:400 TS_CLK_EXT:FROM:D_IN<11>.Q:TO:D_OUT<11>.D:400
TS_CLK_EXT:FROM:D_OUT<11>.Q:TO:D_OUT<11>.D:400
TS_CLK_EXT:FROM:D_IN<9>.Q:TO:D_OUT<1>.D:400 TS_CLK_EXT:FROM:D_IN<9>.Q:TO:D_OUT<1>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<1>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<1>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:D_OUT<1>.D:400
TS_CLK_EXT:FROM:D_IN<1>.Q:TO:D_OUT<1>.D:400 TS_CLK_EXT:FROM:D_IN<1>.Q:TO:D_OUT<1>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:D_OUT<1>.D:400
TS_CLK_EXT:FROM:D_IN<2>.Q:TO:D_OUT<2>.D:400 TS_CLK_EXT:FROM:D_IN<2>.Q:TO:D_OUT<2>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<2>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<2>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:D_OUT<2>.D:400
TS_CLK_EXT:FROM:D_IN<10>.Q:TO:D_OUT<2>.D:400 TS_CLK_EXT:FROM:D_IN<10>.Q:TO:D_OUT<2>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:D_OUT<2>.D:400
TS_CLK_EXT:FROM:D_IN<3>.Q:TO:D_OUT<3>.D:400 TS_CLK_EXT:FROM:D_IN<3>.Q:TO:D_OUT<3>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<3>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<3>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:D_OUT<3>.D:400
TS_CLK_EXT:FROM:D_IN<11>.Q:TO:D_OUT<3>.D:400 TS_CLK_EXT:FROM:D_IN<11>.Q:TO:D_OUT<3>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:D_OUT<3>.D:400
TS_CLK_EXT:FROM:D_IN<4>.Q:TO:D_OUT<4>.D:400 TS_CLK_EXT:FROM:D_IN<4>.Q:TO:D_OUT<4>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<4>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<4>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:D_OUT<4>.D:400
TS_CLK_EXT:FROM:D_IN<12>.Q:TO:D_OUT<4>.D:400 TS_CLK_EXT:FROM:D_IN<12>.Q:TO:D_OUT<4>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:D_OUT<4>.D:400
TS_CLK_EXT:FROM:D_IN<5>.Q:TO:D_OUT<5>.D:400 TS_CLK_EXT:FROM:D_IN<5>.Q:TO:D_OUT<5>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<5>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<5>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:D_OUT<5>.D:400
TS_CLK_EXT:FROM:D_IN<13>.Q:TO:D_OUT<5>.D:400 TS_CLK_EXT:FROM:D_IN<13>.Q:TO:D_OUT<5>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:D_OUT<5>.D:400
TS_CLK_EXT:FROM:D_IN<6>.Q:TO:D_OUT<6>.D:400 TS_CLK_EXT:FROM:D_IN<6>.Q:TO:D_OUT<6>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<6>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<6>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:D_OUT<6>.D:400
TS_CLK_EXT:FROM:D_IN<14>.Q:TO:D_OUT<6>.D:400 TS_CLK_EXT:FROM:D_IN<14>.Q:TO:D_OUT<6>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:D_OUT<6>.D:400
TS_CLK_EXT:FROM:D_IN<7>.Q:TO:D_OUT<7>.D:400 TS_CLK_EXT:FROM:D_IN<7>.Q:TO:D_OUT<7>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<7>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<7>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:D_OUT<7>.D:400
TS_CLK_EXT:FROM:D_IN<15>.Q:TO:D_OUT<7>.D:400 TS_CLK_EXT:FROM:D_IN<15>.Q:TO:D_OUT<7>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:D_OUT<7>.D:400
TS_CLK_EXT:FROM:D_IN<0>.Q:TO:D_OUT<8>.D:400 TS_CLK_EXT:FROM:D_IN<0>.Q:TO:D_OUT<8>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<8>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<8>.D:400
TS_CLK_EXT:FROM:D_OUT<8>.Q:TO:D_OUT<8>.D:400
TS_CLK_EXT:FROM:D_IN<8>.Q:TO:D_OUT<8>.D:400 TS_CLK_EXT:FROM:D_IN<8>.Q:TO:D_OUT<8>.D:400
TS_CLK_EXT:FROM:D_OUT<8>.Q:TO:D_OUT<8>.D:400
TS_CLK_EXT:FROM:D_IN<1>.Q:TO:D_OUT<9>.D:400 TS_CLK_EXT:FROM:D_IN<1>.Q:TO:D_OUT<9>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<9>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<9>.D:400
TS_CLK_EXT:FROM:D_OUT<9>.Q:TO:D_OUT<9>.D:400
TS_CLK_EXT:FROM:D_IN<9>.Q:TO:D_OUT<9>.D:400 TS_CLK_EXT:FROM:D_IN<9>.Q:TO:D_OUT<9>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:D_IN<0>.D:400 TS_CLK_EXT:FROM:D_OUT<9>.Q:TO:D_OUT<9>.D:400
TS_CLK_EXT:FROM:D_IN<0>.Q:TO:D_IN<0>.D:400
TS_CLK_EXT:FROM:D_OUT<8>.Q:TO:D_IN<0>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<0>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<0>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<0>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<0>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<0>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<0>.D:400
TS_CLK_EXT:FROM:D_OUT<10>.Q:TO:D_IN<10>.D:400
TS_CLK_EXT:FROM:D_IN<10>.Q:TO:D_IN<10>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:D_IN<10>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<10>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<10>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<10>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<10>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<10>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<10>.D:400
TS_CLK_EXT:FROM:D_OUT<11>.Q:TO:D_IN<11>.D:400
TS_CLK_EXT:FROM:D_IN<11>.Q:TO:D_IN<11>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:D_IN<11>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<11>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<11>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<11>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<11>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<11>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<11>.D:400
TS_CLK_EXT:FROM:D_OUT<12>.Q:TO:D_IN<12>.D:400
TS_CLK_EXT:FROM:D_IN<12>.Q:TO:D_IN<12>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:D_IN<12>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<12>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<12>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<12>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<12>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<12>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<12>.D:400
TS_CLK_EXT:FROM:D_OUT<13>.Q:TO:D_IN<13>.D:400
TS_CLK_EXT:FROM:D_IN<13>.Q:TO:D_IN<13>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:D_IN<13>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<13>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<13>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<13>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<13>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<13>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<13>.D:400
TS_CLK_EXT:FROM:D_OUT<14>.Q:TO:D_IN<14>.D:400
TS_CLK_EXT:FROM:D_IN<14>.Q:TO:D_IN<14>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:D_IN<14>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<14>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<14>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<14>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<14>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<14>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<14>.D:400
TS_CLK_EXT:FROM:D_OUT<15>.Q:TO:D_IN<15>.D:400
TS_CLK_EXT:FROM:D_IN<15>.Q:TO:D_IN<15>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:D_IN<15>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<15>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<15>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<15>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<15>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<15>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<15>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:D_IN<1>.D:400
TS_CLK_EXT:FROM:D_IN<1>.Q:TO:D_IN<1>.D:400
TS_CLK_EXT:FROM:D_OUT<9>.Q:TO:D_IN<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<1>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:D_IN<2>.D:400
TS_CLK_EXT:FROM:D_IN<2>.Q:TO:D_IN<2>.D:400
TS_CLK_EXT:FROM:D_OUT<10>.Q:TO:D_IN<2>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<2>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<2>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<2>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<2>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<2>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<2>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:D_IN<3>.D:400
TS_CLK_EXT:FROM:D_IN<3>.Q:TO:D_IN<3>.D:400
TS_CLK_EXT:FROM:D_OUT<11>.Q:TO:D_IN<3>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<3>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<3>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<3>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<3>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<3>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<3>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:D_IN<4>.D:400
TS_CLK_EXT:FROM:D_IN<4>.Q:TO:D_IN<4>.D:400
TS_CLK_EXT:FROM:D_OUT<12>.Q:TO:D_IN<4>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<4>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<4>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<4>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<4>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<4>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<4>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:D_IN<5>.D:400
TS_CLK_EXT:FROM:D_IN<5>.Q:TO:D_IN<5>.D:400
TS_CLK_EXT:FROM:D_OUT<13>.Q:TO:D_IN<5>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<5>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<5>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<5>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<5>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<5>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<5>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:D_IN<6>.D:400
TS_CLK_EXT:FROM:D_IN<6>.Q:TO:D_IN<6>.D:400
TS_CLK_EXT:FROM:D_OUT<14>.Q:TO:D_IN<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<6>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:D_IN<7>.D:400
TS_CLK_EXT:FROM:D_IN<7>.Q:TO:D_IN<7>.D:400
TS_CLK_EXT:FROM:D_OUT<15>.Q:TO:D_IN<7>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<7>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<7>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<7>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<7>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<7>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<7>.D:400
TS_CLK_EXT:FROM:D_OUT<8>.Q:TO:D_IN<8>.D:400
TS_CLK_EXT:FROM:D_IN<8>.Q:TO:D_IN<8>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:D_IN<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<8>.D:400
TS_CLK_EXT:FROM:D_OUT<9>.Q:TO:D_IN<9>.D:400
TS_CLK_EXT:FROM:D_IN<9>.Q:TO:D_IN<9>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:D_IN<9>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:D_IN<9>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:D_IN<9>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:D_IN<9>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:D_IN<9>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:D_IN<9>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:D_IN<9>.D:400
TS_CLK_EXT:FROM:D_OUT<12>.Q:TO:D_OUT<12>.D:400
TS_CLK_EXT:FROM:D_IN<4>.Q:TO:D_OUT<12>.D:400 TS_CLK_EXT:FROM:D_IN<4>.Q:TO:D_OUT<12>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<12>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<12>.D:400
TS_CLK_EXT:FROM:D_IN<12>.Q:TO:D_OUT<12>.D:400 TS_CLK_EXT:FROM:D_IN<12>.Q:TO:D_OUT<12>.D:400
TS_CLK_EXT:FROM:D_OUT<13>.Q:TO:D_OUT<13>.D:400 TS_CLK_EXT:FROM:D_OUT<12>.Q:TO:D_OUT<12>.D:400
TS_CLK_EXT:FROM:D_IN<5>.Q:TO:D_OUT<13>.D:400 TS_CLK_EXT:FROM:D_IN<5>.Q:TO:D_OUT<13>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<13>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<13>.D:400
TS_CLK_EXT:FROM:D_IN<13>.Q:TO:D_OUT<13>.D:400 TS_CLK_EXT:FROM:D_IN<13>.Q:TO:D_OUT<13>.D:400
TS_CLK_EXT:FROM:D_OUT<14>.Q:TO:D_OUT<14>.D:400 TS_CLK_EXT:FROM:D_OUT<13>.Q:TO:D_OUT<13>.D:400
TS_CLK_EXT:FROM:D_IN<6>.Q:TO:D_OUT<14>.D:400 TS_CLK_EXT:FROM:D_IN<6>.Q:TO:D_OUT<14>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<14>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<14>.D:400
TS_CLK_EXT:FROM:D_IN<14>.Q:TO:D_OUT<14>.D:400 TS_CLK_EXT:FROM:D_IN<14>.Q:TO:D_OUT<14>.D:400
TS_CLK_EXT:FROM:D_OUT<15>.Q:TO:D_OUT<15>.D:400 TS_CLK_EXT:FROM:D_OUT<14>.Q:TO:D_OUT<14>.D:400
TS_CLK_EXT:FROM:D_IN<7>.Q:TO:D_OUT<15>.D:400 TS_CLK_EXT:FROM:D_IN<7>.Q:TO:D_OUT<15>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<15>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_OUT<15>.D:400
TS_CLK_EXT:FROM:D_IN<15>.Q:TO:D_OUT<15>.D:400 TS_CLK_EXT:FROM:D_IN<15>.Q:TO:D_OUT<15>.D:400
TS_CLK_EXT:FROM:D_OUT<15>.Q:TO:D_OUT<15>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd1.D:400 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd1.D:400 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd1.RSTF:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd1.RSTF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:LAN_RST_SM_FSM_FFd3.D:400 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd3.RSTF:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd3.RSTF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:LAN_RST_SM_FSM_FFd6.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd6.RSTF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd2.RSTF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:LAN_RST_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd4.RSTF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:LAN_RST_SM_FSM_FFd5.D:400 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:LAN_RST_SM_FSM_FFd5.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd5.RSTF:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd5.RSTF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd8.Q:TO:LAN_RST_SM_FSM_FFd7.D:400 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:LAN_RST_SM_FSM_FFd6.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd7.RSTF:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd6.RSTF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_WR_RST.D:400 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_WR_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:LAN_WR_RST.D:400 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:LAN_WR_RST.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_WR_RST.SETF:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_WR_RST.SETF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_CS_RST.D:400 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_CS_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd8.Q:TO:LAN_CS_RST.D:400 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd8.Q:TO:LAN_CS_RST.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_CS_RST.SETF:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_CS_RST.SETF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd2.RSTF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:LAN_RST_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd4.RSTF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd8.Q:TO:LAN_RST_SM_FSM_FFd7.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd7.RSTF:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<0>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<0>.Q:TO:A_LAN_OUT<0>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<0>.Q:TO:A_LAN_OUT<0>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<0>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<10>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<0>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<0>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<0>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<0>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<0>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<10>.Q:TO:A_LAN_OUT<10>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<10>.Q:TO:A_LAN_OUT<10>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<10>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<11>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<10>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<10>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<10>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<10>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<10>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<11>.Q:TO:A_LAN_OUT<11>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<11>.Q:TO:A_LAN_OUT<11>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<11>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<12>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<11>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<11>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<11>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<11>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<11>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<12>.Q:TO:A_LAN_OUT<12>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<12>.Q:TO:A_LAN_OUT<12>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<12>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<13>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<12>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<12>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<12>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<12>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<12>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<13>.Q:TO:A_LAN_OUT<13>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<13>.Q:TO:A_LAN_OUT<13>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<13>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<13>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<13>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<13>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<13>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<13>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<1>.Q:TO:A_LAN_OUT<1>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<1>.Q:TO:A_LAN_OUT<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<1>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<2>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<1>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<2>.Q:TO:A_LAN_OUT<2>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<2>.Q:TO:A_LAN_OUT<2>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<2>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<3>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<2>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<2>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<2>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<2>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<2>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<3>.Q:TO:A_LAN_OUT<3>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<3>.Q:TO:A_LAN_OUT<3>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<3>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<4>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<3>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<3>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<3>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<3>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<3>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<4>.Q:TO:A_LAN_OUT<4>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<4>.Q:TO:A_LAN_OUT<4>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<4>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<5>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<4>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<4>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<4>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<4>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<4>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<5>.Q:TO:A_LAN_OUT<5>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<5>.Q:TO:A_LAN_OUT<5>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<5>.D:400 TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:A_LAN_OUT<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<5>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<5>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<5>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<5>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<5>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<6>.Q:TO:A_LAN_OUT<6>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<6>.Q:TO:A_LAN_OUT<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<6>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<7>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<6>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<7>.Q:TO:A_LAN_OUT<7>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<7>.Q:TO:A_LAN_OUT<7>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<7>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<7>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<7>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<7>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<7>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<7>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<8>.Q:TO:A_LAN_OUT<8>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<8>.Q:TO:A_LAN_OUT<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<8>.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:A_LAN_OUT<9>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<8>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<8>.D:400
TS_CLK_EXT:FROM:A_LAN_OUT<9>.Q:TO:A_LAN_OUT<9>.D:400 TS_CLK_EXT:FROM:A_LAN_OUT<9>.Q:TO:A_LAN_OUT<9>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:A_LAN_OUT<9>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:A_LAN_OUT<9>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:A_LAN_OUT<9>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:A_LAN_OUT<9>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:A_LAN_OUT<9>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:A_LAN_OUT<9>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd8.SETF:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:SET_FREQUENCY.D:400 TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:SET_FREQUENCY.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:SET_FREQUENCY.D:400 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:SET_FREQUENCY.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:CLEAR_REGISTER.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:CLEAR_REGISTER.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:CLEAR_REGISTER.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:LAN_RST_SM_FSM_FFd8.SETF:400
TS_CLK_EXT:FROM:D_OUT<8>.Q:TO:D_IN<0>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:D_IN<0>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<0>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<0>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<10>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<10>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:D_IN<10>.D:400
TS_CLK_EXT:FROM:D_OUT<10>.Q:TO:D_IN<10>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<11>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<11>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:D_IN<11>.D:400
TS_CLK_EXT:FROM:D_OUT<11>.Q:TO:D_IN<11>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:D_IN<12>.D:400
TS_CLK_EXT:FROM:D_OUT<12>.Q:TO:D_IN<12>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<12>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<12>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:D_IN<13>.D:400
TS_CLK_EXT:FROM:D_OUT<13>.Q:TO:D_IN<13>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<13>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<13>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:D_IN<14>.D:400
TS_CLK_EXT:FROM:D_OUT<14>.Q:TO:D_IN<14>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<14>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<14>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:D_IN<15>.D:400
TS_CLK_EXT:FROM:D_OUT<15>.Q:TO:D_IN<15>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<15>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<15>.D:400
TS_CLK_EXT:FROM:D_OUT<9>.Q:TO:D_IN<1>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:D_IN<1>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<1>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<1>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<2>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<2>.D:400
TS_CLK_EXT:FROM:D_OUT<10>.Q:TO:D_IN<2>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:D_IN<2>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<3>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<3>.D:400
TS_CLK_EXT:FROM:D_OUT<11>.Q:TO:D_IN<3>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:D_IN<3>.D:400
TS_CLK_EXT:FROM:D_OUT<12>.Q:TO:D_IN<4>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:D_IN<4>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<4>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<4>.D:400
TS_CLK_EXT:FROM:D_OUT<13>.Q:TO:D_IN<5>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:D_IN<5>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<5>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<5>.D:400
TS_CLK_EXT:FROM:D_OUT<14>.Q:TO:D_IN<6>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:D_IN<6>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<6>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<6>.D:400
TS_CLK_EXT:FROM:D_OUT<15>.Q:TO:D_IN<7>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:D_IN<7>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<7>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<7>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<8>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<8>.D:400
TS_CLK_EXT:FROM:D_OUT<8>.Q:TO:D_IN<8>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:D_IN<8>.D:400
TS_CLK_EXT:FROM:CLEAR_REGISTER.Q:TO:D_IN<9>.D:400
TS_CLK_EXT:FROM:SET_FREQUENCY.Q:TO:D_IN<9>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:D_IN<9>.D:400
TS_CLK_EXT:FROM:D_OUT<9>.Q:TO:D_IN<9>.D:400
Logic/LAN_IDE_V2/LAN_IDE_CP.vhd
+2 -2
View File
@@ -63,7 +63,7 @@ entity LAN_IDE_CP is
RESET : in STD_LOGIC; RESET : in STD_LOGIC;
INT2_OUT : out STD_LOGIC; INT2_OUT : out STD_LOGIC;
INT6_OUT : out STD_LOGIC; INT6_OUT : out STD_LOGIC;
AUTOBOOT_OFF : in STD_LOGIC; IDE_OFF : in STD_LOGIC;
ROM_B : out STD_LOGIC_VECTOR (1 downto 0); ROM_B : out STD_LOGIC_VECTOR (1 downto 0);
ROM_OE : out STD_LOGIC; ROM_OE : out STD_LOGIC;
IDE_WAIT : in STD_LOGIC; IDE_WAIT : in STD_LOGIC;
@@ -507,7 +507,7 @@ begin
elsif rising_edge(CLK_EXT) then -- no reset, so wait for rising edge of the clock elsif rising_edge(CLK_EXT) then -- no reset, so wait for rising edge of the clock
D_Z2_OUT<="1111"; D_Z2_OUT<="1111";
if(AS='1')then if(AS='1')then
AUTO_CONFIG_Z2_DONE <= AUTO_CONFIG_Z2_DONE or AUTO_CONFIG_Z2_DONE_CYCLE or (not AUTOBOOT_OFF & "00") ; AUTO_CONFIG_Z2_DONE <= AUTO_CONFIG_Z2_DONE or AUTO_CONFIG_Z2_DONE_CYCLE or (not IDE_OFF & "00") ;
elsif(AUTOCONFIG_Z2_ACCESS= '1' and AS='0' and DS='0') then elsif(AUTOCONFIG_Z2_ACCESS= '1' and AS='0' and DS='0') then
case A(6 downto 1) is case A(6 downto 1) is
when "000000" => when "000000" =>
Logic/LAN_IDE_V2/LAN_IDE_CP.vm6
+6271 -13413
View File
File diff suppressed because it is too large Load Diff
Logic/LAN_IDE_V2/LAN_IDEz2v2.gise
+5 -5
View File
@@ -68,7 +68,7 @@
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
</transform> </transform>
<transform xil_pn:end_ts="1646739330" xil_pn:in_ck="-8368315473908605201" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="3376396177162561847" xil_pn:start_ts="1646739325"> <transform xil_pn:end_ts="1646743664" xil_pn:in_ck="-8368315473908605201" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="7640553560667877824" xil_pn:start_ts="1646743659">
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/> <status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
@@ -85,11 +85,11 @@
<outfile xil_pn:name="webtalk_pn.xml"/> <outfile xil_pn:name="webtalk_pn.xml"/>
<outfile xil_pn:name="xst"/> <outfile xil_pn:name="xst"/>
</transform> </transform>
<transform xil_pn:end_ts="1602102352" xil_pn:in_ck="176569500195729039" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-8537920303570934858" xil_pn:start_ts="1602102352"> <transform xil_pn:end_ts="1646742647" xil_pn:in_ck="176569500195729039" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-8537920303570934858" xil_pn:start_ts="1646742647">
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
</transform> </transform>
<transform xil_pn:end_ts="1646739333" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1646739330"> <transform xil_pn:end_ts="1646743667" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1646743664">
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="LAN_IDE_CP.bld"/> <outfile xil_pn:name="LAN_IDE_CP.bld"/>
@@ -98,7 +98,7 @@
<outfile xil_pn:name="_ngo"/> <outfile xil_pn:name="_ngo"/>
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/> <outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
</transform> </transform>
<transform xil_pn:end_ts="1646739362" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-35312228449237523" xil_pn:start_ts="1646739333"> <transform xil_pn:end_ts="1646743696" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-3180198092827876936" xil_pn:start_ts="1646743667">
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/> <status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
@@ -116,7 +116,7 @@
<outfile xil_pn:name="LAN_IDE_CP_html"/> <outfile xil_pn:name="LAN_IDE_CP_html"/>
<outfile xil_pn:name="LAN_IDE_CP_pad.csv"/> <outfile xil_pn:name="LAN_IDE_CP_pad.csv"/>
</transform> </transform>
<transform xil_pn:end_ts="1646739364" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1646739362"> <transform xil_pn:end_ts="1646743697" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1646743696">
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="LAN_IDE_CP.jed"/> <outfile xil_pn:name="LAN_IDE_CP.jed"/>
Logic/LAN_IDE_V2/LAN_IDEz2v2.xise
+4 -4
View File
@@ -44,7 +44,7 @@
<property xil_pn:name="Case Implementation Style" xil_pn:value="None" xil_pn:valueState="default"/> <property xil_pn:name="Case Implementation Style" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Clock Enable" xil_pn:value="true" xil_pn:valueState="default"/> <property xil_pn:name="Clock Enable" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Collapsing Input Limit (2-54)" xil_pn:value="54" xil_pn:valueState="default"/> <property xil_pn:name="Collapsing Input Limit (2-54)" xil_pn:value="54" xil_pn:valueState="default"/>
<property xil_pn:name="Collapsing Pterm Limit (1-90)" xil_pn:value="25" xil_pn:valueState="default"/> <property xil_pn:name="Collapsing Pterm Limit (1-90)" xil_pn:value="90" xil_pn:valueState="default"/>
<property xil_pn:name="Compile CPLD Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/> <property xil_pn:name="Compile CPLD Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile SIMPRIM (Timing) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/> <property xil_pn:name="Compile SIMPRIM (Timing) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Compile UNISIM (Functional) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/> <property xil_pn:name="Compile UNISIM (Functional) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
@@ -81,7 +81,7 @@
<property xil_pn:name="Hierarchy Separator" xil_pn:value="/" xil_pn:valueState="default"/> <property xil_pn:name="Hierarchy Separator" xil_pn:value="/" xil_pn:valueState="default"/>
<property xil_pn:name="I/O Pin Termination" xil_pn:value="Keeper" xil_pn:valueState="default"/> <property xil_pn:name="I/O Pin Termination" xil_pn:value="Keeper" xil_pn:valueState="default"/>
<property xil_pn:name="ISim UUT Instance Name" xil_pn:value="UUT" xil_pn:valueState="default"/> <property xil_pn:name="ISim UUT Instance Name" xil_pn:value="UUT" xil_pn:valueState="default"/>
<property xil_pn:name="Implementation Template" xil_pn:value="Optimize Balance" xil_pn:valueState="default"/> <property xil_pn:name="Implementation Template" xil_pn:value="Optimize Density" xil_pn:valueState="non-default"/>
<property xil_pn:name="Implementation Top" xil_pn:value="Architecture|LAN_IDE_CP|Behavioral" xil_pn:valueState="non-default"/> <property xil_pn:name="Implementation Top" xil_pn:value="Architecture|LAN_IDE_CP|Behavioral" xil_pn:valueState="non-default"/>
<property xil_pn:name="Implementation Top File" xil_pn:value="LAN_IDE_CP-Z2v2.vhd" xil_pn:valueState="non-default"/> <property xil_pn:name="Implementation Top File" xil_pn:value="LAN_IDE_CP-Z2v2.vhd" xil_pn:valueState="non-default"/>
<property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/LAN_IDE_CP" xil_pn:valueState="non-default"/> <property xil_pn:name="Implementation Top Instance Path" xil_pn:value="/LAN_IDE_CP" xil_pn:valueState="non-default"/>
@@ -101,7 +101,7 @@
<property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/> <property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/> <property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/> <property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Logic Optimization" xil_pn:value="Speed" xil_pn:valueState="default"/> <property xil_pn:name="Logic Optimization" xil_pn:value="Density" xil_pn:valueState="default"/>
<property xil_pn:name="Macro Preserve" xil_pn:value="true" xil_pn:valueState="default"/> <property xil_pn:name="Macro Preserve" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Macrocell Power Setting" xil_pn:value="Std" xil_pn:valueState="default"/> <property xil_pn:name="Macrocell Power Setting" xil_pn:value="Std" xil_pn:valueState="default"/>
<property xil_pn:name="Manual Implementation Compile Order" xil_pn:value="false" xil_pn:valueState="default"/> <property xil_pn:name="Manual Implementation Compile Order" xil_pn:value="false" xil_pn:valueState="default"/>
@@ -111,7 +111,7 @@
<property xil_pn:name="Mux Extraction" xil_pn:value="Yes" xil_pn:valueState="default"/> <property xil_pn:name="Mux Extraction" xil_pn:value="Yes" xil_pn:valueState="default"/>
<property xil_pn:name="Netlist Hierarchy" xil_pn:value="As Optimized" xil_pn:valueState="default"/> <property xil_pn:name="Netlist Hierarchy" xil_pn:value="As Optimized" xil_pn:valueState="default"/>
<property xil_pn:name="Number of Clock Buffers" xil_pn:value="4" xil_pn:valueState="default"/> <property xil_pn:name="Number of Clock Buffers" xil_pn:value="4" xil_pn:valueState="default"/>
<property xil_pn:name="Optimization Effort" xil_pn:value="High" xil_pn:valueState="non-default"/> <property xil_pn:name="Optimization Effort" xil_pn:value="Normal" xil_pn:valueState="default"/>
<property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default"/> <property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default"/>
<property xil_pn:name="Other CPLD Fitter Command Line Options" xil_pn:value="" xil_pn:valueState="default"/> <property xil_pn:name="Other CPLD Fitter Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/> <property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/>
Logic/LAN_IDE_V2/iseconfig/LAN_IDE_CP.xreport
+1 -1
View File
@@ -1,7 +1,7 @@
<?xml version='1.0' encoding='UTF-8'?> <?xml version='1.0' encoding='UTF-8'?>
<report-views version="2.0" > <report-views version="2.0" >
<header> <header>
<DateModified>2022-03-05T22:51:19</DateModified> <DateModified>2022-03-08T12:40:08</DateModified>
<ModuleName>LAN_IDE_CP</ModuleName> <ModuleName>LAN_IDE_CP</ModuleName>
<SummaryTimeStamp>2021-07-30T01:01:15</SummaryTimeStamp> <SummaryTimeStamp>2021-07-30T01:01:15</SummaryTimeStamp>
<SavedFilePath>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/iseconfig/LAN_IDE_CP.xreport</SavedFilePath> <SavedFilePath>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/iseconfig/LAN_IDE_CP.xreport</SavedFilePath>
Logic/LAN_IDE_V2/pinlist.ucf
+1 -1
View File
@@ -38,7 +38,7 @@ NET "A_LAN<7>" LOC = "P10" ;
NET "A_LAN<8>" LOC = "P140" ; NET "A_LAN<8>" LOC = "P140" ;
NET "A_LAN<9>" LOC = "P142" ; NET "A_LAN<9>" LOC = "P142" ;
NET "AS" LOC = "P80" ; NET "AS" LOC = "P80" ;
NET "AUTOBOOT_OFF" LOC = "P75" ; NET "IDE_OFF" LOC = "P75" ;
NET "BERR" LOC = "P98" ; NET "BERR" LOC = "P98" ;
NET "C1" LOC = "P103" ; NET "C1" LOC = "P103" ;
NET "C3" LOC = "P102" ; NET "C3" LOC = "P102" ;