LAN driver update
- separate semaphore for write queue (about 2% more speed) - re-enabled init optimization (avoidance of full chip resets, still experimental)
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@@ -66,6 +66,12 @@ PRIORITY=PRI/K/N,BPS/K/N,MTU/K/N,FULLDUPLEX/S,FLOWCONTROL/S,TIMER/K/N,MULTICAST/
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Changelog:
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----------
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2.4 - added second semaphore, specifically for the write list
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- recompiled using GCC 2.95 for slightly smaller binary
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- avoid full ethernet chip reset on startup when the
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registers seem to be in a sane state (faster init, especially
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with DHCP)
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2.3 - implemented fine grained multicast filter hashes
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2.2 - some more tuning to RX/TX scheduling
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@@ -27,8 +27,8 @@ compiler_vcc = 0
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# prefix for system includes (ASM)
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# native AmigaOS compilation: set PREFX=GG: or PREFX=ADE:, depending on toolchain
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###############################################################################
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PREFX = /opt/amigaos-68k/
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#PREFX = gg:
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#PREFX = /opt/amigaos-68k/
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PREFX = gg:
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SYSINC = $(PREFX)os-include
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###############################################################################
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@@ -54,8 +54,9 @@ else
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CCX = m68k-amigaos-gcc
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LINK = $(CCX) -nostartfiles -s
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LINKEXE = $(CCX) -s -noixemul
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CFLAGS = -O3 -s -m$(CPU) -Wall -noixemul -mregparm=4 -fomit-frame-pointer -msoft-float -noixemul
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CFLAGS2 = -O3 -s -m$(CPU2) -Wall -noixemul -mregparm=4 -fomit-frame-pointer -msoft-float -noixemul
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#$(CPU)
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CFLAGS = -Os -s -m$(CPU) -Wall -noixemul -mregparm=4 -fomit-frame-pointer -msoft-float -noixemul
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CFLAGS2 = -Os -s -m$(CPU2) -Wall -noixemul -mregparm=4 -fomit-frame-pointer -msoft-float -noixemul
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VASMFORMAT = -m$(CPU) -Faout -nowarn=2064 -quiet -I$(SYSINC)
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VASMFORMAT2 = -m$(CPU2) -Faout -nowarn=2064 -quiet -I$(SYSINC)
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@@ -33,7 +33,7 @@ ASMOBJECTS = $(SUBDIR)/enc624j6l.o $(SUBDIR)/intervaltimer.o kprintf.o
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DEVICEID=enc624j6net.device
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DEFINES = -DHW_DMA_TX # -DPROTO_V2EXPNET
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ASMDEFS = -DHW_DMA_TX # -DPROTO_V2EXPNET
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CPU = 68020
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CPU = 68060
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DEVICEID2=enc624j6net.device_68000
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DEFINES2 = # -DPROTO_V2EXPNET
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@@ -120,6 +120,7 @@ ASM SAVEDS struct Device *DevInit( ASMR(d0) DEVBASEP ASMREG(d0)
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dbNewList( (struct List*)&db->db_Units[i].du_WriteQueue );
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dbNewList( (struct List*)&db->db_Units[i].du_EventQueue );
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InitSemaphore( &db->db_Units[i].du_Sem );
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InitSemaphore( &db->db_Units[i].du_WrSem );
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db->db_Units[i].du_MTU = DEF_MTU;
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db->db_Units[i].du_BitPerSec = DEF_BPS;
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}
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@@ -484,12 +485,27 @@ ASM SAVEDS VOID DevBeginIO( ASMR(a1) struct IOSana2Req *ioreq ASMREG(a1),
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}
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else
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{
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#if 0
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LONG code;
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LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq );
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ObtainSemaphore(&db->db_Units[unit].du_WrSem);
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code = write_frame( db, unit, ioreq );
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if( code >= 0 )
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{
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db->db_Units[unit].du_DevStats.PacketsSent++;
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ioreq->ios2_Req.io_Error = S2ERR_NO_ERROR;
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ioreq->ios2_WireError = S2WERR_GENERIC_ERROR;
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}
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ReleaseSemaphore(&db->db_Units[unit].du_WrSem);
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#else
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ioreq->ios2_Req.io_Flags &= ~SANA2IOF_QUICK;
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ObtainSemaphore(&db->db_Units[unit].du_Sem);
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ObtainSemaphore(&db->db_Units[unit].du_WrSem);
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ADDTAIL((struct List*)&db->db_Units[unit].du_WriteQueue,(struct Node*)ioreq);
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ReleaseSemaphore(&db->db_Units[unit].du_Sem);
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ReleaseSemaphore(&db->db_Units[unit].du_WrSem);
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Signal( (struct Task*)db->db_ServerProc, SIGBREAKF_CTRL_F );
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ioreq = (0);
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#endif
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}
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}
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}
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@@ -74,6 +74,7 @@ struct DevUnit {
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volatile struct List du_EventQueue; /* Event queue */
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struct SignalSemaphore du_Sem; /* list locking (global per unit) */
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struct SignalSemaphore du_WrSem; /* experimental: separate Sempaphore for write list */
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ULONG du_OpenCount; /* unit openers */
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ULONG du_Flags; /* unit flags */
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@@ -73,6 +73,7 @@ DUF_PROMISC EQU (1<<DUB_PROMISC)
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STRUCT du_WriteQueue,LH_SIZE ;TX queue
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STRUCT du_EventQueue,LH_SIZE ;Event queue
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STRUCT du_Sem,SS_SIZE ;list locking (global per unit)
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STRUCT du_WrSem,SS_SIZE ;write list locking
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ULONG du_OpenCount ;unit openers
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ULONG du_Flags ;unit flags
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@@ -21,8 +21,8 @@
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;
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; enable debugging code block (comment/uncomment, see below)
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DEBUG EQU 0
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GLOBALINT_BOARD EQU 1 ;if 1, then toggle board interrupt, else ENC624 INTIE
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OPT_AVOID_DEFAULT_RESETS EQU 0 ;if 1, then check valid Microchip MAC OUI and don't reset the whole chip if the MAC address is ok
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GLOBALINT_BOARD EQU 0 ;if 1, then toggle board interrupt, else ENC624 INTIE
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OPT_AVOID_DEFAULT_RESETS EQU 1 ;if 1, then check valid Microchip MAC OUI and don't reset the whole chip if the MAC address is ok
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incdir src:baxnet/trunk/source/
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;Temp:Amiga/src/Zorro-LAN-IDE.git/Driver/enc624j6net/
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@@ -702,6 +702,8 @@ void myhw_ControlIntervalTimer( DEVBASEP )
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flag = -1; /* stop timer */
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else flag = 0; /* no change */
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}
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if( hwd->timervalue < 1000 )
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flag = -1;
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if( flag > 0 )
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StartIntervalTimer( &hwd->ivtimer, hwd->timervalue );
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@@ -94,11 +94,12 @@ static void server_Offline_CancelRequests( DEVBASEP , ULONG unit )
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type = GetSucc( type );
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}
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server_AbortList( db, (struct List*)&db->db_Units[unit].du_WriteQueue );
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server_AbortList( db, (struct List*)&db->db_Units[unit].du_EventQueue );
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server_AbortList( db, (struct List*)&db->db_Units[unit].du_ReadOrphans );
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ReleaseSemaphore( &db->db_Units[unit].du_Sem );
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ObtainSemaphore( &db->db_Units[unit].du_WrSem );
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server_AbortList( db, (struct List*)&db->db_Units[unit].du_WriteQueue );
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ReleaseSemaphore( &db->db_Units[unit].du_WrSem );
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/* clear Multicast list, TODO: subroutine */
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{
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@@ -722,7 +723,8 @@ LONG server_writeerror( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq, LONG cod
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HW_DMA_TX is defined by the Makefile. One of the chunks
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is the constant-size header (14 Bytes) and the other is the payload.
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*/
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static LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq )
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//static
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LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq )
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{
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LONG ret;/* = SERR_OK;*/
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UBYTE *copy_ptr,*frame;
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@@ -816,7 +818,7 @@ static LONG server_writequeue( DEVBASEP, ULONG unit )
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#endif
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struct IOSana2Req *ioreq,*nextio;
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ObtainSemaphore( &db->db_Units[unit].du_Sem );
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ObtainSemaphore( &db->db_Units[unit].du_WrSem );
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#if 1
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/* whole queue per call */
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@@ -871,7 +873,7 @@ static LONG server_writequeue( DEVBASEP, ULONG unit )
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#endif
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}
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ReleaseSemaphore( &db->db_Units[unit].du_Sem );
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ReleaseSemaphore( &db->db_Units[unit].du_WrSem );
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return SERR_OK;
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}
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@@ -977,7 +979,7 @@ static LONG server_readqueue( DEVBASEP, ULONG unit )
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/* desired type not found, get orphan list */
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db->db_Units[unit].du_DevStats.UnknownTypesReceived++;
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orphan:
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/*orphan:*/
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ioreq = (struct IOSana2Req *)GetHead( (struct List*)&db->db_Units[unit].du_ReadOrphans );
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if( ioreq )
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{
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@@ -1023,7 +1025,7 @@ havetype:
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db->db_Units[unit].du_DevStats.Overruns++;
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type->srt_Sana2PacketTypeStats.PacketsDropped++;
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D4(("No Reader for frame\n"));
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goto orphan; /* does it help if we give the frame to the orphan list? */
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/* goto orphan; */ /* does it help if we give the frame to the orphan list? */
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}
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nextframe:
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ReleaseSemaphore( &db->db_Units[unit].du_Sem );
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@@ -39,7 +39,8 @@ LONG server_writeerror( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq, LONG cod
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#ifdef EXTERNAL_WRITE_FRAME
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LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq );
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#else
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static LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq );
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//static
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LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq );
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#endif
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static LONG server_writequeue( DEVBASETYPE*, ULONG );
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