Dominick.Vansevenant/Zorro-LAN-IDE
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AC working and swapping disabled

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use fit.bat 54 35
This commit is contained in:
MHeinrichs
2018-12-18 11:59:02 +01:00
parent 11a6adca8a
commit 118d024b37
41 changed files with 18052 additions and 16929 deletions
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Logic/LAN_IDE/LAN_IDE.gise
+27 -15
View File
@@ -32,6 +32,7 @@
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="LAN_IDE_CP.ngc"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGD" xil_pn:name="LAN_IDE_CP.ngd"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="LAN_IDE_CP.ngr"/>
<file xil_pn:fileType="FILE_PAD_MISC" xil_pn:name="LAN_IDE_CP.pad"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PNX" xil_pn:name="LAN_IDE_CP.pnx"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="LAN_IDE_CP.prj"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.rpt"/>
@@ -39,10 +40,13 @@
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="LAN_IDE_CP.syr"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.tspec"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VM6" xil_pn:name="LAN_IDE_CP.vm6"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.xml"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="LAN_IDE_CP.xst"/>
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP_build.xml"/>
<file xil_pn:fileType="FILE_HTML" xil_pn:name="LAN_IDE_CP_envsettings.html"/>
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="LAN_IDE_CP_html"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="LAN_IDE_CP_ngdbuild.xrpt"/>
<file xil_pn:fileType="FILE_PAD_EXCEL_REPORT" xil_pn:name="LAN_IDE_CP_pad.csv"/>
<file xil_pn:fileType="FILE_HTML" xil_pn:name="LAN_IDE_CP_summary.html"/>
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="LAN_IDE_CP_vhdl.prj"/>
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="LAN_IDE_CP_xst.xrpt"/>
@@ -55,7 +59,15 @@
</files>
<transforms xmlns="http://www.xilinx.com/XMLSchema">
<transform xil_pn:end_ts="1545083163" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="6322792436244515286" xil_pn:start_ts="1545083153">
<transform xil_pn:end_ts="1545128934" xil_pn:name="TRAN_copyInitialToXSTAbstractSynthesis" xil_pn:start_ts="1545128934">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1545128934" xil_pn:name="TRAN_schematicsToHdl" xil_pn:prop_ck="5081391373936803697" xil_pn:start_ts="1545128934">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1545129162" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="1235887333676579674" xil_pn:start_ts="1545129151">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
@@ -76,7 +88,7 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1545083171" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1545083163">
<transform xil_pn:end_ts="1545129170" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1545129162">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
@@ -86,36 +98,36 @@
<outfile xil_pn:name="_ngo"/>
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
</transform>
<transform xil_pn:end_ts="1545083201" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-1014768965495450326" xil_pn:start_ts="1545083171">
<status xil_pn:value="FailedRun"/>
<transform xil_pn:end_ts="1545129211" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-1014768965495450326" xil_pn:start_ts="1545129170">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="LAN_IDE_CP.gyd"/>
<outfile xil_pn:name="LAN_IDE_CP.mfd"/>
<outfile xil_pn:name="LAN_IDE_CP.nga"/>
<outfile xil_pn:name="LAN_IDE_CP.pad"/>
<outfile xil_pn:name="LAN_IDE_CP.pnx"/>
<outfile xil_pn:name="LAN_IDE_CP.rpt"/>
<outfile xil_pn:name="LAN_IDE_CP.tspec"/>
<outfile xil_pn:name="LAN_IDE_CP.vm6"/>
<outfile xil_pn:name="LAN_IDE_CP.xml"/>
<outfile xil_pn:name="LAN_IDE_CP_build.xml"/>
<outfile xil_pn:name="LAN_IDE_CP_html"/>
<outfile xil_pn:name="LAN_IDE_CP_pad.csv"/>
</transform>
<transform xil_pn:end_ts="1545081837" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1545081834">
<transform xil_pn:end_ts="1545129213" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1545129211">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForInputs"/>
<status xil_pn:value="OutOfDateForPredecessor"/>
<status xil_pn:value="OutOfDateForOutputs"/>
<status xil_pn:value="InputChanged"/>
<status xil_pn:value="OutputChanged"/>
<outfile xil_pn:name="LAN_IDE_CP.jed"/>
</transform>
<transform xil_pn:end_ts="1545080319" xil_pn:in_ck="-2520376148396285089" xil_pn:name="TRAN_impactProgrammingTool_CPLD" xil_pn:prop_ck="-3598488201878296819" xil_pn:start_ts="1545080319">
<transform xil_pn:end_ts="1545129218" xil_pn:in_ck="-2520376148396285089" xil_pn:name="TRAN_impactProgrammingTool_CPLD" xil_pn:prop_ck="-3598488201878296819" xil_pn:start_ts="1545129218">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForInputs"/>
<status xil_pn:value="OutOfDateForPredecessor"/>
<status xil_pn:value="InputChanged"/>
</transform>
<transform xil_pn:name="TRAN_timRpt">
<status xil_pn:value="AbortedRun"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForInputs"/>
<status xil_pn:value="OutOfDateForPredecessor"/>
<status xil_pn:value="InputAdded"/>
<status xil_pn:value="InputChanged"/>
</transform>
Logic/LAN_IDE/LAN_IDE.xise
+9 -9
View File
@@ -63,7 +63,7 @@
<property xil_pn:name="Equivalent Register Removal XST" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Evaluation Development Board" xil_pn:value="None Specified" xil_pn:valueState="default"/>
<property xil_pn:name="Exhaustive Fit Mode" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Compact" xil_pn:valueState="non-default"/>
<property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Gray" xil_pn:valueState="non-default" xil_pn:x_locked="true"/>
<property xil_pn:name="Filter Files From Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Functional Model Target Language ArchWiz" xil_pn:value="VHDL" xil_pn:valueState="default"/>
<property xil_pn:name="Functional Model Target Language Coregen" xil_pn:value="VHDL" xil_pn:valueState="default"/>
@@ -97,7 +97,7 @@
<property xil_pn:name="Language" xil_pn:value="VHDL" xil_pn:valueState="default"/>
<property xil_pn:name="Last Applied Goal" xil_pn:value="Balanced" xil_pn:valueState="default"/>
<property xil_pn:name="Last Applied Strategy" xil_pn:value="area;C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/area.xds" xil_pn:valueState="non-default"/>
<property xil_pn:name="Last Unlock Status" xil_pn:value="true" xil_pn:valueState="non-default"/>
<property xil_pn:name="Last Unlock Status" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/>
@@ -112,7 +112,7 @@
<property xil_pn:name="Netlist Hierarchy" xil_pn:value="As Optimized" xil_pn:valueState="default"/>
<property xil_pn:name="Number of Clock Buffers" xil_pn:value="4" xil_pn:valueState="default"/>
<property xil_pn:name="Optimization Effort" xil_pn:value="Normal" xil_pn:valueState="default"/>
<property xil_pn:name="Optimization Goal" xil_pn:value="Area" xil_pn:valueState="non-default"/>
<property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default" xil_pn:x_locked="true"/>
<property xil_pn:name="Other CPLD Fitter Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options Fit" xil_pn:value="" xil_pn:valueState="default"/>
@@ -155,7 +155,7 @@
<property xil_pn:name="Run for Specified Time Map" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Run for Specified Time Par" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Run for Specified Time Translate" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default"/>
<property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default" xil_pn:x_locked="true"/>
<property xil_pn:name="Selected Module Instance Name" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Selected Simulation Root Source Node Post-Map" xil_pn:value="" xil_pn:valueState="default"/>
@@ -207,7 +207,7 @@
<property xil_pn:name="Verilog 2001 Xst" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Verilog Macros" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="WYSIWYG" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Working Directory" xil_pn:value="." xil_pn:valueState="default"/>
<property xil_pn:name="Working Directory" xil_pn:value="." xil_pn:valueState="non-default"/>
<property xil_pn:name="XOR Preserve" xil_pn:value="true" xil_pn:valueState="default"/>
<!-- -->
<!-- The following properties are for internal use only. These should not be modified.-->
@@ -222,10 +222,10 @@
<property xil_pn:name="PROP_PostSynthSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PostXlateSimTop" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_PreSynthesis" xil_pn:value="PreSynthesis" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_intProjectCreationTimestamp" xil_pn:value="YYYY-MM-DDTHH:MM:SS" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_intWbtProjectID" xil_pn:value="0" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_intWorkingDirLocWRTProjDir" xil_pn:value="UnableToCalculate" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_intWorkingDirUsed" xil_pn:value="Unknown" xil_pn:valueState="default"/>
<property xil_pn:name="PROP_intProjectCreationTimestamp" xil_pn:value="2018-12-18T11:26:25" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_intWbtProjectID" xil_pn:value="A2E624B6ED1449CD92F77DE849BF7B51" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_intWorkingDirLocWRTProjDir" xil_pn:value="Same" xil_pn:valueState="non-default"/>
<property xil_pn:name="PROP_intWorkingDirUsed" xil_pn:value="No" xil_pn:valueState="non-default"/>
</properties>
<bindings/>
Logic/LAN_IDE/LAN_IDE_CP.bld
+2 -2
View File
@@ -30,10 +30,10 @@ NGDBUILD Design Results Summary:
Number of errors: 0
Number of warnings: 1
Total memory usage is 4418716 kilobytes
Total memory usage is 4418712 kilobytes
Writing NGD file "LAN_IDE_CP.ngd" ...
Total REAL time to NGDBUILD completion: 5 sec
Total REAL time to NGDBUILD completion: 6 sec
Total CPU time to NGDBUILD completion: 5 sec
Writing NGDBUILD log file "LAN_IDE_CP.bld"...
Logic/LAN_IDE/LAN_IDE_CP.cmd_log
+27
View File
@@ -84,3 +84,30 @@ cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
Logic/LAN_IDE/LAN_IDE_CP.gyd
+67 -64
View File
@@ -51,6 +51,15 @@ DQ<6> S:PIN126
DQ<7> S:PIN125
DQ<8> S:PIN128
DQ<9> S:PIN116
OWN S:PIN107
OVR S:PIN100
MTACK S:PIN96
LAN_CFG<4> S:PIN110
LAN_CFG<3> S:PIN13
LAN_CFG<2> S:PIN135
LAN_CFG<1> S:PIN12
INT_OUT S:PIN32
DTACK S:PIN85
D<0> S:PIN2
D<10> S:PIN41
D<11> S:PIN43
@@ -71,15 +80,6 @@ LAN_CS S:PIN133
LAN_RD S:PIN134
LAN_WRH S:PIN132
LAN_WRL S:PIN76
OWN S:PIN107
OVR S:PIN100
MTACK S:PIN96
LAN_CFG<4> S:PIN110
LAN_CFG<3> S:PIN13
LAN_CFG<2> S:PIN135
LAN_CFG<1> S:PIN12
INT_OUT S:PIN32
DTACK S:PIN85
ROM_OE S:PIN35
ROM_B<1> S:PIN69
ROM_B<0> S:PIN68
@@ -122,77 +122,80 @@ PARTITION FB1_12 ROM_B_0_OBUF$BUF8
PARTITION FB1_14 ROM_B_0_OBUF$BUF6 ROM_B_0_OBUF$BUF7
PARTITION FB1_17 ROM_B_0_OBUF$BUF3
PARTITION FB2_1 Dout1<7> A_LAN_4_OBUF A_LAN_7_OBUF Dout1<3>
A_LAN_6_OBUF N0$BUF5 Dout1<0> N0$BUF3
Dout1<2> D_6_IOBUFE Dout1<6> D_3_IOBUFE
Dout1<5> D_7_IOBUFE D_1_IOBUFE Dout1<4>
D_8_IOBUFE Dout1<1>
PARTITION FB2_1 LAN_SM_RST A_LAN_4_OBUF A_LAN_7_OBUF $OpTx$FX_DC$32
A_LAN_6_OBUF DQ_SWAP$BUF5 D_OUT<7> DQ_SWAP$BUF3
D_OUT<3> D_6_IOBUFE D_OUT<0> D_3_IOBUFE
D_9_IOBUFE/D_9_IOBUFE_TRST D_7_IOBUFE D_1_IOBUFE DQ_9_IOBUFE/DQ_9_IOBUFE_TRST
D_8_IOBUFE LAN_SM_FSM_FFd3
PARTITION FB3_2 ROM_B_0_OBUF$BUF2
PARTITION FB3_14 N0$BUF6
PARTITION FB3_7 EXP22_ EXP23_ EXP24_ EXP25_
LAN_ACCESS EXP26_ EXP27_ DQ_SWAP$BUF6
PARTITION FB4_1 LAN_WR_RST D_0_IOBUFE LAN_RST_SM_FSM_FFd1 LAN_IRQ_D0
PARTITION FB4_1 LAN_A_INIT<3> D_0_IOBUFE $OpTx$FX_DC$35 LAN_WR_RST
A_LAN_1_OBUF A_LAN_0_OBUF LAN_D_INIT<8> A_LAN_3_OBUF
LAN_D_INIT<1> LAN_CS_RST LAN_A_INIT<6> A_LAN_2_OBUF
LAN_WRH_S A_LAN_5_OBUF LAN_RST_SM_FSM_FFd3 LAN_RST_SM_FSM_FFd2
LAN_INT_ENABLE LAN_IRQ_OUT
DQ_SWAP$BUF7/DQ_SWAP$BUF7_TRST A_LAN_5_OBUF Z3_ADR<9> Z3_ADR<8>
Z3_ADR<7> Z3_ADR<6>
PARTITION FB5_2 ROM_B_0_OBUF$BUF11
PARTITION FB5_5 ROM_B_0_OBUF
PARTITION FB5_7 Z3_ADR_1 Z3_ADR_0 Z3_ADR<9> D_2_IOBUFE
Z3_ADR<8> D_9_IOBUFE Z3_ADR<7> D_10_IOBUFE
D_11_IOBUFE DQ_DATA<9> D_12_IOBUFE DQ_DATA<1>
PARTITION FB6_2 N0$BUF4 A_LAN_12_OBUF
PARTITION FB5_4 Z3_ADR<5> ROM_B_0_OBUF Z3_ADR<4> Z3_ADR<3>
Z3_ADR<2> Z3_ADR<13> D_2_IOBUFE Z3_ADR<12>
D_9_IOBUFE Z3_ADR<11> D_10_IOBUFE D_11_IOBUFE
Z3_ADR<10> D_12_IOBUFE AUTOCONFIG_ACCESS
PARTITION FB6_2 DQ_SWAP$BUF4 A_LAN_12_OBUF
PARTITION FB6_5 A_LAN_13_OBUF A_LAN_10_OBUF
PARTITION FB6_8 A_LAN_11_OBUF
PARTITION FB6_10 A_LAN_8_OBUF N0$BUF7/N0$BUF7_TRST Z3_ADR<6> Z3_ADR<5>
A_LAN_9_OBUF Z3_ADR<4> Z3_ADR<3> Z3_ADR<2>
Z3_ADR<13>
PARTITION FB6_10 A_LAN_8_OBUF
PARTITION FB6_14 A_LAN_9_OBUF
PARTITION FB7_3 D_13_IOBUFE
PARTITION FB7_5 D_14_IOBUFE
PARTITION FB7_12 D_15_IOBUFE
PARTITION FB7_15 lan_adr Z3_ADR<12> Z3_ADR<11> dq_swap
PARTITION FB8_2 DQ_12_IOBUFE DQ_14_IOBUFE
PARTITION FB8_5 LAN_WRH_OBUF lan_adr/lan_adr_RSTF Z3_DS/Z3_DS_D2 LAN_CS_OBUF
$OpTx$FX_DC$5 LAN_RD_OBUF $OpTx$FX_DC$23 LAN_SM_FSM_FFd6
LAN_SM_FSM_FFd4 LAN_SM_FSM_FFd2 LAN_SM_FSM_FFd1 D_9_IOBUFE/D_9_IOBUFE_TRST
LAN_WRL_S LAN_SM_FSM_FFd7
PARTITION FB9_1 DQ_DATA<4> EXP22_
PARTITION FB9_11 Z3_DATA<0> EXP23_ DQ_DATA<5> Z3_DATA<1>
EXP24_ DQ_DATA<13> Z3_DATA<2> DQ_DATA<12>
PARTITION FB10_1 EXP25_ DQ_1_IOBUFE DQ_0_IOBUFE
PARTITION FB10_5 DQ_3_IOBUFE DQ_2_IOBUFE LAN_A_INIT<3> DQ_5_IOBUFE
$OpTx$FX_DC$6 DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE
DQ_DATA<8> DQ_8_IOBUFE DQ_DATA<2> DQ_DATA<10>
DQ_10_IOBUFE DQ_DATA<0>
PARTITION FB11_1 $OpTx$FX_DC$16 lan_rdy Z3_DATA<3> LAN_SM_FSM_FFd8
Z3_DATA<4> LAN_SM_FSM_FFd3 LAN_SM_FSM_FFd10 LAN_RD_S
Z3_DATA<30> Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF1
Z3_DATA<29> ROM_B_0_OBUF$BUF0 Z3_DATA<22> Z3_DATA<21>
ROM_B_0_OBUF$BUF9 Z3_A_LOW
PARTITION FB12_2 N0$BUF2
PARTITION FB8_5 LAN_WRH_OBUF
PARTITION FB8_8 LAN_CS_OBUF
PARTITION FB8_10 LAN_RD_OBUF Z3_ADR_1/Z3_ADR_1_SETF $OpTx$FX_DC$8 $OpTx$FX_DC$33
$OpTx$FX_DC$25 $OpTx$FX_DC$9 $OpTx$FX_DC$29 Z3_ADR_1
Z3_ADR_0
PARTITION FB9_1 SHUT_UP LAN_RST_SM_FSM_FFd1 LAN_IRQ_D0 CONFIG_READY
LAN_RST_SM_FSM_FFd3 LAN_RST_SM_FSM_FFd2 LAN_INT_ENABLE LAN_BASEADR<6>
LAN_BASEADR<5> LAN_BASEADR<4> Z3_DATA<0> LAN_BASEADR<3>
LAN_BASEADR<2> Z3_DATA<1> LAN_BASEADR<1> LAN_BASEADR<15>
Z3_DATA<2> LAN_IRQ_OUT
PARTITION FB10_1 $OpTx$FX_DC$19 DQ_1_IOBUFE DQ_0_IOBUFE AUTO_CONFIG_DONE_CYCLE
DQ_3_IOBUFE DQ_2_IOBUFE D_OUT<2> DQ_5_IOBUFE
LAN_BASEADR<14> DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE
D_OUT<6> DQ_8_IOBUFE D_OUT<5> D_OUT<4>
DQ_10_IOBUFE D_OUT<1>
PARTITION FB11_1 $OpTx$FX_SC$28 Z3_DATA<31> Z3_DATA<3> Z3_DATA<30>
Z3_DATA<4> LAN_SM_FSM_FFd1 DQ_DATA<2> DQ_DATA<1>
DQ_DATA<15> Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF1
DQ_DATA<14> ROM_B_0_OBUF$BUF0 DQ_DATA<13> DQ_DATA<12>
ROM_B_0_OBUF$BUF9 DQ_DATA<11>
PARTITION FB12_2 DQ_SWAP$BUF2
PARTITION FB12_5 DQ_15_IOBUFE
PARTITION FB12_8 DQ_13_IOBUFE
PARTITION FB12_10 DQ_11_IOBUFE
PARTITION FB12_12 DQ_9_IOBUFE
PARTITION FB12_17 autoconfig Z3_ADR<10>
PARTITION FB13_1 LAN_SM_FSM_FFd5 ROM_B_0_OBUF$BUF10
PARTITION FB13_8 Z3_DATA<7>
PARTITION FB13_14 LAN_WRL_OBUF DQ_DATA<7> DQ_DATA<6> DQ_DATA<15>
DQ_DATA<14>
PARTITION FB14_3 N0$BUF0
PARTITION FB13_1 Z3_DATA<29> ROM_B_0_OBUF$BUF10 Z3_DATA<23> Z3_DATA<22>
Z3_DATA<21> Z3_DATA<20> Z3_DATA<19> Z3_DATA<7>
Z3_DATA<18> Z3_DATA<17> Z3_DATA<16> LAN_WRL_S
LAN_WRH_S LAN_WRL_OBUF DQ_DATA<6> DQ_DATA<5>
DQ_DATA<4> DQ_DATA<3>
PARTITION FB14_3 DQ_SWAP$BUF0
PARTITION FB14_11 CFOUT_OBUF
PARTITION FB14_14 SLAVE_OBUF N0
PARTITION FB14_14 SLAVE_OBUF DQ_SWAP
PARTITION FB15_1 DQ_DATA<11> DQ_DATA<3> Z3_DATA<23> Z3_DATA<31>
DQ_9_IOBUFE/DQ_9_IOBUFE_TRST LAN_SM_FSM_FFd11 LAN_SM_FSM_FFd12 LAN_SM_FSM_FFd9
$OpTx$FX_DC$24 $OpTx$FX_DC$27 $OpTx$FX_DC$30 N0$BUF7
$OpTx$FX_SC$34 Z3_DATA<15> Z3_DATA<14> BUF_LAN_SM_FSM_FFd9
Z3_DATA<13> LAN_SM_RST
PARTITION FB16_1 SHUT_UP Z3_DATA<12> Z3_DATA<11> AUTO_CONFIG_DONE_CYCLE
Z3_DATA<28> Z3_DATA<10> Z3_DATA<27> Z3_DATA<9>
Z3_DATA<26> N0$BUF1 Z3_DATA<8> Z3_DATA<25>
Z3_DATA<24> Z3_DATA<20> Z3_DATA<19> Z3_DATA<18>
Z3_DATA<17> Z3_DATA<16>
PARTITION FB15_1 Z3_DATA<30>/Z3_DATA<30>_CE Z3_DATA<10>/Z3_DATA<10>_CE $OpTx$FX_DC$22 LAN_BASEADR<9>
LAN_BASEADR<8> LAN_BASEADR<7> LAN_BASEADR<13> LAN_BASEADR<12>
LAN_BASEADR<11> LAN_BASEADR<10> LAN_BASEADR<0> DQ_SWAP$BUF7
DQ_DATA<9> Z3_DATA<15> Z3_DATA<14> DQ_DATA<8>
Z3_DATA<13> DQ_DATA<7>
PARTITION FB16_1 Z3_DATA<28> Z3_DATA<12> Z3_DATA<11> Z3_DATA<27>
Z3_DATA<26> Z3_DATA<10> Z3_DATA<25> Z3_DATA<9>
Z3_DATA<24> DQ_SWAP$BUF1 Z3_DATA<8> LAN_RD_S
DQ_DATA<10> DQ_DATA<0> LAN_SM_FSM_FFd2 LAN_READY
Z3_A_LOW LAN_SM_FSM_FFd4
Logic/LAN_IDE/LAN_IDE_CP.jed
+1003 -1003
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Logic/LAN_IDE/LAN_IDE_CP.mfd
+1455 -1265
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Logic/LAN_IDE/LAN_IDE_CP.nga
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.ngc
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.ngd
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.ngr
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.pad
+1 -1
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@@ -1,7 +1,7 @@
Release 8.1i - Fit P.20131013
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
12-18-2018 0:00AM
12-18-2018 11:58AM
NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
Logic/LAN_IDE/LAN_IDE_CP.pnx
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.rpt
+1277 -1196
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Logic/LAN_IDE/LAN_IDE_CP.syr
+65 -71
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@@ -4,13 +4,13 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.13 secs
Total CPU time to Xst completion: 0.14 secs
--> Parameter xsthdpdir set to xst
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.13 secs
Total CPU time to Xst completion: 0.14 secs
--> Reading design: LAN_IDE_CP.prj
@@ -43,7 +43,7 @@ Target Device : XC9500XL CPLDs
---- Source Options
Top Module Name : LAN_IDE_CP
Automatic FSM Extraction : YES
FSM Encoding Algorithm : Auto
FSM Encoding Algorithm : Gray
Safe Implementation : No
Mux Extraction : Yes
Resource Sharing : YES
@@ -71,6 +71,8 @@ wysiwyg : NO
=========================================================================
Setting FSM Encoding Algorithm to : Gray
=========================================================================
* HDL Compilation *
@@ -89,6 +91,7 @@ Analyzing hierarchy for entity <LAN_IDE_CP> in library <work> (architecture <beh
* HDL Analysis *
=========================================================================
Analyzing Entity <LAN_IDE_CP> in library <work> (Architecture <behavioral>).
INFO:Xst:2679 - Register <DQ_SWAP> in unit <LAN_IDE_CP> has a constant value of 0 during circuit operation. The register is replaced by logic.
Entity <LAN_IDE_CP> analyzed. Unit <LAN_IDE_CP> generated.
@@ -114,7 +117,6 @@ WARNING:Xst:647 - Input <CP_IRQ> is never used. This port will be preserved and
WARNING:Xst:2565 - Inout <A<1>> is never assigned.
WARNING:Xst:647 - Input <MTCR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <C1> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:646 - Signal <LAN_BASEADR> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
Found finite state machine <FSM_0> for signal <LAN_SM>.
-----------------------------------------------------------------------
@@ -127,7 +129,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
| Reset type | asynchronous |
| Reset State | nop |
| Power Up State | nop |
| Encoding | automatic |
| Encoding | gray |
| Implementation | automatic |
-----------------------------------------------------------------------
Found finite state machine <FSM_1> for signal <LAN_RST_SM>.
@@ -141,10 +143,10 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
| Reset type | asynchronous |
| Reset State | nop |
| Power Up State | nop |
| Encoding | automatic |
| Encoding | gray |
| Implementation | automatic |
-----------------------------------------------------------------------
Found 16x8-bit ROM for signal <Dout1$mux0004>.
Found 16x8-bit ROM for signal <D_OUT$mux0004>.
Found 16-bit tristate buffer for signal <D>.
Found 16-bit tristate buffer for signal <DQ>.
Found 1-bit tristate buffer for signal <OWN>.
@@ -171,20 +173,21 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
Found 1-bit tristate buffer for signal <A<8>>.
Found 1-bit register for signal <AUTO_CONFIG_DONE>.
Found 1-bit register for signal <AUTO_CONFIG_DONE_CYCLE>.
Found 1-bit register for signal <autoconfig>.
Found 8-bit register for signal <Dout1>.
Found 1-bit register for signal <AUTOCONFIG_ACCESS>.
Found 1-bit register for signal <CONFIG_READY>.
Found 8-bit register for signal <D_OUT>.
Found 16-bit register for signal <DQ_DATA>.
Found 1-bit register for signal <dq_swap>.
Found 2-bit comparator less for signal <dq_swap$cmp_lt0000> created at line 248.
Found 14-bit register for signal <LAN_A_INIT>.
Found 1-bit register for signal <lan_adr>.
Found 1-bit register for signal <LAN_ACCESS>.
Found 16-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 248.
Found 16-bit register for signal <LAN_BASEADR>.
Found 1-bit register for signal <LAN_CS_RST>.
Found 16-bit register for signal <LAN_D_INIT>.
Found 1-bit register for signal <LAN_INT_ENABLE>.
Found 1-bit register for signal <LAN_IRQ_D0>.
Found 1-bit register for signal <LAN_IRQ_OUT>.
Found 1-bit register for signal <LAN_RD_S>.
Found 1-bit register for signal <lan_rdy>.
Found 1-bit register for signal <LAN_READY>.
Found 1-bit register for signal <LAN_SM_RST>.
Found 1-bit register for signal <LAN_WR_RST>.
Found 1-bit register for signal <LAN_WRH_S>.
@@ -208,13 +211,13 @@ HDL Synthesis Report
Macro Statistics
# ROMs : 1
16x8-bit ROM : 1
# Registers : 54
# Registers : 55
1-bit register : 49
14-bit register : 2
16-bit register : 2
16-bit register : 3
8-bit register : 1
# Comparators : 1
2-bit comparator less : 1
16-bit comparator equal : 1
# Tristates : 27
1-bit tristate buffer : 25
16-bit tristate buffer : 2
@@ -225,7 +228,6 @@ Macro Statistics
* Advanced HDL Synthesis *
=========================================================================
Analyzing FSM <FSM_1> for best encoding.
Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with gray encoding.
------------------------
State | Encoding
@@ -239,25 +241,24 @@ Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with gray encoding.
set_commit | 101
done | 100
------------------------
Analyzing FSM <FSM_0> for best encoding.
Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:12]> with one-hot encoding.
-----------------------------------
Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:4]> with gray encoding.
-------------------------------
State | Encoding
-----------------------------------
nop | 000000000001
-------------------------------
nop | 0000
start_read_upper | unreached
wait_read_upper | 000000000010
end_read_upper | 000000100000
start_read_lower | 000001000000
wait_read_lower | 000000000100
end_read_lower | 000010000000
start_write_upper | 000000001000
wait_write_upper | 000100000000
end_write_upper | 001000000000
start_write_lower | 000000010000
wait_write_lower | 010000000000
end_write_lower | 100000000000
-----------------------------------
wait_read_upper | 0001
end_read_upper | 0111
start_read_lower | 0101
wait_read_lower | 0011
end_read_lower | 0100
start_write_upper | 0010
wait_write_upper | 1100
end_write_upper | 1101
start_write_lower | 0110
wait_write_lower | 1111
end_write_lower | 1110
-------------------------------
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <13>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <12>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <11>. This FF/Latch will be trimmed during the optimization process.
@@ -290,6 +291,8 @@ Macro Statistics
16x8-bit ROM : 1
# Registers : 48
Flip-Flops : 48
# Comparators : 1
16-bit comparator equal : 1
=========================================================================
@@ -322,17 +325,16 @@ INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_8> in Unit <LAN_IDE_CP> is equivalent t
INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_1> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_4> <LAN_D_INIT_9>
Optimizing unit <LAN_IDE_CP> ...
implementation constraint: INIT=s : LAN_SM_FSM_FFd12
implementation constraint: INIT=s : Dout1_7
implementation constraint: INIT=s : Dout1_6
implementation constraint: INIT=s : Dout1_5
implementation constraint: INIT=s : D_OUT_7
implementation constraint: INIT=s : D_OUT_6
implementation constraint: INIT=s : D_OUT_0
implementation constraint: INIT=s : D_OUT_1
implementation constraint: INIT=s : D_OUT_2
implementation constraint: INIT=s : D_OUT_3
implementation constraint: INIT=s : D_OUT_4
implementation constraint: INIT=s : D_OUT_5
implementation constraint: INIT=s : LAN_A_INIT_3
implementation constraint: INIT=s : Dout1_4
implementation constraint: INIT=s : Dout1_3
implementation constraint: INIT=s : LAN_A_INIT_6
implementation constraint: INIT=s : Dout1_2
implementation constraint: INIT=s : Dout1_1
implementation constraint: INIT=s : Dout1_0
implementation constraint: INIT=r : LAN_D_INIT_1
implementation constraint: INIT=r : LAN_D_INIT_8
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd1
@@ -342,13 +344,6 @@ Optimizing unit <LAN_IDE_CP> ...
implementation constraint: INIT=r : LAN_SM_FSM_FFd2
implementation constraint: INIT=r : LAN_SM_FSM_FFd3
implementation constraint: INIT=r : LAN_SM_FSM_FFd4
implementation constraint: INIT=r : LAN_SM_FSM_FFd5
implementation constraint: INIT=r : LAN_SM_FSM_FFd6
implementation constraint: INIT=r : LAN_SM_FSM_FFd7
implementation constraint: INIT=r : LAN_SM_FSM_FFd8
implementation constraint: INIT=r : LAN_SM_FSM_FFd9
implementation constraint: INIT=r : LAN_SM_FSM_FFd10
implementation constraint: INIT=r : LAN_SM_FSM_FFd11
=========================================================================
* Partition Report *
@@ -380,25 +375,24 @@ Design Statistics
# IOs : 116
Cell Usage :
# BELS : 779
# AND2 : 258
# AND3 : 34
# AND4 : 7
# AND8 : 3
# BELS : 825
# AND2 : 247
# AND3 : 53
# AND4 : 6
# AND8 : 4
# GND : 1
# INV : 239
# OR2 : 195
# OR3 : 22
# OR4 : 2
# OR8 : 16
# INV : 316
# OR2 : 151
# OR3 : 11
# OR4 : 17
# VCC : 1
# XOR2 : 1
# FlipFlops/Latches : 106
# XOR2 : 18
# FlipFlops/Latches : 114
# FD : 1
# FDC : 26
# FDCE : 3
# FDP : 42
# FDPE : 34
# FDC : 18
# FDCE : 4
# FDP : 41
# FDPE : 50
# IO Buffers : 109
# IBUF : 19
# IOBUFE : 48
@@ -407,14 +401,14 @@ Cell Usage :
=========================================================================
Total REAL time to Xst completion: 8.00 secs
Total CPU time to Xst completion: 8.29 secs
Total REAL time to Xst completion: 9.00 secs
Total CPU time to Xst completion: 8.71 secs
-->
Total memory usage is 4534748 kilobytes
Total memory usage is 4534768 kilobytes
Number of errors : 0 ( 0 filtered)
Number of warnings : 52 ( 0 filtered)
Number of infos : 10 ( 0 filtered)
Number of warnings : 51 ( 0 filtered)
Number of infos : 11 ( 0 filtered)
Logic/LAN_IDE/LAN_IDE_CP.tspec
+280 -361
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@@ -1,190 +1,275 @@
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<0>.D:400
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<0>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<0>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<0>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<0>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<0>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<0>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<10>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<10>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<10>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<10>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<10>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<10>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<11>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<11>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<11>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<11>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<11>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<11>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<12>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<12>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<12>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<12>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<12>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<12>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<13>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<13>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<13>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<13>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<13>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<13>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<14>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<14>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<14>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<14>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<14>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<14>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<15>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<15>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<15>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<15>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<15>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<15>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<1>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<1>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<1>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<1>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<1>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<1>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<2>.D:400
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<2>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<2>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<2>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<2>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<2>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<2>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<3>.D:400
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<3>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<3>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<3>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<3>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<3>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<3>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<4>.D:400
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<4>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<4>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<4>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<4>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<4>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<4>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<5>.D:400
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<5>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<5>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<5>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<5>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<5>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<5>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<6>.D:400
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<6>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<6>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<6>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<6>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<6>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<6>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<7>.D:400
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<7>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<7>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<7>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<7>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<7>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<7>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<8>.D:400
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<8>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<8>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<8>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<8>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<8>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<8>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<9>.D:400
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<9>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<9>.CE:400
TS_CLK_EXT:FROM:Dout1<7>.Q:TO:LAN_INT_ENABLE.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<9>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<9>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<9>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<9>.CE:400
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:LAN_INT_ENABLE.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:LAN_INT_ENABLE.D:400
TS_CLK_EXT:FROM:LAN_INT_ENABLE.Q:TO:LAN_INT_ENABLE.D:400
TS_CLK_EXT:FROM:AUTO_CONFIG_DONE_CYCLE.Q:TO:AUTO_CONFIG_DONE_CYCLE.D:400
TS_CLK_EXT:FROM:Dout1<6>.Q:TO:LAN_IRQ_OUT.D:400
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:LAN_BASEADR<0>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<0>.Q:TO:LAN_BASEADR<0>.D:400
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:LAN_BASEADR<10>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:LAN_BASEADR<10>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<10>.Q:TO:LAN_BASEADR<10>.D:400
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:LAN_BASEADR<11>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:LAN_BASEADR<11>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<11>.Q:TO:LAN_BASEADR<11>.D:400
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:LAN_BASEADR<12>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:LAN_BASEADR<12>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<12>.Q:TO:LAN_BASEADR<12>.D:400
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:LAN_BASEADR<13>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:LAN_BASEADR<13>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<13>.Q:TO:LAN_BASEADR<13>.D:400
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:LAN_BASEADR<14>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:LAN_BASEADR<14>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<14>.Q:TO:LAN_BASEADR<14>.D:400
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:LAN_BASEADR<15>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:LAN_BASEADR<15>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<15>.Q:TO:LAN_BASEADR<15>.D:400
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:LAN_BASEADR<1>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<1>.Q:TO:LAN_BASEADR<1>.D:400
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:LAN_BASEADR<2>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<2>.Q:TO:LAN_BASEADR<2>.D:400
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:LAN_BASEADR<3>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<3>.Q:TO:LAN_BASEADR<3>.D:400
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:LAN_BASEADR<4>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<4>.Q:TO:LAN_BASEADR<4>.D:400
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:LAN_BASEADR<5>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<5>.Q:TO:LAN_BASEADR<5>.D:400
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:LAN_BASEADR<6>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<6>.Q:TO:LAN_BASEADR<6>.D:400
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:LAN_BASEADR<7>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<7>.Q:TO:LAN_BASEADR<7>.D:400
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:LAN_BASEADR<8>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:LAN_BASEADR<8>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<8>.Q:TO:LAN_BASEADR<8>.D:400
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:LAN_BASEADR<9>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:LAN_BASEADR<9>.D:400
TS_CLK_EXT:FROM:LAN_BASEADR<9>.Q:TO:LAN_BASEADR<9>.D:400
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:LAN_IRQ_OUT.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:LAN_IRQ_OUT.D:400
TS_CLK_EXT:FROM:LAN_INT_ENABLE.Q:TO:LAN_IRQ_OUT.D:400
TS_CLK_EXT:FROM:LAN_IRQ_D0.Q:TO:LAN_IRQ_OUT.D:400
TS_CLK_EXT:FROM:LAN_IRQ_OUT.Q:TO:LAN_IRQ_OUT.D:400
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<16>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<16>.D:400
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<16>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<16>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<16>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<17>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<17>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<16>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<16>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<16>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<16>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<17>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<17>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<17>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<17>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<17>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<17>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<17>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<17>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<18>.D:400
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<18>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<18>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<18>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<18>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<18>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<18>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<18>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<18>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<19>.D:400
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<19>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<19>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<19>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<19>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<19>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<19>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<19>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<19>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<20>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<20>.D:400
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<20>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<20>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<20>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<20>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<20>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<20>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<20>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<21>.D:400
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<21>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<21>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<21>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<21>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<21>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<21>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<21>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<22>.D:400
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<22>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<22>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<22>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<22>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<22>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<22>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<22>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<23>.D:400
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<23>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<23>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<23>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<23>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<23>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<23>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<23>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<24>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<24>.D:400
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<24>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<24>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<24>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<24>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<24>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<24>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<24>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<25>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<25>.D:400
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<25>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<25>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<25>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<26>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<25>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<25>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<25>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<25>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<26>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<26>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<26>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<26>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<27>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<26>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<26>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<26>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<26>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<27>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<27>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<27>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<27>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<28>.D:400
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<28>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<27>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<27>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<27>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<27>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<28>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<28>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<28>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<29>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<28>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<28>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<28>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<28>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<29>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<29>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<29>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<30>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<29>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<29>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<29>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<29>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<30>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<30>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<30>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<31>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<30>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<30>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<30>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<30>.CE:400
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<31>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<31>.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<31>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_SM_FSM_FFd12.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd12.SETF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:LAN_SM_FSM_FFd7.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:LAN_SM_FSM_FFd7.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd7.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:LAN_SM_FSM_FFd5.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:LAN_SM_FSM_FFd5.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd5.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<31>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<31>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<31>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<31>.CE:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd4.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd1.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd2.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd3.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_SM_FSM_FFd8.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd8.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd8.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:LAN_SM_FSM_FFd10.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_SM_FSM_FFd10.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd10.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:LAN_SM_FSM_FFd6.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd6.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_SM_FSM_FFd9.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd9.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd1.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_SM_FSM_FFd11.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd11.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:LAN_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd2.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:LAN_SM_FSM_FFd4.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd4.RSTF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
@@ -196,337 +281,171 @@ TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<1>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<8>.D:400
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:Dout1<0>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:DQ_DATA<0>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<0>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:Dout1<2>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:D_OUT<2>.Q:TO:DQ_DATA<10>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<10>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:Dout1<3>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:D_OUT<3>.Q:TO:DQ_DATA<11>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<11>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:Dout1<4>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:D_OUT<4>.Q:TO:DQ_DATA<12>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<12>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:Dout1<5>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:D_OUT<5>.Q:TO:DQ_DATA<13>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<13>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:Dout1<6>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:D_OUT<6>.Q:TO:DQ_DATA<14>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<14>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:Dout1<7>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:D_OUT<7>.Q:TO:DQ_DATA<15>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<15>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:Dout1<1>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:DQ_DATA<1>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<1>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:Dout1<2>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:DQ_DATA<2>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<2>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:Dout1<3>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:DQ_DATA<3>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<3>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:Dout1<4>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<4>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<4>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:Dout1<5>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:DQ_DATA<5>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<5>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:Dout1<6>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:DQ_DATA<6>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<6>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:Dout1<7>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:DQ_DATA<7>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<7>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:Dout1<0>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:D_OUT<0>.Q:TO:DQ_DATA<8>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<8>.SETF:400
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:Dout1<1>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:D_OUT<1>.Q:TO:DQ_DATA<9>.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<9>.SETF:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_WR_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_WR_RST.D:400
TS_CLK_EXT:FROM:CONFIG_READY.Q:TO:CONFIG_READY.D:400
TS_CLK_EXT:FROM:SHUT_UP.Q:TO:SHUT_UP.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_A_INIT<6>.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_CS_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_CS_RST.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_RD_S.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_RD_S.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:LAN_WRH_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:LAN_WRH_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_READY.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_READY.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_READY.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_READY.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_READY.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_WRH_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_WRH_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRH_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_WRH_S.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_WRH_S.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:LAN_WRL_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:LAN_WRL_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_WRL_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_WRL_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRL_S.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_WRL_S.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_WRL_S.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_A_LOW.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_A_LOW.RSTF:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:lan_rdy.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:lan_rdy.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:lan_rdy.D:400
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:lan_rdy.D:400
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:lan_rdy.RSTF:400
TS_CLK_EXT:FROM:AUTO_CONFIG_DONE_CYCLE.Q:TO:CFOUT_OBUF.D:400
Logic/LAN_IDE/LAN_IDE_CP.vhd
+61 -56
View File
@@ -111,10 +111,10 @@ architecture Behavioral of LAN_IDE_CP is
SIGNAL LAN_RST_SM: lan_reset :=nop;
SIGNAL LAN_SM: lan_bus_sm :=nop;
SIGNAL autoconfig: STD_LOGIC;
SIGNAL lan_adr: STD_LOGIC;
SIGNAL dq_swap: STD_LOGIC;
signal Dout1:STD_LOGIC_VECTOR(7 downto 0):=x"FF";
SIGNAL AUTOCONFIG_ACCESS: STD_LOGIC;
SIGNAL LAN_ACCESS: STD_LOGIC;
SIGNAL DQ_SWAP: STD_LOGIC;
signal D_OUT:STD_LOGIC_VECTOR(7 downto 0):=x"FF";
signal AUTO_CONFIG_DONE:STD_LOGIC;
signal AUTO_CONFIG_DONE_CYCLE:STD_LOGIC;
signal SHUT_UP:STD_LOGIC;
@@ -124,7 +124,8 @@ architecture Behavioral of LAN_IDE_CP is
signal LAN_RD_S: std_logic;
signal LAN_WRH_S: std_logic;
signal LAN_WRL_S: std_logic;
signal lan_rdy: std_logic;
signal LAN_READY: std_logic;
signal CONFIG_READY: std_logic;
signal LAN_IRQ_D0: std_logic;
signal LAN_IRQ_OUT: std_logic;
signal Z3_ADR:STD_LOGIC_VECTOR(15 downto 2);
@@ -226,29 +227,29 @@ begin
ADDRESS_DECODE: process(DECODE_RESET,FCS)
begin
if(DECODE_RESET ='0')then
autoconfig <= '0';
lan_adr <= '0';
dq_swap <= '0';
AUTOCONFIG_ACCESS <= '0';
LAN_ACCESS <= '0';
DQ_SWAP <= '0';
Z3_ADR <= (others => '1');
elsif(falling_edge(FCS))then
--default values
autoconfig <= '0';
lan_adr <= '0';
dq_swap <= '0';
AUTOCONFIG_ACCESS <= '0';
LAN_ACCESS <= '0';
DQ_SWAP <= '0';
Z3_ADR(15 downto 2) <= A(15 downto 2);-- latch the whole address for the whole cycle
--use D(15 downto 8)& A(23 downto 16) = A(31 downto 16) for quick response
--autoconfig
--AUTOCONFIG_ACCESS
if(Z3='1' and (D(15 downto 8)& A(23 downto 16)) = x"FF00" and AUTO_CONFIG_DONE = '0' and CFIN='0')then
autoconfig <= '1';
AUTOCONFIG_ACCESS <= '1';
end if;
--lan base
if(Z3='1' and (D(15 downto 8) & A(23 downto 16)) = x"4000" and SHUT_UP='0' )then
if(A(14 downto 13)<"11")then
dq_swap <= '1';
end if;
lan_adr <= '1';
if(Z3='1' and (D(15 downto 8) & A(23 downto 16)) = LAN_BASEADR and SHUT_UP='0' )then
--if(A(14 downto 13)<"11")then
-- DQ_SWAP <= '1';
--end if;
LAN_ACCESS <= '1';
end if;
end if;
end process ADDRESS_DECODE;
@@ -260,17 +261,19 @@ begin
LAN_INT_ENABLE <='0';
LAN_IRQ_D0 <='1';
LAN_IRQ_OUT <='1';
CONFIG_READY <='0';
elsif rising_edge(CLK_EXT) then
LAN_IRQ_D0 <= LAN_INT;
if(LAN_INT ='0' and LAN_IRQ_D0 ='1') then
LAN_IRQ_OUT <='0';
elsif(LAN_INT ='1' or LAN_INT_ENABLE = '0')then
LAN_IRQ_OUT <='1';
elsif(lan_adr = '1' and Z3_DS ='0' and RW='0' and Z3_ADR(15)='1') then
elsif(LAN_ACCESS = '1' and Z3_DS ='0' and RW='0' and Z3_ADR(15)='1') then
LAN_IRQ_OUT <= Z3_DATA_IN(30); --controll lan irq
end if;
if(lan_adr = '1' and Z3_DS ='0' and RW='0' and Z3_ADR(15)='1') then --enable if a write to A15 occured
if(LAN_ACCESS = '1' and Z3_DS ='0' and RW='0' and Z3_ADR(15)='1') then --enable if a write to A15 occured
LAN_INT_ENABLE <= Z3_DATA_IN(31);
CONFIG_READY <='1';
end if;
end if;
end process lan_int_proc;
@@ -296,7 +299,7 @@ begin
LAN_WRH_S <= '0';
LAN_WRL_S <= '0';
Z3_A_LOW <= '0';
lan_rdy <='0';
LAN_READY <='0';
Z3_DATA(31 downto 0) <= x"FFFFFFFF";
DQ_DATA(15 downto 0) <= x"FFFF";
elsif rising_edge(CLK_EXT) then
@@ -305,7 +308,7 @@ begin
LAN_WRH_S <= '0';
LAN_WRL_S <= '0';
Z3_A_LOW <= '0';
lan_rdy <='0';
LAN_READY <='0';
case LAN_SM is
when nop=>
@@ -314,19 +317,19 @@ begin
-- this is a quite complex thing for a cpld
-- so I have to move this out of the cycle start condition and prepare it for every loop
if(UDS='0' or LDS='0')then
if(dq_swap='0') then
if(DQ_SWAP='0') then
DQ_DATA(15 downto 0) <= Z3_DATA_IN(31 downto 16);
else
DQ_DATA(15 downto 0) <= Z3_DATA_IN(23 downto 16) & Z3_DATA_IN(31 downto 24);
end if;
else
if(dq_swap='0') then
if(DQ_SWAP='0') then
DQ_DATA(15 downto 0) <= Z3_DATA_IN(15 downto 0);
else
DQ_DATA(15 downto 0) <= Z3_DATA_IN( 7 downto 0) & Z3_DATA_IN(15 downto 8);
end if;
end if;
if(lan_adr = '1' and Z3_DS = '0' and Z3_ADR(15) = '0' )then --cycle start!
if(LAN_ACCESS = '1' and Z3_DS = '0' and Z3_ADR(15) = '0' )then --cycle start!
if(RW='1')then --read from MSB
-- determine bushalf
@@ -347,6 +350,8 @@ begin
LAN_SM <= start_write_lower;
end if;
end if;
else
LAN_SM <= nop;
end if;
when start_read_upper=>
LAN_RD_S <= '1';
@@ -356,13 +361,13 @@ begin
LAN_SM<=end_read_upper;
when end_read_upper=>
--fetch data
if(dq_swap='0') then
if(DQ_SWAP='0') then
Z3_DATA(31 downto 16) <= DQ;
else
Z3_DATA(31 downto 16) <= DQ(7 downto 0) & DQ(15 downto 8);
end if;
if(DS1='1' and DS0='1')then -- no lower half
lan_rdy <='1';
LAN_READY <='1';
LAN_SM <= end_read_upper; -- stay here until cylce end
else
Z3_A_LOW <= '1';
@@ -378,12 +383,12 @@ begin
LAN_SM<=end_read_lower;
when end_read_lower=>
--fetch data
if(dq_swap='0') then
if(DQ_SWAP='0') then
Z3_DATA(15 downto 0) <= DQ;
else
Z3_DATA(15 downto 0) <= DQ(7 downto 0) & DQ(15 downto 8);
end if;
lan_rdy <='1';
LAN_READY <='1';
LAN_SM<=end_read_lower; -- stay here until cylce end
when start_write_upper=>
-- swapped LDS/UDS here: ENC624 is little endian
@@ -394,14 +399,14 @@ begin
LAN_SM<=end_write_upper;
when end_write_upper=>
-- prepare the data for write
if(dq_swap='0') then
if(DQ_SWAP='0') then
DQ_DATA(15 downto 0) <= Z3_DATA_IN(15 downto 0);
else
DQ_DATA(15 downto 0) <= Z3_DATA_IN(7 downto 0) & Z3_DATA_IN(15 downto 8);
end if;
if(DS1='1' and DS0='1')then -- no lower half
lan_rdy <='1';
LAN_READY <='1';
LAN_SM <= end_write_upper; -- stay here until cylce end
else
Z3_A_LOW <= '1';
@@ -417,41 +422,41 @@ begin
Z3_A_LOW <= '1';
LAN_SM<=end_write_lower;
when end_write_lower=>
lan_rdy <='1';
LAN_READY <='1';
LAN_SM<=end_write_lower; -- stay here until cylce end
end case;
end if;
end process lan_rw_gen;
--autoconfig
autoconfig_proc: process (reset, CLK_EXT)
--AUTOCONFIG_ACCESS
AUTOCONFIG_ACCESS_proc: process (reset, CLK_EXT)
begin
if reset = '0' then
-- reset active ...
AUTO_CONFIG_DONE_CYCLE <='0';
Dout1<=x"FF";
D_OUT<=x"FF";
SHUT_UP <='1';
LAN_BASEADR<=x"FFFF";
AUTO_CONFIG_DONE <='0';
elsif rising_edge(CLK_EXT) then -- no reset, so wait for rising edge of the clock
--default value
Dout1<=x"FF";
D_OUT<=x"FF";
if(FCS='1')then
AUTO_CONFIG_DONE <= AUTO_CONFIG_DONE_CYCLE or not AUTOBOOT_OFF ;
elsif(autoconfig= '1' and Z3_DS='0' ) then
elsif(AUTOCONFIG_ACCESS= '1' and Z3_DS='0' ) then
case Z3_ADR(8 downto 2) is
when "0000000" => Dout1 <= "10000001" ; --Z3, No mem, no Rom, single, board, 64kb
when "1000000" => Dout1 <= "00010001" ; --Z3, No mem, no Rom, single, board, 64kb
when "0000001" => Dout1 <= "10000100" ; --ProductID: 7B->10000100
when "1000001" => Dout1 <= "01000100" ; --ProductID: 7B->10000100
when "0000010" => Dout1 <= "11101101" ; --Flags
when "1000010" => Dout1 <= "11011101" ; --Flags
when "0000100" => Dout1 <= "11110101" ; --Ventor ID 0/1
when "1000100" => Dout1 <= "01010101" ; --Ventor ID 0/1
when "0000101" => Dout1 <= "11100011" ; --Ventor ID 2/3 : $0A1C: A1K.org
when "1000101" => Dout1 <= "00110011" ; --Ventor ID 2/3 : $0A1C: A1K.org
when "0010010" =>
when "0000000" => D_OUT <= "10000001" ; --Z3, No mem, no Rom, single, board, 64kb
when "1000000" => D_OUT <= "00010001" ; --Z3, No mem, no Rom, single, board, 64kb
when "0000001" => D_OUT <= "10000100" ; --ProductID: 7B->10000100
when "1000001" => D_OUT <= "01000100" ; --ProductID: 7B->10000100
when "0000010" => D_OUT <= "11101101" ; --Flags
when "1000010" => D_OUT <= "11011101" ; --Flags
when "0000100" => D_OUT <= "11110101" ; --Ventor ID 0/1
when "1000100" => D_OUT <= "01010101" ; --Ventor ID 0/1
when "0000101" => D_OUT <= "11100011" ; --Ventor ID 2/3 : $0A1C: A1K.org
when "1000101" => D_OUT <= "00110011" ; --Ventor ID 2/3 : $0A1C: A1K.org
when "0010001" =>
if(RW='0')then
LAN_BASEADR(15 downto 0) <= Z3_DATA_IN(31 downto 16); --Base address
SHUT_UP <='0'; --enable board
@@ -466,9 +471,9 @@ begin
end case;
end if;
end if;
end process autoconfig_proc; --- that's all
end process AUTOCONFIG_ACCESS_proc; --- that's all
LAN_CS <= lan_adr when reset='1' else LAN_CS_RST;
LAN_CS <= LAN_ACCESS when reset='1' else LAN_CS_RST;
LAN_WRL <= LAN_WRL_S when FCS='0' and reset = '1' else LAN_WR_RST;
LAN_WRH <= LAN_WRH_S when FCS='0' and reset = '1' else LAN_WR_RST;
LAN_RD <= LAN_RD_S when FCS='0' and reset = '1' else '0';
@@ -479,30 +484,30 @@ begin
Z3_ADR(14 downto 2) & Z3_A_LOW;
--signal assignment
D(15 downto 0) <= Z3_DATA(31 downto 16) when RW='1' and Z3_DS ='0' and FCS='0' and lan_adr ='1' else
Dout1 & x"FF" when RW='1' and Z3_DS ='0' and FCS='0' and autoconfig ='1' else
D(15 downto 0) <= Z3_DATA(31 downto 16) when RW='1' and Z3_DS ='0' and FCS='0' and LAN_ACCESS ='1' else
D_OUT & x"FF" when RW='1' and Z3_DS ='0' and FCS='0' and AUTOCONFIG_ACCESS ='1' else
(others => 'Z');
A(23 downto 8) <= Z3_DATA(15 downto 0) when RW='1' and Z3_DS ='0' and FCS='0' and lan_adr ='1' else
A(23 downto 8) <= Z3_DATA(15 downto 0) when RW='1' and Z3_DS ='0' and FCS='0' and LAN_ACCESS ='1' else
(others => 'Z');
A(7 downto 1) <= (others => 'Z');
--defined lancp signal that matches both LAN and CP addresses
DQ <= LAN_D_INIT when reset='0' else
DQ_DATA(15 downto 0) when RW='0' and FCS='0' and Z3_DS ='0' and lan_adr ='1' else
DQ_DATA(15 downto 0) when RW='0' and FCS='0' and Z3_DS ='0' and LAN_ACCESS ='1' else
(others => 'Z');
INT_OUT <= '0' when LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1' else
'Z';
OWN <= 'Z';
SLAVE <= '0' when FCS='0' and (autoconfig = '1' or lan_adr = '1') else '1';
SLAVE <= '0' when FCS='0' and (AUTOCONFIG_ACCESS = '1' or LAN_ACCESS = '1') else '1';
CFOUT <= '0' when AUTO_CONFIG_DONE='1' else '1';
OVR <= 'Z';
DTACK <= '0' when FCS='0' and (lan_rdy = '1' or autoconfig ='1') else 'Z';
DTACK <= '0' when FCS='0' and (LAN_READY = '1' or AUTOCONFIG_ACCESS ='1' or CONFIG_READY='1') else 'Z';
MTACK <= 'Z';
Logic/LAN_IDE/LAN_IDE_CP.vm6
+7974 -7597
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Logic/LAN_IDE/LAN_IDE_CP.xml
+1 -1
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File diff suppressed because one or more lines are too long
Logic/LAN_IDE/LAN_IDE_CP.xst
+1 -1
View File
@@ -17,7 +17,7 @@ run
-bus_delimiter <>
-case Maintain
-verilog2001 YES
-fsm_extract YES -fsm_encoding Auto
-fsm_extract YES -fsm_encoding Gray
-safe_implementation No
-mux_extract Yes
-resource_sharing YES
Logic/LAN_IDE/LAN_IDE_CP_envsettings.html
+1 -1
View File
@@ -146,7 +146,7 @@
<tr>
<td>-fsm_encoding</td>
<td>&nbsp;</td>
<td>Auto</td>
<td>Gray</td>
<td>AUTO</td>
</tr>
<tr>
Logic/LAN_IDE/LAN_IDE_CP_html/fit/ascii.htm
+1277 -1196
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File diff suppressed because it is too large Load Diff
Logic/LAN_IDE/LAN_IDE_CP_html/fit/defeqns.htm
+500 -454
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File diff suppressed because it is too large Load Diff
Logic/LAN_IDE/LAN_IDE_CP_html/fit/eqns.htm
+1583 -1421
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File diff suppressed because it is too large Load Diff
Logic/LAN_IDE/LAN_IDE_CP_html/fit/summary.htm
+7 -7
View File
@@ -30,7 +30,7 @@
<tr>
<td width="40%"> <b>Date</b>
</td>
<td width="60%"> 12-18-2018, 0:00AM</td>
<td width="60%"> 12-18-2018, 11:58AM</td>
</tr>
</table></span><br><span id="sumres" class="pgRef"><h5 align="center">RESOURCES SUMMARY</h5>
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
@@ -42,11 +42,11 @@
<th width="20%">Function Block Inputs Used</th>
</tr>
<tr>
<td width="20%" align="center">193/288  (68%)</td>
<td width="20%" align="center">521/1440  (37%)</td>
<td width="20%" align="center">106/288  (37%)</td>
<td width="20%" align="center">203/288  (71%)</td>
<td width="20%" align="center">540/1440  (38%)</td>
<td width="20%" align="center">114/288  (40%)</td>
<td width="20%" align="center">109/117  (94%)</td>
<td width="20%" align="center">366/864  (43%)</td>
<td width="20%" align="center">399/864  (47%)</td>
</tr>
</table></span><br><span id="pinres" class="pgRef"><h5 align="center">PIN RESOURCES</h5>
<table align="center" width="90%" border="0" cellspacing="0" cellpadding="0"><tr>
@@ -123,7 +123,7 @@
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
<tr>
<td width="50%"> Macrocells in high performance mode (MCHP)</td>
<td width="50%"> 193</td>
<td width="50%"> 203</td>
</tr>
<tr>
<td width="50%"> Macrocells in low power mode (MCLP)</td>
@@ -131,7 +131,7 @@
</tr>
<tr>
<td width="50%"> Total macrocells used (MC)</td>
<td width="50%"> 193</td>
<td width="50%"> 203</td>
</tr>
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
Logic/LAN_IDE/LAN_IDE_CP_ngdbuild.xrpt
+22 -22
View File
@@ -5,7 +5,7 @@
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application stringID="NgdBuild" timeStamp="Mon Dec 17 23:59:30 2018">
<application stringID="NgdBuild" timeStamp="Tue Dec 18 11:57:44 2018">
<section stringID="User_Env">
<table stringID="User_EnvVar">
<column stringID="variable"/>
@@ -70,38 +70,38 @@
<item dataType="int" stringID="NGDBUILD_NUM_INFOS" value="0"/>
</section>
<section stringID="NGDBUILD_PRE_UNISIM_SUMMARY">
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="258"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="34"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="7"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="247"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="53"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="6"/>
<item dataType="int" stringID="NGDBUILD_NUM_FD" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDC" value="26"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="3"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDP" value="42"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDPE" value="34"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDC" value="18"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="4"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDP" value="41"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDPE" value="50"/>
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="19"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="239"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="316"/>
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="195"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="22"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="2"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="151"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="11"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="17"/>
<item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="18"/>
</section>
<section stringID="NGDBUILD_POST_UNISIM_SUMMARY">
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="258"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="34"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="7"/>
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="70"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="247"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="53"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="6"/>
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="61"/>
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="74"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="239"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="316"/>
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="195"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="22"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="2"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="151"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="11"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="17"/>
<item dataType="int" stringID="NGDBUILD_NUM_TS_TIMESPEC" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="18"/>
</section>
<section stringID="NGDBUILD_CORE_GENERATION_SUMMARY">
<section stringID="NGDBUILD_CORE_INSTANCES"/>
Logic/LAN_IDE/LAN_IDE_CP_pad.csv
+1 -1
View File
@@ -1,7 +1,7 @@
Release 8.1i - Fit P.20131013
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
12-18-2018 0:00AM
12-18-2018 11:58AM
NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The comma ','
1 Release 8.1i - Fit P.20131013
2 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
3 12-18-2018 0:00AM 12-18-2018 11:58AM
4 NOTE: This file is designed to be imported into a spreadsheet program
5 such as Microsoft Excel for viewing, printing and sorting. The comma ','
6 character is used as the data field separator.
7 This file is also designed to support parsing.
Logic/LAN_IDE/LAN_IDE_CP_summary.html
+6 -6
View File
@@ -2,7 +2,7 @@
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
<TD ALIGN=CENTER COLSPAN='4'><B>LAN_IDE_CP Project Status (12/17/2018 - 23:59:32)</B></TD></TR>
<TD ALIGN=CENTER COLSPAN='4'><B>LAN_IDE_CP Project Status (12/18/2018 - 11:57:46)</B></TD></TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
<TD>LAN_IDE.xise</TD>
@@ -25,7 +25,7 @@ No Errors</TD>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>ISE 14.7</TD>
<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
<TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/*.xmsgs?&DataKey=Warning'>53 Warnings (0 new)</A></TD>
<TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/*.xmsgs?&DataKey=Warning'>52 Warnings (0 new)</A></TD>
</TR>
<TR ALIGN=LEFT>
<TD BGCOLOR='#FFFF99'><B>Design Goal:</B></dif></TD>
@@ -65,9 +65,9 @@ System Settings</A>
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Mo 17. Dez 23:59:23 2018</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Warning'>52 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Info'>10 Infos (0 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.bld'>Translation Report</A></TD><TD>Current</TD><TD>Mo 17. Dez 23:59:31 2018</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>1 Warning (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Out of Date</TD><TD>Mo 17. Dez 23:59:03 2018</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>8 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>1 Info (1 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Di 18. Dez 11:57:36 2018</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Warning'>51 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Info'>11 Infos (1 new)</A></TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.bld'>Translation Report</A></TD><TD>Current</TD><TD>Di 18. Dez 11:57:44 2018</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>1 Warning (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Out of Date</TD><TD>Di 18. Dez 11:57:11 2018</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>8 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>1 Info (1 new)</A></TD></TR>
<TR ALIGN=LEFT><TD>Power Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
</TABLE>
&nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
@@ -77,5 +77,5 @@ System Settings</A>
</TABLE>
<br><center><b>Date Generated:</b> 12/17/2018 - 23:59:32</center>
<br><center><b>Date Generated:</b> 12/18/2018 - 11:57:46</center>
</BODY></HTML>
Logic/LAN_IDE/LAN_IDE_CP_xst.xrpt
+19 -18
View File
@@ -5,7 +5,7 @@
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application stringID="Xst" timeStamp="Mon Dec 17 23:59:15 2018">
<application stringID="Xst" timeStamp="Tue Dec 18 11:57:27 2018">
<section stringID="User_Env">
<table stringID="User_EnvVar">
<column stringID="variable"/>
@@ -71,7 +71,7 @@
<item DEFAULT="MAINTAIN" stringID="XST_CASE" value="Maintain"/>
<item DEFAULT="YES" label="-verilog2001" stringID="XST_VERILOG2001" value="YES"/>
<item DEFAULT="YES" label="-fsm_extract" stringID="XST_FSMEXTRACT" value="YES"/>
<item DEFAULT="AUTO" label="-fsm_encoding" stringID="XST_FSMENCODING" value="Auto"/>
<item DEFAULT="AUTO" label="-fsm_encoding" stringID="XST_FSMENCODING" value="Gray"/>
<item DEFAULT="NO" label="-safe_implementation" stringID="XST_SAFEIMPLEMENTATION" value="No"/>
<item DEFAULT="YES" stringID="XST_MUXEXTRACT" value="Yes"/>
<item DEFAULT="YES" label="-resource_sharing" stringID="XST_RESOURCESHARING" value="YES"/>
@@ -80,10 +80,10 @@
</section>
<section stringID="XST_HDL_SYNTHESIS_REPORT">
<item dataType="int" stringID="XST_ROMS" value="1"></item>
<item dataType="int" stringID="XST_REGISTERS" value="54">
<item dataType="int" stringID="XST_REGISTERS" value="55">
<item dataType="int" stringID="XST_1BIT_REGISTER" value="49"/>
<item dataType="int" stringID="XST_14BIT_REGISTER" value="2"/>
<item dataType="int" stringID="XST_16BIT_REGISTER" value="2"/>
<item dataType="int" stringID="XST_16BIT_REGISTER" value="3"/>
<item dataType="int" stringID="XST_8BIT_REGISTER" value="1"/>
</item>
<item dataType="int" stringID="XST_COMPARATORS" value="1"></item>
@@ -97,6 +97,7 @@
<item dataType="int" stringID="XST_REGISTERS" value="48">
<item dataType="int" stringID="XST_FLIPFLOPS" value="48"/>
</item>
<item dataType="int" stringID="XST_COMPARATORS" value="1"></item>
</section>
<section stringID="XST_PARTITION_REPORT">
<section stringID="XST_PARTITION_IMPLEMENTATION_STATUS">
@@ -115,22 +116,22 @@
<item stringID="XST_IOS" value="116"/>
</section>
<section stringID="XST_CELL_USAGE">
<item dataType="int" stringID="XST_BELS" value="779">
<item dataType="int" stringID="XST_AND2" value="258"/>
<item dataType="int" stringID="XST_AND3" value="34"/>
<item dataType="int" stringID="XST_AND4" value="7"/>
<item dataType="int" stringID="XST_BELS" value="825">
<item dataType="int" stringID="XST_AND2" value="247"/>
<item dataType="int" stringID="XST_AND3" value="53"/>
<item dataType="int" stringID="XST_AND4" value="6"/>
<item dataType="int" stringID="XST_GND" value="1"/>
<item dataType="int" stringID="XST_INV" value="239"/>
<item dataType="int" stringID="XST_OR2" value="195"/>
<item dataType="int" stringID="XST_INV" value="316"/>
<item dataType="int" stringID="XST_OR2" value="151"/>
<item dataType="int" stringID="XST_VCC" value="1"/>
<item dataType="int" stringID="XST_XOR2" value="1"/>
<item dataType="int" stringID="XST_XOR2" value="18"/>
</item>
<item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="106">
<item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="114">
<item dataType="int" stringID="XST_FD" value="1"/>
<item dataType="int" stringID="XST_FDC" value="26"/>
<item dataType="int" stringID="XST_FDCE" value="3"/>
<item dataType="int" stringID="XST_FDP" value="42"/>
<item dataType="int" stringID="XST_FDPE" value="34"/>
<item dataType="int" stringID="XST_FDC" value="18"/>
<item dataType="int" stringID="XST_FDCE" value="4"/>
<item dataType="int" stringID="XST_FDP" value="41"/>
<item dataType="int" stringID="XST_FDPE" value="50"/>
</item>
<item dataType="int" stringID="XST_IO_BUFFERS" value="109">
<item dataType="int" stringID="XST_IBUF" value="19"/>
@@ -140,8 +141,8 @@
</section>
<section stringID="XST_ERRORS_STATISTICS">
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_ERRORS" value="0"/>
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="52"/>
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="10"/>
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="51"/>
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="11"/>
</section>
</application>
Logic/LAN_IDE/_ngo/netlist.lst
+1 -1
View File
@@ -1,2 +1,2 @@
C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1545087563
C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1545130656
OK
Logic/LAN_IDE/_xmsgs/xst.xmsgs
+3 -3
View File
@@ -5,6 +5,9 @@
behavior or data corruption. It is strongly advised that
users do not edit the contents of this file. -->
<messages>
<msg type="info" file="Xst" num="2679" delta="new" >Register &lt;<arg fmt="%s" index="1">DQ_SWAP</arg>&gt; in unit &lt;<arg fmt="%s" index="2">LAN_IDE_CP</arg>&gt; has a constant value of <arg fmt="%s" index="3">0</arg> during circuit operation. The register is replaced by logic.
</msg>
<msg type="info" file="Xst" num="2561" delta="old" >Always blocking tristate driving signal &lt;<arg fmt="%s" index="1">A</arg>&gt; in unit &lt;<arg fmt="%s" index="2">LAN_IDE_CP</arg>&gt; is removed.
</msg>
@@ -47,9 +50,6 @@
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">C1</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="646" delta="old" >Signal &lt;<arg fmt="%s" index="1">LAN_BASEADR</arg>&gt; is assigned but never used. This unconnected signal will be trimmed during the optimization process.
</msg>
<msg type="info" file="Xst" num="1799" delta="old" >State <arg fmt="%s" index="1">start_read_upper</arg> is never reached in FSM &lt;<arg fmt="%s" index="2">LAN_SM</arg>&gt;.
</msg>
Logic/LAN_IDE/area.xds
+1 -1
View File
@@ -7,7 +7,7 @@
<Properties>
<property name="Synthesize - XST:Optimization Goal" value="Speed"/>
<property name="Synthesize - XST:FSM Encoding Algorithm" value="Auto"/>
<property name="Synthesize - XST:FSM Encoding Algorithm" value="Gray"/>
<property name="Synthesize - XST:Safe Implementation" value="No"/>
</Properties>
Logic/LAN_IDE/iseconfig/LAN_IDE.projectmgr
+2 -2
View File
@@ -79,13 +79,13 @@
<ClosedNodesVersion>1</ClosedNodesVersion>
</ClosedNodes>
<SelectedItems>
<SelectedItem></SelectedItem>
<SelectedItem/>
</SelectedItems>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
<ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000f8000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f80000000100000000</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
<CurrentItem></CurrentItem>
<CurrentItem/>
</ItemView>
<ItemView engineview="BehavioralSim" guiview="Source" compilemode="AutoCompile" >
<ClosedNodes>
Logic/LAN_IDE/iseconfig/LAN_IDE_CP.xreport
+1 -1
View File
@@ -1,7 +1,7 @@
<?xml version='1.0' encoding='UTF-8'?>
<report-views version="2.0" >
<header>
<DateModified>2018-12-18T00:00:00</DateModified>
<DateModified>2018-12-18T11:26:25</DateModified>
<ModuleName>LAN_IDE_CP</ModuleName>
<SummaryTimeStamp>2018-12-17T23:59:32</SummaryTimeStamp>
<SavedFilePath>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/iseconfig/LAN_IDE_CP.xreport</SavedFilePath>
Logic/LAN_IDE/log.txt
+2316 -2094
View File
File diff suppressed because it is too large Load Diff
Logic/LAN_IDE/webtalk_pn.xml
+10 -7
View File
@@ -3,28 +3,31 @@
<!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application name="pn" timeStamp="Mon Dec 17 23:59:14 2018">
<application name="pn" timeStamp="Tue Dec 18 11:57:26 2018">
<section name="Project Information" visible="false">
<property name="ProjectID" value="0" type="project"/>
<property name="ProjectID" value="A2E624B6ED1449CD92F77DE849BF7B51" type="project"/>
<property name="ProjectIteration" value="0" type="project"/>
<property name="ProjectFile" value="C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE.xise" type="project"/>
<property name="ProjectCreationTimestamp" value="YYYY-MM-DDTHH:MM:SS" type="project"/>
<property name="ProjectCreationTimestamp" value="2018-12-18T11:26:25" type="project"/>
</section>
<section name="Project Statistics" visible="true">
<property name="PROP_Enable_Message_Filtering" value="false" type="design"/>
<property name="PROP_FitterReportFormat" value="HTML" type="process"/>
<property name="PROP_LastAppliedGoal" value="Balanced" type="design"/>
<property name="PROP_LastAppliedStrategy" value="area;C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/area.xds" type="design"/>
<property name="PROP_ManualCompileOrderImp" value="false" type="design"/>
<property name="PROP_PropSpecInProjFile" value="Store all values" type="design"/>
<property name="PROP_Simulator" value="ISim (VHDL/Verilog)" type="design"/>
<property name="PROP_SynthFsmEncode" value="Gray" type="process"/>
<property name="PROP_SynthTopFile" value="changed" type="process"/>
<property name="PROP_Top_Level_Module_Type" value="HDL" type="design"/>
<property name="PROP_UseSmartGuide" value="false" type="design"/>
<property name="PROP_UserBrowsedStrategyFiles" value="C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/area.xds" type="process"/>
<property name="PROP_intProjectCreationTimestamp" value="YYYY-MM-DDTHH:MM:SS" type="design"/>
<property name="PROP_intWbtProjectID" value="0" type="design"/>
<property name="PROP_intWorkingDirLocWRTProjDir" value="UnableToCalculate" type="design"/>
<property name="PROP_intWorkingDirUsed" value="Unknown" type="design"/>
<property name="PROP_UserConstraintEditorPreference" value="Text Editor" type="process"/>
<property name="PROP_intProjectCreationTimestamp" value="2018-12-18T11:26:25" type="design"/>
<property name="PROP_intWbtProjectID" value="A2E624B6ED1449CD92F77DE849BF7B51" type="design"/>
<property name="PROP_intWorkingDirLocWRTProjDir" value="Same" type="design"/>
<property name="PROP_intWorkingDirUsed" value="No" type="design"/>
<property name="PROP_lockPinsUcfFile" value="changed" type="process"/>
<property name="PROP_AutoTop" value="true" type="design"/>
<property name="PROP_DevFamily" value="XC9500XL CPLDs" type="design"/>
Logic/LAN_IDE/xlnx_auto_0_xdb/cst.xbcd
BIN
View File
Binary file not shown.
Logic/LAN_IDE/xst/work/hdllib.ref
+2 -2
View File
@@ -1,2 +1,2 @@
AR lan_ide_cp behavioral C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd sub00/vhpl01 1545087556
EN lan_ide_cp NULL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd sub00/vhpl00 1545087555
AR lan_ide_cp behavioral C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd sub00/vhpl01 1545130649
EN lan_ide_cp NULL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd sub00/vhpl00 1545130648
Logic/LAN_IDE/xst/work/hdpdeps.ref
+4 -4
View File
@@ -1,9 +1,9 @@
V3 3
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd 2018/12/17.23:58:53 P.20131013
EN work/LAN_IDE_CP 1545087555 \
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd 2018/12/18.11:57:26 P.20131013
EN work/LAN_IDE_CP 1545130648 \
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd \
PB ieee/std_logic_1164 1381692176 PB ieee/std_logic_arith 1381692177 \
PB ieee/STD_LOGIC_UNSIGNED 1381692179
AR work/LAN_IDE_CP/Behavioral 1545087556 \
AR work/LAN_IDE_CP/Behavioral 1545130649 \
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd \
EN work/LAN_IDE_CP 1545087555
EN work/LAN_IDE_CP 1545130648
Logic/LAN_IDE/xst/work/sub00/vhpl00.vho
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Logic/LAN_IDE/xst/work/sub00/vhpl01.vho
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