702 lines
25 KiB
C
702 lines
25 KiB
C
/*********************************************************************
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*
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* ENC424J600/624J600 Registers and Bits
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*
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*********************************************************************
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* FileName: ENCX24J600.h
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* Dependencies: None
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* Processor: PIC18, PIC24F, PIC24H, dsPIC30F, dsPIC33F, PIC32
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* Compiler: Microchip C32 v1.05 or higher
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* Microchip C30 v3.12 or higher
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* Microchip C18 v3.30 or higher
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* HI-TECH PICC-18 PRO 9.63PL2 or higher
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* Company: Microchip Technology, Inc.
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*
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* Software License Agreement
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*
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* Copyright (C) 2002-2009 Microchip Technology Inc. All rights
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* reserved.
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*
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* Microchip licenses to you the right to use, modify, copy, and
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* distribute:
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* (i) the Software when embedded on a Microchip microcontroller or
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* digital signal controller product ("Device") which is
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* integrated into Licensee's product; or
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* (ii) ONLY the Software driver source files ENC28J60.c, ENC28J60.h,
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* ENCX24J600.c and ENCX24J600.h ported to a non-Microchip device
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* used in conjunction with a Microchip ethernet controller for
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* the sole purpose of interfacing with the ethernet controller.
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*
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* You should refer to the license agreement accompanying this
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* Software for additional information regarding your rights and
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* obligations.
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*
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* THE SOFTWARE AND DOCUMENTATION ARE PROVIDED "AS IS" WITHOUT
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* WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT
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* LIMITATION, ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR A
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* PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* MICROCHIP BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF
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* PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS
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* BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE
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* THEREOF), ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER
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* SIMILAR COSTS, WHETHER ASSERTED ON THE BASIS OF CONTRACT, TORT
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* (INCLUDING NEGLIGENCE), BREACH OF WARRANTY, OR OTHERWISE.
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*
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*
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* Author Date Comment
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*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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* Howard Schlunder 11/30/07 Original
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********************************************************************/
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#ifndef __ENCX24J600_H
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#define __ENCX24J600_H
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//#include "GenericTypeDefs.h"
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//#include "HardwareProfile.h"
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#define ENC100_INTERFACE_MODE 3
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// Define macro for 8-bit PSP SFR address translation to SPI addresses
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#define ENC100_TRANSLATE_TO_PIN_ADDR(a) (a)
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#define ENC100_RAM_SIZE (24*1024)
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//read/write macros
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#define WRITEREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+(b)))=(WORD)(c)//;printf("Write 0x%x at register 0x%lx\n",(WORD)(c),((volatile BYTE *)(a)+(b)))
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#define READREG(a,b) (*(volatile WORD *)((volatile BYTE *)(a)+(b)))//;printf("Read from register 0x%lx\n",((volatile BYTE *)(a)+(b)))
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//set/clear register bit macros
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#define SETREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+((b)+(SET_OFFSET))))=((WORD)(c))//;printf("Set register 0x%x at register 0x%lx\n",(WORD)(c),(volatile WORD *)((volatile BYTE *)(a)+((b)+(SET_OFFSET))));
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#define CLRREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+((b)+(CLR_OFFSET))))=((WORD)(c))//;printf("Clear register 0x%x at register 0x%lx\n",(WORD)(c),(volatile WORD *)((volatile BYTE *)(a)+((b)+(CLR_OFFSET))))
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// Crypto memory addresses. These are accessible by the DMA only and therefore
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// have the same addresses no matter what MCU interface is being used (SPI,
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// 8-bit PSP, or 16-bit PSP)
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#define ENC100_MODEX_Y (0x7880)
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#define ENC100_MODEX_E (0x7800)
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#define ENC100_MODEX_X (0x7880)
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#define ENC100_MODEX_M (0x7900)
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#define ENC100_HASH_DATA_IN (0x7A00)
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#define ENC100_HASH_IV_IN (0x7A40)
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#define ENC100_HASH_LEN_IN (0x7A54)
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#define ENC100_HASH_DIGEST_OUT (0x7A70)
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#define ENC100_HASH_LEN_OUT (0x7A84)
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#define ENC100_HASH_BASE_ADDR (0x7A00)
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#define ENC100_AES_KEY (0x7C00)
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#define ENC100_AES_TEXTA (0x7C20)
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#define ENC100_AES_TEXTB (0x7C30)
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#define ENC100_AES_XOROUT (0x7C40)
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#define SET_OFFSET ENC100_TRANSLATE_TO_PIN_ADDR(0x0100)
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#define CLR_OFFSET ENC100_TRANSLATE_TO_PIN_ADDR(0x0180)
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////////////////////////////////////////////////////
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// ENC424J600/624J600 register addresses //
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////////////////////////////////////////////////////
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// SPI Bank 0 registers --------
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#define ETXST ENC100_TRANSLATE_TO_PIN_ADDR(0x7E00)
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#define ETXSTL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E00)
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#define ETXSTH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E01)
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#define ETXLEN ENC100_TRANSLATE_TO_PIN_ADDR(0x7E02)
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#define ETXLENL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E02)
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#define ETXLENH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E03)
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#define ERXST ENC100_TRANSLATE_TO_PIN_ADDR(0x7E04)
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#define ERXSTL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E04)
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#define ERXSTH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E05)
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#define ERXTAIL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E06)
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#define ERXTAILL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E06)
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#define ERXTAILH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E07)
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#define ERXHEAD ENC100_TRANSLATE_TO_PIN_ADDR(0x7E08)
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#define ERXHEADL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E08)
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#define ERXHEADH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E09)
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#define EDMAST ENC100_TRANSLATE_TO_PIN_ADDR(0x7E0A)
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#define EDMASTL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E0A)
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#define EDMASTH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E0B)
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#define EDMALEN ENC100_TRANSLATE_TO_PIN_ADDR(0x7E0C)
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#define EDMALENL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E0C)
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#define EDMALENH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E0D)
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#define EDMADST ENC100_TRANSLATE_TO_PIN_ADDR(0x7E0E)
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#define EDMADSTL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E0E)
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#define EDMADSTH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E0F)
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#define EDMACS ENC100_TRANSLATE_TO_PIN_ADDR(0x7E10)
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#define EDMACSL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E10)
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#define EDMACSH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E11)
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#define ETXSTAT ENC100_TRANSLATE_TO_PIN_ADDR(0x7E12)
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#define ETXSTATL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E12)
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#define ETXSTATH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E13)
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#define ETXWIRE ENC100_TRANSLATE_TO_PIN_ADDR(0x7E14)
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#define ETXWIREL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E14)
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#define ETXWIREH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E15)
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// SPI all bank registers
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#define EUDAST ENC100_TRANSLATE_TO_PIN_ADDR(0x7E16)
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#define EUDASTL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E16)
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#define EUDASTH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E17)
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#define EUDAND ENC100_TRANSLATE_TO_PIN_ADDR(0x7E18)
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#define EUDANDL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E18)
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#define EUDANDH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E19)
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#define ESTAT ENC100_TRANSLATE_TO_PIN_ADDR(0x7E1A)
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#define ESTATL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E1A)
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#define ESTATH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E1B)
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#define EIR ENC100_TRANSLATE_TO_PIN_ADDR(0x7E1C)
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#define EIRL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E1C)
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#define EIRH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E1D)
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#define ECON1 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E1E)
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#define ECON1L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E1E)
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#define ECON1H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E1F)
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// SPI Bank 1 registers -----
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#define EHT1 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E20)
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#define EHT1L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E20)
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#define EHT1H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E21)
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#define EHT2 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E22)
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#define EHT2L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E22)
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#define EHT2H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E23)
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#define EHT3 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E24)
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#define EHT3L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E24)
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#define EHT3H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E25)
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#define EHT4 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E26)
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#define EHT4L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E26)
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#define EHT4H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E27)
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#define EPMM1 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E28)
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#define EPMM1L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E28)
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#define EPMM1H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E29)
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#define EPMM2 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E2A)
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#define EPMM2L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E2A)
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#define EPMM2H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E2B)
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#define EPMM3 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E2C)
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#define EPMM3L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E2C)
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#define EPMM3H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E2D)
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#define EPMM4 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E2E)
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#define EPMM4L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E2E)
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#define EPMM4H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E2F)
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#define EPMCS ENC100_TRANSLATE_TO_PIN_ADDR(0x7E30)
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#define EPMCSL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E30)
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#define EPMCSH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E31)
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#define EPMO ENC100_TRANSLATE_TO_PIN_ADDR(0x7E32)
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#define EPMOL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E32)
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#define EPMOH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E33)
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#define ERXFCON ENC100_TRANSLATE_TO_PIN_ADDR(0x7E34)
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#define ERXFCONL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E34)
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#define ERXFCONH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E35)
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// SPI all bank registers from 0x36 to 0x3F
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// SPI Bank 2 registers -----
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#define MACON1 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E40)
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#define MACON1L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E40)
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#define MACON1H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E41)
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#define MACON2 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E42)
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#define MACON2L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E42)
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#define MACON2H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E43)
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#define MABBIPG ENC100_TRANSLATE_TO_PIN_ADDR(0x7E44)
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#define MABBIPGL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E44)
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#define MABBIPGH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E45)
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#define MAIPG ENC100_TRANSLATE_TO_PIN_ADDR(0x7E46)
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#define MAIPGL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E46)
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#define MAIPGH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E47)
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#define MACLCON ENC100_TRANSLATE_TO_PIN_ADDR(0x7E48)
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#define MACLCONL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E48)
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#define MACLCONH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E49)
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#define MAMXFL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E4A)
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#define MAMXFLL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E4A)
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#define MAMXFLH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E4B)
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//#define r ENC100_TRANSLATE_TO_PIN_ADDR(0x7E4C)
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//#define r ENC100_TRANSLATE_TO_PIN_ADDR(0x7E4D)
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//#define r ENC100_TRANSLATE_TO_PIN_ADDR(0x7E4E)
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//#define r ENC100_TRANSLATE_TO_PIN_ADDR(0x7E4F)
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//#define r ENC100_TRANSLATE_TO_PIN_ADDR(0x7E50)
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//#define r ENC100_TRANSLATE_TO_PIN_ADDR(0x7E51)
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#define MICMD ENC100_TRANSLATE_TO_PIN_ADDR(0x7E52)
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#define MICMDL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E52)
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#define MICMDH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E53)
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#define MIREGADR ENC100_TRANSLATE_TO_PIN_ADDR(0x7E54)
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#define MIREGADRL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E54)
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#define MIREGADRH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E55)
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// SPI all bank registers from 0x56 to 0x5F
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// SPI Bank 3 registers -----
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#define MAADR3 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E60)
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#define MAADR3L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E60)
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#define MAADR3H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E61)
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#define MAADR2 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E62)
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#define MAADR2L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E62)
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#define MAADR2H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E63)
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#define MAADR1 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E64)
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#define MAADR1L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E64)
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#define MAADR1H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E65)
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#define MIWR ENC100_TRANSLATE_TO_PIN_ADDR(0x7E66)
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#define MIWRL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E66)
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#define MIWRH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E67)
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#define MIRD ENC100_TRANSLATE_TO_PIN_ADDR(0x7E68)
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#define MIRDL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E68)
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#define MIRDH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E69)
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#define MISTAT ENC100_TRANSLATE_TO_PIN_ADDR(0x7E6A)
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#define MISTATL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E6A)
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#define MISTATH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E6B)
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#define EPAUS ENC100_TRANSLATE_TO_PIN_ADDR(0x7E6C)
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#define EPAUSL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E6C)
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#define EPAUSH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E6D)
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#define ECON2 ENC100_TRANSLATE_TO_PIN_ADDR(0x7E6E)
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#define ECON2L ENC100_TRANSLATE_TO_PIN_ADDR(0x7E6E)
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#define ECON2H ENC100_TRANSLATE_TO_PIN_ADDR(0x7E6F)
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#define ERXWM ENC100_TRANSLATE_TO_PIN_ADDR(0x7E70)
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#define ERXWML ENC100_TRANSLATE_TO_PIN_ADDR(0x7E70)
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#define ERXWMH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E71)
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#define EIE ENC100_TRANSLATE_TO_PIN_ADDR(0x7E72)
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#define EIEL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E72)
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#define EIEH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E73)
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#define EIDLED ENC100_TRANSLATE_TO_PIN_ADDR(0x7E74)
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#define EIDLEDL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E74)
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#define EIDLEDH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E75)
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// SPI all bank registers from 0x66 to 0x6F
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// SPI Non-banked Special Function Registers
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#define EGPDATA ENC100_TRANSLATE_TO_PIN_ADDR(0x7E80)
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#define EGPDATAL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E80)
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//#define r ENC100_TRANSLATE_TO_PIN_ADDR(0x7E81)
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#define ERXDATA ENC100_TRANSLATE_TO_PIN_ADDR(0x7E82)
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#define ERXDATAL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E82)
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//#define r ENC100_TRANSLATE_TO_PIN_ADDR(0x7E83)
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#define EUDADATA ENC100_TRANSLATE_TO_PIN_ADDR(0x7E84)
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#define EUDADATAL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E84)
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//#define r ENC100_TRANSLATE_TO_PIN_ADDR(0x7E85)
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#define EGPRDPT ENC100_TRANSLATE_TO_PIN_ADDR(0x7E86)
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#define EGPRDPTL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E86)
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#define EGPRDPTH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E87)
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#define EGPWRPT ENC100_TRANSLATE_TO_PIN_ADDR(0x7E88)
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#define EGPWRPTL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E88)
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#define EGPWRPTH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E89)
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#define ERXRDPT ENC100_TRANSLATE_TO_PIN_ADDR(0x7E8A)
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#define ERXRDPTL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E8A)
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#define ERXRDPTH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E8B)
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#define ERXWRPT ENC100_TRANSLATE_TO_PIN_ADDR(0x7E8C)
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#define ERXWRPTL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E8C)
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#define ERXWRPTH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E8D)
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#define EUDARDPT ENC100_TRANSLATE_TO_PIN_ADDR(0x7E8E)
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#define EUDARDPTL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E8E)
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#define EUDARDPTH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E8F)
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#define EUDAWRPT ENC100_TRANSLATE_TO_PIN_ADDR(0x7E90)
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#define EUDAWRPTL ENC100_TRANSLATE_TO_PIN_ADDR(0x7E90)
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#define EUDAWRPTH ENC100_TRANSLATE_TO_PIN_ADDR(0x7E91)
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////////////////////////////////////////////////////
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// ENC424J600/624J600 PHY Register Addresses //
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////////////////////////////////////////////////////
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#define PHCON1 0x00
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#define PHSTAT1 0x01
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#define PHANA 0x04
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#define PHANLPA 0x05
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#define PHANE 0x06
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#define PHCON2 0x11
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#define PHSTAT2 0x1B
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#define PHSTAT3 0x1F
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////////////////////////////////////////////////////
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// ENC424J600/624J600 register bits //
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////////////////////////////////////////////////////
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// ESTAT bits ----------
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#define ESTAT_INT ((WORD)1<<15)
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#define ESTAT_FCIDLE ((WORD)1<<14)
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#define ESTAT_RXBUSY ((WORD)1<<13)
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#define ESTAT_CLKRDY ((WORD)1<<12)
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#define ESTAT_RSTDONE ((WORD)1<<11)
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#define ESTAT_PHYDPX ((WORD)1<<10)
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#define ESTAT_PHYRDY ((WORD)1<<9)
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#define ESTAT_PHYLNK ((WORD)1<<8)
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#define ESTAT_PKTCNT7 (1<<7)
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#define ESTAT_PKTCNT6 (1<<6)
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#define ESTAT_PKTCNT5 (1<<5)
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#define ESTAT_PKTCNT4 (1<<4)
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#define ESTAT_PKTCNT3 (1<<3)
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#define ESTAT_PKTCNT2 (1<<2)
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#define ESTAT_PKTCNT1 (1<<1)
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#define ESTAT_PKTCNT0 (1)
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// EIR bits ------------
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#define EIR_CRYPTEN ((WORD)1<<15)
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#define EIR_MODEXIF ((WORD)1<<14)
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#define EIR_HASHIF ((WORD)1<<13)
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#define EIR_AESIF ((WORD)1<<12)
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#define EIR_LINKIF ((WORD)1<<11)
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#define EIR_PRDYIF ((WORD)1<<10)
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#define EIR_r9 ((WORD)1<<9)
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#define EIR_r8 ((WORD)1<<8)
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#define EIR_r7 (1<<7)
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#define EIR_PKTIF (1<<6)
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#define EIR_DMAIF (1<<5)
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#define EIR_r4 (1<<4)
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#define EIR_TXIF (1<<3)
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#define EIR_TXABTIF (1<<2)
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#define EIR_RXABTIF (1<<1)
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#define EIR_PCFULIF (1)
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// ECON1 bits ----------
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#define ECON1_MODEXST ((WORD)1<<15)
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#define ECON1_HASHEN ((WORD)1<<14)
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#define ECON1_HASHOP ((WORD)1<<13)
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#define ECON1_HASHLST ((WORD)1<<12)
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#define ECON1_AESST ((WORD)1<<11)
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#define ECON1_AESOP1 ((WORD)1<<10)
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#define ECON1_AESOP0 ((WORD)1<<9)
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#define ECON1_PKTDEC ((WORD)1<<8)
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#define ECON1_FCOP1 (1<<7)
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#define ECON1_FCOP0 (1<<6)
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#define ECON1_DMAST (1<<5)
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#define ECON1_DMACPY (1<<4)
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#define ECON1_DMACSSD (1<<3)
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#define ECON1_DMANOCS (1<<2)
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#define ECON1_TXRTS (1<<1)
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#define ECON1_RXEN (1)
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// ETXSTAT bits --------
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#define ETXSTAT_r12 ((WORD)1<<12)
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#define ETXSTAT_r11 ((WORD)1<<11)
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#define ETXSTAT_LATECOL ((WORD)1<<10)
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#define ETXSTAT_MAXCOL ((WORD)1<<9)
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#define ETXSTAT_EXDEFER ((WORD)1<<8)
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#define ETXSTAT_DEFER (1<<7)
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#define ETXSTAT_r6 (1<<6)
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#define ETXSTAT_r5 (1<<5)
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#define ETXSTAT_CRCBAD (1<<4)
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#define ETXSTAT_COLCNT3 (1<<3)
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#define ETXSTAT_COLCNT2 (1<<2)
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#define ETXSTAT_COLCNT1 (1<<1)
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#define ETXSTAT_COLCNT0 (1)
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// ERXFCON bits --------
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#define ERXFCON_HTEN ((WORD)1<<15)
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#define ERXFCON_MPEN ((WORD)1<<14)
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#define ERXFCON_NOTPM ((WORD)1<<12)
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#define ERXFCON_PMEN3 ((WORD)1<<11)
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#define ERXFCON_PMEN2 ((WORD)1<<10)
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#define ERXFCON_PMEN1 ((WORD)1<<9)
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#define ERXFCON_PMEN0 ((WORD)1<<8)
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#define ERXFCON_CRCEEN (1<<7)
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#define ERXFCON_CRCEN (1<<6)
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#define ERXFCON_RUNTEEN (1<<5)
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#define ERXFCON_RUNTEN (1<<4)
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#define ERXFCON_UCEN (1<<3)
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#define ERXFCON_NOTMEEN (1<<2)
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#define ERXFCON_MCEN (1<<1)
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#define ERXFCON_BCEN (1)
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// MACON1 bits ---------
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#define MACON1_r15 ((WORD)1<<15)
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#define MACON1_r14 ((WORD)1<<14)
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#define MACON1_r11 ((WORD)1<<11)
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#define MACON1_r10 ((WORD)1<<10)
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#define MACON1_r9 ((WORD)1<<9)
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#define MACON1_r8 ((WORD)1<<8)
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#define MACON1_LOOPBK (1<<4)
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#define MACON1_r3 (1<<3)
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#define MACON1_RXPAUS (1<<2)
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#define MACON1_PASSALL (1<<1)
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#define MACON1_r0 (1)
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// MACON2 bits ---------
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#define MACON2_DEFER ((WORD)1<<14)
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#define MACON2_BPEN ((WORD)1<<13)
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#define MACON2_NOBKOFF ((WORD)1<<12)
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#define MACON2_r9 ((WORD)1<<9)
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#define MACON2_r8 ((WORD)1<<8)
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#define MACON2_PADCFG2 (1<<7)
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#define MACON2_PADCFG1 (1<<6)
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#define MACON2_PADCFG0 (1<<5)
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#define MACON2_TXCRCEN (1<<4)
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#define MACON2_PHDREN (1<<3)
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#define MACON2_HFRMEN (1<<2)
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#define MACON2_r1 (1<<1)
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#define MACON2_FULDPX (1)
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// MABBIPG bits --------
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#define MABBIPG_BBIPG6 (1<<6)
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#define MABBIPG_BBIPG5 (1<<5)
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#define MABBIPG_BBIPG4 (1<<4)
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#define MABBIPG_BBIPG3 (1<<3)
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#define MABBIPG_BBIPG2 (1<<2)
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#define MABBIPG_BBIPG1 (1<<1)
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#define MABBIPG_BBIPG0 (1)
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// MAIPG bits ----------
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#define MAIPG_r14 ((WORD)1<<14)
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#define MAIPG_r13 ((WORD)1<<13)
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#define MAIPG_r12 ((WORD)1<<12)
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#define MAIPG_r11 ((WORD)1<<11)
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#define MAIPG_r10 ((WORD)1<<10)
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#define MAIPG_r9 ((WORD)1<<9)
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#define MAIPG_r8 ((WORD)1<<8)
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#define MAIPG_IPG6 (1<<6)
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#define MAIPG_IPG5 (1<<5)
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#define MAIPG_IPG4 (1<<4)
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#define MAIPG_IPG3 (1<<3)
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#define MAIPG_IPG2 (1<<2)
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#define MAIPG_IPG1 (1<<1)
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#define MAIPG_IPG0 (1)
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// MACLCON bits --------
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#define MACLCON_r13 ((WORD)1<<13)
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#define MACLCON_r12 ((WORD)1<<12)
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#define MACLCON_r11 ((WORD)1<<11)
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#define MACLCON_r10 ((WORD)1<<10)
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#define MACLCON_r9 ((WORD)1<<9)
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#define MACLCON_r8 ((WORD)1<<8)
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#define MACLCON_MAXRET3 (1<<3)
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#define MACLCON_MAXRET2 (1<<2)
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#define MACLCON_MAXRET1 (1<<1)
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#define MACLCON_MAXRET0 (1)
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// MICMD bits ----------
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#define MICMD_MIISCAN (1<<1)
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#define MICMD_MIIRD (1)
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// MIREGADR bits -------
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#define MIREGADR_r12 ((WORD)1<<12)
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#define MIREGADR_r11 ((WORD)1<<11)
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#define MIREGADR_r10 ((WORD)1<<10)
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#define MIREGADR_r9 ((WORD)1<<9)
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#define MIREGADR_r8 ((WORD)1<<8)
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#define MIREGADR_PHREG4 (1<<4)
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#define MIREGADR_PHREG3 (1<<3)
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#define MIREGADR_PHREG2 (1<<2)
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#define MIREGADR_PHREG1 (1<<1)
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#define MIREGADR_PHREG0 (1)
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// MISTAT bits ---------
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#define MISTAT_r3 (1<<3)
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#define MISTAT_NVALID (1<<2)
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#define MISTAT_SCAN (1<<1)
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#define MISTAT_BUSY (1)
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// ECON2 bits ----------
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#define ECON2_ETHEN ((WORD)1<<15)
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#define ECON2_STRCH ((WORD)1<<14)
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#define ECON2_TXMAC ((WORD)1<<13)
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#define ECON2_SHA1MD5 ((WORD)1<<12)
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#define ECON2_COCON3 ((WORD)1<<11)
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#define ECON2_COCON2 ((WORD)1<<10)
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#define ECON2_COCON1 ((WORD)1<<9)
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#define ECON2_COCON0 ((WORD)1<<8)
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#define ECON2_AUTOFC (1<<7)
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#define ECON2_TXRST (1<<6)
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#define ECON2_RXRST (1<<5)
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#define ECON2_ETHRST (1<<4)
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#define ECON2_MODLEN1 (1<<3)
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#define ECON2_MODLEN0 (1<<2)
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#define ECON2_AESLEN1 (1<<1)
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#define ECON2_AESLEN0 (1)
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// ERXWM bits ----------
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#define ERXWM_RXFWM7 ((WORD)1<<15)
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#define ERXWM_RXFWM6 ((WORD)1<<14)
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#define ERXWM_RXFWM5 ((WORD)1<<13)
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#define ERXWM_RXFWM4 ((WORD)1<<12)
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#define ERXWM_RXFWM3 ((WORD)1<<11)
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#define ERXWM_RXFWM2 ((WORD)1<<10)
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#define ERXWM_RXFWM1 ((WORD)1<<9)
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#define ERXWM_RXFWM0 ((WORD)1<<8)
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#define ERXWM_RXEWM7 (1<<7)
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#define ERXWM_RXEWM6 (1<<6)
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#define ERXWM_RXEWM5 (1<<5)
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#define ERXWM_RXEWM4 (1<<4)
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#define ERXWM_RXEWM3 (1<<3)
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#define ERXWM_RXEWM2 (1<<2)
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#define ERXWM_RXEWM1 (1<<1)
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#define ERXWM_RXEWM0 (1)
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// EIE bits ------------
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#define EIE_INTIE ((WORD)1<<15)
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#define EIE_MODEXIE ((WORD)1<<14)
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#define EIE_HASHIE ((WORD)1<<13)
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#define EIE_AESIE ((WORD)1<<12)
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#define EIE_LINKIE ((WORD)1<<11)
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#define EIE_PRDYIE ((WORD)1<<10)
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#define EIE_r9 ((WORD)1<<9)
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#define EIE_r8 ((WORD)1<<8)
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#define EIE_r7 (1<<7)
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#define EIE_PKTIE (1<<6)
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#define EIE_DMAIE (1<<5)
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#define EIE_r4 (1<<4)
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#define EIE_TXIE (1<<3)
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#define EIE_TXABTIE (1<<2)
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#define EIE_RXABTIE (1<<1)
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#define EIE_PCFULIE (1)
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// EIDLED bits ---------
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#define EIDLED_LACFG3 ((WORD)1<<15)
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#define EIDLED_LACFG2 ((WORD)1<<14)
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#define EIDLED_LACFG1 ((WORD)1<<13)
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#define EIDLED_LACFG0 ((WORD)1<<12)
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#define EIDLED_LBCFG3 ((WORD)1<<11)
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#define EIDLED_LBCFG2 ((WORD)1<<10)
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#define EIDLED_LBCFG1 ((WORD)1<<9)
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#define EIDLED_LBCFG0 ((WORD)1<<8)
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#define EIDLED_DEVID2 (1<<7)
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#define EIDLED_DEVID1 (1<<6)
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#define EIDLED_DEVID0 (1<<5)
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#define EIDLED_REVID4 (1<<4)
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#define EIDLED_REVID3 (1<<3)
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#define EIDLED_REVID2 (1<<2)
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#define EIDLED_REVID1 (1<<1)
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#define EIDLED_REVID0 (1)
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// PHCON1 bits ---------
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#define PHCON1_PRST ((WORD)1<<15)
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#define PHCON1_PLOOPBK ((WORD)1<<14)
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#define PHCON1_SPD100 ((WORD)1<<13)
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#define PHCON1_ANEN ((WORD)1<<12)
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#define PHCON1_PSLEEP ((WORD)1<<11)
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#define PHCON1_r10 ((WORD)1<<10)
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#define PHCON1_RENEG ((WORD)1<<9)
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#define PHCON1_PFULDPX ((WORD)1<<8)
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#define PHCON1_r7 (1<<7)
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#define PHCON1_r6 (1<<6)
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#define PHCON1_r5 (1<<5)
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#define PHCON1_r4 (1<<4)
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#define PHCON1_r3 (1<<3)
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#define PHCON1_r2 (1<<2)
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#define PHCON1_r1 (1<<1)
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#define PHCON1_r0 (1)
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// PHSTAT1 bits --------
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#define PHSTAT1_r15 ((WORD)1<<15)
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#define PHSTAT1_FULL100 ((WORD)1<<14)
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#define PHSTAT1_HALF100 ((WORD)1<<13)
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#define PHSTAT1_FULL10 ((WORD)1<<12)
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#define PHSTAT1_HALF10 ((WORD)1<<11)
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#define PHSTAT1_r10 ((WORD)1<<10)
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#define PHSTAT1_r9 ((WORD)1<<9)
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#define PHSTAT1_r8 ((WORD)1<<8)
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#define PHSTAT1_r7 (1<<7)
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#define PHSTAT1_r6 (1<<6)
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#define PHSTAT1_ANDONE (1<<5)
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#define PHSTAT1_LRFAULT (1<<4)
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#define PHSTAT1_ANABLE (1<<3)
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#define PHSTAT1_LLSTAT (1<<2)
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#define PHSTAT1_r1 (1<<1)
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#define PHSTAT1_EXTREGS (1)
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// PHANA bits ----------
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#define PHANA_ADNP ((WORD)1<<15)
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#define PHANA_r14 ((WORD)1<<14)
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#define PHANA_ADFAULT ((WORD)1<<13)
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#define PHANA_r12 ((WORD)1<<12)
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#define PHANA_ADPAUS1 ((WORD)1<<11)
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#define PHANA_ADPAUS0 ((WORD)1<<10)
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#define PHANA_r9 ((WORD)1<<9)
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#define PHANA_AD100FD ((WORD)1<<8)
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#define PHANA_AD100 (1<<7)
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#define PHANA_AD10FD (1<<6)
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#define PHANA_AD10 (1<<5)
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#define PHANA_ADIEEE4 (1<<4)
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#define PHANA_ADIEEE3 (1<<3)
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#define PHANA_ADIEEE2 (1<<2)
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#define PHANA_ADIEEE1 (1<<1)
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#define PHANA_ADIEEE0 (1)
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// PHANLPA bits --------
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#define PHANLPA_LPNP ((WORD)1<<15)
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#define PHANLPA_LPACK ((WORD)1<<14)
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#define PHANLPA_LPFAULT ((WORD)1<<13)
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#define PHANLPA_r12 ((WORD)1<<12)
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#define PHANLPA_LPPAUS1 ((WORD)1<<11)
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#define PHANLPA_LPPAUS0 ((WORD)1<<10)
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#define PHANLPA_LP100T4 ((WORD)1<<9)
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#define PHANLPA_LP100FD ((WORD)1<<8)
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#define PHANLPA_LP100 (1<<7)
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#define PHANLPA_LP10FD (1<<6)
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#define PHANLPA_LP10 (1<<5)
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#define PHANLPA_LPIEEE4 (1<<4)
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#define PHANLPA_LPIEEE3 (1<<3)
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#define PHANLPA_LPIEEE2 (1<<2)
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#define PHANLPA_LPIEEE1 (1<<1)
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#define PHANLPA_LPIEEE0 (1)
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// PHANE bits ----------
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#define PHANE_r15 ((WORD)1<<15)
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#define PHANE_r14 ((WORD)1<<14)
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#define PHANE_r13 ((WORD)1<<13)
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#define PHANE_r12 ((WORD)1<<12)
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#define PHANE_r11 ((WORD)1<<11)
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#define PHANE_r10 ((WORD)1<<10)
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#define PHANE_r9 ((WORD)1<<9)
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#define PHANE_r8 ((WORD)1<<8)
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#define PHANE_r7 (1<<7)
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#define PHANE_r6 (1<<6)
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#define PHANE_r5 (1<<5)
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#define PHANE_PDFLT (1<<4)
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#define PHANE_r3 (1<<3)
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#define PHANE_r2 (1<<2)
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#define PHANE_LPARCD (1<<1)
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#define PHANA_LPANABL (1)
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// PHCON2 bits ---------
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#define PHCON2_r15 ((WORD)1<<15)
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#define PHCON2_r14 ((WORD)1<<14)
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#define PHCON2_EDPWRDN ((WORD)1<<13)
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#define PHCON2_r12 ((WORD)1<<12)
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#define PHCON2_EDTHRES ((WORD)1<<11)
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#define PHCON2_r10 ((WORD)1<<10)
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#define PHCON2_r9 ((WORD)1<<9)
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#define PHCON2_r8 ((WORD)1<<8)
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#define PHCON2_r7 (1<<7)
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#define PHCON2_r6 (1<<6)
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#define PHCON2_r5 (1<<5)
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#define PHCON2_r4 (1<<4)
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#define PHCON2_r3 (1<<3)
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#define PHCON2_FRCLNK (1<<2)
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#define PHCON2_EDSTAT (1<<1)
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#define PHCON2_r0 (1)
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// PHSTAT2 bits ---------
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#define PHSTAT2_r15 ((WORD)1<<15)
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#define PHSTAT2_r14 ((WORD)1<<14)
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#define PHSTAT2_r13 ((WORD)1<<13)
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#define PHSTAT2_r12 ((WORD)1<<12)
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#define PHSTAT2_r11 ((WORD)1<<11)
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#define PHSTAT2_r10 ((WORD)1<<10)
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#define PHSTAT2_r9 ((WORD)1<<9)
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#define PHSTAT2_r8 ((WORD)1<<8)
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#define PHSTAT2_r7 (1<<7)
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#define PHSTAT2_r6 (1<<6)
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#define PHSTAT2_r5 (1<<5)
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#define PHSTAT2_PLRITY (1<<4)
|
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#define PHSTAT2_r3 (1<<3)
|
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#define PHSTAT2_r2 (1<<2)
|
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#define PHSTAT2_r1 (1<<1)
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#define PHSTAT2_r0 (1)
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|
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// PHSTAT3 bits --------
|
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#define PHSTAT3_r15 ((WORD)1<<15)
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#define PHSTAT3_r14 ((WORD)1<<14)
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#define PHSTAT3_r13 ((WORD)1<<13)
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#define PHSTAT3_r12 ((WORD)1<<12)
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#define PHSTAT3_r11 ((WORD)1<<11)
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#define PHSTAT3_r10 ((WORD)1<<10)
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#define PHSTAT3_r9 ((WORD)1<<9)
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#define PHSTAT3_r8 ((WORD)1<<8)
|
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#define PHSTAT3_r7 (1<<7)
|
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#define PHSTAT3_r6 (1<<6)
|
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#define PHSTAT3_r5 (1<<5)
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#define PHSTAT3_SPDDPX2 (1<<4)
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#define PHSTAT3_SPDDPX1 (1<<3)
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#define PHSTAT3_SPDDPX0 (1<<2)
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#define PHSTAT3_r1 (1<<1)
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#define PHSTAT3_r0 (1)
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#endif
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