3310 lines
143 KiB
Plaintext
3310 lines
143 KiB
Plaintext
MDF Database: version 1.0
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MDF_INFO | LAN_IDE_CP | XC95288XL-10-TQ144
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MACROCELL | 12 | 12 | AUTO_CONFIG_DONE<1>
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ATTRIBUTES | 8528736 | 0
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OUTPUTMC | 47 | 1 | 17 | 12 | 17 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 16 | 6 | 11 | 6 | 6 | 5 | 0 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 5 | 1 | 5 | 14 | 2 | 1 | 12 | 11 | 12 | 10 | 12 | 9 | 13 | 10 | 1 | 16 | 4 | 3 | 6 | 1 | 6 | 9 | 6 | 14 | 6 | 15 | 6 | 17 | 8 | 14 | 8 | 17 | 12 | 0
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INPUTS | 3 | AUTO_CONFIG_DONE_CYCLE<1> | SHUT_UP<2>/SHUT_UP<2>_CLKF | AS
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INPUTMC | 2 | 12 | 17 | 2 | 15
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INPUTP | 1 | 152
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EQ | 4 |
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AUTO_CONFIG_DONE<1>.D = AUTO_CONFIG_DONE_CYCLE<1>;
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AUTO_CONFIG_DONE<1>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
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!AUTO_CONFIG_DONE<1>.AR = RESET; // GSR
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AUTO_CONFIG_DONE<1>.CE = AS;
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GLOBALS | 1 | 4 | RESET
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MACROCELL | 11 | 16 | AUTO_CONFIG_DONE<0>
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ATTRIBUTES | 8528736 | 0
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OUTPUTMC | 41 | 1 | 17 | 12 | 17 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 14 | 6 | 9 | 6 | 6 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 5 | 1 | 5 | 14 | 2 | 1 | 12 | 11 | 12 | 10 | 12 | 9 | 13 | 10 | 4 | 3 | 5 | 0 | 6 | 14 | 6 | 15 | 11 | 17
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INPUTS | 5 | AUTO_CONFIG_DONE_CYCLE<0> | SHUT_UP<2>/SHUT_UP<2>_CLKF | AS | LAN_INT | LAN_IRQ_D0
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INPUTMC | 3 | 1 | 17 | 2 | 15 | 11 | 10
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INPUTP | 2 | 152 | 201
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EXPORTS | 1 | 11 | 17
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EQ | 5 |
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AUTO_CONFIG_DONE<0>.D = AUTO_CONFIG_DONE_CYCLE<0>;
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AUTO_CONFIG_DONE<0>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
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!AUTO_CONFIG_DONE<0>.AR = RESET; // GSR
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AUTO_CONFIG_DONE<0>.CE = AS;
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AUTO_CONFIG_DONE<0>.EXP = !LAN_INT & LAN_IRQ_D0
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GLOBALS | 1 | 4 | RESET
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MACROCELL | 1 | 17 | AUTO_CONFIG_DONE_CYCLE<0>
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ATTRIBUTES | 4334368 | 0
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OUTPUTMC | 3 | 11 | 16 | 12 | 17 | 12 | 0
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INPUTS | 16 | AS | AUTO_CONFIG_DONE<0> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | AUTO_CONFIG_DONE<1> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF | D_8_IOBUFE.EXP
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INPUTMC | 6 | 11 | 16 | 5 | 14 | 1 | 15 | 12 | 12 | 2 | 15 | 1 | 16
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INPUTP | 10 | 152 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
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IMPORTS | 1 | 1 | 16
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EQ | 15 |
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AUTO_CONFIG_DONE_CYCLE<0>.T = !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !RW &
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!LDS & DS_D & !A<5> & !A<1> & A<6> & !A<4> & A<3>
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# !AS & !AUTO_CONFIG_DONE<0> & autoconfig & !RW &
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!UDS & DS_D & !A<5> & !A<1> & A<6> & !A<4> & A<3>
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# !AS & !AUTO_CONFIG_DONE<0> & autoconfig & !RW &
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!LDS & DS_D & !A<5> & !A<1> & A<6> & !A<4> & A<3>
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# !AS & autoconfig & !RW & !LDS & DS_D & !A<5> &
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!A<1> & A<6> & !A<4> & A<3> & A<2>
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;Imported pterms FB2_17
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# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !RW &
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!UDS & DS_D & !A<5> & !A<1> & A<6> & !A<4> & A<3>
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# !AS & autoconfig & !RW & !UDS & DS_D & !A<5> &
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!A<1> & A<6> & !A<4> & A<3> & A<2>;
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AUTO_CONFIG_DONE_CYCLE<0>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
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!AUTO_CONFIG_DONE_CYCLE<0>.AR = RESET; // GSR
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GLOBALS | 1 | 4 | RESET
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MACROCELL | 12 | 17 | AUTO_CONFIG_DONE_CYCLE<1>
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ATTRIBUTES | 4334368 | 0
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OUTPUTMC | 1 | 12 | 12
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INPUTS | 17 | AS | AUTO_CONFIG_DONE<0> | AUTO_CONFIG_DONE_CYCLE<0> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | AUTO_CONFIG_DONE<1> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF | EXP54_.EXP
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INPUTMC | 7 | 11 | 16 | 1 | 17 | 5 | 14 | 1 | 15 | 12 | 12 | 2 | 15 | 12 | 0
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INPUTP | 10 | 152 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
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IMPORTS | 1 | 12 | 0
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EQ | 21 |
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AUTO_CONFIG_DONE_CYCLE<1>.T = !AS & !AUTO_CONFIG_DONE<1> &
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AUTO_CONFIG_DONE_CYCLE<0> & autoconfig & !RW & !LDS & DS_D & !A<5> & !A<1> &
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A<6> & !A<4> & A<3>
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# !AS & !AUTO_CONFIG_DONE<0> &
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AUTO_CONFIG_DONE_CYCLE<0> & autoconfig & !RW & !UDS & DS_D & !A<5> & !A<1> &
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A<6> & !A<4> & A<3>
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# !AS & !AUTO_CONFIG_DONE<0> &
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AUTO_CONFIG_DONE_CYCLE<0> & autoconfig & !RW & !LDS & DS_D & !A<5> & !A<1> &
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A<6> & !A<4> & A<3>
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# !AS & AUTO_CONFIG_DONE_CYCLE<0> & autoconfig &
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!RW & !LDS & DS_D & !A<5> & !A<1> & A<6> & !A<4> &
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A<3> & A<2>
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;Imported pterms FB13_1
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# !AS & !AUTO_CONFIG_DONE<1> &
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AUTO_CONFIG_DONE_CYCLE<0> & autoconfig & !RW & !UDS & DS_D & !A<5> & !A<1> &
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A<6> & !A<4> & A<3>
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# !AS & AUTO_CONFIG_DONE_CYCLE<0> & autoconfig &
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!RW & !UDS & DS_D & !A<5> & !A<1> & A<6> & !A<4> &
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A<3> & A<2>;
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AUTO_CONFIG_DONE_CYCLE<1>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
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!AUTO_CONFIG_DONE_CYCLE<1>.AR = RESET; // GSR
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GLOBALS | 1 | 4 | RESET
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MACROCELL | 9 | 15 | LAN_INT_ENABLE
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ATTRIBUTES | 4334368 | 0
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OUTPUTMC | 6 | 9 | 15 | 11 | 17 | 14 | 16 | 9 | 16 | 11 | 0 | 9 | 14
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INPUTS | 15 | D<15>.PIN | LAN_INT_ENABLE | lan_adr | A<15> | RW | LDS | D<8>.PIN | SHUT_UP<2>/SHUT_UP<2>_CLKF | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | UDS | AS | D<0>.PIN | CP_CS | DQ_10_IOBUFE.EXP
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INPUTMC | 7 | 9 | 15 | 5 | 16 | 2 | 15 | 11 | 6 | 11 | 5 | 4 | 1 | 9 | 16
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INPUTP | 8 | 89 | 139 | 158 | 157 | 32 | 155 | 152 | 4
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EXPORTS | 1 | 9 | 14
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IMPORTS | 1 | 9 | 16
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EQ | 17 |
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LAN_INT_ENABLE.T = !D<15>.PIN & LAN_INT_ENABLE & lan_adr & A<15> &
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!RW & !LDS
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;Imported pterms FB10_17
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# D<15>.PIN & !LAN_INT_ENABLE & lan_adr & A<15> &
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!RW & !UDS
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# D<15>.PIN & !LAN_INT_ENABLE & lan_adr & A<15> &
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!RW & !LDS
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# !D<15>.PIN & LAN_INT_ENABLE & lan_adr & A<15> &
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!RW & !UDS;
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LAN_INT_ENABLE.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
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!LAN_INT_ENABLE.AR = RESET; // GSR
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LAN_INT_ENABLE.EXP = !D<8>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
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!LAN_RST_SM_FSM_FFd3
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# !D<8>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
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!LAN_RST_SM_FSM_FFd3
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# !AS & !lan_adr & !RW & UDS & !LDS &
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!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & !D<0>.PIN & !CP_CS
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GLOBALS | 1 | 4 | RESET
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MACROCELL | 3 | 17 | CP_BASEADR<0>
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ATTRIBUTES | 4330272 | 0
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OUTPUTMC | 3 | 3 | 17 | 2 | 1 | 4 | 17
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INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<8>.PIN | CP_BASEADR<0> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
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INPUTMC | 6 | 12 | 12 | 11 | 16 | 3 | 17 | 5 | 14 | 1 | 15 | 2 | 15
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INPUTP | 11 | 152 | 32 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
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EQ | 14 |
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CP_BASEADR<0>.T = !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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D<8>.PIN & !CP_BASEADR<0> & autoconfig & !RW & !UDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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D<8>.PIN & !CP_BASEADR<0> & autoconfig & !RW & !LDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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!D<8>.PIN & CP_BASEADR<0> & autoconfig & !RW & !UDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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!D<8>.PIN & CP_BASEADR<0> & autoconfig & !RW & !LDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
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CP_BASEADR<0>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
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!CP_BASEADR<0>.AP = RESET; // GSR
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GLOBALS | 1 | 1 | RESET
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MACROCELL | 3 | 16 | CP_BASEADR<1>
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ATTRIBUTES | 4330272 | 0
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OUTPUTMC | 3 | 3 | 16 | 2 | 15 | 4 | 17
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INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<9>.PIN | CP_BASEADR<1> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
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INPUTMC | 6 | 12 | 12 | 11 | 16 | 3 | 16 | 5 | 14 | 1 | 15 | 2 | 15
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INPUTP | 11 | 152 | 73 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
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EQ | 14 |
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CP_BASEADR<1>.T = !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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D<9>.PIN & !CP_BASEADR<1> & autoconfig & !RW & !UDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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D<9>.PIN & !CP_BASEADR<1> & autoconfig & !RW & !LDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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!D<9>.PIN & CP_BASEADR<1> & autoconfig & !RW & !UDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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!D<9>.PIN & CP_BASEADR<1> & autoconfig & !RW & !LDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
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CP_BASEADR<1>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
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!CP_BASEADR<1>.AP = RESET; // GSR
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GLOBALS | 1 | 1 | RESET
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MACROCELL | 6 | 16 | CP_BASEADR<2>
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ATTRIBUTES | 4330272 | 0
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OUTPUTMC | 4 | 6 | 16 | 2 | 0 | 4 | 2 | 4 | 17
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INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<10>.PIN | CP_BASEADR<2> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
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INPUTMC | 6 | 12 | 12 | 11 | 16 | 6 | 16 | 5 | 14 | 1 | 15 | 2 | 15
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INPUTP | 11 | 152 | 74 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
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EQ | 14 |
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CP_BASEADR<2>.T = !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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D<10>.PIN & !CP_BASEADR<2> & autoconfig & !RW & !UDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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D<10>.PIN & !CP_BASEADR<2> & autoconfig & !RW & !LDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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!D<10>.PIN & CP_BASEADR<2> & autoconfig & !RW & !UDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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!D<10>.PIN & CP_BASEADR<2> & autoconfig & !RW & !LDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
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CP_BASEADR<2>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
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!CP_BASEADR<2>.AP = RESET; // GSR
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GLOBALS | 1 | 1 | RESET
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MACROCELL | 0 | 17 | CP_BASEADR<3>
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ATTRIBUTES | 4330272 | 0
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OUTPUTMC | 3 | 0 | 17 | 2 | 0 | 4 | 2
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INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<11>.PIN | CP_BASEADR<3> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
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INPUTMC | 6 | 12 | 12 | 11 | 16 | 0 | 17 | 5 | 14 | 1 | 15 | 2 | 15
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INPUTP | 11 | 152 | 77 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
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EQ | 14 |
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CP_BASEADR<3>.T = !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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D<11>.PIN & !CP_BASEADR<3> & autoconfig & !RW & !UDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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D<11>.PIN & !CP_BASEADR<3> & autoconfig & !RW & !LDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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!D<11>.PIN & CP_BASEADR<3> & autoconfig & !RW & !UDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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!D<11>.PIN & CP_BASEADR<3> & autoconfig & !RW & !LDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
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CP_BASEADR<3>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
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!CP_BASEADR<3>.AP = RESET; // GSR
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GLOBALS | 1 | 1 | RESET
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MACROCELL | 7 | 17 | CP_BASEADR<4>
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ATTRIBUTES | 4330272 | 0
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OUTPUTMC | 4 | 7 | 17 | 2 | 16 | 2 | 0 | 4 | 2
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INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<12>.PIN | CP_BASEADR<4> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
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INPUTMC | 6 | 12 | 12 | 11 | 16 | 7 | 17 | 5 | 14 | 1 | 15 | 2 | 15
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INPUTP | 11 | 152 | 78 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
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EQ | 14 |
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CP_BASEADR<4>.T = !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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D<12>.PIN & !CP_BASEADR<4> & autoconfig & !RW & !UDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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D<12>.PIN & !CP_BASEADR<4> & autoconfig & !RW & !LDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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!D<12>.PIN & CP_BASEADR<4> & autoconfig & !RW & !UDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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!D<12>.PIN & CP_BASEADR<4> & autoconfig & !RW & !LDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
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CP_BASEADR<4>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
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!CP_BASEADR<4>.AP = RESET; // GSR
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GLOBALS | 1 | 1 | RESET
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MACROCELL | 10 | 17 | CP_BASEADR<5>
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ATTRIBUTES | 4330272 | 0
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OUTPUTMC | 3 | 10 | 17 | 2 | 16 | 4 | 0
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INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<13>.PIN | CP_BASEADR<5> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
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INPUTMC | 6 | 12 | 12 | 11 | 16 | 10 | 17 | 5 | 14 | 1 | 15 | 2 | 15
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INPUTP | 11 | 152 | 80 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
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EQ | 14 |
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CP_BASEADR<5>.T = !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
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D<13>.PIN & !CP_BASEADR<5> & autoconfig & !RW & !UDS & DS_D &
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!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
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# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
|
|
D<13>.PIN & !CP_BASEADR<5> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
|
|
!D<13>.PIN & CP_BASEADR<5> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
|
|
!D<13>.PIN & CP_BASEADR<5> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
CP_BASEADR<5>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!CP_BASEADR<5>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 13 | 17 | CP_BASEADR<6>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 3 | 13 | 17 | 2 | 16 | 4 | 0
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<14>.PIN | CP_BASEADR<6> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 13 | 17 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 81 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
CP_BASEADR<6>.T = !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
|
|
D<14>.PIN & !CP_BASEADR<6> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
|
|
D<14>.PIN & !CP_BASEADR<6> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
|
|
!D<14>.PIN & CP_BASEADR<6> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
|
|
!D<14>.PIN & CP_BASEADR<6> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
CP_BASEADR<6>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!CP_BASEADR<6>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 13 | 16 | CP_BASEADR<7>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 4 | 13 | 16 | 2 | 17 | 4 | 1 | 4 | 0
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<15>.PIN | CP_BASEADR<7> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 13 | 16 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 89 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
CP_BASEADR<7>.T = !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
|
|
D<15>.PIN & !CP_BASEADR<7> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
|
|
D<15>.PIN & !CP_BASEADR<7> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
|
|
!D<15>.PIN & CP_BASEADR<7> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
|
|
!D<15>.PIN & CP_BASEADR<7> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
CP_BASEADR<7>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!CP_BASEADR<7>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 8 | 16 | Dout1<0>
|
|
ATTRIBUTES | 8524576 | 0
|
|
OUTPUTMC | 3 | 8 | 16 | 4 | 16 | 8 | 15
|
|
INPUTS | 14 | AS | AUTO_CONFIG_DONE<1> | autoconfig | LDS | A<5> | A<1> | A<6> | A<4> | A<3> | UDS | Dout1<0> | EXP49_.EXP | EXP50_.EXP | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 5 | 14 | 8 | 16 | 8 | 15 | 8 | 17 | 2 | 15
|
|
INPUTP | 8 | 152 | 157 | 91 | 107 | 98 | 97 | 99 | 155
|
|
IMPORTS | 2 | 8 | 15 | 8 | 17
|
|
EQ | 40 |
|
|
!Dout1<0>.D = AS & !Dout1<0>
|
|
# !Dout1<0> & !autoconfig
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & !A<1> & !A<6> & !A<4> & !A<3>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & !A<1> & !A<6> & !A<4> & !A<3>
|
|
;Imported pterms FB9_16
|
|
# !Dout1<0> & UDS & LDS
|
|
# !AS & autoconfig & !LDS & A<5> & !A<6> & !A<4> &
|
|
!A<3> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & A<1> & !A<6> &
|
|
A<4> & A<3>
|
|
# !AS & autoconfig & !LDS & !A<5> & A<6> & !A<4> &
|
|
!A<3> & !A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & !A<6> & A<4> &
|
|
A<3> & !A<2>
|
|
;Imported pterms FB9_15
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !UDS & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !LDS & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & !A<1> & !A<6> & !A<3> & A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !UDS & A<5> & A<1> & !A<6> & !A<4> & A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !LDS & A<5> & A<1> & !A<6> & !A<4> & A<2>
|
|
;Imported pterms FB9_18
|
|
# !AS & autoconfig & !UDS & A<5> & !A<6> & !A<4> &
|
|
!A<3> & A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & A<1> & !A<6> &
|
|
A<4> & A<3>
|
|
# !AS & autoconfig & !UDS & !A<5> & A<6> & !A<4> &
|
|
!A<3> & !A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & !A<6> & A<4> &
|
|
A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & !A<1> & !A<6> & !A<3> & A<2>;
|
|
Dout1<0>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!Dout1<0>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 6 | 13 | Dout1<1>
|
|
ATTRIBUTES | 8524576 | 0
|
|
OUTPUTMC | 2 | 6 | 13 | 6 | 2
|
|
INPUTS | 12 | AS | Dout1<1> | autoconfig | UDS | LDS | A<5> | A<4> | A<3> | A<2> | EXP42_.EXP | EXP43_.EXP | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 5 | 6 | 13 | 5 | 14 | 6 | 12 | 6 | 14 | 2 | 15
|
|
INPUTP | 7 | 152 | 155 | 157 | 91 | 97 | 99 | 101
|
|
IMPORTS | 2 | 6 | 12 | 6 | 14
|
|
EQ | 45 |
|
|
!Dout1<1>.D = AS & !Dout1<1>
|
|
# !Dout1<1> & !autoconfig
|
|
# !Dout1<1> & UDS & LDS
|
|
# !AS & autoconfig & !LDS & !A<5> & !A<4> & !A<3> &
|
|
!A<2>
|
|
;Imported pterms FB7_13
|
|
# !AS & autoconfig & !UDS & !A<5> & !A<4> & !A<3> &
|
|
!A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & !A<1> & !A<6> &
|
|
A<4> & A<3>
|
|
# !AS & autoconfig & !UDS & !A<5> & !A<6> & A<4> &
|
|
A<3> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & !A<1> & !A<6> &
|
|
A<4> & A<3>
|
|
# !AS & autoconfig & !LDS & !A<5> & !A<6> & A<4> &
|
|
A<3> & A<2>
|
|
;Imported pterms FB7_12
|
|
# !AS & AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & !A<1> & !A<6> & A<4> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & A<1> & !A<6> & !A<3> & !A<2>
|
|
;Imported pterms FB7_15
|
|
# !AS & AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & A<1> & !A<6> & !A<4> & !A<3>
|
|
# !AS & AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & !A<1> & !A<6> & A<4> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<0> & autoconfig & !LDS &
|
|
!A<5> & A<1> & !A<6> & !A<4> & !A<3>
|
|
# !AS & autoconfig & !LDS & A<5> & !A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>
|
|
;Imported pterms FB7_16
|
|
# !AS & AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & A<1> & !A<6> & !A<4> & !A<3>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & A<1> & !A<6> & !A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<0> & autoconfig & !UDS &
|
|
!A<5> & A<1> & !A<6> & !A<4> & !A<3>
|
|
# !AS & autoconfig & !UDS & A<5> & !A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>;
|
|
Dout1<1>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!Dout1<1>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 6 | 8 | Dout1<2>
|
|
ATTRIBUTES | 8524576 | 0
|
|
OUTPUTMC | 2 | 6 | 8 | 6 | 4
|
|
INPUTS | 13 | AS | Dout1<2> | autoconfig | UDS | LDS | A<5> | A<1> | A<4> | A<3> | A<2> | EXP39_.EXP | EXP40_.EXP | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 5 | 6 | 8 | 5 | 14 | 6 | 7 | 6 | 9 | 2 | 15
|
|
INPUTP | 8 | 152 | 155 | 157 | 91 | 107 | 97 | 99 | 101
|
|
IMPORTS | 2 | 6 | 7 | 6 | 9
|
|
EQ | 40 |
|
|
!Dout1<2>.D = AS & !Dout1<2>
|
|
# !Dout1<2> & !autoconfig
|
|
# !Dout1<2> & UDS & LDS
|
|
# !AS & autoconfig & !LDS & !A<5> & A<1> & !A<4> &
|
|
!A<3> & !A<2>
|
|
;Imported pterms FB7_8
|
|
# !AS & autoconfig & !UDS & !A<5> & A<1> & !A<4> &
|
|
!A<3> & !A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & A<6> & !A<4> &
|
|
!A<3> & !A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & A<6> & !A<4> &
|
|
!A<3> & !A<2>
|
|
# !AS & autoconfig & !LDS & A<5> & A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & A<1> & !A<6> &
|
|
A<4> & !A<3> & A<2>
|
|
;Imported pterms FB7_7
|
|
# !AS & AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & AUTO_CONFIG_DONE<0> & autoconfig & !UDS &
|
|
A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & !A<1> & !A<6> &
|
|
A<4> & A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & !A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & !A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
;Imported pterms FB7_10
|
|
# !AS & AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & AUTO_CONFIG_DONE<0> & autoconfig & !LDS &
|
|
A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & autoconfig & !UDS & A<5> & A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & A<1> & !A<6> &
|
|
A<4> & !A<3> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & !A<1> & !A<6> &
|
|
A<4> & A<3> & A<2>;
|
|
Dout1<2>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!Dout1<2>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 6 | 0 | Dout1<3>
|
|
ATTRIBUTES | 8524576 | 0
|
|
OUTPUTMC | 4 | 6 | 0 | 6 | 11 | 6 | 10 | 6 | 17
|
|
INPUTS | 13 | AS | autoconfig | LDS | A<5> | A<1> | A<6> | A<3> | A<2> | UDS | Dout1<3> | EXP35_.EXP | EXP45_.EXP | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 5 | 5 | 14 | 6 | 0 | 6 | 1 | 6 | 17 | 2 | 15
|
|
INPUTP | 8 | 152 | 157 | 91 | 107 | 98 | 99 | 101 | 155
|
|
IMPORTS | 2 | 6 | 1 | 6 | 17
|
|
EQ | 32 |
|
|
!Dout1<3>.D = AS & !Dout1<3>
|
|
# !Dout1<3> & !autoconfig
|
|
# !AS & autoconfig & !UDS & !A<5> & A<1> & !A<6> &
|
|
!A<3> & !A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & A<1> & !A<6> &
|
|
!A<3> & !A<2>
|
|
;Imported pterms FB7_2
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & A<1> & !A<6> & !A<3>
|
|
# !AS & autoconfig & !UDS & !A<5> & A<6> & !A<4> &
|
|
!A<3> & !A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & !A<1> & !A<6> &
|
|
A<4> & A<3> & !A<2>
|
|
# !AS & autoconfig & !LDS & A<5> & !A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & !A<1> & !A<6> &
|
|
A<4> & A<3> & !A<2>
|
|
;Imported pterms FB7_3
|
|
# !AS & autoconfig & !UDS & A<5> & !A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>
|
|
;Imported pterms FB7_18
|
|
# !Dout1<3> & UDS & LDS
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & A<1> & !A<6> & !A<3>
|
|
# !AS & autoconfig & !UDS & !A<5> & A<1> & !A<6> &
|
|
A<4> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & A<1> & !A<6> &
|
|
A<4> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & A<6> & !A<4> &
|
|
!A<3> & !A<2>;
|
|
Dout1<3>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!Dout1<3>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 3 | 15 | IDE_BASEADR<0>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 2 | 3 | 15 | 14 | 17
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<8>.PIN | IDE_BASEADR<0> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 3 | 15 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 32 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
IDE_BASEADR<0>.T = !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<8>.PIN & !IDE_BASEADR<0> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<8>.PIN & !IDE_BASEADR<0> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<8>.PIN & IDE_BASEADR<0> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<8>.PIN & IDE_BASEADR<0> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
IDE_BASEADR<0>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!IDE_BASEADR<0>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 3 | 14 | IDE_BASEADR<1>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 3 | 3 | 14 | 14 | 0 | 14 | 17
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<9>.PIN | IDE_BASEADR<1> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 3 | 14 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 73 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
IDE_BASEADR<1>.T = !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<9>.PIN & !IDE_BASEADR<1> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<9>.PIN & !IDE_BASEADR<1> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<9>.PIN & IDE_BASEADR<1> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<9>.PIN & IDE_BASEADR<1> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
IDE_BASEADR<1>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!IDE_BASEADR<1>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 10 | 15 | IDE_BASEADR<2>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 2 | 10 | 15 | 14 | 0
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<10>.PIN | IDE_BASEADR<2> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 10 | 15 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 74 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
IDE_BASEADR<2>.T = !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<10>.PIN & !IDE_BASEADR<2> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<10>.PIN & !IDE_BASEADR<2> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<10>.PIN & IDE_BASEADR<2> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<10>.PIN & IDE_BASEADR<2> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
IDE_BASEADR<2>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!IDE_BASEADR<2>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 0 | 15 | IDE_BASEADR<3>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 2 | 0 | 15 | 14 | 0
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<11>.PIN | IDE_BASEADR<3> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 0 | 15 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 77 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
IDE_BASEADR<3>.T = !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<11>.PIN & !IDE_BASEADR<3> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<11>.PIN & !IDE_BASEADR<3> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<11>.PIN & IDE_BASEADR<3> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<11>.PIN & IDE_BASEADR<3> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
IDE_BASEADR<3>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!IDE_BASEADR<3>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 13 | 15 | IDE_BASEADR<4>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 3 | 13 | 15 | 14 | 1 | 14 | 16
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<12>.PIN | IDE_BASEADR<4> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 13 | 15 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 78 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
IDE_BASEADR<4>.T = !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<12>.PIN & !IDE_BASEADR<4> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<12>.PIN & !IDE_BASEADR<4> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<12>.PIN & IDE_BASEADR<4> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<12>.PIN & IDE_BASEADR<4> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
IDE_BASEADR<4>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!IDE_BASEADR<4>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 10 | 14 | IDE_BASEADR<5>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 2 | 10 | 14 | 14 | 1
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<13>.PIN | IDE_BASEADR<5> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 10 | 14 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 80 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
IDE_BASEADR<5>.T = !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<13>.PIN & !IDE_BASEADR<5> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<13>.PIN & !IDE_BASEADR<5> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<13>.PIN & IDE_BASEADR<5> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<13>.PIN & IDE_BASEADR<5> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
IDE_BASEADR<5>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!IDE_BASEADR<5>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 13 | 12 | IDE_BASEADR<6>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 2 | 13 | 12 | 14 | 17
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<14>.PIN | IDE_BASEADR<6> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 13 | 12 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 81 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
IDE_BASEADR<6>.T = !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<14>.PIN & !IDE_BASEADR<6> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<14>.PIN & !IDE_BASEADR<6> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<14>.PIN & IDE_BASEADR<6> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<14>.PIN & IDE_BASEADR<6> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
IDE_BASEADR<6>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!IDE_BASEADR<6>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 13 | 11 | IDE_BASEADR<7>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 2 | 13 | 11 | 14 | 1
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<15>.PIN | IDE_BASEADR<7> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 13 | 11 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 89 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
IDE_BASEADR<7>.T = !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<15>.PIN & !IDE_BASEADR<7> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<15>.PIN & !IDE_BASEADR<7> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<15>.PIN & IDE_BASEADR<7> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<15>.PIN & IDE_BASEADR<7> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
IDE_BASEADR<7>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!IDE_BASEADR<7>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 3 | 12 | LAN_BASEADR<0>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 3 | 3 | 12 | 5 | 12 | 5 | 0
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<8>.PIN | LAN_BASEADR<0> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 3 | 12 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 32 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
LAN_BASEADR<0>.T = !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<8>.PIN & !LAN_BASEADR<0> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<8>.PIN & !LAN_BASEADR<0> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<8>.PIN & LAN_BASEADR<0> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<8>.PIN & LAN_BASEADR<0> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
LAN_BASEADR<0>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!LAN_BASEADR<0>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 3 | 10 | LAN_BASEADR<1>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 5 | 3 | 10 | 5 | 14 | 5 | 10 | 5 | 0 | 5 | 12
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<9>.PIN | LAN_BASEADR<1> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 3 | 10 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 73 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
LAN_BASEADR<1>.T = !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<9>.PIN & !LAN_BASEADR<1> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<9>.PIN & !LAN_BASEADR<1> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<9>.PIN & LAN_BASEADR<1> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<9>.PIN & LAN_BASEADR<1> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
LAN_BASEADR<1>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!LAN_BASEADR<1>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 10 | 12 | LAN_BASEADR<2>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 4 | 10 | 12 | 5 | 13 | 5 | 9 | 5 | 17
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<10>.PIN | LAN_BASEADR<2> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 10 | 12 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 74 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
LAN_BASEADR<2>.T = !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<10>.PIN & !LAN_BASEADR<2> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<10>.PIN & !LAN_BASEADR<2> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<10>.PIN & LAN_BASEADR<2> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<10>.PIN & LAN_BASEADR<2> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
LAN_BASEADR<2>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!LAN_BASEADR<2>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 12 | 16 | LAN_BASEADR<3>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 3 | 12 | 16 | 5 | 12 | 5 | 17
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<11>.PIN | LAN_BASEADR<3> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 12 | 16 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 77 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
LAN_BASEADR<3>.T = !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<11>.PIN & !LAN_BASEADR<3> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<11>.PIN & !LAN_BASEADR<3> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<11>.PIN & LAN_BASEADR<3> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<11>.PIN & LAN_BASEADR<3> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
LAN_BASEADR<3>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!LAN_BASEADR<3>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 13 | 9 | LAN_BASEADR<4>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 4 | 13 | 9 | 5 | 15 | 5 | 11 | 5 | 17
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<12>.PIN | LAN_BASEADR<4> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 13 | 9 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 78 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
LAN_BASEADR<4>.T = !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<12>.PIN & !LAN_BASEADR<4> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<12>.PIN & !LAN_BASEADR<4> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<12>.PIN & LAN_BASEADR<4> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<12>.PIN & LAN_BASEADR<4> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
LAN_BASEADR<4>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!LAN_BASEADR<4>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 12 | 15 | LAN_BASEADR<5>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 3 | 12 | 15 | 5 | 15 | 5 | 11
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<13>.PIN | LAN_BASEADR<5> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 12 | 15 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 80 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
LAN_BASEADR<5>.T = !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<13>.PIN & !LAN_BASEADR<5> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<13>.PIN & !LAN_BASEADR<5> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<13>.PIN & LAN_BASEADR<5> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<13>.PIN & LAN_BASEADR<5> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
LAN_BASEADR<5>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!LAN_BASEADR<5>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 13 | 8 | LAN_BASEADR<6>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 3 | 13 | 8 | 5 | 15 | 5 | 10
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<14>.PIN | LAN_BASEADR<6> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 13 | 8 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 81 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
LAN_BASEADR<6>.T = !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<14>.PIN & !LAN_BASEADR<6> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<14>.PIN & !LAN_BASEADR<6> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<14>.PIN & LAN_BASEADR<6> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<14>.PIN & LAN_BASEADR<6> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
LAN_BASEADR<6>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!LAN_BASEADR<6>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 13 | 7 | LAN_BASEADR<7>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 3 | 13 | 7 | 5 | 16 | 5 | 10
|
|
INPUTS | 17 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | D<15>.PIN | LAN_BASEADR<7> | autoconfig | RW | LDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 13 | 7 | 5 | 14 | 1 | 15 | 2 | 15
|
|
INPUTP | 11 | 152 | 89 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 14 |
|
|
LAN_BASEADR<7>.T = !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<15>.PIN & !LAN_BASEADR<7> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
D<15>.PIN & !LAN_BASEADR<7> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<15>.PIN & LAN_BASEADR<7> & autoconfig & !RW & !UDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
!D<15>.PIN & LAN_BASEADR<7> & autoconfig & !RW & !LDS & DS_D &
|
|
!A<5> & !A<1> & A<6> & !A<4> & A<3> & !A<2>;
|
|
LAN_BASEADR<7>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!LAN_BASEADR<7>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 11 | 17 | LAN_IRQ_OUT
|
|
ATTRIBUTES | 8524576 | 0
|
|
OUTPUTMC | 2 | 11 | 17 | 14 | 16
|
|
INPUTS | 11 | LAN_INT_ENABLE | LAN_IRQ_OUT | LAN_INT | UDS | LDS | RW | lan_adr | A<15> | EXP53_.EXP | AUTO_CONFIG_DONE<0>.EXP | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 9 | 15 | 11 | 17 | 5 | 16 | 11 | 0 | 11 | 16 | 2 | 15
|
|
INPUTP | 5 | 201 | 155 | 157 | 158 | 139
|
|
IMPORTS | 2 | 11 | 0 | 11 | 16
|
|
EQ | 15 |
|
|
!LAN_IRQ_OUT.D = LAN_INT_ENABLE & !LAN_IRQ_OUT & !LAN_INT &
|
|
!lan_adr
|
|
# LAN_INT_ENABLE & !LAN_IRQ_OUT & !LAN_INT & !A<15>
|
|
# LAN_INT_ENABLE & !LAN_IRQ_OUT & !LAN_INT & RW
|
|
# LAN_INT_ENABLE & !LAN_IRQ_OUT & !LAN_INT & UDS &
|
|
LDS
|
|
;Imported pterms FB12_1
|
|
# LAN_INT_ENABLE & !D<14>.PIN & !LAN_INT & lan_adr &
|
|
A<15> & !RW & !UDS
|
|
# LAN_INT_ENABLE & !D<14>.PIN & !LAN_INT & lan_adr &
|
|
A<15> & !RW & !LDS
|
|
;Imported pterms FB12_17
|
|
# !LAN_INT & LAN_IRQ_D0;
|
|
LAN_IRQ_OUT.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!LAN_IRQ_OUT.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 9 | 16 | DQ_10_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
OUTPUTMC | 1 | 9 | 15
|
|
INPUTS | 11 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd1 | D<15>.PIN | LAN_INT_ENABLE | lan_adr | A<15> | RW | UDS | LDS | EXP52_.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT
|
|
INPUTMC | 6 | 11 | 6 | 11 | 8 | 9 | 15 | 5 | 16 | 9 | 17 | 9 | 12
|
|
INPUTP | 5 | 89 | 139 | 158 | 155 | 157
|
|
EXPORTS | 1 | 9 | 15
|
|
IMPORTS | 1 | 9 | 17
|
|
EQ | 25 |
|
|
DQ<10> = LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd1
|
|
;Imported pterms FB10_18
|
|
# LAN_RST_SM_FSM_FFd3 & !LAN_RST_SM_FSM_FFd1
|
|
# AS & D<10>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<10>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<10>.PIN & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<10>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
;Imported pterms FB10_1
|
|
# D<10>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<10>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<2>.PIN & !CP_CS;
|
|
DQ<10>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
DQ_10_IOBUFE.EXP = D<15>.PIN & !LAN_INT_ENABLE & lan_adr & A<15> &
|
|
!RW & !UDS
|
|
# D<15>.PIN & !LAN_INT_ENABLE & lan_adr & A<15> &
|
|
!RW & !LDS
|
|
# !D<15>.PIN & LAN_INT_ENABLE & lan_adr & A<15> &
|
|
!RW & !UDS
|
|
|
|
MACROCELL | 11 | 9 | DQ_11_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 9 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd3 | D<11>.PIN | CP_CS | AS | LAN_RST_SM_FSM_FFd1.EXP | LAN_IRQ_D0.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT
|
|
INPUTMC | 7 | 11 | 6 | 11 | 8 | 11 | 5 | 4 | 1 | 11 | 8 | 11 | 10 | 9 | 12
|
|
INPUTP | 2 | 77 | 152
|
|
IMPORTS | 2 | 11 | 8 | 11 | 10
|
|
EQ | 19 |
|
|
DQ<11> = LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd1
|
|
# LAN_RST_SM_FSM_FFd3 & !LAN_RST_SM_FSM_FFd1
|
|
# AS & D<11>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<11>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
;Imported pterms FB12_9
|
|
# D<11>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<11>.PIN & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
;Imported pterms FB12_11
|
|
# D<11>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<11>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<3>.PIN & !CP_CS;
|
|
DQ<11>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
|
|
MACROCELL | 11 | 11 | DQ_9_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 8 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd3 | D<9>.PIN | CP_CS | AS | LAN_CS_RST.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT
|
|
INPUTMC | 6 | 11 | 6 | 11 | 8 | 11 | 5 | 4 | 1 | 11 | 12 | 9 | 12
|
|
INPUTP | 2 | 73 | 152
|
|
IMPORTS | 1 | 11 | 12
|
|
EQ | 18 |
|
|
DQ<9> = LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd1
|
|
# LAN_RST_SM_FSM_FFd3 & !LAN_RST_SM_FSM_FFd1
|
|
# AS & D<9>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<9>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
;Imported pterms FB12_13
|
|
# D<9>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<9>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<9>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<9>.PIN & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<1>.PIN & !CP_CS;
|
|
DQ<9>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
|
|
MACROCELL | 3 | 1 | D_0_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 6 | AS | DQ<0>.PIN | RW | CP_CS | lan_adr | $OpTx$INV$136__$INT
|
|
INPUTMC | 3 | 4 | 1 | 5 | 16 | 9 | 8
|
|
INPUTP | 3 | 152 | 217 | 158
|
|
EQ | 3 |
|
|
!D<0> = !AS & !DQ<0>.PIN & lan_adr & RW
|
|
# !AS & !DQ<0>.PIN & RW & !CP_CS;
|
|
D<0>.OE = !$OpTx$INV$136__$INT;
|
|
|
|
MACROCELL | 4 | 13 | D_10_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 7 | AS | lan_adr | RW | DQ<10>.PIN | DQ<2>.PIN | CP_CS | $OpTx$INV$136__$INT
|
|
INPUTMC | 3 | 5 | 16 | 4 | 1 | 9 | 8
|
|
INPUTP | 4 | 152 | 158 | 234 | 127
|
|
EQ | 3 |
|
|
!D<10> = !AS & lan_adr & RW & !DQ<10>.PIN
|
|
# !AS & !DQ<2>.PIN & !lan_adr & RW & !CP_CS;
|
|
D<10>.OE = !$OpTx$INV$136__$INT;
|
|
|
|
MACROCELL | 4 | 14 | D_11_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 7 | AS | lan_adr | RW | DQ<11>.PIN | DQ<3>.PIN | CP_CS | $OpTx$INV$136__$INT
|
|
INPUTMC | 3 | 5 | 16 | 4 | 1 | 9 | 8
|
|
INPUTP | 4 | 152 | 158 | 207 | 219
|
|
EQ | 3 |
|
|
!D<11> = !AS & lan_adr & RW & !DQ<11>.PIN
|
|
# !AS & !DQ<3>.PIN & !lan_adr & RW & !CP_CS;
|
|
D<11>.OE = !$OpTx$INV$136__$INT;
|
|
|
|
MACROCELL | 4 | 16 | D_12_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 8 | AS | Dout1<0> | RW | lan_adr | CP_CS | DQ<12>.PIN | EXP29_.EXP | $OpTx$INV$136__$INT
|
|
INPUTMC | 5 | 8 | 16 | 5 | 16 | 4 | 1 | 4 | 15 | 9 | 8
|
|
INPUTP | 3 | 152 | 158 | 235
|
|
IMPORTS | 1 | 4 | 15
|
|
EQ | 7 |
|
|
D<12> = AS & Dout1<0>
|
|
# Dout1<0> & !RW
|
|
# Dout1<0> & !lan_adr & CP_CS
|
|
# !AS & lan_adr & RW & DQ<12>.PIN
|
|
;Imported pterms FB5_16
|
|
# !AS & DQ<4>.PIN & !lan_adr & RW & !CP_CS;
|
|
D<12>.OE = !$OpTx$INV$136__$INT;
|
|
|
|
MACROCELL | 6 | 2 | D_13_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
OUTPUTMC | 1 | 6 | 1
|
|
INPUTS | 15 | AS | Dout1<1> | RW | lan_adr | CP_CS | autoconfig | UDS | $OpTx$INV$136__$INT | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | EXP36_.EXP
|
|
INPUTMC | 6 | 6 | 13 | 5 | 16 | 4 | 1 | 5 | 14 | 9 | 8 | 6 | 3
|
|
INPUTP | 9 | 152 | 158 | 155 | 91 | 107 | 98 | 97 | 99 | 101
|
|
EXPORTS | 1 | 6 | 1
|
|
IMPORTS | 1 | 6 | 3
|
|
EQ | 9 |
|
|
D<13> = AS & Dout1<1>
|
|
# Dout1<1> & !RW
|
|
# Dout1<1> & !lan_adr & CP_CS
|
|
;Imported pterms FB7_4
|
|
# !AS & lan_adr & RW & DQ<13>.PIN
|
|
# !AS & DQ<5>.PIN & !lan_adr & RW & !CP_CS;
|
|
D<13>.OE = !$OpTx$INV$136__$INT;
|
|
D_13_IOBUFE.EXP = !AS & autoconfig & !UDS & A<5> & !A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>
|
|
|
|
MACROCELL | 6 | 4 | D_14_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 8 | AS | Dout1<2> | RW | lan_adr | CP_CS | DQ<14>.PIN | EXP37_.EXP | $OpTx$INV$136__$INT
|
|
INPUTMC | 5 | 6 | 8 | 5 | 16 | 4 | 1 | 6 | 5 | 9 | 8
|
|
INPUTP | 3 | 152 | 158 | 236
|
|
IMPORTS | 1 | 6 | 5
|
|
EQ | 7 |
|
|
D<14> = AS & Dout1<2>
|
|
# Dout1<2> & !RW
|
|
# Dout1<2> & !lan_adr & CP_CS
|
|
# !AS & lan_adr & RW & DQ<14>.PIN
|
|
;Imported pterms FB7_6
|
|
# !AS & DQ<6>.PIN & !lan_adr & RW & !CP_CS;
|
|
D<14>.OE = !$OpTx$INV$136__$INT;
|
|
|
|
MACROCELL | 6 | 11 | D_15_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
OUTPUTMC | 1 | 6 | 12
|
|
INPUTS | 15 | AS | Dout1<3> | RW | AUTO_CONFIG_DONE<1> | autoconfig | UDS | A<5> | $OpTx$INV$136__$INT | A<1> | A<6> | A<4> | A<2> | LDS | A<3> | EXP41_.EXP
|
|
INPUTMC | 5 | 6 | 0 | 12 | 12 | 5 | 14 | 9 | 8 | 6 | 10
|
|
INPUTP | 10 | 152 | 158 | 155 | 91 | 107 | 98 | 97 | 101 | 157 | 99
|
|
EXPORTS | 1 | 6 | 12
|
|
IMPORTS | 1 | 6 | 10
|
|
EQ | 11 |
|
|
D<15> = AS & Dout1<3>
|
|
# Dout1<3> & !RW
|
|
;Imported pterms FB7_11
|
|
# Dout1<3> & !lan_adr & CP_CS
|
|
# !AS & lan_adr & RW & DQ<15>.PIN
|
|
# !AS & DQ<7>.PIN & !lan_adr & RW & !CP_CS;
|
|
D<15>.OE = !$OpTx$INV$136__$INT;
|
|
D_15_IOBUFE.EXP = !AS & AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & !A<1> & !A<6> & A<4> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & A<1> & !A<6> & !A<3> & !A<2>
|
|
|
|
MACROCELL | 1 | 14 | D_1_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 6 | AS | DQ<1>.PIN | RW | CP_CS | lan_adr | $OpTx$INV$136__$INT
|
|
INPUTMC | 3 | 4 | 1 | 5 | 16 | 9 | 8
|
|
INPUTP | 3 | 152 | 216 | 158
|
|
EQ | 3 |
|
|
!D<1> = !AS & !DQ<1>.PIN & lan_adr & RW
|
|
# !AS & !DQ<1>.PIN & RW & !CP_CS;
|
|
D<1>.OE = !$OpTx$INV$136__$INT;
|
|
|
|
MACROCELL | 4 | 9 | D_2_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 6 | AS | DQ<2>.PIN | RW | CP_CS | lan_adr | $OpTx$INV$136__$INT
|
|
INPUTMC | 3 | 4 | 1 | 5 | 16 | 9 | 8
|
|
INPUTP | 3 | 152 | 127 | 158
|
|
EQ | 3 |
|
|
!D<2> = !AS & !DQ<2>.PIN & lan_adr & RW
|
|
# !AS & !DQ<2>.PIN & RW & !CP_CS;
|
|
D<2>.OE = !$OpTx$INV$136__$INT;
|
|
|
|
MACROCELL | 1 | 11 | D_3_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 6 | AS | DQ<3>.PIN | RW | CP_CS | lan_adr | $OpTx$INV$136__$INT
|
|
INPUTMC | 3 | 4 | 1 | 5 | 16 | 9 | 8
|
|
INPUTP | 3 | 152 | 219 | 158
|
|
EQ | 3 |
|
|
!D<3> = !AS & !DQ<3>.PIN & lan_adr & RW
|
|
# !AS & !DQ<3>.PIN & RW & !CP_CS;
|
|
D<3>.OE = !$OpTx$INV$136__$INT;
|
|
|
|
MACROCELL | 0 | 5 | D_4_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 6 | AS | DQ<4>.PIN | RW | CP_CS | lan_adr | $OpTx$INV$136__$INT
|
|
INPUTMC | 3 | 4 | 1 | 5 | 16 | 9 | 8
|
|
INPUTP | 3 | 152 | 225 | 158
|
|
EQ | 3 |
|
|
!D<4> = !AS & !DQ<4>.PIN & lan_adr & RW
|
|
# !AS & !DQ<4>.PIN & RW & !CP_CS;
|
|
D<4>.OE = !$OpTx$INV$136__$INT;
|
|
|
|
MACROCELL | 0 | 4 | D_5_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 6 | AS | DQ<5>.PIN | RW | CP_CS | lan_adr | $OpTx$INV$136__$INT
|
|
INPUTMC | 3 | 4 | 1 | 5 | 16 | 9 | 8
|
|
INPUTP | 3 | 152 | 69 | 158
|
|
EQ | 3 |
|
|
!D<5> = !AS & !DQ<5>.PIN & lan_adr & RW
|
|
# !AS & !DQ<5>.PIN & RW & !CP_CS;
|
|
D<5>.OE = !$OpTx$INV$136__$INT;
|
|
|
|
MACROCELL | 1 | 9 | D_6_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 6 | AS | DQ<6>.PIN | RW | CP_CS | lan_adr | $OpTx$INV$136__$INT
|
|
INPUTMC | 3 | 4 | 1 | 5 | 16 | 9 | 8
|
|
INPUTP | 3 | 152 | 227 | 158
|
|
EQ | 3 |
|
|
!D<6> = !AS & !DQ<6>.PIN & lan_adr & RW
|
|
# !AS & !DQ<6>.PIN & RW & !CP_CS;
|
|
D<6>.OE = !$OpTx$INV$136__$INT;
|
|
|
|
MACROCELL | 1 | 13 | D_7_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 6 | AS | DQ<7>.PIN | RW | CP_CS | lan_adr | $OpTx$INV$136__$INT
|
|
INPUTMC | 3 | 4 | 1 | 5 | 16 | 9 | 8
|
|
INPUTP | 3 | 152 | 226 | 158
|
|
EQ | 3 |
|
|
!D<7> = !AS & !DQ<7>.PIN & lan_adr & RW
|
|
# !AS & !DQ<7>.PIN & RW & !CP_CS;
|
|
D<7>.OE = !$OpTx$INV$136__$INT;
|
|
|
|
MACROCELL | 1 | 16 | D_8_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
OUTPUTMC | 1 | 1 | 17
|
|
INPUTS | 17 | AS | lan_adr | RW | DQ<8>.PIN | DQ<0>.PIN | CP_CS | $OpTx$INV$136__$INT | AUTO_CONFIG_DONE<1> | autoconfig | UDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2>
|
|
INPUTMC | 6 | 5 | 16 | 4 | 1 | 9 | 8 | 12 | 12 | 5 | 14 | 1 | 15
|
|
INPUTP | 11 | 152 | 158 | 231 | 217 | 155 | 91 | 107 | 98 | 97 | 99 | 101
|
|
EXPORTS | 1 | 1 | 17
|
|
EQ | 7 |
|
|
!D<8> = !AS & lan_adr & RW & !DQ<8>.PIN
|
|
# !AS & !DQ<0>.PIN & !lan_adr & RW & !CP_CS;
|
|
D<8>.OE = !$OpTx$INV$136__$INT;
|
|
D_8_IOBUFE.EXP = !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !RW &
|
|
!UDS & DS_D & !A<5> & !A<1> & A<6> & !A<4> & A<3>
|
|
# !AS & autoconfig & !RW & !UDS & DS_D & !A<5> &
|
|
!A<1> & A<6> & !A<4> & A<3> & A<2>
|
|
|
|
MACROCELL | 4 | 11 | D_9_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 7 | AS | lan_adr | RW | DQ<9>.PIN | DQ<1>.PIN | CP_CS | $OpTx$INV$136__$INT
|
|
INPUTMC | 3 | 5 | 16 | 4 | 1 | 9 | 8
|
|
INPUTP | 4 | 152 | 158 | 209 | 216
|
|
EQ | 3 |
|
|
!D<9> = !AS & lan_adr & RW & !DQ<9>.PIN
|
|
# !AS & !DQ<1>.PIN & !lan_adr & RW & !CP_CS;
|
|
D<9>.OE = !$OpTx$INV$136__$INT;
|
|
|
|
MACROCELL | 9 | 2 | DQ_0_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
OUTPUTMC | 1 | 9 | 1
|
|
INPUTS | 13 | AS | RW | LDS | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | D<0>.PIN | CP_CS | D<8>.PIN | D<9>.PIN | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT | lan_adr | D<1>.PIN | LAN_WRH_S.EXP
|
|
INPUTMC | 6 | 11 | 6 | 11 | 5 | 4 | 1 | 9 | 12 | 5 | 16 | 9 | 3
|
|
INPUTP | 7 | 152 | 158 | 157 | 4 | 32 | 73 | 30
|
|
EXPORTS | 1 | 9 | 1
|
|
IMPORTS | 1 | 9 | 3
|
|
EQ | 18 |
|
|
DQ<0> = AS & D<8>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !RW & !LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<0>.PIN & !CP_CS
|
|
;Imported pterms FB10_4
|
|
# D<8>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<8>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<8>.PIN & !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<0>.PIN;
|
|
DQ<0>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
DQ_0_IOBUFE.EXP = D<9>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<1>.PIN
|
|
|
|
MACROCELL | 7 | 1 | DQ_12_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 9 | D<12>.PIN | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | CP_CS | AS | RW | LDS | EXP46_.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT
|
|
INPUTMC | 5 | 11 | 6 | 11 | 5 | 4 | 1 | 7 | 0 | 9 | 12
|
|
INPUTP | 4 | 78 | 152 | 158 | 157
|
|
IMPORTS | 1 | 7 | 0
|
|
EQ | 16 |
|
|
DQ<12> = AS & D<12>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<12>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<12>.PIN & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<12>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
;Imported pterms FB8_1
|
|
# D<12>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<12>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<4>.PIN & !CP_CS;
|
|
DQ<12>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
|
|
MACROCELL | 11 | 7 | DQ_13_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 9 | D<13>.PIN | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | CP_CS | AS | RW | LDS | LAN_RST_SM_FSM_FFd2.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT
|
|
INPUTMC | 5 | 11 | 6 | 11 | 5 | 4 | 1 | 11 | 6 | 9 | 12
|
|
INPUTP | 4 | 80 | 152 | 158 | 157
|
|
IMPORTS | 1 | 11 | 6
|
|
EQ | 16 |
|
|
DQ<13> = AS & D<13>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<13>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<13>.PIN & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<13>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
;Imported pterms FB12_7
|
|
# D<13>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<13>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<5>.PIN & !CP_CS;
|
|
DQ<13>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
|
|
MACROCELL | 7 | 2 | DQ_14_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 9 | D<14>.PIN | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | CP_CS | AS | RW | LDS | EXP47_.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT
|
|
INPUTMC | 5 | 11 | 6 | 11 | 5 | 4 | 1 | 7 | 3 | 9 | 12
|
|
INPUTP | 4 | 81 | 152 | 158 | 157
|
|
IMPORTS | 1 | 7 | 3
|
|
EQ | 16 |
|
|
DQ<14> = AS & D<14>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<14>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<14>.PIN & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<14>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
;Imported pterms FB8_4
|
|
# D<14>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<14>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<6>.PIN & !CP_CS;
|
|
DQ<14>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
|
|
MACROCELL | 11 | 4 | DQ_15_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 10 | D<15>.PIN | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | CP_CS | AS | RW | LDS | ROM_OE_S.EXP | LAN_RST_SM_FSM_FFd3.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT
|
|
INPUTMC | 6 | 11 | 6 | 11 | 5 | 4 | 1 | 11 | 3 | 11 | 5 | 9 | 12
|
|
INPUTP | 4 | 89 | 152 | 158 | 157
|
|
IMPORTS | 2 | 11 | 3 | 11 | 5
|
|
EQ | 17 |
|
|
DQ<15> = AS & D<15>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<15>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<15>.PIN & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<15>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
;Imported pterms FB12_4
|
|
# D<15>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<15>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
;Imported pterms FB12_6
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<7>.PIN & !CP_CS;
|
|
DQ<15>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
|
|
MACROCELL | 9 | 1 | DQ_1_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 11 | AS | RW | LDS | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | D<1>.PIN | CP_CS | D<9>.PIN | lan_adr | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT | DQ_0_IOBUFE.EXP
|
|
INPUTMC | 6 | 11 | 6 | 11 | 5 | 4 | 1 | 5 | 16 | 9 | 12 | 9 | 2
|
|
INPUTP | 5 | 152 | 158 | 157 | 30 | 73
|
|
IMPORTS | 1 | 9 | 2
|
|
EQ | 14 |
|
|
DQ<1> = AS & D<9>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<9>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<9>.PIN & !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !AS & !RW & !LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<1>.PIN & !CP_CS
|
|
;Imported pterms FB10_3
|
|
# D<9>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<1>.PIN;
|
|
DQ<1>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
|
|
MACROCELL | 10 | 11 | DQ_2_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 11 | AS | RW | LDS | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | D<2>.PIN | CP_CS | D<10>.PIN | lan_adr | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT | CP_WE_QUIRK.EXP
|
|
INPUTMC | 6 | 11 | 6 | 11 | 5 | 4 | 1 | 5 | 16 | 9 | 12 | 10 | 10
|
|
INPUTP | 5 | 152 | 158 | 157 | 71 | 74
|
|
IMPORTS | 1 | 10 | 10
|
|
EQ | 14 |
|
|
DQ<2> = AS & D<10>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<10>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<10>.PIN & !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !AS & !RW & !LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<2>.PIN & !CP_CS
|
|
;Imported pterms FB11_11
|
|
# D<10>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<2>.PIN;
|
|
DQ<2>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
|
|
MACROCELL | 9 | 4 | DQ_3_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
OUTPUTMC | 1 | 9 | 3
|
|
INPUTS | 13 | AS | RW | LDS | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | D<3>.PIN | CP_CS | D<11>.PIN | lan_adr | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT | A<15> | UDS | LAN_RD_S.EXP
|
|
INPUTMC | 6 | 11 | 6 | 11 | 5 | 4 | 1 | 5 | 16 | 9 | 12 | 9 | 5
|
|
INPUTP | 7 | 152 | 158 | 157 | 28 | 77 | 139 | 155
|
|
EXPORTS | 1 | 9 | 3
|
|
IMPORTS | 1 | 9 | 5
|
|
EQ | 15 |
|
|
DQ<3> = AS & D<11>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<11>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !RW & !LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<3>.PIN & !CP_CS
|
|
;Imported pterms FB10_6
|
|
# D<11>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<11>.PIN & !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<3>.PIN;
|
|
DQ<3>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
DQ_3_IOBUFE.EXP = lan_adr & !A<15> & !RW & !UDS
|
|
|
|
MACROCELL | 9 | 9 | DQ_4_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 8 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd3 | AS | D<12>.PIN | RW | $OpTx$INV$136__$INT.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT
|
|
INPUTMC | 5 | 11 | 6 | 11 | 8 | 11 | 5 | 9 | 8 | 9 | 12
|
|
INPUTP | 3 | 152 | 78 | 158
|
|
IMPORTS | 1 | 9 | 8
|
|
EQ | 16 |
|
|
DQ<4> = LAN_RST_SM_FSM_FFd2 & LAN_RST_SM_FSM_FFd1
|
|
# LAN_RST_SM_FSM_FFd3 & LAN_RST_SM_FSM_FFd1
|
|
# AS & D<12>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<12>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
;Imported pterms FB10_9
|
|
# D<12>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<12>.PIN & !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<4>.PIN
|
|
# !AS & !RW & !LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<4>.PIN & !CP_CS;
|
|
DQ<4>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
|
|
MACROCELL | 4 | 7 | DQ_5_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 12 | AS | RW | LDS | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | D<5>.PIN | CP_CS | D<13>.PIN | lan_adr | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT | EXP27_.EXP | EXP28_.EXP
|
|
INPUTMC | 7 | 11 | 6 | 11 | 5 | 4 | 1 | 5 | 16 | 9 | 12 | 4 | 6 | 4 | 8
|
|
INPUTP | 5 | 152 | 158 | 157 | 37 | 80
|
|
IMPORTS | 2 | 4 | 6 | 4 | 8
|
|
EQ | 15 |
|
|
DQ<5> = AS & D<13>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<13>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<13>.PIN & !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !AS & !RW & !LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<5>.PIN & !CP_CS
|
|
;Imported pterms FB5_7
|
|
# D<13>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
;Imported pterms FB5_9
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<5>.PIN;
|
|
DQ<5>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
|
|
MACROCELL | 9 | 11 | DQ_6_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
OUTPUTMC | 1 | 9 | 10
|
|
INPUTS | 13 | AS | RW | LDS | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | D<6>.PIN | CP_CS | D<14>.PIN | D<15>.PIN | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT | lan_adr | D<7>.PIN | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT.EXP
|
|
INPUTMC | 6 | 11 | 6 | 11 | 5 | 4 | 1 | 9 | 12 | 5 | 16 | 9 | 12
|
|
INPUTP | 7 | 152 | 158 | 157 | 26 | 81 | 89 | 29
|
|
EXPORTS | 1 | 9 | 10
|
|
IMPORTS | 1 | 9 | 12
|
|
EQ | 18 |
|
|
DQ<6> = AS & D<14>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !RW & !LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<6>.PIN & !CP_CS
|
|
;Imported pterms FB10_13
|
|
# D<14>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<14>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<14>.PIN & !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<6>.PIN;
|
|
DQ<6>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
DQ_6_IOBUFE.EXP = D<15>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<7>.PIN
|
|
|
|
MACROCELL | 9 | 10 | DQ_7_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 11 | AS | RW | LDS | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | D<7>.PIN | CP_CS | D<15>.PIN | lan_adr | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT | DQ_6_IOBUFE.EXP
|
|
INPUTMC | 6 | 11 | 6 | 11 | 5 | 4 | 1 | 5 | 16 | 9 | 12 | 9 | 11
|
|
INPUTP | 5 | 152 | 158 | 157 | 29 | 89
|
|
IMPORTS | 1 | 9 | 11
|
|
EQ | 14 |
|
|
DQ<7> = AS & D<15>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<15>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<15>.PIN & !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !AS & !RW & !LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<7>.PIN & !CP_CS
|
|
;Imported pterms FB10_12
|
|
# D<15>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<7>.PIN;
|
|
DQ<7>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
|
|
MACROCELL | 9 | 13 | DQ_8_IOBUFE
|
|
ATTRIBUTES | 265986 | 0
|
|
OUTPUTMC | 1 | 9 | 12
|
|
INPUTS | 10 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd1 | RW | LAN_RST_SM_FSM_FFd3 | lan_adr | CP_CS | UDS | LDS | EXP51_.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT
|
|
INPUTMC | 7 | 11 | 6 | 11 | 8 | 11 | 5 | 5 | 16 | 4 | 1 | 9 | 14 | 9 | 12
|
|
INPUTP | 3 | 158 | 155 | 157
|
|
EXPORTS | 1 | 9 | 12
|
|
IMPORTS | 1 | 9 | 14
|
|
EQ | 24 |
|
|
!DQ<8> = LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd1
|
|
;Imported pterms FB10_15
|
|
# LAN_RST_SM_FSM_FFd3 & !LAN_RST_SM_FSM_FFd1
|
|
# AS & !D<8>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !D<8>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !D<8>.PIN & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !D<8>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
;Imported pterms FB10_16
|
|
# !D<8>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !D<8>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & !D<0>.PIN & !CP_CS;
|
|
DQ<8>.OE = !DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;
|
|
DQ_8_IOBUFE.EXP = RW & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3
|
|
# !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !lan_adr & UDS & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
|
|
MACROCELL | 5 | 16 | lan_adr
|
|
ATTRIBUTES | 8520496 | 0
|
|
OUTPUTMC | 50 | 9 | 15 | 11 | 17 | 9 | 13 | 11 | 5 | 11 | 10 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 10 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 7 | 3 | 7 | 0 | 11 | 6 | 6 | 5 | 11 | 3 | 9 | 1 | 10 | 11 | 9 | 3 | 9 | 8 | 4 | 7 | 9 | 6 | 9 | 10 | 9 | 12 | 9 | 5 | 9 | 2 | 9 | 0 | 7 | 7 | 13 | 13 | 9 | 11 | 9 | 7 | 4 | 6 | 4 | 8 | 4 | 15 | 6 | 3 | 9 | 4 | 9 | 16 | 10 | 10 | 11 | 0 | 11 | 12
|
|
INPUTS | 7 | SHUT_UP<0> | LAN_BASEADR<7> | A<23> | EXP33_.EXP | EXP34_.EXP | AS | ide/ide_RSTF__$INT
|
|
INPUTMC | 5 | 12 | 11 | 13 | 7 | 5 | 15 | 5 | 17 | 12 | 8
|
|
INPUTP | 2 | 161 | 152
|
|
IMPORTS | 2 | 5 | 15 | 5 | 17
|
|
EQ | 27 |
|
|
!lan_adr.D = SHUT_UP<0>
|
|
# LAN_BASEADR<7> & !A<23>
|
|
# !LAN_BASEADR<7> & A<23>
|
|
;Imported pterms FB6_16
|
|
# LAN_BASEADR<4> & !A<20>
|
|
# LAN_BASEADR<5> & !A<21>
|
|
# !LAN_BASEADR<5> & A<21>
|
|
# LAN_BASEADR<6> & !A<22>
|
|
# !LAN_BASEADR<6> & A<22>
|
|
;Imported pterms FB6_15
|
|
# LAN_BASEADR<1> & !A<17>
|
|
;Imported pterms FB6_18
|
|
# LAN_BASEADR<2> & !A<18>
|
|
# !LAN_BASEADR<2> & A<18>
|
|
# LAN_BASEADR<3> & !A<19>
|
|
# !LAN_BASEADR<3> & A<19>
|
|
# !LAN_BASEADR<4> & A<20>
|
|
;Imported pterms FB6_1
|
|
# LAN_BASEADR<0> & !A<16>
|
|
# !LAN_BASEADR<0> & A<16>
|
|
# !LAN_BASEADR<1> & A<17>
|
|
# !AUTO_CONFIG_DONE<1> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
# !AUTO_CONFIG_DONE<0> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>;
|
|
lan_adr.CLK = !AS;
|
|
lan_adr.AR = !ide/ide_RSTF__$INT;
|
|
|
|
MACROCELL | 5 | 14 | autoconfig
|
|
ATTRIBUTES | 8520496 | 0
|
|
OUTPUTMC | 51 | 1 | 17 | 12 | 17 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 16 | 6 | 13 | 6 | 8 | 6 | 0 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 12 | 11 | 12 | 10 | 12 | 9 | 13 | 13 | 9 | 7 | 1 | 16 | 6 | 1 | 6 | 2 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 11 | 6 | 12 | 6 | 14 | 6 | 15 | 6 | 17 | 8 | 14 | 8 | 15 | 8 | 17 | 12 | 0 | 5 | 15
|
|
INPUTS | 14 | AUTO_CONFIG_DONE<0> | CFIN | A<18> | A<17> | A<16> | A<23> | A<22> | A<21> | A<19> | A<20> | AUTO_CONFIG_DONE<1> | AS | ide/ide_RSTF__$INT | LAN_BASEADR<1>
|
|
INPUTMC | 4 | 11 | 16 | 12 | 12 | 12 | 8 | 3 | 10
|
|
INPUTP | 10 | 190 | 171 | 172 | 175 | 161 | 162 | 163 | 169 | 167 | 152
|
|
EXPORTS | 1 | 5 | 15
|
|
EQ | 7 |
|
|
autoconfig.D = !AUTO_CONFIG_DONE<1> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
# !AUTO_CONFIG_DONE<0> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>;
|
|
autoconfig.CLK = !AS;
|
|
autoconfig.AR = !ide/ide_RSTF__$INT;
|
|
autoconfig.EXP = LAN_BASEADR<1> & !A<17>
|
|
|
|
MACROCELL | 2 | 17 | ide
|
|
ATTRIBUTES | 8520496 | 0
|
|
OUTPUTMC | 7 | 11 | 15 | 11 | 14 | 11 | 13 | 11 | 3 | 13 | 2 | 14 | 11 | 13 | 13
|
|
INPUTS | 11 | SHUT_UP<1> | SHUT_UP<2> | $OpTx$FX_DC$327 | cp_and0000/cp_and0000_D2 | Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2 | CP_BASEADR<7> | A<23> | EXP22_.EXP | EXP23_.EXP | AS | ide/ide_RSTF__$INT
|
|
INPUTMC | 9 | 12 | 10 | 12 | 9 | 5 | 11 | 5 | 0 | 14 | 0 | 13 | 16 | 2 | 0 | 2 | 16 | 12 | 8
|
|
INPUTP | 2 | 161 | 152
|
|
IMPORTS | 2 | 2 | 0 | 2 | 16
|
|
EQ | 65 |
|
|
ide.D = SHUT_UP<1> & !SHUT_UP<2> & $OpTx$FX_DC$327 &
|
|
!cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# CP_BASEADR<7> & !SHUT_UP<2> & !A<23> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<7> & !SHUT_UP<2> & A<23> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
;Imported pterms FB3_1
|
|
# CP_BASEADR<2> & !SHUT_UP<2> & !A<18> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<2> & !SHUT_UP<2> & A<18> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# CP_BASEADR<3> & !SHUT_UP<2> & !A<19> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<3> & !SHUT_UP<2> & A<19> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<4> & !SHUT_UP<2> & A<20> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
;Imported pterms FB3_2
|
|
# CP_BASEADR<0> & !SHUT_UP<2> & !A<16> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<0> & !SHUT_UP<2> & A<16> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !AUTO_CONFIG_DONE<1> & !CFIN & !SHUT_UP<2> & !A<18> &
|
|
!A<17> & !A<16> & A<23> & A<22> & A<21> & A<19> & !A<20> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !AUTO_CONFIG_DONE<0> & !CFIN & !SHUT_UP<2> & !A<18> &
|
|
!A<17> & !A<16> & A<23> & A<22> & A<21> & A<19> & !A<20> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
;Imported pterms FB3_17
|
|
# CP_BASEADR<4> & !SHUT_UP<2> & !A<20> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# CP_BASEADR<5> & !SHUT_UP<2> & !A<21> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<5> & !SHUT_UP<2> & A<21> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# CP_BASEADR<6> & !SHUT_UP<2> & !A<22> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<6> & !SHUT_UP<2> & A<22> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
;Imported pterms FB3_16
|
|
# CP_BASEADR<1> & !SHUT_UP<2> & !A<17> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<1> & !SHUT_UP<2> & A<17> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2;
|
|
ide.CLK = !AS;
|
|
ide.AR = !ide/ide_RSTF__$INT;
|
|
|
|
MACROCELL | 11 | 15 | IDE_ENABLE
|
|
ATTRIBUTES | 8524640 | 0
|
|
OUTPUTMC | 2 | 11 | 14 | 11 | 3
|
|
INPUTS | 4 | SHUT_UP<2>/SHUT_UP<2>_CLKF | AS | ide | RW
|
|
INPUTMC | 2 | 2 | 15 | 2 | 17
|
|
INPUTP | 2 | 152 | 158
|
|
EQ | 4 |
|
|
IDE_ENABLE.D = Gnd;
|
|
IDE_ENABLE.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!IDE_ENABLE.AP = RESET; // GSR
|
|
IDE_ENABLE.CE = !AS & ide & !RW;
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 1 | 15 | DS_D
|
|
ATTRIBUTES | 8520544 | 0
|
|
OUTPUTMC | 31 | 1 | 17 | 12 | 17 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 12 | 11 | 12 | 10 | 12 | 9 | 1 | 16 | 12 | 0
|
|
INPUTS | 4 | UDS | LDS | SHUT_UP<2>/SHUT_UP<2>_CLKF | RESET
|
|
INPUTMC | 1 | 2 | 15
|
|
INPUTP | 3 | 155 | 157 | 263
|
|
EQ | 3 |
|
|
DS_D.D = UDS & LDS;
|
|
DS_D.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
DS_D.CE = RESET;
|
|
|
|
MACROCELL | 11 | 10 | LAN_IRQ_D0
|
|
ATTRIBUTES | 8524576 | 0
|
|
OUTPUTMC | 2 | 11 | 16 | 11 | 9
|
|
INPUTS | 12 | LAN_INT | SHUT_UP<2>/SHUT_UP<2>_CLKF | D<11>.PIN | lan_adr | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | UDS | AS | RW | LDS | D<3>.PIN | CP_CS
|
|
INPUTMC | 5 | 2 | 15 | 5 | 16 | 11 | 6 | 11 | 5 | 4 | 1
|
|
INPUTP | 7 | 201 | 77 | 155 | 152 | 158 | 157 | 28
|
|
EXPORTS | 1 | 11 | 9
|
|
EQ | 9 |
|
|
LAN_IRQ_D0.D = LAN_INT;
|
|
LAN_IRQ_D0.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!LAN_IRQ_D0.AP = RESET; // GSR
|
|
LAN_IRQ_D0.EXP = D<11>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<11>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<3>.PIN & !CP_CS
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 12 | 11 | SHUT_UP<0>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 3 | 5 | 16 | 12 | 11 | 5 | 11
|
|
INPUTS | 16 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | autoconfig | RW | LDS | DS_D | SHUT_UP<0> | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 5 | 14 | 1 | 15 | 12 | 11 | 2 | 15
|
|
INPUTP | 10 | 152 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 8 |
|
|
SHUT_UP<0>.T = !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !RW & !UDS & DS_D & SHUT_UP<0> & !A<5> & !A<1> &
|
|
A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !RW & !LDS & DS_D & SHUT_UP<0> & !A<5> & !A<1> &
|
|
A<6> & !A<4> & A<3> & !A<2>;
|
|
SHUT_UP<0>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!SHUT_UP<0>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 12 | 10 | SHUT_UP<1>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 3 | 2 | 17 | 12 | 10 | 4 | 1
|
|
INPUTS | 16 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | autoconfig | RW | LDS | DS_D | SHUT_UP<1> | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 5 | 14 | 1 | 15 | 12 | 10 | 2 | 15
|
|
INPUTP | 10 | 152 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 8 |
|
|
SHUT_UP<1>.T = !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !RW & !UDS & DS_D & SHUT_UP<1> & !A<5> & !A<1> &
|
|
A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !RW & !LDS & DS_D & SHUT_UP<1> & !A<5> & !A<1> &
|
|
A<6> & !A<4> & A<3> & !A<2>;
|
|
SHUT_UP<1>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!SHUT_UP<1>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 12 | 9 | SHUT_UP<2>
|
|
ATTRIBUTES | 4330272 | 0
|
|
OUTPUTMC | 6 | 2 | 17 | 12 | 9 | 2 | 0 | 2 | 1 | 2 | 15 | 2 | 16
|
|
INPUTS | 16 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | autoconfig | RW | LDS | DS_D | SHUT_UP<2> | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 6 | 12 | 12 | 11 | 16 | 5 | 14 | 1 | 15 | 12 | 9 | 2 | 15
|
|
INPUTP | 10 | 152 | 158 | 157 | 91 | 107 | 98 | 97 | 99 | 101 | 155
|
|
EQ | 8 |
|
|
SHUT_UP<2>.T = !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !RW & !UDS & DS_D & SHUT_UP<2> & !A<5> & !A<1> &
|
|
A<6> & !A<4> & A<3> & !A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !RW & !LDS & DS_D & SHUT_UP<2> & !A<5> & !A<1> &
|
|
A<6> & !A<4> & A<3> & !A<2>;
|
|
SHUT_UP<2>.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!SHUT_UP<2>.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 11 | 14 | IDE_R_S
|
|
ATTRIBUTES | 8524576 | 0
|
|
OUTPUTMC | 1 | 0 | 16
|
|
INPUTS | 5 | AS | ide | RW | IDE_ENABLE | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
INPUTMC | 3 | 2 | 17 | 11 | 15 | 2 | 15
|
|
INPUTP | 2 | 152 | 158
|
|
EQ | 3 |
|
|
!IDE_R_S.D = !AS & ide & RW & !IDE_ENABLE;
|
|
IDE_R_S.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!IDE_R_S.AP = RESET; // GSR
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 11 | 13 | IDE_W_S
|
|
ATTRIBUTES | 8524576 | 0
|
|
OUTPUTMC | 2 | 2 | 1 | 11 | 12
|
|
INPUTS | 7 | AS | ide | RW | SHUT_UP<2>/SHUT_UP<2>_CLKF | RESET | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3
|
|
INPUTMC | 4 | 2 | 17 | 2 | 15 | 11 | 6 | 11 | 5
|
|
INPUTP | 3 | 152 | 158 | 263
|
|
EXPORTS | 1 | 11 | 12
|
|
EQ | 5 |
|
|
!IDE_W_S.D = !AS & ide & !RW;
|
|
IDE_W_S.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!IDE_W_S.AP = RESET; // GSR
|
|
IDE_W_S.EXP = !RESET & LAN_RST_SM_FSM_FFd2
|
|
# !RESET & LAN_RST_SM_FSM_FFd3
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 11 | 3 | ROM_OE_S
|
|
ATTRIBUTES | 8524576 | 0
|
|
OUTPUTMC | 2 | 4 | 4 | 11 | 4
|
|
INPUTS | 10 | AS | ide | RW | IDE_ENABLE | SHUT_UP<2>/SHUT_UP<2>_CLKF | D<15>.PIN | lan_adr | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | UDS
|
|
INPUTMC | 6 | 2 | 17 | 11 | 15 | 2 | 15 | 5 | 16 | 11 | 6 | 11 | 5
|
|
INPUTP | 4 | 152 | 158 | 89 | 155
|
|
EXPORTS | 1 | 11 | 4
|
|
EQ | 7 |
|
|
!ROM_OE_S.D = !AS & ide & RW & IDE_ENABLE;
|
|
ROM_OE_S.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
!ROM_OE_S.AP = RESET; // GSR
|
|
ROM_OE_S.EXP = D<15>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<15>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
GLOBALS | 1 | 1 | RESET
|
|
|
|
MACROCELL | 3 | 5 | A_LAN_0_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 3 | A<1> | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3
|
|
INPUTMC | 2 | 11 | 6 | 11 | 5
|
|
INPUTP | 1 | 107
|
|
EQ | 1 |
|
|
!A_LAN<0> = !A<1> & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3;
|
|
|
|
MACROCELL | 5 | 5 | A_LAN_10_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 3 | A<11> | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3
|
|
INPUTMC | 2 | 11 | 6 | 11 | 5
|
|
INPUTP | 1 | 114
|
|
EQ | 2 |
|
|
!A_LAN<10> = !A<11> & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3;
|
|
|
|
MACROCELL | 5 | 7 | A_LAN_11_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 3 | A<12> | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3
|
|
INPUTMC | 2 | 11 | 6 | 11 | 5
|
|
INPUTP | 1 | 115
|
|
EQ | 2 |
|
|
!A_LAN<11> = !A<12> & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3;
|
|
|
|
MACROCELL | 5 | 4 | A_LAN_12_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 3 | A<13> | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3
|
|
INPUTMC | 2 | 11 | 6 | 11 | 5
|
|
INPUTP | 1 | 123
|
|
EQ | 2 |
|
|
!A_LAN<12> = !A<13> & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3;
|
|
|
|
MACROCELL | 5 | 2 | A_LAN_13_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 3 | A<14> | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3
|
|
INPUTMC | 2 | 11 | 6 | 11 | 5
|
|
INPUTP | 1 | 125
|
|
EQ | 2 |
|
|
!A_LAN<13> = !A<14> & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3;
|
|
|
|
MACROCELL | 3 | 4 | A_LAN_1_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 3 | A<2> | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3
|
|
INPUTMC | 2 | 11 | 6 | 11 | 5
|
|
INPUTP | 1 | 101
|
|
EQ | 1 |
|
|
!A_LAN<1> = !A<2> & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3;
|
|
|
|
MACROCELL | 3 | 11 | A_LAN_2_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 5 | A<2> | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | CP_CS | A<3>
|
|
INPUTMC | 3 | 11 | 6 | 11 | 5 | 4 | 1
|
|
INPUTP | 2 | 101 | 99
|
|
EQ | 4 |
|
|
!A_LAN<2> = !A<3> & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 &
|
|
CP_CS
|
|
# !A<2> & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 &
|
|
!CP_CS;
|
|
|
|
MACROCELL | 1 | 1 | A_LAN_4_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 5 | A<4> | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | CP_CS | A<5>
|
|
INPUTMC | 3 | 11 | 6 | 11 | 5 | 4 | 1
|
|
INPUTP | 2 | 97 | 91
|
|
EQ | 4 |
|
|
!A_LAN<4> = !A<5> & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 &
|
|
CP_CS
|
|
# !A<4> & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 &
|
|
!CP_CS;
|
|
|
|
MACROCELL | 3 | 13 | A_LAN_5_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 5 | A<5> | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | CP_CS | A<6>
|
|
INPUTMC | 3 | 11 | 6 | 11 | 5 | 4 | 1
|
|
INPUTP | 2 | 91 | 98
|
|
EQ | 4 |
|
|
!A_LAN<5> = !A<5> & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 &
|
|
!CP_CS
|
|
# !A<6> & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 &
|
|
CP_CS;
|
|
|
|
MACROCELL | 1 | 2 | A_LAN_7_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 3 | A<8> | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3
|
|
INPUTMC | 2 | 11 | 6 | 11 | 5
|
|
INPUTP | 1 | 106
|
|
EQ | 1 |
|
|
!A_LAN<7> = !A<8> & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3;
|
|
|
|
MACROCELL | 5 | 9 | A_LAN_8_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
OUTPUTMC | 1 | 5 | 10
|
|
INPUTS | 5 | A<9> | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | LAN_BASEADR<2> | A<18>
|
|
INPUTMC | 3 | 11 | 6 | 11 | 5 | 10 | 12
|
|
INPUTP | 2 | 108 | 171
|
|
EXPORTS | 1 | 5 | 10
|
|
EQ | 2 |
|
|
!A_LAN<8> = !A<9> & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3;
|
|
A_LAN_8_OBUF.EXP = LAN_BASEADR<2> & !A<18>
|
|
|
|
MACROCELL | 5 | 13 | A_LAN_9_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
OUTPUTMC | 1 | 5 | 12
|
|
INPUTS | 5 | A<10> | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | LAN_BASEADR<2> | A<18>
|
|
INPUTMC | 3 | 11 | 6 | 11 | 5 | 10 | 12
|
|
INPUTP | 2 | 112 | 171
|
|
EXPORTS | 1 | 5 | 12
|
|
EQ | 3 |
|
|
!A_LAN<9> = !A<10> & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3;
|
|
A_LAN_9_OBUF.EXP = !LAN_BASEADR<2> & A<18>
|
|
|
|
MACROCELL | 11 | 6 | LAN_RST_SM_FSM_FFd2
|
|
ATTRIBUTES | 8553216 | 0
|
|
OUTPUTMC | 51 | 9 | 16 | 11 | 9 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 1 | 10 | 11 | 9 | 4 | 9 | 9 | 4 | 7 | 9 | 11 | 9 | 10 | 9 | 13 | 3 | 5 | 5 | 5 | 5 | 7 | 5 | 4 | 5 | 2 | 3 | 4 | 3 | 11 | 1 | 1 | 3 | 13 | 1 | 2 | 5 | 9 | 5 | 13 | 11 | 6 | 11 | 5 | 11 | 8 | 11 | 2 | 11 | 10 | 1 | 4 | 3 | 7 | 9 | 12 | 4 | 6 | 4 | 8 | 7 | 0 | 7 | 3 | 9 | 0 | 9 | 3 | 9 | 5 | 9 | 8 | 9 | 14 | 9 | 15 | 9 | 17 | 10 | 10 | 11 | 3 | 11 | 12 | 11 | 13
|
|
INPUTS | 12 | RESET | LAN_RST_SM_FSM_FFd3 | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd2 | D<13>.PIN | lan_adr | UDS | AS | RW | LDS | D<5>.PIN | CP_CS
|
|
INPUTMC | 5 | 11 | 5 | 11 | 8 | 11 | 6 | 5 | 16 | 4 | 1
|
|
INPUTP | 7 | 263 | 80 | 155 | 152 | 158 | 157 | 37
|
|
EXPORTS | 1 | 11 | 7
|
|
EQ | 11 |
|
|
LAN_RST_SM_FSM_FFd2.D = !RESET & LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !RESET & LAN_RST_SM_FSM_FFd3 &
|
|
!LAN_RST_SM_FSM_FFd1;
|
|
LAN_RST_SM_FSM_FFd2.CLK = CLK_EXT; // GCK
|
|
LAN_RST_SM_FSM_FFd2.EXP = D<13>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<13>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<5>.PIN & !CP_CS
|
|
GLOBALS | 1 | 2 | CLK_EXT
|
|
|
|
MACROCELL | 11 | 5 | LAN_RST_SM_FSM_FFd3
|
|
ATTRIBUTES | 8553216 | 0
|
|
OUTPUTMC | 50 | 9 | 15 | 11 | 9 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 1 | 10 | 11 | 9 | 4 | 9 | 9 | 4 | 7 | 9 | 11 | 9 | 10 | 9 | 8 | 3 | 5 | 5 | 5 | 5 | 7 | 5 | 4 | 5 | 2 | 3 | 4 | 3 | 11 | 1 | 1 | 3 | 13 | 1 | 2 | 5 | 9 | 5 | 13 | 11 | 6 | 11 | 8 | 11 | 2 | 11 | 10 | 1 | 4 | 3 | 7 | 9 | 12 | 4 | 6 | 4 | 8 | 7 | 0 | 7 | 3 | 9 | 0 | 9 | 3 | 9 | 5 | 9 | 13 | 9 | 14 | 9 | 17 | 10 | 10 | 11 | 3 | 11 | 5 | 11 | 12 | 11 | 13
|
|
INPUTS | 11 | RESET | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd1 | AS | lan_adr | RW | UDS | LDS | LAN_RST_SM_FSM_FFd3 | D<7>.PIN | CP_CS
|
|
INPUTMC | 5 | 11 | 6 | 11 | 8 | 5 | 16 | 11 | 5 | 4 | 1
|
|
INPUTP | 6 | 263 | 152 | 158 | 155 | 157 | 29
|
|
EXPORTS | 1 | 11 | 4
|
|
EQ | 7 |
|
|
LAN_RST_SM_FSM_FFd3.D = !RESET & LAN_RST_SM_FSM_FFd2 &
|
|
LAN_RST_SM_FSM_FFd1
|
|
# !RESET & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd1;
|
|
LAN_RST_SM_FSM_FFd3.CLK = CLK_EXT; // GCK
|
|
LAN_RST_SM_FSM_FFd3.EXP = !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<7>.PIN & !CP_CS
|
|
GLOBALS | 1 | 2 | CLK_EXT
|
|
|
|
MACROCELL | 11 | 8 | LAN_RST_SM_FSM_FFd1
|
|
ATTRIBUTES | 8553216 | 0
|
|
OUTPUTMC | 11 | 9 | 16 | 11 | 9 | 11 | 11 | 9 | 9 | 9 | 13 | 11 | 6 | 11 | 5 | 11 | 8 | 1 | 4 | 9 | 14 | 9 | 17
|
|
INPUTS | 7 | RESET | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | D<11>.PIN | RW | LDS
|
|
INPUTMC | 3 | 11 | 8 | 11 | 6 | 11 | 5
|
|
INPUTP | 4 | 263 | 77 | 158 | 157
|
|
EXPORTS | 1 | 11 | 9
|
|
EQ | 8 |
|
|
LAN_RST_SM_FSM_FFd1.D = !RESET & LAN_RST_SM_FSM_FFd1
|
|
# !RESET & LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3;
|
|
LAN_RST_SM_FSM_FFd1.CLK = CLK_EXT; // GCK
|
|
LAN_RST_SM_FSM_FFd1.EXP = D<11>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<11>.PIN & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
GLOBALS | 1 | 2 | CLK_EXT
|
|
|
|
MACROCELL | 9 | 6 | CP_WE_S
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 3 | 10 | 10 | 10 | 16 | 9 | 5
|
|
INPUTS | 7 | RW | LDS | CP_CS | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF | lan_adr | A<15>
|
|
INPUTMC | 3 | 4 | 1 | 2 | 15 | 5 | 16
|
|
INPUTP | 4 | 158 | 157 | 155 | 139
|
|
EXPORTS | 1 | 9 | 5
|
|
EQ | 4 |
|
|
!CP_WE_S.D = !RW & !UDS & !CP_CS
|
|
# !RW & !LDS & !CP_CS;
|
|
CP_WE_S.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
CP_WE_S.EXP = lan_adr & !A<15> & RW & !UDS
|
|
|
|
MACROCELL | 11 | 2 | LAN_WR_RST
|
|
ATTRIBUTES | 8553216 | 0
|
|
OUTPUTMC | 2 | 7 | 4 | 12 | 13
|
|
INPUTS | 3 | RESET | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3
|
|
INPUTMC | 2 | 11 | 6 | 11 | 5
|
|
INPUTP | 1 | 263
|
|
EQ | 3 |
|
|
LAN_WR_RST.D = !RESET & LAN_RST_SM_FSM_FFd2 &
|
|
LAN_RST_SM_FSM_FFd3;
|
|
LAN_WR_RST.CLK = CLK_EXT; // GCK
|
|
GLOBALS | 1 | 2 | CLK_EXT
|
|
|
|
MACROCELL | 9 | 7 | CP_RD_S
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 2 | 12 | 1 | 9 | 8
|
|
INPUTS | 7 | RW | LDS | CP_CS | UDS | SHUT_UP<2>/SHUT_UP<2>_CLKF | lan_adr | autoconfig
|
|
INPUTMC | 4 | 4 | 1 | 2 | 15 | 5 | 16 | 5 | 14
|
|
INPUTP | 3 | 158 | 157 | 155
|
|
EXPORTS | 1 | 9 | 8
|
|
EQ | 5 |
|
|
!CP_RD_S.D = RW & !UDS & !CP_CS
|
|
# RW & !LDS & !CP_CS;
|
|
CP_RD_S.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
CP_RD_S.EXP = !RW
|
|
# !lan_adr & !autoconfig & CP_CS
|
|
|
|
MACROCELL | 10 | 10 | CP_WE_QUIRK
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 2 | 10 | 16 | 10 | 11
|
|
INPUTS | 10 | CP_WE_S | SHUT_UP<2>/SHUT_UP<2>_CLKF | D<10>.PIN | lan_adr | LDS | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | AS | RW | D<2>.PIN
|
|
INPUTMC | 5 | 9 | 6 | 2 | 15 | 5 | 16 | 11 | 6 | 11 | 5
|
|
INPUTP | 5 | 74 | 157 | 152 | 158 | 71
|
|
EXPORTS | 1 | 10 | 11
|
|
EQ | 6 |
|
|
CP_WE_QUIRK.D = CP_WE_S;
|
|
CP_WE_QUIRK.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
CP_WE_QUIRK.EXP = D<10>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<2>.PIN
|
|
|
|
MACROCELL | 9 | 5 | LAN_RD_S
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 2 | 7 | 9 | 9 | 4
|
|
INPUTS | 12 | lan_adr | A<15> | RW | LDS | D<11>.PIN | SHUT_UP<2>/SHUT_UP<2>_CLKF | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | CP_CS | AS | D<3>.PIN | CP_WE_S.EXP
|
|
INPUTMC | 6 | 5 | 16 | 2 | 15 | 11 | 6 | 11 | 5 | 4 | 1 | 9 | 6
|
|
INPUTP | 6 | 139 | 158 | 157 | 77 | 152 | 28
|
|
EXPORTS | 1 | 9 | 4
|
|
IMPORTS | 1 | 9 | 6
|
|
EQ | 10 |
|
|
LAN_RD_S.D = lan_adr & !A<15> & RW & !LDS
|
|
;Imported pterms FB10_7
|
|
# lan_adr & !A<15> & RW & !UDS;
|
|
LAN_RD_S.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
LAN_RD_S.EXP = D<11>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<11>.PIN & !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<3>.PIN
|
|
|
|
MACROCELL | 9 | 3 | LAN_WRH_S
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 2 | 7 | 4 | 9 | 2
|
|
INPUTS | 11 | D<8>.PIN | RW | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | SHUT_UP<2>/SHUT_UP<2>_CLKF | lan_adr | LDS | CP_CS | AS | D<0>.PIN | DQ_3_IOBUFE.EXP
|
|
INPUTMC | 6 | 11 | 6 | 11 | 5 | 2 | 15 | 5 | 16 | 4 | 1 | 9 | 4
|
|
INPUTP | 5 | 32 | 158 | 157 | 152 | 4
|
|
EXPORTS | 1 | 9 | 2
|
|
IMPORTS | 1 | 9 | 4
|
|
EQ | 11 |
|
|
LAN_WRH_S.D = ;Imported pterms FB10_5
|
|
lan_adr & !A<15> & !RW & !UDS;
|
|
LAN_WRH_S.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
LAN_WRH_S.EXP = D<8>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<8>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<8>.PIN & !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<0>.PIN
|
|
|
|
MACROCELL | 9 | 0 | LAN_WRL_S
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 2 | 12 | 13 | 9 | 17
|
|
INPUTS | 12 | lan_adr | A<15> | RW | LDS | SHUT_UP<2>/SHUT_UP<2>_CLKF | D<10>.PIN | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | UDS | AS | D<2>.PIN | CP_CS
|
|
INPUTMC | 5 | 5 | 16 | 2 | 15 | 11 | 6 | 11 | 5 | 4 | 1
|
|
INPUTP | 7 | 139 | 158 | 157 | 74 | 155 | 152 | 71
|
|
EXPORTS | 1 | 9 | 17
|
|
EQ | 8 |
|
|
LAN_WRL_S.D = lan_adr & !A<15> & !RW & !LDS;
|
|
LAN_WRL_S.CLK = SHUT_UP<2>/SHUT_UP<2>_CLKF;
|
|
LAN_WRL_S.EXP = D<10>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<10>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<2>.PIN & !CP_CS
|
|
|
|
MACROCELL | 11 | 12 | LAN_CS_RST
|
|
ATTRIBUTES | 8553216 | 0
|
|
OUTPUTMC | 2 | 7 | 7 | 11 | 11
|
|
INPUTS | 11 | D<9>.PIN | lan_adr | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | RW | UDS | LDS | AS | D<1>.PIN | CP_CS | IDE_W_S.EXP
|
|
INPUTMC | 5 | 5 | 16 | 11 | 6 | 11 | 5 | 4 | 1 | 11 | 13
|
|
INPUTP | 6 | 73 | 158 | 155 | 157 | 152 | 30
|
|
EXPORTS | 1 | 11 | 11
|
|
IMPORTS | 1 | 11 | 13
|
|
EQ | 14 |
|
|
LAN_CS_RST.D = ;Imported pterms FB12_14
|
|
!RESET & LAN_RST_SM_FSM_FFd2
|
|
# !RESET & LAN_RST_SM_FSM_FFd3;
|
|
LAN_CS_RST.CLK = CLK_EXT; // GCK
|
|
LAN_CS_RST.EXP = D<9>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<9>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<9>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<9>.PIN & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<1>.PIN & !CP_CS
|
|
GLOBALS | 1 | 2 | CLK_EXT
|
|
|
|
MACROCELL | 1 | 4 | A_LAN_6_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 4 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd3 | A<7>
|
|
INPUTMC | 3 | 11 | 6 | 11 | 8 | 11 | 5
|
|
INPUTP | 1 | 100
|
|
EQ | 3 |
|
|
A_LAN<6> = LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd1
|
|
# LAN_RST_SM_FSM_FFd3 & !LAN_RST_SM_FSM_FFd1
|
|
# A<7> & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3;
|
|
|
|
MACROCELL | 12 | 1 | CP_RD_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 2 | AS | CP_RD_S
|
|
INPUTMC | 1 | 9 | 7
|
|
INPUTP | 1 | 152
|
|
EQ | 1 |
|
|
!CP_RD = !AS & !CP_RD_S;
|
|
|
|
MACROCELL | 10 | 16 | CP_WE_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 3 | AS | CP_WE_S | CP_WE_QUIRK
|
|
INPUTMC | 2 | 9 | 6 | 10 | 10
|
|
INPUTP | 1 | 152
|
|
EQ | 1 |
|
|
!CP_WE = !AS & !CP_WE_S & CP_WE_QUIRK;
|
|
|
|
MACROCELL | 0 | 16 | IDE_R_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 2 | AS | IDE_R_S
|
|
INPUTMC | 1 | 11 | 14
|
|
INPUTP | 1 | 152
|
|
EQ | 1 |
|
|
!IDE_R = !AS & !IDE_R_S;
|
|
|
|
MACROCELL | 2 | 1 | IDE_W_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
OUTPUTMC | 1 | 2 | 0
|
|
INPUTS | 18 | AS | IDE_W_S | CP_BASEADR<0> | SHUT_UP<2> | A<16> | $OpTx$FX_DC$327 | cp_and0000/cp_and0000_D2 | Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2 | AUTO_CONFIG_DONE<1> | CFIN | A<18> | A<17> | A<23> | A<22> | A<21> | A<19> | A<20> | AUTO_CONFIG_DONE<0>
|
|
INPUTMC | 8 | 11 | 13 | 3 | 17 | 12 | 9 | 5 | 11 | 5 | 0 | 14 | 0 | 12 | 12 | 11 | 16
|
|
INPUTP | 10 | 152 | 175 | 190 | 171 | 172 | 161 | 162 | 163 | 169 | 167
|
|
EXPORTS | 1 | 2 | 0
|
|
EQ | 15 |
|
|
!IDE_W = !AS & !IDE_W_S;
|
|
IDE_W_OBUF.EXP = CP_BASEADR<0> & !SHUT_UP<2> & !A<16> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<0> & !SHUT_UP<2> & A<16> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !AUTO_CONFIG_DONE<1> & !CFIN & !SHUT_UP<2> & !A<18> &
|
|
!A<17> & !A<16> & A<23> & A<22> & A<21> & A<19> & !A<20> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !AUTO_CONFIG_DONE<0> & !CFIN & !SHUT_UP<2> & !A<18> &
|
|
!A<17> & !A<16> & A<23> & A<22> & A<21> & A<19> & !A<20> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
|
|
MACROCELL | 7 | 7 | LAN_CS_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 3 | RESET | LAN_CS_RST | lan_adr
|
|
INPUTMC | 2 | 11 | 12 | 5 | 16
|
|
INPUTP | 1 | 263
|
|
EQ | 2 |
|
|
LAN_CS = RESET & lan_adr
|
|
# !RESET & LAN_CS_RST;
|
|
|
|
MACROCELL | 7 | 4 | LAN_WRH_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 4 | RESET | LAN_WR_RST | AS | LAN_WRH_S
|
|
INPUTMC | 2 | 11 | 2 | 9 | 3
|
|
INPUTP | 2 | 263 | 152
|
|
EQ | 3 |
|
|
LAN_WRH = AS & LAN_WR_RST
|
|
# !RESET & LAN_WR_RST
|
|
# !AS & RESET & LAN_WRH_S;
|
|
|
|
MACROCELL | 12 | 13 | LAN_WRL_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 4 | RESET | LAN_WR_RST | AS | LAN_WRL_S
|
|
INPUTMC | 2 | 11 | 2 | 9 | 0
|
|
INPUTP | 2 | 263 | 152
|
|
EQ | 3 |
|
|
LAN_WRL = AS & LAN_WR_RST
|
|
# !RESET & LAN_WR_RST
|
|
# !AS & RESET & LAN_WRL_S;
|
|
|
|
MACROCELL | 4 | 4 | ROM_OE_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 3 | AS | ROM_OE_S | AUTOBOOT_OFF
|
|
INPUTMC | 1 | 11 | 3
|
|
INPUTP | 2 | 152 | 142
|
|
EQ | 1 |
|
|
!ROM_OE = !AS & !ROM_OE_S & !AUTOBOOT_OFF;
|
|
|
|
MACROCELL | 3 | 7 | A_LAN_3_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 5 | A<3> | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | CP_CS | A<4>
|
|
INPUTMC | 3 | 11 | 6 | 11 | 5 | 4 | 1
|
|
INPUTP | 2 | 99 | 97
|
|
EQ | 4 |
|
|
A_LAN<3> = A<4> & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 &
|
|
CP_CS
|
|
# A<3> & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 &
|
|
!CP_CS;
|
|
|
|
MACROCELL | 7 | 9 | LAN_RD_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 3 | AS | RESET | LAN_RD_S
|
|
INPUTMC | 1 | 9 | 5
|
|
INPUTP | 2 | 152 | 263
|
|
EQ | 1 |
|
|
LAN_RD = !AS & RESET & LAN_RD_S;
|
|
|
|
MACROCELL | 13 | 10 | ROM_B_0_OBUF$BUF10
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 2 | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0>
|
|
INPUTMC | 2 | 12 | 12 | 11 | 16
|
|
EQ | 2 |
|
|
CFOUT = Gnd;
|
|
CFOUT.OE = AUTO_CONFIG_DONE<1> & AUTO_CONFIG_DONE<0>;
|
|
|
|
MACROCELL | 13 | 2 | ROM_B_0_OBUF$BUF2
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 2 | AS | ide
|
|
INPUTMC | 1 | 2 | 17
|
|
INPUTP | 1 | 152
|
|
EQ | 2 |
|
|
OVR = Gnd;
|
|
OVR.OE = !AS & ide;
|
|
|
|
MACROCELL | 2 | 13 | ROM_B_0_OBUF$BUF8
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 1 | ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST
|
|
INPUTMC | 1 | 14 | 16
|
|
EQ | 2 |
|
|
INT_OUT = Gnd;
|
|
INT_OUT.OE = ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST;
|
|
|
|
MACROCELL | 14 | 11 | ROM_B_0_OBUF$BUF9
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | AS | ide | IDE_WAIT
|
|
INPUTMC | 1 | 2 | 17
|
|
INPUTP | 2 | 152 | 61
|
|
EQ | 2 |
|
|
DTACK = Gnd;
|
|
DTACK.OE = !AS & ide & IDE_WAIT;
|
|
|
|
MACROCELL | 4 | 1 | CP_CS_OBUF
|
|
ATTRIBUTES | 8782758 | 0
|
|
OUTPUTMC | 54 | 9 | 15 | 11 | 9 | 11 | 11 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 10 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 1 | 10 | 11 | 9 | 4 | 9 | 8 | 4 | 7 | 9 | 11 | 9 | 10 | 9 | 12 | 3 | 11 | 1 | 1 | 3 | 13 | 9 | 6 | 9 | 7 | 3 | 7 | 13 | 13 | 9 | 3 | 9 | 5 | 4 | 15 | 6 | 3 | 6 | 5 | 7 | 0 | 7 | 3 | 9 | 0 | 9 | 13 | 9 | 14 | 9 | 17 | 11 | 5 | 11 | 6 | 11 | 10 | 11 | 12
|
|
INPUTS | 8 | SHUT_UP<1> | $OpTx$FX_DC$327 | CP_BASEADR<7> | A<23> | EXP24_.EXP | EXP25_.EXP | AS | ide/ide_RSTF__$INT
|
|
INPUTMC | 6 | 12 | 10 | 5 | 11 | 13 | 16 | 4 | 0 | 4 | 2 | 12 | 8
|
|
INPUTP | 2 | 161 | 152
|
|
IMPORTS | 2 | 4 | 0 | 4 | 2
|
|
EQ | 28 |
|
|
CP_CS.D = SHUT_UP<1>
|
|
# !$OpTx$FX_DC$327
|
|
# CP_BASEADR<7> & !A<23>
|
|
;Imported pterms FB5_1
|
|
# CP_BASEADR<5> & !A<21>
|
|
# !CP_BASEADR<5> & A<21>
|
|
# CP_BASEADR<6> & !A<22>
|
|
# !CP_BASEADR<6> & A<22>
|
|
# !CP_BASEADR<7> & A<23>
|
|
;Imported pterms FB5_18
|
|
# CP_BASEADR<0> & !A<16>
|
|
# !CP_BASEADR<0> & A<16>
|
|
# CP_BASEADR<1> & !A<17>
|
|
# !CP_BASEADR<1> & A<17>
|
|
# !CP_BASEADR<2> & A<18>
|
|
;Imported pterms FB5_3
|
|
# CP_BASEADR<2> & !A<18>
|
|
# CP_BASEADR<3> & !A<19>
|
|
# !CP_BASEADR<3> & A<19>
|
|
# CP_BASEADR<4> & !A<20>
|
|
# !CP_BASEADR<4> & A<20>
|
|
;Imported pterms FB5_4
|
|
# !AUTO_CONFIG_DONE<1> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
# !AUTO_CONFIG_DONE<0> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>;
|
|
CP_CS.CLK = !AS;
|
|
CP_CS.AP = !ide/ide_RSTF__$INT;
|
|
|
|
MACROCELL | 0 | 11 | IDE_A_0_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<9>
|
|
INPUTP | 1 | 108
|
|
EQ | 1 |
|
|
IDE_A<0> = A<9>;
|
|
|
|
MACROCELL | 0 | 14 | IDE_A_1_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<10>
|
|
INPUTP | 1 | 112
|
|
EQ | 1 |
|
|
IDE_A<1> = A<10>;
|
|
|
|
MACROCELL | 0 | 13 | IDE_A_2_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<11>
|
|
INPUTP | 1 | 114
|
|
EQ | 1 |
|
|
IDE_A<2> = A<11>;
|
|
|
|
MACROCELL | 0 | 7 | IDE_CS_0_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<12>
|
|
INPUTP | 1 | 115
|
|
EQ | 1 |
|
|
IDE_CS<0> = !A<12>;
|
|
|
|
MACROCELL | 0 | 9 | IDE_CS_1_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<13>
|
|
INPUTP | 1 | 123
|
|
EQ | 1 |
|
|
IDE_CS<1> = !A<13>;
|
|
|
|
MACROCELL | 13 | 13 | SLAVE_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 5 | AS | lan_adr | autoconfig | ide | CP_CS
|
|
INPUTMC | 4 | 5 | 16 | 5 | 14 | 2 | 17 | 4 | 1
|
|
INPUTP | 1 | 152
|
|
EQ | 2 |
|
|
SLAVE = AS
|
|
# !lan_adr & !autoconfig & !ide & CP_CS;
|
|
|
|
MACROCELL | 13 | 14 | ROM_B_0_OBUF$BUF1
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 0
|
|
EQ | 2 |
|
|
OWN = Gnd;
|
|
OWN.OE = Gnd;
|
|
|
|
MACROCELL | 15 | 9 | ROM_B_0_OBUF$BUF3
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 0
|
|
EQ | 2 |
|
|
MTACK = Gnd;
|
|
MTACK.OE = Gnd;
|
|
|
|
MACROCELL | 11 | 1 | ROM_B_0_OBUF$BUF4
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 0
|
|
EQ | 2 |
|
|
LAN_CFG<4> = Gnd;
|
|
LAN_CFG<4>.OE = Gnd;
|
|
|
|
MACROCELL | 1 | 7 | ROM_B_0_OBUF$BUF5
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 0
|
|
EQ | 2 |
|
|
LAN_CFG<3> = Gnd;
|
|
LAN_CFG<3>.OE = Gnd;
|
|
|
|
MACROCELL | 5 | 1 | ROM_B_0_OBUF$BUF6
|
|
ATTRIBUTES | 265986 | 0
|
|
OUTPUTMC | 1 | 5 | 0
|
|
INPUTS | 11 | AUTO_CONFIG_DONE<1> | CFIN | A<18> | A<17> | A<16> | A<23> | A<22> | A<21> | A<19> | A<20> | AUTO_CONFIG_DONE<0>
|
|
INPUTMC | 2 | 12 | 12 | 11 | 16
|
|
INPUTP | 9 | 190 | 171 | 172 | 175 | 161 | 162 | 163 | 169 | 167
|
|
EXPORTS | 1 | 5 | 0
|
|
EQ | 6 |
|
|
LAN_CFG<2> = Gnd;
|
|
LAN_CFG<2>.OE = Gnd;
|
|
ROM_B_0_OBUF$BUF6.EXP = !AUTO_CONFIG_DONE<1> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
# !AUTO_CONFIG_DONE<0> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
|
|
MACROCELL | 1 | 5 | ROM_B_0_OBUF$BUF7
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 0
|
|
EQ | 2 |
|
|
LAN_CFG<1> = Gnd;
|
|
LAN_CFG<1>.OE = Gnd;
|
|
|
|
MACROCELL | 10 | 13 | ROM_B_0_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 0
|
|
EQ | 1 |
|
|
ROM_B<1> = Gnd;
|
|
|
|
MACROCELL | 12 | 14 | ROM_B_0_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 0
|
|
EQ | 1 |
|
|
ROM_B<0> = Gnd;
|
|
|
|
MACROCELL | 2 | 15 | SHUT_UP<2>/SHUT_UP<2>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 50 | 12 | 12 | 11 | 16 | 1 | 17 | 12 | 17 | 9 | 15 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 16 | 6 | 13 | 6 | 8 | 6 | 0 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 11 | 17 | 11 | 15 | 1 | 15 | 11 | 10 | 12 | 11 | 12 | 10 | 12 | 9 | 11 | 14 | 11 | 13 | 11 | 3 | 9 | 6 | 9 | 7 | 10 | 10 | 9 | 5 | 9 | 3 | 9 | 0 | 2 | 16
|
|
INPUTS | 8 | C1 | C3 | CP_BASEADR<1> | SHUT_UP<2> | A<17> | $OpTx$FX_DC$327 | cp_and0000/cp_and0000_D2 | Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
INPUTMC | 5 | 3 | 16 | 12 | 9 | 5 | 11 | 5 | 0 | 14 | 0
|
|
INPUTP | 3 | 188 | 187 | 172
|
|
EXPORTS | 1 | 2 | 16
|
|
EQ | 8 |
|
|
SHUT_UP<2>/SHUT_UP<2>_CLKF = C1
|
|
$ C3;
|
|
SHUT_UP<2>/SHUT_UP<2>_CLKF.EXP = CP_BASEADR<1> & !SHUT_UP<2> & !A<17> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<1> & !SHUT_UP<2> & A<17> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
|
|
MACROCELL | 9 | 12 | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 16 | 9 | 16 | 11 | 9 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 1 | 10 | 11 | 9 | 4 | 9 | 9 | 4 | 7 | 9 | 11 | 9 | 10 | 9 | 13
|
|
INPUTS | 10 | AS | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | D<14>.PIN | RW | lan_adr | LDS | CP_CS | D<6>.PIN | DQ_8_IOBUFE.EXP
|
|
INPUTMC | 5 | 11 | 6 | 11 | 5 | 5 | 16 | 4 | 1 | 9 | 13
|
|
INPUTP | 5 | 152 | 81 | 158 | 157 | 26
|
|
EXPORTS | 1 | 9 | 11
|
|
IMPORTS | 1 | 9 | 13
|
|
EQ | 15 |
|
|
DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT = AS & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3
|
|
;Imported pterms FB10_14
|
|
# RW & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3
|
|
# !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !lan_adr & UDS & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3;
|
|
DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT.EXP = D<14>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<14>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<14>.PIN & !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<6>.PIN
|
|
|
|
MACROCELL | 9 | 8 | $OpTx$INV$136__$INT
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 17 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 9 | 9
|
|
INPUTS | 10 | AS | D<12>.PIN | lan_adr | LDS | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | CP_CS | RW | D<4>.PIN | CP_RD_S.EXP
|
|
INPUTMC | 5 | 5 | 16 | 11 | 6 | 11 | 5 | 4 | 1 | 9 | 7
|
|
INPUTP | 5 | 152 | 78 | 157 | 158 | 38
|
|
EXPORTS | 1 | 9 | 9
|
|
IMPORTS | 1 | 9 | 7
|
|
EQ | 12 |
|
|
$OpTx$INV$136__$INT = AS
|
|
;Imported pterms FB10_8
|
|
# !RW
|
|
# !lan_adr & !autoconfig & CP_CS;
|
|
$OpTx$INV$136__$INT.EXP = D<12>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<12>.PIN & !lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
# !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<4>.PIN
|
|
# !AS & !RW & !LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<4>.PIN & !CP_CS
|
|
|
|
MACROCELL | 12 | 8 | ide/ide_RSTF__$INT
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 4 | 5 | 16 | 5 | 14 | 2 | 17 | 4 | 1
|
|
INPUTS | 2 | RESET | BERR
|
|
INPUTP | 2 | 263 | 176
|
|
EQ | 1 |
|
|
ide/ide_RSTF__$INT = RESET & BERR;
|
|
|
|
MACROCELL | 5 | 11 | $OpTx$FX_DC$327
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 6 | 2 | 17 | 4 | 1 | 2 | 0 | 2 | 1 | 2 | 15 | 2 | 16
|
|
INPUTS | 7 | SHUT_UP<0> | LAN_BASEADR<5> | A<21> | LAN_BASEADR<4> | A<20> | EXP31_.EXP | EXP32_.EXP
|
|
INPUTMC | 5 | 12 | 11 | 12 | 15 | 13 | 9 | 5 | 10 | 5 | 12
|
|
INPUTP | 2 | 163 | 167
|
|
IMPORTS | 2 | 5 | 10 | 5 | 12
|
|
EQ | 21 |
|
|
$OpTx$FX_DC$327 = SHUT_UP<0>
|
|
# LAN_BASEADR<4> & !A<20>
|
|
# !LAN_BASEADR<4> & A<20>
|
|
# LAN_BASEADR<5> & !A<21>
|
|
# !LAN_BASEADR<5> & A<21>
|
|
;Imported pterms FB6_11
|
|
# LAN_BASEADR<1> & !A<17>
|
|
# LAN_BASEADR<6> & !A<22>
|
|
# !LAN_BASEADR<6> & A<22>
|
|
# LAN_BASEADR<7> & !A<23>
|
|
# !LAN_BASEADR<7> & A<23>
|
|
;Imported pterms FB6_10
|
|
# LAN_BASEADR<2> & !A<18>
|
|
;Imported pterms FB6_13
|
|
# LAN_BASEADR<0> & !A<16>
|
|
# !LAN_BASEADR<0> & A<16>
|
|
# !LAN_BASEADR<1> & A<17>
|
|
# LAN_BASEADR<3> & !A<19>
|
|
# !LAN_BASEADR<3> & A<19>
|
|
;Imported pterms FB6_14
|
|
# !LAN_BASEADR<2> & A<18>;
|
|
|
|
MACROCELL | 5 | 0 | cp_and0000/cp_and0000_D2
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 6 | 2 | 17 | 2 | 0 | 2 | 1 | 2 | 15 | 2 | 16 | 5 | 17
|
|
INPUTS | 14 | LAN_BASEADR<0> | A<16> | LAN_BASEADR<1> | A<17> | AUTO_CONFIG_DONE<1> | CFIN | A<18> | A<23> | A<22> | A<21> | A<19> | A<20> | AUTO_CONFIG_DONE<0> | ROM_B_0_OBUF$BUF6.EXP
|
|
INPUTMC | 5 | 3 | 12 | 3 | 10 | 12 | 12 | 11 | 16 | 5 | 1
|
|
INPUTP | 9 | 175 | 172 | 190 | 171 | 161 | 162 | 163 | 169 | 167
|
|
EXPORTS | 1 | 5 | 17
|
|
IMPORTS | 1 | 5 | 1
|
|
EQ | 12 |
|
|
cp_and0000/cp_and0000_D2 = ;Imported pterms FB6_2
|
|
!AUTO_CONFIG_DONE<1> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
# !AUTO_CONFIG_DONE<0> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>;
|
|
cp_and0000/cp_and0000_D2.EXP = LAN_BASEADR<0> & !A<16>
|
|
# !LAN_BASEADR<0> & A<16>
|
|
# !LAN_BASEADR<1> & A<17>
|
|
# !AUTO_CONFIG_DONE<1> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
# !AUTO_CONFIG_DONE<0> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
|
|
MACROCELL | 14 | 0 | Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 5 | 2 | 17 | 2 | 0 | 2 | 1 | 2 | 15 | 2 | 16
|
|
INPUTS | 8 | IDE_BASEADR<3> | A<19> | IDE_BASEADR<2> | A<18> | IDE_BASEADR<1> | A<17> | EXP55_.EXP | EXP56_.EXP
|
|
INPUTMC | 5 | 0 | 15 | 10 | 15 | 3 | 14 | 14 | 1 | 14 | 17
|
|
INPUTP | 3 | 169 | 171 | 172
|
|
IMPORTS | 2 | 14 | 1 | 14 | 17
|
|
EQ | 19 |
|
|
Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2 = IDE_BASEADR<1> & !A<17>
|
|
# IDE_BASEADR<2> & !A<18>
|
|
# !IDE_BASEADR<2> & A<18>
|
|
# IDE_BASEADR<3> & !A<19>
|
|
# !IDE_BASEADR<3> & A<19>
|
|
;Imported pterms FB15_2
|
|
# IDE_BASEADR<4> & !A<20>
|
|
# IDE_BASEADR<5> & !A<21>
|
|
# !IDE_BASEADR<5> & A<21>
|
|
# IDE_BASEADR<7> & !A<23>
|
|
# !IDE_BASEADR<7> & A<23>
|
|
;Imported pterms FB15_18
|
|
# IDE_BASEADR<0> & !A<16>
|
|
# !IDE_BASEADR<0> & A<16>
|
|
# !IDE_BASEADR<1> & A<17>
|
|
# IDE_BASEADR<6> & !A<22>
|
|
# !IDE_BASEADR<6> & A<22>
|
|
;Imported pterms FB15_17
|
|
# !IDE_BASEADR<4> & A<20>;
|
|
|
|
MACROCELL | 14 | 16 | ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 2 | 2 | 13 | 14 | 17
|
|
INPUTS | 5 | CP_IRQ | LAN_INT_ENABLE | LAN_IRQ_OUT | IDE_BASEADR<4> | A<20>
|
|
INPUTMC | 3 | 9 | 15 | 11 | 17 | 13 | 15
|
|
INPUTP | 2 | 59 | 167
|
|
EXPORTS | 1 | 14 | 17
|
|
EQ | 3 |
|
|
ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST = !CP_IRQ
|
|
# LAN_INT_ENABLE & !LAN_IRQ_OUT;
|
|
ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST.EXP = !IDE_BASEADR<4> & A<20>
|
|
|
|
MACROCELL | 2 | 0 | EXP22_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 2 | 17
|
|
INPUTS | 11 | CP_BASEADR<2> | SHUT_UP<2> | A<18> | $OpTx$FX_DC$327 | cp_and0000/cp_and0000_D2 | Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2 | CP_BASEADR<3> | A<19> | CP_BASEADR<4> | A<20> | IDE_W_OBUF.EXP
|
|
INPUTMC | 8 | 6 | 16 | 12 | 9 | 5 | 11 | 5 | 0 | 14 | 0 | 0 | 17 | 7 | 17 | 2 | 1
|
|
INPUTP | 3 | 171 | 169 | 167
|
|
EXPORTS | 1 | 2 | 17
|
|
IMPORTS | 1 | 2 | 1
|
|
EQ | 30 |
|
|
EXP22_.EXP = CP_BASEADR<2> & !SHUT_UP<2> & !A<18> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<2> & !SHUT_UP<2> & A<18> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# CP_BASEADR<3> & !SHUT_UP<2> & !A<19> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<3> & !SHUT_UP<2> & A<19> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<4> & !SHUT_UP<2> & A<20> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
;Imported pterms FB3_2
|
|
# CP_BASEADR<0> & !SHUT_UP<2> & !A<16> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<0> & !SHUT_UP<2> & A<16> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !AUTO_CONFIG_DONE<1> & !CFIN & !SHUT_UP<2> & !A<18> &
|
|
!A<17> & !A<16> & A<23> & A<22> & A<21> & A<19> & !A<20> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !AUTO_CONFIG_DONE<0> & !CFIN & !SHUT_UP<2> & !A<18> &
|
|
!A<17> & !A<16> & A<23> & A<22> & A<21> & A<19> & !A<20> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
|
|
MACROCELL | 2 | 16 | EXP23_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 2 | 17
|
|
INPUTS | 11 | CP_BASEADR<4> | SHUT_UP<2> | A<20> | $OpTx$FX_DC$327 | cp_and0000/cp_and0000_D2 | Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2 | CP_BASEADR<5> | A<21> | CP_BASEADR<6> | A<22> | SHUT_UP<2>/SHUT_UP<2>_CLKF.EXP
|
|
INPUTMC | 8 | 7 | 17 | 12 | 9 | 5 | 11 | 5 | 0 | 14 | 0 | 10 | 17 | 13 | 17 | 2 | 15
|
|
INPUTP | 3 | 167 | 163 | 162
|
|
EXPORTS | 1 | 2 | 17
|
|
IMPORTS | 1 | 2 | 15
|
|
EQ | 22 |
|
|
EXP23_.EXP = CP_BASEADR<4> & !SHUT_UP<2> & !A<20> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# CP_BASEADR<5> & !SHUT_UP<2> & !A<21> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<5> & !SHUT_UP<2> & A<21> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# CP_BASEADR<6> & !SHUT_UP<2> & !A<22> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<6> & !SHUT_UP<2> & A<22> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
;Imported pterms FB3_16
|
|
# CP_BASEADR<1> & !SHUT_UP<2> & !A<17> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
# !CP_BASEADR<1> & !SHUT_UP<2> & A<17> &
|
|
$OpTx$FX_DC$327 & !cp_and0000/cp_and0000_D2 &
|
|
!Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
|
|
|
|
MACROCELL | 4 | 0 | EXP24_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 4 | 1
|
|
INPUTS | 7 | CP_BASEADR<5> | A<21> | CP_BASEADR<6> | A<22> | CP_BASEADR<7> | A<23> | EXP30_.EXP
|
|
INPUTMC | 4 | 10 | 17 | 13 | 17 | 13 | 16 | 4 | 17
|
|
INPUTP | 3 | 163 | 162 | 161
|
|
EXPORTS | 1 | 4 | 1
|
|
IMPORTS | 1 | 4 | 17
|
|
EQ | 11 |
|
|
EXP24_.EXP = CP_BASEADR<5> & !A<21>
|
|
# !CP_BASEADR<5> & A<21>
|
|
# CP_BASEADR<6> & !A<22>
|
|
# !CP_BASEADR<6> & A<22>
|
|
# !CP_BASEADR<7> & A<23>
|
|
;Imported pterms FB5_18
|
|
# CP_BASEADR<0> & !A<16>
|
|
# !CP_BASEADR<0> & A<16>
|
|
# CP_BASEADR<1> & !A<17>
|
|
# !CP_BASEADR<1> & A<17>
|
|
# !CP_BASEADR<2> & A<18>
|
|
|
|
MACROCELL | 4 | 2 | EXP25_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 4 | 1
|
|
INPUTS | 7 | CP_BASEADR<2> | A<18> | CP_BASEADR<3> | A<19> | CP_BASEADR<4> | A<20> | EXP26_.EXP
|
|
INPUTMC | 4 | 6 | 16 | 0 | 17 | 7 | 17 | 4 | 3
|
|
INPUTP | 3 | 171 | 169 | 167
|
|
EXPORTS | 1 | 4 | 1
|
|
IMPORTS | 1 | 4 | 3
|
|
EQ | 10 |
|
|
EXP25_.EXP = CP_BASEADR<2> & !A<18>
|
|
# CP_BASEADR<3> & !A<19>
|
|
# !CP_BASEADR<3> & A<19>
|
|
# CP_BASEADR<4> & !A<20>
|
|
# !CP_BASEADR<4> & A<20>
|
|
;Imported pterms FB5_4
|
|
# !AUTO_CONFIG_DONE<1> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
# !AUTO_CONFIG_DONE<0> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
|
|
MACROCELL | 4 | 3 | EXP26_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 4 | 2
|
|
INPUTS | 11 | AUTO_CONFIG_DONE<1> | CFIN | A<18> | A<17> | A<16> | A<23> | A<22> | A<21> | A<19> | A<20> | AUTO_CONFIG_DONE<0>
|
|
INPUTMC | 2 | 12 | 12 | 11 | 16
|
|
INPUTP | 9 | 190 | 171 | 172 | 175 | 161 | 162 | 163 | 169 | 167
|
|
EXPORTS | 1 | 4 | 2
|
|
EQ | 4 |
|
|
EXP26_.EXP = !AUTO_CONFIG_DONE<1> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
# !AUTO_CONFIG_DONE<0> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
|
|
MACROCELL | 4 | 6 | EXP27_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 4 | 7
|
|
INPUTS | 5 | D<13>.PIN | lan_adr | LDS | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3
|
|
INPUTMC | 3 | 5 | 16 | 11 | 6 | 11 | 5
|
|
INPUTP | 2 | 80 | 157
|
|
EXPORTS | 1 | 4 | 7
|
|
EQ | 2 |
|
|
EXP27_.EXP = D<13>.PIN & !lan_adr & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
|
|
MACROCELL | 4 | 8 | EXP28_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 4 | 7
|
|
INPUTS | 6 | AS | lan_adr | RW | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | D<5>.PIN
|
|
INPUTMC | 3 | 5 | 16 | 11 | 6 | 11 | 5
|
|
INPUTP | 3 | 152 | 158 | 37
|
|
EXPORTS | 1 | 4 | 7
|
|
EQ | 2 |
|
|
EXP28_.EXP = !AS & lan_adr & !RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & D<5>.PIN
|
|
|
|
MACROCELL | 4 | 15 | EXP29_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 4 | 16
|
|
INPUTS | 5 | AS | DQ<4>.PIN | lan_adr | RW | CP_CS
|
|
INPUTMC | 2 | 5 | 16 | 4 | 1
|
|
INPUTP | 3 | 152 | 225 | 158
|
|
EXPORTS | 1 | 4 | 16
|
|
EQ | 1 |
|
|
EXP29_.EXP = !AS & DQ<4>.PIN & !lan_adr & RW & !CP_CS
|
|
|
|
MACROCELL | 4 | 17 | EXP30_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 4 | 0
|
|
INPUTS | 6 | CP_BASEADR<0> | A<16> | CP_BASEADR<1> | A<17> | CP_BASEADR<2> | A<18>
|
|
INPUTMC | 3 | 3 | 17 | 3 | 16 | 6 | 16
|
|
INPUTP | 3 | 175 | 172 | 171
|
|
EXPORTS | 1 | 4 | 0
|
|
EQ | 5 |
|
|
EXP30_.EXP = CP_BASEADR<0> & !A<16>
|
|
# !CP_BASEADR<0> & A<16>
|
|
# CP_BASEADR<1> & !A<17>
|
|
# !CP_BASEADR<1> & A<17>
|
|
# !CP_BASEADR<2> & A<18>
|
|
|
|
MACROCELL | 5 | 10 | EXP31_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 5 | 11
|
|
INPUTS | 7 | LAN_BASEADR<1> | A<17> | LAN_BASEADR<6> | A<22> | LAN_BASEADR<7> | A<23> | A_LAN_8_OBUF.EXP
|
|
INPUTMC | 4 | 3 | 10 | 13 | 8 | 13 | 7 | 5 | 9
|
|
INPUTP | 3 | 172 | 162 | 161
|
|
EXPORTS | 1 | 5 | 11
|
|
IMPORTS | 1 | 5 | 9
|
|
EQ | 7 |
|
|
EXP31_.EXP = LAN_BASEADR<1> & !A<17>
|
|
# LAN_BASEADR<6> & !A<22>
|
|
# !LAN_BASEADR<6> & A<22>
|
|
# LAN_BASEADR<7> & !A<23>
|
|
# !LAN_BASEADR<7> & A<23>
|
|
;Imported pterms FB6_10
|
|
# LAN_BASEADR<2> & !A<18>
|
|
|
|
MACROCELL | 5 | 12 | EXP32_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 5 | 11
|
|
INPUTS | 7 | LAN_BASEADR<0> | A<16> | LAN_BASEADR<1> | A<17> | LAN_BASEADR<3> | A<19> | A_LAN_9_OBUF.EXP
|
|
INPUTMC | 4 | 3 | 12 | 3 | 10 | 12 | 16 | 5 | 13
|
|
INPUTP | 3 | 175 | 172 | 169
|
|
EXPORTS | 1 | 5 | 11
|
|
IMPORTS | 1 | 5 | 13
|
|
EQ | 7 |
|
|
EXP32_.EXP = LAN_BASEADR<0> & !A<16>
|
|
# !LAN_BASEADR<0> & A<16>
|
|
# !LAN_BASEADR<1> & A<17>
|
|
# LAN_BASEADR<3> & !A<19>
|
|
# !LAN_BASEADR<3> & A<19>
|
|
;Imported pterms FB6_14
|
|
# !LAN_BASEADR<2> & A<18>
|
|
|
|
MACROCELL | 5 | 15 | EXP33_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 5 | 16
|
|
INPUTS | 7 | LAN_BASEADR<4> | A<20> | LAN_BASEADR<5> | A<21> | LAN_BASEADR<6> | A<22> | autoconfig.EXP
|
|
INPUTMC | 4 | 13 | 9 | 12 | 15 | 13 | 8 | 5 | 14
|
|
INPUTP | 3 | 167 | 163 | 162
|
|
EXPORTS | 1 | 5 | 16
|
|
IMPORTS | 1 | 5 | 14
|
|
EQ | 7 |
|
|
EXP33_.EXP = LAN_BASEADR<4> & !A<20>
|
|
# LAN_BASEADR<5> & !A<21>
|
|
# !LAN_BASEADR<5> & A<21>
|
|
# LAN_BASEADR<6> & !A<22>
|
|
# !LAN_BASEADR<6> & A<22>
|
|
;Imported pterms FB6_15
|
|
# LAN_BASEADR<1> & !A<17>
|
|
|
|
MACROCELL | 5 | 17 | EXP34_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 5 | 16
|
|
INPUTS | 7 | LAN_BASEADR<2> | A<18> | LAN_BASEADR<3> | A<19> | LAN_BASEADR<4> | A<20> | cp_and0000/cp_and0000_D2.EXP
|
|
INPUTMC | 4 | 10 | 12 | 12 | 16 | 13 | 9 | 5 | 0
|
|
INPUTP | 3 | 171 | 169 | 167
|
|
EXPORTS | 1 | 5 | 16
|
|
IMPORTS | 1 | 5 | 0
|
|
EQ | 13 |
|
|
EXP34_.EXP = LAN_BASEADR<2> & !A<18>
|
|
# !LAN_BASEADR<2> & A<18>
|
|
# LAN_BASEADR<3> & !A<19>
|
|
# !LAN_BASEADR<3> & A<19>
|
|
# !LAN_BASEADR<4> & A<20>
|
|
;Imported pterms FB6_1
|
|
# LAN_BASEADR<0> & !A<16>
|
|
# !LAN_BASEADR<0> & A<16>
|
|
# !LAN_BASEADR<1> & A<17>
|
|
# !AUTO_CONFIG_DONE<1> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
# !AUTO_CONFIG_DONE<0> & !CFIN & !A<18> & !A<17> &
|
|
!A<16> & A<23> & A<22> & A<21> & A<19> & !A<20>
|
|
|
|
MACROCELL | 6 | 1 | EXP35_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 6 | 0
|
|
INPUTS | 12 | AS | AUTO_CONFIG_DONE<1> | autoconfig | UDS | A<5> | A<1> | A<6> | A<3> | A<4> | A<2> | LDS | D_13_IOBUFE.EXP
|
|
INPUTMC | 3 | 12 | 12 | 5 | 14 | 6 | 2
|
|
INPUTP | 9 | 152 | 155 | 91 | 107 | 98 | 99 | 97 | 101 | 157
|
|
EXPORTS | 1 | 6 | 0
|
|
IMPORTS | 1 | 6 | 2
|
|
EQ | 13 |
|
|
EXP35_.EXP = !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & A<1> & !A<6> & !A<3>
|
|
# !AS & autoconfig & !UDS & !A<5> & A<6> & !A<4> &
|
|
!A<3> & !A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & !A<1> & !A<6> &
|
|
A<4> & A<3> & !A<2>
|
|
# !AS & autoconfig & !LDS & A<5> & !A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & !A<1> & !A<6> &
|
|
A<4> & A<3> & !A<2>
|
|
;Imported pterms FB7_3
|
|
# !AS & autoconfig & !UDS & A<5> & !A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>
|
|
|
|
MACROCELL | 6 | 3 | EXP36_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 6 | 2
|
|
INPUTS | 6 | AS | lan_adr | RW | DQ<13>.PIN | DQ<5>.PIN | CP_CS
|
|
INPUTMC | 2 | 5 | 16 | 4 | 1
|
|
INPUTP | 4 | 152 | 158 | 204 | 69
|
|
EXPORTS | 1 | 6 | 2
|
|
EQ | 2 |
|
|
EXP36_.EXP = !AS & lan_adr & RW & DQ<13>.PIN
|
|
# !AS & DQ<5>.PIN & !lan_adr & RW & !CP_CS
|
|
|
|
MACROCELL | 6 | 5 | EXP37_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 6 | 4
|
|
INPUTS | 5 | AS | DQ<6>.PIN | lan_adr | RW | CP_CS
|
|
INPUTMC | 2 | 5 | 16 | 4 | 1
|
|
INPUTP | 3 | 152 | 227 | 158
|
|
EXPORTS | 1 | 6 | 4
|
|
EQ | 1 |
|
|
EXP37_.EXP = !AS & DQ<6>.PIN & !lan_adr & RW & !CP_CS
|
|
|
|
MACROCELL | 6 | 6 | EXP38_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 6 | 7
|
|
INPUTS | 12 | AS | AUTO_CONFIG_DONE<1> | autoconfig | UDS | A<1> | A<6> | A<4> | A<3> | A<2> | AUTO_CONFIG_DONE<0> | A<5> | LDS
|
|
INPUTMC | 3 | 12 | 12 | 5 | 14 | 11 | 16
|
|
INPUTP | 9 | 152 | 155 | 107 | 98 | 97 | 99 | 101 | 91 | 157
|
|
EXPORTS | 1 | 6 | 7
|
|
EQ | 10 |
|
|
EXP38_.EXP = !AS & AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & AUTO_CONFIG_DONE<0> & autoconfig & !UDS &
|
|
A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & !A<1> & !A<6> &
|
|
A<4> & A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & !A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & !A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
|
|
MACROCELL | 6 | 7 | EXP39_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 6 | 8
|
|
INPUTS | 11 | AS | autoconfig | UDS | A<5> | A<1> | A<4> | A<3> | A<2> | A<6> | LDS | EXP38_.EXP
|
|
INPUTMC | 2 | 5 | 14 | 6 | 6
|
|
INPUTP | 9 | 152 | 155 | 91 | 107 | 97 | 99 | 101 | 98 | 157
|
|
EXPORTS | 1 | 6 | 8
|
|
IMPORTS | 1 | 6 | 6
|
|
EQ | 21 |
|
|
EXP39_.EXP = !AS & autoconfig & !UDS & !A<5> & A<1> & !A<4> &
|
|
!A<3> & !A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & A<6> & !A<4> &
|
|
!A<3> & !A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & A<6> & !A<4> &
|
|
!A<3> & !A<2>
|
|
# !AS & autoconfig & !LDS & A<5> & A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & A<1> & !A<6> &
|
|
A<4> & !A<3> & A<2>
|
|
;Imported pterms FB7_7
|
|
# !AS & AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & AUTO_CONFIG_DONE<0> & autoconfig & !UDS &
|
|
A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & !A<1> & !A<6> &
|
|
A<4> & A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & !A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & !A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
|
|
MACROCELL | 6 | 9 | EXP40_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 6 | 8
|
|
INPUTS | 12 | AS | AUTO_CONFIG_DONE<1> | autoconfig | LDS | A<1> | A<6> | A<4> | A<3> | A<2> | AUTO_CONFIG_DONE<0> | UDS | A<5>
|
|
INPUTMC | 3 | 12 | 12 | 5 | 14 | 11 | 16
|
|
INPUTP | 9 | 152 | 157 | 107 | 98 | 97 | 99 | 101 | 155 | 91
|
|
EXPORTS | 1 | 6 | 8
|
|
EQ | 10 |
|
|
EXP40_.EXP = !AS & AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & AUTO_CONFIG_DONE<0> & autoconfig & !LDS &
|
|
A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & autoconfig & !UDS & A<5> & A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & A<1> & !A<6> &
|
|
A<4> & !A<3> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & !A<1> & !A<6> &
|
|
A<4> & A<3> & A<2>
|
|
|
|
MACROCELL | 6 | 10 | EXP41_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 6 | 11
|
|
INPUTS | 7 | Dout1<3> | lan_adr | CP_CS | AS | RW | DQ<15>.PIN | DQ<7>.PIN
|
|
INPUTMC | 3 | 6 | 0 | 5 | 16 | 4 | 1
|
|
INPUTP | 4 | 152 | 158 | 202 | 226
|
|
EXPORTS | 1 | 6 | 11
|
|
EQ | 3 |
|
|
EXP41_.EXP = Dout1<3> & !lan_adr & CP_CS
|
|
# !AS & lan_adr & RW & DQ<15>.PIN
|
|
# !AS & DQ<7>.PIN & !lan_adr & RW & !CP_CS
|
|
|
|
MACROCELL | 6 | 12 | EXP42_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 6 | 13
|
|
INPUTS | 11 | AS | autoconfig | UDS | A<5> | A<4> | A<3> | A<2> | A<1> | A<6> | LDS | D_15_IOBUFE.EXP
|
|
INPUTMC | 2 | 5 | 14 | 6 | 11
|
|
INPUTP | 9 | 152 | 155 | 91 | 97 | 99 | 101 | 107 | 98 | 157
|
|
EXPORTS | 1 | 6 | 13
|
|
IMPORTS | 1 | 6 | 11
|
|
EQ | 15 |
|
|
EXP42_.EXP = !AS & autoconfig & !UDS & !A<5> & !A<4> & !A<3> &
|
|
!A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & !A<1> & !A<6> &
|
|
A<4> & A<3>
|
|
# !AS & autoconfig & !UDS & !A<5> & !A<6> & A<4> &
|
|
A<3> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & !A<1> & !A<6> &
|
|
A<4> & A<3>
|
|
# !AS & autoconfig & !LDS & !A<5> & !A<6> & A<4> &
|
|
A<3> & A<2>
|
|
;Imported pterms FB7_12
|
|
# !AS & AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & !A<1> & !A<6> & A<4> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & A<1> & !A<6> & !A<3> & !A<2>
|
|
|
|
MACROCELL | 6 | 14 | EXP43_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 6 | 13
|
|
INPUTS | 12 | AS | AUTO_CONFIG_DONE<1> | autoconfig | LDS | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | AUTO_CONFIG_DONE<0> | EXP44_.EXP
|
|
INPUTMC | 4 | 12 | 12 | 5 | 14 | 11 | 16 | 6 | 15
|
|
INPUTP | 8 | 152 | 157 | 91 | 107 | 98 | 97 | 99 | 101
|
|
EXPORTS | 1 | 6 | 13
|
|
IMPORTS | 1 | 6 | 15
|
|
EQ | 21 |
|
|
EXP43_.EXP = !AS & AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & A<1> & !A<6> & !A<4> & !A<3>
|
|
# !AS & AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & !A<1> & !A<6> & A<4> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<0> & autoconfig & !LDS &
|
|
!A<5> & A<1> & !A<6> & !A<4> & !A<3>
|
|
# !AS & autoconfig & !LDS & A<5> & !A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>
|
|
;Imported pterms FB7_16
|
|
# !AS & AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & A<1> & !A<6> & !A<4> & !A<3>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & A<1> & !A<6> & !A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<0> & autoconfig & !UDS &
|
|
!A<5> & A<1> & !A<6> & !A<4> & !A<3>
|
|
# !AS & autoconfig & !UDS & A<5> & !A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>
|
|
|
|
MACROCELL | 6 | 15 | EXP44_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 6 | 14
|
|
INPUTS | 11 | AS | AUTO_CONFIG_DONE<1> | autoconfig | UDS | A<5> | A<1> | A<6> | A<4> | A<3> | A<2> | AUTO_CONFIG_DONE<0>
|
|
INPUTMC | 3 | 12 | 12 | 5 | 14 | 11 | 16
|
|
INPUTP | 8 | 152 | 155 | 91 | 107 | 98 | 97 | 99 | 101
|
|
EXPORTS | 1 | 6 | 14
|
|
EQ | 10 |
|
|
EXP44_.EXP = !AS & AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & A<1> & !A<6> & !A<4> & !A<3>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & A<1> & !A<6> & !A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<1> & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<0> & autoconfig & !UDS &
|
|
!A<5> & A<1> & !A<6> & !A<4> & !A<3>
|
|
# !AS & autoconfig & !UDS & A<5> & !A<1> & !A<6> &
|
|
!A<4> & !A<3> & A<2>
|
|
|
|
MACROCELL | 6 | 17 | EXP45_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 6 | 0
|
|
INPUTS | 12 | Dout1<3> | UDS | LDS | AS | AUTO_CONFIG_DONE<1> | autoconfig | A<5> | A<1> | A<6> | A<3> | A<4> | A<2>
|
|
INPUTMC | 3 | 6 | 0 | 12 | 12 | 5 | 14
|
|
INPUTP | 9 | 155 | 157 | 152 | 91 | 107 | 98 | 99 | 97 | 101
|
|
EXPORTS | 1 | 6 | 0
|
|
EQ | 9 |
|
|
EXP45_.EXP = !Dout1<3> & UDS & LDS
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & A<1> & !A<6> & !A<3>
|
|
# !AS & autoconfig & !UDS & !A<5> & A<1> & !A<6> &
|
|
A<4> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & A<1> & !A<6> &
|
|
A<4> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & A<6> & !A<4> &
|
|
!A<3> & !A<2>
|
|
|
|
MACROCELL | 7 | 0 | EXP46_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 7 | 1
|
|
INPUTS | 10 | D<12>.PIN | lan_adr | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | UDS | AS | RW | LDS | D<4>.PIN | CP_CS
|
|
INPUTMC | 4 | 5 | 16 | 11 | 6 | 11 | 5 | 4 | 1
|
|
INPUTP | 6 | 78 | 155 | 152 | 158 | 157 | 38
|
|
EXPORTS | 1 | 7 | 1
|
|
EQ | 6 |
|
|
EXP46_.EXP = D<12>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<12>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<4>.PIN & !CP_CS
|
|
|
|
MACROCELL | 7 | 3 | EXP47_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 7 | 2
|
|
INPUTS | 10 | D<14>.PIN | lan_adr | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | UDS | AS | RW | LDS | D<6>.PIN | CP_CS
|
|
INPUTMC | 4 | 5 | 16 | 11 | 6 | 11 | 5 | 4 | 1
|
|
INPUTP | 6 | 81 | 155 | 152 | 158 | 157 | 26
|
|
EXPORTS | 1 | 7 | 2
|
|
EQ | 6 |
|
|
EXP47_.EXP = D<14>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<14>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<6>.PIN & !CP_CS
|
|
|
|
MACROCELL | 8 | 14 | EXP48_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 8 | 15
|
|
INPUTS | 12 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE<0> | autoconfig | UDS | A<6> | A<4> | A<3> | A<2> | LDS | A<5> | A<1>
|
|
INPUTMC | 3 | 12 | 12 | 11 | 16 | 5 | 14
|
|
INPUTP | 9 | 152 | 155 | 98 | 97 | 99 | 101 | 157 | 91 | 107
|
|
EXPORTS | 1 | 8 | 15
|
|
EQ | 10 |
|
|
EXP48_.EXP = !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !UDS & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !LDS & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & !A<1> & !A<6> & !A<3> & A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !UDS & A<5> & A<1> & !A<6> & !A<4> & A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !LDS & A<5> & A<1> & !A<6> & !A<4> & A<2>
|
|
|
|
MACROCELL | 8 | 15 | EXP49_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 8 | 16
|
|
INPUTS | 12 | Dout1<0> | UDS | LDS | AS | autoconfig | A<5> | A<6> | A<4> | A<3> | A<2> | A<1> | EXP48_.EXP
|
|
INPUTMC | 3 | 8 | 16 | 5 | 14 | 8 | 14
|
|
INPUTP | 9 | 155 | 157 | 152 | 91 | 98 | 97 | 99 | 101 | 107
|
|
EXPORTS | 1 | 8 | 16
|
|
IMPORTS | 1 | 8 | 14
|
|
EQ | 20 |
|
|
EXP49_.EXP = !Dout1<0> & UDS & LDS
|
|
# !AS & autoconfig & !LDS & A<5> & !A<6> & !A<4> &
|
|
!A<3> & A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & A<1> & !A<6> &
|
|
A<4> & A<3>
|
|
# !AS & autoconfig & !LDS & !A<5> & A<6> & !A<4> &
|
|
!A<3> & !A<2>
|
|
# !AS & autoconfig & !LDS & !A<5> & !A<6> & A<4> &
|
|
A<3> & !A<2>
|
|
;Imported pterms FB9_15
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !UDS & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !LDS & !A<6> & !A<4> & !A<3> & A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !UDS &
|
|
!A<5> & !A<1> & !A<6> & !A<3> & A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !UDS & A<5> & A<1> & !A<6> & !A<4> & A<2>
|
|
# !AS & AUTO_CONFIG_DONE<1> & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !LDS & A<5> & A<1> & !A<6> & !A<4> & A<2>
|
|
|
|
MACROCELL | 8 | 17 | EXP50_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 8 | 16
|
|
INPUTS | 11 | AS | autoconfig | UDS | A<5> | A<6> | A<4> | A<3> | A<2> | A<1> | AUTO_CONFIG_DONE<1> | LDS
|
|
INPUTMC | 2 | 5 | 14 | 12 | 12
|
|
INPUTP | 9 | 152 | 155 | 91 | 98 | 97 | 99 | 101 | 107 | 157
|
|
EXPORTS | 1 | 8 | 16
|
|
EQ | 10 |
|
|
EXP50_.EXP = !AS & autoconfig & !UDS & A<5> & !A<6> & !A<4> &
|
|
!A<3> & A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & A<1> & !A<6> &
|
|
A<4> & A<3>
|
|
# !AS & autoconfig & !UDS & !A<5> & A<6> & !A<4> &
|
|
!A<3> & !A<2>
|
|
# !AS & autoconfig & !UDS & !A<5> & !A<6> & A<4> &
|
|
A<3> & !A<2>
|
|
# !AS & !AUTO_CONFIG_DONE<1> & autoconfig & !LDS &
|
|
!A<5> & !A<1> & !A<6> & !A<3> & A<2>
|
|
|
|
MACROCELL | 9 | 14 | EXP51_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 9 | 13
|
|
INPUTS | 9 | LAN_RST_SM_FSM_FFd3 | LAN_RST_SM_FSM_FFd1 | AS | D<8>.PIN | LAN_RST_SM_FSM_FFd2 | RW | LDS | CP_CS | LAN_INT_ENABLE.EXP
|
|
INPUTMC | 5 | 11 | 5 | 11 | 8 | 11 | 6 | 4 | 1 | 9 | 15
|
|
INPUTP | 4 | 152 | 32 | 158 | 157
|
|
EXPORTS | 1 | 9 | 13
|
|
IMPORTS | 1 | 9 | 15
|
|
EQ | 16 |
|
|
EXP51_.EXP = LAN_RST_SM_FSM_FFd3 & !LAN_RST_SM_FSM_FFd1
|
|
# AS & !D<8>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !D<8>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !D<8>.PIN & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !D<8>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
;Imported pterms FB10_16
|
|
# !D<8>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !D<8>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & !D<0>.PIN & !CP_CS
|
|
|
|
MACROCELL | 9 | 17 | EXP52_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 9 | 16
|
|
INPUTS | 9 | LAN_RST_SM_FSM_FFd3 | LAN_RST_SM_FSM_FFd1 | AS | D<10>.PIN | LAN_RST_SM_FSM_FFd2 | RW | LDS | CP_CS | LAN_WRL_S.EXP
|
|
INPUTMC | 5 | 11 | 5 | 11 | 8 | 11 | 6 | 4 | 1 | 9 | 0
|
|
INPUTP | 4 | 152 | 74 | 158 | 157
|
|
EXPORTS | 1 | 9 | 16
|
|
IMPORTS | 1 | 9 | 0
|
|
EQ | 16 |
|
|
EXP52_.EXP = LAN_RST_SM_FSM_FFd3 & !LAN_RST_SM_FSM_FFd1
|
|
# AS & D<10>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<10>.PIN & RW & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<10>.PIN & LDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<10>.PIN & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3 & CP_CS
|
|
;Imported pterms FB10_1
|
|
# D<10>.PIN & lan_adr & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# D<10>.PIN & !UDS & !LAN_RST_SM_FSM_FFd2 &
|
|
!LAN_RST_SM_FSM_FFd3
|
|
# !AS & !lan_adr & !RW & UDS & !LDS &
|
|
!LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3 & D<2>.PIN & !CP_CS
|
|
|
|
MACROCELL | 11 | 0 | EXP53_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 11 | 17
|
|
INPUTS | 8 | LAN_INT_ENABLE | D<14>.PIN | LAN_INT | lan_adr | A<15> | RW | UDS | LDS
|
|
INPUTMC | 2 | 9 | 15 | 5 | 16
|
|
INPUTP | 6 | 81 | 201 | 139 | 158 | 155 | 157
|
|
EXPORTS | 1 | 11 | 17
|
|
EQ | 4 |
|
|
EXP53_.EXP = LAN_INT_ENABLE & !D<14>.PIN & !LAN_INT & lan_adr &
|
|
A<15> & !RW & !UDS
|
|
# LAN_INT_ENABLE & !D<14>.PIN & !LAN_INT & lan_adr &
|
|
A<15> & !RW & !LDS
|
|
|
|
MACROCELL | 12 | 0 | EXP54_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 12 | 17
|
|
INPUTS | 13 | AS | AUTO_CONFIG_DONE<1> | AUTO_CONFIG_DONE_CYCLE<0> | autoconfig | RW | UDS | DS_D | A<5> | A<1> | A<6> | A<4> | A<3> | A<2>
|
|
INPUTMC | 4 | 12 | 12 | 1 | 17 | 5 | 14 | 1 | 15
|
|
INPUTP | 9 | 152 | 158 | 155 | 91 | 107 | 98 | 97 | 99 | 101
|
|
EXPORTS | 1 | 12 | 17
|
|
EQ | 6 |
|
|
EXP54_.EXP = !AS & !AUTO_CONFIG_DONE<1> &
|
|
AUTO_CONFIG_DONE_CYCLE<0> & autoconfig & !RW & !UDS & DS_D & !A<5> & !A<1> &
|
|
A<6> & !A<4> & A<3>
|
|
# !AS & AUTO_CONFIG_DONE_CYCLE<0> & autoconfig &
|
|
!RW & !UDS & DS_D & !A<5> & !A<1> & A<6> & !A<4> &
|
|
A<3> & A<2>
|
|
|
|
MACROCELL | 14 | 1 | EXP55_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 14 | 0
|
|
INPUTS | 6 | IDE_BASEADR<4> | A<20> | IDE_BASEADR<5> | A<21> | IDE_BASEADR<7> | A<23>
|
|
INPUTMC | 3 | 13 | 15 | 10 | 14 | 13 | 11
|
|
INPUTP | 3 | 167 | 163 | 161
|
|
EXPORTS | 1 | 14 | 0
|
|
EQ | 5 |
|
|
EXP55_.EXP = IDE_BASEADR<4> & !A<20>
|
|
# IDE_BASEADR<5> & !A<21>
|
|
# !IDE_BASEADR<5> & A<21>
|
|
# IDE_BASEADR<7> & !A<23>
|
|
# !IDE_BASEADR<7> & A<23>
|
|
|
|
MACROCELL | 14 | 17 | EXP56_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 14 | 0
|
|
INPUTS | 7 | IDE_BASEADR<0> | A<16> | IDE_BASEADR<1> | A<17> | IDE_BASEADR<6> | A<22> | ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST.EXP
|
|
INPUTMC | 4 | 3 | 15 | 3 | 14 | 13 | 12 | 14 | 16
|
|
INPUTP | 3 | 175 | 172 | 162
|
|
EXPORTS | 1 | 14 | 0
|
|
IMPORTS | 1 | 14 | 16
|
|
EQ | 7 |
|
|
EXP56_.EXP = IDE_BASEADR<0> & !A<16>
|
|
# !IDE_BASEADR<0> & A<16>
|
|
# !IDE_BASEADR<1> & A<17>
|
|
# IDE_BASEADR<6> & !A<22>
|
|
# !IDE_BASEADR<6> & A<22>
|
|
;Imported pterms FB15_17
|
|
# !IDE_BASEADR<4> & A<20>
|
|
|
|
PIN | AS | 64 | 0 | N/A | 152 | 116 | 12 | 12 | 11 | 16 | 1 | 17 | 12 | 17 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 16 | 6 | 13 | 6 | 8 | 6 | 0 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 9 | 15 | 11 | 9 | 11 | 11 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 1 | 10 | 11 | 9 | 4 | 9 | 9 | 4 | 7 | 9 | 11 | 9 | 10 | 9 | 5 | 5 | 16 | 5 | 14 | 2 | 17 | 11 | 15 | 12 | 11 | 12 | 10 | 12 | 9 | 11 | 14 | 11 | 13 | 11 | 3 | 12 | 1 | 10 | 16 | 0 | 16 | 2 | 1 | 7 | 4 | 12 | 13 | 4 | 4 | 7 | 9 | 13 | 2 | 14 | 11 | 4 | 1 | 13 | 13 | 9 | 12 | 9 | 8 | 4 | 8 | 4 | 15 | 6 | 1 | 6 | 3 | 6 | 5 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 10 | 6 | 12 | 6 | 14 | 6 | 15 | 6 | 17 | 7 | 0 | 7 | 3 | 8 | 14 | 8 | 15 | 8 | 17 | 9 | 0 | 9 | 3 | 9 | 14 | 9 | 17 | 10 | 10 | 11 | 5 | 11 | 6 | 11 | 10 | 11 | 12 | 12 | 0
|
|
PIN | RESET | 65600 | 0 | N/A | 263 | 52 | 1 | 15 | 11 | 6 | 11 | 5 | 11 | 8 | 11 | 2 | 12 | 8 | 7 | 7 | 7 | 4 | 12 | 13 | 7 | 9 | 11 | 13 | 12 | 12 | 11 | 16 | 1 | 17 | 12 | 17 | 9 | 15 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 16 | 6 | 13 | 6 | 8 | 6 | 0 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 11 | 17 | 11 | 15 | 11 | 10 | 12 | 11 | 12 | 10 | 12 | 9 | 11 | 14 | 11 | 3
|
|
PIN | A<4> | 64 | 0 | N/A | 97 | 49 | 1 | 17 | 12 | 17 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 16 | 6 | 13 | 6 | 8 | 1 | 16 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 12 | 11 | 12 | 10 | 12 | 9 | 1 | 1 | 3 | 7 | 6 | 1 | 6 | 2 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 11 | 6 | 12 | 6 | 14 | 6 | 15 | 6 | 17 | 8 | 14 | 8 | 15 | 8 | 17 | 12 | 0
|
|
PIN | A<5> | 64 | 0 | N/A | 91 | 50 | 1 | 17 | 12 | 17 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 16 | 6 | 13 | 6 | 8 | 6 | 0 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 12 | 11 | 12 | 10 | 12 | 9 | 1 | 1 | 3 | 13 | 1 | 16 | 6 | 1 | 6 | 2 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 11 | 6 | 12 | 6 | 14 | 6 | 15 | 6 | 17 | 8 | 14 | 8 | 15 | 8 | 17 | 12 | 0
|
|
PIN | RW | 64 | 0 | N/A | 158 | 89 | 1 | 17 | 12 | 17 | 9 | 15 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 11 | 17 | 9 | 14 | 11 | 8 | 11 | 10 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 1 | 10 | 11 | 9 | 4 | 9 | 9 | 4 | 7 | 9 | 11 | 9 | 10 | 9 | 12 | 11 | 15 | 12 | 11 | 12 | 10 | 12 | 9 | 11 | 14 | 11 | 13 | 11 | 3 | 9 | 6 | 9 | 7 | 9 | 5 | 7 | 3 | 9 | 0 | 9 | 8 | 9 | 3 | 4 | 8 | 4 | 15 | 6 | 3 | 6 | 5 | 6 | 10 | 7 | 0 | 9 | 13 | 9 | 16 | 9 | 17 | 10 | 10 | 11 | 0 | 11 | 5 | 11 | 6 | 11 | 12 | 12 | 0
|
|
PIN | A<1> | 64 | 0 | N/A | 107 | 48 | 1 | 17 | 12 | 17 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 16 | 6 | 12 | 6 | 8 | 6 | 0 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 12 | 11 | 12 | 10 | 12 | 9 | 3 | 5 | 1 | 16 | 6 | 1 | 6 | 2 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 11 | 6 | 14 | 6 | 15 | 6 | 17 | 8 | 14 | 8 | 15 | 8 | 17 | 12 | 0
|
|
PIN | A<3> | 64 | 0 | N/A | 99 | 50 | 1 | 17 | 12 | 17 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 16 | 6 | 13 | 6 | 8 | 6 | 0 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 12 | 11 | 12 | 10 | 12 | 9 | 3 | 11 | 3 | 7 | 1 | 16 | 6 | 1 | 6 | 2 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 11 | 6 | 12 | 6 | 14 | 6 | 15 | 6 | 17 | 8 | 14 | 8 | 15 | 8 | 17 | 12 | 0
|
|
PIN | A<6> | 64 | 0 | N/A | 98 | 47 | 1 | 17 | 12 | 17 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 16 | 6 | 12 | 6 | 7 | 6 | 0 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 12 | 11 | 12 | 10 | 12 | 9 | 3 | 13 | 1 | 16 | 6 | 1 | 6 | 2 | 6 | 6 | 6 | 9 | 6 | 11 | 6 | 14 | 6 | 15 | 6 | 17 | 8 | 14 | 8 | 15 | 8 | 17 | 12 | 0
|
|
PIN | LDS | 64 | 0 | N/A | 157 | 79 | 1 | 17 | 12 | 17 | 9 | 15 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 16 | 6 | 13 | 6 | 8 | 6 | 0 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 11 | 17 | 9 | 14 | 11 | 8 | 11 | 10 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 1 | 10 | 11 | 9 | 4 | 9 | 8 | 4 | 7 | 9 | 11 | 9 | 10 | 9 | 12 | 1 | 15 | 12 | 11 | 12 | 10 | 12 | 9 | 9 | 6 | 9 | 7 | 9 | 5 | 9 | 0 | 9 | 3 | 4 | 6 | 6 | 1 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 11 | 6 | 12 | 6 | 14 | 6 | 17 | 7 | 0 | 7 | 3 | 8 | 14 | 8 | 15 | 8 | 17 | 9 | 13 | 9 | 16 | 9 | 17 | 10 | 10 | 11 | 0 | 11 | 5 | 11 | 6 | 11 | 12
|
|
PIN | A<2> | 64 | 0 | N/A | 101 | 49 | 1 | 17 | 12 | 17 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 15 | 6 | 13 | 6 | 8 | 6 | 0 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 12 | 11 | 12 | 10 | 12 | 9 | 3 | 4 | 3 | 11 | 1 | 16 | 6 | 1 | 6 | 2 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 11 | 6 | 12 | 6 | 14 | 6 | 15 | 6 | 17 | 8 | 14 | 8 | 17 | 12 | 0
|
|
PIN | UDS | 64 | 0 | N/A | 155 | 64 | 1 | 17 | 12 | 17 | 9 | 13 | 3 | 17 | 3 | 16 | 6 | 16 | 0 | 17 | 7 | 17 | 10 | 17 | 13 | 17 | 13 | 16 | 8 | 16 | 6 | 13 | 6 | 8 | 6 | 0 | 3 | 15 | 3 | 14 | 10 | 15 | 0 | 15 | 13 | 15 | 10 | 14 | 13 | 12 | 13 | 11 | 3 | 12 | 3 | 10 | 10 | 12 | 12 | 16 | 13 | 9 | 12 | 15 | 13 | 8 | 13 | 7 | 11 | 17 | 9 | 15 | 11 | 5 | 11 | 10 | 7 | 0 | 11 | 6 | 6 | 17 | 11 | 3 | 8 | 15 | 1 | 15 | 12 | 11 | 12 | 10 | 12 | 9 | 9 | 6 | 9 | 7 | 9 | 4 | 9 | 0 | 8 | 17 | 1 | 16 | 6 | 1 | 6 | 2 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 11 | 6 | 12 | 6 | 15 | 7 | 3 | 8 | 14 | 9 | 16 | 11 | 0 | 11 | 12 | 12 | 0
|
|
PIN | A<15> | 64 | 0 | N/A | 139 | 8 | 9 | 15 | 11 | 17 | 9 | 5 | 9 | 0 | 9 | 4 | 9 | 6 | 9 | 16 | 11 | 0
|
|
PIN | LAN_INT | 64 | 0 | N/A | 201 | 4 | 11 | 17 | 11 | 10 | 11 | 0 | 11 | 16
|
|
PIN | A<23> | 64 | 0 | N/A | 161 | 11 | 5 | 16 | 5 | 14 | 2 | 17 | 4 | 1 | 5 | 10 | 4 | 3 | 5 | 1 | 2 | 1 | 4 | 0 | 5 | 0 | 14 | 1
|
|
PIN | A<22> | 64 | 0 | N/A | 162 | 10 | 5 | 15 | 5 | 14 | 2 | 16 | 4 | 0 | 5 | 10 | 4 | 3 | 5 | 1 | 2 | 1 | 5 | 0 | 14 | 17
|
|
PIN | A<21> | 64 | 0 | N/A | 163 | 10 | 5 | 15 | 5 | 14 | 2 | 16 | 4 | 0 | 5 | 11 | 4 | 3 | 5 | 1 | 2 | 1 | 5 | 0 | 14 | 1
|
|
PIN | A<20> | 64 | 0 | N/A | 167 | 13 | 5 | 15 | 5 | 14 | 2 | 16 | 2 | 1 | 5 | 11 | 4 | 3 | 5 | 17 | 2 | 0 | 4 | 2 | 5 | 0 | 5 | 1 | 14 | 1 | 14 | 16
|
|
PIN | A<19> | 64 | 0 | N/A | 169 | 10 | 5 | 12 | 5 | 14 | 2 | 1 | 2 | 0 | 5 | 1 | 4 | 3 | 14 | 0 | 4 | 2 | 5 | 0 | 5 | 17
|
|
PIN | A<18> | 64 | 0 | N/A | 171 | 12 | 5 | 13 | 5 | 14 | 2 | 1 | 2 | 0 | 5 | 9 | 4 | 17 | 14 | 0 | 4 | 2 | 4 | 3 | 5 | 0 | 5 | 1 | 5 | 17
|
|
PIN | A<17> | 64 | 0 | N/A | 172 | 11 | 5 | 12 | 5 | 14 | 2 | 15 | 2 | 1 | 5 | 10 | 4 | 17 | 14 | 0 | 4 | 3 | 5 | 0 | 5 | 1 | 14 | 17
|
|
PIN | A<16> | 64 | 0 | N/A | 175 | 8 | 5 | 12 | 5 | 14 | 2 | 1 | 5 | 0 | 5 | 1 | 4 | 17 | 4 | 3 | 14 | 17
|
|
PIN | CFIN | 64 | 0 | N/A | 190 | 5 | 5 | 1 | 5 | 14 | 2 | 1 | 4 | 3 | 5 | 0
|
|
PIN | A<7> | 64 | 0 | N/A | 100 | 1 | 1 | 4
|
|
PIN | A<11> | 64 | 0 | N/A | 114 | 2 | 5 | 5 | 0 | 13
|
|
PIN | A<12> | 64 | 0 | N/A | 115 | 2 | 5 | 7 | 0 | 7
|
|
PIN | A<13> | 64 | 0 | N/A | 123 | 2 | 5 | 4 | 0 | 9
|
|
PIN | A<14> | 64 | 0 | N/A | 125 | 1 | 5 | 2
|
|
PIN | A<8> | 64 | 0 | N/A | 106 | 1 | 1 | 2
|
|
PIN | A<9> | 64 | 0 | N/A | 108 | 2 | 5 | 9 | 0 | 11
|
|
PIN | A<10> | 64 | 0 | N/A | 112 | 2 | 5 | 13 | 0 | 14
|
|
PIN | C3 | 64 | 0 | N/A | 187 | 1 | 2 | 15
|
|
PIN | C1 | 64 | 0 | N/A | 188 | 1 | 2 | 15
|
|
PIN | CLK_EXT | 4096 | 0 | N/A | 57 | 5 | 11 | 6 | 11 | 5 | 11 | 8 | 11 | 2 | 11 | 12
|
|
PIN | BERR | 64 | 0 | N/A | 176 | 1 | 12 | 8
|
|
PIN | CP_IRQ | 64 | 0 | N/A | 59 | 1 | 14 | 16
|
|
PIN | IDE_WAIT | 64 | 0 | N/A | 61 | 1 | 14 | 11
|
|
PIN | AUTOBOOT_OFF | 64 | 0 | N/A | 142 | 1 | 4 | 4
|
|
PIN | A_LAN<0> | 536871040 | 0 | N/A | 7
|
|
PIN | A_LAN<10> | 536871040 | 0 | N/A | 255
|
|
PIN | A_LAN<11> | 536871040 | 0 | N/A | 256
|
|
PIN | A_LAN<12> | 536871040 | 0 | N/A | 254
|
|
PIN | A_LAN<13> | 536871040 | 0 | N/A | 253
|
|
PIN | A_LAN<1> | 536871040 | 0 | N/A | 6
|
|
PIN | A_LAN<2> | 536871040 | 0 | N/A | 12
|
|
PIN | A_LAN<4> | 536871040 | 0 | N/A | 20
|
|
PIN | A_LAN<5> | 536871040 | 0 | N/A | 13
|
|
PIN | A_LAN<7> | 536871040 | 0 | N/A | 21
|
|
PIN | A_LAN<8> | 536871040 | 0 | N/A | 258
|
|
PIN | A_LAN<9> | 536871040 | 0 | N/A | 262
|
|
PIN | A_LAN<6> | 536871040 | 0 | N/A | 22
|
|
PIN | CP_RD | 536871040 | 0 | N/A | 132
|
|
PIN | CP_WE | 536871040 | 0 | N/A | 131
|
|
PIN | IDE_R | 536871040 | 0 | N/A | 46
|
|
PIN | IDE_W | 536871040 | 0 | N/A | 47
|
|
PIN | LAN_CS | 536871040 | 0 | N/A | 240
|
|
PIN | LAN_WRH | 536871040 | 0 | N/A | 237
|
|
PIN | LAN_WRL | 536871040 | 0 | N/A | 145
|
|
PIN | ROM_OE | 536871040 | 0 | N/A | 65
|
|
PIN | A_LAN<3> | 536871040 | 0 | N/A | 8
|
|
PIN | LAN_RD | 536871040 | 0 | N/A | 242
|
|
PIN | CFOUT | 536871040 | 0 | N/A | 191
|
|
PIN | OVR | 536871040 | 0 | N/A | 185
|
|
PIN | INT_OUT | 536871040 | 0 | N/A | 60
|
|
PIN | DTACK | 536871040 | 0 | N/A | 160
|
|
PIN | CP_CS | 536871040 | 0 | N/A | 63
|
|
PIN | IDE_A<0> | 536871040 | 0 | N/A | 43
|
|
PIN | IDE_A<1> | 536871040 | 0 | N/A | 45
|
|
PIN | IDE_A<2> | 536871040 | 0 | N/A | 44
|
|
PIN | IDE_CS<0> | 536871040 | 0 | N/A | 39
|
|
PIN | IDE_CS<1> | 536871040 | 0 | N/A | 41
|
|
PIN | SLAVE | 536871040 | 0 | N/A | 193
|
|
PIN | OWN | 536871040 | 0 | N/A | 195
|
|
PIN | MTACK | 536871040 | 0 | N/A | 174
|
|
PIN | LAN_CFG<4> | 536871040 | 0 | N/A | 199
|
|
PIN | LAN_CFG<3> | 536871040 | 0 | N/A | 24
|
|
PIN | LAN_CFG<2> | 536871040 | 0 | N/A | 251
|
|
PIN | LAN_CFG<1> | 536871040 | 0 | N/A | 23
|
|
PIN | ROM_B<1> | 536871040 | 0 | N/A | 129
|
|
PIN | ROM_B<0> | 536871040 | 0 | N/A | 147
|
|
PIN | DQ<10> | 536870976 | 0 | N/A | 234 | 1 | 4 | 13
|
|
PIN | DQ<11> | 536870976 | 0 | N/A | 207 | 1 | 4 | 14
|
|
PIN | DQ<9> | 536870976 | 0 | N/A | 209 | 1 | 4 | 11
|
|
PIN | D<0> | 536870976 | 0 | N/A | 4 | 3 | 9 | 2 | 9 | 3 | 9 | 15
|
|
PIN | D<10> | 536870976 | 0 | N/A | 74 | 7 | 6 | 16 | 10 | 15 | 10 | 12 | 9 | 0 | 10 | 11 | 9 | 17 | 10 | 10
|
|
PIN | D<11> | 536870976 | 0 | N/A | 77 | 8 | 0 | 17 | 0 | 15 | 12 | 16 | 11 | 9 | 9 | 4 | 9 | 5 | 11 | 8 | 11 | 10
|
|
PIN | D<12> | 536870976 | 0 | N/A | 78 | 7 | 7 | 17 | 13 | 15 | 13 | 9 | 7 | 1 | 9 | 9 | 7 | 0 | 9 | 8
|
|
PIN | D<13> | 536870976 | 0 | N/A | 80 | 7 | 10 | 17 | 10 | 14 | 12 | 15 | 11 | 7 | 4 | 7 | 4 | 6 | 11 | 6
|
|
PIN | D<14> | 536870976 | 0 | N/A | 81 | 8 | 13 | 17 | 13 | 12 | 13 | 8 | 11 | 0 | 7 | 2 | 9 | 11 | 7 | 3 | 9 | 12
|
|
PIN | D<15> | 536870976 | 0 | N/A | 89 | 9 | 9 | 15 | 13 | 16 | 13 | 11 | 13 | 7 | 11 | 4 | 9 | 10 | 9 | 11 | 9 | 16 | 11 | 3
|
|
PIN | D<1> | 536870976 | 0 | N/A | 30 | 3 | 9 | 2 | 9 | 1 | 11 | 12
|
|
PIN | D<2> | 536870976 | 0 | N/A | 71 | 3 | 9 | 0 | 10 | 11 | 10 | 10
|
|
PIN | D<3> | 536870976 | 0 | N/A | 28 | 3 | 9 | 5 | 9 | 4 | 11 | 10
|
|
PIN | D<4> | 536870976 | 0 | N/A | 38 | 2 | 7 | 0 | 9 | 8
|
|
PIN | D<5> | 536870976 | 0 | N/A | 37 | 3 | 11 | 6 | 4 | 7 | 4 | 8
|
|
PIN | D<6> | 536870976 | 0 | N/A | 26 | 3 | 9 | 11 | 7 | 3 | 9 | 12
|
|
PIN | D<7> | 536870976 | 0 | N/A | 29 | 3 | 9 | 11 | 9 | 10 | 11 | 5
|
|
PIN | D<8> | 536870976 | 0 | N/A | 32 | 7 | 3 | 17 | 3 | 15 | 3 | 12 | 9 | 2 | 9 | 3 | 9 | 14 | 9 | 15
|
|
PIN | D<9> | 536870976 | 0 | N/A | 73 | 7 | 3 | 16 | 3 | 14 | 3 | 10 | 11 | 11 | 9 | 1 | 9 | 2 | 11 | 12
|
|
PIN | DQ<0> | 536870976 | 0 | N/A | 217 | 2 | 3 | 1 | 1 | 16
|
|
PIN | DQ<12> | 536870976 | 0 | N/A | 235 | 1 | 4 | 16
|
|
PIN | DQ<13> | 536870976 | 0 | N/A | 204 | 1 | 6 | 3
|
|
PIN | DQ<14> | 536870976 | 0 | N/A | 236 | 1 | 6 | 4
|
|
PIN | DQ<15> | 536870976 | 0 | N/A | 202 | 1 | 6 | 10
|
|
PIN | DQ<1> | 536870976 | 0 | N/A | 216 | 2 | 1 | 14 | 4 | 11
|
|
PIN | DQ<2> | 536870976 | 0 | N/A | 127 | 2 | 4 | 13 | 4 | 9
|
|
PIN | DQ<3> | 536870976 | 0 | N/A | 219 | 2 | 4 | 14 | 1 | 11
|
|
PIN | DQ<4> | 536870976 | 0 | N/A | 225 | 2 | 4 | 15 | 0 | 5
|
|
PIN | DQ<5> | 536870976 | 0 | N/A | 69 | 2 | 0 | 4 | 6 | 3
|
|
PIN | DQ<6> | 536870976 | 0 | N/A | 227 | 2 | 1 | 9 | 6 | 5
|
|
PIN | DQ<7> | 536870976 | 0 | N/A | 226 | 2 | 6 | 10 | 1 | 13
|
|
PIN | DQ<8> | 536870976 | 0 | N/A | 231 | 1 | 1 | 16
|