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Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.rpt
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cpldfit: version P.20131013 Xilinx Inc.
Fitter Report
Design Name: LAN_IDE_CP Date: 3- 8-2022, 12:14PM
Device Used: XC95288XL-10-TQ144
Fitting Status: Successful
************************* Mapped Resource Summary **************************
Macrocells Product Terms Function Block Registers Pins
Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot
194/288 ( 67%) 930 /1440 ( 65%) 515/864 ( 60%) 111/288 ( 39%) 106/117 ( 91%)
** Function Block Resources **
Function Mcells FB Inps Pterms IO
Block Used/Tot Used/Tot Used/Tot Used/Tot
FB1 13/18 43/54 57/90 8/ 8*
FB2 10/18 43/54 84/90 8/10
FB3 9/18 44/54 66/90 4/ 5
FB4 14/18 44/54 83/90 6/ 6*
FB5 8/18 44/54 79/90 7/ 8
FB6 16/18 44/54 69/90 8/ 8*
FB7 7/18 37/54 89/90 4/ 4*
FB8 9/18 43/54 56/90 5/ 5*
FB9 18/18* 2/54 36/90 9/ 9*
FB10 12/18 33/54 64/90 10/10*
FB11 18/18* 5/54 31/90 7/ 7*
FB12 14/18 44/54 68/90 5/ 6
FB13 13/18 44/54 58/90 4/ 6
FB14 15/18 43/54 58/90 7/ 8
FB15 17/18 2/54 32/90 8/ 9
FB16 1/18 0/54 0/90 6/ 8
----- ----- ----- -----
194/288 515/864 930/1440 106/117
* - Resource is exhausted
** Global Control Resources **
Signal 'CLK_EXT' mapped onto global clock net GCK1.
Global output enable net(s) unused.
Signal 'RESET' mapped onto global set/reset net GSR.
** Pin Resources **
Signal Type Required Mapped | Pin Type Used Total
------------------------------------|------------------------------------
Input : 33 33 | I/O : 99 109
Output : 39 39 | GCK/IO : 2 3
Bidirectional : 32 32 | GTS/IO : 4 4
GCK : 1 1 | GSR/IO : 1 1
GTS : 0 0 |
GSR : 1 1 |
---- ----
Total 106 106
** Power Data **
There are 194 macrocells in high performance mode (MCHP).
There are 0 macrocells in low power mode (MCLP).
End of Mapped Resource Summary
************************** Errors and Warnings ***************************
WARNING:Cpld - Unable to retrieve the path to the iSE Project Repository. Will
use the default filename of 'LAN_IDE_CP.ise'.
INFO:Cpld - Inferring BUFG constraint for signal 'CLK_EXT' based upon the LOC
constraint 'P30'. It is recommended that you declare this BUFG explicitedly
in your design. Note that for certain device families the output of a BUFG
constraint can not drive a gated clock, and the BUFG constraint will be
ignored.
WARNING:Cpld:1007 - Removing unused input(s) 'BERR'. The input(s) are unused
after optimization. Please verify functionality via simulation.
WARNING:Cpld:1007 - Removing unused input(s) 'DS0'. The input(s) are unused
after optimization. Please verify functionality via simulation.
WARNING:Cpld:1007 - Removing unused input(s) 'DS1'. The input(s) are unused
after optimization. Please verify functionality via simulation.
WARNING:Cpld:1007 - Removing unused input(s) 'FCS'. The input(s) are unused
after optimization. Please verify functionality via simulation.
WARNING:Cpld:1007 - Removing unused input(s) 'IDE_WAIT'. The input(s) are
unused after optimization. Please verify functionality via simulation.
WARNING:Cpld:1007 - Removing unused input(s) 'MTCR'. The input(s) are unused
after optimization. Please verify functionality via simulation.
WARNING:Cpld:1007 - Removing unused input(s) 'Z3'. The input(s) are unused
after optimization. Please verify functionality via simulation.
INFO:Cpld:994 - Exhaustive fitting is trying pterm limit: 25 and input limit: 54
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB10,
because too many function block product terms are required. Buffering output
signal DQ<8> to allow all signals assigned to this function block to be
placed.
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB10,
because too many function block product terms are required. Buffering output
signal DQ<4> to allow all signals assigned to this function block to be
placed.
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB10,
because too many function block product terms are required. Buffering output
signal DQ<10> to allow all signals assigned to this function block to be
placed.
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB10,
because too many function block product terms are required. Buffering output
signal DQ<7> to allow all signals assigned to this function block to be
placed.
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB10,
because too many function block product terms are required. Buffering output
signal DQ<6> to allow all signals assigned to this function block to be
placed.
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB10,
because too many function block product terms are required. Buffering output
signal DQ<5> to allow all signals assigned to this function block to be
placed.
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB10,
because too many function block product terms are required. Buffering output
signal DQ<3> to allow all signals assigned to this function block to be
placed.
WARNING:Cpld:896 - Unable to map all desired signals into function block, FB12,
because too many function block product terms are required. Buffering output
signal DQ<9> to allow all signals assigned to this function block to be
placed.
************************* Summary of Mapped Logic ************************
** 71 Outputs **
Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init
Name Pts Inps No. Type Use Mode Rate State
D<5> 11 11 FB1_5 20 I/O I/O STD FAST SET
D<4> 11 11 FB1_6 21 I/O I/O STD FAST SET
IDE_CS<0> 1 1 FB1_8 22 I/O O STD FAST
IDE_CS<1> 1 1 FB1_10 23 I/O O STD FAST
IDE_A<0> 1 1 FB1_12 24 I/O O STD FAST
IDE_A<2> 1 1 FB1_14 25 I/O O STD FAST
IDE_A<1> 1 1 FB1_15 26 I/O O STD FAST
IDE_R 1 2 FB1_17 27 I/O O STD FAST
A_LAN<4> 3 11 FB2_2 9 I/O O STD FAST SET
A_LAN<7> 3 11 FB2_3 10 I/O O STD FAST SET
A_LAN<6> 6 11 FB2_5 11 I/O O STD FAST SET
D<6> 11 11 FB2_10 14 I/O I/O STD FAST SET
D<3> 11 11 FB2_12 15 I/O I/O STD FAST SET
D<7> 11 11 FB2_14 16 I/O I/O STD FAST SET
D<1> 11 11 FB2_15 17 I/O I/O STD FAST SET
D<8> 11 11 FB2_17 19 I/O I/O STD FAST SET
IDE_W 1 2 FB3_2 28 I/O O STD FAST
INT2_OUT 1 2 FB3_14 32 GCK/I/O O STD FAST
D<0> 11 11 FB4_2 2 GTS/I/O I/O STD FAST SET
A_LAN<1> 3 10 FB4_5 3 GTS/I/O O STD FAST SET
A_LAN<0> 3 10 FB4_6 4 I/O O STD FAST SET
A_LAN<3> 3 11 FB4_8 5 GTS/I/O O STD FAST SET
A_LAN<2> 3 11 FB4_12 6 GTS/I/O O STD FAST SET
A_LAN<5> 3 11 FB4_14 7 I/O O STD FAST SET
CP_CS 18 18 FB5_2 34 I/O O STD FAST RESET
ROM_OE 2 3 FB5_5 35 I/O O STD FAST
D<2> 11 11 FB5_10 39 I/O I/O STD FAST SET
D<9> 11 11 FB5_12 40 I/O I/O STD FAST SET
D<10> 11 11 FB5_14 41 I/O I/O STD FAST SET
D<11> 11 11 FB5_15 43 I/O I/O STD FAST SET
D<12> 13 12 FB5_17 44 I/O I/O STD FAST SET
INT6_OUT 1 1 FB6_2 135 I/O O STD FAST
A_LAN<12> 3 11 FB6_3 136 I/O O STD FAST SET
A_LAN<13> 3 11 FB6_5 137 I/O O STD FAST SET
A_LAN<10> 3 11 FB6_6 138 I/O O STD FAST SET
A_LAN<11> 3 11 FB6_8 139 I/O O STD FAST SET
A_LAN<8> 3 11 FB6_10 140 I/O O STD FAST SET
A_LAN<9> 3 11 FB6_14 142 I/O O STD FAST SET
D<13> 13 12 FB7_3 45 I/O I/O STD FAST SET
D<14> 13 12 FB7_5 46 I/O I/O STD FAST SET
Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init
Name Pts Inps No. Type Use Mode Rate State
D<15> 13 12 FB7_12 48 I/O I/O STD FAST SET
DQ<12> 11 16 FB8_2 130 I/O I/O STD FAST SET
DQ<14> 11 16 FB8_3 131 I/O I/O STD FAST SET
LAN_WRH 3 4 FB8_5 132 I/O O STD FAST
LAN_CS 2 3 FB8_8 133 I/O O STD FAST
LAN_RD 2 4 FB8_10 134 I/O O STD FAST
DQ<1> 11 16 FB10_2 117 I/O I/O STD FAST SET
DQ<0> 11 16 FB10_3 118 I/O I/O STD FAST SET
DQ<3> 2 2 FB10_5 119 I/O I/O STD FAST
DQ<2> 11 16 FB10_6 120 I/O I/O STD FAST SET
DQ<5> 2 2 FB10_8 121 I/O I/O STD FAST
DQ<4> 2 2 FB10_10 124 I/O I/O STD FAST
DQ<7> 2 2 FB10_11 125 I/O I/O STD FAST
DQ<6> 2 2 FB10_12 126 I/O I/O STD FAST
DQ<8> 2 2 FB10_14 128 I/O I/O STD FAST
DQ<10> 2 2 FB10_17 129 I/O I/O STD FAST
ROM_B<0> 0 0 FB11_12 68 I/O O STD FAST
ROM_B<1> 0 0 FB11_14 69 I/O O STD FAST
CP_WE 1 3 FB11_17 70 I/O O STD FAST
DQ<15> 11 16 FB12_5 112 I/O I/O STD FAST SET
DQ<13> 11 16 FB12_8 113 I/O I/O STD FAST SET
DQ<11> 15 16 FB12_10 115 I/O I/O STD FAST SET
DQ<9> 2 2 FB12_12 116 I/O I/O STD FAST
CP_RD 2 3 FB13_2 71 I/O O STD FAST
LAN_WRL 3 4 FB13_14 76 I/O O STD FAST
OVR 0 0 FB14_3 100 I/O O STD FAST
CFOUT 1 2 FB14_11 105 I/O O STD FAST
SLAVE 2 6 FB14_14 106 I/O O STD FAST
OWN 0 0 FB14_15 107 I/O O STD FAST
DTACK 0 0 FB15_12 85 I/O O STD FAST
MTACK 0 0 FB16_10 96 I/O O STD FAST
** 123 Buried Nodes **
Signal Total Total Loc Pwr Reg Init
Name Pts Inps Mode State
LAN_BASEADR<0> 5 16 FB1_9 STD SET
IDE_BASEADR<0> 5 16 FB1_11 STD SET
CP_BASEADR<1> 5 16 FB1_13 STD SET
CP_BASEADR<0> 5 16 FB1_16 STD SET
AUTO_CONFIG_DONE_CYCLE<0> 9 16 FB1_18 STD SET
D_OUT<13>/D_OUT<13>_TRST__$INT 3 7 FB2_1 STD
DQ<10>_BUFR 14 15 FB2_4 STD SET
Dout1<3> 16 13 FB3_4 STD SET
LAN_IRQ_D0 2 2 FB3_6 STD SET
CP_WE_QUIRK 2 2 FB3_7 STD SET
ide 18 18 FB3_13 STD SET
autoconfig 3 12 FB3_15 STD SET
AUTO_CONFIG_DONE<1> 3 3 FB3_16 STD SET
Dout1<0> 20 14 FB3_18 STD SET
DQ<8>_BUFR 14 15 FB4_3 STD SET
CP_WE_S 3 5 FB4_7 STD SET
DQ<3>_BUFR 10 15 FB4_9 STD SET
DQ<5>_BUFR 10 15 FB4_10 STD SET
D_IN<10>/D_IN<10>_TRST__$INT 3 6 FB4_13 STD
LAN_WR_RST 2 4 FB4_15 STD SET
LAN_RST_SM_FSM_FFd8 1 2 FB4_16 STD SET
DQ<4>_BUFR 14 15 FB4_17 STD SET
AS_D 2 3 FB5_1 STD SET
SET_FREQUENCY 1 3 FB6_4 STD SET
LAN_RST_SM_FSM_FFd6 2 3 FB6_7 STD RESET
LAN_RST_SM_FSM_FFd5 2 3 FB6_9 STD RESET
LAN_RST_SM_FSM_FFd4 2 3 FB6_11 STD RESET
lan_adr 18 18 FB6_13 STD SET
LAN_RST_SM_FSM_FFd3 2 3 FB6_15 STD RESET
LAN_RST_SM_FSM_FFd1 2 4 FB6_16 STD RESET
LAN_RST_SM_FSM_FFd2 2 3 FB6_17 STD RESET
lan_adr_sw 19 20 FB6_18 STD SET
Dout1<2> 20 14 FB7_1 STD SET
AUTO_CONFIG_DONE<0> 3 3 FB7_8 STD SET
CP_BASEADR<2> 5 16 FB7_9 STD SET
Dout1<1> 22 14 FB7_14 STD SET
DQ<6>_BUFR 10 15 FB8_1 STD SET
IDE_ENABLE 2 4 FB8_14 STD SET
CP_BASEADR<4> 5 16 FB8_15 STD SET
DQ<7>_BUFR 10 15 FB8_17 STD SET
Signal Total Total Loc Pwr Reg Init
Name Pts Inps Mode State
LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF 2 2 FB9_1 STD
LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF 2 2 FB9_2 STD
LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF 2 2 FB9_3 STD
IDE_W_S/IDE_W_S_CLKF 2 2 FB9_4 STD
IDE_R_S/IDE_R_S_CLKF 2 2 FB9_5 STD
IDE_ENABLE/IDE_ENABLE_CLKF 2 2 FB9_6 STD
IDE_BASEADR<7>/IDE_BASEADR<7>_CLKF 2 2 FB9_7 STD
IDE_BASEADR<6>/IDE_BASEADR<6>_CLKF 2 2 FB9_8 STD
IDE_BASEADR<5>/IDE_BASEADR<5>_CLKF 2 2 FB9_9 STD
IDE_BASEADR<4>/IDE_BASEADR<4>_CLKF 2 2 FB9_10 STD
IDE_BASEADR<3>/IDE_BASEADR<3>_CLKF 2 2 FB9_11 STD
IDE_BASEADR<2>/IDE_BASEADR<2>_CLKF 2 2 FB9_12 STD
IDE_BASEADR<1>/IDE_BASEADR<1>_CLKF 2 2 FB9_13 STD
IDE_BASEADR<0>/IDE_BASEADR<0>_CLKF 2 2 FB9_14 STD
Dout1<3>/Dout1<3>_CLKF 2 2 FB9_15 STD
Dout1<2>/Dout1<2>_CLKF 2 2 FB9_16 STD
Dout1<1>/Dout1<1>_CLKF 2 2 FB9_17 STD
Dout1<0>/Dout1<0>_CLKF 2 2 FB9_18 STD
DQ<9>_BUFR 14 15 FB10_15 STD SET
LAN_RD_S 3 6 FB10_18 STD SET
CP_WE_S/CP_WE_S_CLKF 2 2 FB11_1 STD
CP_WE_QUIRK/CP_WE_QUIRK_CLKF 2 2 FB11_2 STD
CP_RD_S/CP_RD_S_CLKF 2 2 FB11_3 STD
CP_BASEADR<7>/CP_BASEADR<7>_CLKF 2 2 FB11_4 STD
CP_BASEADR<6>/CP_BASEADR<6>_CLKF 2 2 FB11_5 STD
CP_BASEADR<5>/CP_BASEADR<5>_CLKF 2 2 FB11_6 STD
CP_BASEADR<4>/CP_BASEADR<4>_CLKF 2 2 FB11_7 STD
CP_BASEADR<3>/CP_BASEADR<3>_CLKF 2 2 FB11_8 STD
CP_BASEADR<2>/CP_BASEADR<2>_CLKF 2 2 FB11_9 STD
CP_BASEADR<1>/CP_BASEADR<1>_CLKF 2 2 FB11_10 STD
CP_BASEADR<0>/CP_BASEADR<0>_CLKF 2 2 FB11_11 STD
AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF 2 2 FB11_13 STD
AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF 2 2 FB11_15 STD
AUTO_CONFIG_DONE<1>/AUTO_CONFIG_DONE<1>_CLKF 2 2 FB11_16 STD
AUTO_CONFIG_DONE<0>/AUTO_CONFIG_DONE<0>_CLKF 2 2 FB11_18 STD
ROM_OE_S 2 5 FB12_2 STD SET
LAN_WRL_S 2 5 FB12_3 STD SET
LAN_WRH_S 2 5 FB12_6 STD SET
LAN_RST_SM_FSM_FFd7 2 3 FB12_11 STD RESET
LAN_CS_RST 2 4 FB12_13 STD SET
Signal Total Total Loc Pwr Reg Init
Name Pts Inps Mode State
IDE_R_S 2 5 FB12_14 STD SET
CP_RD_S 2 4 FB12_15 STD SET
LAN_INT_ENABLE 5 8 FB12_16 STD SET
LAN_IRQ_OUT 8 11 FB12_17 STD SET
IDE_W_S 2 4 FB12_18 STD SET
SHUT_UP<2> 3 15 FB13_7 STD SET
SHUT_UP<1> 3 15 FB13_8 STD SET
SHUT_UP<0> 3 15 FB13_9 STD SET
LAN_BASEADR<7> 5 16 FB13_10 STD SET
LAN_BASEADR<4> 5 16 FB13_11 STD SET
LAN_BASEADR<2> 5 16 FB13_12 STD SET
LAN_BASEADR<1> 5 16 FB13_13 STD SET
IDE_BASEADR<4> 5 16 FB13_15 STD SET
IDE_BASEADR<2> 5 16 FB13_16 STD SET
IDE_BASEADR<1> 5 16 FB13_17 STD SET
AUTO_CONFIG_DONE_CYCLE<1> 9 15 FB13_18 STD SET
LAN_BASEADR<6> 5 16 FB14_5 STD SET
LAN_BASEADR<5> 5 16 FB14_6 STD SET
LAN_BASEADR<3> 5 16 FB14_7 STD SET
IDE_BASEADR<7> 5 16 FB14_8 STD SET
IDE_BASEADR<6> 5 16 FB14_9 STD SET
IDE_BASEADR<5> 5 16 FB14_10 STD SET
IDE_BASEADR<3> 5 16 FB14_12 STD SET
CP_BASEADR<7> 5 16 FB14_13 STD SET
CP_BASEADR<6> 5 16 FB14_16 STD SET
CP_BASEADR<5> 5 16 FB14_17 STD SET
CP_BASEADR<3> 5 16 FB14_18 STD SET
lan_adr_sw/lan_adr_sw_CLKF 2 2 FB15_2 STD
SHUT_UP<2>/SHUT_UP<2>_CLKF 2 2 FB15_3 STD
SHUT_UP<1>/SHUT_UP<1>_CLKF 2 2 FB15_4 STD
SHUT_UP<0>/SHUT_UP<0>_CLKF 2 2 FB15_5 STD
ROM_OE_S/ROM_OE_S_CLKF 2 2 FB15_6 STD
LAN_WRL_S/LAN_WRL_S_CLKF 2 2 FB15_7 STD
LAN_WRH_S/LAN_WRH_S_CLKF 2 2 FB15_8 STD
LAN_RD_S/LAN_RD_S_CLKF 2 2 FB15_9 STD
LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF 2 2 FB15_10 STD
LAN_IRQ_D0/LAN_IRQ_D0_CLKF 2 2 FB15_11 STD
LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF 2 2 FB15_13 STD
LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF 2 2 FB15_14 STD
LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF 2 2 FB15_15 STD
Signal Total Total Loc Pwr Reg Init
Name Pts Inps Mode State
LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF 2 2 FB15_16 STD
LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF 2 2 FB15_17 STD
LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF 2 2 FB15_18 STD
** 35 Inputs **
Signal Loc Pin Pin Pin
Name No. Type Use
CLK_EXT FB3_10 30 GCK/I/O GCK
CP_IRQ FB3_12 31 I/O I
RESET FB6_15 143 GSR/I/O GSR/I
A<5> FB7_15 49 I/O I
A<4> FB9_2 50 I/O I
A<6> FB9_3 51 I/O I
A<3> FB9_5 52 I/O I
A<7> FB9_6 53 I/O I
A<2> FB9_8 54 I/O I
A<8> FB9_11 56 I/O I
A<1> FB9_12 57 I/O I
A<9> FB9_14 58 I/O I
A<10> FB9_17 59 I/O I
A<11> FB11_3 60 I/O I
A<12> FB11_5 61 I/O I
A<13> FB11_10 64 I/O I
A<14> FB11_11 66 I/O I
LAN_INT FB12_3 111 I/O I
A<15> FB13_8 74 I/O I
AUTOBOOT_OFF FB13_11 75 I/O I
C3 FB14_6 102 I/O I
C1 FB14_8 103 I/O I
CFIN FB14_10 104 I/O I
AS FB15_3 80 I/O I
UDS FB15_8 81 I/O I
LDS FB15_10 82 I/O I
RW FB15_11 83 I/O I
A<23> FB15_14 86 I/O I
A<22> FB15_15 87 I/O I
A<21> FB15_17 88 I/O I
A<20> FB16_2 91 I/O I
A<19> FB16_3 92 I/O I
A<18> FB16_6 94 I/O I
A<17> FB16_8 95 I/O I
A<16> FB16_11 97 I/O I
Legend:
Pin No. - ~ - User Assigned
************************** Function Block Details ************************
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X - Signal used as input to the macrocell logic.
Pin No. - ~ - User Assigned
*********************************** FB1 ***********************************
Number of function block inputs used/remaining: 43/11
Number of signals used by logic mapping into function block: 43
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB1_1 (b)
(unused) 0 0 0 5 FB1_2 (b)
(unused) 0 0 0 5 FB1_3 (b)
(unused) 0 0 \/5 0 FB1_4 (b) (b)
D<5> 11 6<- 0 0 FB1_5 20 I/O I/O
D<4> 11 7<- /\1 0 FB1_6 21 I/O I/O
(unused) 0 0 /\5 0 FB1_7 (b) (b)
IDE_CS<0> 1 0 /\2 2 FB1_8 22 I/O O
LAN_BASEADR<0> 5 0 0 0 FB1_9 (b) (b)
IDE_CS<1> 1 0 0 4 FB1_10 23 I/O O
IDE_BASEADR<0> 5 0 0 0 FB1_11 (b) (b)
IDE_A<0> 1 0 0 4 FB1_12 24 I/O O
CP_BASEADR<1> 5 0 0 0 FB1_13 (b) (b)
IDE_A<2> 1 0 0 4 FB1_14 25 I/O O
IDE_A<1> 1 0 0 4 FB1_15 26 I/O O
CP_BASEADR<0> 5 0 0 0 FB1_16 (b) (b)
IDE_R 1 0 \/4 0 FB1_17 27 I/O O
AUTO_CONFIG_DONE_CYCLE<0>
9 4<- 0 0 FB1_18 (b) (b)
Signals Used by Logic in Function Block
1: AS 16: CP_BASEADR<0>/CP_BASEADR<0>_CLKF 30: LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF
2: AUTOBOOT_OFF 17: CP_BASEADR<1> 31: LDS
3: AUTO_CONFIG_DONE<0> 18: CP_BASEADR<1>/CP_BASEADR<1>_CLKF 32: DQ<5>.PIN
4: AUTO_CONFIG_DONE<1> 19: CP_CS 33: DQ<4>.PIN
5: AUTO_CONFIG_DONE_CYCLE<0> 20: D<4> 34: DQ<13>.PIN
6: AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF 21: D<5> 35: D<9>.PIN
7: A<12> 22: D_OUT<13>/D_OUT<13>_TRST__$INT 36: D<8>.PIN
8: A<13> 23: A<9> 37: DQ<12>.PIN
9: A<1> 24: A<10> 38: RW
10: A<2> 25: A<11> 39: UDS
11: A<3> 26: IDE_BASEADR<0> 40: autoconfig
12: A<4> 27: IDE_BASEADR<0>/IDE_BASEADR<0>_CLKF 41: ide
13: A<5> 28: IDE_R_S 42: lan_adr
14: A<6> 29: LAN_BASEADR<0> 43: lan_adr_sw
15: CP_BASEADR<0>
Signal 1 2 3 4 5 FB
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
D<5> ..................X.XX........XX.X....XXXXX....... 11
D<4> ..................XX.X........X.X...X.XXXXX....... 11
IDE_CS<0> ......X........................................... 1
LAN_BASEADR<0> X.XX....XXXXXX..............XXX....X.XXX.......... 16
IDE_CS<1> .......X.......................................... 1
IDE_BASEADR<0> X.XX....XXXXXX...........XX...X....X.XXX.......... 16
IDE_A<0> ......................X........................... 1
CP_BASEADR<1> X.XX....XXXXXX..XX............X...X..XXX.......... 16
IDE_A<2> ........................X......................... 1
IDE_A<1> .......................X.......................... 1
CP_BASEADR<0> X.XX....XXXXXXXX..............X....X.XXX.......... 16
IDE_R X..........................X...................... 2
AUTO_CONFIG_DONE_CYCLE<0>
XXXXXX..XXXXXX................X......XXX.......... 16
0----+----1----+----2----+----3----+----4----+----5
0 0 0 0 0
*********************************** FB2 ***********************************
Number of function block inputs used/remaining: 43/11
Number of signals used by logic mapping into function block: 43
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
D_OUT<13>/D_OUT<13>_TRST__$INT
3 0 /\2 0 FB2_1 (b) (b)
A_LAN<4> 3 0 \/2 0 FB2_2 9 I/O O
A_LAN<7> 3 2<- \/4 0 FB2_3 10 I/O O
DQ<10>_BUFR 14 9<- 0 0 FB2_4 (b) (b)
A_LAN<6> 6 6<- /\5 0 FB2_5 11 I/O O
(unused) 0 0 /\5 0 FB2_6 12 I/O (b)
(unused) 0 0 /\1 4 FB2_7 (b) (b)
(unused) 0 0 \/3 2 FB2_8 13 I/O (b)
(unused) 0 0 \/5 0 FB2_9 (b) (b)
D<6> 11 8<- \/2 0 FB2_10 14 I/O I/O
(unused) 0 0 \/5 0 FB2_11 (b) (b)
D<3> 11 7<- \/1 0 FB2_12 15 I/O I/O
(unused) 0 0 \/5 0 FB2_13 (b) (b)
D<7> 11 6<- 0 0 FB2_14 16 I/O I/O
D<1> 11 6<- 0 0 FB2_15 17 I/O I/O
(unused) 0 0 /\5 0 FB2_16 (b) (b)
D<8> 11 7<- /\1 0 FB2_17 19 I/O I/O
(unused) 0 0 /\5 0 FB2_18 (b) (b)
Signals Used by Logic in Function Block
1: AS_D 16: D<8> 30: DQ<0>.PIN
2: AS 17: DQ<10> 31: D<10>.PIN
3: A<3> 18: D_OUT<13>/D_OUT<13>_TRST__$INT 32: D<2>.PIN
4: A<5> 19: LAN_RST_SM_FSM_FFd2 33: DQ<11>.PIN
5: A<6> 20: LAN_RST_SM_FSM_FFd3 34: DQ<9>.PIN
6: A<7> 21: LAN_RST_SM_FSM_FFd4 35: DQ<8>.PIN
7: A<8> 22: LAN_RST_SM_FSM_FFd5 36: DQ<7>.PIN
8: A_LAN<4> 23: LAN_RST_SM_FSM_FFd6 37: DQ<6>.PIN
9: A_LAN<6> 24: LAN_RST_SM_FSM_FFd7 38: RW
10: A_LAN<7> 25: LDS 39: UDS
11: CP_CS 26: DQ<15>.PIN 40: autoconfig
12: D<1> 27: DQ<14>.PIN 41: ide
13: D<3> 28: DQ<3>.PIN 42: lan_adr
14: D<6> 29: DQ<1>.PIN 43: lan_adr_sw
15: D<7>
Signal 1 2 3 4 5 FB
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
D_OUT<13>/D_OUT<13>_TRST__$INT
XX........X..........................X.XXX........ 7
A_LAN<4> ..XX...X..X.......XXXXXX.................X........ 11
A_LAN<7> ....X.X..XX.......XXXXXX.................X........ 11
DQ<10>_BUFR ..........X.....X.XXXXXXX.....XX......X.XXX....... 15
A_LAN<6> ...X.X..X.X.......XXXXXX.................X........ 11
D<6> ..........X..X...X......X.X.........X.XXXXX....... 11
D<3> ..........X.X....X......X..X....X.....XXXXX....... 11
D<7> ..........X...X..X......XX.........X..XXXXX....... 11
D<1> ..........XX.....X......X...X....X....XXXXX....... 11
D<8> ..........X....X.X......X....X....X...XXXXX....... 11
0----+----1----+----2----+----3----+----4----+----5
0 0 0 0 0
*********************************** FB3 ***********************************
Number of function block inputs used/remaining: 44/10
Number of signals used by logic mapping into function block: 44
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 /\5 0 FB3_1 (b) (b)
IDE_W 1 0 /\3 1 FB3_2 28 I/O O
(unused) 0 0 \/5 0 FB3_3 (b) (b)
Dout1<3> 16 11<- 0 0 FB3_4 (b) (b)
(unused) 0 0 /\5 0 FB3_5 (b) (b)
LAN_IRQ_D0 2 0 /\1 2 FB3_6 (b) (b)
CP_WE_QUIRK 2 0 0 3 FB3_7 (b) (b)
(unused) 0 0 0 5 FB3_8 (b)
(unused) 0 0 0 5 FB3_9 (b)
(unused) 0 0 0 5 FB3_10 30 GCK/I/O GCK
(unused) 0 0 \/4 1 FB3_11 (b) (b)
(unused) 0 0 \/5 0 FB3_12 31 I/O I
ide 18 13<- 0 0 FB3_13 (b) (b)
INT2_OUT 1 0 /\4 0 FB3_14 32 GCK/I/O O
autoconfig 3 0 0 2 FB3_15 33 I/O (b)
AUTO_CONFIG_DONE<1> 3 0 \/2 0 FB3_16 (b) (b)
(unused) 0 0 \/5 0 FB3_17 (b) (b)
Dout1<0> 20 15<- 0 0 FB3_18 (b) (b)
Signals Used by Logic in Function Block
1: AS 16: A<3> 31: IDE_BASEADR<4>
2: AUTO_CONFIG_DONE<0> 17: A<4> 32: IDE_BASEADR<5>
3: AUTO_CONFIG_DONE<1> 18: A<5> 33: IDE_BASEADR<6>
4: AUTO_CONFIG_DONE<1>/AUTO_CONFIG_DONE<1>_CLKF 19: A<6> 34: IDE_BASEADR<7>
5: AUTO_CONFIG_DONE_CYCLE<1> 20: CFIN 35: IDE_W_S
6: A<16> 21: CP_WE_QUIRK/CP_WE_QUIRK_CLKF 36: LAN_INT_ENABLE
7: A<17> 22: CP_WE_S 37: LAN_INT
8: A<18> 23: Dout1<0> 38: LAN_IRQ_D0/LAN_IRQ_D0_CLKF
9: A<19> 24: Dout1<0>/Dout1<0>_CLKF 39: LAN_IRQ_OUT
10: A<1> 25: Dout1<3> 40: LDS
11: A<20> 26: Dout1<3>/Dout1<3>_CLKF 41: SHUT_UP<2>
12: A<21> 27: IDE_BASEADR<0> 42: UDS
13: A<22> 28: IDE_BASEADR<1> 43: autoconfig
14: A<23> 29: IDE_BASEADR<2> 44: lan_adr_sw/lan_adr_sw_CLKF
15: A<2> 30: IDE_BASEADR<3>
Signal 1 2 3 4 5 FB
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
IDE_W X.................................X............... 2
Dout1<3> X.X......X....XXXXX.....XX.............X.XX....... 13
LAN_IRQ_D0 ....................................XX............ 2
CP_WE_QUIRK ....................XX............................ 2
ide .....XXXX.XXXX............XXXXXXXX......X..X...... 18
INT2_OUT ...................................X..X........... 2
autoconfig .XX..XXXX.XXXX.....X.......................X...... 12
AUTO_CONFIG_DONE<1> X..XX............................................. 3
Dout1<0> XXX......X....XXXXX...XX...............X.XX....... 14
0----+----1----+----2----+----3----+----4----+----5
0 0 0 0 0
*********************************** FB4 ***********************************
Number of function block inputs used/remaining: 44/10
Number of signals used by logic mapping into function block: 44
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 \/5 0 FB4_1 (b) (b)
D<0> 11 6<- 0 0 FB4_2 2 GTS/I/O I/O
DQ<8>_BUFR 14 10<- /\1 0 FB4_3 (b) (b)
(unused) 0 0 /\5 0 FB4_4 (b) (b)
A_LAN<1> 3 3<- /\5 0 FB4_5 3 GTS/I/O O
A_LAN<0> 3 1<- /\3 0 FB4_6 4 I/O O
CP_WE_S 3 0 /\1 1 FB4_7 (b) (b)
A_LAN<3> 3 0 \/2 0 FB4_8 5 GTS/I/O O
DQ<3>_BUFR 10 5<- 0 0 FB4_9 (b) (b)
DQ<5>_BUFR 10 8<- /\3 0 FB4_10 (b) (b)
(unused) 0 0 /\5 0 FB4_11 (b) (b)
A_LAN<2> 3 1<- /\3 0 FB4_12 6 GTS/I/O O
D_IN<10>/D_IN<10>_TRST__$INT
3 0 /\1 1 FB4_13 (b) (b)
A_LAN<5> 3 0 0 2 FB4_14 7 I/O O
LAN_WR_RST 2 0 0 3 FB4_15 (b) (b)
LAN_RST_SM_FSM_FFd8 1 0 \/4 0 FB4_16 (b) (b)
DQ<4>_BUFR 14 9<- 0 0 FB4_17 (b) (b)
(unused) 0 0 /\5 0 FB4_18 (b) (b)
Signals Used by Logic in Function Block
1: AS 16: DQ<4> 31: D<8>.PIN
2: A<1> 17: DQ<5> 32: D<5>.PIN
3: A<2> 18: DQ<8> 33: D<4>.PIN
4: A<3> 19: D_OUT<13>/D_OUT<13>_TRST__$INT 34: D<3>.PIN
5: A<4> 20: LAN_RST_SM_FSM_FFd2 35: D<0>.PIN
6: A<6> 21: LAN_RST_SM_FSM_FFd3 36: DQ<8>.PIN
7: A_LAN<0> 22: LAN_RST_SM_FSM_FFd4 37: RESET
8: A_LAN<1> 23: LAN_RST_SM_FSM_FFd5 38: RW
9: A_LAN<2> 24: LAN_RST_SM_FSM_FFd6 39: SET_FREQUENCY
10: A_LAN<3> 25: LAN_RST_SM_FSM_FFd7 40: UDS
11: A_LAN<5> 26: LDS 41: autoconfig
12: CP_CS 27: DQ<0>.PIN 42: ide
13: CP_WE_S/CP_WE_S_CLKF 28: D<13>.PIN 43: lan_adr
14: D<0> 29: D<12>.PIN 44: lan_adr_sw
15: DQ<3> 30: D<11>.PIN
Signal 1 2 3 4 5 FB
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
D<0> ...........X.X....X......XX........X...XXXXX...... 11
DQ<8>_BUFR ...........X.....X.XXXXXXX....X...X....X.XXX...... 15
A_LAN<1> ..X....X...X.......XXXXXX.................X....... 10
A_LAN<0> .X....X....X.......XXXXXX.................X....... 10
CP_WE_S ...........XX............X...........X.X.......... 5
A_LAN<3> ..X.X....X.X.......XXXXXX.................X....... 11
DQ<3>_BUFR ...........X..X....XXXXXXX...X...X.....X.XXX...... 15
DQ<5>_BUFR ...........X....X..XXXXXXX.X...X.......X.XXX...... 15
A_LAN<2> .X.X....X..X.......XXXXXX.................X....... 11
D_IN<10>/D_IN<10>_TRST__$INT
X..........X.........................XX..XX....... 6
A_LAN<5> ....XX....XX.......XXXXXX.................X....... 11
LAN_WR_RST ....................X..X............X.X........... 4
LAN_RST_SM_FSM_FFd8 ....................................X.X........... 2
DQ<4>_BUFR ...........X...X...XXXXXXX..X...X......X.XXX...... 15
0----+----1----+----2----+----3----+----4----+----5
0 0 0 0 0
*********************************** FB5 ***********************************
Number of function block inputs used/remaining: 44/10
Number of signals used by logic mapping into function block: 44
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
AS_D 2 0 /\3 0 FB5_1 (b) (b)
CP_CS 18 13<- 0 0 FB5_2 34 I/O O
(unused) 0 0 /\5 0 FB5_3 (b) (b)
(unused) 0 0 /\5 0 FB5_4 (b) (b)
ROM_OE 2 0 /\3 0 FB5_5 35 I/O O
(unused) 0 0 0 5 FB5_6 (b)
(unused) 0 0 0 5 FB5_7 (b)
(unused) 0 0 \/4 1 FB5_8 38 GCK/I/O (b)
(unused) 0 0 \/5 0 FB5_9 (b) (b)
D<2> 11 9<- \/3 0 FB5_10 39 I/O I/O
(unused) 0 0 \/5 0 FB5_11 (b) (b)
D<9> 11 8<- \/2 0 FB5_12 40 I/O I/O
(unused) 0 0 \/5 0 FB5_13 (b) (b)
D<10> 11 7<- \/1 0 FB5_14 41 I/O I/O
D<11> 11 6<- 0 0 FB5_15 43 I/O I/O
(unused) 0 0 /\5 0 FB5_16 (b) (b)
D<12> 13 8<- 0 0 FB5_17 44 I/O I/O
(unused) 0 0 /\5 0 FB5_18 (b) (b)
Signals Used by Logic in Function Block
1: AS_D 16: CP_BASEADR<5> 31: DQ<1>.PIN
2: AS 17: CP_BASEADR<6> 32: DQ<12>.PIN
3: A<16> 18: CP_BASEADR<7> 33: DQ<11>.PIN
4: A<17> 19: CP_CS 34: DQ<10>.PIN
5: A<18> 20: D<10> 35: DQ<9>.PIN
6: A<19> 21: D<11> 36: RESET
7: A<20> 22: D<12> 37: ROM_OE_S
8: A<21> 23: D<2> 38: SHUT_UP<1>
9: A<22> 24: D<9> 39: UDS
10: A<23> 25: D_OUT<13>/D_OUT<13>_TRST__$INT 40: autoconfig
11: CP_BASEADR<0> 26: Dout1<0> 41: ide
12: CP_BASEADR<1> 27: LDS 42: lan_adr
13: CP_BASEADR<2> 28: DQ<4>.PIN 43: lan_adr_sw
14: CP_BASEADR<3> 29: DQ<3>.PIN 44: lan_adr_sw/lan_adr_sw_CLKF
15: CP_BASEADR<4> 30: DQ<2>.PIN
Signal 1 2 3 4 5 FB
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
AS_D .X.................................X.......X...... 3
CP_CS ..XXXXXXXXXXXXXXXX...................X.....X...... 18
ROM_OE XX..................................X............. 3
D<2> ..................X...X.X.X..X...X....XXXXX....... 11
D<9> ..................X....XX.X...X...X...XXXXX....... 11
D<10> ..................XX....X.X..X...X....XXXXX....... 11
D<11> ..................X.X...X.X.X...X.....XXXXX....... 11
D<12> ..................X..X..XXXX...X......XXXXX....... 12
0----+----1----+----2----+----3----+----4----+----5
0 0 0 0 0
*********************************** FB6 ***********************************
Number of function block inputs used/remaining: 44/10
Number of signals used by logic mapping into function block: 44
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 /\5 0 FB6_1 (b) (b)
INT6_OUT 1 0 /\4 0 FB6_2 135 I/O O
A_LAN<12> 3 0 0 2 FB6_3 136 I/O O
SET_FREQUENCY 1 0 0 4 FB6_4 (b) (b)
A_LAN<13> 3 0 0 2 FB6_5 137 I/O O
A_LAN<10> 3 0 0 2 FB6_6 138 I/O O
LAN_RST_SM_FSM_FFd6 2 0 0 3 FB6_7 (b) (b)
A_LAN<11> 3 0 0 2 FB6_8 139 I/O O
LAN_RST_SM_FSM_FFd5 2 0 0 3 FB6_9 (b) (b)
A_LAN<8> 3 0 0 2 FB6_10 140 I/O O
LAN_RST_SM_FSM_FFd4 2 0 \/3 0 FB6_11 (b) (b)
(unused) 0 0 \/5 0 FB6_12 (b) (b)
lan_adr 18 13<- 0 0 FB6_13 (b) (b)
A_LAN<9> 3 3<- /\5 0 FB6_14 142 I/O O
LAN_RST_SM_FSM_FFd3 2 0 /\3 0 FB6_15 143 GSR/I/O GSR/I
LAN_RST_SM_FSM_FFd1 2 0 \/2 1 FB6_16 (b) (b)
LAN_RST_SM_FSM_FFd2 2 2<- \/5 0 FB6_17 (b) (b)
lan_adr_sw 19 14<- 0 0 FB6_18 (b) (b)
Signals Used by Logic in Function Block
1: A<12> 16: A_LAN<12> 31: LAN_BASEADR<6>
2: A<13> 17: A_LAN<13> 32: LAN_BASEADR<7>
3: A<14> 18: A_LAN<8> 33: LAN_RST_SM_FSM_FFd1
4: A<16> 19: A_LAN<9> 34: LAN_RST_SM_FSM_FFd2
5: A<17> 20: CP_CS 35: LAN_RST_SM_FSM_FFd3
6: A<18> 21: CP_IRQ 36: LAN_RST_SM_FSM_FFd4
7: A<19> 22: A<9> 37: LAN_RST_SM_FSM_FFd5
8: A<20> 23: A<10> 38: LAN_RST_SM_FSM_FFd6
9: A<21> 24: A<11> 39: LAN_RST_SM_FSM_FFd7
10: A<22> 25: LAN_BASEADR<0> 40: RESET
11: A<23> 26: LAN_BASEADR<1> 41: SET_FREQUENCY
12: A<7> 27: LAN_BASEADR<2> 42: SHUT_UP<0>
13: A<8> 28: LAN_BASEADR<3> 43: lan_adr
14: A_LAN<10> 29: LAN_BASEADR<4> 44: lan_adr_sw/lan_adr_sw_CLKF
15: A_LAN<11> 30: LAN_BASEADR<5>
Signal 1 2 3 4 5 FB
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
INT6_OUT ....................X............................. 1
A_LAN<12> .X.............X...X...X.........XXXXXX...X....... 11
SET_FREQUENCY ................................X......XX......... 3
A_LAN<13> X.X.............X..X.............XXXXXX...X....... 11
A_LAN<10> .............X.....X.X.X.........XXXXXX...X....... 11
LAN_RST_SM_FSM_FFd6 ......................................XXX......... 3
A_LAN<11> X.............X....X..X..........XXXXXX...X....... 11
LAN_RST_SM_FSM_FFd5 .....................................X.XX......... 3
A_LAN<8> ...........X.....X.X.X...........XXXXXX...X....... 11
LAN_RST_SM_FSM_FFd4 ....................................X..XX......... 3
lan_adr ...XXXXXXXX.............XXXXXXXX.........X.X...... 18
A_LAN<9> ............X.....XX..X..........XXXXXX...X....... 11
LAN_RST_SM_FSM_FFd3 ...................................X...XX......... 3
LAN_RST_SM_FSM_FFd1 ................................XX.....XX......... 4
LAN_RST_SM_FSM_FFd2 ..................................X....XX......... 3
lan_adr_sw .XXXXXXXXXX.............XXXXXXXX.........X.X...... 20
0----+----1----+----2----+----3----+----4----+----5
0 0 0 0 0
*********************************** FB7 ***********************************
Number of function block inputs used/remaining: 37/17
Number of signals used by logic mapping into function block: 37
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
Dout1<2> 20 15<- 0 0 FB7_1 (b) (b)
(unused) 0 0 /\5 0 FB7_2 (b) (b)
D<13> 13 8<- 0 0 FB7_3 45 I/O I/O
(unused) 0 0 /\5 0 FB7_4 (b) (b)
D<14> 13 11<- /\3 0 FB7_5 46 I/O I/O
(unused) 0 0 /\5 0 FB7_6 (b) (b)
(unused) 0 0 /\5 0 FB7_7 (b) (b)
AUTO_CONFIG_DONE<0> 3 0 /\1 1 FB7_8 (b) (b)
CP_BASEADR<2> 5 0 0 0 FB7_9 (b) (b)
(unused) 0 0 \/5 0 FB7_10 (b) (b)
(unused) 0 0 \/5 0 FB7_11 (b) (b)
D<15> 13 10<- \/2 0 FB7_12 48 I/O I/O
(unused) 0 0 \/5 0 FB7_13 (b) (b)
Dout1<1> 22 17<- 0 0 FB7_14 (b) (b)
(unused) 0 0 /\5 0 FB7_15 49 I/O I
(unused) 0 0 /\5 0 FB7_16 (b) (b)
(unused) 0 0 \/5 0 FB7_17 (b) (b)
(unused) 0 0 \/5 0 FB7_18 (b) (b)
Signals Used by Logic in Function Block
1: AS 14: CP_CS 26: DQ<5>.PIN
2: AUTO_CONFIG_DONE<0> 15: D<13> 27: DQ<14>.PIN
3: AUTO_CONFIG_DONE<0>/AUTO_CONFIG_DONE<0>_CLKF 16: D<14> 28: DQ<13>.PIN
4: AUTO_CONFIG_DONE<1> 17: D<15> 29: D<10>.PIN
5: AUTO_CONFIG_DONE_CYCLE<0> 18: D_OUT<13>/D_OUT<13>_TRST__$INT 30: DQ<7>.PIN
6: A<1> 19: Dout1<1> 31: DQ<6>.PIN
7: A<2> 20: Dout1<1>/Dout1<1>_CLKF 32: RW
8: A<3> 21: Dout1<2> 33: UDS
9: A<4> 22: Dout1<2>/Dout1<2>_CLKF 34: autoconfig
10: A<5> 23: Dout1<3> 35: ide
11: A<6> 24: LDS 36: lan_adr
12: CP_BASEADR<2> 25: DQ<15>.PIN 37: lan_adr_sw
13: CP_BASEADR<2>/CP_BASEADR<2>_CLKF
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
Dout1<2> XX.X.XXXXXX.........XX.X........XX...... 14
D<13> .............XX..XX....X.X.X....XXXXX... 12
D<14> .............X.X.X..X..X..X...X.XXXXX... 12
AUTO_CONFIG_DONE<0> X.X.X................................... 3
CP_BASEADR<2> XX.X.XXXXXXXX..........X....X..XXX...... 16
D<15> .............X..XX....XXX....X..XXXXX... 12
Dout1<1> XX.X.XXXXXX.......XX...X........XX...... 14
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB8 ***********************************
Number of function block inputs used/remaining: 43/11
Number of signals used by logic mapping into function block: 43
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
DQ<6>_BUFR 10 8<- \/3 0 FB8_1 (b) (b)
DQ<12> 11 6<- 0 0 FB8_2 130 I/O I/O
DQ<14> 11 9<- /\3 0 FB8_3 131 I/O I/O
(unused) 0 0 /\5 0 FB8_4 (b) (b)
LAN_WRH 3 2<- /\4 0 FB8_5 132 I/O O
(unused) 0 0 /\2 3 FB8_6 (b) (b)
(unused) 0 0 0 5 FB8_7 (b)
LAN_CS 2 0 0 3 FB8_8 133 I/O O
(unused) 0 0 0 5 FB8_9 (b)
LAN_RD 2 0 0 3 FB8_10 134 I/O O
(unused) 0 0 0 5 FB8_11 (b)
(unused) 0 0 0 5 FB8_12 (b)
(unused) 0 0 0 5 FB8_13 (b)
IDE_ENABLE 2 0 \/3 0 FB8_14 (b) (b)
CP_BASEADR<4> 5 3<- \/3 0 FB8_15 (b) (b)
(unused) 0 0 \/5 0 FB8_16 (b) (b)
DQ<7>_BUFR 10 8<- \/3 0 FB8_17 (b) (b)
(unused) 0 0 \/5 0 FB8_18 (b) (b)
Signals Used by Logic in Function Block
1: AS_D 16: DQ<6> 30: LAN_WR_RST
2: AS 17: DQ<7> 31: LDS
3: AUTO_CONFIG_DONE<0> 18: D_IN<10>/D_IN<10>_TRST__$INT 32: D<15>.PIN
4: AUTO_CONFIG_DONE<1> 19: IDE_ENABLE/IDE_ENABLE_CLKF 33: D<14>.PIN
5: A<1> 20: LAN_CS_RST 34: D<12>.PIN
6: A<2> 21: LAN_RD_S 35: D<7>.PIN
7: A<3> 22: LAN_RST_SM_FSM_FFd1 36: D<6>.PIN
8: A<4> 23: LAN_RST_SM_FSM_FFd2 37: D<4>.PIN
9: A<5> 24: LAN_RST_SM_FSM_FFd3 38: RW
10: A<6> 25: LAN_RST_SM_FSM_FFd4 39: UDS
11: CP_BASEADR<4> 26: LAN_RST_SM_FSM_FFd5 40: autoconfig
12: CP_BASEADR<4>/CP_BASEADR<4>_CLKF 27: LAN_RST_SM_FSM_FFd6 41: ide
13: CP_CS 28: LAN_RST_SM_FSM_FFd7 42: lan_adr
14: DQ<12> 29: LAN_WRH_S 43: lan_adr_sw
15: DQ<14>
Signal 1 2 3 4 5 FB
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
DQ<6>_BUFR ............X..X......XXXXXX..X.X..X..X.XXX....... 15
DQ<12> ............XX...X....XXXXXX..X..X..X.X.XXX....... 16
DQ<14> ............X.X..X....XXXXXX..X.X..X..X.XXX....... 16
LAN_WRH .X...................X......XX.................... 4
LAN_CS ...................X.X...................X........ 3
LAN_RD XX..................XX............................ 4
IDE_ENABLE .X................X..................X..X......... 4
CP_BASEADR<4> .XXXXXXXXXXX..................X..X...XXX.......... 16
DQ<7>_BUFR ............X...X.....XXXXXX..XX..X...X.XXX....... 15
0----+----1----+----2----+----3----+----4----+----5
0 0 0 0 0
*********************************** FB9 ***********************************
Number of function block inputs used/remaining: 2/52
Number of signals used by logic mapping into function block: 2
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF
2 0 0 3 FB9_1 (b) (b)
LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF
2 0 0 3 FB9_2 50 I/O I
LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF
2 0 0 3 FB9_3 51 I/O I
IDE_W_S/IDE_W_S_CLKF
2 0 0 3 FB9_4 (b) (b)
IDE_R_S/IDE_R_S_CLKF
2 0 0 3 FB9_5 52 I/O I
IDE_ENABLE/IDE_ENABLE_CLKF
2 0 0 3 FB9_6 53 I/O I
IDE_BASEADR<7>/IDE_BASEADR<7>_CLKF
2 0 0 3 FB9_7 (b) (b)
IDE_BASEADR<6>/IDE_BASEADR<6>_CLKF
2 0 0 3 FB9_8 54 I/O I
IDE_BASEADR<5>/IDE_BASEADR<5>_CLKF
2 0 0 3 FB9_9 (b) (b)
IDE_BASEADR<4>/IDE_BASEADR<4>_CLKF
2 0 0 3 FB9_10 (b) (b)
IDE_BASEADR<3>/IDE_BASEADR<3>_CLKF
2 0 0 3 FB9_11 56 I/O I
IDE_BASEADR<2>/IDE_BASEADR<2>_CLKF
2 0 0 3 FB9_12 57 I/O I
IDE_BASEADR<1>/IDE_BASEADR<1>_CLKF
2 0 0 3 FB9_13 (b) (b)
IDE_BASEADR<0>/IDE_BASEADR<0>_CLKF
2 0 0 3 FB9_14 58 I/O I
Dout1<3>/Dout1<3>_CLKF
2 0 0 3 FB9_15 (b) (b)
Dout1<2>/Dout1<2>_CLKF
2 0 0 3 FB9_16 (b) (b)
Dout1<1>/Dout1<1>_CLKF
2 0 0 3 FB9_17 59 I/O I
Dout1<0>/Dout1<0>_CLKF
2 0 0 3 FB9_18 (b) (b)
Signals Used by Logic in Function Block
1: C1 2: C3
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF
XX...................................... 2
LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF
XX...................................... 2
LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF
XX...................................... 2
IDE_W_S/IDE_W_S_CLKF
XX...................................... 2
IDE_R_S/IDE_R_S_CLKF
XX...................................... 2
IDE_ENABLE/IDE_ENABLE_CLKF
XX...................................... 2
IDE_BASEADR<7>/IDE_BASEADR<7>_CLKF
XX...................................... 2
IDE_BASEADR<6>/IDE_BASEADR<6>_CLKF
XX...................................... 2
IDE_BASEADR<5>/IDE_BASEADR<5>_CLKF
XX...................................... 2
IDE_BASEADR<4>/IDE_BASEADR<4>_CLKF
XX...................................... 2
IDE_BASEADR<3>/IDE_BASEADR<3>_CLKF
XX...................................... 2
IDE_BASEADR<2>/IDE_BASEADR<2>_CLKF
XX...................................... 2
IDE_BASEADR<1>/IDE_BASEADR<1>_CLKF
XX...................................... 2
IDE_BASEADR<0>/IDE_BASEADR<0>_CLKF
XX...................................... 2
Dout1<3>/Dout1<3>_CLKF
XX...................................... 2
Dout1<2>/Dout1<2>_CLKF
XX...................................... 2
Dout1<1>/Dout1<1>_CLKF
XX...................................... 2
Dout1<0>/Dout1<0>_CLKF
XX...................................... 2
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB10 ***********************************
Number of function block inputs used/remaining: 33/21
Number of signals used by logic mapping into function block: 33
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 \/5 0 FB10_1 (b) (b)
DQ<1> 11 6<- 0 0 FB10_2 117 I/O I/O
DQ<0> 11 7<- /\1 0 FB10_3 118 I/O I/O
(unused) 0 0 /\5 0 FB10_4 (b) (b)
DQ<3> 2 0 /\2 1 FB10_5 119 I/O I/O
DQ<2> 11 6<- 0 0 FB10_6 120 I/O I/O
(unused) 0 0 /\5 0 FB10_7 (b) (b)
DQ<5> 2 0 /\1 2 FB10_8 121 I/O I/O
(unused) 0 0 0 5 FB10_9 (b)
DQ<4> 2 0 0 3 FB10_10 124 I/O I/O
DQ<7> 2 0 0 3 FB10_11 125 I/O I/O
DQ<6> 2 0 0 3 FB10_12 126 I/O I/O
(unused) 0 0 0 5 FB10_13 (b)
DQ<8> 2 0 \/3 0 FB10_14 128 I/O I/O
DQ<9>_BUFR 14 9<- 0 0 FB10_15 (b) (b)
(unused) 0 0 /\5 0 FB10_16 (b) (b)
DQ<10> 2 0 /\1 2 FB10_17 129 I/O I/O
LAN_RD_S 3 0 0 2 FB10_18 (b) (b)
Signals Used by Logic in Function Block
1: A<15> 12: DQ<8>_BUFR 23: D<10>.PIN
2: CP_CS 13: DQ<9> 24: D<9>.PIN
3: DQ<0> 14: D_IN<10>/D_IN<10>_TRST__$INT 25: D<8>.PIN
4: DQ<10>_BUFR 15: LAN_RD_S/LAN_RD_S_CLKF 26: D<2>.PIN
5: DQ<1> 16: LAN_RST_SM_FSM_FFd2 27: D<1>.PIN
6: DQ<2> 17: LAN_RST_SM_FSM_FFd3 28: D<0>.PIN
7: DQ<3>_BUFR 18: LAN_RST_SM_FSM_FFd4 29: RW
8: DQ<4>_BUFR 19: LAN_RST_SM_FSM_FFd5 30: UDS
9: DQ<5>_BUFR 20: LAN_RST_SM_FSM_FFd6 31: ide
10: DQ<6>_BUFR 21: LAN_RST_SM_FSM_FFd7 32: lan_adr
11: DQ<7>_BUFR 22: LDS 33: lan_adr_sw
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
DQ<1> .X..X........X.XXXXXXX.X..X..XXXX....... 16
DQ<0> .XX..........X.XXXXXXX..X..X.XXXX....... 16
DQ<3> ......X......X.......................... 2
DQ<2> .X...X.......X.XXXXXXXX..X...XXXX....... 16
DQ<5> ........X....X.......................... 2
DQ<4> .......X.....X.......................... 2
DQ<7> ..........X..X.......................... 2
DQ<6> .........X...X.......................... 2
DQ<8> ...........X.X.......................... 2
DQ<9>_BUFR .X..........X..XXXXXXX.X..X..XXXX....... 15
DQ<10> ...X.........X.......................... 2
LAN_RD_S X.............X......X......XX.X........ 6
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB11 ***********************************
Number of function block inputs used/remaining: 5/49
Number of signals used by logic mapping into function block: 5
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
CP_WE_S/CP_WE_S_CLKF
2 0 0 3 FB11_1 (b) (b)
CP_WE_QUIRK/CP_WE_QUIRK_CLKF
2 0 0 3 FB11_2 (b) (b)
CP_RD_S/CP_RD_S_CLKF
2 0 0 3 FB11_3 60 I/O I
CP_BASEADR<7>/CP_BASEADR<7>_CLKF
2 0 0 3 FB11_4 (b) (b)
CP_BASEADR<6>/CP_BASEADR<6>_CLKF
2 0 0 3 FB11_5 61 I/O I
CP_BASEADR<5>/CP_BASEADR<5>_CLKF
2 0 0 3 FB11_6 (b) (b)
CP_BASEADR<4>/CP_BASEADR<4>_CLKF
2 0 0 3 FB11_7 (b) (b)
CP_BASEADR<3>/CP_BASEADR<3>_CLKF
2 0 0 3 FB11_8 (b) (b)
CP_BASEADR<2>/CP_BASEADR<2>_CLKF
2 0 0 3 FB11_9 (b) (b)
CP_BASEADR<1>/CP_BASEADR<1>_CLKF
2 0 0 3 FB11_10 64 I/O I
CP_BASEADR<0>/CP_BASEADR<0>_CLKF
2 0 0 3 FB11_11 66 I/O I
ROM_B<0> 0 0 0 5 FB11_12 68 I/O O
AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF
2 0 0 3 FB11_13 (b) (b)
ROM_B<1> 0 0 0 5 FB11_14 69 I/O O
AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF
2 0 0 3 FB11_15 (b) (b)
AUTO_CONFIG_DONE<1>/AUTO_CONFIG_DONE<1>_CLKF
2 0 0 3 FB11_16 (b) (b)
CP_WE 1 0 0 4 FB11_17 70 I/O O
AUTO_CONFIG_DONE<0>/AUTO_CONFIG_DONE<0>_CLKF
2 0 0 3 FB11_18 (b) (b)
Signals Used by Logic in Function Block
1: AS 3: C3 5: CP_WE_S
2: C1 4: CP_WE_QUIRK
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
CP_WE_S/CP_WE_S_CLKF
.XX..................................... 2
CP_WE_QUIRK/CP_WE_QUIRK_CLKF
.XX..................................... 2
CP_RD_S/CP_RD_S_CLKF
.XX..................................... 2
CP_BASEADR<7>/CP_BASEADR<7>_CLKF
.XX..................................... 2
CP_BASEADR<6>/CP_BASEADR<6>_CLKF
.XX..................................... 2
CP_BASEADR<5>/CP_BASEADR<5>_CLKF
.XX..................................... 2
CP_BASEADR<4>/CP_BASEADR<4>_CLKF
.XX..................................... 2
CP_BASEADR<3>/CP_BASEADR<3>_CLKF
.XX..................................... 2
CP_BASEADR<2>/CP_BASEADR<2>_CLKF
.XX..................................... 2
CP_BASEADR<1>/CP_BASEADR<1>_CLKF
.XX..................................... 2
CP_BASEADR<0>/CP_BASEADR<0>_CLKF
.XX..................................... 2
ROM_B<0> ........................................ 0
AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF
.XX..................................... 2
ROM_B<1> ........................................ 0
AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF
.XX..................................... 2
AUTO_CONFIG_DONE<1>/AUTO_CONFIG_DONE<1>_CLKF
.XX..................................... 2
CP_WE X..XX................................... 3
AUTO_CONFIG_DONE<0>/AUTO_CONFIG_DONE<0>_CLKF
.XX..................................... 2
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB12 ***********************************
Number of function block inputs used/remaining: 44/10
Number of signals used by logic mapping into function block: 44
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB12_1 (b)
ROM_OE_S 2 0 0 3 FB12_2 110 I/O (b)
LAN_WRL_S 2 0 \/1 2 FB12_3 111 I/O I
(unused) 0 0 \/5 0 FB12_4 (b) (b)
DQ<15> 11 6<- 0 0 FB12_5 112 I/O I/O
LAN_WRH_S 2 0 \/1 2 FB12_6 (b) (b)
(unused) 0 0 \/5 0 FB12_7 (b) (b)
DQ<13> 11 6<- 0 0 FB12_8 113 I/O I/O
(unused) 0 0 \/5 0 FB12_9 (b) (b)
DQ<11> 15 10<- 0 0 FB12_10 115 I/O I/O
LAN_RST_SM_FSM_FFd7 2 2<- /\5 0 FB12_11 (b) (b)
DQ<9> 2 0 /\2 1 FB12_12 116 I/O I/O
LAN_CS_RST 2 0 0 3 FB12_13 (b) (b)
IDE_R_S 2 0 0 3 FB12_14 (b) (b)
CP_RD_S 2 0 0 3 FB12_15 (b) (b)
LAN_INT_ENABLE 5 0 0 0 FB12_16 (b) (b)
LAN_IRQ_OUT 8 3<- 0 0 FB12_17 (b) (b)
IDE_W_S 2 0 /\3 0 FB12_18 (b) (b)
Signals Used by Logic in Function Block
1: AS 16: LAN_IRQ_D0 31: D<14>.PIN
2: A<15> 17: LAN_IRQ_OUT 32: D<13>.PIN
3: CP_CS 18: LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF 33: D<11>.PIN
4: CP_RD_S/CP_RD_S_CLKF 19: LAN_RST_SM_FSM_FFd1 34: D<7>.PIN
5: DQ<11> 20: LAN_RST_SM_FSM_FFd2 35: D<5>.PIN
6: DQ<13> 21: LAN_RST_SM_FSM_FFd3 36: D<3>.PIN
7: DQ<15> 22: LAN_RST_SM_FSM_FFd4 37: RESET
8: DQ<9>_BUFR 23: LAN_RST_SM_FSM_FFd5 38: ROM_OE_S/ROM_OE_S_CLKF
9: D_IN<10>/D_IN<10>_TRST__$INT 24: LAN_RST_SM_FSM_FFd6 39: RW
10: IDE_ENABLE 25: LAN_RST_SM_FSM_FFd7 40: SET_FREQUENCY
11: IDE_R_S/IDE_R_S_CLKF 26: LAN_RST_SM_FSM_FFd8 41: UDS
12: IDE_W_S/IDE_W_S_CLKF 27: LAN_WRH_S/LAN_WRH_S_CLKF 42: ide
13: LAN_INT_ENABLE 28: LAN_WRL_S/LAN_WRL_S_CLKF 43: lan_adr
14: LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF 29: LDS 44: lan_adr_sw
15: LAN_INT 30: D<15>.PIN
Signal 1 2 3 4 5 FB
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
ROM_OE_S X........X...........................XX..X........ 5
LAN_WRL_S .X.........................X..........X.X.X....... 5
DQ<15> ..X...X.X..........XXXXXX...XX...X......XXXX...... 16
LAN_WRH_S .X........................X.X.........X...X....... 5
DQ<13> ..X..X..X..........XXXXXX...X..X..X.....XXXX...... 16
DQ<11> ..X.X...X..........XXXXXX...X...X..X....XXXX...... 16
LAN_RST_SM_FSM_FFd7 .........................X..........X..X.......... 3
DQ<9> .......XX......................................... 2
LAN_CS_RST ..................X......X..........X..X.......... 4
IDE_R_S X........XX...........................X..X........ 5
CP_RD_S X.XX..................................X........... 4
LAN_INT_ENABLE .X..........XX..............XX........X.X.X....... 8
LAN_IRQ_OUT .X..........X.XXXX..........X.X.......X.X.X....... 11
IDE_W_S X..........X..........................X..X........ 4
0----+----1----+----2----+----3----+----4----+----5
0 0 0 0 0
*********************************** FB13 ***********************************
Number of function block inputs used/remaining: 44/10
Number of signals used by logic mapping into function block: 44
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 /\4 1 FB13_1 (b) (b)
CP_RD 2 0 0 3 FB13_2 71 I/O O
(unused) 0 0 0 5 FB13_3 (b)
(unused) 0 0 0 5 FB13_4 (b)
(unused) 0 0 0 5 FB13_5 (b)
(unused) 0 0 0 5 FB13_6 (b)
SHUT_UP<2> 3 0 0 2 FB13_7 (b) (b)
SHUT_UP<1> 3 0 0 2 FB13_8 74 I/O I
SHUT_UP<0> 3 0 0 2 FB13_9 (b) (b)
LAN_BASEADR<7> 5 0 0 0 FB13_10 (b) (b)
LAN_BASEADR<4> 5 0 0 0 FB13_11 75 I/O I
LAN_BASEADR<2> 5 0 0 0 FB13_12 (b) (b)
LAN_BASEADR<1> 5 0 0 0 FB13_13 (b) (b)
LAN_WRL 3 0 0 2 FB13_14 76 I/O O
IDE_BASEADR<4> 5 0 0 0 FB13_15 77 I/O (b)
IDE_BASEADR<2> 5 0 0 0 FB13_16 (b) (b)
IDE_BASEADR<1> 5 0 0 0 FB13_17 78 I/O (b)
AUTO_CONFIG_DONE_CYCLE<1>
9 4<- 0 0 FB13_18 (b) (b)
Signals Used by Logic in Function Block
1: AS_D 16: IDE_BASEADR<2> 31: LDS
2: AS 17: IDE_BASEADR<2>/IDE_BASEADR<2>_CLKF 32: D<15>.PIN
3: AUTO_CONFIG_DONE<0> 18: IDE_BASEADR<4> 33: D<12>.PIN
4: AUTO_CONFIG_DONE<1> 19: IDE_BASEADR<4>/IDE_BASEADR<4>_CLKF 34: D<10>.PIN
5: AUTO_CONFIG_DONE_CYCLE<1> 20: LAN_BASEADR<1> 35: D<9>.PIN
6: AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF 21: LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF 36: RW
7: A<1> 22: LAN_BASEADR<2> 37: SHUT_UP<0>
8: A<2> 23: LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF 38: SHUT_UP<0>/SHUT_UP<0>_CLKF
9: A<3> 24: LAN_BASEADR<4> 39: SHUT_UP<1>
10: A<4> 25: LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF 40: SHUT_UP<1>/SHUT_UP<1>_CLKF
11: A<5> 26: LAN_BASEADR<7> 41: SHUT_UP<2>
12: A<6> 27: LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF 42: SHUT_UP<2>/SHUT_UP<2>_CLKF
13: CP_RD_S 28: LAN_RST_SM_FSM_FFd1 43: UDS
14: IDE_BASEADR<1> 29: LAN_WRL_S 44: autoconfig
15: IDE_BASEADR<1>/IDE_BASEADR<1>_CLKF 30: LAN_WR_RST
Signal 1 2 3 4 5 FB
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
CP_RD XX..........X..................................... 3
SHUT_UP<2> .XXX..XXXXXX..................X....X....XXXX...... 15
SHUT_UP<1> .XXX..XXXXXX..................X....X..XX..XX...... 15
SHUT_UP<0> .XXX..XXXXXX..................X....XXX....XX...... 15
LAN_BASEADR<7> .XXX..XXXXXX.............XX...XX...X......XX...... 16
LAN_BASEADR<4> .XXX..XXXXXX...........XX.....X.X..X......XX...... 16
LAN_BASEADR<2> .XXX..XXXXXX.........XX.......X..X.X......XX...... 16
LAN_BASEADR<1> .XXX..XXXXXX.......XX.........X...XX......XX...... 16
LAN_WRL .X.........................XXX.................... 4
IDE_BASEADR<4> .XXX..XXXXXX.....XX...........X.X..X......XX...... 16
IDE_BASEADR<2> .XXX..XXXXXX...XX.............X..X.X......XX...... 16
IDE_BASEADR<1> .XXX..XXXXXX.XX...............X...XX......XX...... 16
AUTO_CONFIG_DONE_CYCLE<1>
.XXXXXXXXXXX..................X....X......XX...... 15
0----+----1----+----2----+----3----+----4----+----5
0 0 0 0 0
*********************************** FB14 ***********************************
Number of function block inputs used/remaining: 43/11
Number of signals used by logic mapping into function block: 43
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB14_1 (b)
(unused) 0 0 0 5 FB14_2 (b)
OVR 0 0 0 5 FB14_3 100 I/O O
(unused) 0 0 0 5 FB14_4 (b)
LAN_BASEADR<6> 5 0 0 0 FB14_5 101 I/O (b)
LAN_BASEADR<5> 5 0 0 0 FB14_6 102 I/O I
LAN_BASEADR<3> 5 0 0 0 FB14_7 (b) (b)
IDE_BASEADR<7> 5 0 0 0 FB14_8 103 I/O I
IDE_BASEADR<6> 5 0 0 0 FB14_9 (b) (b)
IDE_BASEADR<5> 5 0 0 0 FB14_10 104 I/O I
CFOUT 1 0 0 4 FB14_11 105 I/O O
IDE_BASEADR<3> 5 0 0 0 FB14_12 (b) (b)
CP_BASEADR<7> 5 0 0 0 FB14_13 (b) (b)
SLAVE 2 0 0 3 FB14_14 106 I/O O
OWN 0 0 0 5 FB14_15 107 I/O O
CP_BASEADR<6> 5 0 0 0 FB14_16 (b) (b)
CP_BASEADR<5> 5 0 0 0 FB14_17 (b) (b)
CP_BASEADR<3> 5 0 0 0 FB14_18 (b) (b)
Signals Used by Logic in Function Block
1: AS_D 16: CP_BASEADR<6>/CP_BASEADR<6>_CLKF 30: LAN_BASEADR<5>
2: AS 17: CP_BASEADR<7> 31: LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF
3: AUTO_CONFIG_DONE<0> 18: CP_BASEADR<7>/CP_BASEADR<7>_CLKF 32: LAN_BASEADR<6>
4: AUTO_CONFIG_DONE<1> 19: CP_CS 33: LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF
5: A<1> 20: IDE_BASEADR<3> 34: LDS
6: A<2> 21: IDE_BASEADR<3>/IDE_BASEADR<3>_CLKF 35: D<15>.PIN
7: A<3> 22: IDE_BASEADR<5> 36: D<14>.PIN
8: A<4> 23: IDE_BASEADR<5>/IDE_BASEADR<5>_CLKF 37: D<13>.PIN
9: A<5> 24: IDE_BASEADR<6> 38: D<11>.PIN
10: A<6> 25: IDE_BASEADR<6>/IDE_BASEADR<6>_CLKF 39: RW
11: CP_BASEADR<3> 26: IDE_BASEADR<7> 40: UDS
12: CP_BASEADR<3>/CP_BASEADR<3>_CLKF 27: IDE_BASEADR<7>/IDE_BASEADR<7>_CLKF 41: autoconfig
13: CP_BASEADR<5> 28: LAN_BASEADR<3> 42: ide
14: CP_BASEADR<5>/CP_BASEADR<5>_CLKF 29: LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF 43: lan_adr
15: CP_BASEADR<6>
Signal 1 2 3 4 5 FB
Name 0----+----0----+----0----+----0----+----0----+----0 Inputs
OVR .................................................. 0
LAN_BASEADR<6> .XXXXXXXXX.....................XXX.X..XXX......... 16
LAN_BASEADR<5> .XXXXXXXXX...................XX..X..X.XXX......... 16
LAN_BASEADR<3> .XXXXXXXXX.................XX....X...XXXX......... 16
IDE_BASEADR<7> .XXXXXXXXX...............XX......XX...XXX......... 16
IDE_BASEADR<6> .XXXXXXXXX.............XX........X.X..XXX......... 16
IDE_BASEADR<5> .XXXXXXXXX...........XX..........X..X.XXX......... 16
CFOUT ..XX.............................................. 2
IDE_BASEADR<3> .XXXXXXXXX.........XX............X...XXXX......... 16
CP_BASEADR<7> .XXXXXXXXX......XX...............XX...XXX......... 16
SLAVE XX................X.....................XXX....... 6
OWN .................................................. 0
CP_BASEADR<6> .XXXXXXXXX....XX.................X.X..XXX......... 16
CP_BASEADR<5> .XXXXXXXXX..XX...................X..X.XXX......... 16
CP_BASEADR<3> .XXXXXXXXXXX.....................X...XXXX......... 16
0----+----1----+----2----+----3----+----4----+----5
0 0 0 0 0
*********************************** FB15 ***********************************
Number of function block inputs used/remaining: 2/52
Number of signals used by logic mapping into function block: 2
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB15_1 (b)
lan_adr_sw/lan_adr_sw_CLKF
2 0 0 3 FB15_2 79 I/O (b)
SHUT_UP<2>/SHUT_UP<2>_CLKF
2 0 0 3 FB15_3 80 I/O I
SHUT_UP<1>/SHUT_UP<1>_CLKF
2 0 0 3 FB15_4 (b) (b)
SHUT_UP<0>/SHUT_UP<0>_CLKF
2 0 0 3 FB15_5 (b) (b)
ROM_OE_S/ROM_OE_S_CLKF
2 0 0 3 FB15_6 (b) (b)
LAN_WRL_S/LAN_WRL_S_CLKF
2 0 0 3 FB15_7 (b) (b)
LAN_WRH_S/LAN_WRH_S_CLKF
2 0 0 3 FB15_8 81 I/O I
LAN_RD_S/LAN_RD_S_CLKF
2 0 0 3 FB15_9 (b) (b)
LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF
2 0 0 3 FB15_10 82 I/O I
LAN_IRQ_D0/LAN_IRQ_D0_CLKF
2 0 0 3 FB15_11 83 I/O I
DTACK 0 0 0 5 FB15_12 85 I/O O
LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF
2 0 0 3 FB15_13 (b) (b)
LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF
2 0 0 3 FB15_14 86 I/O I
LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF
2 0 0 3 FB15_15 87 I/O I
LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF
2 0 0 3 FB15_16 (b) (b)
LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF
2 0 0 3 FB15_17 88 I/O I
LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF
2 0 0 3 FB15_18 (b) (b)
Signals Used by Logic in Function Block
1: C1 2: C3
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
lan_adr_sw/lan_adr_sw_CLKF
XX...................................... 2
SHUT_UP<2>/SHUT_UP<2>_CLKF
XX...................................... 2
SHUT_UP<1>/SHUT_UP<1>_CLKF
XX...................................... 2
SHUT_UP<0>/SHUT_UP<0>_CLKF
XX...................................... 2
ROM_OE_S/ROM_OE_S_CLKF
XX...................................... 2
LAN_WRL_S/LAN_WRL_S_CLKF
XX...................................... 2
LAN_WRH_S/LAN_WRH_S_CLKF
XX...................................... 2
LAN_RD_S/LAN_RD_S_CLKF
XX...................................... 2
LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF
XX...................................... 2
LAN_IRQ_D0/LAN_IRQ_D0_CLKF
XX...................................... 2
DTACK ........................................ 0
LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF
XX...................................... 2
LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF
XX...................................... 2
LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF
XX...................................... 2
LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF
XX...................................... 2
LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF
XX...................................... 2
LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF
XX...................................... 2
0----+----1----+----2----+----3----+----4
0 0 0 0
*********************************** FB16 ***********************************
Number of function block inputs used/remaining: 0/54
Number of signals used by logic mapping into function block: 0
Signal Total Imp Exp Unused Loc Pin Pin Pin
Name Pt Pt Pt Pt # Type Use
(unused) 0 0 0 5 FB16_1 (b)
(unused) 0 0 0 5 FB16_2 91 I/O I
(unused) 0 0 0 5 FB16_3 92 I/O I
(unused) 0 0 0 5 FB16_4 (b)
(unused) 0 0 0 5 FB16_5 93 I/O
(unused) 0 0 0 5 FB16_6 94 I/O I
(unused) 0 0 0 5 FB16_7 (b)
(unused) 0 0 0 5 FB16_8 95 I/O I
(unused) 0 0 0 5 FB16_9 (b)
MTACK 0 0 0 5 FB16_10 96 I/O O
(unused) 0 0 0 5 FB16_11 97 I/O I
(unused) 0 0 0 5 FB16_12 98 I/O
(unused) 0 0 0 5 FB16_13 (b)
(unused) 0 0 0 5 FB16_14 (b)
(unused) 0 0 0 5 FB16_15 (b)
(unused) 0 0 0 5 FB16_16 (b)
(unused) 0 0 0 5 FB16_17 (b)
(unused) 0 0 0 5 FB16_18 (b)
Signals Used by Logic in Function Block
Signal 1 2 3 4 FB
Name 0----+----0----+----0----+----0----+----0 Inputs
MTACK ........................................ 0
0----+----1----+----2----+----3----+----4
0 0 0 0
******************************* Equations ********************************
********** Mapped Logic **********
FDCPE_AS_D: FDCPE port map (AS_D,AS_D_D,lan_adr_sw/lan_adr_sw_CLKF,'0','0');
AS_D_D <= (NOT AS AND RESET);
FDCPE_AUTO_CONFIG_DONE0: FDCPE port map (AUTO_CONFIG_DONE(0),AUTO_CONFIG_DONE_CYCLE(0),AUTO_CONFIG_DONE(0)/AUTO_CONFIG_DONE(0)_CLKF,'0',NOT RESET,AS);
AUTO_CONFIG_DONE(0)/AUTO_CONFIG_DONE(0)_CLKF <= C3
XOR
AUTO_CONFIG_DONE(0)/AUTO_CONFIG_DONE(0)_CLKF <= C1;
FDCPE_AUTO_CONFIG_DONE1: FDCPE port map (AUTO_CONFIG_DONE(1),AUTO_CONFIG_DONE_CYCLE(1),AUTO_CONFIG_DONE(1)/AUTO_CONFIG_DONE(1)_CLKF,'0',NOT RESET,AS);
AUTO_CONFIG_DONE(1)/AUTO_CONFIG_DONE(1)_CLKF <= C3
XOR
AUTO_CONFIG_DONE(1)/AUTO_CONFIG_DONE(1)_CLKF <= C1;
AUTO_CONFIG_DONE_CYCLE(0)/AUTO_CONFIG_DONE_CYCLE(0)_CLKF <= C3
XOR
AUTO_CONFIG_DONE_CYCLE(0)/AUTO_CONFIG_DONE_CYCLE(0)_CLKF <= C1;
FTCPE_AUTO_CONFIG_DONE_CYCLE0: FTCPE port map (AUTO_CONFIG_DONE_CYCLE(0),AUTO_CONFIG_DONE_CYCLE_T(0),AUTO_CONFIG_DONE_CYCLE(0)/AUTO_CONFIG_DONE_CYCLE(0)_CLKF,'0',NOT RESET);
AUTO_CONFIG_DONE_CYCLE_T(0) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND NOT UDS AND AUTOBOOT_OFF)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND NOT LDS AND AUTOBOOT_OFF)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND
AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND NOT A(2) AND NOT UDS AND NOT AUTOBOOT_OFF)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND
AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND NOT A(2) AND NOT LDS AND NOT AUTOBOOT_OFF)
OR (NOT AS AND AUTO_CONFIG_DONE(0) AND
AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(0) AND
AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND NOT LDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(0) AND
NOT AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(0) AND
NOT AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND A(2) AND NOT LDS));
FTCPE_AUTO_CONFIG_DONE_CYCLE1: FTCPE port map (AUTO_CONFIG_DONE_CYCLE(1),AUTO_CONFIG_DONE_CYCLE_T(1),AUTO_CONFIG_DONE_CYCLE(1)/AUTO_CONFIG_DONE_CYCLE(1)_CLKF,'0',NOT RESET);
AUTO_CONFIG_DONE_CYCLE_T(1) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND NOT LDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND
NOT RW AND NOT LDS));
AUTO_CONFIG_DONE_CYCLE(1)/AUTO_CONFIG_DONE_CYCLE(1)_CLKF <= C3
XOR
AUTO_CONFIG_DONE_CYCLE(1)/AUTO_CONFIG_DONE_CYCLE(1)_CLKF <= C1;
FDCPE_A_LAN0: FDCPE port map (A_LAN(0),A_LAN_D(0),CLK_EXT,'0','0');
A_LAN_D(0) <= ((NOT CP_CS)
OR (NOT lan_adr AND NOT A_LAN(0) AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7)
OR (NOT A(1) AND lan_adr));
FDCPE_A_LAN1: FDCPE port map (A_LAN(1),A_LAN_D(1),CLK_EXT,'0','0');
A_LAN_D(1) <= ((NOT CP_CS)
OR (lan_adr AND NOT A(2))
OR (NOT lan_adr AND NOT A_LAN(1) AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7));
FDCPE_A_LAN2: FDCPE port map (A_LAN(2),A_LAN_D(2),CLK_EXT,'0','0');
A_LAN_D(2) <= ((NOT lan_adr AND NOT A_LAN(2) AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS)
OR (NOT A(1) AND NOT CP_CS)
OR (NOT A(3) AND lan_adr AND CP_CS));
FDCPE_A_LAN3: FDCPE port map (A_LAN(3),A_LAN_D(3),CLK_EXT,'0','0');
A_LAN_D(3) <= ((A(2) AND NOT CP_CS)
OR (A(4) AND lan_adr AND CP_CS)
OR (NOT lan_adr AND A_LAN(3) AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS));
FDCPE_A_LAN4: FDCPE port map (A_LAN(4),A_LAN_D(4),CLK_EXT,'0','0');
A_LAN_D(4) <= ((NOT A(3) AND NOT CP_CS)
OR (NOT A(5) AND lan_adr AND CP_CS)
OR (NOT lan_adr AND NOT A_LAN(4) AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS));
FDCPE_A_LAN5: FDCPE port map (A_LAN(5),A_LAN_D(5),CLK_EXT,'0','0');
A_LAN_D(5) <= ((NOT A(4) AND NOT CP_CS)
OR (NOT A(6) AND lan_adr AND CP_CS)
OR (NOT lan_adr AND NOT A_LAN(5) AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS));
FDCPE_A_LAN6: FDCPE port map (A_LAN(6),A_LAN_D(6),CLK_EXT,'0','0');
A_LAN_D(6) <= ((EXP33_.EXP)
OR (A(5) AND NOT CP_CS)
OR (lan_adr AND A(7) AND CP_CS)
OR (NOT lan_adr AND LAN_RST_SM_FSM_FFd6 AND CP_CS)
OR (NOT lan_adr AND LAN_RST_SM_FSM_FFd5 AND CP_CS)
OR (NOT lan_adr AND LAN_RST_SM_FSM_FFd7 AND CP_CS));
FDCPE_A_LAN7: FDCPE port map (A_LAN(7),A_LAN_D(7),CLK_EXT,'0','0');
A_LAN_D(7) <= ((lan_adr AND NOT A(8) AND CP_CS)
OR (NOT lan_adr AND NOT A_LAN(7) AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS)
OR (NOT A(6) AND NOT CP_CS));
FDCPE_A_LAN8: FDCPE port map (A_LAN(8),A_LAN_D(8),CLK_EXT,'0','0');
A_LAN_D(8) <= ((NOT A(7) AND NOT CP_CS)
OR (lan_adr AND NOT A(9) AND CP_CS)
OR (NOT lan_adr AND NOT A_LAN(8) AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS));
FDCPE_A_LAN9: FDCPE port map (A_LAN(9),A_LAN_D(9),CLK_EXT,'0','0');
A_LAN_D(9) <= ((NOT A(8) AND NOT CP_CS)
OR (lan_adr AND NOT A(10) AND CP_CS)
OR (NOT lan_adr AND NOT A_LAN(9) AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS));
FDCPE_A_LAN10: FDCPE port map (A_LAN(10),A_LAN_D(10),CLK_EXT,'0','0');
A_LAN_D(10) <= ((NOT A(9) AND NOT CP_CS)
OR (lan_adr AND NOT A(11) AND CP_CS)
OR (NOT lan_adr AND NOT A_LAN(10) AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS));
FDCPE_A_LAN11: FDCPE port map (A_LAN(11),A_LAN_D(11),CLK_EXT,'0','0');
A_LAN_D(11) <= ((NOT A(10) AND NOT CP_CS)
OR (lan_adr AND NOT A(12) AND CP_CS)
OR (NOT lan_adr AND NOT A_LAN(11) AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS));
FDCPE_A_LAN12: FDCPE port map (A_LAN(12),A_LAN_D(12),CLK_EXT,'0','0');
A_LAN_D(12) <= ((NOT A(11) AND NOT CP_CS)
OR (lan_adr AND NOT A(13) AND CP_CS)
OR (NOT lan_adr AND NOT A_LAN(12) AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS));
FDCPE_A_LAN13: FDCPE port map (A_LAN(13),A_LAN_D(13),CLK_EXT,'0','0');
A_LAN_D(13) <= ((NOT A(12) AND NOT CP_CS)
OR (lan_adr AND NOT A(14) AND CP_CS)
OR (NOT lan_adr AND NOT A_LAN(13) AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS));
CFOUT <= NOT ((NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0)));
CP_BASEADR(0)/CP_BASEADR(0)_CLKF <= C3
XOR
CP_BASEADR(0)/CP_BASEADR(0)_CLKF <= C1;
FTCPE_CP_BASEADR0: FTCPE port map (CP_BASEADR(0),CP_BASEADR_T(0),CP_BASEADR(0)/CP_BASEADR(0)_CLKF,'0',NOT RESET);
CP_BASEADR_T(0) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(8).PIN AND NOT CP_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(8).PIN AND NOT CP_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(8).PIN AND CP_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(8).PIN AND CP_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
FTCPE_CP_BASEADR1: FTCPE port map (CP_BASEADR(1),CP_BASEADR_T(1),CP_BASEADR(1)/CP_BASEADR(1)_CLKF,'0',NOT RESET);
CP_BASEADR_T(1) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(9).PIN AND NOT CP_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(9).PIN AND NOT CP_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(9).PIN AND CP_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(9).PIN AND CP_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
CP_BASEADR(1)/CP_BASEADR(1)_CLKF <= C3
XOR
CP_BASEADR(1)/CP_BASEADR(1)_CLKF <= C1;
CP_BASEADR(2)/CP_BASEADR(2)_CLKF <= C3
XOR
CP_BASEADR(2)/CP_BASEADR(2)_CLKF <= C1;
FTCPE_CP_BASEADR2: FTCPE port map (CP_BASEADR(2),CP_BASEADR_T(2),CP_BASEADR(2)/CP_BASEADR(2)_CLKF,'0',NOT RESET);
CP_BASEADR_T(2) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(10).PIN AND NOT CP_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(10).PIN AND NOT CP_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(10).PIN AND CP_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(10).PIN AND CP_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
CP_BASEADR(3)/CP_BASEADR(3)_CLKF <= C3
XOR
CP_BASEADR(3)/CP_BASEADR(3)_CLKF <= C1;
FTCPE_CP_BASEADR3: FTCPE port map (CP_BASEADR(3),CP_BASEADR_T(3),CP_BASEADR(3)/CP_BASEADR(3)_CLKF,'0',NOT RESET);
CP_BASEADR_T(3) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(11).PIN AND NOT CP_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(11).PIN AND NOT CP_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(11).PIN AND CP_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(11).PIN AND CP_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
FTCPE_CP_BASEADR4: FTCPE port map (CP_BASEADR(4),CP_BASEADR_T(4),CP_BASEADR(4)/CP_BASEADR(4)_CLKF,'0',NOT RESET);
CP_BASEADR_T(4) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(12).PIN AND NOT CP_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(12).PIN AND NOT CP_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(12).PIN AND CP_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(12).PIN AND CP_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
CP_BASEADR(4)/CP_BASEADR(4)_CLKF <= C3
XOR
CP_BASEADR(4)/CP_BASEADR(4)_CLKF <= C1;
FTCPE_CP_BASEADR5: FTCPE port map (CP_BASEADR(5),CP_BASEADR_T(5),CP_BASEADR(5)/CP_BASEADR(5)_CLKF,'0',NOT RESET);
CP_BASEADR_T(5) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(13).PIN AND NOT CP_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(13).PIN AND NOT CP_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(13).PIN AND CP_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(13).PIN AND CP_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
CP_BASEADR(5)/CP_BASEADR(5)_CLKF <= C3
XOR
CP_BASEADR(5)/CP_BASEADR(5)_CLKF <= C1;
FTCPE_CP_BASEADR6: FTCPE port map (CP_BASEADR(6),CP_BASEADR_T(6),CP_BASEADR(6)/CP_BASEADR(6)_CLKF,'0',NOT RESET);
CP_BASEADR_T(6) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(14).PIN AND NOT CP_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(14).PIN AND NOT CP_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(14).PIN AND CP_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(14).PIN AND CP_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
CP_BASEADR(6)/CP_BASEADR(6)_CLKF <= C3
XOR
CP_BASEADR(6)/CP_BASEADR(6)_CLKF <= C1;
CP_BASEADR(7)/CP_BASEADR(7)_CLKF <= C3
XOR
CP_BASEADR(7)/CP_BASEADR(7)_CLKF <= C1;
FTCPE_CP_BASEADR7: FTCPE port map (CP_BASEADR(7),CP_BASEADR_T(7),CP_BASEADR(7)/CP_BASEADR(7)_CLKF,'0',NOT RESET);
CP_BASEADR_T(7) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(15).PIN AND NOT CP_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
D(15).PIN AND NOT CP_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(15).PIN AND CP_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT D(15).PIN AND CP_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
FDCPE_CP_CS: FDCPE port map (CP_CS,CP_CS_D,lan_adr_sw/lan_adr_sw_CLKF,'0',NOT RESET);
CP_CS_D <= ((SHUT_UP(1))
OR (EXP51_.EXP)
OR (CP_BASEADR(1) AND NOT A(17))
OR (CP_BASEADR(2) AND NOT A(18))
OR (NOT CP_BASEADR(2) AND A(18))
OR (CP_BASEADR(3) AND NOT A(19))
OR (NOT CP_BASEADR(3) AND A(19))
OR (CP_BASEADR(0) AND NOT A(16))
OR (NOT CP_BASEADR(0) AND A(16))
OR (NOT CP_BASEADR(1) AND A(17)));
CP_RD <= ((CP_RD_S)
OR (AS AND AS_D));
FDCPE_CP_RD_S: FDCPE port map (CP_RD_S,CP_RD_S_D,CP_RD_S/CP_RD_S_CLKF,'0',NOT RESET);
CP_RD_S_D <= (NOT AS AND RW AND NOT CP_CS);
CP_RD_S/CP_RD_S_CLKF <= C3
XOR
CP_RD_S/CP_RD_S_CLKF <= C1;
CP_WE <= NOT ((NOT AS AND NOT CP_WE_S AND CP_WE_QUIRK));
FDCPE_CP_WE_QUIRK: FDCPE port map (CP_WE_QUIRK,CP_WE_S,CP_WE_QUIRK/CP_WE_QUIRK_CLKF,'0',NOT RESET);
CP_WE_QUIRK/CP_WE_QUIRK_CLKF <= C3
XOR
CP_WE_QUIRK/CP_WE_QUIRK_CLKF <= C1;
FDCPE_CP_WE_S: FDCPE port map (CP_WE_S,CP_WE_S_D,CP_WE_S/CP_WE_S_CLKF,'0',NOT RESET);
CP_WE_S_D <= ((NOT RW AND NOT UDS AND NOT CP_CS)
OR (NOT RW AND NOT LDS AND NOT CP_CS));
CP_WE_S/CP_WE_S_CLKF <= C3
XOR
CP_WE_S/CP_WE_S_CLKF <= C1;
FDCPE_D0: FDCPE port map (D_I(0),D(0),CLK_EXT,'0','0');
D(0) <= ((NOT D(0) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND
NOT DQ(0).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(0).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(0).PIN)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT DQ(8).PIN AND
NOT LDS AND CP_CS)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT DQ(8).PIN AND
NOT UDS AND CP_CS)
OR (NOT D(0) AND UDS AND LDS)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(0).PIN AND NOT CP_CS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(0).PIN AND NOT CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND
NOT DQ(0).PIN));
D(0) <= D_I(0) when D_OE(0) = '1' else 'Z';
D_OE(0) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D1: FDCPE port map (D_I(1),D(1),CLK_EXT,'0','0');
D(1) <= ((D_OUT(8).EXP)
OR (NOT D(1) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND
NOT DQ(1).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(1).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(1).PIN)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT DQ(9).PIN AND
NOT LDS AND CP_CS)
OR (NOT D(1) AND UDS AND LDS)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(1).PIN AND NOT CP_CS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(1).PIN AND NOT CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND
NOT DQ(1).PIN));
D(1) <= D_I(1) when D_OE(1) = '1' else 'Z';
D_OE(1) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D2: FDCPE port map (D_I(2),D(2),CLK_EXT,'0','0');
D(2) <= ((EXP52_.EXP)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(2).PIN AND NOT CP_CS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(2).PIN AND NOT CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND
NOT DQ(2).PIN)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND
NOT DQ(2).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(2).PIN)
OR (NOT D(2) AND UDS AND LDS));
D(2) <= D_I(2) when D_OE(2) = '1' else 'Z';
D_OE(2) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D3: FDCPE port map (D_I(3),D(3),CLK_EXT,'0','0');
D(3) <= ((D_OUT(6).EXP)
OR (NOT D(3) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND
NOT DQ(3).PIN)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND
NOT DQ(3).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(3).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(3).PIN)
OR (NOT D(3) AND UDS AND LDS)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(3).PIN AND NOT CP_CS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(3).PIN AND NOT CP_CS));
D(3) <= D_I(3) when D_OE(3) = '1' else 'Z';
D_OE(3) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D4: FDCPE port map (D_I(4),D(4),CLK_EXT,'0','0');
D(4) <= ((IDE_CS_0_OBUF.EXP)
OR (NOT D(4) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND
NOT DQ(4).PIN)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND
NOT DQ(4).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(4).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(4).PIN)
OR (NOT D(4) AND UDS AND LDS)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(4).PIN AND NOT CP_CS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(4).PIN AND NOT CP_CS));
D(4) <= D_I(4) when D_OE(4) = '1' else 'Z';
D_OE(4) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D5: FDCPE port map (D_I(5),D(5),CLK_EXT,'0','0');
D(5) <= ((NOT D(5) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND
NOT DQ(5).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(5).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(5).PIN)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT DQ(13).PIN AND
NOT LDS AND CP_CS)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT DQ(13).PIN AND
NOT UDS AND CP_CS)
OR (NOT D(5) AND UDS AND LDS)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(5).PIN AND NOT CP_CS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(5).PIN AND NOT CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND
NOT DQ(5).PIN));
D(5) <= D_I(5) when D_OE(5) = '1' else 'Z';
D_OE(5) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D6: FDCPE port map (D_I(6),D(6),CLK_EXT,'0','0');
D(6) <= ((EXP34_.EXP)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(6).PIN AND NOT CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND
NOT DQ(6).PIN)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND
NOT DQ(6).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(6).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(6).PIN)
OR (NOT D(6) AND UDS AND LDS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(6).PIN AND NOT CP_CS));
D(6) <= D_I(6) when D_OE(6) = '1' else 'Z';
D_OE(6) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D7: FDCPE port map (D_I(7),D(7),CLK_EXT,'0','0');
D(7) <= ((D_OUT(3).EXP)
OR (NOT D(7) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND
NOT DQ(7).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(7).PIN)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(7).PIN)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT DQ(15).PIN AND
NOT LDS AND CP_CS)
OR (NOT D(7) AND UDS AND LDS)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(7).PIN AND NOT CP_CS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(7).PIN AND NOT CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND
NOT DQ(7).PIN));
D(7) <= D_I(7) when D_OE(7) = '1' else 'Z';
D_OE(7) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D8: FDCPE port map (D_I(8),D(8),CLK_EXT,'0','0');
D(8) <= ((D_OUT(13)/D_OUT(13)_TRST__$INT.EXP)
OR (NOT D(8) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND
NOT DQ(0).PIN)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND
NOT DQ(0).PIN)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT DQ(8).PIN AND
NOT LDS AND CP_CS)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT DQ(8).PIN AND NOT LDS AND
CP_CS)
OR (NOT D(8) AND UDS AND LDS)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(0).PIN AND NOT CP_CS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(0).PIN AND NOT CP_CS));
D(8) <= D_I(8) when D_OE(8) = '1' else 'Z';
D_OE(8) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D9: FDCPE port map (D_I(9),D(9),CLK_EXT,'0','0');
D(9) <= ((D_OUT(2).EXP)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(1).PIN AND NOT CP_CS)
OR (NOT D(9) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND
NOT DQ(1).PIN)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND
NOT DQ(1).PIN)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT DQ(9).PIN AND
NOT LDS AND CP_CS)
OR (NOT D(9) AND UDS AND LDS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(1).PIN AND NOT CP_CS));
D(9) <= D_I(9) when D_OE(9) = '1' else 'Z';
D_OE(9) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D10: FDCPE port map (D_I(10),D(10),CLK_EXT,'0','0');
D(10) <= ((D_OUT(9).EXP)
OR (NOT D(10) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND
NOT DQ(2).PIN)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND
NOT DQ(2).PIN)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT DQ(10).PIN AND
NOT LDS AND CP_CS)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT DQ(10).PIN AND NOT LDS AND
CP_CS)
OR (NOT D(10) AND UDS AND LDS)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(2).PIN AND NOT CP_CS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(2).PIN AND NOT CP_CS));
D(10) <= D_I(10) when D_OE(10) = '1' else 'Z';
D_OE(10) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D11: FDCPE port map (D_I(11),D(11),CLK_EXT,'0','0');
D(11) <= ((lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND
NOT DQ(3).PIN)
OR (NOT D(11) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT DQ(11).PIN AND
NOT UDS AND CP_CS)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT DQ(11).PIN AND
NOT LDS AND CP_CS)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT DQ(11).PIN AND NOT UDS AND
CP_CS)
OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT DQ(11).PIN AND NOT LDS AND
CP_CS)
OR (NOT D(11) AND UDS AND LDS)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(3).PIN AND NOT CP_CS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(3).PIN AND NOT CP_CS)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND
NOT DQ(3).PIN));
D(11) <= D_I(11) when D_OE(11) = '1' else 'Z';
D_OE(11) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D12: FDCPE port map (D_I(12),D(12),CLK_EXT,'0','0');
D(12) <= ((AS_D.EXP)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(4).PIN AND NOT CP_CS)
OR (NOT D(12) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND
NOT DQ(4).PIN)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND
NOT DQ(4).PIN)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT DQ(12).PIN AND
NOT LDS AND CP_CS)
OR (NOT D(12) AND UDS AND LDS)
OR (NOT Dout1(0) AND autoconfig AND NOT UDS)
OR (NOT Dout1(0) AND autoconfig AND NOT LDS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(4).PIN AND NOT CP_CS));
D(12) <= D_I(12) when D_OE(12) = '1' else 'Z';
D_OE(12) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D13: FDCPE port map (D_I(13),D(13),CLK_EXT,'0','0');
D(13) <= ((D_OUT(14).EXP)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(5).PIN AND NOT CP_CS)
OR (NOT D(13) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND
NOT DQ(5).PIN)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND
NOT DQ(5).PIN)
OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT DQ(13).PIN AND
NOT LDS AND CP_CS)
OR (NOT D(13) AND UDS AND LDS)
OR (NOT Dout1(1) AND autoconfig AND NOT UDS)
OR (NOT Dout1(1) AND autoconfig AND NOT LDS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(5).PIN AND NOT CP_CS));
D(13) <= D_I(13) when D_OE(13) = '1' else 'Z';
D_OE(13) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D14: FDCPE port map (D_I(14),D(14),CLK_EXT,'0','0');
D(14) <= ((EXP63_.EXP)
OR (NOT D(14) AND UDS AND LDS)
OR (NOT Dout1(2) AND autoconfig AND NOT UDS)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(6).PIN AND NOT CP_CS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(6).PIN AND NOT CP_CS)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND
NOT DQ(6).PIN)
OR (NOT Dout1(2) AND autoconfig AND NOT LDS));
D(14) <= D_I(14) when D_OE(14) = '1' else 'Z';
D_OE(14) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_D15: FDCPE port map (D_I(15),D(15),CLK_EXT,'0','0');
D(15) <= ((EXP64_.EXP)
OR (NOT D(15) AND UDS AND LDS)
OR (NOT autoconfig AND NOT UDS AND NOT DQ(7).PIN AND NOT CP_CS)
OR (NOT autoconfig AND NOT LDS AND NOT DQ(7).PIN AND NOT CP_CS)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND
NOT DQ(7).PIN)
OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND
NOT DQ(7).PIN)
OR (NOT Dout1(3) AND autoconfig AND NOT UDS)
OR (NOT Dout1(3) AND autoconfig AND NOT LDS));
D(15) <= D_I(15) when D_OE(15) = '1' else 'Z';
D_OE(15) <= NOT D_OUT(13)/D_OUT(13)_TRST__$INT;
FDCPE_DQ0: FDCPE port map (DQ_I(0),DQ(0),CLK_EXT,'0','0');
DQ(0) <= ((_24_.EXP)
OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND D(0).PIN)
OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND D(0).PIN)
OR (D(8).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS)
OR (D(8).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS)
OR (D(8).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS)
OR (DQ(0) AND UDS AND LDS)
OR (ide AND NOT UDS AND D(0).PIN)
OR (ide AND NOT LDS AND D(0).PIN));
DQ(0) <= DQ_I(0) when DQ_OE(0) = '1' else 'Z';
DQ_OE(0) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
FDCPE_DQ1: FDCPE port map (DQ_I(1),DQ(1),CLK_EXT,'0','0');
DQ(1) <= ((lan_adr AND NOT lan_adr_sw AND NOT UDS AND D(1).PIN)
OR (D(9).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS)
OR (D(9).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS)
OR (D(9).PIN AND NOT lan_adr AND NOT ide AND NOT UDS AND NOT CP_CS)
OR (D(9).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS)
OR (DQ(1) AND NOT lan_adr AND NOT ide AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS)
OR (DQ(1) AND UDS AND LDS)
OR (ide AND NOT UDS AND D(1).PIN)
OR (ide AND NOT LDS AND D(1).PIN)
OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND D(1).PIN));
DQ(1) <= DQ_I(1) when DQ_OE(1) = '1' else 'Z';
DQ_OE(1) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
FDCPE_DQ2: FDCPE port map (DQ_I(2),DQ(2),CLK_EXT,'0','0');
DQ(2) <= ((_23_.EXP)
OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND D(2).PIN)
OR (D(10).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS)
OR (D(10).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS)
OR (D(10).PIN AND NOT lan_adr AND NOT ide AND NOT UDS AND NOT CP_CS)
OR (D(10).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS)
OR (DQ(2) AND UDS AND LDS)
OR (ide AND NOT UDS AND D(2).PIN)
OR (ide AND NOT LDS AND D(2).PIN)
OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND D(2).PIN));
DQ(2) <= DQ_I(2) when DQ_OE(2) = '1' else 'Z';
DQ_OE(2) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
DQ_I(3) <= DQ(3)_BUFR;
DQ(3) <= DQ_I(3) when DQ_OE(3) = '1' else 'Z';
DQ_OE(3) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
FDCPE_DQ3_BUFR: FDCPE port map (DQ(3)_BUFR,DQ_D(3)_BUFR,CLK_EXT,'0','0');
DQ_D(3)_BUFR <= ((D(11).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS)
OR (D(11).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS)
OR (D(11).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS)
OR (D(11).PIN AND NOT lan_adr AND NOT ide AND NOT UDS AND NOT CP_CS)
OR (DQ(3) AND NOT lan_adr AND NOT ide AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS)
OR (DQ(3) AND UDS AND LDS)
OR (ide AND NOT UDS AND D(3).PIN)
OR (ide AND NOT LDS AND D(3).PIN)
OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND D(3).PIN)
OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND D(3).PIN));
DQ_I(4) <= DQ(4)_BUFR;
DQ(4) <= DQ_I(4) when DQ_OE(4) = '1' else 'Z';
DQ_OE(4) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
FTCPE_DQ4_BUFR: FTCPE port map (DQ(4)_BUFR,DQ_T(4)_BUFR,CLK_EXT,'0','0');
DQ_T(4)_BUFR <= ((DQ(4) AND lan_adr AND NOT lan_adr_sw AND D(4).PIN)
OR (DQ(4) AND D(12).PIN AND lan_adr AND NOT ide AND lan_adr_sw)
OR (DQ(4) AND D(12).PIN AND NOT lan_adr AND NOT ide AND NOT CP_CS)
OR (NOT DQ(4) AND NOT D(12).PIN AND NOT lan_adr AND NOT ide AND NOT CP_CS)
OR (UDS AND LDS)
OR (DQ(4) AND ide AND D(4).PIN)
OR (NOT DQ(4) AND ide AND NOT D(4).PIN)
OR (DQ(4) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd4 AND
CP_CS)
OR (NOT DQ(4) AND NOT lan_adr AND NOT ide AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND CP_CS)
OR (NOT DQ(4) AND lan_adr AND NOT lan_adr_sw AND NOT D(4).PIN)
OR (DQ(4) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd3 AND
CP_CS)
OR (DQ(4) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd2 AND
CP_CS)
OR (NOT DQ(4) AND NOT D(12).PIN AND lan_adr AND NOT ide AND lan_adr_sw)
OR (DQ(4) AND NOT lan_adr AND NOT ide AND NOT LAN_RST_SM_FSM_FFd6 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS));
FDCPE_DQ5_BUFR: FDCPE port map (DQ(5)_BUFR,DQ_D(5)_BUFR,CLK_EXT,'0','0');
DQ_D(5)_BUFR <= ((A_LAN_OUT(2).EXP)
OR (ide AND NOT UDS AND D(5).PIN)
OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND D(5).PIN)
OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND D(5).PIN)
OR (D(13).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS)
OR (D(13).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS)
OR (DQ(5) AND UDS AND LDS)
OR (ide AND NOT LDS AND D(5).PIN));
DQ_I(5) <= DQ(5)_BUFR;
DQ(5) <= DQ_I(5) when DQ_OE(5) = '1' else 'Z';
DQ_OE(5) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
DQ_I(6) <= DQ(6)_BUFR;
DQ(6) <= DQ_I(6) when DQ_OE(6) = '1' else 'Z';
DQ_OE(6) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
FDCPE_DQ6_BUFR: FDCPE port map (DQ(6)_BUFR,DQ_D(6)_BUFR,CLK_EXT,'0','0');
DQ_D(6)_BUFR <= ((DQ(7)_BUFR.EXP)
OR (ide AND NOT UDS AND D(6).PIN)
OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND D(6).PIN)
OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND D(6).PIN)
OR (D(14).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS)
OR (D(14).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS)
OR (DQ(6) AND UDS AND LDS)
OR (ide AND NOT LDS AND D(6).PIN));
DQ_I(7) <= DQ(7)_BUFR;
DQ(7) <= DQ_I(7) when DQ_OE(7) = '1' else 'Z';
DQ_OE(7) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
FDCPE_DQ7_BUFR: FDCPE port map (DQ(7)_BUFR,DQ_D(7)_BUFR,CLK_EXT,'0','0');
DQ_D(7)_BUFR <= ((CP_BASEADR(4).EXP)
OR (ide AND NOT UDS AND D(7).PIN)
OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND D(7).PIN)
OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND D(7).PIN)
OR (D(15).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS)
OR (D(15).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS)
OR (DQ(7) AND UDS AND LDS)
OR (ide AND NOT LDS AND D(7).PIN));
FTCPE_DQ8_BUFR: FTCPE port map (DQ(8)_BUFR,DQ_T(8)_BUFR,CLK_EXT,'0','0');
DQ_T(8)_BUFR <= ((A_LAN_OUT(1).EXP)
OR (NOT DQ(8) AND NOT D(8).PIN AND ide)
OR (DQ(8) AND D(8).PIN AND lan_adr AND NOT lan_adr_sw)
OR (NOT DQ(8) AND NOT D(8).PIN AND lan_adr AND NOT lan_adr_sw)
OR (DQ(8) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd3 AND
CP_CS)
OR (DQ(8) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd2 AND
CP_CS)
OR (UDS AND LDS)
OR (DQ(8) AND D(8).PIN AND ide)
OR (DQ(8) AND D(8).PIN AND NOT CP_CS)
OR (NOT DQ(8) AND NOT D(8).PIN AND NOT CP_CS));
DQ_I(8) <= DQ(8)_BUFR;
DQ(8) <= DQ_I(8) when DQ_OE(8) = '1' else 'Z';
DQ_OE(8) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
DQ_I(9) <= DQ(9)_BUFR;
DQ(9) <= DQ_I(9) when DQ_OE(9) = '1' else 'Z';
DQ_OE(9) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
FTCPE_DQ9_BUFR: FTCPE port map (DQ(9)_BUFR,DQ_T(9)_BUFR,CLK_EXT,'0','0');
DQ_T(9)_BUFR <= ((DQ(9) AND D(9).PIN AND lan_adr AND NOT lan_adr_sw)
OR (NOT DQ(9) AND NOT D(9).PIN AND lan_adr AND NOT lan_adr_sw)
OR (DQ(9) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd6 AND
CP_CS)
OR (_20_.EXP)
OR (DQ(9) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd5 AND
CP_CS)
OR (DQ(9) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd7 AND
CP_CS)
OR (DQ(9) AND lan_adr AND NOT ide AND lan_adr_sw AND D(1).PIN AND
CP_CS)
OR (NOT DQ(9) AND lan_adr AND NOT ide AND lan_adr_sw AND NOT D(1).PIN AND
CP_CS)
OR (DQ(9) AND NOT lan_adr AND NOT ide AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND CP_CS)
OR (UDS AND LDS)
OR (DQ(9) AND D(9).PIN AND ide)
OR (DQ(9) AND D(9).PIN AND NOT CP_CS)
OR (NOT DQ(9) AND NOT D(9).PIN AND ide)
OR (NOT DQ(9) AND NOT D(9).PIN AND NOT CP_CS));
DQ_I(10) <= DQ(10)_BUFR;
DQ(10) <= DQ_I(10) when DQ_OE(10) = '1' else 'Z';
DQ_OE(10) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
FTCPE_DQ10_BUFR: FTCPE port map (DQ(10)_BUFR,DQ_T(10)_BUFR,CLK_EXT,'0','0');
DQ_T(10)_BUFR <= ((DQ(10) AND D(10).PIN AND lan_adr AND NOT lan_adr_sw)
OR (NOT DQ(10) AND NOT D(10).PIN AND lan_adr AND NOT lan_adr_sw)
OR (DQ(10) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd6 AND
CP_CS)
OR (DQ(10) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd5 AND
CP_CS)
OR (DQ(10) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd7 AND
CP_CS)
OR (DQ(10) AND lan_adr AND NOT ide AND lan_adr_sw AND D(2).PIN AND
CP_CS)
OR (NOT DQ(10) AND lan_adr AND NOT ide AND lan_adr_sw AND NOT D(2).PIN AND
CP_CS)
OR (DQ(10) AND NOT lan_adr AND NOT ide AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND CP_CS)
OR (NOT DQ(10) AND NOT lan_adr AND NOT ide AND NOT LAN_RST_SM_FSM_FFd6 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS)
OR (UDS AND LDS)
OR (DQ(10) AND D(10).PIN AND ide)
OR (DQ(10) AND D(10).PIN AND NOT CP_CS)
OR (NOT DQ(10) AND NOT D(10).PIN AND ide)
OR (NOT DQ(10) AND NOT D(10).PIN AND NOT CP_CS));
FTCPE_DQ11: FTCPE port map (DQ_I(11),DQ_T(11),CLK_EXT,'0','0');
DQ_T(11) <= ((NOT DQ(11) AND NOT D(11).PIN AND ide)
OR (DQ(11) AND D(11).PIN AND lan_adr AND NOT lan_adr_sw)
OR (NOT DQ(11) AND NOT D(11).PIN AND lan_adr AND NOT lan_adr_sw)
OR (DQ(11) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd6 AND
CP_CS)
OR (DQ(11) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd5 AND
CP_CS)
OR (DQ(11) AND NOT lan_adr AND NOT ide AND LAN_RST_SM_FSM_FFd7 AND
CP_CS)
OR (DQ(11) AND lan_adr AND NOT ide AND lan_adr_sw AND D(3).PIN AND
CP_CS)
OR (NOT DQ(11) AND lan_adr AND NOT ide AND lan_adr_sw AND NOT D(3).PIN AND
CP_CS)
OR (DQ(11) AND NOT lan_adr AND NOT ide AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND CP_CS)
OR (NOT DQ(11) AND NOT lan_adr AND NOT ide AND NOT LAN_RST_SM_FSM_FFd6 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS)
OR (UDS AND LDS)
OR (DQ(11) AND D(11).PIN AND ide)
OR (DQ(11) AND D(11).PIN AND NOT CP_CS)
OR (NOT DQ(11) AND NOT D(11).PIN AND NOT CP_CS));
DQ(11) <= DQ_I(11) when DQ_OE(11) = '1' else 'Z';
DQ_OE(11) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
FDCPE_DQ12: FDCPE port map (DQ_I(12),DQ(12),CLK_EXT,'0','0');
DQ(12) <= ((D(12).PIN AND ide AND NOT UDS)
OR (D(12).PIN AND lan_adr AND NOT lan_adr_sw AND NOT UDS)
OR (D(12).PIN AND lan_adr AND NOT lan_adr_sw AND NOT LDS)
OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS AND D(4).PIN AND
CP_CS)
OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS AND D(4).PIN AND
CP_CS)
OR (DQ(12) AND NOT lan_adr AND NOT ide AND NOT LAN_RST_SM_FSM_FFd3 AND
NOT LAN_RST_SM_FSM_FFd6 AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd4 AND
NOT LAN_RST_SM_FSM_FFd5 AND NOT LAN_RST_SM_FSM_FFd7 AND CP_CS)
OR (DQ(12) AND UDS AND LDS)
OR (D(12).PIN AND ide AND NOT LDS)
OR (D(12).PIN AND NOT UDS AND NOT CP_CS)
OR (D(12).PIN AND NOT LDS AND NOT CP_CS));
DQ(12) <= DQ_I(12) when DQ_OE(12) = '1' else 'Z';
DQ_OE(12) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
FDCPE_DQ13: FDCPE port map (DQ_I(13),DQ(13),CLK_EXT,'0','0');
DQ(13) <= ((LAN_WRH_S.EXP)
OR (D(13).PIN AND ide AND NOT UDS)
OR (D(13).PIN AND lan_adr AND NOT lan_adr_sw AND NOT UDS)
OR (D(13).PIN AND lan_adr AND NOT lan_adr_sw AND NOT LDS)
OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS AND D(5).PIN AND
CP_CS)
OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS AND D(5).PIN AND
CP_CS)
OR (DQ(13) AND UDS AND LDS)
OR (D(13).PIN AND ide AND NOT LDS)
OR (D(13).PIN AND NOT UDS AND NOT CP_CS)
OR (D(13).PIN AND NOT LDS AND NOT CP_CS));
DQ(13) <= DQ_I(13) when DQ_OE(13) = '1' else 'Z';
DQ_OE(13) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
FDCPE_DQ14: FDCPE port map (DQ_I(14),DQ(14),CLK_EXT,'0','0');
DQ(14) <= ((LAN_WRH_OBUF.EXP)
OR (D(14).PIN AND ide AND NOT UDS)
OR (D(14).PIN AND ide AND NOT LDS)
OR (D(14).PIN AND NOT UDS AND NOT CP_CS)
OR (D(14).PIN AND NOT LDS AND NOT CP_CS)
OR (D(14).PIN AND lan_adr AND NOT lan_adr_sw AND NOT LDS)
OR (DQ(14) AND UDS AND LDS));
DQ(14) <= DQ_I(14) when DQ_OE(14) = '1' else 'Z';
DQ_OE(14) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
FDCPE_DQ15: FDCPE port map (DQ_I(15),DQ(15),CLK_EXT,'0','0');
DQ(15) <= ((LAN_WRL_S.EXP)
OR (D(15).PIN AND ide AND NOT UDS)
OR (D(15).PIN AND lan_adr AND NOT lan_adr_sw AND NOT UDS)
OR (D(15).PIN AND lan_adr AND NOT lan_adr_sw AND NOT LDS)
OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS AND D(7).PIN AND
CP_CS)
OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS AND D(7).PIN AND
CP_CS)
OR (DQ(15) AND UDS AND LDS)
OR (D(15).PIN AND ide AND NOT LDS)
OR (D(15).PIN AND NOT UDS AND NOT CP_CS)
OR (D(15).PIN AND NOT LDS AND NOT CP_CS));
DQ(15) <= DQ_I(15) when DQ_OE(15) = '1' else 'Z';
DQ_OE(15) <= NOT D_IN(10)/D_IN(10)_TRST__$INT;
DTACK_I <= '0';
DTACK <= DTACK_I when DTACK_OE = '1' else 'Z';
DTACK_OE <= '0';
D_IN(10)/D_IN(10)_TRST__$INT <= ((AS AND NOT SET_FREQUENCY)
OR (RW AND NOT SET_FREQUENCY)
OR (NOT lan_adr AND NOT ide AND NOT SET_FREQUENCY AND CP_CS));
D_OUT(13)/D_OUT(13)_TRST__$INT <= ((NOT RW)
OR (AS AND AS_D)
OR (NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS));
Dout1(0)/Dout1(0)_CLKF <= C3
XOR
Dout1(0)/Dout1(0)_CLKF <= C1;
FDCPE_Dout10: FDCPE port map (Dout1(0),Dout1_D(0),Dout1(0)/Dout1(0)_CLKF,'0',NOT RESET);
Dout1_D(0) <= ((IDE_W_OBUF.EXP)
OR (NOT AS AND A(5) AND NOT A(4) AND A(1) AND NOT A(6) AND autoconfig AND
A(2) AND NOT UDS)
OR (NOT AS AND A(5) AND NOT A(4) AND NOT A(6) AND NOT A(3) AND autoconfig AND
A(2) AND NOT UDS)
OR (NOT AS AND NOT A(5) AND A(4) AND A(1) AND NOT A(6) AND A(3) AND
autoconfig AND NOT UDS)
OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(6) AND NOT A(3) AND autoconfig AND
NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT A(5) AND NOT A(1) AND NOT A(6) AND
NOT A(3) AND autoconfig AND A(2) AND NOT LDS)
OR (AUTO_CONFIG_DONE(1).EXP)
OR (NOT AS AND A(5) AND NOT A(4) AND A(1) AND NOT A(6) AND autoconfig AND
A(2) AND NOT LDS)
OR (NOT AS AND A(5) AND NOT A(4) AND NOT A(6) AND NOT A(3) AND autoconfig AND
A(2) AND NOT LDS)
OR (NOT AS AND NOT A(5) AND A(4) AND A(1) AND NOT A(6) AND A(3) AND
autoconfig AND NOT LDS)
OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(6) AND A(3) AND autoconfig AND
NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(6) AND NOT A(3) AND autoconfig AND
NOT A(2) AND NOT LDS)
OR (AS AND NOT Dout1(0))
OR (NOT Dout1(0) AND NOT autoconfig)
OR (NOT Dout1(0) AND UDS AND LDS)
OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(6) AND A(3) AND autoconfig AND
NOT A(2) AND NOT LDS));
FDCPE_Dout11: FDCPE port map (Dout1(1),Dout1_D(1),Dout1(1)/Dout1(1)_CLKF,'0',NOT RESET);
Dout1_D(1) <= ((D_OUT(15).EXP)
OR (NOT AS AND NOT A(5) AND NOT A(4) AND NOT A(3) AND autoconfig AND NOT A(2) AND
NOT UDS)
OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(1) AND NOT A(6) AND A(3) AND
autoconfig AND NOT UDS)
OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(1) AND NOT A(6) AND A(3) AND
autoconfig AND NOT LDS)
OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(6) AND A(3) AND autoconfig AND
A(2) AND NOT UDS)
OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(6) AND A(3) AND autoconfig AND
A(2) AND NOT LDS)
OR (EXP68_.EXP)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT A(5) AND A(1) AND NOT A(6) AND
NOT A(3) AND autoconfig AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT A(4) AND NOT A(1) AND NOT A(6) AND
NOT A(3) AND autoconfig AND A(2) AND NOT LDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND NOT A(5) AND A(4) AND NOT A(1) AND
NOT A(6) AND autoconfig AND A(2) AND NOT LDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND NOT A(5) AND NOT A(4) AND A(1) AND
NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS)
OR (NOT AS AND A(5) AND NOT A(4) AND NOT A(1) AND NOT A(6) AND NOT A(3) AND
autoconfig AND A(2) AND NOT LDS)
OR (AS AND NOT Dout1(1))
OR (NOT Dout1(1) AND NOT autoconfig)
OR (NOT Dout1(1) AND UDS AND LDS)
OR (NOT AS AND NOT A(5) AND NOT A(4) AND NOT A(3) AND autoconfig AND NOT A(2) AND
NOT LDS));
Dout1(1)/Dout1(1)_CLKF <= C3
XOR
Dout1(1)/Dout1(1)_CLKF <= C1;
FDCPE_Dout12: FDCPE port map (Dout1(2),Dout1_D(2),Dout1(2)/Dout1(2)_CLKF,'0',NOT RESET);
Dout1_D(2) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND NOT A(4) AND A(1) AND NOT A(6) AND
NOT A(3) AND autoconfig AND A(2) AND NOT LDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(0) AND NOT A(4) AND A(1) AND NOT A(6) AND
NOT A(3) AND autoconfig AND A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(0) AND NOT A(4) AND A(1) AND NOT A(6) AND
NOT A(3) AND autoconfig AND A(2) AND NOT LDS)
OR (NOT AS AND A(5) AND NOT A(4) AND A(1) AND NOT A(6) AND NOT A(3) AND
autoconfig AND A(2) AND NOT UDS)
OR (NOT AS AND NOT A(5) AND A(4) AND A(1) AND NOT A(6) AND NOT A(3) AND
autoconfig AND A(2) AND NOT UDS)
OR (EXP69_.EXP)
OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(1) AND NOT A(3) AND autoconfig AND
NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(1) AND NOT A(3) AND autoconfig AND
NOT A(2) AND NOT LDS)
OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(6) AND NOT A(3) AND autoconfig AND
NOT A(2) AND NOT UDS)
OR (NOT AS AND A(5) AND NOT A(4) AND A(1) AND NOT A(6) AND NOT A(3) AND
autoconfig AND A(2) AND NOT LDS)
OR (NOT AS AND NOT A(5) AND A(4) AND A(1) AND NOT A(6) AND NOT A(3) AND
autoconfig AND A(2) AND NOT LDS)
OR (AS AND NOT Dout1(2))
OR (NOT Dout1(2) AND NOT autoconfig)
OR (NOT Dout1(2) AND UDS AND LDS)
OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(6) AND NOT A(3) AND autoconfig AND
NOT A(2) AND NOT LDS));
Dout1(2)/Dout1(2)_CLKF <= C3
XOR
Dout1(2)/Dout1(2)_CLKF <= C1;
Dout1(3)/Dout1(3)_CLKF <= C3
XOR
Dout1(3)/Dout1(3)_CLKF <= C1;
FDCPE_Dout13: FDCPE port map (Dout1(3),Dout1_D(3),Dout1(3)/Dout1(3)_CLKF,'0',NOT RESET);
Dout1_D(3) <= ((NOT Dout1(3) AND UDS AND LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT A(5) AND A(1) AND NOT A(6) AND
NOT A(3) AND autoconfig AND NOT LDS)
OR (NOT AS AND NOT A(5) AND A(4) AND A(1) AND NOT A(6) AND autoconfig AND
A(2) AND NOT UDS)
OR (NOT AS AND NOT A(5) AND A(4) AND A(1) AND NOT A(6) AND autoconfig AND
A(2) AND NOT LDS)
OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(6) AND NOT A(3) AND autoconfig AND
NOT A(2) AND NOT LDS)
OR (LAN_IRQ_D0.EXP)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT A(5) AND A(1) AND NOT A(6) AND
NOT A(3) AND autoconfig AND NOT UDS)
OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(6) AND NOT A(3) AND autoconfig AND
NOT A(2) AND NOT UDS)
OR (NOT AS AND A(5) AND NOT A(4) AND NOT A(1) AND NOT A(6) AND NOT A(3) AND
autoconfig AND A(2) AND NOT LDS)
OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(1) AND NOT A(6) AND A(3) AND
autoconfig AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(1) AND NOT A(6) AND A(3) AND
autoconfig AND NOT A(2) AND NOT LDS)
OR (AS AND NOT Dout1(3))
OR (NOT Dout1(3) AND NOT autoconfig)
OR (NOT AS AND NOT A(5) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND
NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT A(5) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND
NOT A(2) AND NOT LDS));
IDE_A(0) <= A(9);
IDE_A(1) <= A(10);
IDE_A(2) <= A(11);
IDE_BASEADR(0)/IDE_BASEADR(0)_CLKF <= C3
XOR
IDE_BASEADR(0)/IDE_BASEADR(0)_CLKF <= C1;
FTCPE_IDE_BASEADR0: FTCPE port map (IDE_BASEADR(0),IDE_BASEADR_T(0),IDE_BASEADR(0)/IDE_BASEADR(0)_CLKF,'0',NOT RESET);
IDE_BASEADR_T(0) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(8).PIN AND NOT IDE_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(8).PIN AND NOT IDE_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(8).PIN AND IDE_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(8).PIN AND IDE_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
FTCPE_IDE_BASEADR1: FTCPE port map (IDE_BASEADR(1),IDE_BASEADR_T(1),IDE_BASEADR(1)/IDE_BASEADR(1)_CLKF,'0',NOT RESET);
IDE_BASEADR_T(1) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(9).PIN AND NOT IDE_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(9).PIN AND NOT IDE_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(9).PIN AND IDE_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(9).PIN AND IDE_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
IDE_BASEADR(1)/IDE_BASEADR(1)_CLKF <= C3
XOR
IDE_BASEADR(1)/IDE_BASEADR(1)_CLKF <= C1;
IDE_BASEADR(2)/IDE_BASEADR(2)_CLKF <= C3
XOR
IDE_BASEADR(2)/IDE_BASEADR(2)_CLKF <= C1;
FTCPE_IDE_BASEADR2: FTCPE port map (IDE_BASEADR(2),IDE_BASEADR_T(2),IDE_BASEADR(2)/IDE_BASEADR(2)_CLKF,'0',NOT RESET);
IDE_BASEADR_T(2) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(10).PIN AND NOT IDE_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(10).PIN AND NOT IDE_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(10).PIN AND IDE_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(10).PIN AND IDE_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
IDE_BASEADR(3)/IDE_BASEADR(3)_CLKF <= C3
XOR
IDE_BASEADR(3)/IDE_BASEADR(3)_CLKF <= C1;
FTCPE_IDE_BASEADR3: FTCPE port map (IDE_BASEADR(3),IDE_BASEADR_T(3),IDE_BASEADR(3)/IDE_BASEADR(3)_CLKF,'0',NOT RESET);
IDE_BASEADR_T(3) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(11).PIN AND NOT IDE_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(11).PIN AND NOT IDE_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(11).PIN AND IDE_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(11).PIN AND IDE_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
FTCPE_IDE_BASEADR4: FTCPE port map (IDE_BASEADR(4),IDE_BASEADR_T(4),IDE_BASEADR(4)/IDE_BASEADR(4)_CLKF,'0',NOT RESET);
IDE_BASEADR_T(4) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(12).PIN AND NOT IDE_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(12).PIN AND NOT IDE_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(12).PIN AND IDE_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(12).PIN AND IDE_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
IDE_BASEADR(4)/IDE_BASEADR(4)_CLKF <= C3
XOR
IDE_BASEADR(4)/IDE_BASEADR(4)_CLKF <= C1;
FTCPE_IDE_BASEADR5: FTCPE port map (IDE_BASEADR(5),IDE_BASEADR_T(5),IDE_BASEADR(5)/IDE_BASEADR(5)_CLKF,'0',NOT RESET);
IDE_BASEADR_T(5) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(13).PIN AND NOT IDE_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(13).PIN AND NOT IDE_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(13).PIN AND IDE_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(13).PIN AND IDE_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
IDE_BASEADR(5)/IDE_BASEADR(5)_CLKF <= C3
XOR
IDE_BASEADR(5)/IDE_BASEADR(5)_CLKF <= C1;
IDE_BASEADR(6)/IDE_BASEADR(6)_CLKF <= C3
XOR
IDE_BASEADR(6)/IDE_BASEADR(6)_CLKF <= C1;
FTCPE_IDE_BASEADR6: FTCPE port map (IDE_BASEADR(6),IDE_BASEADR_T(6),IDE_BASEADR(6)/IDE_BASEADR(6)_CLKF,'0',NOT RESET);
IDE_BASEADR_T(6) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(14).PIN AND NOT IDE_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(14).PIN AND NOT IDE_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(14).PIN AND IDE_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(14).PIN AND IDE_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
FTCPE_IDE_BASEADR7: FTCPE port map (IDE_BASEADR(7),IDE_BASEADR_T(7),IDE_BASEADR(7)/IDE_BASEADR(7)_CLKF,'0',NOT RESET);
IDE_BASEADR_T(7) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(15).PIN AND NOT IDE_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(15).PIN AND NOT IDE_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(15).PIN AND IDE_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(15).PIN AND IDE_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
IDE_BASEADR(7)/IDE_BASEADR(7)_CLKF <= C3
XOR
IDE_BASEADR(7)/IDE_BASEADR(7)_CLKF <= C1;
IDE_CS(0) <= NOT A(12);
IDE_CS(1) <= NOT A(13);
FDCPE_IDE_ENABLE: FDCPE port map (IDE_ENABLE,'0',IDE_ENABLE/IDE_ENABLE_CLKF,'0',NOT RESET,IDE_ENABLE_CE);
IDE_ENABLE_CE <= (NOT AS AND NOT RW AND ide);
IDE_ENABLE/IDE_ENABLE_CLKF <= C3
XOR
IDE_ENABLE/IDE_ENABLE_CLKF <= C1;
IDE_R <= NOT ((NOT AS AND NOT IDE_R_S));
FDCPE_IDE_R_S: FDCPE port map (IDE_R_S,IDE_R_S_D,IDE_R_S/IDE_R_S_CLKF,'0',NOT RESET);
IDE_R_S_D <= (NOT AS AND RW AND ide AND NOT IDE_ENABLE);
IDE_R_S/IDE_R_S_CLKF <= C3
XOR
IDE_R_S/IDE_R_S_CLKF <= C1;
IDE_W <= NOT ((NOT AS AND NOT IDE_W_S));
FDCPE_IDE_W_S: FDCPE port map (IDE_W_S,IDE_W_S_D,IDE_W_S/IDE_W_S_CLKF,'0',NOT RESET);
IDE_W_S_D <= (NOT AS AND NOT RW AND ide);
IDE_W_S/IDE_W_S_CLKF <= C3
XOR
IDE_W_S/IDE_W_S_CLKF <= C1;
INT2_OUT_I <= '0';
INT2_OUT <= INT2_OUT_I when INT2_OUT_OE = '1' else 'Z';
INT2_OUT_OE <= (NOT LAN_INT_ENABLE AND NOT LAN_IRQ_OUT);
INT6_OUT_I <= '0';
INT6_OUT <= INT6_OUT_I when INT6_OUT_OE = '1' else 'Z';
INT6_OUT_OE <= NOT CP_IRQ;
LAN_BASEADR(0)/LAN_BASEADR(0)_CLKF <= C3
XOR
LAN_BASEADR(0)/LAN_BASEADR(0)_CLKF <= C1;
FTCPE_LAN_BASEADR0: FTCPE port map (LAN_BASEADR(0),LAN_BASEADR_T(0),LAN_BASEADR(0)/LAN_BASEADR(0)_CLKF,'0',NOT RESET);
LAN_BASEADR_T(0) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(8).PIN AND NOT LAN_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(8).PIN AND NOT LAN_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(8).PIN AND LAN_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(8).PIN AND LAN_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
FTCPE_LAN_BASEADR1: FTCPE port map (LAN_BASEADR(1),LAN_BASEADR_T(1),LAN_BASEADR(1)/LAN_BASEADR(1)_CLKF,'0',NOT RESET);
LAN_BASEADR_T(1) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(9).PIN AND NOT LAN_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(9).PIN AND NOT LAN_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(9).PIN AND LAN_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(9).PIN AND LAN_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
LAN_BASEADR(1)/LAN_BASEADR(1)_CLKF <= C3
XOR
LAN_BASEADR(1)/LAN_BASEADR(1)_CLKF <= C1;
LAN_BASEADR(2)/LAN_BASEADR(2)_CLKF <= C3
XOR
LAN_BASEADR(2)/LAN_BASEADR(2)_CLKF <= C1;
FTCPE_LAN_BASEADR2: FTCPE port map (LAN_BASEADR(2),LAN_BASEADR_T(2),LAN_BASEADR(2)/LAN_BASEADR(2)_CLKF,'0',NOT RESET);
LAN_BASEADR_T(2) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(10).PIN AND NOT LAN_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(10).PIN AND NOT LAN_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(10).PIN AND LAN_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(10).PIN AND LAN_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
LAN_BASEADR(3)/LAN_BASEADR(3)_CLKF <= C3
XOR
LAN_BASEADR(3)/LAN_BASEADR(3)_CLKF <= C1;
FTCPE_LAN_BASEADR3: FTCPE port map (LAN_BASEADR(3),LAN_BASEADR_T(3),LAN_BASEADR(3)/LAN_BASEADR(3)_CLKF,'0',NOT RESET);
LAN_BASEADR_T(3) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(11).PIN AND NOT LAN_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(11).PIN AND NOT LAN_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(11).PIN AND LAN_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(11).PIN AND LAN_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
FTCPE_LAN_BASEADR4: FTCPE port map (LAN_BASEADR(4),LAN_BASEADR_T(4),LAN_BASEADR(4)/LAN_BASEADR(4)_CLKF,'0',NOT RESET);
LAN_BASEADR_T(4) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(12).PIN AND NOT LAN_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(12).PIN AND NOT LAN_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(12).PIN AND LAN_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(12).PIN AND LAN_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
LAN_BASEADR(4)/LAN_BASEADR(4)_CLKF <= C3
XOR
LAN_BASEADR(4)/LAN_BASEADR(4)_CLKF <= C1;
LAN_BASEADR(5)/LAN_BASEADR(5)_CLKF <= C3
XOR
LAN_BASEADR(5)/LAN_BASEADR(5)_CLKF <= C1;
FTCPE_LAN_BASEADR5: FTCPE port map (LAN_BASEADR(5),LAN_BASEADR_T(5),LAN_BASEADR(5)/LAN_BASEADR(5)_CLKF,'0',NOT RESET);
LAN_BASEADR_T(5) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(13).PIN AND NOT LAN_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(13).PIN AND NOT LAN_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(13).PIN AND LAN_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(13).PIN AND LAN_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
FTCPE_LAN_BASEADR6: FTCPE port map (LAN_BASEADR(6),LAN_BASEADR_T(6),LAN_BASEADR(6)/LAN_BASEADR(6)_CLKF,'0',NOT RESET);
LAN_BASEADR_T(6) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(14).PIN AND NOT LAN_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(14).PIN AND NOT LAN_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(14).PIN AND LAN_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(14).PIN AND LAN_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
LAN_BASEADR(6)/LAN_BASEADR(6)_CLKF <= C3
XOR
LAN_BASEADR(6)/LAN_BASEADR(6)_CLKF <= C1;
FTCPE_LAN_BASEADR7: FTCPE port map (LAN_BASEADR(7),LAN_BASEADR_T(7),LAN_BASEADR(7)/LAN_BASEADR(7)_CLKF,'0',NOT RESET);
LAN_BASEADR_T(7) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(15).PIN AND NOT LAN_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
D(15).PIN AND NOT LAN_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(15).PIN AND LAN_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT D(15).PIN AND LAN_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND
A(3) AND autoconfig AND NOT RW AND NOT A(2) AND NOT LDS));
LAN_BASEADR(7)/LAN_BASEADR(7)_CLKF <= C3
XOR
LAN_BASEADR(7)/LAN_BASEADR(7)_CLKF <= C1;
LAN_CS <= ((lan_adr AND LAN_RST_SM_FSM_FFd1)
OR (NOT LAN_RST_SM_FSM_FFd1 AND LAN_CS_RST));
FDCPE_LAN_CS_RST: FDCPE port map (LAN_CS_RST,LAN_CS_RST_D,CLK_EXT,'0','0');
LAN_CS_RST_D <= ((RESET AND NOT LAN_RST_SM_FSM_FFd1 AND
NOT LAN_RST_SM_FSM_FFd8)
OR (NOT LAN_RST_SM_FSM_FFd1 AND NOT SET_FREQUENCY AND
NOT LAN_RST_SM_FSM_FFd8));
FTCPE_LAN_INT_ENABLE: FTCPE port map (LAN_INT_ENABLE,LAN_INT_ENABLE_T,LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF,'0',NOT RESET);
LAN_INT_ENABLE_T <= ((D(15).PIN AND LAN_INT_ENABLE AND lan_adr AND NOT RW AND
A(15) AND NOT UDS)
OR (D(15).PIN AND LAN_INT_ENABLE AND lan_adr AND NOT RW AND
A(15) AND NOT LDS)
OR (NOT D(15).PIN AND NOT LAN_INT_ENABLE AND lan_adr AND NOT RW AND
A(15) AND NOT UDS)
OR (NOT D(15).PIN AND NOT LAN_INT_ENABLE AND lan_adr AND NOT RW AND
A(15) AND NOT LDS));
LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF <= C3
XOR
LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF <= C1;
FDCPE_LAN_IRQ_D0: FDCPE port map (LAN_IRQ_D0,LAN_INT,LAN_IRQ_D0/LAN_IRQ_D0_CLKF,'0',NOT RESET);
LAN_IRQ_D0/LAN_IRQ_D0_CLKF <= C3
XOR
LAN_IRQ_D0/LAN_IRQ_D0_CLKF <= C1;
FDCPE_LAN_IRQ_OUT: FDCPE port map (LAN_IRQ_OUT,LAN_IRQ_OUT_D,LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF,'0',NOT RESET);
LAN_IRQ_OUT_D <= ((NOT LAN_INT AND LAN_IRQ_D0)
OR (NOT LAN_INT_ENABLE AND NOT D(14).PIN AND NOT LAN_INT AND lan_adr AND
NOT RW AND A(15) AND NOT UDS)
OR (NOT LAN_INT_ENABLE AND NOT D(14).PIN AND NOT LAN_INT AND lan_adr AND
NOT RW AND A(15) AND NOT LDS)
OR (NOT LAN_INT_ENABLE AND NOT LAN_IRQ_OUT AND NOT LAN_INT AND
NOT lan_adr)
OR (NOT LAN_INT_ENABLE AND NOT LAN_IRQ_OUT AND NOT LAN_INT AND RW)
OR (NOT LAN_INT_ENABLE AND NOT LAN_IRQ_OUT AND NOT LAN_INT AND NOT A(15))
OR (NOT LAN_INT_ENABLE AND NOT LAN_IRQ_OUT AND NOT LAN_INT AND UDS AND
LDS));
LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF <= C3
XOR
LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF <= C1;
LAN_RD <= ((NOT AS AND NOT LAN_RD_S AND LAN_RST_SM_FSM_FFd1)
OR (NOT LAN_RD_S AND LAN_RST_SM_FSM_FFd1 AND NOT AS_D));
FDCPE_LAN_RD_S: FDCPE port map (LAN_RD_S,LAN_RD_S_D,LAN_RD_S/LAN_RD_S_CLKF,'0',NOT RESET);
LAN_RD_S_D <= ((lan_adr AND RW AND NOT A(15) AND NOT UDS)
OR (lan_adr AND RW AND NOT A(15) AND NOT LDS));
LAN_RD_S/LAN_RD_S_CLKF <= C3
XOR
LAN_RD_S/LAN_RD_S_CLKF <= C1;
FDCPE_LAN_RST_SM_FSM_FFd1: FDCPE port map (LAN_RST_SM_FSM_FFd1,LAN_RST_SM_FSM_FFd1_D,CLK_EXT,'0','0');
LAN_RST_SM_FSM_FFd1_D <= ((NOT RESET AND SET_FREQUENCY)
OR (NOT LAN_RST_SM_FSM_FFd1 AND NOT LAN_RST_SM_FSM_FFd2));
FDCPE_LAN_RST_SM_FSM_FFd2: FDCPE port map (LAN_RST_SM_FSM_FFd2,LAN_RST_SM_FSM_FFd2_D,CLK_EXT,'0','0');
LAN_RST_SM_FSM_FFd2_D <= ((RESET AND LAN_RST_SM_FSM_FFd3)
OR (LAN_RST_SM_FSM_FFd3 AND NOT SET_FREQUENCY));
FDCPE_LAN_RST_SM_FSM_FFd3: FDCPE port map (LAN_RST_SM_FSM_FFd3,LAN_RST_SM_FSM_FFd3_D,CLK_EXT,'0','0');
LAN_RST_SM_FSM_FFd3_D <= ((RESET AND LAN_RST_SM_FSM_FFd4)
OR (NOT SET_FREQUENCY AND LAN_RST_SM_FSM_FFd4));
FDCPE_LAN_RST_SM_FSM_FFd4: FDCPE port map (LAN_RST_SM_FSM_FFd4,LAN_RST_SM_FSM_FFd4_D,CLK_EXT,'0','0');
LAN_RST_SM_FSM_FFd4_D <= ((RESET AND LAN_RST_SM_FSM_FFd5)
OR (NOT SET_FREQUENCY AND LAN_RST_SM_FSM_FFd5));
FDCPE_LAN_RST_SM_FSM_FFd5: FDCPE port map (LAN_RST_SM_FSM_FFd5,LAN_RST_SM_FSM_FFd5_D,CLK_EXT,'0','0');
LAN_RST_SM_FSM_FFd5_D <= ((RESET AND LAN_RST_SM_FSM_FFd6)
OR (LAN_RST_SM_FSM_FFd6 AND NOT SET_FREQUENCY));
FDCPE_LAN_RST_SM_FSM_FFd6: FDCPE port map (LAN_RST_SM_FSM_FFd6,LAN_RST_SM_FSM_FFd6_D,CLK_EXT,'0','0');
LAN_RST_SM_FSM_FFd6_D <= ((RESET AND LAN_RST_SM_FSM_FFd7)
OR (NOT SET_FREQUENCY AND LAN_RST_SM_FSM_FFd7));
FDCPE_LAN_RST_SM_FSM_FFd7: FDCPE port map (LAN_RST_SM_FSM_FFd7,LAN_RST_SM_FSM_FFd7_D,CLK_EXT,'0','0');
LAN_RST_SM_FSM_FFd7_D <= ((RESET AND LAN_RST_SM_FSM_FFd8)
OR (NOT SET_FREQUENCY AND LAN_RST_SM_FSM_FFd8));
FDCPE_LAN_RST_SM_FSM_FFd8: FDCPE port map (LAN_RST_SM_FSM_FFd8,LAN_RST_SM_FSM_FFd8_D,CLK_EXT,'0','0');
LAN_RST_SM_FSM_FFd8_D <= (NOT RESET AND SET_FREQUENCY);
LAN_WRH <= ((AS AND LAN_WR_RST)
OR (NOT AS AND NOT LAN_WRH_S AND LAN_RST_SM_FSM_FFd1)
OR (NOT LAN_RST_SM_FSM_FFd1 AND LAN_WR_RST));
FDCPE_LAN_WRH_S: FDCPE port map (LAN_WRH_S,LAN_WRH_S_D,LAN_WRH_S/LAN_WRH_S_CLKF,'0',NOT RESET);
LAN_WRH_S_D <= (lan_adr AND NOT RW AND NOT A(15) AND NOT LDS);
LAN_WRH_S/LAN_WRH_S_CLKF <= C3
XOR
LAN_WRH_S/LAN_WRH_S_CLKF <= C1;
LAN_WRL <= ((AS AND LAN_WR_RST)
OR (NOT LAN_RST_SM_FSM_FFd1 AND LAN_WR_RST)
OR (NOT AS AND NOT LAN_WRL_S AND LAN_RST_SM_FSM_FFd1));
FDCPE_LAN_WRL_S: FDCPE port map (LAN_WRL_S,LAN_WRL_S_D,LAN_WRL_S/LAN_WRL_S_CLKF,'0',NOT RESET);
LAN_WRL_S_D <= (lan_adr AND NOT RW AND NOT A(15) AND NOT UDS);
LAN_WRL_S/LAN_WRL_S_CLKF <= C3
XOR
LAN_WRL_S/LAN_WRL_S_CLKF <= C1;
FDCPE_LAN_WR_RST: FDCPE port map (LAN_WR_RST,LAN_WR_RST_D,CLK_EXT,'0','0');
LAN_WR_RST_D <= ((NOT RESET AND SET_FREQUENCY)
OR (NOT LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd6));
MTACK_I <= '0';
MTACK <= MTACK_I when MTACK_OE = '1' else 'Z';
MTACK_OE <= '0';
OVR_I <= '0';
OVR <= OVR_I when OVR_OE = '1' else 'Z';
OVR_OE <= '0';
OWN_I <= '0';
OWN <= OWN_I when OWN_OE = '1' else 'Z';
OWN_OE <= '0';
ROM_B(0) <= '0';
ROM_B(1) <= '0';
ROM_OE <= ((ROM_OE_S)
OR (AS AND AS_D));
FDCPE_ROM_OE_S: FDCPE port map (ROM_OE_S,ROM_OE_S_D,ROM_OE_S/ROM_OE_S_CLKF,'0',NOT RESET);
ROM_OE_S_D <= (NOT AS AND RW AND ide AND IDE_ENABLE);
ROM_OE_S/ROM_OE_S_CLKF <= C3
XOR
ROM_OE_S/ROM_OE_S_CLKF <= C1;
FTCPE_SET_FREQUENCY: FTCPE port map (SET_FREQUENCY,SET_FREQUENCY_T,CLK_EXT,'0','0');
SET_FREQUENCY_T <= (RESET AND LAN_RST_SM_FSM_FFd1 AND SET_FREQUENCY);
FTCPE_SHUT_UP0: FTCPE port map (SHUT_UP(0),SHUT_UP_T(0),SHUT_UP(0)/SHUT_UP(0)_CLKF,'0',NOT RESET);
SHUT_UP_T(0) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND
SHUT_UP(0) AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND
SHUT_UP(0) AND NOT A(2) AND NOT LDS));
SHUT_UP(0)/SHUT_UP(0)_CLKF <= C3
XOR
SHUT_UP(0)/SHUT_UP(0)_CLKF <= C1;
SHUT_UP(1)/SHUT_UP(1)_CLKF <= C3
XOR
SHUT_UP(1)/SHUT_UP(1)_CLKF <= C1;
FTCPE_SHUT_UP1: FTCPE port map (SHUT_UP(1),SHUT_UP_T(1),SHUT_UP(1)/SHUT_UP(1)_CLKF,'0',NOT RESET);
SHUT_UP_T(1) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND
SHUT_UP(1) AND NOT A(2) AND NOT UDS)
OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND
SHUT_UP(1) AND NOT A(2) AND NOT LDS));
FTCPE_SHUT_UP2: FTCPE port map (SHUT_UP(2),SHUT_UP_T(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
SHUT_UP_T(2) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND
SHUT_UP(2) AND NOT A(2) AND NOT UDS)
OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND
SHUT_UP(2) AND NOT A(2) AND NOT LDS));
SHUT_UP(2)/SHUT_UP(2)_CLKF <= C3
XOR
SHUT_UP(2)/SHUT_UP(2)_CLKF <= C1;
SLAVE <= ((AS AND AS_D)
OR (NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS));
FDCPE_autoconfig: FDCPE port map (autoconfig,autoconfig_D,lan_adr_sw/lan_adr_sw_CLKF,NOT RESET,'0');
autoconfig_D <= ((AUTO_CONFIG_DONE(1) AND A(23) AND A(22) AND A(21) AND
A(19) AND NOT A(18) AND NOT A(17) AND NOT A(16) AND NOT A(20) AND NOT CFIN)
OR (AUTO_CONFIG_DONE(0) AND A(23) AND A(22) AND A(21) AND
A(19) AND NOT A(18) AND NOT A(17) AND NOT A(16) AND NOT A(20) AND NOT CFIN));
FDCPE_ide: FDCPE port map (ide,ide_D,lan_adr_sw/lan_adr_sw_CLKF,NOT RESET,'0');
ide_D <= ((SHUT_UP(2))
OR (EXP43_.EXP)
OR (IDE_BASEADR(1) AND NOT A(17))
OR (IDE_BASEADR(3) AND NOT A(19))
OR (NOT IDE_BASEADR(3) AND A(19))
OR (IDE_BASEADR(4) AND NOT A(20))
OR (NOT IDE_BASEADR(4) AND A(20))
OR (IDE_BASEADR(5) AND NOT A(21))
OR (NOT IDE_BASEADR(5) AND A(21))
OR (IDE_BASEADR(6) AND NOT A(22))
OR (NOT IDE_BASEADR(6) AND A(22))
OR (IDE_BASEADR(0) AND NOT A(16))
OR (NOT IDE_BASEADR(0) AND A(16))
OR (NOT IDE_BASEADR(1) AND A(17)));
FDCPE_lan_adr: FDCPE port map (lan_adr,lan_adr_D,lan_adr_sw/lan_adr_sw_CLKF,NOT RESET,'0');
lan_adr_D <= ((SHUT_UP(0))
OR (LAN_RST_SM_FSM_FFd4.EXP)
OR (LAN_BASEADR(1) AND NOT A(17))
OR (LAN_BASEADR(2) AND NOT A(18))
OR (NOT LAN_BASEADR(2) AND A(18))
OR (LAN_BASEADR(3) AND NOT A(19))
OR (NOT LAN_BASEADR(3) AND A(19))
OR (LAN_BASEADR(4) AND NOT A(20))
OR (NOT LAN_BASEADR(4) AND A(20))
OR (LAN_BASEADR(5) AND NOT A(21))
OR (NOT LAN_BASEADR(5) AND A(21))
OR (NOT LAN_BASEADR(7) AND A(23))
OR (LAN_BASEADR(0) AND NOT A(16))
OR (NOT LAN_BASEADR(0) AND A(16))
OR (NOT LAN_BASEADR(1) AND A(17)));
FDCPE_lan_adr_sw: FDCPE port map (lan_adr_sw,lan_adr_sw_D,lan_adr_sw/lan_adr_sw_CLKF,NOT RESET,'0');
lan_adr_sw_D <= ((SHUT_UP(0))
OR (ROM_B_0_OBUF$BUF4.EXP)
OR (LAN_BASEADR(4) AND NOT A(20))
OR (NOT LAN_BASEADR(4) AND A(20))
OR (LAN_BASEADR(5) AND NOT A(21))
OR (NOT LAN_BASEADR(5) AND A(21))
OR (NOT LAN_BASEADR(7) AND A(23))
OR (LAN_BASEADR(1) AND NOT A(17))
OR (LAN_BASEADR(2) AND NOT A(18))
OR (NOT LAN_BASEADR(2) AND A(18))
OR (LAN_BASEADR(3) AND NOT A(19))
OR (NOT LAN_BASEADR(3) AND A(19))
OR (LAN_BASEADR(0) AND NOT A(16))
OR (NOT LAN_BASEADR(0) AND A(16))
OR (NOT LAN_BASEADR(1) AND A(17)));
lan_adr_sw/lan_adr_sw_CLKF <= NOT (C3
XOR
lan_adr_sw/lan_adr_sw_CLKF <= NOT (C1);
Register Legend:
FDCPE (Q,D,C,CLR,PRE,CE);
FTCPE (Q,D,C,CLR,PRE,CE);
LDCP (Q,D,G,CLR,PRE);
****************************** Device Pin Out *****************************
Device : XC95288XL-10-TQ144
Pin Signal Pin Signal
No. Name No. Name
1 VCC 73 VCC
2 D<0> 74 A<15>
3 A_LAN<1> 75 AUTOBOOT_OFF
4 A_LAN<0> 76 LAN_WRL
5 A_LAN<3> 77 KPR
6 A_LAN<2> 78 KPR
7 A_LAN<5> 79 KPR
8 VCC 80 AS
9 A_LAN<4> 81 UDS
10 A_LAN<7> 82 LDS
11 A_LAN<6> 83 RW
12 KPR 84 VCC
13 KPR 85 DTACK
14 D<6> 86 A<23>
15 D<3> 87 A<22>
16 D<7> 88 A<21>
17 D<1> 89 GND
18 GND 90 GND
19 D<8> 91 A<20>
20 D<5> 92 A<19>
21 D<4> 93 KPR
22 IDE_CS<0> 94 A<18>
23 IDE_CS<1> 95 A<17>
24 IDE_A<0> 96 MTACK
25 IDE_A<2> 97 A<16>
26 IDE_A<1> 98 KPR
27 IDE_R 99 GND
28 IDE_W 100 OVR
29 GND 101 KPR
30 CLK_EXT 102 C3
31 CP_IRQ 103 C1
32 INT2_OUT 104 CFIN
33 KPR 105 CFOUT
34 CP_CS 106 SLAVE
35 ROM_OE 107 OWN
36 GND 108 GND
37 VCC 109 VCC
38 KPR 110 KPR
39 D<2> 111 LAN_INT
40 D<9> 112 DQ<15>
41 D<10> 113 DQ<13>
42 VCC 114 GND
43 D<11> 115 DQ<11>
44 D<12> 116 DQ<9>
45 D<13> 117 DQ<1>
46 D<14> 118 DQ<0>
47 GND 119 DQ<3>
48 D<15> 120 DQ<2>
49 A<5> 121 DQ<5>
50 A<4> 122 TDO
51 A<6> 123 GND
52 A<3> 124 DQ<4>
53 A<7> 125 DQ<7>
54 A<2> 126 DQ<6>
55 VCC 127 VCC
56 A<8> 128 DQ<8>
57 A<1> 129 DQ<10>
58 A<9> 130 DQ<12>
59 A<10> 131 DQ<14>
60 A<11> 132 LAN_WRH
61 A<12> 133 LAN_CS
62 GND 134 LAN_RD
63 TDI 135 INT6_OUT
64 A<13> 136 A_LAN<12>
65 TMS 137 A_LAN<13>
66 A<14> 138 A_LAN<10>
67 TCK 139 A_LAN<11>
68 ROM_B<0> 140 A_LAN<8>
69 ROM_B<1> 141 VCC
70 CP_WE 142 A_LAN<9>
71 CP_RD 143 RESET
72 GND 144 GND
Legend : NC = Not Connected, unbonded pin
PGND = Unused I/O configured as additional Ground pin
TIE = Unused I/O floating -- must tie to VCC, GND or other signal
KPR = Unused I/O with weak keeper (leave unconnected)
VCC = Dedicated Power Pin
GND = Dedicated Ground Pin
TDI = Test Data In, JTAG pin
TDO = Test Data Out, JTAG pin
TCK = Test Clock, JTAG pin
TMS = Test Mode Select, JTAG pin
PROHIBITED = User reserved pin
**************************** Compiler Options ****************************
Following is a list of all global compiler options used by the fitter run.
Device(s) Specified : xc95288xl-10-TQ144
Optimization Method : SPEED
Multi-Level Logic Optimization : ON
Ignore Timing Specifications : OFF
Default Register Power Up Value : HIGH
Keep User Location Constraints : ON
What-You-See-Is-What-You-Get : OFF
Exhaustive Fitting : ON
Keep Unused Inputs : OFF
Slew Rate : FAST
Power Mode : STD
Ground on Unused IOs : OFF
Set I/O Pin Termination : KEEPER
Global Clock Optimization : ON
Global Set/Reset Optimization : ON
Global Ouput Enable Optimization : ON
Input Limit : 54
Pterm Limit : 25
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