1812 lines
66 KiB
Plaintext
1812 lines
66 KiB
Plaintext
MDF Database: version 1.0
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MDF_INFO | LAN_IDE_CP | XC95144XL-10-TQ144
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MACROCELL | 6 | 0 | CP_CS_BUFR.MC
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ATTRIBUTES | 8520496 | 0
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OUTPUTMC | 24 | 1 | 4 | 2 | 2 | 2 | 10 | 2 | 3 | 2 | 1 | 2 | 6 | 2 | 9 | 0 | 2 | 2 | 5 | 1 | 16 | 0 | 7 | 0 | 5 | 1 | 15 | 0 | 1 | 0 | 4 | 2 | 8 | 0 | 6 | 0 | 13 | 0 | 14 | 0 | 15 | 2 | 15 | 4 | 12 | 5 | 1 | 6 | 2
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INPUTS | 7 | SHUT_UP<1> | CP_BASEADR<6> | A<22> | CP_RD_OBUF.EXP | EXP15_.EXP | lan/lan_CLKF | lan/lan_RSTF__$INT
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INPUTMC | 6 | 4 | 11 | 3 | 17 | 6 | 1 | 6 | 17 | 7 | 3 | 4 | 0
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INPUTP | 1 | 97
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IMPORTS | 2 | 6 | 1 | 6 | 17
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EQ | 22 |
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!CP_CS_BUFR.D = SHUT_UP<1>
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# CP_BASEADR<6> & !A<22>
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# !CP_BASEADR<6> & A<22>
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;Imported pterms FB7_2
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# CP_BASEADR<1> & !A<17>
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# !CP_BASEADR<1> & A<17>
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# CP_BASEADR<4> & !A<20>
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# !CP_BASEADR<4> & A<20>
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# !CP_BASEADR<5> & A<21>
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;Imported pterms FB7_18
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# CP_BASEADR<3> & !A<19>
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# !CP_BASEADR<3> & A<19>
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# CP_BASEADR<5> & !A<21>
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# CP_BASEADR<7> & !A<23>
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# !CP_BASEADR<7> & A<23>
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;Imported pterms FB7_17
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# CP_BASEADR<0> & !A<16>
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# !CP_BASEADR<0> & A<16>
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# CP_BASEADR<2> & !A<18>
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# !CP_BASEADR<2> & A<18>;
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CP_CS_BUFR.CLK = lan/lan_CLKF;
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CP_CS_BUFR.AR = !lan/lan_RSTF__$INT;
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MACROCELL | 1 | 4 | D_0_IOBUFE
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ATTRIBUTES | 265986 | 0
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INPUTS | 6 | AS | RW | CP_CS_BUFR | DQ<0>.PIN | lan | SLAVE_OBUF__$INT
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INPUTMC | 3 | 6 | 0 | 6 | 13 | 2 | 15
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INPUTP | 3 | 90 | 93 | 133
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EQ | 3 |
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!D<0> = !AS & RW & CP_CS_BUFR & !DQ<0>.PIN
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# !AS & RW & !DQ<0>.PIN & lan;
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D<0>.OE = RW & !SLAVE_OBUF__$INT;
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MACROCELL | 2 | 2 | D_10_IOBUFE
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ATTRIBUTES | 265986 | 0
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OUTPUTMC | 1 | 2 | 3
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INPUTS | 7 | AS | RW | CP_CS_BUFR | DQ<10>.PIN | lan | SLAVE_OBUF__$INT | DQ<12>.PIN
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INPUTMC | 3 | 6 | 0 | 6 | 13 | 2 | 15
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INPUTP | 4 | 90 | 93 | 144 | 145
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EXPORTS | 1 | 2 | 3
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EQ | 4 |
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!D<10> = !AS & RW & CP_CS_BUFR & !DQ<10>.PIN
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# !AS & RW & !DQ<10>.PIN & lan;
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D<10>.OE = RW & !SLAVE_OBUF__$INT;
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D_10_IOBUFE.EXP = !AS & RW & lan & DQ<12>.PIN
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MACROCELL | 2 | 10 | D_11_IOBUFE
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ATTRIBUTES | 265986 | 0
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OUTPUTMC | 1 | 2 | 11
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INPUTS | 9 | AS | RW | CP_CS_BUFR | DQ<11>.PIN | lan | SLAVE_OBUF__$INT | Dout1<1> | DQ<13>.PIN | D_15_IOBUFE.EXP
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INPUTMC | 5 | 6 | 0 | 6 | 13 | 2 | 15 | 0 | 17 | 2 | 9
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INPUTP | 4 | 90 | 93 | 129 | 127
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EXPORTS | 1 | 2 | 11
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IMPORTS | 1 | 2 | 9
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EQ | 7 |
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!D<11> = !AS & RW & CP_CS_BUFR & !DQ<11>.PIN
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;Imported pterms FB3_10
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# !AS & RW & !DQ<11>.PIN & lan;
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D<11>.OE = RW & !SLAVE_OBUF__$INT;
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D_11_IOBUFE.EXP = !CP_CS_BUFR & !lan & Dout1<1>
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# !AS & RW & CP_CS_BUFR & DQ<13>.PIN
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# !AS & RW & lan & DQ<13>.PIN
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MACROCELL | 2 | 3 | D_12_IOBUFE
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ATTRIBUTES | 265986 | 0
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INPUTS | 8 | AS | Dout1<0> | RW | CP_CS_BUFR | lan | DQ<12>.PIN | SLAVE_OBUF__$INT | D_10_IOBUFE.EXP
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INPUTMC | 5 | 0 | 9 | 6 | 0 | 6 | 13 | 2 | 15 | 2 | 2
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INPUTP | 3 | 90 | 93 | 145
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IMPORTS | 1 | 2 | 2
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EQ | 7 |
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D<12> = AS & Dout1<0>
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# !RW & Dout1<0>
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# !CP_CS_BUFR & !lan & Dout1<0>
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# !AS & RW & CP_CS_BUFR & DQ<12>.PIN
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;Imported pterms FB3_3
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# !AS & RW & lan & DQ<12>.PIN;
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D<12>.OE = RW & !SLAVE_OBUF__$INT;
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MACROCELL | 2 | 11 | D_13_IOBUFE
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ATTRIBUTES | 265986 | 0
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OUTPUTMC | 1 | 2 | 12
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INPUTS | 17 | AS | Dout1<1> | RW | AUTO_CONFIG_DONE<2> | autoconfig | A<2> | SLAVE_OBUF__$INT | A<4> | CP_BASEADR<1> | A<1> | A<3> | A<5> | D<9>.PIN | A<6> | UDS | RESET | D_11_IOBUFE.EXP
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INPUTMC | 6 | 0 | 17 | 4 | 10 | 4 | 17 | 2 | 15 | 2 | 12 | 2 | 10
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INPUTP | 11 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 44 | 57 | 91 | 160
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EXPORTS | 1 | 2 | 12
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IMPORTS | 1 | 2 | 10
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EQ | 13 |
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D<13> = AS & Dout1<1>
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# !RW & Dout1<1>
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;Imported pterms FB3_11
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# !CP_CS_BUFR & !lan & Dout1<1>
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# !AS & RW & CP_CS_BUFR & DQ<13>.PIN
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# !AS & RW & lan & DQ<13>.PIN;
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D<13>.OE = RW & !SLAVE_OBUF__$INT;
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D_13_IOBUFE.EXP = !AS & !RW & !AUTO_CONFIG_DONE<2> & autoconfig &
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!A<2> & !A<4> & !CP_BASEADR<1> & !A<1> & A<3> & !A<5> &
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D<9>.PIN & A<6> & !UDS
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# !AS & !RW & RESET & !AUTO_CONFIG_DONE<2> &
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autoconfig & !A<2> & !A<4> & CP_BASEADR<1> & !A<1> & A<3> &
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!A<5> & !D<9>.PIN & A<6> & !UDS
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MACROCELL | 2 | 6 | D_14_IOBUFE
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ATTRIBUTES | 265986 | 0
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INPUTS | 8 | AS | Dout1<2> | RW | CP_CS_BUFR | lan | DQ<14>.PIN | SLAVE_OBUF__$INT | _10_.EXP
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INPUTMC | 5 | 2 | 17 | 6 | 0 | 6 | 13 | 2 | 15 | 2 | 5
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INPUTP | 3 | 90 | 93 | 146
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IMPORTS | 1 | 2 | 5
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EQ | 7 |
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D<14> = AS & Dout1<2>
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# !RW & Dout1<2>
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# !CP_CS_BUFR & !lan & Dout1<2>
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# !AS & RW & CP_CS_BUFR & DQ<14>.PIN
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;Imported pterms FB3_6
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# !AS & RW & lan & DQ<14>.PIN;
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D<14>.OE = RW & !SLAVE_OBUF__$INT;
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MACROCELL | 2 | 9 | D_15_IOBUFE
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ATTRIBUTES | 265986 | 0
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OUTPUTMC | 1 | 2 | 10
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INPUTS | 8 | AS | Dout1<3> | RW | CP_CS_BUFR | lan | DQ<11>.PIN | SLAVE_OBUF__$INT | D_9_IOBUFE.EXP
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INPUTMC | 5 | 2 | 14 | 6 | 0 | 6 | 13 | 2 | 15 | 2 | 8
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INPUTP | 3 | 90 | 93 | 129
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EXPORTS | 1 | 2 | 10
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IMPORTS | 1 | 2 | 8
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EQ | 8 |
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D<15> = AS & Dout1<3>
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# !RW & Dout1<3>
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# !CP_CS_BUFR & !lan & Dout1<3>
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;Imported pterms FB3_9
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# !AS & RW & CP_CS_BUFR & DQ<15>.PIN
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# !AS & RW & lan & DQ<15>.PIN;
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D<15>.OE = RW & !SLAVE_OBUF__$INT;
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D_15_IOBUFE.EXP = !AS & RW & !DQ<11>.PIN & lan
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MACROCELL | 0 | 2 | D_1_IOBUFE
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ATTRIBUTES | 265986 | 0
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INPUTS | 6 | AS | RW | CP_CS_BUFR | DQ<1>.PIN | lan | SLAVE_OBUF__$INT
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INPUTMC | 3 | 6 | 0 | 6 | 13 | 2 | 15
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INPUTP | 3 | 90 | 93 | 132
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EQ | 3 |
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!D<1> = !AS & RW & CP_CS_BUFR & !DQ<1>.PIN
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# !AS & RW & !DQ<1>.PIN & lan;
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D<1>.OE = RW & !SLAVE_OBUF__$INT;
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MACROCELL | 2 | 0 | D_2_IOBUFE
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ATTRIBUTES | 265986 | 0
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OUTPUTMC | 1 | 2 | 17
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INPUTS | 15 | RESET | RW | AUTO_CONFIG_DONE<0> | AUTO_CONFIG_DONE<2> | Dout1<2> | SLAVE_OBUF__$INT | AS | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | A<6> | ROM_B_0_OBUF$BUF5.EXP
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INPUTMC | 6 | 2 | 4 | 4 | 10 | 2 | 17 | 2 | 15 | 4 | 17 | 2 | 1
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INPUTP | 9 | 160 | 93 | 90 | 60 | 56 | 63 | 58 | 54 | 57
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EXPORTS | 1 | 2 | 17
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IMPORTS | 1 | 2 | 1
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EQ | 13 |
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!D<2> = ;Imported pterms FB3_2
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!AS & RW & CP_CS_BUFR & !DQ<2>.PIN
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# !AS & RW & !DQ<2>.PIN & lan;
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D<2>.OE = RW & !SLAVE_OBUF__$INT;
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D_2_IOBUFE.EXP = RESET & AUTO_CONFIG_DONE<0> &
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AUTO_CONFIG_DONE<2> & !Dout1<2>
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# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
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autoconfig & !A<2> & !A<4> & A<1> & !A<3> & !A<5>
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# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
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!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & !A<4> & A<1> & !A<3> & !A<6>
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# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
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!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & A<4> & !A<1> & A<3> & !A<5> &
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!A<6>
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MACROCELL | 1 | 16 | D_3_IOBUFE
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ATTRIBUTES | 265986 | 0
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INPUTS | 6 | AS | RW | CP_CS_BUFR | DQ<3>.PIN | lan | SLAVE_OBUF__$INT
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INPUTMC | 3 | 6 | 0 | 6 | 13 | 2 | 15
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INPUTP | 3 | 90 | 93 | 134
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EQ | 3 |
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!D<3> = !AS & RW & CP_CS_BUFR & !DQ<3>.PIN
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# !AS & RW & !DQ<3>.PIN & lan;
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D<3>.OE = RW & !SLAVE_OBUF__$INT;
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MACROCELL | 0 | 7 | D_4_IOBUFE
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ATTRIBUTES | 265986 | 0
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OUTPUTMC | 1 | 0 | 8
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INPUTS | 7 | AS | RW | CP_CS_BUFR | DQ<4>.PIN | lan | SLAVE_OBUF__$INT | A<12>
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INPUTMC | 3 | 6 | 0 | 6 | 13 | 2 | 15
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INPUTP | 4 | 90 | 93 | 139 | 69
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EXPORTS | 1 | 0 | 8
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EQ | 4 |
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!D<4> = !AS & RW & CP_CS_BUFR & !DQ<4>.PIN
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# !AS & RW & !DQ<4>.PIN & lan;
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D<4>.OE = RW & !SLAVE_OBUF__$INT;
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D_4_IOBUFE.EXP = !A<12>
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MACROCELL | 0 | 5 | D_5_IOBUFE
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ATTRIBUTES | 265986 | 0
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INPUTS | 6 | AS | RW | CP_CS_BUFR | DQ<5>.PIN | lan | SLAVE_OBUF__$INT
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INPUTMC | 3 | 6 | 0 | 6 | 13 | 2 | 15
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INPUTP | 3 | 90 | 93 | 136
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EQ | 3 |
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!D<5> = !AS & RW & CP_CS_BUFR & !DQ<5>.PIN
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# !AS & RW & !DQ<5>.PIN & lan;
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D<5>.OE = RW & !SLAVE_OBUF__$INT;
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MACROCELL | 1 | 15 | D_6_IOBUFE
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ATTRIBUTES | 265986 | 0
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INPUTS | 6 | AS | RW | CP_CS_BUFR | DQ<6>.PIN | lan | SLAVE_OBUF__$INT
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INPUTMC | 3 | 6 | 0 | 6 | 13 | 2 | 15
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INPUTP | 3 | 90 | 93 | 141
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EQ | 3 |
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!D<6> = !AS & RW & CP_CS_BUFR & !DQ<6>.PIN
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# !AS & RW & !DQ<6>.PIN & lan;
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D<6>.OE = RW & !SLAVE_OBUF__$INT;
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MACROCELL | 0 | 1 | D_7_IOBUFE
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ATTRIBUTES | 265986 | 0
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INPUTS | 6 | AS | RW | CP_CS_BUFR | DQ<7>.PIN | lan | SLAVE_OBUF__$INT
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INPUTMC | 3 | 6 | 0 | 6 | 13 | 2 | 15
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INPUTP | 3 | 90 | 93 | 140
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EQ | 3 |
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!D<7> = !AS & RW & CP_CS_BUFR & !DQ<7>.PIN
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# !AS & RW & !DQ<7>.PIN & lan;
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D<7>.OE = RW & !SLAVE_OBUF__$INT;
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MACROCELL | 0 | 4 | D_8_IOBUFE
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ATTRIBUTES | 265986 | 0
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INPUTS | 6 | AS | RW | CP_CS_BUFR | DQ<8>.PIN | lan | SLAVE_OBUF__$INT
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INPUTMC | 3 | 6 | 0 | 6 | 13 | 2 | 15
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INPUTP | 3 | 90 | 93 | 143
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EQ | 3 |
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!D<8> = !AS & RW & CP_CS_BUFR & !DQ<8>.PIN
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# !AS & RW & !DQ<8>.PIN & lan;
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D<8>.OE = RW & !SLAVE_OBUF__$INT;
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MACROCELL | 2 | 8 | D_9_IOBUFE
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ATTRIBUTES | 265986 | 0
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OUTPUTMC | 1 | 2 | 9
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INPUTS | 7 | AS | RW | CP_CS_BUFR | DQ<9>.PIN | lan | SLAVE_OBUF__$INT | DQ<15>.PIN
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INPUTMC | 3 | 6 | 0 | 6 | 13 | 2 | 15
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INPUTP | 4 | 90 | 93 | 130 | 125
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EXPORTS | 1 | 2 | 9
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EQ | 5 |
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!D<9> = !AS & RW & CP_CS_BUFR & !DQ<9>.PIN
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# !AS & RW & !DQ<9>.PIN & lan;
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D<9>.OE = RW & !SLAVE_OBUF__$INT;
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D_9_IOBUFE.EXP = !AS & RW & CP_CS_BUFR & DQ<15>.PIN
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# !AS & RW & lan & DQ<15>.PIN
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MACROCELL | 2 | 4 | AUTO_CONFIG_DONE<0>
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ATTRIBUTES | 8528672 | 0
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OUTPUTMC | 23 | 4 | 17 | 4 | 15 | 0 | 9 | 0 | 17 | 2 | 17 | 2 | 13 | 2 | 7 | 5 | 17 | 3 | 3 | 5 | 12 | 5 | 6 | 5 | 3 | 5 | 2 | 5 | 0 | 4 | 13 | 7 | 16 | 0 | 0 | 0 | 8 | 0 | 10 | 0 | 16 | 2 | 0 | 2 | 15 | 2 | 16
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INPUTS | 2 | AUTO_CONFIG_DONE_CYCLE<0> | AS
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INPUTMC | 1 | 4 | 15
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INPUTP | 1 | 90
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EQ | 3 |
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AUTO_CONFIG_DONE<0>.D = AUTO_CONFIG_DONE_CYCLE<0>;
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AUTO_CONFIG_DONE<0>.CLK = AS;
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!AUTO_CONFIG_DONE<0>.AR = RESET; // GSR
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GLOBALS | 1 | 4 | RESET
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MACROCELL | 4 | 10 | AUTO_CONFIG_DONE<2>
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ATTRIBUTES | 8528672 | 0
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OUTPUTMC | 23 | 4 | 17 | 4 | 14 | 2 | 12 | 2 | 11 | 1 | 17 | 1 | 6 | 1 | 2 | 1 | 1 | 3 | 17 | 3 | 6 | 0 | 8 | 0 | 17 | 2 | 17 | 2 | 14 | 4 | 11 | 7 | 16 | 0 | 0 | 0 | 10 | 0 | 16 | 2 | 0 | 2 | 13 | 2 | 15 | 2 | 16
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INPUTS | 2 | AUTO_CONFIG_DONE_CYCLE<1> | AS
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INPUTMC | 1 | 4 | 14
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INPUTP | 1 | 90
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EQ | 3 |
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AUTO_CONFIG_DONE<2>.D = AUTO_CONFIG_DONE_CYCLE<1>;
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AUTO_CONFIG_DONE<2>.CLK = AS;
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!AUTO_CONFIG_DONE<2>.AR = RESET; // GSR
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GLOBALS | 1 | 4 | RESET
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MACROCELL | 4 | 17 | autoconfig
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ATTRIBUTES | 8520496 | 0
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OUTPUTMC | 33 | 4 | 15 | 4 | 14 | 2 | 12 | 2 | 11 | 1 | 17 | 1 | 6 | 1 | 2 | 1 | 1 | 3 | 17 | 3 | 6 | 0 | 9 | 0 | 17 | 2 | 17 | 2 | 14 | 2 | 7 | 5 | 17 | 3 | 3 | 5 | 12 | 5 | 6 | 5 | 3 | 5 | 2 | 5 | 0 | 4 | 13 | 4 | 11 | 5 | 1 | 2 | 15 | 0 | 0 | 0 | 8 | 0 | 10 | 0 | 16 | 2 | 0 | 2 | 13 | 2 | 16
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INPUTS | 13 | AUTO_CONFIG_DONE<0> | CFIN | A<17> | A<16> | A<18> | A<19> | A<20> | A<21> | A<22> | A<23> | AUTO_CONFIG_DONE<2> | lan/lan_CLKF | lan/lan_RSTF__$INT
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INPUTMC | 4 | 2 | 4 | 4 | 10 | 7 | 3 | 4 | 0
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INPUTP | 9 | 116 | 106 | 108 | 105 | 103 | 102 | 98 | 97 | 96
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EQ | 6 |
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autoconfig.D = !AUTO_CONFIG_DONE<0> & !CFIN & !A<17> & !A<16> &
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!A<18> & A<19> & !A<20> & A<21> & A<22> & A<23>
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# !AUTO_CONFIG_DONE<2> & !CFIN & !A<17> & !A<16> &
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!A<18> & A<19> & !A<20> & A<21> & A<22> & A<23>;
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autoconfig.CLK = lan/lan_CLKF;
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autoconfig.AR = !lan/lan_RSTF__$INT;
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MACROCELL | 6 | 13 | lan
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ATTRIBUTES | 8520496 | 0
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OUTPUTMC | 21 | 1 | 4 | 2 | 2 | 2 | 5 | 2 | 3 | 2 | 10 | 2 | 6 | 2 | 9 | 0 | 2 | 2 | 15 | 1 | 16 | 0 | 7 | 0 | 5 | 1 | 15 | 0 | 1 | 0 | 4 | 2 | 8 | 3 | 11 | 3 | 10 | 6 | 5 | 5 | 1 | 2 | 1
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INPUTS | 7 | SHUT_UP<0> | LAN_BASEADR<3> | A<19> | EXP13_.EXP | EXP14_.EXP | lan/lan_CLKF | lan/lan_RSTF__$INT
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INPUTMC | 6 | 4 | 13 | 5 | 12 | 6 | 12 | 6 | 14 | 7 | 3 | 4 | 0
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INPUTP | 1 | 103
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IMPORTS | 2 | 6 | 12 | 6 | 14
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EQ | 22 |
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!lan.D = SHUT_UP<0>
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# LAN_BASEADR<3> & !A<19>
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# !LAN_BASEADR<3> & A<19>
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;Imported pterms FB7_13
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# LAN_BASEADR<4> & !A<20>
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# LAN_BASEADR<6> & !A<22>
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# !LAN_BASEADR<6> & A<22>
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# LAN_BASEADR<7> & !A<23>
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# !LAN_BASEADR<7> & A<23>
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;Imported pterms FB7_12
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# LAN_BASEADR<1> & !A<17>
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# !LAN_BASEADR<1> & A<17>
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# LAN_BASEADR<2> & !A<18>
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# !LAN_BASEADR<2> & A<18>
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;Imported pterms FB7_15
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# LAN_BASEADR<0> & !A<16>
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# !LAN_BASEADR<0> & A<16>
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# !LAN_BASEADR<4> & A<20>
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# LAN_BASEADR<5> & !A<21>
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# !LAN_BASEADR<5> & A<21>;
|
|
lan.CLK = lan/lan_CLKF;
|
|
lan.AR = !lan/lan_RSTF__$INT;
|
|
|
|
MACROCELL | 4 | 15 | AUTO_CONFIG_DONE_CYCLE<0>
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 2 | 2 | 4 | 4 | 15
|
|
INPUTS | 13 | RESET | AUTO_CONFIG_DONE_CYCLE<0> | AS | RW | AUTO_CONFIG_DONE<0> | autoconfig | A<4> | A<1> | A<3> | A<5> | A<6> | UDS | AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF
|
|
INPUTMC | 4 | 4 | 15 | 2 | 4 | 4 | 17 | 4 | 8
|
|
INPUTP | 9 | 160 | 90 | 93 | 56 | 63 | 58 | 54 | 57 | 91
|
|
EQ | 5 |
|
|
AUTO_CONFIG_DONE_CYCLE<0>.D = RESET & AUTO_CONFIG_DONE_CYCLE<0>
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<4> & !A<1> & A<3> & !A<5> & A<6> & !UDS;
|
|
AUTO_CONFIG_DONE_CYCLE<0>.CLK =
|
|
AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF;
|
|
|
|
MACROCELL | 4 | 14 | AUTO_CONFIG_DONE_CYCLE<1>
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 2 | 4 | 10 | 4 | 14
|
|
INPUTS | 13 | RESET | AUTO_CONFIG_DONE_CYCLE<1> | AS | RW | AUTO_CONFIG_DONE<2> | autoconfig | A<4> | A<1> | A<3> | A<5> | A<6> | UDS | AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF
|
|
INPUTMC | 4 | 4 | 14 | 4 | 10 | 4 | 17 | 4 | 7
|
|
INPUTP | 9 | 160 | 90 | 93 | 56 | 63 | 58 | 54 | 57 | 91
|
|
EQ | 5 |
|
|
AUTO_CONFIG_DONE_CYCLE<1>.D = RESET & AUTO_CONFIG_DONE_CYCLE<1>
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<4> & !A<1> & A<3> & !A<5> & A<6> & !UDS;
|
|
AUTO_CONFIG_DONE_CYCLE<1>.CLK =
|
|
AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF;
|
|
|
|
MACROCELL | 0 | 6 | IDE_ENABLE
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 3 | 0 | 6 | 0 | 13 | 0 | 15
|
|
INPUTS | 6 | RESET | IDE_ENABLE | AS | RW | CP_CS_BUFR | IDE_ENABLE/IDE_ENABLE_CLKF
|
|
INPUTMC | 3 | 0 | 6 | 6 | 0 | 6 | 2
|
|
INPUTP | 3 | 160 | 90 | 93
|
|
EQ | 3 |
|
|
!IDE_ENABLE.D = RESET & !IDE_ENABLE
|
|
# !AS & !RW & RESET & CP_CS_BUFR;
|
|
IDE_ENABLE.CLK = IDE_ENABLE/IDE_ENABLE_CLKF;
|
|
|
|
MACROCELL | 2 | 13 | CP_BASEADR<0>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 3 | 2 | 12 | 6 | 16 | 2 | 14
|
|
INPUTS | 15 | RESET | AUTO_CONFIG_DONE<0> | AUTO_CONFIG_DONE<2> | Dout1<3> | AS | RW | autoconfig | A<1> | A<3> | A<5> | A<6> | A<2> | A<4> | CP_BASEADR<1>.EXP | CP_BASEADR<0>/CP_BASEADR<0>_CLKF
|
|
INPUTMC | 6 | 2 | 4 | 4 | 10 | 2 | 14 | 4 | 17 | 2 | 12 | 4 | 6
|
|
INPUTP | 9 | 160 | 90 | 93 | 63 | 58 | 54 | 57 | 60 | 56
|
|
EXPORTS | 1 | 2 | 14
|
|
IMPORTS | 1 | 2 | 12
|
|
EQ | 17 |
|
|
CP_BASEADR<0>.T = ;Imported pterms FB3_13
|
|
!RESET & !CP_BASEADR<0>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<2> & autoconfig &
|
|
!A<2> & !A<4> & !CP_BASEADR<0> & !A<1> & A<3> & !A<5> &
|
|
D<8>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & CP_BASEADR<0> & !A<1> & A<3> &
|
|
!A<5> & !D<8>.PIN & A<6> & !UDS;
|
|
CP_BASEADR<0>.CLK = CP_BASEADR<0>/CP_BASEADR<0>_CLKF;
|
|
CP_BASEADR<0>.EXP = RESET & AUTO_CONFIG_DONE<0> &
|
|
AUTO_CONFIG_DONE<2> & !Dout1<3>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & A<1> & !A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5> & A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5> & A<6>
|
|
|
|
MACROCELL | 2 | 12 | CP_BASEADR<1>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 4 | 2 | 11 | 2 | 12 | 6 | 1 | 2 | 13
|
|
INPUTS | 17 | RESET | CP_BASEADR<1> | CP_BASEADR<0> | AS | RW | AUTO_CONFIG_DONE<2> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<8>.PIN | A<6> | CP_BASEADR<1>/CP_BASEADR<1>_CLKF | UDS | D_13_IOBUFE.EXP
|
|
INPUTMC | 6 | 2 | 12 | 2 | 13 | 4 | 10 | 4 | 17 | 4 | 5 | 2 | 11
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 21 | 57 | 91
|
|
EXPORTS | 1 | 2 | 13
|
|
IMPORTS | 1 | 2 | 11
|
|
EQ | 16 |
|
|
CP_BASEADR<1>.T = !RESET & !CP_BASEADR<1>
|
|
;Imported pterms FB3_12
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<2> & autoconfig &
|
|
!A<2> & !A<4> & !CP_BASEADR<1> & !A<1> & A<3> & !A<5> &
|
|
D<9>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & CP_BASEADR<1> & !A<1> & A<3> &
|
|
!A<5> & !D<9>.PIN & A<6> & !UDS;
|
|
CP_BASEADR<1>.CLK = CP_BASEADR<1>/CP_BASEADR<1>_CLKF;
|
|
CP_BASEADR<1>.EXP = !RESET & !CP_BASEADR<0>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<2> & autoconfig &
|
|
!A<2> & !A<4> & !CP_BASEADR<0> & !A<1> & A<3> & !A<5> &
|
|
D<8>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & CP_BASEADR<0> & !A<1> & A<3> &
|
|
!A<5> & !D<8>.PIN & A<6> & !UDS
|
|
|
|
MACROCELL | 1 | 17 | CP_BASEADR<2>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 2 | 1 | 17 | 6 | 16
|
|
INPUTS | 15 | RESET | CP_BASEADR<2> | AS | RW | AUTO_CONFIG_DONE<2> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<10>.PIN | A<6> | UDS | CP_BASEADR<2>/CP_BASEADR<2>_CLKF
|
|
INPUTMC | 4 | 1 | 17 | 4 | 10 | 4 | 17 | 4 | 4
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 45 | 57 | 91
|
|
EQ | 8 |
|
|
CP_BASEADR<2>.T = !RESET & !CP_BASEADR<2>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<2> & autoconfig &
|
|
!A<2> & !A<4> & !CP_BASEADR<2> & !A<1> & A<3> & !A<5> &
|
|
D<10>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & CP_BASEADR<2> & !A<1> & A<3> &
|
|
!A<5> & !D<10>.PIN & A<6> & !UDS;
|
|
CP_BASEADR<2>.CLK = CP_BASEADR<2>/CP_BASEADR<2>_CLKF;
|
|
|
|
MACROCELL | 1 | 6 | CP_BASEADR<3>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 2 | 1 | 6 | 6 | 17
|
|
INPUTS | 15 | RESET | CP_BASEADR<3> | AS | RW | AUTO_CONFIG_DONE<2> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<11>.PIN | A<6> | UDS | CP_BASEADR<3>/CP_BASEADR<3>_CLKF
|
|
INPUTMC | 4 | 1 | 6 | 4 | 10 | 4 | 17 | 4 | 3
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 47 | 57 | 91
|
|
EQ | 8 |
|
|
CP_BASEADR<3>.T = !RESET & !CP_BASEADR<3>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<2> & autoconfig &
|
|
!A<2> & !A<4> & !CP_BASEADR<3> & !A<1> & A<3> & !A<5> &
|
|
D<11>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & CP_BASEADR<3> & !A<1> & A<3> &
|
|
!A<5> & !D<11>.PIN & A<6> & !UDS;
|
|
CP_BASEADR<3>.CLK = CP_BASEADR<3>/CP_BASEADR<3>_CLKF;
|
|
|
|
MACROCELL | 1 | 2 | CP_BASEADR<4>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 2 | 1 | 2 | 6 | 1
|
|
INPUTS | 15 | RESET | CP_BASEADR<4> | AS | RW | AUTO_CONFIG_DONE<2> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<12>.PIN | A<6> | UDS | CP_BASEADR<4>/CP_BASEADR<4>_CLKF
|
|
INPUTMC | 4 | 1 | 2 | 4 | 10 | 4 | 17 | 6 | 15
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 48 | 57 | 91
|
|
EQ | 8 |
|
|
CP_BASEADR<4>.T = !RESET & !CP_BASEADR<4>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<2> & autoconfig &
|
|
!A<2> & !A<4> & !CP_BASEADR<4> & !A<1> & A<3> & !A<5> &
|
|
D<12>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & CP_BASEADR<4> & !A<1> & A<3> &
|
|
!A<5> & !D<12>.PIN & A<6> & !UDS;
|
|
CP_BASEADR<4>.CLK = CP_BASEADR<4>/CP_BASEADR<4>_CLKF;
|
|
|
|
MACROCELL | 1 | 1 | CP_BASEADR<5>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 3 | 1 | 1 | 6 | 1 | 6 | 17
|
|
INPUTS | 15 | RESET | CP_BASEADR<5> | AS | RW | AUTO_CONFIG_DONE<2> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<13>.PIN | A<6> | UDS | CP_BASEADR<5>/CP_BASEADR<5>_CLKF
|
|
INPUTMC | 4 | 1 | 1 | 4 | 10 | 4 | 17 | 6 | 10
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 49 | 57 | 91
|
|
EQ | 8 |
|
|
CP_BASEADR<5>.T = !RESET & !CP_BASEADR<5>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<2> & autoconfig &
|
|
!A<2> & !A<4> & !CP_BASEADR<5> & !A<1> & A<3> & !A<5> &
|
|
D<13>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & CP_BASEADR<5> & !A<1> & A<3> &
|
|
!A<5> & !D<13>.PIN & A<6> & !UDS;
|
|
CP_BASEADR<5>.CLK = CP_BASEADR<5>/CP_BASEADR<5>_CLKF;
|
|
|
|
MACROCELL | 3 | 17 | CP_BASEADR<6>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 2 | 6 | 0 | 3 | 17
|
|
INPUTS | 15 | RESET | CP_BASEADR<6> | AS | RW | AUTO_CONFIG_DONE<2> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<14>.PIN | A<6> | UDS | CP_BASEADR<6>/CP_BASEADR<6>_CLKF
|
|
INPUTMC | 4 | 3 | 17 | 4 | 10 | 4 | 17 | 6 | 9
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 50 | 57 | 91
|
|
EQ | 8 |
|
|
CP_BASEADR<6>.T = !RESET & !CP_BASEADR<6>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<2> & autoconfig &
|
|
!A<2> & !A<4> & !CP_BASEADR<6> & !A<1> & A<3> & !A<5> &
|
|
D<14>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & CP_BASEADR<6> & !A<1> & A<3> &
|
|
!A<5> & !D<14>.PIN & A<6> & !UDS;
|
|
CP_BASEADR<6>.CLK = CP_BASEADR<6>/CP_BASEADR<6>_CLKF;
|
|
|
|
MACROCELL | 3 | 6 | CP_BASEADR<7>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 2 | 3 | 6 | 6 | 17
|
|
INPUTS | 15 | RESET | CP_BASEADR<7> | AS | RW | AUTO_CONFIG_DONE<2> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<15>.PIN | A<6> | UDS | CP_BASEADR<7>/CP_BASEADR<7>_CLKF
|
|
INPUTMC | 4 | 3 | 6 | 4 | 10 | 4 | 17 | 6 | 8
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 52 | 57 | 91
|
|
EQ | 8 |
|
|
CP_BASEADR<7>.T = !RESET & !CP_BASEADR<7>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<2> & autoconfig &
|
|
!A<2> & !A<4> & !CP_BASEADR<7> & !A<1> & A<3> & !A<5> &
|
|
D<15>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & CP_BASEADR<7> & !A<1> & A<3> &
|
|
!A<5> & !D<15>.PIN & A<6> & !UDS;
|
|
CP_BASEADR<7>.CLK = CP_BASEADR<7>/CP_BASEADR<7>_CLKF;
|
|
|
|
MACROCELL | 0 | 9 | Dout1<0>
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 3 | 2 | 3 | 0 | 9 | 0 | 8
|
|
INPUTS | 15 | AS | RW | RESET | AUTO_CONFIG_DONE<0> | autoconfig | A<4> | A<1> | A<3> | A<5> | A<6> | A<2> | Dout1<0> | IDE_CS_0_OBUF.EXP | A_LAN_8_OBUF$BUF0.EXP | Dout1<0>/Dout1<0>_CLKF
|
|
INPUTMC | 6 | 2 | 4 | 4 | 17 | 0 | 9 | 0 | 8 | 0 | 10 | 6 | 7
|
|
INPUTP | 9 | 90 | 93 | 160 | 56 | 63 | 58 | 54 | 57 | 60
|
|
IMPORTS | 2 | 0 | 8 | 0 | 10
|
|
EQ | 29 |
|
|
!Dout1<0>.D = AS & RESET & !Dout1<0>
|
|
# !RW & RESET & !Dout1<0>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & A<2> & !A<4> & A<1> & !A<3> & !A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<4> & !A<1> & !A<3> & !A<5> & !A<6>
|
|
;Imported pterms FB1_9
|
|
# RESET & !autoconfig & !Dout1<0>
|
|
# RESET & AUTO_CONFIG_DONE<0> &
|
|
AUTO_CONFIG_DONE<2> & !Dout1<0>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & A<2> & !A<1> & !A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5> & A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5> & A<6>
|
|
;Imported pterms FB1_11
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & !A<4> & A<1> & A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & !A<4> & !A<3> & A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & !A<2> & A<4> & A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<4> & A<1> & A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & !A<1> & !A<3> & AUTOBOOT_OFF &
|
|
!A<5>;
|
|
Dout1<0>.CLK = Dout1<0>/Dout1<0>_CLKF;
|
|
|
|
MACROCELL | 0 | 17 | Dout1<1>
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 3 | 2 | 11 | 0 | 17 | 2 | 10
|
|
INPUTS | 10 | AS | RESET | Dout1<1> | RW | autoconfig | AUTO_CONFIG_DONE<0> | AUTO_CONFIG_DONE<2> | IDE_CS_1_OBUF.EXP | EXP11_.EXP | Dout1<1>/Dout1<1>_CLKF
|
|
INPUTMC | 7 | 0 | 17 | 4 | 17 | 2 | 4 | 4 | 10 | 0 | 0 | 0 | 16 | 6 | 6
|
|
INPUTP | 3 | 90 | 160 | 93
|
|
IMPORTS | 2 | 0 | 0 | 0 | 16
|
|
EQ | 27 |
|
|
!Dout1<1>.D = AS & RESET & !Dout1<1>
|
|
# !RW & RESET & !Dout1<1>
|
|
# RESET & !autoconfig & !Dout1<1>
|
|
# RESET & AUTO_CONFIG_DONE<0> &
|
|
AUTO_CONFIG_DONE<2> & !Dout1<1>
|
|
;Imported pterms FB1_1
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & A<4> & !A<1> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & A<4> & A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<4> & !A<1> & A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & !A<4> & !A<1> & !A<3> & A<5> &
|
|
!A<6>
|
|
;Imported pterms FB1_17
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<4> & !A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & A<1> & !A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<4> & A<1> & !A<3> & !A<5> & !A<6>;
|
|
Dout1<1>.CLK = Dout1<1>/Dout1<1>_CLKF;
|
|
|
|
MACROCELL | 2 | 17 | Dout1<2>
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 3 | 2 | 6 | 2 | 16 | 2 | 0
|
|
INPUTS | 15 | AS | RW | RESET | AUTO_CONFIG_DONE<0> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | A<6> | AUTO_CONFIG_DONE<2> | D_2_IOBUFE.EXP | Dout1<2>/Dout1<2>_CLKF | EXP12_.EXP
|
|
INPUTMC | 6 | 2 | 4 | 4 | 17 | 4 | 10 | 2 | 0 | 6 | 4 | 2 | 16
|
|
INPUTP | 9 | 90 | 93 | 160 | 60 | 56 | 63 | 58 | 54 | 57
|
|
IMPORTS | 2 | 2 | 0 | 2 | 16
|
|
EQ | 27 |
|
|
!Dout1<2>.D = !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & A<1> & !A<3> & !A<5>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5> & A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & A<2> & A<4> & A<1> & !A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & A<2> & !A<4> & !A<1> & !A<3> & !A<5> & !A<6>
|
|
;Imported pterms FB3_1
|
|
# RESET & AUTO_CONFIG_DONE<0> &
|
|
AUTO_CONFIG_DONE<2> & !Dout1<2>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & A<1> & !A<3> & !A<5>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & !A<4> & A<1> & !A<3> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & A<4> & !A<1> & A<3> & !A<5> &
|
|
!A<6>
|
|
;Imported pterms FB3_17
|
|
# AS & RESET & !Dout1<2>
|
|
# !RW & RESET & !Dout1<2>
|
|
# RESET & !autoconfig & !Dout1<2>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5> & A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & A<2> & A<4> & A<1> & !A<3> & !A<5> & !A<6>;
|
|
Dout1<2>.CLK = Dout1<2>/Dout1<2>_CLKF;
|
|
|
|
MACROCELL | 2 | 14 | Dout1<3>
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 3 | 2 | 9 | 2 | 14 | 2 | 13
|
|
INPUTS | 14 | AS | RW | RESET | AUTO_CONFIG_DONE<2> | autoconfig | A<2> | A<1> | A<3> | A<5> | A<6> | Dout1<3> | CP_BASEADR<0>.EXP | SLAVE_OBUF__$INT.EXP | Dout1<3>/Dout1<3>_CLKF
|
|
INPUTMC | 6 | 4 | 10 | 4 | 17 | 2 | 14 | 2 | 13 | 2 | 15 | 6 | 3
|
|
INPUTP | 8 | 90 | 93 | 160 | 60 | 63 | 58 | 54 | 57
|
|
IMPORTS | 2 | 2 | 13 | 2 | 15
|
|
EQ | 24 |
|
|
!Dout1<3>.D = AS & RESET & !Dout1<3>
|
|
# !RW & RESET & !Dout1<3>
|
|
# RESET & !autoconfig & !Dout1<3>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & A<1> & !A<3> & !A<5> & !A<6>
|
|
;Imported pterms FB3_14
|
|
# RESET & AUTO_CONFIG_DONE<0> &
|
|
AUTO_CONFIG_DONE<2> & !Dout1<3>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & A<1> & !A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5> & A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5> & A<6>
|
|
;Imported pterms FB3_16
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & A<4> & A<1> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & !A<4> & !A<1> & !A<3> & A<5> &
|
|
!A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & !A<2> & A<4> & !A<1> & A<3> & !A<5> &
|
|
!A<6>;
|
|
Dout1<3>.CLK = Dout1<3>/Dout1<3>_CLKF;
|
|
|
|
MACROCELL | 2 | 7 | LAN_BASEADR<0>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 2 | 2 | 7 | 6 | 14
|
|
INPUTS | 15 | RESET | LAN_BASEADR<0> | AS | RW | AUTO_CONFIG_DONE<0> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<8>.PIN | A<6> | UDS | LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF
|
|
INPUTMC | 4 | 2 | 7 | 2 | 4 | 4 | 17 | 7 | 14
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 21 | 57 | 91
|
|
EQ | 8 |
|
|
LAN_BASEADR<0>.T = !RESET & !LAN_BASEADR<0>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<0> & autoconfig &
|
|
!A<2> & !A<4> & !LAN_BASEADR<0> & !A<1> & A<3> & !A<5> &
|
|
D<8>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & LAN_BASEADR<0> & !A<1> & A<3> &
|
|
!A<5> & !D<8>.PIN & A<6> & !UDS;
|
|
LAN_BASEADR<0>.CLK = LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF;
|
|
|
|
MACROCELL | 5 | 17 | LAN_BASEADR<1>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 2 | 6 | 11 | 5 | 17
|
|
INPUTS | 15 | RESET | LAN_BASEADR<1> | AS | RW | AUTO_CONFIG_DONE<0> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<9>.PIN | A<6> | UDS | LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF
|
|
INPUTMC | 4 | 5 | 17 | 2 | 4 | 4 | 17 | 7 | 13
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 44 | 57 | 91
|
|
EQ | 8 |
|
|
LAN_BASEADR<1>.T = !RESET & !LAN_BASEADR<1>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<0> & autoconfig &
|
|
!A<2> & !A<4> & !LAN_BASEADR<1> & !A<1> & A<3> & !A<5> &
|
|
D<9>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & LAN_BASEADR<1> & !A<1> & A<3> &
|
|
!A<5> & !D<9>.PIN & A<6> & !UDS;
|
|
LAN_BASEADR<1>.CLK = LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF;
|
|
|
|
MACROCELL | 3 | 3 | LAN_BASEADR<2>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 2 | 6 | 11 | 3 | 3
|
|
INPUTS | 15 | RESET | LAN_BASEADR<2> | AS | RW | AUTO_CONFIG_DONE<0> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<10>.PIN | A<6> | UDS | LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF
|
|
INPUTMC | 4 | 3 | 3 | 2 | 4 | 4 | 17 | 7 | 12
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 45 | 57 | 91
|
|
EQ | 8 |
|
|
LAN_BASEADR<2>.T = !RESET & !LAN_BASEADR<2>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<0> & autoconfig &
|
|
!A<2> & !A<4> & !LAN_BASEADR<2> & !A<1> & A<3> & !A<5> &
|
|
D<10>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & LAN_BASEADR<2> & !A<1> & A<3> &
|
|
!A<5> & !D<10>.PIN & A<6> & !UDS;
|
|
LAN_BASEADR<2>.CLK = LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF;
|
|
|
|
MACROCELL | 5 | 12 | LAN_BASEADR<3>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 2 | 6 | 13 | 5 | 12
|
|
INPUTS | 15 | RESET | LAN_BASEADR<3> | AS | RW | AUTO_CONFIG_DONE<0> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<11>.PIN | A<6> | UDS | LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF
|
|
INPUTMC | 4 | 5 | 12 | 2 | 4 | 4 | 17 | 7 | 11
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 47 | 57 | 91
|
|
EQ | 8 |
|
|
LAN_BASEADR<3>.T = !RESET & !LAN_BASEADR<3>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<0> & autoconfig &
|
|
!A<2> & !A<4> & !LAN_BASEADR<3> & !A<1> & A<3> & !A<5> &
|
|
D<11>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & LAN_BASEADR<3> & !A<1> & A<3> &
|
|
!A<5> & !D<11>.PIN & A<6> & !UDS;
|
|
LAN_BASEADR<3>.CLK = LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF;
|
|
|
|
MACROCELL | 5 | 6 | LAN_BASEADR<4>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 3 | 6 | 12 | 5 | 6 | 6 | 14
|
|
INPUTS | 15 | RESET | LAN_BASEADR<4> | AS | RW | AUTO_CONFIG_DONE<0> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<12>.PIN | A<6> | UDS | LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF
|
|
INPUTMC | 4 | 5 | 6 | 2 | 4 | 4 | 17 | 7 | 10
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 48 | 57 | 91
|
|
EQ | 8 |
|
|
LAN_BASEADR<4>.T = !RESET & !LAN_BASEADR<4>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<0> & autoconfig &
|
|
!A<2> & !A<4> & !LAN_BASEADR<4> & !A<1> & A<3> & !A<5> &
|
|
D<12>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & LAN_BASEADR<4> & !A<1> & A<3> &
|
|
!A<5> & !D<12>.PIN & A<6> & !UDS;
|
|
LAN_BASEADR<4>.CLK = LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF;
|
|
|
|
MACROCELL | 5 | 3 | LAN_BASEADR<5>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 2 | 5 | 3 | 6 | 14
|
|
INPUTS | 15 | RESET | LAN_BASEADR<5> | AS | RW | AUTO_CONFIG_DONE<0> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<13>.PIN | A<6> | UDS | LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF
|
|
INPUTMC | 4 | 5 | 3 | 2 | 4 | 4 | 17 | 7 | 9
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 49 | 57 | 91
|
|
EQ | 8 |
|
|
LAN_BASEADR<5>.T = !RESET & !LAN_BASEADR<5>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<0> & autoconfig &
|
|
!A<2> & !A<4> & !LAN_BASEADR<5> & !A<1> & A<3> & !A<5> &
|
|
D<13>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & LAN_BASEADR<5> & !A<1> & A<3> &
|
|
!A<5> & !D<13>.PIN & A<6> & !UDS;
|
|
LAN_BASEADR<5>.CLK = LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF;
|
|
|
|
MACROCELL | 5 | 2 | LAN_BASEADR<6>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 2 | 6 | 12 | 5 | 2
|
|
INPUTS | 15 | RESET | LAN_BASEADR<6> | AS | RW | AUTO_CONFIG_DONE<0> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<14>.PIN | A<6> | UDS | LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF
|
|
INPUTMC | 4 | 5 | 2 | 2 | 4 | 4 | 17 | 7 | 8
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 50 | 57 | 91
|
|
EQ | 8 |
|
|
LAN_BASEADR<6>.T = !RESET & !LAN_BASEADR<6>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<0> & autoconfig &
|
|
!A<2> & !A<4> & !LAN_BASEADR<6> & !A<1> & A<3> & !A<5> &
|
|
D<14>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & LAN_BASEADR<6> & !A<1> & A<3> &
|
|
!A<5> & !D<14>.PIN & A<6> & !UDS;
|
|
LAN_BASEADR<6>.CLK = LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF;
|
|
|
|
MACROCELL | 5 | 0 | LAN_BASEADR<7>
|
|
ATTRIBUTES | 4326176 | 0
|
|
OUTPUTMC | 2 | 6 | 12 | 5 | 0
|
|
INPUTS | 15 | RESET | LAN_BASEADR<7> | AS | RW | AUTO_CONFIG_DONE<0> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | D<15>.PIN | A<6> | UDS | LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF
|
|
INPUTMC | 4 | 5 | 0 | 2 | 4 | 4 | 17 | 7 | 7
|
|
INPUTP | 11 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 52 | 57 | 91
|
|
EQ | 8 |
|
|
LAN_BASEADR<7>.T = !RESET & !LAN_BASEADR<7>
|
|
# !AS & !RW & !AUTO_CONFIG_DONE<0> & autoconfig &
|
|
!A<2> & !A<4> & !LAN_BASEADR<7> & !A<1> & A<3> & !A<5> &
|
|
D<15>.PIN & A<6> & !UDS
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & LAN_BASEADR<7> & !A<1> & A<3> &
|
|
!A<5> & !D<15>.PIN & A<6> & !UDS;
|
|
LAN_BASEADR<7>.CLK = LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF;
|
|
|
|
MACROCELL | 4 | 13 | SHUT_UP<0>
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 2 | 6 | 13 | 4 | 13
|
|
INPUTS | 14 | RESET | SHUT_UP<0> | AS | RW | AUTO_CONFIG_DONE<0> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | A<6> | UDS | SHUT_UP<0>/SHUT_UP<0>_CLKF
|
|
INPUTMC | 4 | 4 | 13 | 2 | 4 | 4 | 17 | 7 | 5
|
|
INPUTP | 10 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 57 | 91
|
|
EQ | 5 |
|
|
!SHUT_UP<0>.D = RESET & !SHUT_UP<0>
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & !A<1> & A<3> & !A<5> & A<6> &
|
|
!UDS;
|
|
SHUT_UP<0>.CLK = SHUT_UP<0>/SHUT_UP<0>_CLKF;
|
|
|
|
MACROCELL | 4 | 11 | SHUT_UP<1>
|
|
ATTRIBUTES | 8520480 | 0
|
|
OUTPUTMC | 2 | 6 | 0 | 4 | 11
|
|
INPUTS | 14 | RESET | SHUT_UP<1> | AS | RW | AUTO_CONFIG_DONE<2> | autoconfig | A<2> | A<4> | A<1> | A<3> | A<5> | A<6> | UDS | SHUT_UP<1>/SHUT_UP<1>_CLKF
|
|
INPUTMC | 4 | 4 | 11 | 4 | 10 | 4 | 17 | 7 | 4
|
|
INPUTP | 10 | 160 | 90 | 93 | 60 | 56 | 63 | 58 | 54 | 57 | 91
|
|
EQ | 5 |
|
|
!SHUT_UP<1>.D = RESET & !SHUT_UP<1>
|
|
# !AS & !RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & !A<1> & A<3> & !A<5> & A<6> &
|
|
!UDS;
|
|
SHUT_UP<1>.CLK = SHUT_UP<1>/SHUT_UP<1>_CLKF;
|
|
|
|
MACROCELL | 3 | 0 | DQ_0_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<0>.PIN | AS | RW
|
|
INPUTP | 3 | 2 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<0> = D<0>.PIN;
|
|
DQ<0>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 3 | 5 | DQ_10_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<10>.PIN | AS | RW
|
|
INPUTP | 3 | 45 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<10> = D<10>.PIN;
|
|
DQ<10>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 5 | 9 | DQ_11_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<11>.PIN | AS | RW
|
|
INPUTP | 3 | 47 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<11> = D<11>.PIN;
|
|
DQ<11>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 3 | 7 | DQ_12_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<12>.PIN | AS | RW
|
|
INPUTP | 3 | 48 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<12> = D<12>.PIN;
|
|
DQ<12>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 5 | 7 | DQ_13_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<13>.PIN | AS | RW
|
|
INPUTP | 3 | 49 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<13> = D<13>.PIN;
|
|
DQ<13>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 3 | 8 | DQ_14_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<14>.PIN | AS | RW
|
|
INPUTP | 3 | 50 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<14> = D<14>.PIN;
|
|
DQ<14>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 5 | 5 | DQ_15_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<15>.PIN | AS | RW
|
|
INPUTP | 3 | 52 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<15> = D<15>.PIN;
|
|
DQ<15>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 5 | 15 | DQ_1_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<1>.PIN | AS | RW
|
|
INPUTP | 3 | 19 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<1> = D<1>.PIN;
|
|
DQ<1>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 5 | 11 | DQ_2_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<2>.PIN | AS | RW
|
|
INPUTP | 3 | 43 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<2> = D<2>.PIN;
|
|
DQ<2>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 5 | 10 | DQ_3_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<3>.PIN | AS | RW
|
|
INPUTP | 3 | 17 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<3> = D<3>.PIN;
|
|
DQ<3>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 5 | 14 | DQ_4_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<4>.PIN | AS | RW
|
|
INPUTP | 3 | 23 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<4> = D<4>.PIN;
|
|
DQ<4>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 5 | 13 | DQ_5_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<5>.PIN | AS | RW
|
|
INPUTP | 3 | 22 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<5> = D<5>.PIN;
|
|
DQ<5>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 3 | 1 | DQ_6_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<6>.PIN | AS | RW
|
|
INPUTP | 3 | 16 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<6> = D<6>.PIN;
|
|
DQ<6>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 5 | 16 | DQ_7_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<7>.PIN | AS | RW
|
|
INPUTP | 3 | 18 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<7> = D<7>.PIN;
|
|
DQ<7>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 3 | 4 | DQ_8_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<8>.PIN | AS | RW
|
|
INPUTP | 3 | 21 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<8> = D<8>.PIN;
|
|
DQ<8>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 5 | 8 | DQ_9_IOBUFE$BUF0
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 3 | D<9>.PIN | AS | RW
|
|
INPUTP | 3 | 44 | 90 | 93
|
|
EQ | 2 |
|
|
DQ<9> = D<9>.PIN;
|
|
DQ<9>.OE = !AS & !RW;
|
|
|
|
MACROCELL | 4 | 1 | LAN_INT_ENABLE
|
|
ATTRIBUTES | 8528672 | 0
|
|
OUTPUTMC | 1 | 4 | 2
|
|
INPUTS | 1 | LAN_INT
|
|
INPUTP | 1 | 124
|
|
EQ | 3 |
|
|
LAN_INT_ENABLE.D = Vcc;
|
|
LAN_INT_ENABLE.CLK = LAN_INT;
|
|
!LAN_INT_ENABLE.AR = RESET; // GSR
|
|
GLOBALS | 1 | 4 | RESET
|
|
|
|
MACROCELL | 0 | 13 | IDE_R_S
|
|
ATTRIBUTES | 8651554 | 0
|
|
INPUTS | 6 | AS | RW | RESET | CP_CS_BUFR | IDE_ENABLE | IDE_R_S/IDE_R_S_CLKF
|
|
INPUTMC | 3 | 6 | 0 | 0 | 6 | 6 | 16
|
|
INPUTP | 3 | 90 | 93 | 160
|
|
EQ | 2 |
|
|
!IDE_R.D = !AS & RW & RESET & CP_CS_BUFR & !IDE_ENABLE;
|
|
IDE_R.CLK = IDE_R_S/IDE_R_S_CLKF;
|
|
|
|
MACROCELL | 0 | 14 | IDE_W_S
|
|
ATTRIBUTES | 8651554 | 0
|
|
INPUTS | 5 | AS | RW | RESET | CP_CS_BUFR | IDE_W_S/IDE_W_S_CLKF
|
|
INPUTMC | 2 | 6 | 0 | 7 | 17
|
|
INPUTP | 3 | 90 | 93 | 160
|
|
EQ | 2 |
|
|
!IDE_W.D = !AS & !RW & RESET & CP_CS_BUFR;
|
|
IDE_W.CLK = IDE_W_S/IDE_W_S_CLKF;
|
|
|
|
MACROCELL | 0 | 15 | ROM_OE_S
|
|
ATTRIBUTES | 8651554 | 0
|
|
INPUTS | 6 | AS | RW | RESET | CP_CS_BUFR | IDE_ENABLE | ROM_OE_S/ROM_OE_S_CLKF
|
|
INPUTMC | 3 | 6 | 0 | 0 | 6 | 7 | 6
|
|
INPUTP | 3 | 90 | 93 | 160
|
|
EQ | 2 |
|
|
!ROM_OE.D = !AS & RW & RESET & CP_CS_BUFR & IDE_ENABLE;
|
|
ROM_OE.CLK = ROM_OE_S/ROM_OE_S_CLKF;
|
|
|
|
MACROCELL | 3 | 11 | LAN_RD_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 3 | AS | RW | lan
|
|
INPUTMC | 1 | 6 | 13
|
|
INPUTP | 2 | 90 | 93
|
|
EQ | 1 |
|
|
LAN_RD = !AS & RW & lan;
|
|
|
|
MACROCELL | 3 | 10 | LAN_WRH_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 4 | AS | RW | lan | UDS
|
|
INPUTMC | 1 | 6 | 13
|
|
INPUTP | 3 | 90 | 93 | 91
|
|
EQ | 1 |
|
|
LAN_WRH = !AS & !RW & lan & !UDS;
|
|
|
|
MACROCELL | 6 | 5 | LAN_WRL_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 4 | AS | RW | lan | LDS
|
|
INPUTMC | 1 | 6 | 13
|
|
INPUTP | 3 | 90 | 93 | 92
|
|
EQ | 1 |
|
|
LAN_WRL = !AS & !RW & lan & !LDS;
|
|
|
|
MACROCELL | 7 | 15 | ROM_B_0_OBUF$BUF1
|
|
ATTRIBUTES | 265986 | 0
|
|
INPUTS | 1 | SLAVE_OBUF__$INT
|
|
INPUTMC | 1 | 2 | 15
|
|
EQ | 2 |
|
|
OWN = Gnd;
|
|
OWN.OE = !SLAVE_OBUF__$INT;
|
|
|
|
MACROCELL | 2 | 1 | ROM_B_0_OBUF$BUF5
|
|
ATTRIBUTES | 265986 | 0
|
|
OUTPUTMC | 1 | 2 | 0
|
|
INPUTS | 6 | ROM_B_0_OBUF$BUF5/ROM_B_0_OBUF$BUF5_TRST | AS | RW | CP_CS_BUFR | DQ<2>.PIN | lan
|
|
INPUTMC | 3 | 4 | 2 | 6 | 0 | 6 | 13
|
|
INPUTP | 3 | 90 | 93 | 135
|
|
EXPORTS | 1 | 2 | 0
|
|
EQ | 4 |
|
|
INT_OUT = Gnd;
|
|
INT_OUT.OE = ROM_B_0_OBUF$BUF5/ROM_B_0_OBUF$BUF5_TRST;
|
|
ROM_B_0_OBUF$BUF5.EXP = !AS & RW & CP_CS_BUFR & !DQ<2>.PIN
|
|
# !AS & RW & !DQ<2>.PIN & lan
|
|
|
|
MACROCELL | 1 | 3 | A_LAN_0_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<1>
|
|
INPUTP | 1 | 63
|
|
EQ | 1 |
|
|
A_LAN<0> = A<1>;
|
|
|
|
MACROCELL | 0 | 3 | A_LAN_10_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<11>
|
|
INPUTP | 1 | 68
|
|
EQ | 1 |
|
|
IDE_A<2> = A<11>;
|
|
|
|
MACROCELL | 3 | 14 | A_LAN_10_OBUF$BUF1
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<11>
|
|
INPUTP | 1 | 68
|
|
EQ | 1 |
|
|
A_LAN<10> = A<11>;
|
|
|
|
MACROCELL | 3 | 15 | A_LAN_11_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<12>
|
|
INPUTP | 1 | 69
|
|
EQ | 1 |
|
|
A_LAN<11> = A<12>;
|
|
|
|
MACROCELL | 3 | 12 | A_LAN_12_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<13>
|
|
INPUTP | 1 | 72
|
|
EQ | 1 |
|
|
A_LAN<12> = A<13>;
|
|
|
|
MACROCELL | 3 | 13 | A_LAN_13_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<14>
|
|
INPUTP | 1 | 74
|
|
EQ | 1 |
|
|
A_LAN<13> = A<14>;
|
|
|
|
MACROCELL | 1 | 5 | A_LAN_1_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<2>
|
|
INPUTP | 1 | 60
|
|
EQ | 1 |
|
|
A_LAN<1> = A<2>;
|
|
|
|
MACROCELL | 1 | 8 | A_LAN_2_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<3>
|
|
INPUTP | 1 | 58
|
|
EQ | 1 |
|
|
A_LAN<2> = A<3>;
|
|
|
|
MACROCELL | 1 | 7 | A_LAN_3_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<4>
|
|
INPUTP | 1 | 56
|
|
EQ | 1 |
|
|
A_LAN<3> = A<4>;
|
|
|
|
MACROCELL | 1 | 10 | A_LAN_4_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<5>
|
|
INPUTP | 1 | 54
|
|
EQ | 1 |
|
|
A_LAN<4> = A<5>;
|
|
|
|
MACROCELL | 1 | 9 | A_LAN_5_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<6>
|
|
INPUTP | 1 | 57
|
|
EQ | 1 |
|
|
A_LAN<5> = A<6>;
|
|
|
|
MACROCELL | 1 | 13 | A_LAN_6_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<7>
|
|
INPUTP | 1 | 59
|
|
EQ | 1 |
|
|
A_LAN<6> = A<7>;
|
|
|
|
MACROCELL | 1 | 11 | A_LAN_7_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<8>
|
|
INPUTP | 1 | 62
|
|
EQ | 1 |
|
|
A_LAN<7> = A<8>;
|
|
|
|
MACROCELL | 0 | 10 | A_LAN_8_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
OUTPUTMC | 1 | 0 | 9
|
|
INPUTS | 14 | AS | RW | RESET | AUTO_CONFIG_DONE<0> | AUTO_CONFIG_DONE<2> | autoconfig | A<2> | A<4> | A<1> | A<5> | A<6> | A<3> | AUTOBOOT_OFF | A_LAN_9_OBUF$BUF0.EXP
|
|
INPUTMC | 4 | 2 | 4 | 4 | 10 | 4 | 17 | 0 | 11
|
|
INPUTP | 10 | 90 | 93 | 160 | 60 | 56 | 63 | 54 | 57 | 58 | 84
|
|
EXPORTS | 1 | 0 | 9
|
|
IMPORTS | 1 | 0 | 11
|
|
EQ | 13 |
|
|
IDE_A<0> = ;Imported pterms FB1_12
|
|
A<9>;
|
|
A_LAN_8_OBUF$BUF0.EXP = !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & !A<4> & A<1> & A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & !A<4> & !A<3> & A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & !A<2> & A<4> & A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<4> & A<1> & A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & !A<1> & !A<3> & AUTOBOOT_OFF &
|
|
!A<5>
|
|
|
|
MACROCELL | 3 | 16 | A_LAN_8_OBUF$BUF1
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<9>
|
|
INPUTP | 1 | 64
|
|
EQ | 1 |
|
|
A_LAN<8> = A<9>;
|
|
|
|
MACROCELL | 0 | 11 | A_LAN_9_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
OUTPUTMC | 1 | 0 | 10
|
|
INPUTS | 2 | A<10> | A<9>
|
|
INPUTP | 2 | 66 | 64
|
|
EXPORTS | 1 | 0 | 10
|
|
EQ | 2 |
|
|
IDE_A<1> = A<10>;
|
|
A_LAN_9_OBUF$BUF0.EXP = A<9>
|
|
|
|
MACROCELL | 1 | 0 | A_LAN_9_OBUF$BUF1
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 1 | A<10>
|
|
INPUTP | 1 | 66
|
|
EQ | 1 |
|
|
A_LAN<9> = A<10>;
|
|
|
|
MACROCELL | 7 | 16 | CFOUT_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 2 | AUTO_CONFIG_DONE<0> | AUTO_CONFIG_DONE<2>
|
|
INPUTMC | 2 | 2 | 4 | 4 | 10
|
|
EQ | 1 |
|
|
!CFOUT = AUTO_CONFIG_DONE<0> & AUTO_CONFIG_DONE<2>;
|
|
|
|
MACROCELL | 6 | 1 | CP_RD_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
OUTPUTMC | 1 | 6 | 0
|
|
INPUTS | 7 | CP_BASEADR<1> | A<17> | CP_BASEADR<4> | A<20> | CP_BASEADR<5> | A<21> | IDE_ENABLE/IDE_ENABLE_CLKF.EXP
|
|
INPUTMC | 4 | 2 | 12 | 1 | 2 | 1 | 1 | 6 | 2
|
|
INPUTP | 3 | 106 | 102 | 98
|
|
EXPORTS | 1 | 6 | 0
|
|
IMPORTS | 1 | 6 | 2
|
|
EQ | 7 |
|
|
!CP_RD = ;Imported pterms FB7_3
|
|
!AS & RW & CP_CS_BUFR;
|
|
CP_RD_OBUF.EXP = CP_BASEADR<1> & !A<17>
|
|
# !CP_BASEADR<1> & A<17>
|
|
# CP_BASEADR<4> & !A<20>
|
|
# !CP_BASEADR<4> & A<20>
|
|
# !CP_BASEADR<5> & A<21>
|
|
|
|
MACROCELL | 4 | 12 | CP_WE_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 5 | AS | RW | CP_CS_BUFR | UDS | LDS
|
|
INPUTMC | 1 | 6 | 0
|
|
INPUTP | 4 | 90 | 93 | 91 | 92
|
|
EQ | 2 |
|
|
!CP_WE = !AS & !RW & CP_CS_BUFR & !UDS
|
|
# !AS & !RW & CP_CS_BUFR & !LDS;
|
|
|
|
MACROCELL | 0 | 8 | IDE_CS_0_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
OUTPUTMC | 1 | 0 | 9
|
|
INPUTS | 14 | RESET | autoconfig | Dout1<0> | AUTO_CONFIG_DONE<0> | AUTO_CONFIG_DONE<2> | AS | RW | A<2> | A<1> | A<3> | A<5> | A<6> | A<4> | D_4_IOBUFE.EXP
|
|
INPUTMC | 5 | 4 | 17 | 0 | 9 | 2 | 4 | 4 | 10 | 0 | 7
|
|
INPUTP | 9 | 160 | 90 | 93 | 60 | 63 | 58 | 54 | 57 | 56
|
|
EXPORTS | 1 | 0 | 9
|
|
IMPORTS | 1 | 0 | 7
|
|
EQ | 11 |
|
|
IDE_CS<0> = ;Imported pterms FB1_8
|
|
!A<12>;
|
|
IDE_CS_0_OBUF.EXP = RESET & !autoconfig & !Dout1<0>
|
|
# RESET & AUTO_CONFIG_DONE<0> &
|
|
AUTO_CONFIG_DONE<2> & !Dout1<0>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & A<2> & !A<1> & !A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5> & A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5> & A<6>
|
|
|
|
MACROCELL | 0 | 0 | IDE_CS_1_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
OUTPUTMC | 1 | 0 | 17
|
|
INPUTS | 13 | A<13> | AS | RW | RESET | AUTO_CONFIG_DONE<0> | AUTO_CONFIG_DONE<2> | autoconfig | A<2> | A<4> | A<1> | A<5> | A<6> | A<3>
|
|
INPUTMC | 3 | 2 | 4 | 4 | 10 | 4 | 17
|
|
INPUTP | 10 | 72 | 90 | 93 | 160 | 60 | 56 | 63 | 54 | 57 | 58
|
|
EXPORTS | 1 | 0 | 17
|
|
EQ | 10 |
|
|
IDE_CS<1> = !A<13>;
|
|
IDE_CS_1_OBUF.EXP = !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & A<4> & !A<1> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & A<4> & A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<4> & !A<1> & A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & !A<4> & !A<1> & !A<3> & A<5> &
|
|
!A<6>
|
|
|
|
MACROCELL | 5 | 1 | SLAVE_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 4 | AS | CP_CS_BUFR | autoconfig | lan
|
|
INPUTMC | 3 | 6 | 0 | 4 | 17 | 6 | 13
|
|
INPUTP | 1 | 90
|
|
EQ | 2 |
|
|
SLAVE = AS
|
|
# !CP_CS_BUFR & !autoconfig & !lan;
|
|
|
|
MACROCELL | 6 | 11 | ROM_B_0_OBUF$BUF6
|
|
ATTRIBUTES | 265986 | 0
|
|
OUTPUTMC | 1 | 6 | 12
|
|
INPUTS | 4 | LAN_BASEADR<1> | A<17> | LAN_BASEADR<2> | A<18>
|
|
INPUTMC | 2 | 5 | 17 | 3 | 3
|
|
INPUTP | 2 | 106 | 105
|
|
EXPORTS | 1 | 6 | 12
|
|
EQ | 6 |
|
|
DTACK = Gnd;
|
|
DTACK.OE = Gnd;
|
|
ROM_B_0_OBUF$BUF6.EXP = LAN_BASEADR<1> & !A<17>
|
|
# !LAN_BASEADR<1> & A<17>
|
|
# LAN_BASEADR<2> & !A<18>
|
|
# !LAN_BASEADR<2> & A<18>
|
|
|
|
MACROCELL | 3 | 2 | LAN_CFG_2_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 0
|
|
EQ | 1 |
|
|
LAN_CS = Vcc;
|
|
|
|
MACROCELL | 3 | 9 | LAN_CFG_2_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 0
|
|
EQ | 1 |
|
|
LAN_CFG<2> = Vcc;
|
|
|
|
MACROCELL | 4 | 16 | ROM_B_0_OBUF
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 0
|
|
EQ | 1 |
|
|
ROM_B<1> = Gnd;
|
|
|
|
MACROCELL | 4 | 9 | ROM_B_0_OBUF$BUF0
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 0
|
|
EQ | 1 |
|
|
ROM_B<0> = Gnd;
|
|
|
|
MACROCELL | 5 | 4 | ROM_B_0_OBUF$BUF2
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 0
|
|
EQ | 1 |
|
|
LAN_CFG<4> = Gnd;
|
|
|
|
MACROCELL | 1 | 14 | ROM_B_0_OBUF$BUF3
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 0
|
|
EQ | 1 |
|
|
LAN_CFG<3> = Gnd;
|
|
|
|
MACROCELL | 1 | 12 | ROM_B_0_OBUF$BUF4
|
|
ATTRIBUTES | 264962 | 0
|
|
INPUTS | 0
|
|
EQ | 1 |
|
|
LAN_CFG<1> = Gnd;
|
|
|
|
MACROCELL | 7 | 3 | lan/lan_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 3 | 6 | 0 | 4 | 17 | 6 | 13
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
lan/lan_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 4 | 0 | lan/lan_RSTF__$INT
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 3 | 6 | 0 | 4 | 17 | 6 | 13
|
|
INPUTS | 2 | RESET | BERR
|
|
INPUTP | 2 | 160 | 109
|
|
EQ | 1 |
|
|
lan/lan_RSTF__$INT = RESET & BERR;
|
|
|
|
MACROCELL | 2 | 15 | SLAVE_OBUF__$INT
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 18 | 1 | 4 | 2 | 2 | 2 | 10 | 2 | 3 | 2 | 11 | 2 | 6 | 2 | 9 | 0 | 2 | 2 | 0 | 1 | 16 | 0 | 7 | 0 | 5 | 1 | 15 | 0 | 1 | 0 | 4 | 2 | 8 | 7 | 15 | 2 | 14
|
|
INPUTS | 14 | AS | CP_CS_BUFR | autoconfig | lan | RW | RESET | AUTO_CONFIG_DONE<0> | AUTO_CONFIG_DONE<2> | A<2> | A<4> | A<1> | A<5> | A<6> | A<3>
|
|
INPUTMC | 5 | 6 | 0 | 4 | 17 | 6 | 13 | 2 | 4 | 4 | 10
|
|
INPUTP | 9 | 90 | 93 | 160 | 60 | 56 | 63 | 54 | 57 | 58
|
|
EXPORTS | 1 | 2 | 14
|
|
EQ | 10 |
|
|
SLAVE_OBUF__$INT = AS
|
|
# !CP_CS_BUFR & !autoconfig & !lan;
|
|
SLAVE_OBUF__$INT.EXP = !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & A<4> & A<1> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & A<2> & !A<4> & !A<1> & !A<3> & A<5> &
|
|
!A<6>
|
|
# !AS & RW & RESET & AUTO_CONFIG_DONE<0> &
|
|
!AUTO_CONFIG_DONE<2> & autoconfig & !A<2> & A<4> & !A<1> & A<3> & !A<5> &
|
|
!A<6>
|
|
|
|
MACROCELL | 4 | 8 | AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 4 | 15
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 4 | 7 | AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 4 | 14
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 6 | 2 | IDE_ENABLE/IDE_ENABLE_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 2 | 0 | 6 | 6 | 1
|
|
INPUTS | 5 | C1 | C3 | AS | RW | CP_CS_BUFR
|
|
INPUTMC | 1 | 6 | 0
|
|
INPUTP | 4 | 115 | 114 | 90 | 93
|
|
EXPORTS | 1 | 6 | 1
|
|
EQ | 3 |
|
|
!IDE_ENABLE/IDE_ENABLE_CLKF = C1
|
|
$ C3;
|
|
IDE_ENABLE/IDE_ENABLE_CLKF.EXP = !AS & RW & CP_CS_BUFR
|
|
|
|
MACROCELL | 4 | 6 | CP_BASEADR<0>/CP_BASEADR<0>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 2 | 13
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!CP_BASEADR<0>/CP_BASEADR<0>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 4 | 5 | CP_BASEADR<1>/CP_BASEADR<1>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 2 | 12
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!CP_BASEADR<1>/CP_BASEADR<1>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 4 | 4 | CP_BASEADR<2>/CP_BASEADR<2>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 1 | 17
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!CP_BASEADR<2>/CP_BASEADR<2>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 4 | 3 | CP_BASEADR<3>/CP_BASEADR<3>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 1 | 6
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!CP_BASEADR<3>/CP_BASEADR<3>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 6 | 15 | CP_BASEADR<4>/CP_BASEADR<4>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 2 | 1 | 2 | 6 | 16
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EXPORTS | 1 | 6 | 16
|
|
EQ | 3 |
|
|
!CP_BASEADR<4>/CP_BASEADR<4>_CLKF = C1
|
|
$ C3;
|
|
CP_BASEADR<4>/CP_BASEADR<4>_CLKF.EXP = C3
|
|
|
|
MACROCELL | 6 | 10 | CP_BASEADR<5>/CP_BASEADR<5>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 1 | 1
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!CP_BASEADR<5>/CP_BASEADR<5>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 6 | 9 | CP_BASEADR<6>/CP_BASEADR<6>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 3 | 17
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!CP_BASEADR<6>/CP_BASEADR<6>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 6 | 8 | CP_BASEADR<7>/CP_BASEADR<7>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 3 | 6
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!CP_BASEADR<7>/CP_BASEADR<7>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 6 | 7 | Dout1<0>/Dout1<0>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 0 | 9
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!Dout1<0>/Dout1<0>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 6 | 6 | Dout1<1>/Dout1<1>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 0 | 17
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!Dout1<1>/Dout1<1>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 6 | 4 | Dout1<2>/Dout1<2>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 2 | 17
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!Dout1<2>/Dout1<2>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 6 | 3 | Dout1<3>/Dout1<3>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 2 | 14
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!Dout1<3>/Dout1<3>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 7 | 14 | LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 2 | 7
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 7 | 13 | LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 5 | 17
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 7 | 12 | LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 3 | 3
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 7 | 11 | LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 5 | 12
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 7 | 10 | LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 5 | 6
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 7 | 9 | LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 5 | 3
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 7 | 8 | LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 5 | 2
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 7 | 7 | LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 5 | 0
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 7 | 5 | SHUT_UP<0>/SHUT_UP<0>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 4 | 13
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!SHUT_UP<0>/SHUT_UP<0>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 7 | 4 | SHUT_UP<1>/SHUT_UP<1>_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 4 | 11
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!SHUT_UP<1>/SHUT_UP<1>_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 6 | 16 | IDE_R_S/IDE_R_S_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 2 | 0 | 13 | 6 | 17
|
|
INPUTS | 6 | C1 | CP_BASEADR<0> | A<16> | CP_BASEADR<2> | A<18> | CP_BASEADR<4>/CP_BASEADR<4>_CLKF.EXP
|
|
INPUTMC | 3 | 2 | 13 | 1 | 17 | 6 | 15
|
|
INPUTP | 3 | 115 | 108 | 105
|
|
EXPORTS | 1 | 6 | 17
|
|
IMPORTS | 1 | 6 | 15
|
|
EQ | 7 |
|
|
!IDE_R_S/IDE_R_S_CLKF = C1
|
|
$ ;Imported pterms FB7_16
|
|
C3;
|
|
IDE_R_S/IDE_R_S_CLKF.EXP = CP_BASEADR<0> & !A<16>
|
|
# !CP_BASEADR<0> & A<16>
|
|
# CP_BASEADR<2> & !A<18>
|
|
# !CP_BASEADR<2> & A<18>
|
|
|
|
MACROCELL | 7 | 17 | IDE_W_S/IDE_W_S_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 0 | 14
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!IDE_W_S/IDE_W_S_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 7 | 6 | ROM_OE_S/ROM_OE_S_CLKF
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 0 | 15
|
|
INPUTS | 2 | C1 | C3
|
|
INPUTP | 2 | 115 | 114
|
|
EQ | 2 |
|
|
!ROM_OE_S/ROM_OE_S_CLKF = C1
|
|
$ C3;
|
|
|
|
MACROCELL | 4 | 2 | ROM_B_0_OBUF$BUF5/ROM_B_0_OBUF$BUF5_TRST
|
|
ATTRIBUTES | 133888 | 0
|
|
OUTPUTMC | 1 | 2 | 1
|
|
INPUTS | 3 | CP_IRQ | LAN_INT | LAN_INT_ENABLE
|
|
INPUTMC | 1 | 4 | 1
|
|
INPUTP | 2 | 34 | 124
|
|
EQ | 2 |
|
|
ROM_B_0_OBUF$BUF5/ROM_B_0_OBUF$BUF5_TRST = !CP_IRQ
|
|
# !LAN_INT & LAN_INT_ENABLE;
|
|
|
|
MACROCELL | 2 | 5 | _10_
|
|
ATTRIBUTES | 264962 | 0
|
|
OUTPUTMC | 1 | 2 | 6
|
|
INPUTS | 5 | CP_CS_BUFR | AS | RW | lan | DQ<14>.PIN
|
|
INPUTMC | 2 | 6 | 0 | 6 | 13
|
|
INPUTP | 3 | 90 | 93 | 146
|
|
EXPORTS | 1 | 2 | 6
|
|
EQ | 2 |
|
|
CP_CS = CP_CS_BUFR;
|
|
_10_.EXP = !AS & RW & lan & DQ<14>.PIN
|
|
|
|
MACROCELL | 0 | 16 | EXP11_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 0 | 17
|
|
INPUTS | 12 | AS | RW | RESET | AUTO_CONFIG_DONE<0> | autoconfig | A<2> | A<4> | A<3> | A<5> | A<6> | AUTO_CONFIG_DONE<2> | A<1>
|
|
INPUTMC | 3 | 2 | 4 | 4 | 17 | 4 | 10
|
|
INPUTP | 9 | 90 | 93 | 160 | 60 | 56 | 58 | 54 | 57 | 63
|
|
EXPORTS | 1 | 0 | 17
|
|
EQ | 10 |
|
|
EXP11_.EXP = !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<4> & !A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & A<1> & !A<3> & !A<5> & !A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & !A<4> & A<1> & !A<3> & !A<5> & !A<6>
|
|
|
|
MACROCELL | 2 | 16 | EXP12_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 2 | 17
|
|
INPUTS | 13 | AS | RESET | Dout1<2> | RW | autoconfig | AUTO_CONFIG_DONE<0> | A<2> | A<4> | A<3> | A<5> | A<6> | AUTO_CONFIG_DONE<2> | A<1>
|
|
INPUTMC | 4 | 2 | 17 | 4 | 17 | 2 | 4 | 4 | 10
|
|
INPUTP | 9 | 90 | 160 | 93 | 60 | 56 | 58 | 54 | 57 | 63
|
|
EXPORTS | 1 | 2 | 17
|
|
EQ | 7 |
|
|
EXP12_.EXP = AS & RESET & !Dout1<2>
|
|
# !RW & RESET & !Dout1<2>
|
|
# RESET & !autoconfig & !Dout1<2>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<0> &
|
|
autoconfig & !A<2> & !A<4> & !A<3> & !A<5> & A<6>
|
|
# !AS & RW & RESET & !AUTO_CONFIG_DONE<2> &
|
|
autoconfig & A<2> & A<4> & A<1> & !A<3> & !A<5> & !A<6>
|
|
|
|
MACROCELL | 6 | 12 | EXP13_
|
|
ATTRIBUTES | 2048 | 0
|
|
OUTPUTMC | 1 | 6 | 13
|
|
INPUTS | 7 | LAN_BASEADR<4> | A<20> | LAN_BASEADR<6> | A<22> | LAN_BASEADR<7> | A<23> | ROM_B_0_OBUF$BUF6.EXP
|
|
INPUTMC | 4 | 5 | 6 | 5 | 2 | 5 | 0 | 6 | 11
|
|
INPUTP | 3 | 102 | 97 | 96
|
|
EXPORTS | 1 | 6 | 13
|
|
IMPORTS | 1 | 6 | 11
|
|
EQ | 10 |
|
|
EXP13_.EXP = LAN_BASEADR<4> & !A<20>
|
|
# LAN_BASEADR<6> & !A<22>
|
|
# !LAN_BASEADR<6> & A<22>
|
|
# LAN_BASEADR<7> & !A<23>
|
|
# !LAN_BASEADR<7> & A<23>
|
|
;Imported pterms FB7_12
|
|
# LAN_BASEADR<1> & !A<17>
|
|
# !LAN_BASEADR<1> & A<17>
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# LAN_BASEADR<2> & !A<18>
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# !LAN_BASEADR<2> & A<18>
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MACROCELL | 6 | 14 | EXP14_
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ATTRIBUTES | 2048 | 0
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OUTPUTMC | 1 | 6 | 13
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INPUTS | 6 | LAN_BASEADR<0> | A<16> | LAN_BASEADR<4> | A<20> | LAN_BASEADR<5> | A<21>
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INPUTMC | 3 | 2 | 7 | 5 | 6 | 5 | 3
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INPUTP | 3 | 108 | 102 | 98
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EXPORTS | 1 | 6 | 13
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EQ | 5 |
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EXP14_.EXP = LAN_BASEADR<0> & !A<16>
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# !LAN_BASEADR<0> & A<16>
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# !LAN_BASEADR<4> & A<20>
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# LAN_BASEADR<5> & !A<21>
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# !LAN_BASEADR<5> & A<21>
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MACROCELL | 6 | 17 | EXP15_
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ATTRIBUTES | 2048 | 0
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OUTPUTMC | 1 | 6 | 0
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INPUTS | 7 | CP_BASEADR<3> | A<19> | CP_BASEADR<5> | A<21> | CP_BASEADR<7> | A<23> | IDE_R_S/IDE_R_S_CLKF.EXP
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INPUTMC | 4 | 1 | 6 | 1 | 1 | 3 | 6 | 6 | 16
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INPUTP | 3 | 103 | 98 | 96
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EXPORTS | 1 | 6 | 0
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IMPORTS | 1 | 6 | 16
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EQ | 10 |
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EXP15_.EXP = CP_BASEADR<3> & !A<19>
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# !CP_BASEADR<3> & A<19>
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# CP_BASEADR<5> & !A<21>
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# CP_BASEADR<7> & !A<23>
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# !CP_BASEADR<7> & A<23>
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;Imported pterms FB7_17
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# CP_BASEADR<0> & !A<16>
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# !CP_BASEADR<0> & A<16>
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# CP_BASEADR<2> & !A<18>
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# !CP_BASEADR<2> & A<18>
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PIN | AS | 64 | 0 | N/A | 90 | 76 | 1 | 4 | 2 | 2 | 2 | 10 | 2 | 3 | 2 | 11 | 2 | 6 | 2 | 9 | 0 | 2 | 0 | 16 | 1 | 16 | 0 | 7 | 0 | 5 | 1 | 15 | 0 | 1 | 0 | 4 | 2 | 8 | 2 | 4 | 4 | 10 | 4 | 15 | 4 | 14 | 0 | 6 | 2 | 12 | 2 | 5 | 1 | 17 | 1 | 6 | 1 | 2 | 1 | 1 | 3 | 17 | 3 | 6 | 0 | 9 | 0 | 17 | 2 | 17 | 2 | 14 | 2 | 7 | 5 | 17 | 3 | 3 | 5 | 12 | 5 | 6 | 5 | 3 | 5 | 2 | 5 | 0 | 4 | 13 | 4 | 11 | 3 | 0 | 3 | 5 | 5 | 9 | 3 | 7 | 5 | 7 | 3 | 8 | 5 | 5 | 5 | 15 | 5 | 11 | 5 | 10 | 5 | 14 | 5 | 13 | 3 | 1 | 5 | 16 | 3 | 4 | 5 | 8 | 0 | 13 | 0 | 14 | 0 | 15 | 3 | 11 | 3 | 10 | 6 | 5 | 2 | 16 | 4 | 12 | 5 | 1 | 2 | 15 | 0 | 0 | 0 | 8 | 0 | 10 | 2 | 0 | 2 | 1 | 2 | 13 | 6 | 2
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PIN | RW | 64 | 0 | N/A | 93 | 73 | 1 | 4 | 2 | 2 | 2 | 10 | 2 | 3 | 2 | 11 | 2 | 6 | 2 | 9 | 0 | 2 | 2 | 0 | 1 | 16 | 0 | 7 | 0 | 5 | 1 | 15 | 0 | 1 | 0 | 4 | 2 | 8 | 4 | 15 | 4 | 14 | 0 | 6 | 2 | 12 | 2 | 5 | 1 | 17 | 1 | 6 | 1 | 2 | 1 | 1 | 3 | 17 | 3 | 6 | 0 | 9 | 0 | 17 | 2 | 17 | 2 | 14 | 2 | 7 | 5 | 17 | 3 | 3 | 5 | 12 | 5 | 6 | 5 | 3 | 5 | 2 | 5 | 0 | 4 | 13 | 4 | 11 | 3 | 0 | 3 | 5 | 5 | 9 | 3 | 7 | 5 | 7 | 3 | 8 | 5 | 5 | 5 | 15 | 5 | 11 | 5 | 10 | 5 | 14 | 5 | 13 | 3 | 1 | 5 | 16 | 3 | 4 | 5 | 8 | 0 | 13 | 0 | 14 | 0 | 15 | 3 | 11 | 3 | 10 | 6 | 5 | 2 | 16 | 4 | 12 | 0 | 0 | 0 | 8 | 0 | 10 | 0 | 16 | 2 | 1 | 2 | 13 | 2 | 15 | 6 | 2
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PIN | RESET | 65600 | 0 | N/A | 160 | 40 | 4 | 15 | 4 | 14 | 0 | 6 | 2 | 11 | 2 | 12 | 1 | 17 | 1 | 6 | 1 | 2 | 1 | 1 | 3 | 17 | 3 | 6 | 0 | 9 | 0 | 17 | 2 | 17 | 2 | 14 | 2 | 7 | 5 | 17 | 3 | 3 | 5 | 12 | 5 | 6 | 5 | 3 | 5 | 2 | 5 | 0 | 4 | 13 | 4 | 11 | 0 | 13 | 0 | 14 | 0 | 15 | 4 | 0 | 0 | 0 | 0 | 8 | 0 | 10 | 0 | 16 | 2 | 0 | 2 | 13 | 2 | 15 | 2 | 16 | 2 | 4 | 4 | 10 | 4 | 1
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PIN | A<22> | 64 | 0 | N/A | 97 | 3 | 6 | 0 | 4 | 17 | 6 | 12
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PIN | A<19> | 64 | 0 | N/A | 103 | 3 | 6 | 13 | 4 | 17 | 6 | 17
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PIN | A<23> | 64 | 0 | N/A | 96 | 3 | 6 | 12 | 4 | 17 | 6 | 17
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PIN | A<21> | 64 | 0 | N/A | 98 | 4 | 6 | 1 | 4 | 17 | 6 | 14 | 6 | 17
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PIN | A<20> | 64 | 0 | N/A | 102 | 4 | 6 | 12 | 4 | 17 | 6 | 1 | 6 | 14
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PIN | A<17> | 64 | 0 | N/A | 106 | 3 | 6 | 11 | 4 | 17 | 6 | 1
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PIN | A<18> | 64 | 0 | N/A | 105 | 3 | 6 | 11 | 4 | 17 | 6 | 16
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PIN | A<16> | 64 | 0 | N/A | 108 | 3 | 4 | 17 | 6 | 14 | 6 | 16
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PIN | CFIN | 64 | 0 | N/A | 116 | 1 | 4 | 17
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PIN | A<2> | 64 | 0 | N/A | 60 | 30 | 2 | 12 | 2 | 11 | 1 | 17 | 1 | 6 | 1 | 2 | 1 | 1 | 3 | 17 | 3 | 6 | 0 | 9 | 0 | 16 | 2 | 17 | 2 | 14 | 2 | 7 | 5 | 17 | 3 | 3 | 5 | 12 | 5 | 6 | 5 | 3 | 5 | 2 | 5 | 0 | 4 | 13 | 4 | 11 | 1 | 5 | 0 | 0 | 0 | 8 | 0 | 10 | 2 | 0 | 2 | 13 | 2 | 15 | 2 | 16
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PIN | A<4> | 64 | 0 | N/A | 56 | 31 | 4 | 15 | 4 | 14 | 2 | 12 | 2 | 11 | 1 | 17 | 1 | 6 | 1 | 2 | 1 | 1 | 3 | 17 | 3 | 6 | 0 | 9 | 0 | 16 | 2 | 17 | 2 | 13 | 2 | 7 | 5 | 17 | 3 | 3 | 5 | 12 | 5 | 6 | 5 | 3 | 5 | 2 | 5 | 0 | 4 | 13 | 4 | 11 | 1 | 7 | 0 | 0 | 0 | 8 | 0 | 10 | 2 | 0 | 2 | 15 | 2 | 16
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PIN | A<5> | 64 | 0 | N/A | 54 | 32 | 4 | 15 | 4 | 14 | 2 | 12 | 2 | 11 | 1 | 17 | 1 | 6 | 1 | 2 | 1 | 1 | 3 | 17 | 3 | 6 | 0 | 9 | 0 | 16 | 2 | 17 | 2 | 14 | 2 | 7 | 5 | 17 | 3 | 3 | 5 | 12 | 5 | 6 | 5 | 3 | 5 | 2 | 5 | 0 | 4 | 13 | 4 | 11 | 1 | 10 | 0 | 0 | 0 | 8 | 0 | 10 | 2 | 0 | 2 | 13 | 2 | 15 | 2 | 16
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PIN | A<1> | 64 | 0 | N/A | 63 | 32 | 4 | 15 | 4 | 14 | 2 | 12 | 2 | 11 | 1 | 17 | 1 | 6 | 1 | 2 | 1 | 1 | 3 | 17 | 3 | 6 | 0 | 9 | 0 | 16 | 2 | 17 | 2 | 14 | 2 | 7 | 5 | 17 | 3 | 3 | 5 | 12 | 5 | 6 | 5 | 3 | 5 | 2 | 5 | 0 | 4 | 13 | 4 | 11 | 1 | 3 | 0 | 0 | 0 | 8 | 0 | 10 | 2 | 0 | 2 | 13 | 2 | 15 | 2 | 16
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PIN | A<3> | 64 | 0 | N/A | 58 | 32 | 4 | 15 | 4 | 14 | 2 | 12 | 2 | 11 | 1 | 17 | 1 | 6 | 1 | 2 | 1 | 1 | 3 | 17 | 3 | 6 | 0 | 9 | 0 | 16 | 2 | 17 | 2 | 14 | 2 | 7 | 5 | 17 | 3 | 3 | 5 | 12 | 5 | 6 | 5 | 3 | 5 | 2 | 5 | 0 | 4 | 13 | 4 | 11 | 1 | 8 | 0 | 0 | 0 | 8 | 0 | 10 | 2 | 0 | 2 | 13 | 2 | 15 | 2 | 16
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PIN | A<6> | 64 | 0 | N/A | 57 | 32 | 4 | 15 | 4 | 14 | 2 | 12 | 2 | 11 | 1 | 17 | 1 | 6 | 1 | 2 | 1 | 1 | 3 | 17 | 3 | 6 | 0 | 9 | 0 | 16 | 2 | 17 | 2 | 14 | 2 | 7 | 5 | 17 | 3 | 3 | 5 | 12 | 5 | 6 | 5 | 3 | 5 | 2 | 5 | 0 | 4 | 13 | 4 | 11 | 1 | 9 | 0 | 0 | 0 | 8 | 0 | 10 | 2 | 0 | 2 | 13 | 2 | 15 | 2 | 16
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PIN | UDS | 64 | 0 | N/A | 91 | 22 | 4 | 15 | 4 | 14 | 2 | 12 | 2 | 11 | 1 | 17 | 1 | 6 | 1 | 2 | 1 | 1 | 3 | 17 | 3 | 6 | 2 | 7 | 5 | 17 | 3 | 3 | 5 | 12 | 5 | 6 | 5 | 3 | 5 | 2 | 5 | 0 | 4 | 13 | 4 | 11 | 3 | 10 | 4 | 12
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PIN | AUTOBOOT_OFF | 64 | 0 | N/A | 84 | 1 | 0 | 10
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PIN | C3 | 64 | 0 | N/A | 114 | 28 | 7 | 3 | 4 | 8 | 4 | 7 | 6 | 2 | 4 | 6 | 4 | 5 | 4 | 4 | 4 | 3 | 6 | 15 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 6 | 6 | 6 | 4 | 6 | 3 | 7 | 14 | 7 | 13 | 7 | 12 | 7 | 11 | 7 | 10 | 7 | 9 | 7 | 8 | 7 | 7 | 7 | 5 | 7 | 4 | 7 | 6 | 7 | 17
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PIN | C1 | 64 | 0 | N/A | 115 | 29 | 7 | 3 | 4 | 8 | 4 | 7 | 6 | 2 | 4 | 6 | 4 | 5 | 4 | 4 | 4 | 3 | 6 | 15 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 6 | 6 | 6 | 4 | 6 | 3 | 7 | 14 | 7 | 13 | 7 | 12 | 7 | 11 | 7 | 10 | 7 | 9 | 7 | 8 | 7 | 7 | 7 | 5 | 7 | 4 | 6 | 16 | 7 | 17 | 7 | 6
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PIN | BERR | 64 | 0 | N/A | 109 | 1 | 4 | 0
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PIN | LAN_INT | 64 | 0 | N/A | 124 | 2 | 4 | 1 | 4 | 2
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PIN | CP_IRQ | 64 | 0 | N/A | 34 | 1 | 4 | 2
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PIN | LDS | 64 | 0 | N/A | 92 | 2 | 6 | 5 | 4 | 12
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PIN | A<11> | 64 | 0 | N/A | 68 | 2 | 0 | 3 | 3 | 14
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PIN | A<12> | 64 | 0 | N/A | 69 | 2 | 3 | 15 | 0 | 7
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PIN | A<13> | 64 | 0 | N/A | 72 | 2 | 3 | 12 | 0 | 0
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PIN | A<14> | 64 | 0 | N/A | 74 | 1 | 3 | 13
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PIN | A<7> | 64 | 0 | N/A | 59 | 1 | 1 | 13
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PIN | A<8> | 64 | 0 | N/A | 62 | 1 | 1 | 11
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PIN | A<9> | 64 | 0 | N/A | 64 | 2 | 3 | 16 | 0 | 11
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PIN | A<10> | 64 | 0 | N/A | 66 | 2 | 0 | 11 | 1 | 0
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PIN | CP_CS | 536871040 | 0 | N/A | 37
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PIN | IDE_R | 536871040 | 0 | N/A | 29
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PIN | IDE_W | 536871040 | 0 | N/A | 30
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PIN | ROM_OE | 536871040 | 0 | N/A | 39
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PIN | LAN_RD | 536871040 | 0 | N/A | 149
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PIN | LAN_WRH | 536871040 | 0 | N/A | 147
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PIN | LAN_WRL | 536871040 | 0 | N/A | 86
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PIN | OWN | 536871040 | 0 | N/A | 119
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PIN | INT_OUT | 536871040 | 0 | N/A | 35
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PIN | A_LAN<0> | 536871040 | 0 | N/A | 5
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PIN | IDE_A<2> | 536871040 | 0 | N/A | 27
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PIN | A_LAN<10> | 536871040 | 0 | N/A | 155
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PIN | A_LAN<11> | 536871040 | 0 | N/A | 156
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PIN | A_LAN<12> | 536871040 | 0 | N/A | 154
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PIN | A_LAN<13> | 536871040 | 0 | N/A | 153
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PIN | A_LAN<1> | 536871040 | 0 | N/A | 4
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PIN | A_LAN<2> | 536871040 | 0 | N/A | 8
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PIN | A_LAN<3> | 536871040 | 0 | N/A | 6
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PIN | A_LAN<4> | 536871040 | 0 | N/A | 11
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PIN | A_LAN<5> | 536871040 | 0 | N/A | 9
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PIN | A_LAN<6> | 536871040 | 0 | N/A | 13
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PIN | A_LAN<7> | 536871040 | 0 | N/A | 12
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PIN | IDE_A<0> | 536871040 | 0 | N/A | 26
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PIN | A_LAN<8> | 536871040 | 0 | N/A | 157
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PIN | IDE_A<1> | 536871040 | 0 | N/A | 28
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PIN | A_LAN<9> | 536871040 | 0 | N/A | 159
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PIN | CFOUT | 536871040 | 0 | N/A | 117
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PIN | CP_RD | 536871040 | 0 | N/A | 79
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PIN | CP_WE | 536871040 | 0 | N/A | 78
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PIN | IDE_CS<0> | 536871040 | 0 | N/A | 24
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PIN | IDE_CS<1> | 536871040 | 0 | N/A | 25
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PIN | SLAVE | 536871040 | 0 | N/A | 118
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PIN | DTACK | 536871040 | 0 | N/A | 95
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PIN | LAN_CS | 536871040 | 0 | N/A | 148
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PIN | LAN_CFG<2> | 536871040 | 0 | N/A | 152
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PIN | ROM_B<1> | 536871040 | 0 | N/A | 77
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PIN | ROM_B<0> | 536871040 | 0 | N/A | 76
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PIN | LAN_CFG<4> | 536871040 | 0 | N/A | 123
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PIN | LAN_CFG<3> | 536871040 | 0 | N/A | 15
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PIN | LAN_CFG<1> | 536871040 | 0 | N/A | 14
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PIN | D<0> | 536870976 | 0 | N/A | 2 | 1 | 3 | 0
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PIN | D<10> | 536870976 | 0 | N/A | 45 | 3 | 1 | 17 | 3 | 3 | 3 | 5
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PIN | D<11> | 536870976 | 0 | N/A | 47 | 3 | 1 | 6 | 5 | 12 | 5 | 9
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PIN | D<12> | 536870976 | 0 | N/A | 48 | 3 | 1 | 2 | 5 | 6 | 3 | 7
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PIN | D<13> | 536870976 | 0 | N/A | 49 | 3 | 1 | 1 | 5 | 3 | 5 | 7
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PIN | D<14> | 536870976 | 0 | N/A | 50 | 3 | 3 | 17 | 5 | 2 | 3 | 8
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PIN | D<15> | 536870976 | 0 | N/A | 52 | 3 | 3 | 6 | 5 | 0 | 5 | 5
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PIN | D<1> | 536870976 | 0 | N/A | 19 | 1 | 5 | 15
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PIN | D<2> | 536870976 | 0 | N/A | 43 | 1 | 5 | 11
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PIN | D<3> | 536870976 | 0 | N/A | 17 | 1 | 5 | 10
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PIN | D<4> | 536870976 | 0 | N/A | 23 | 1 | 5 | 14
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PIN | D<5> | 536870976 | 0 | N/A | 22 | 1 | 5 | 13
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PIN | D<6> | 536870976 | 0 | N/A | 16 | 1 | 3 | 1
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PIN | D<7> | 536870976 | 0 | N/A | 18 | 1 | 5 | 16
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PIN | D<8> | 536870976 | 0 | N/A | 21 | 3 | 2 | 12 | 2 | 7 | 3 | 4
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PIN | D<9> | 536870976 | 0 | N/A | 44 | 3 | 2 | 11 | 5 | 17 | 5 | 8
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PIN | DQ<0> | 536870976 | 0 | N/A | 133 | 1 | 1 | 4
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PIN | DQ<10> | 536870976 | 0 | N/A | 144 | 1 | 2 | 2
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PIN | DQ<11> | 536870976 | 0 | N/A | 129 | 2 | 2 | 10 | 2 | 9
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PIN | DQ<12> | 536870976 | 0 | N/A | 145 | 2 | 2 | 3 | 2 | 2
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PIN | DQ<13> | 536870976 | 0 | N/A | 127 | 1 | 2 | 10
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PIN | DQ<14> | 536870976 | 0 | N/A | 146 | 2 | 2 | 6 | 2 | 5
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PIN | DQ<15> | 536870976 | 0 | N/A | 125 | 1 | 2 | 8
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PIN | DQ<1> | 536870976 | 0 | N/A | 132 | 1 | 0 | 2
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PIN | DQ<2> | 536870976 | 0 | N/A | 135 | 1 | 2 | 1
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PIN | DQ<3> | 536870976 | 0 | N/A | 134 | 1 | 1 | 16
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PIN | DQ<4> | 536870976 | 0 | N/A | 139 | 1 | 0 | 7
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PIN | DQ<5> | 536870976 | 0 | N/A | 136 | 1 | 0 | 5
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PIN | DQ<6> | 536870976 | 0 | N/A | 141 | 1 | 1 | 15
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PIN | DQ<7> | 536870976 | 0 | N/A | 140 | 1 | 0 | 1
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PIN | DQ<8> | 536870976 | 0 | N/A | 143 | 1 | 0 | 4
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PIN | DQ<9> | 536870976 | 0 | N/A | 130 | 1 | 2 | 8
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