MDF Database: version 1.0 MDF_INFO | LAN_IDE_CP | XC95288XL-10-TQ144 MACROCELL | 8 | 10 | Z3_DATA<0> ATTRIBUTES | 8685506 | 0 INPUTS | 10 | DQ_SWAP | DQ<0>.PIN | DQ<8>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 INPUTP | 4 | 217 | 231 | 158 | 147 EQ | 7 | A<8>.D = DQ_SWAP & DQ<8>.PIN # !DQ_SWAP & DQ<0>.PIN; A<8>.CLK = CLK_EXT; // GCK A<8>.AP = LAN_SM_RST; A<8>.OE = RW & LAN_ACCESS & !FCS; A<8>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 5 | Z3_DATA<10> ATTRIBUTES | 8685506 | 0 INPUTS | 10 | DQ_SWAP | DQ<10>.PIN | DQ<2>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 INPUTP | 4 | 234 | 220 | 158 | 147 EQ | 7 | A<18>.D = DQ_SWAP & DQ<2>.PIN # !DQ_SWAP & DQ<10>.PIN; A<18>.CLK = CLK_EXT; // GCK A<18>.AP = LAN_SM_RST; A<18>.OE = RW & LAN_ACCESS & !FCS; A<18>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 2 | Z3_DATA<11> ATTRIBUTES | 8685506 | 0 INPUTS | 10 | DQ_SWAP | DQ<11>.PIN | DQ<3>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 INPUTP | 4 | 207 | 219 | 158 | 147 EQ | 7 | A<19>.D = DQ_SWAP & DQ<3>.PIN # !DQ_SWAP & DQ<11>.PIN; A<19>.CLK = CLK_EXT; // GCK A<19>.AP = LAN_SM_RST; A<19>.OE = RW & LAN_ACCESS & !FCS; A<19>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 1 | Z3_DATA<12> ATTRIBUTES | 8685506 | 0 INPUTS | 10 | DQ_SWAP | DQ<12>.PIN | DQ<4>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 INPUTP | 4 | 235 | 225 | 158 | 147 EQ | 7 | A<20>.D = DQ_SWAP & DQ<4>.PIN # !DQ_SWAP & DQ<12>.PIN; A<20>.CLK = CLK_EXT; // GCK A<20>.AP = LAN_SM_RST; A<20>.OE = RW & LAN_ACCESS & !FCS; A<20>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 16 | Z3_DATA<13> ATTRIBUTES | 8685506 | 0 OUTPUTMC | 1 | 14 | 15 INPUTS | 10 | Z3_ADR<13> | LAN_SM_FSM_FFd2 | D_Z2_OUT<0>.EXP | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 8 | 8 | 6 | 14 | 15 | 14 | 17 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 INPUTP | 2 | 158 | 147 EXPORTS | 1 | 14 | 15 IMPORTS | 1 | 14 | 17 EQ | 11 | A<21>.D = ;Imported pterms FB15_18 DQ_SWAP & DQ<5>.PIN # !DQ_SWAP & DQ<13>.PIN; A<21>.CLK = CLK_EXT; // GCK A<21>.AP = LAN_SM_RST; A<21>.OE = RW & LAN_ACCESS & !FCS; A<21>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; Z3_DATA<13>.EXP = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 # !RW & !Z3_ADR<13> & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 14 | Z3_DATA<14> ATTRIBUTES | 8685506 | 0 OUTPUTMC | 1 | 14 | 13 INPUTS | 11 | DQ_SWAP | DQ<14>.PIN | DQ<7>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd2.EXP INPUTMC | 7 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 | 14 | 15 INPUTP | 4 | 236 | 226 | 158 | 147 EXPORTS | 1 | 14 | 13 IMPORTS | 1 | 14 | 15 EQ | 9 | A<22>.D = !DQ_SWAP & DQ<14>.PIN ;Imported pterms FB15_16 # DQ_SWAP & DQ<6>.PIN; A<22>.CLK = CLK_EXT; // GCK A<22>.AP = LAN_SM_RST; A<22>.OE = RW & LAN_ACCESS & !FCS; A<22>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; Z3_DATA<14>.EXP = DQ_SWAP & DQ<7>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 13 | Z3_DATA<15> ATTRIBUTES | 8685506 | 0 OUTPUTMC | 1 | 14 | 12 INPUTS | 13 | DQ_SWAP | DQ<15>.PIN | UDS | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | LDS | LAN_SM_FSM_FFd2 | Z3_DATA<14>.EXP INPUTMC | 8 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 | 14 | 15 | 14 | 14 INPUTP | 5 | 202 | 155 | 158 | 147 | 157 EXPORTS | 1 | 14 | 12 IMPORTS | 1 | 14 | 14 EQ | 10 | A<23>.D = !DQ_SWAP & DQ<15>.PIN ;Imported pterms FB15_15 # DQ_SWAP & DQ<7>.PIN; A<23>.CLK = CLK_EXT; // GCK A<23>.AP = LAN_SM_RST; A<23>.OE = RW & LAN_ACCESS & !FCS; A<23>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; Z3_DATA<15>.EXP = UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 13 | Z3_DATA<1> ATTRIBUTES | 8685506 | 0 INPUTS | 10 | DQ_SWAP | DQ<1>.PIN | DQ<9>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 INPUTP | 4 | 216 | 209 | 158 | 147 EQ | 7 | A<9>.D = DQ_SWAP & DQ<9>.PIN # !DQ_SWAP & DQ<1>.PIN; A<9>.CLK = CLK_EXT; // GCK A<9>.AP = LAN_SM_RST; A<9>.OE = RW & LAN_ACCESS & !FCS; A<9>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 16 | Z3_DATA<2> ATTRIBUTES | 8685506 | 0 INPUTS | 10 | DQ_SWAP | DQ<10>.PIN | DQ<2>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 INPUTP | 4 | 234 | 220 | 158 | 147 EQ | 7 | A<10>.D = DQ_SWAP & DQ<10>.PIN # !DQ_SWAP & DQ<2>.PIN; A<10>.CLK = CLK_EXT; // GCK A<10>.AP = LAN_SM_RST; A<10>.OE = RW & LAN_ACCESS & !FCS; A<10>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 2 | Z3_DATA<3> ATTRIBUTES | 8685506 | 0 OUTPUTMC | 1 | 10 | 1 INPUTS | 11 | DQ_SWAP | DQ<11>.PIN | DQ<5>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | Z3_DATA<28>.EXP INPUTMC | 7 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 | 10 | 3 INPUTP | 4 | 207 | 221 | 158 | 147 EXPORTS | 1 | 10 | 1 IMPORTS | 1 | 10 | 3 EQ | 9 | A<11>.D = DQ_SWAP & DQ<11>.PIN ;Imported pterms FB11_4 # !DQ_SWAP & DQ<3>.PIN; A<11>.CLK = CLK_EXT; // GCK A<11>.AP = LAN_SM_RST; A<11>.OE = RW & LAN_ACCESS & !FCS; A<11>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; Z3_DATA<3>.EXP = DQ_SWAP & DQ<5>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 4 | Z3_DATA<4> ATTRIBUTES | 8685506 | 0 INPUTS | 10 | DQ_SWAP | DQ<12>.PIN | DQ<4>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 INPUTP | 4 | 235 | 225 | 158 | 147 EQ | 7 | A<12>.D = DQ_SWAP & DQ<12>.PIN # !DQ_SWAP & DQ<4>.PIN; A<12>.CLK = CLK_EXT; // GCK A<12>.AP = LAN_SM_RST; A<12>.OE = RW & LAN_ACCESS & !FCS; A<12>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 9 | Z3_DATA<5> ATTRIBUTES | 8685506 | 0 INPUTS | 10 | DQ_SWAP | DQ<13>.PIN | DQ<5>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 INPUTP | 4 | 204 | 221 | 158 | 147 EQ | 7 | A<13>.D = DQ_SWAP & DQ<13>.PIN # !DQ_SWAP & DQ<5>.PIN; A<13>.CLK = CLK_EXT; // GCK A<13>.AP = LAN_SM_RST; A<13>.OE = RW & LAN_ACCESS & !FCS; A<13>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 10 | Z3_DATA<6> ATTRIBUTES | 8685506 | 0 INPUTS | 10 | DQ_SWAP | DQ<14>.PIN | DQ<6>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 INPUTP | 4 | 236 | 227 | 158 | 147 EQ | 7 | A<14>.D = DQ_SWAP & DQ<14>.PIN # !DQ_SWAP & DQ<6>.PIN; A<14>.CLK = CLK_EXT; // GCK A<14>.AP = LAN_SM_RST; A<14>.OE = RW & LAN_ACCESS & !FCS; A<14>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 7 | Z3_DATA<7> ATTRIBUTES | 8685506 | 0 INPUTS | 10 | DQ_SWAP | DQ<15>.PIN | DQ<7>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 INPUTP | 4 | 202 | 226 | 158 | 147 EQ | 7 | A<15>.D = DQ_SWAP & DQ<15>.PIN # !DQ_SWAP & DQ<7>.PIN; A<15>.CLK = CLK_EXT; // GCK A<15>.AP = LAN_SM_RST; A<15>.OE = RW & LAN_ACCESS & !FCS; A<15>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 10 | Z3_DATA<8> ATTRIBUTES | 8685506 | 0 INPUTS | 10 | DQ_SWAP | DQ<0>.PIN | DQ<8>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 INPUTP | 4 | 217 | 231 | 158 | 147 EQ | 7 | A<16>.D = DQ_SWAP & DQ<0>.PIN # !DQ_SWAP & DQ<8>.PIN; A<16>.CLK = CLK_EXT; // GCK A<16>.AP = LAN_SM_RST; A<16>.OE = RW & LAN_ACCESS & !FCS; A<16>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 7 | Z3_DATA<9> ATTRIBUTES | 8685506 | 0 INPUTS | 10 | DQ_SWAP | DQ<1>.PIN | DQ<9>.PIN | LAN_SM_RST | RW | LAN_ACCESS | FCS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 11 | 2 | 14 | 6 | 7 | 6 | 14 | 4 INPUTP | 4 | 216 | 209 | 158 | 147 EQ | 7 | A<17>.D = DQ_SWAP & DQ<1>.PIN # !DQ_SWAP & DQ<9>.PIN; A<17>.CLK = CLK_EXT; // GCK A<17>.AP = LAN_SM_RST; A<17>.OE = RW & LAN_ACCESS & !FCS; A<17>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 15 | DQ_SWAP ATTRIBUTES | 8553344 | 0 OUTPUTMC | 67 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 15 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 11 | 14 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 7 | 17 | 12 | 2 | 10 | 16 | 15 | 14 | 5 | 14 | 5 | 13 | 12 | 14 | 7 | 10 | 12 | 16 | 12 | 10 | 15 | 0 | 5 | 11 | 7 | 12 | 12 | 9 | 7 | 7 | 12 | 5 | 10 | 14 | 14 | 8 | 5 | 10 | 7 | 9 | 7 | 13 | 7 | 14 | 7 | 15 | 7 | 16 | 10 | 0 | 10 | 13 | 12 | 0 | 12 | 1 | 12 | 4 | 12 | 8 | 12 | 12 | 12 | 13 | 14 | 10 | 14 | 17 | 15 | 16 | 15 | 17 INPUTS | 8 | Z3 | FCS | AS_D1 | SHUT_UP_Z2<0> | A<14>.PIN | EXP67_.EXP | EXP68_.EXP | RESET INPUTMC | 4 | 4 | 7 | 14 | 2 | 11 | 14 | 11 | 16 INPUTP | 4 | 151 | 147 | 125 | 263 IMPORTS | 2 | 11 | 14 | 11 | 16 EQ | 28 | DQ_SWAP.D = FCS # !Z3 # !A<14>.PIN & AS_D1 # AS_D1 & SHUT_UP_Z2<0> ;Imported pterms FB12_15 # DQ_SWAP & !AS_D1 # !A<13>.PIN & AS_D1 # D<8>.PIN & !LAN_BASEADR<8> & AS_D1 # !D<8>.PIN & LAN_BASEADR<8> & AS_D1 # D<9>.PIN & !LAN_BASEADR<9> & AS_D1 ;Imported pterms FB12_14 # D<12>.PIN & !LAN_BASEADR<12> & AS_D1 # !D<12>.PIN & LAN_BASEADR<12> & AS_D1 # D<13>.PIN & !LAN_BASEADR<13> & AS_D1 # !D<13>.PIN & LAN_BASEADR<13> & AS_D1 # D<15>.PIN & !LAN_BASEADR<15> & AS_D1 ;Imported pterms FB12_17 # !D<9>.PIN & LAN_BASEADR<9> & AS_D1 # D<10>.PIN & !LAN_BASEADR<10> & AS_D1 # !D<10>.PIN & LAN_BASEADR<10> & AS_D1 # D<11>.PIN & !LAN_BASEADR<11> & AS_D1 # !D<11>.PIN & LAN_BASEADR<11> & AS_D1 ;Imported pterms FB12_18 # D<14>.PIN & !LAN_BASEADR<14> & AS_D1 # !D<14>.PIN & LAN_BASEADR<14> & AS_D1 # !D<15>.PIN & LAN_BASEADR<15> & AS_D1; DQ_SWAP.CLK = CLK_EXT; // GCK DQ_SWAP.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 2 | LAN_ACCESS ATTRIBUTES | 8553232 | 0 OUTPUTMC | 103 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 11 | 2 | 9 | 15 | 11 | 9 | 9 | 1 | 7 | 4 | 6 | 17 | 11 | 11 | 3 | 1 | 4 | 13 | 4 | 10 | 4 | 15 | 6 | 1 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 8 | 1 | 12 | 1 | 15 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 7 | 9 | 9 | 9 | 10 | 4 | 12 | 5 | 17 | 5 | 5 | 5 | 7 | 5 | 2 | 5 | 4 | 3 | 11 | 0 | 6 | 3 | 13 | 1 | 2 | 5 | 9 | 5 | 13 | 6 | 12 | 3 | 5 | 3 | 4 | 3 | 7 | 1 | 4 | 7 | 6 | 13 | 13 | 13 | 2 | 4 | 1 | 6 | 5 | 4 | 8 | 0 | 3 | 1 | 10 | 1 | 13 | 3 | 0 | 4 | 0 | 4 | 14 | 4 | 16 | 4 | 17 | 5 | 12 | 6 | 0 | 6 | 2 | 6 | 3 | 6 | 10 | 6 | 16 | 7 | 0 | 7 | 3 | 9 | 0 | 9 | 5 | 9 | 6 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 11 | 5 | 11 | 6 | 11 | 8 | 11 | 10 | 11 | 12 INPUTS | 8 | Z3 | FCS | AS_D1 | SHUT_UP_Z2<0> | LAN_ACCESS | EXP61_.EXP | EXP62_.EXP | RESET INPUTMC | 5 | 4 | 7 | 14 | 2 | 11 | 2 | 11 | 1 | 11 | 3 INPUTP | 3 | 151 | 147 | 263 IMPORTS | 2 | 11 | 1 | 11 | 3 EQ | 26 | !LAN_ACCESS.D = FCS # !Z3 # !LAN_ACCESS & !AS_D1 # AS_D1 & SHUT_UP_Z2<0> ;Imported pterms FB12_2 # D<8>.PIN & !LAN_BASEADR<8> & AS_D1 # !D<8>.PIN & LAN_BASEADR<8> & AS_D1 # D<9>.PIN & !LAN_BASEADR<9> & AS_D1 # !D<9>.PIN & LAN_BASEADR<9> & AS_D1 # D<10>.PIN & !LAN_BASEADR<10> & AS_D1 ;Imported pterms FB12_1 # D<13>.PIN & !LAN_BASEADR<13> & AS_D1 # !D<13>.PIN & LAN_BASEADR<13> & AS_D1 # D<14>.PIN & !LAN_BASEADR<14> & AS_D1 # D<15>.PIN & !LAN_BASEADR<15> & AS_D1 # !D<15>.PIN & LAN_BASEADR<15> & AS_D1 ;Imported pterms FB12_4 # !D<10>.PIN & LAN_BASEADR<10> & AS_D1 # D<11>.PIN & !LAN_BASEADR<11> & AS_D1 # !D<11>.PIN & LAN_BASEADR<11> & AS_D1 # D<12>.PIN & !LAN_BASEADR<12> & AS_D1 # !D<12>.PIN & LAN_BASEADR<12> & AS_D1 ;Imported pterms FB12_5 # !D<14>.PIN & LAN_BASEADR<14> & AS_D1; LAN_ACCESS.CLK = CLK_EXT; // GCK LAN_ACCESS.AR = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 0 | AUTO_CONFIG_Z2_DONE<0> ATTRIBUTES | 8553296 | 0 OUTPUTMC | 40 | 8 | 0 | 8 | 3 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 4 | 12 | 14 | 2 | 0 | 3 | 3 | 0 | 14 | 1 | 13 | 10 | 1 | 16 | 8 | 2 | 1 | 1 | 1 | 9 | 6 | 15 | 8 | 1 INPUTS | 7 | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE_CYCLE<0> | RESET | AS_D0 | A<2> | A<3> | A<1> INPUTMC | 3 | 8 | 0 | 8 | 3 | 4 | 8 INPUTP | 4 | 263 | 101 | 99 | 107 EXPORTS | 1 | 8 | 1 EQ | 6 | !AUTO_CONFIG_Z2_DONE<0>.D = !AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE_CYCLE<0>; AUTO_CONFIG_Z2_DONE<0>.CLK = CLK_EXT; // GCK AUTO_CONFIG_Z2_DONE<0>.AR = !RESET; AUTO_CONFIG_Z2_DONE<0>.CE = AS_D0; AUTO_CONFIG_Z2_DONE<0>.EXP = !A<2> & A<3> & A<1> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 8 | AUTO_CONFIG_Z2_DONE<1> ATTRIBUTES | 8553296 | 0 OUTPUTMC | 29 | 0 | 8 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 4 | 12 | 0 | 3 | 3 | 0 | 14 | 2 | 13 | 10 | 1 | 16 | 8 | 2 | 1 | 1 | 1 | 9 | 6 | 15 INPUTS | 4 | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE_CYCLE<1> | RESET | AS_D0 INPUTMC | 3 | 0 | 8 | 14 | 3 | 4 | 8 INPUTP | 1 | 263 EQ | 5 | !AUTO_CONFIG_Z2_DONE<1>.D = !AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE_CYCLE<1>; AUTO_CONFIG_Z2_DONE<1>.CLK = CLK_EXT; // GCK AUTO_CONFIG_Z2_DONE<1>.AR = !RESET; AUTO_CONFIG_Z2_DONE<1>.CE = AS_D0; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 6 | Z3_ADR<13> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 4 | 14 | 6 | 7 | 6 | 14 | 4 | 14 | 16 INPUTS | 5 | A<15>.PIN | RESET | FCS | AS_D1 | Z3 INPUTMC | 1 | 4 | 7 INPUTP | 4 | 139 | 263 | 147 | 151 EQ | 4 | Z3_ADR<13>.D = A<15>.PIN; Z3_ADR<13>.CLK = CLK_EXT; // GCK Z3_ADR<13>.AP = !RESET; Z3_ADR<13>.CE = !FCS & AS_D1 & Z3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 17 | AUTO_CONFIG_Z2_DONE<2> ATTRIBUTES | 8553296 | 0 OUTPUTMC | 14 | 13 | 17 | 0 | 6 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 4 | 12 | 3 | 0 | 13 | 10 | 1 | 9 INPUTS | 5 | AUTOBOOT_OFF | AUTO_CONFIG_Z2_DONE<2> | AUTO_CONFIG_Z2_DONE_CYCLE<2> | RESET | AS_D0 INPUTMC | 3 | 13 | 17 | 0 | 6 | 4 | 8 INPUTP | 2 | 142 | 263 EQ | 5 | !AUTO_CONFIG_Z2_DONE<2>.D = AUTOBOOT_OFF & !AUTO_CONFIG_Z2_DONE<2> & !AUTO_CONFIG_Z2_DONE_CYCLE<2>; AUTO_CONFIG_Z2_DONE<2>.CLK = CLK_EXT; // GCK AUTO_CONFIG_Z2_DONE<2>.AR = !RESET; AUTO_CONFIG_Z2_DONE<2>.CE = AS_D0; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 3 | AUTO_CONFIG_Z2_DONE_CYCLE<0> ATTRIBUTES | 4358928 | 0 OUTPUTMC | 3 | 8 | 0 | 8 | 3 | 8 | 2 INPUTS | 14 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE_CYCLE<0> | A<4> | A<5> | A<6> | A<2> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET | A<3> INPUTMC | 4 | 8 | 0 | 8 | 3 | 4 | 8 | 4 | 12 INPUTP | 10 | 158 | 97 | 91 | 98 | 101 | 155 | 107 | 157 | 263 | 99 EXPORTS | 1 | 8 | 2 EQ | 10 | AUTO_CONFIG_Z2_DONE_CYCLE<0>.T = !RW & !AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE_CYCLE<0> & !A<4> & !A<5> & A<6> & A<2> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE_CYCLE<0> & !A<4> & !A<5> & A<6> & A<2> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; AUTO_CONFIG_Z2_DONE_CYCLE<0>.CLK = CLK_EXT; // GCK AUTO_CONFIG_Z2_DONE_CYCLE<0>.AR = !RESET; AUTO_CONFIG_Z2_DONE_CYCLE<0>.EXP = !A<4> & A<3> # A<5> & A<1> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 3 | AUTO_CONFIG_Z2_DONE_CYCLE<1> ATTRIBUTES | 4358928 | 0 OUTPUTMC | 3 | 0 | 8 | 14 | 3 | 14 | 4 INPUTS | 19 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE_CYCLE<1> | A<4> | A<5> | A<6> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET | DS0 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 INPUTMC | 9 | 8 | 0 | 0 | 8 | 14 | 3 | 4 | 8 | 4 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 10 | 158 | 97 | 91 | 98 | 99 | 155 | 107 | 157 | 263 | 170 EXPORTS | 1 | 14 | 4 EQ | 12 | AUTO_CONFIG_Z2_DONE_CYCLE<1>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE_CYCLE<1> & !A<4> & !A<5> & A<6> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE_CYCLE<1> & !A<4> & !A<5> & A<6> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; AUTO_CONFIG_Z2_DONE_CYCLE<1>.CLK = CLK_EXT; // GCK AUTO_CONFIG_Z2_DONE_CYCLE<1>.AR = !RESET; AUTO_CONFIG_Z2_DONE_CYCLE<1>.EXP = !DS0 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 6 | AUTO_CONFIG_Z2_DONE_CYCLE<2> ATTRIBUTES | 4358928 | 0 OUTPUTMC | 3 | 13 | 17 | 0 | 6 | 0 | 5 INPUTS | 19 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | AUTO_CONFIG_Z2_DONE_CYCLE<2> | A<4> | A<5> | A<6> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET | AS | FCS | LAN_ACCESS | Z3_DATA<20> INPUTMC | 8 | 8 | 0 | 0 | 8 | 13 | 17 | 0 | 6 | 4 | 8 | 4 | 12 | 11 | 2 | 10 | 8 INPUTP | 11 | 158 | 97 | 91 | 98 | 99 | 155 | 107 | 157 | 263 | 152 | 147 EXPORTS | 1 | 0 | 5 EQ | 12 | AUTO_CONFIG_Z2_DONE_CYCLE<2>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !AUTO_CONFIG_Z2_DONE_CYCLE<2> & !A<4> & !A<5> & A<6> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !AUTO_CONFIG_Z2_DONE_CYCLE<2> & !A<4> & !A<5> & A<6> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; AUTO_CONFIG_Z2_DONE_CYCLE<2>.CLK = CLK_EXT; // GCK AUTO_CONFIG_Z2_DONE_CYCLE<2>.AR = !RESET; AUTO_CONFIG_Z2_DONE_CYCLE<2>.EXP = !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<20> & !FCS GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 6 | 6 | CP_BASEADR<0> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 3 | 6 | 6 | 4 | 1 | 4 | 2 INPUTS | 16 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<8>.PIN | CP_BASEADR<0> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 5 | 8 | 0 | 0 | 8 | 6 | 6 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 32 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | CP_BASEADR<0>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<8>.PIN & !CP_BASEADR<0> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<8>.PIN & !CP_BASEADR<0> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<8>.PIN & CP_BASEADR<0> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<8>.PIN & CP_BASEADR<0> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<0>.CLK = CLK_EXT; // GCK CP_BASEADR<0>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 17 | CP_BASEADR<1> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 2 | 3 | 17 | 4 | 2 INPUTS | 16 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<9>.PIN | CP_BASEADR<1> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 5 | 8 | 0 | 0 | 8 | 3 | 17 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 73 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | CP_BASEADR<1>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<9>.PIN & !CP_BASEADR<1> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<9>.PIN & !CP_BASEADR<1> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<9>.PIN & CP_BASEADR<1> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<9>.PIN & CP_BASEADR<1> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<1>.CLK = CLK_EXT; // GCK CP_BASEADR<1>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 16 | CP_BASEADR<2> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 3 | 3 | 16 | 4 | 3 | 4 | 4 INPUTS | 16 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<10>.PIN | CP_BASEADR<2> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 5 | 8 | 0 | 0 | 8 | 3 | 16 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 74 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | CP_BASEADR<2>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !CP_BASEADR<2> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !CP_BASEADR<2> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<10>.PIN & CP_BASEADR<2> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<10>.PIN & CP_BASEADR<2> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<2>.CLK = CLK_EXT; // GCK CP_BASEADR<2>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 15 | CP_BASEADR<3> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 2 | 3 | 15 | 4 | 2 INPUTS | 16 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<11>.PIN | CP_BASEADR<3> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 5 | 8 | 0 | 0 | 8 | 3 | 15 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 77 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | CP_BASEADR<3>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<11>.PIN & !CP_BASEADR<3> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<11>.PIN & !CP_BASEADR<3> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<11>.PIN & CP_BASEADR<3> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<11>.PIN & CP_BASEADR<3> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<3>.CLK = CLK_EXT; // GCK CP_BASEADR<3>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 14 | CP_BASEADR<4> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 2 | 3 | 14 | 4 | 4 INPUTS | 16 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<12>.PIN | CP_BASEADR<4> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 5 | 8 | 0 | 0 | 8 | 3 | 14 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 78 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | CP_BASEADR<4>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<12>.PIN & !CP_BASEADR<4> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<12>.PIN & !CP_BASEADR<4> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<12>.PIN & CP_BASEADR<4> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<12>.PIN & CP_BASEADR<4> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<4>.CLK = CLK_EXT; // GCK CP_BASEADR<4>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 6 | 7 | CP_BASEADR<5> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 2 | 6 | 7 | 4 | 3 INPUTS | 16 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<13>.PIN | CP_BASEADR<5> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 5 | 8 | 0 | 0 | 8 | 6 | 7 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 80 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | CP_BASEADR<5>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<13>.PIN & !CP_BASEADR<5> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<13>.PIN & !CP_BASEADR<5> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<13>.PIN & CP_BASEADR<5> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<13>.PIN & CP_BASEADR<5> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<5>.CLK = CLK_EXT; // GCK CP_BASEADR<5>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 12 | CP_BASEADR<6> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 2 | 3 | 12 | 4 | 3 INPUTS | 16 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<14>.PIN | CP_BASEADR<6> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 5 | 8 | 0 | 0 | 8 | 3 | 12 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 81 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | CP_BASEADR<6>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<14>.PIN & !CP_BASEADR<6> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<14>.PIN & !CP_BASEADR<6> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<14>.PIN & CP_BASEADR<6> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<14>.PIN & CP_BASEADR<6> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<6>.CLK = CLK_EXT; // GCK CP_BASEADR<6>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 10 | CP_BASEADR<7> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 2 | 3 | 10 | 4 | 4 INPUTS | 16 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<15>.PIN | CP_BASEADR<7> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 5 | 8 | 0 | 0 | 8 | 3 | 10 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 89 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | CP_BASEADR<7>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<15>.PIN & !CP_BASEADR<7> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<15>.PIN & !CP_BASEADR<7> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<15>.PIN & CP_BASEADR<7> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<15>.PIN & CP_BASEADR<7> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<7>.CLK = CLK_EXT; // GCK CP_BASEADR<7>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 1 | 10 | IDE_BASEADR<0> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 5 | 1 | 10 | 5 | 17 | 1 | 9 | 5 | 16 | 1 | 11 INPUTS | 21 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<8>.PIN | IDE_BASEADR<0> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | AS | RESET | LAN_ACCESS | FCS | Z3_DATA<19> | D_6_IOBUFE.EXP INPUTMC | 9 | 8 | 0 | 0 | 8 | 13 | 17 | 1 | 10 | 4 | 8 | 4 | 12 | 11 | 2 | 10 | 12 | 1 | 9 INPUTP | 12 | 158 | 32 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 152 | 263 | 147 EXPORTS | 1 | 1 | 11 IMPORTS | 1 | 1 | 9 EQ | 22 | IDE_BASEADR<0>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<8>.PIN & IDE_BASEADR<0> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB2_10 # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<8>.PIN & !IDE_BASEADR<0> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<8>.PIN & !IDE_BASEADR<0> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<8>.PIN & IDE_BASEADR<0> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<0>.CLK = CLK_EXT; // GCK IDE_BASEADR<0>.AP = !RESET; IDE_BASEADR<0>.EXP = !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<19> & !FCS GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 1 | 7 | IDE_BASEADR<1> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 2 | 1 | 7 | 5 | 16 INPUTS | 17 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<9>.PIN | IDE_BASEADR<1> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 6 | 8 | 0 | 0 | 8 | 13 | 17 | 1 | 7 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 73 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | IDE_BASEADR<1>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<9>.PIN & !IDE_BASEADR<1> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<9>.PIN & !IDE_BASEADR<1> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<9>.PIN & IDE_BASEADR<1> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<9>.PIN & IDE_BASEADR<1> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<1>.CLK = CLK_EXT; // GCK IDE_BASEADR<1>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 1 | 6 | IDE_BASEADR<2> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 3 | 1 | 6 | 5 | 15 | 5 | 0 INPUTS | 17 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<10>.PIN | IDE_BASEADR<2> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 6 | 8 | 0 | 0 | 8 | 13 | 17 | 1 | 6 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 74 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | IDE_BASEADR<2>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<10>.PIN & !IDE_BASEADR<2> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<10>.PIN & !IDE_BASEADR<2> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<10>.PIN & IDE_BASEADR<2> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<10>.PIN & IDE_BASEADR<2> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<2>.CLK = CLK_EXT; // GCK IDE_BASEADR<2>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 1 | 5 | IDE_BASEADR<3> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 2 | 1 | 5 | 5 | 16 INPUTS | 17 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<11>.PIN | IDE_BASEADR<3> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 6 | 8 | 0 | 0 | 8 | 13 | 17 | 1 | 5 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 77 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | IDE_BASEADR<3>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<11>.PIN & !IDE_BASEADR<3> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<11>.PIN & !IDE_BASEADR<3> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<11>.PIN & IDE_BASEADR<3> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<11>.PIN & IDE_BASEADR<3> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<3>.CLK = CLK_EXT; // GCK IDE_BASEADR<3>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 1 | 3 | IDE_BASEADR<4> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 2 | 1 | 3 | 5 | 1 INPUTS | 17 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<12>.PIN | IDE_BASEADR<4> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 6 | 8 | 0 | 0 | 8 | 13 | 17 | 1 | 3 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 78 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | IDE_BASEADR<4>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<12>.PIN & !IDE_BASEADR<4> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<12>.PIN & !IDE_BASEADR<4> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<12>.PIN & IDE_BASEADR<4> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<12>.PIN & IDE_BASEADR<4> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<4>.CLK = CLK_EXT; // GCK IDE_BASEADR<4>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 6 | 8 | IDE_BASEADR<5> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 2 | 6 | 8 | 5 | 0 INPUTS | 17 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<13>.PIN | IDE_BASEADR<5> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 6 | 8 | 0 | 0 | 8 | 13 | 17 | 6 | 8 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 80 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | IDE_BASEADR<5>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<13>.PIN & !IDE_BASEADR<5> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<13>.PIN & !IDE_BASEADR<5> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<13>.PIN & IDE_BASEADR<5> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<13>.PIN & IDE_BASEADR<5> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<5>.CLK = CLK_EXT; // GCK IDE_BASEADR<5>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 6 | 9 | IDE_BASEADR<6> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 2 | 6 | 9 | 5 | 0 INPUTS | 17 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<14>.PIN | IDE_BASEADR<6> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 6 | 8 | 0 | 0 | 8 | 13 | 17 | 6 | 9 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 81 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | IDE_BASEADR<6>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<14>.PIN & !IDE_BASEADR<6> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<14>.PIN & !IDE_BASEADR<6> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<14>.PIN & IDE_BASEADR<6> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<14>.PIN & IDE_BASEADR<6> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<6>.CLK = CLK_EXT; // GCK IDE_BASEADR<6>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 9 | IDE_BASEADR<7> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 2 | 3 | 9 | 5 | 1 INPUTS | 17 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<15>.PIN | IDE_BASEADR<7> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 6 | 8 | 0 | 0 | 8 | 13 | 17 | 3 | 9 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 89 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 18 | IDE_BASEADR<7>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<15>.PIN & !IDE_BASEADR<7> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<15>.PIN & !IDE_BASEADR<7> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<15>.PIN & IDE_BASEADR<7> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<15>.PIN & IDE_BASEADR<7> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<7>.CLK = CLK_EXT; // GCK IDE_BASEADR<7>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 4 | INT_VECTOR_CYCLE ATTRIBUTES | 8553296 | 0 OUTPUTMC | 1 | 6 | 12 INPUTS | 5 | MTCR | RESET | FCS | AS_D1 | Z3 INPUTMC | 1 | 4 | 7 INPUTP | 4 | 186 | 263 | 147 | 151 EQ | 4 | INT_VECTOR_CYCLE.D = !MTCR; INT_VECTOR_CYCLE.CLK = CLK_EXT; // GCK INT_VECTOR_CYCLE.AR = !RESET; INT_VECTOR_CYCLE.CE = !FCS & AS_D1 & Z3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 8 | LAN_BASEADR<10> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 4 | 11 | 3 | 11 | 1 | 3 | 8 | 11 | 16 INPUTS | 15 | RW | AUTO_CONFIG_Z2_DONE<0> | D<10>.PIN | LAN_BASEADR<10> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 4 | 8 | 0 | 3 | 8 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 74 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 14 | LAN_BASEADR<10>.T = !RW & !AUTO_CONFIG_Z2_DONE<0> & D<10>.PIN & !LAN_BASEADR<10> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & D<10>.PIN & !LAN_BASEADR<10> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<10>.PIN & LAN_BASEADR<10> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<10>.PIN & LAN_BASEADR<10> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<10>.CLK = CLK_EXT; // GCK LAN_BASEADR<10>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 6 | LAN_BASEADR<11> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 3 | 11 | 3 | 3 | 6 | 11 | 16 INPUTS | 15 | RW | AUTO_CONFIG_Z2_DONE<0> | D<11>.PIN | LAN_BASEADR<11> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 4 | 8 | 0 | 3 | 6 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 77 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 14 | LAN_BASEADR<11>.T = !RW & !AUTO_CONFIG_Z2_DONE<0> & D<11>.PIN & !LAN_BASEADR<11> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & D<11>.PIN & !LAN_BASEADR<11> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<11>.PIN & LAN_BASEADR<11> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<11>.PIN & LAN_BASEADR<11> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<11>.CLK = CLK_EXT; // GCK LAN_BASEADR<11>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 3 | LAN_BASEADR<12> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 3 | 11 | 13 | 3 | 3 | 11 | 3 INPUTS | 15 | RW | AUTO_CONFIG_Z2_DONE<0> | D<12>.PIN | LAN_BASEADR<12> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 4 | 8 | 0 | 3 | 3 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 78 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 14 | LAN_BASEADR<12>.T = !RW & !AUTO_CONFIG_Z2_DONE<0> & D<12>.PIN & !LAN_BASEADR<12> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & D<12>.PIN & !LAN_BASEADR<12> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<12>.PIN & LAN_BASEADR<12> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<12>.PIN & LAN_BASEADR<12> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<12>.CLK = CLK_EXT; // GCK LAN_BASEADR<12>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 17 | LAN_BASEADR<13> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 3 | 11 | 13 | 11 | 0 | 0 | 17 INPUTS | 15 | RW | AUTO_CONFIG_Z2_DONE<0> | D<13>.PIN | LAN_BASEADR<13> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 4 | 8 | 0 | 0 | 17 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 80 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 14 | LAN_BASEADR<13>.T = !RW & !AUTO_CONFIG_Z2_DONE<0> & D<13>.PIN & !LAN_BASEADR<13> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & D<13>.PIN & !LAN_BASEADR<13> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<13>.PIN & LAN_BASEADR<13> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<13>.PIN & LAN_BASEADR<13> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<13>.CLK = CLK_EXT; // GCK LAN_BASEADR<13>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 2 | LAN_BASEADR<14> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 4 | 11 | 4 | 11 | 0 | 3 | 2 | 11 | 17 INPUTS | 15 | RW | AUTO_CONFIG_Z2_DONE<0> | D<14>.PIN | LAN_BASEADR<14> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 4 | 8 | 0 | 3 | 2 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 81 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 14 | LAN_BASEADR<14>.T = !RW & !AUTO_CONFIG_Z2_DONE<0> & D<14>.PIN & !LAN_BASEADR<14> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & D<14>.PIN & !LAN_BASEADR<14> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<14>.PIN & LAN_BASEADR<14> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<14>.PIN & LAN_BASEADR<14> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<14>.CLK = CLK_EXT; // GCK LAN_BASEADR<14>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 15 | LAN_BASEADR<15> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 4 | 11 | 13 | 11 | 0 | 0 | 15 | 11 | 17 INPUTS | 15 | RW | AUTO_CONFIG_Z2_DONE<0> | D<15>.PIN | LAN_BASEADR<15> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 4 | 8 | 0 | 0 | 15 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 89 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 14 | LAN_BASEADR<15>.T = !RW & !AUTO_CONFIG_Z2_DONE<0> & D<15>.PIN & !LAN_BASEADR<15> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & D<15>.PIN & !LAN_BASEADR<15> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<15>.PIN & LAN_BASEADR<15> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<15>.PIN & LAN_BASEADR<15> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<15>.CLK = CLK_EXT; // GCK LAN_BASEADR<15>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 12 | LAN_BASEADR<8> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 3 | 11 | 14 | 11 | 1 | 0 | 12 INPUTS | 15 | RW | AUTO_CONFIG_Z2_DONE<0> | D<8>.PIN | LAN_BASEADR<8> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 4 | 8 | 0 | 0 | 12 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 32 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 14 | LAN_BASEADR<8>.T = !RW & !AUTO_CONFIG_Z2_DONE<0> & D<8>.PIN & !LAN_BASEADR<8> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & D<8>.PIN & !LAN_BASEADR<8> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<8>.PIN & LAN_BASEADR<8> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<8>.PIN & LAN_BASEADR<8> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<8>.CLK = CLK_EXT; // GCK LAN_BASEADR<8>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 10 | LAN_BASEADR<9> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 4 | 11 | 14 | 11 | 1 | 0 | 10 | 11 | 16 INPUTS | 15 | RW | AUTO_CONFIG_Z2_DONE<0> | D<9>.PIN | LAN_BASEADR<9> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | RESET INPUTMC | 4 | 8 | 0 | 0 | 10 | 4 | 8 | 4 | 12 INPUTP | 11 | 158 | 73 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EQ | 14 | LAN_BASEADR<9>.T = !RW & !AUTO_CONFIG_Z2_DONE<0> & D<9>.PIN & !LAN_BASEADR<9> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & D<9>.PIN & !LAN_BASEADR<9> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<9>.PIN & LAN_BASEADR<9> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & !AUTO_CONFIG_Z2_DONE<0> & !D<9>.PIN & LAN_BASEADR<9> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<9>.CLK = CLK_EXT; // GCK LAN_BASEADR<9>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 12 | LAN_IRQ_OUT ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 13 | 12 | 2 | 13 INPUTS | 4 | LAN_IRQ_OUT | LAN_IRQ_D0 | LAN_INT | RESET INPUTMC | 2 | 13 | 12 | 13 | 4 INPUTP | 2 | 201 | 263 EQ | 4 | LAN_IRQ_OUT.D = LAN_INT # LAN_IRQ_OUT & !LAN_IRQ_D0; LAN_IRQ_OUT.CLK = CLK_EXT; // GCK LAN_IRQ_OUT.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 5 | Z3_ADR<10> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 5 | 7 INPUTS | 5 | A<12>.PIN | RESET | FCS | AS_D1 | Z3 INPUTMC | 1 | 4 | 7 INPUTP | 4 | 115 | 263 | 147 | 151 EQ | 4 | Z3_ADR<10>.D = A<12>.PIN; Z3_ADR<10>.CLK = CLK_EXT; // GCK Z3_ADR<10>.AP = !RESET; Z3_ADR<10>.CE = !FCS & AS_D1 & Z3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 6 | Z3_ADR<11> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 5 | 2 | 11 | 7 INPUTS | 10 | A<13>.PIN | RESET | FCS | AS_D1 | Z3 | RW | LAN_ACCESS | UDS | DQ_DATA<13> | LDS INPUTMC | 3 | 4 | 7 | 11 | 2 | 12 | 15 INPUTP | 7 | 123 | 263 | 147 | 151 | 158 | 155 | 157 EXPORTS | 1 | 11 | 7 EQ | 8 | Z3_ADR<11>.D = A<13>.PIN; Z3_ADR<11>.CLK = CLK_EXT; // GCK Z3_ADR<11>.AP = !RESET; Z3_ADR<11>.CE = !FCS & AS_D1 & Z3; Z3_ADR<11>.EXP = !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<13> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<13> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 8 | Z3_ADR<12> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 5 | 4 | 11 | 7 INPUTS | 10 | A<14>.PIN | RESET | FCS | AS_D1 | Z3 | RW | LAN_ACCESS | DS1 | DQ_DATA<13> | DS0 INPUTMC | 3 | 4 | 7 | 11 | 2 | 12 | 15 INPUTP | 7 | 125 | 263 | 147 | 151 | 158 | 148 | 170 EXPORTS | 1 | 11 | 7 EQ | 8 | Z3_ADR<12>.D = A<14>.PIN; Z3_ADR<12>.CLK = CLK_EXT; // GCK Z3_ADR<12>.AP = !RESET; Z3_ADR<12>.CE = !FCS & AS_D1 & Z3; Z3_ADR<12>.EXP = !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<13> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<13> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 7 | Z3_ADR<2> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 3 | 7 INPUTS | 5 | A<4> | RESET | FCS | AS_D1 | Z3 INPUTMC | 1 | 4 | 7 INPUTP | 4 | 97 | 263 | 147 | 151 EQ | 4 | Z3_ADR<2>.D = A<4>; Z3_ADR<2>.CLK = CLK_EXT; // GCK Z3_ADR<2>.AP = !RESET; Z3_ADR<2>.CE = !FCS & AS_D1 & Z3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 8 | Z3_ADR<3> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 2 INPUTS | 5 | A<5> | RESET | FCS | AS_D1 | Z3 INPUTMC | 1 | 4 | 7 INPUTP | 4 | 91 | 263 | 147 | 151 EQ | 4 | Z3_ADR<3>.D = A<5>; Z3_ADR<3>.CLK = CLK_EXT; // GCK Z3_ADR<3>.AP = !RESET; Z3_ADR<3>.CE = !FCS & AS_D1 & Z3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 9 | Z3_ADR<4> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 3 | 13 INPUTS | 5 | A<6> | RESET | FCS | AS_D1 | Z3 INPUTMC | 1 | 4 | 7 INPUTP | 4 | 98 | 263 | 147 | 151 EQ | 4 | Z3_ADR<4>.D = A<6>; Z3_ADR<4>.CLK = CLK_EXT; // GCK Z3_ADR<4>.AP = !RESET; Z3_ADR<4>.CE = !FCS & AS_D1 & Z3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 11 | Z3_ADR<5> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 4 INPUTS | 5 | A<7> | RESET | FCS | AS_D1 | Z3 INPUTMC | 1 | 4 | 7 INPUTP | 4 | 100 | 263 | 147 | 151 EQ | 4 | Z3_ADR<5>.D = A<7>; Z3_ADR<5>.CLK = CLK_EXT; // GCK Z3_ADR<5>.AP = !RESET; Z3_ADR<5>.CE = !FCS & AS_D1 & Z3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 12 | Z3_ADR<6> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 2 INPUTS | 5 | A<8>.PIN | RESET | FCS | AS_D1 | Z3 INPUTMC | 1 | 4 | 7 INPUTP | 4 | 106 | 263 | 147 | 151 EQ | 4 | Z3_ADR<6>.D = A<8>.PIN; Z3_ADR<6>.CLK = CLK_EXT; // GCK Z3_ADR<6>.AP = !RESET; Z3_ADR<6>.CE = !FCS & AS_D1 & Z3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 14 | Z3_ADR<7> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 5 | 9 INPUTS | 5 | A<9>.PIN | RESET | FCS | AS_D1 | Z3 INPUTMC | 1 | 4 | 7 INPUTP | 4 | 108 | 263 | 147 | 151 EQ | 4 | Z3_ADR<7>.D = A<9>.PIN; Z3_ADR<7>.CLK = CLK_EXT; // GCK Z3_ADR<7>.AP = !RESET; Z3_ADR<7>.CE = !FCS & AS_D1 & Z3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 8 | Z3_ADR<8> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 5 | 12 INPUTS | 5 | A<10>.PIN | RESET | FCS | AS_D1 | Z3 INPUTMC | 1 | 4 | 7 INPUTP | 4 | 112 | 263 | 147 | 151 EQ | 4 | Z3_ADR<8>.D = A<10>.PIN; Z3_ADR<8>.CLK = CLK_EXT; // GCK Z3_ADR<8>.AP = !RESET; Z3_ADR<8>.CE = !FCS & AS_D1 & Z3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 7 | Z3_ADR<9> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 5 | 5 INPUTS | 5 | A<11>.PIN | RESET | FCS | AS_D1 | Z3 INPUTMC | 1 | 4 | 7 INPUTP | 4 | 114 | 263 | 147 | 151 EQ | 4 | Z3_ADR<9>.D = A<11>.PIN; Z3_ADR<9>.CLK = CLK_EXT; // GCK Z3_ADR<9>.AP = !RESET; Z3_ADR<9>.CE = !FCS & AS_D1 & Z3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 15 | Z3_ADR_0 ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 3 | 4 INPUTS | 5 | A<2> | RESET | FCS | AS_D1 | Z3 INPUTMC | 1 | 4 | 7 INPUTP | 4 | 101 | 263 | 147 | 151 EQ | 4 | Z3_ADR_0.D = A<2>; Z3_ADR_0.CLK = CLK_EXT; // GCK Z3_ADR_0.AP = !RESET; Z3_ADR_0.CE = !FCS & AS_D1 & Z3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 17 | Z3_ADR_1 ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 3 | 11 INPUTS | 5 | A<3> | RESET | FCS | AS_D1 | Z3 INPUTMC | 1 | 4 | 7 INPUTP | 4 | 99 | 263 | 147 | 151 EQ | 4 | Z3_ADR_1.D = A<3>; Z3_ADR_1.CLK = CLK_EXT; // GCK Z3_ADR_1.AP = !RESET; Z3_ADR_1.CE = !FCS & AS_D1 & Z3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 13 | Z3_DATA<16> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 3 | 0 | 15 | 14 INPUTS | 11 | DQ_SWAP | DQ<0>.PIN | DQ<8>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | UDS | LDS | A<18>.PIN INPUTMC | 6 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 5 | 217 | 231 | 155 | 157 | 171 EXPORTS | 1 | 15 | 14 EQ | 8 | Z3_DATA<16>.D = DQ_SWAP & DQ<8>.PIN # !DQ_SWAP & DQ<0>.PIN; Z3_DATA<16>.CLK = CLK_EXT; // GCK Z3_DATA<16>.AP = LAN_SM_RST; Z3_DATA<16>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; Z3_DATA<16>.EXP = !DQ_SWAP & UDS & LDS & A<18>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 12 | Z3_DATA<17> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 13 INPUTS | 8 | DQ_SWAP | DQ<1>.PIN | DQ<9>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 2 | 216 | 209 EQ | 6 | Z3_DATA<17>.D = DQ_SWAP & DQ<9>.PIN # !DQ_SWAP & DQ<1>.PIN; Z3_DATA<17>.CLK = CLK_EXT; // GCK Z3_DATA<17>.AP = LAN_SM_RST; Z3_DATA<17>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 11 | Z3_DATA<18> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 4 | 8 INPUTS | 8 | DQ_SWAP | DQ<10>.PIN | DQ<2>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 2 | 234 | 220 EQ | 6 | Z3_DATA<18>.D = DQ_SWAP & DQ<10>.PIN # !DQ_SWAP & DQ<2>.PIN; Z3_DATA<18>.CLK = CLK_EXT; // GCK Z3_DATA<18>.AP = LAN_SM_RST; Z3_DATA<18>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 12 | Z3_DATA<19> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 10 INPUTS | 8 | DQ_SWAP | DQ<11>.PIN | DQ<3>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 2 | 207 | 219 EQ | 6 | Z3_DATA<19>.D = DQ_SWAP & DQ<11>.PIN # !DQ_SWAP & DQ<3>.PIN; Z3_DATA<19>.CLK = CLK_EXT; // GCK Z3_DATA<19>.AP = LAN_SM_RST; Z3_DATA<19>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 8 | Z3_DATA<20> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 0 | 6 INPUTS | 8 | DQ_SWAP | DQ<12>.PIN | DQ<4>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 2 | 235 | 225 EQ | 6 | Z3_DATA<20>.D = DQ_SWAP & DQ<12>.PIN # !DQ_SWAP & DQ<4>.PIN; Z3_DATA<20>.CLK = CLK_EXT; // GCK Z3_DATA<20>.AP = LAN_SM_RST; Z3_DATA<20>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 7 | Z3_DATA<21> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 0 | 3 INPUTS | 8 | DQ_SWAP | DQ<13>.PIN | DQ<5>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 2 | 204 | 221 EQ | 6 | Z3_DATA<21>.D = DQ_SWAP & DQ<13>.PIN # !DQ_SWAP & DQ<5>.PIN; Z3_DATA<21>.CLK = CLK_EXT; // GCK Z3_DATA<21>.AP = LAN_SM_RST; Z3_DATA<21>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 6 | Z3_DATA<22> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 8 INPUTS | 8 | DQ_SWAP | DQ<14>.PIN | DQ<6>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 2 | 236 | 227 EQ | 6 | Z3_DATA<22>.D = DQ_SWAP & DQ<14>.PIN # !DQ_SWAP & DQ<6>.PIN; Z3_DATA<22>.CLK = CLK_EXT; // GCK Z3_DATA<22>.AP = LAN_SM_RST; Z3_DATA<22>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 3 | Z3_DATA<23> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 1 | 11 | 12 | 4 INPUTS | 13 | DQ_SWAP | DQ<15>.PIN | RW | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | UDS | DS1 | A<23>.PIN | LAN_INT_ENABLE | Z3_DATA<31>.EXP INPUTMC | 8 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 | 12 | 4 | 12 | 2 INPUTP | 5 | 202 | 158 | 155 | 148 | 161 EXPORTS | 1 | 12 | 4 IMPORTS | 1 | 12 | 2 EQ | 13 | Z3_DATA<23>.D = DQ_SWAP & DQ<15>.PIN ;Imported pterms FB13_3 # !DQ_SWAP & DQ<7>.PIN; Z3_DATA<23>.CLK = CLK_EXT; // GCK Z3_DATA<23>.AP = LAN_SM_RST; Z3_DATA<23>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; Z3_DATA<23>.EXP = !RW & UDS & !DS1 & A<23>.PIN & !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_INT_ENABLE & !LAN_SM_RST # !RW & UDS & !DS1 & !A<23>.PIN & !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_INT_ENABLE & !LAN_SM_RST GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 8 | Z3_DATA<24> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 15 INPUTS | 8 | DQ_SWAP | DQ<0>.PIN | DQ<8>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 2 | 217 | 231 EQ | 6 | Z3_DATA<24>.D = DQ_SWAP & DQ<0>.PIN # !DQ_SWAP & DQ<8>.PIN; Z3_DATA<24>.CLK = CLK_EXT; // GCK Z3_DATA<24>.AP = LAN_SM_RST; Z3_DATA<24>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 6 | Z3_DATA<25> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 4 | 10 INPUTS | 8 | DQ_SWAP | DQ<1>.PIN | DQ<9>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 2 | 216 | 209 EQ | 6 | Z3_DATA<25>.D = DQ_SWAP & DQ<1>.PIN # !DQ_SWAP & DQ<9>.PIN; Z3_DATA<25>.CLK = CLK_EXT; // GCK Z3_DATA<25>.AP = LAN_SM_RST; Z3_DATA<25>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 4 | Z3_DATA<26> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 4 | 14 INPUTS | 8 | DQ_SWAP | DQ<10>.PIN | DQ<2>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 2 | 234 | 220 EQ | 6 | Z3_DATA<26>.D = DQ_SWAP & DQ<2>.PIN # !DQ_SWAP & DQ<10>.PIN; Z3_DATA<26>.CLK = CLK_EXT; // GCK Z3_DATA<26>.AP = LAN_SM_RST; Z3_DATA<26>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 5 | Z3_DATA<27> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 4 | 16 INPUTS | 8 | DQ_SWAP | DQ<11>.PIN | DQ<3>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 2 | 207 | 219 EQ | 6 | Z3_DATA<27>.D = DQ_SWAP & DQ<3>.PIN # !DQ_SWAP & DQ<11>.PIN; Z3_DATA<27>.CLK = CLK_EXT; // GCK Z3_DATA<27>.AP = LAN_SM_RST; Z3_DATA<27>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 3 | Z3_DATA<28> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 4 | 17 | 10 | 2 INPUTS | 9 | DQ_SWAP | DQ<12>.PIN | DQ<4>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ<3>.PIN INPUTMC | 6 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 3 | 235 | 225 | 219 EXPORTS | 1 | 10 | 2 EQ | 7 | Z3_DATA<28>.D = DQ_SWAP & DQ<4>.PIN # !DQ_SWAP & DQ<12>.PIN; Z3_DATA<28>.CLK = CLK_EXT; // GCK Z3_DATA<28>.AP = LAN_SM_RST; Z3_DATA<28>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; Z3_DATA<28>.EXP = !DQ_SWAP & DQ<3>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 1 | Z3_DATA<29> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 6 | 1 | 10 | 0 INPUTS | 10 | DQ_SWAP | DQ<13>.PIN | DQ<6>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ<14>.PIN | Z3_DATA<3>.EXP INPUTMC | 7 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 | 10 | 2 INPUTP | 3 | 204 | 227 | 236 EXPORTS | 1 | 10 | 0 IMPORTS | 1 | 10 | 2 EQ | 9 | Z3_DATA<29>.D = !DQ_SWAP & DQ<13>.PIN ;Imported pterms FB11_3 # DQ_SWAP & DQ<5>.PIN; Z3_DATA<29>.CLK = CLK_EXT; // GCK Z3_DATA<29>.AP = LAN_SM_RST; Z3_DATA<29>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; Z3_DATA<29>.EXP = DQ_SWAP & DQ<6>.PIN # !DQ_SWAP & DQ<14>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 0 | Z3_DATA<30> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 6 | 3 | 10 | 17 INPUTS | 12 | DQ_SWAP | D<8>.PIN | LDS | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | UDS | A<16>.PIN | A<8>.PIN | Z3_DATA<29>.EXP INPUTMC | 7 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 | 10 | 1 INPUTP | 5 | 32 | 157 | 155 | 175 | 106 EXPORTS | 1 | 10 | 17 IMPORTS | 1 | 10 | 1 EQ | 13 | Z3_DATA<30>.D = ;Imported pterms FB11_2 DQ_SWAP & DQ<6>.PIN # !DQ_SWAP & DQ<14>.PIN; Z3_DATA<30>.CLK = CLK_EXT; // GCK Z3_DATA<30>.AP = LAN_SM_RST; Z3_DATA<30>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; Z3_DATA<30>.EXP = DQ_SWAP & D<8>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & UDS & LDS & A<16>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<8>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 2 | Z3_DATA<31> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 6 | 10 | 12 | 3 INPUTS | 8 | DQ_SWAP | DQ<15>.PIN | DQ<7>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 15 | 6 | 12 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 INPUTP | 2 | 202 | 226 EXPORTS | 1 | 12 | 3 EQ | 7 | Z3_DATA<31>.D = DQ_SWAP & DQ<7>.PIN # !DQ_SWAP & DQ<15>.PIN; Z3_DATA<31>.CLK = CLK_EXT; // GCK Z3_DATA<31>.AP = LAN_SM_RST; Z3_DATA<31>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; Z3_DATA<31>.EXP = !DQ_SWAP & DQ<7>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 9 | 16 | DQ_10_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 17 INPUTS | 11 | RESET | LAN_D_INIT<8> | RW | LAN_ACCESS | LDS | FCS | DQ_DATA<4> | DS1 | DS0 | EXP57_.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST INPUTMC | 5 | 2 | 12 | 11 | 2 | 7 | 13 | 9 | 15 | 6 | 5 INPUTP | 6 | 263 | 158 | 157 | 147 | 148 | 170 EXPORTS | 1 | 9 | 17 IMPORTS | 1 | 9 | 15 EQ | 22 | DQ<10> = !RESET & LAN_D_INIT<8> ;Imported pterms FB10_16 # RW & RESET & D<10>.PIN # RESET & !LAN_ACCESS & D<10>.PIN # RESET & D<10>.PIN & FCS # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<10> # RESET & D<10>.PIN & UDS & LDS & DS1 & DS0 ;Imported pterms FB10_15 # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<10> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<10> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<10>; DQ<10>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; DQ_10_IOBUFE.EXP = !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<4> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<4> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<4> MACROCELL | 11 | 9 | DQ_11_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RESET | LAN_D_INIT<8> | LAN_ACCESS | D<11>.PIN | RW | FCS | EXP64_.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST INPUTMC | 4 | 2 | 12 | 11 | 2 | 11 | 10 | 6 | 5 INPUTP | 4 | 263 | 77 | 158 | 147 IMPORTS | 1 | 11 | 10 EQ | 15 | DQ<11> = !RESET & LAN_D_INIT<8> # RW & RESET & D<11>.PIN # RESET & !LAN_ACCESS & D<11>.PIN # RESET & D<11>.PIN & FCS ;Imported pterms FB12_11 # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<11> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<11> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<11> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<11> # RESET & D<11>.PIN & UDS & LDS & DS1 & DS0; DQ<11>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; MACROCELL | 9 | 1 | DQ_1_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 9 | RESET | LAN_D_INIT<1> | LAN_ACCESS | D<1>.PIN | RW | FCS | DQ<4>_BUFR.EXP | DQ_0_IOBUFE.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST INPUTMC | 5 | 2 | 14 | 11 | 2 | 9 | 0 | 9 | 2 | 6 | 5 INPUTP | 4 | 263 | 30 | 158 | 147 IMPORTS | 2 | 9 | 0 | 9 | 2 EQ | 16 | DQ<1> = !RESET & LAN_D_INIT<1> # RW & RESET & D<1>.PIN # RESET & !LAN_ACCESS & D<1>.PIN # RESET & FCS & D<1>.PIN ;Imported pterms FB10_1 # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<1> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<1> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<1> # RESET & UDS & LDS & DS1 & DS0 & D<1>.PIN ;Imported pterms FB10_3 # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<1>; DQ<1>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; MACROCELL | 9 | 0 | DQ<4>_BUFR.MC ATTRIBUTES | 133888 | 0 OUTPUTMC | 2 | 9 | 9 | 9 | 1 INPUTS | 12 | RESET | LAN_D_INIT<1> | RW | LAN_ACCESS | UDS | FCS | DQ_DATA<1> | LDS | DS1 | DS0 | D<1>.PIN | EXP58_.EXP INPUTMC | 4 | 2 | 14 | 11 | 2 | 12 | 11 | 9 | 17 INPUTP | 8 | 263 | 158 | 155 | 147 | 157 | 148 | 170 | 30 EXPORTS | 1 | 9 | 1 IMPORTS | 1 | 9 | 17 EQ | 22 | DQ<4>_BUFR = !RESET & LAN_D_INIT<1> ;Imported pterms FB10_18 # RW & RESET & D<4>.PIN # RESET & !LAN_ACCESS & D<4>.PIN # RESET & FCS & D<4>.PIN # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<4> # RESET & UDS & LDS & DS1 & DS0 & D<4>.PIN ;Imported pterms FB10_17 # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<4> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<4> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<4>; DQ<4>_BUFR.EXP = !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<1> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<1> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<1> # RESET & UDS & LDS & DS1 & DS0 & D<1>.PIN MACROCELL | 6 | 17 | DQ<8>_BUFR.MC ATTRIBUTES | 133888 | 0 OUTPUTMC | 1 | 9 | 13 INPUTS | 11 | RESET | LAN_D_INIT<8> | LAN_ACCESS | D<8>.PIN | RW | FCS | UDS | LDS | DS1 | DS0 | EXP43_.EXP INPUTMC | 3 | 2 | 12 | 11 | 2 | 6 | 16 INPUTP | 8 | 263 | 32 | 158 | 147 | 155 | 157 | 148 | 170 IMPORTS | 1 | 6 | 16 EQ | 14 | DQ<8>_BUFR = !RESET & LAN_D_INIT<8> # RW & RESET & D<8>.PIN # RESET & !LAN_ACCESS & D<8>.PIN # RESET & D<8>.PIN & FCS # RESET & D<8>.PIN & UDS & LDS & DS1 & DS0 ;Imported pterms FB7_17 # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<8> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<8> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<8> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<8>; MACROCELL | 11 | 11 | DQ_9_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RESET | LAN_D_INIT<1> | LAN_ACCESS | D<9>.PIN | RW | FCS | EXP65_.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST INPUTMC | 4 | 2 | 14 | 11 | 2 | 11 | 12 | 6 | 5 INPUTP | 4 | 263 | 73 | 158 | 147 IMPORTS | 1 | 11 | 12 EQ | 15 | DQ<9> = !RESET & LAN_D_INIT<1> # RW & RESET & D<9>.PIN # RESET & !LAN_ACCESS & D<9>.PIN # RESET & D<9>.PIN & FCS ;Imported pterms FB12_13 # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<9> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<9> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<9> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<9> # RESET & D<9>.PIN & UDS & LDS & DS1 & DS0; DQ<9>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; MACROCELL | 3 | 1 | D_0_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RW | DQ<0>.PIN | LAN_ACCESS | FCS | AS | AUTOCONFIG_Z2_ACCESS | SHUT_UP_Z2<2>.EXP | D_8_IOBUFE/D_8_IOBUFE_TRST INPUTMC | 4 | 11 | 2 | 4 | 12 | 3 | 0 | 4 | 10 INPUTP | 4 | 158 | 217 | 147 | 152 IMPORTS | 1 | 3 | 0 EQ | 8 | D<0> = !RW & DQ<0>.PIN # !LAN_ACCESS & DQ<0>.PIN # FCS & DQ<0>.PIN # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB4_1 # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<16> & !FCS; D<0>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; MACROCELL | 4 | 13 | D_10_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 9 | RW | DQ<10>.PIN | AS | LAN_ACCESS | FCS | AUTOCONFIG_Z2_ACCESS | CP_CS | D_11_IOBUFE.EXP | D_8_IOBUFE/D_8_IOBUFE_TRST INPUTMC | 5 | 11 | 2 | 4 | 12 | 4 | 1 | 4 | 14 | 4 | 10 INPUTP | 4 | 158 | 234 | 152 | 147 IMPORTS | 1 | 4 | 14 EQ | 13 | !D<10> = !RW & !DQ<10>.PIN # AS & !LAN_ACCESS & !DQ<10>.PIN # AS & FCS & !DQ<10>.PIN # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<10>.PIN & CP_CS ;Imported pterms FB5_15 # RW & LAN_ACCESS & !Z3_DATA<26> & !FCS # !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<10>.PIN & CP_CS # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<2>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<2>.PIN & !CP_CS; D<10>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; MACROCELL | 4 | 14 | D_11_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 4 | 13 INPUTS | 11 | RW | LAN_ACCESS | Z3_DATA<26> | FCS | AUTOCONFIG_Z2_ACCESS | DQ<10>.PIN | CP_CS | AS | DQ<2>.PIN | D_8_IOBUFE/D_8_IOBUFE_TRST | EXP30_.EXP INPUTMC | 6 | 11 | 2 | 15 | 4 | 4 | 12 | 4 | 1 | 4 | 10 | 4 | 15 INPUTP | 5 | 158 | 147 | 234 | 152 | 220 EXPORTS | 1 | 4 | 13 IMPORTS | 1 | 4 | 15 EQ | 20 | !D<11> = ;Imported pterms FB5_16 !RW & !DQ<11>.PIN # AS & !LAN_ACCESS & !DQ<11>.PIN # AS & FCS & !DQ<11>.PIN # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<11>.PIN & CP_CS # !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<11>.PIN & CP_CS ;Imported pterms FB5_17 # RW & LAN_ACCESS & !Z3_DATA<27> & !FCS # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<3>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<3>.PIN & !CP_CS; D<11>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; D_11_IOBUFE.EXP = RW & LAN_ACCESS & !Z3_DATA<26> & !FCS # !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<10>.PIN & CP_CS # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<2>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<2>.PIN & !CP_CS MACROCELL | 4 | 16 | D_12_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 4 | 15 INPUTS | 11 | RW | DQ<12>.PIN | LAN_ACCESS | Z3_DATA<27> | FCS | AS | AUTOCONFIG_Z2_ACCESS | DQ<3>.PIN | CP_CS | EXP31_.EXP | D_8_IOBUFE/D_8_IOBUFE_TRST INPUTMC | 6 | 11 | 2 | 10 | 5 | 4 | 12 | 4 | 1 | 4 | 17 | 4 | 10 INPUTP | 5 | 158 | 235 | 147 | 152 | 219 EXPORTS | 1 | 4 | 15 IMPORTS | 1 | 4 | 17 EQ | 23 | D<12> = !RW & DQ<12>.PIN ;Imported pterms FB5_18 # AS & !LAN_ACCESS & DQ<12>.PIN # AS & FCS & DQ<12>.PIN # RW & LAN_ACCESS & Z3_DATA<28> & !FCS # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<12>.PIN & CP_CS # !AUTOCONFIG_Z2_ACCESS & FCS & DQ<12>.PIN & CP_CS ;Imported pterms FB5_1 # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<0> # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS & D_Z2_OUT<0> # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<4>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & DQ<4>.PIN & !CP_CS; D<12>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; D_12_IOBUFE.EXP = RW & LAN_ACCESS & !Z3_DATA<27> & !FCS # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<3>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<3>.PIN & !CP_CS MACROCELL | 6 | 2 | D_13_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 6 | 3 INPUTS | 11 | RW | DQ<13>.PIN | AS | AUTOCONFIG_Z2_ACCESS | FCS | D_Z2_OUT<2> | LAN_ACCESS | DQ<6>.PIN | CP_CS | EXP38_.EXP | D_8_IOBUFE/D_8_IOBUFE_TRST INPUTMC | 6 | 4 | 12 | 6 | 14 | 11 | 2 | 4 | 1 | 6 | 1 | 4 | 10 INPUTP | 5 | 158 | 204 | 152 | 147 | 227 EXPORTS | 1 | 6 | 3 IMPORTS | 1 | 6 | 1 EQ | 24 | D<13> = !RW & DQ<13>.PIN ;Imported pterms FB7_2 # AS & !LAN_ACCESS & DQ<13>.PIN # AS & FCS & DQ<13>.PIN # RW & LAN_ACCESS & Z3_DATA<29> & !FCS # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<13>.PIN & CP_CS # !AUTOCONFIG_Z2_ACCESS & FCS & DQ<13>.PIN & CP_CS ;Imported pterms FB7_1 # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<1> # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS & D_Z2_OUT<1> # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<5>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & DQ<5>.PIN & !CP_CS; D<13>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; D_13_IOBUFE.EXP = !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS & D_Z2_OUT<2> # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<6>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & DQ<6>.PIN & !CP_CS MACROCELL | 6 | 4 | D_14_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 6 | 5 INPUTS | 9 | RW | DQ<14>.PIN | AS | LAN_ACCESS | DS1 | FCS | DS0 | EXP39_.EXP | D_8_IOBUFE/D_8_IOBUFE_TRST INPUTMC | 3 | 11 | 2 | 6 | 3 | 4 | 10 INPUTP | 6 | 158 | 236 | 152 | 148 | 147 | 170 EXPORTS | 1 | 6 | 5 IMPORTS | 1 | 6 | 3 EQ | 20 | D<14> = !RW & DQ<14>.PIN # AS & !LAN_ACCESS & DQ<14>.PIN ;Imported pterms FB7_4 # AS & FCS & DQ<14>.PIN # RW & LAN_ACCESS & Z3_DATA<30> & !FCS # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<14>.PIN & CP_CS # !AUTOCONFIG_Z2_ACCESS & FCS & DQ<14>.PIN & CP_CS # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<2> ;Imported pterms FB7_3 # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS & D_Z2_OUT<2> # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<6>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & DQ<6>.PIN & !CP_CS; D<14>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; D_14_IOBUFE.EXP = !RW & LAN_ACCESS & !DS1 & !FCS # !RW & LAN_ACCESS & !DS0 & !FCS MACROCELL | 6 | 11 | D_15_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 10 | RW | DQ<15>.PIN | AS | LAN_ACCESS | FCS | AUTOCONFIG_Z2_ACCESS | CP_CS | EXP40_.EXP | LAN_SM_RST.EXP | D_8_IOBUFE/D_8_IOBUFE_TRST INPUTMC | 6 | 11 | 2 | 4 | 12 | 4 | 1 | 6 | 10 | 6 | 12 | 4 | 10 INPUTP | 4 | 158 | 202 | 152 | 147 IMPORTS | 2 | 6 | 10 | 6 | 12 EQ | 18 | D<15> = !RW & DQ<15>.PIN # AS & !LAN_ACCESS & DQ<15>.PIN # AS & FCS & DQ<15>.PIN # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<15>.PIN & CP_CS ;Imported pterms FB7_11 # RW & LAN_ACCESS & Z3_DATA<31> & !FCS # !AUTOCONFIG_Z2_ACCESS & FCS & DQ<15>.PIN & CP_CS # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<3> # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS & D_Z2_OUT<3> # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<7>.PIN & !CP_CS ;Imported pterms FB7_13 # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & DQ<7>.PIN & !CP_CS; D<15>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; MACROCELL | 1 | 14 | D_1_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 1 | 15 INPUTS | 10 | RW | DQ<1>.PIN | LAN_ACCESS | AS | AUTOCONFIG_Z2_ACCESS | DQ<0>.PIN | CP_CS | D_8_IOBUFE/D_8_IOBUFE_TRST | FCS | D_7_IOBUFE.EXP INPUTMC | 5 | 11 | 2 | 4 | 12 | 4 | 1 | 4 | 10 | 1 | 13 INPUTP | 5 | 158 | 216 | 152 | 217 | 147 EXPORTS | 1 | 1 | 15 IMPORTS | 1 | 1 | 13 EQ | 12 | D<1> = !RW & DQ<1>.PIN # !LAN_ACCESS & DQ<1>.PIN ;Imported pterms FB2_14 # FCS & DQ<1>.PIN # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<17> & !FCS; D<1>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; D_1_IOBUFE.EXP = !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<0>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<0>.PIN & !CP_CS MACROCELL | 4 | 9 | D_2_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 4 | 10 INPUTS | 8 | RW | DQ<2>.PIN | LAN_ACCESS | AS | IDE_ACCESS | FCS | AS_D0.EXP | D_8_IOBUFE/D_8_IOBUFE_TRST INPUTMC | 4 | 11 | 2 | 5 | 17 | 4 | 8 | 4 | 10 INPUTP | 4 | 158 | 220 | 152 | 147 EXPORTS | 1 | 4 | 10 IMPORTS | 1 | 4 | 8 EQ | 10 | D<2> = !RW & DQ<2>.PIN # !LAN_ACCESS & DQ<2>.PIN ;Imported pterms FB5_9 # FCS & DQ<2>.PIN # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<18> & !FCS; D<2>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; D_2_IOBUFE.EXP = !AS & RW & IDE_ACCESS # RW & LAN_ACCESS & !FCS MACROCELL | 1 | 11 | D_3_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 1 | 12 INPUTS | 7 | RW | DQ<3>.PIN | LAN_ACCESS | FCS | Z3_DATA<23> | IDE_BASEADR<0>.EXP | D_8_IOBUFE/D_8_IOBUFE_TRST INPUTMC | 4 | 11 | 2 | 12 | 3 | 1 | 10 | 4 | 10 INPUTP | 3 | 158 | 219 | 147 EXPORTS | 1 | 1 | 12 IMPORTS | 1 | 1 | 10 EQ | 9 | D<3> = !RW & DQ<3>.PIN # !LAN_ACCESS & DQ<3>.PIN # FCS & DQ<3>.PIN ;Imported pterms FB2_11 # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<19> & !FCS; D<3>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; D_3_IOBUFE.EXP = RW & LAN_ACCESS & Z3_DATA<23> & !FCS MACROCELL | 0 | 5 | D_4_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RW | DQ<4>.PIN | LAN_ACCESS | FCS | AS | AUTOCONFIG_Z2_ACCESS | AUTO_CONFIG_Z2_DONE_CYCLE<2>.EXP | D_8_IOBUFE/D_8_IOBUFE_TRST INPUTMC | 4 | 11 | 2 | 4 | 12 | 0 | 6 | 4 | 10 INPUTP | 4 | 158 | 225 | 147 | 152 IMPORTS | 1 | 0 | 6 EQ | 8 | D<4> = !RW & DQ<4>.PIN # !LAN_ACCESS & DQ<4>.PIN # FCS & DQ<4>.PIN # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB1_7 # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<20> & !FCS; D<4>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; MACROCELL | 0 | 4 | D_5_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RW | DQ<5>.PIN | LAN_ACCESS | FCS | AS | AUTOCONFIG_Z2_ACCESS | SHUT_UP_Z2<1>.EXP | D_8_IOBUFE/D_8_IOBUFE_TRST INPUTMC | 4 | 11 | 2 | 4 | 12 | 0 | 3 | 4 | 10 INPUTP | 4 | 158 | 221 | 147 | 152 IMPORTS | 1 | 0 | 3 EQ | 8 | D<5> = !RW & DQ<5>.PIN # !LAN_ACCESS & DQ<5>.PIN # FCS & DQ<5>.PIN # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB1_4 # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<21> & !FCS; D<5>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; MACROCELL | 1 | 9 | D_6_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 1 | 10 INPUTS | 19 | RW | DQ<6>.PIN | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<8>.PIN | IDE_BASEADR<0> | D_8_IOBUFE/D_8_IOBUFE_TRST | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | LDS | EXP24_.EXP INPUTMC | 8 | 8 | 0 | 0 | 8 | 13 | 17 | 1 | 10 | 4 | 10 | 4 | 8 | 4 | 12 | 1 | 8 INPUTP | 11 | 158 | 227 | 32 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 EXPORTS | 1 | 1 | 10 IMPORTS | 1 | 1 | 8 EQ | 20 | D<6> = !RW & DQ<6>.PIN ;Imported pterms FB2_9 # !LAN_ACCESS & DQ<6>.PIN # FCS & DQ<6>.PIN # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<22> & !FCS; D<6>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; D_6_IOBUFE.EXP = !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<8>.PIN & !IDE_BASEADR<0> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<8>.PIN & !IDE_BASEADR<0> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<8>.PIN & IDE_BASEADR<0> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS MACROCELL | 1 | 13 | D_7_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 1 | 14 INPUTS | 9 | FCS | DQ<1>.PIN | AS | RW | LAN_ACCESS | AUTOCONFIG_Z2_ACCESS | Z3_DATA<17> | D_8_IOBUFE/D_8_IOBUFE_TRST | EXP25_.EXP INPUTMC | 5 | 11 | 2 | 4 | 12 | 15 | 12 | 4 | 10 | 1 | 12 INPUTP | 4 | 147 | 216 | 152 | 158 EXPORTS | 1 | 1 | 14 IMPORTS | 1 | 1 | 12 EQ | 13 | D<7> = ;Imported pterms FB2_13 !RW & DQ<7>.PIN # !LAN_ACCESS & DQ<7>.PIN # FCS & DQ<7>.PIN # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS ;Imported pterms FB2_12 # RW & LAN_ACCESS & Z3_DATA<23> & !FCS; D<7>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; D_7_IOBUFE.EXP = FCS & DQ<1>.PIN # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<17> & !FCS MACROCELL | 1 | 16 | D_8_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 1 | 17 INPUTS | 10 | RW | DQ<8>.PIN | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | A<4> | A<2> | A<1> | A<5> | EXP26_.EXP | D_8_IOBUFE/D_8_IOBUFE_TRST INPUTMC | 4 | 8 | 0 | 0 | 8 | 1 | 15 | 4 | 10 INPUTP | 6 | 158 | 231 | 97 | 101 | 107 | 91 EXPORTS | 1 | 1 | 17 IMPORTS | 1 | 1 | 15 EQ | 20 | !D<8> = !RW & !DQ<8>.PIN ;Imported pterms FB2_16 # AS & !LAN_ACCESS & !DQ<8>.PIN # AS & FCS & !DQ<8>.PIN # RW & LAN_ACCESS & !Z3_DATA<24> & !FCS # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<8>.PIN & CP_CS # !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<8>.PIN & CP_CS ;Imported pterms FB2_15 # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<0>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<0>.PIN & !CP_CS; D<8>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; D_8_IOBUFE.EXP = AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & A<4> & !A<2> & A<1> # AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !A<4> & A<2> & A<1> # AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<4> & !A<5> & A<2> & !A<1> MACROCELL | 4 | 11 | D_9_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 10 | RW | DQ<9>.PIN | AS | LAN_ACCESS | FCS | AUTOCONFIG_Z2_ACCESS | CP_CS | D_8_IOBUFE/D_8_IOBUFE_TRST.EXP | AUTOCONFIG_Z2_ACCESS.EXP | D_8_IOBUFE/D_8_IOBUFE_TRST INPUTMC | 6 | 11 | 2 | 4 | 12 | 4 | 1 | 4 | 10 | 4 | 12 | 4 | 10 INPUTP | 4 | 158 | 209 | 152 | 147 IMPORTS | 2 | 4 | 10 | 4 | 12 EQ | 14 | !D<9> = !RW & !DQ<9>.PIN # AS & !LAN_ACCESS & !DQ<9>.PIN # AS & FCS & !DQ<9>.PIN # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<9>.PIN & CP_CS ;Imported pterms FB5_11 # RW & LAN_ACCESS & !Z3_DATA<25> & !FCS # !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<9>.PIN & CP_CS # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<1>.PIN & !CP_CS ;Imported pterms FB5_13 # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<1>.PIN & !CP_CS; D<9>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST; MACROCELL | 9 | 2 | DQ_0_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 1 INPUTS | 9 | RESET | LAN_ACCESS | D<0>.PIN | RW | FCS | DS0 | DQ_DATA<1> | EXP52_.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST INPUTMC | 4 | 11 | 2 | 12 | 11 | 9 | 3 | 6 | 5 INPUTP | 5 | 263 | 4 | 158 | 147 | 170 EXPORTS | 1 | 9 | 1 IMPORTS | 1 | 9 | 3 EQ | 16 | DQ<0> = RW & RESET & D<0>.PIN # RESET & !LAN_ACCESS & D<0>.PIN # RESET & FCS & D<0>.PIN ;Imported pterms FB10_4 # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<0> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<0> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<0> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<0> # RESET & UDS & LDS & DS1 & DS0 & D<0>.PIN; DQ<0>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; DQ_0_IOBUFE.EXP = !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<1> MACROCELL | 7 | 1 | DQ_12_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 12 | RESET | LAN_ACCESS | D<12>.PIN | RW | FCS | UDS | LDS | DS1 | DS0 | DQ_DATA<12>.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST | DQ_14_IOBUFE.EXP INPUTMC | 4 | 11 | 2 | 7 | 0 | 6 | 5 | 7 | 2 INPUTP | 8 | 263 | 78 | 158 | 147 | 155 | 157 | 148 | 170 IMPORTS | 2 | 7 | 0 | 7 | 2 EQ | 15 | DQ<12> = RW & RESET & D<12>.PIN # RESET & !LAN_ACCESS & D<12>.PIN # RESET & D<12>.PIN & FCS # RESET & D<12>.PIN & UDS & LDS & DS1 & DS0 ;Imported pterms FB8_1 # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<12> ;Imported pterms FB8_3 # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<12> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<12> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<12>; DQ<12>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; MACROCELL | 11 | 7 | DQ_13_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 12 | RESET | LAN_ACCESS | D<13>.PIN | RW | FCS | UDS | LDS | DS1 | DS0 | Z3_ADR<11>.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST | Z3_ADR<12>.EXP INPUTMC | 4 | 11 | 2 | 11 | 6 | 6 | 5 | 11 | 8 INPUTP | 8 | 263 | 80 | 158 | 147 | 155 | 157 | 148 | 170 IMPORTS | 2 | 11 | 6 | 11 | 8 EQ | 15 | DQ<13> = RW & RESET & D<13>.PIN # RESET & !LAN_ACCESS & D<13>.PIN # RESET & D<13>.PIN & FCS # RESET & D<13>.PIN & UDS & LDS & DS1 & DS0 ;Imported pterms FB12_7 # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<13> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<13> ;Imported pterms FB12_9 # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<13> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<13>; DQ<13>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; MACROCELL | 7 | 2 | DQ_14_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 7 | 1 INPUTS | 11 | RESET | LAN_ACCESS | D<14>.PIN | RW | LDS | FCS | DQ_DATA<12> | DS1 | DS0 | EXP44_.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST INPUTMC | 4 | 11 | 2 | 7 | 0 | 7 | 3 | 6 | 5 INPUTP | 7 | 263 | 81 | 158 | 157 | 147 | 148 | 170 EXPORTS | 1 | 7 | 1 IMPORTS | 1 | 7 | 3 EQ | 21 | DQ<14> = RESET & !LAN_ACCESS & D<14>.PIN ;Imported pterms FB8_4 # RW & RESET & D<14>.PIN # RESET & D<14>.PIN & FCS # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<14> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<14> # RESET & D<14>.PIN & UDS & LDS & DS1 & DS0 ;Imported pterms FB8_5 # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<14> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<14>; DQ<14>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; DQ_14_IOBUFE.EXP = !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<12> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<12> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<12> MACROCELL | 11 | 4 | DQ_15_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 11 | 3 INPUTS | 10 | RESET | LAN_ACCESS | D<15>.PIN | RW | FCS | D<14>.PIN | LAN_BASEADR<14> | AS_D1 | EXP63_.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST INPUTMC | 5 | 11 | 2 | 3 | 2 | 4 | 7 | 11 | 5 | 6 | 5 INPUTP | 5 | 263 | 89 | 158 | 147 | 81 EXPORTS | 1 | 11 | 3 IMPORTS | 1 | 11 | 5 EQ | 15 | DQ<15> = RW & RESET & D<15>.PIN # RESET & !LAN_ACCESS & D<15>.PIN # RESET & D<15>.PIN & FCS ;Imported pterms FB12_6 # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<15> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<15> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<15> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<15> # RESET & D<15>.PIN & UDS & LDS & DS1 & DS0; DQ<15>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; DQ_15_IOBUFE.EXP = !D<14>.PIN & LAN_BASEADR<14> & AS_D1 MACROCELL | 9 | 5 | DQ_2_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 4 INPUTS | 11 | RW | RESET | LAN_ACCESS | UDS | FCS | DQ_DATA<3> | LDS | DS1 | DS0 | EXP53_.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST INPUTMC | 4 | 11 | 2 | 5 | 12 | 9 | 6 | 6 | 5 INPUTP | 7 | 158 | 263 | 155 | 147 | 157 | 148 | 170 EXPORTS | 1 | 9 | 4 IMPORTS | 1 | 9 | 6 EQ | 23 | DQ<2> = ;Imported pterms FB10_7 RW & RESET & D<2>.PIN # RESET & !LAN_ACCESS & D<2>.PIN # RESET & FCS & D<2>.PIN # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<2> # RESET & UDS & LDS & DS1 & DS0 & D<2>.PIN ;Imported pterms FB10_8 # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<2> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<2> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<2>; DQ<2>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; DQ_2_IOBUFE.EXP = !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<3> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<3> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<3> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<3> MACROCELL | 9 | 4 | DQ_3_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 11 | RESET | LAN_ACCESS | D<3>.PIN | RW | FCS | UDS | LDS | DS1 | DS0 | DQ_2_IOBUFE.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST INPUTMC | 3 | 11 | 2 | 9 | 5 | 6 | 5 INPUTP | 8 | 263 | 28 | 158 | 147 | 155 | 157 | 148 | 170 IMPORTS | 1 | 9 | 5 EQ | 14 | DQ<3> = RW & RESET & D<3>.PIN # RESET & !LAN_ACCESS & D<3>.PIN # RESET & FCS & D<3>.PIN # RESET & UDS & LDS & DS1 & DS0 & D<3>.PIN ;Imported pterms FB10_6 # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<3> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<3> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<3> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<3>; DQ<3>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; MACROCELL | 9 | 7 | DQ_5_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 6 INPUTS | 11 | RESET | LAN_ACCESS | D<5>.PIN | RW | LDS | FCS | DQ_DATA<2> | DS1 | DS0 | EXP54_.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST INPUTMC | 4 | 11 | 2 | 15 | 16 | 9 | 8 | 6 | 5 INPUTP | 7 | 263 | 37 | 158 | 157 | 147 | 148 | 170 EXPORTS | 1 | 9 | 6 IMPORTS | 1 | 9 | 8 EQ | 21 | DQ<5> = RESET & !LAN_ACCESS & D<5>.PIN ;Imported pterms FB10_9 # RW & RESET & D<5>.PIN # RESET & FCS & D<5>.PIN # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<5> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<5> # RESET & UDS & LDS & DS1 & DS0 & D<5>.PIN ;Imported pterms FB10_10 # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<5> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<5>; DQ<5>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; DQ_5_IOBUFE.EXP = !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<2> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<2> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<2> MACROCELL | 9 | 11 | DQ_6_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 10 INPUTS | 11 | RW | RESET | LAN_ACCESS | UDS | FCS | DQ_DATA<7> | LDS | DS1 | DS0 | EXP55_.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST INPUTMC | 4 | 11 | 2 | 12 | 6 | 9 | 12 | 6 | 5 INPUTP | 7 | 158 | 263 | 155 | 147 | 157 | 148 | 170 EXPORTS | 1 | 9 | 10 IMPORTS | 1 | 9 | 12 EQ | 23 | DQ<6> = ;Imported pterms FB10_13 RW & RESET & D<6>.PIN # RESET & !LAN_ACCESS & D<6>.PIN # RESET & FCS & D<6>.PIN # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<6> # RESET & UDS & LDS & DS1 & DS0 & D<6>.PIN ;Imported pterms FB10_14 # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<6> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<6> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<6>; DQ<6>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; DQ_6_IOBUFE.EXP = !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<7> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<7> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<7> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<7> MACROCELL | 9 | 10 | DQ_7_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 11 | RESET | LAN_ACCESS | D<7>.PIN | RW | FCS | UDS | LDS | DS1 | DS0 | DQ_6_IOBUFE.EXP | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST INPUTMC | 3 | 11 | 2 | 9 | 11 | 6 | 5 INPUTP | 8 | 263 | 29 | 158 | 147 | 155 | 157 | 148 | 170 IMPORTS | 1 | 9 | 11 EQ | 14 | DQ<7> = RW & RESET & D<7>.PIN # RESET & !LAN_ACCESS & D<7>.PIN # RESET & FCS & D<7>.PIN # RESET & UDS & LDS & DS1 & DS0 & D<7>.PIN ;Imported pterms FB10_12 # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<7> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<7> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<7> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<7>; DQ<7>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; MACROCELL | 14 | 6 | LAN_SM_FSM_FFd3 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 88 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 10 | 0 | 12 | 2 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 | 10 | 17 | 15 | 15 | 5 | 15 | 7 | 0 | 12 | 15 | 7 | 11 | 12 | 17 | 12 | 11 | 15 | 14 | 5 | 12 | 7 | 13 | 12 | 9 | 7 | 8 | 12 | 6 | 10 | 15 | 14 | 9 | 12 | 4 | 14 | 5 | 14 | 7 | 7 | 10 | 12 | 16 | 14 | 12 | 5 | 10 | 5 | 11 | 5 | 13 | 5 | 14 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 12 | 7 | 14 | 7 | 15 | 7 | 16 | 7 | 17 | 10 | 13 | 10 | 14 | 10 | 16 | 12 | 0 | 12 | 1 | 12 | 5 | 12 | 8 | 12 | 10 | 12 | 12 | 12 | 13 | 12 | 14 | 14 | 3 | 14 | 8 | 14 | 10 | 14 | 11 | 15 | 0 | 15 | 16 | 15 | 17 INPUTS | 7 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | Z3_ADR<13> | LAN_SM_FSM_FFd2 | LAN_SM_RST | LAN_RD_S.EXP INPUTMC | 7 | 14 | 6 | 7 | 6 | 14 | 4 | 8 | 6 | 14 | 15 | 6 | 12 | 14 | 5 IMPORTS | 1 | 14 | 5 EQ | 12 | !LAN_SM_FSM_FFd3.D = Z3_ADR<13> & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd1 # LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd1 ;Imported pterms FB15_6 # !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1; LAN_SM_FSM_FFd3.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd3.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 7 | 6 | LAN_SM_FSM_FFd4 ATTRIBUTES | 4358928 | 0 OUTPUTMC | 88 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 10 | 0 | 12 | 2 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 | 10 | 17 | 15 | 15 | 5 | 15 | 7 | 0 | 12 | 15 | 7 | 11 | 12 | 17 | 12 | 11 | 15 | 16 | 5 | 12 | 7 | 13 | 12 | 10 | 7 | 8 | 12 | 6 | 10 | 15 | 14 | 9 | 12 | 4 | 14 | 5 | 14 | 7 | 7 | 10 | 12 | 16 | 14 | 12 | 5 | 10 | 5 | 11 | 5 | 13 | 5 | 14 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 12 | 7 | 14 | 7 | 15 | 7 | 16 | 7 | 17 | 10 | 13 | 10 | 14 | 10 | 16 | 12 | 0 | 12 | 1 | 12 | 5 | 12 | 8 | 12 | 9 | 12 | 12 | 12 | 13 | 12 | 14 | 14 | 3 | 14 | 8 | 14 | 10 | 14 | 11 | 15 | 0 | 15 | 14 | 15 | 17 INPUTS | 12 | Z3_ADR<13> | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | RW | UDS | LDS | LAN_CS_RST | RESET | LAN_ACCESS | LAN_SM_RST | EXP45_.EXP INPUTMC | 8 | 8 | 6 | 14 | 6 | 7 | 6 | 14 | 15 | 13 | 5 | 11 | 2 | 6 | 12 | 7 | 5 INPUTP | 4 | 158 | 155 | 157 | 263 EXPORTS | 1 | 7 | 7 IMPORTS | 1 | 7 | 5 EQ | 19 | LAN_SM_FSM_FFd4.T = Z3_ADR<13> & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !RW & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB8_6 # LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # !DS1 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # !DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # RW & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # RW & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; LAN_SM_FSM_FFd4.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd4.AR = LAN_SM_RST; LAN_SM_FSM_FFd4.EXP = Z3_ADR<13> & LAN_CS_RST # RESET & LAN_ACCESS & !Z3_ADR<13> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 15 | LAN_SM_FSM_FFd2 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 75 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 10 | 0 | 12 | 2 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 | 10 | 17 | 15 | 15 | 5 | 15 | 7 | 0 | 12 | 15 | 7 | 11 | 12 | 17 | 12 | 11 | 15 | 16 | 5 | 12 | 7 | 13 | 12 | 10 | 7 | 8 | 12 | 6 | 10 | 15 | 14 | 9 | 12 | 4 | 14 | 5 | 14 | 8 | 7 | 10 | 12 | 16 | 14 | 12 | 5 | 10 | 5 | 11 | 5 | 13 | 5 | 14 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 12 | 7 | 14 | 7 | 15 | 7 | 16 | 7 | 17 | 10 | 13 | 10 | 14 | 10 | 16 | 12 | 0 | 12 | 1 | 12 | 5 | 12 | 8 | 12 | 9 | 12 | 12 | 12 | 13 | 12 | 14 | 14 | 3 | 14 | 7 | 14 | 10 | 14 | 11 | 14 | 13 | 14 | 16 | 15 | 0 | 15 | 14 | 15 | 17 | 14 | 14 INPUTS | 8 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_SWAP | DQ<6>.PIN | LAN_SM_RST | Z3_DATA<13>.EXP INPUTMC | 7 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 | 11 | 15 | 6 | 12 | 14 | 16 INPUTP | 1 | 227 EXPORTS | 1 | 14 | 14 IMPORTS | 1 | 14 | 16 EQ | 10 | LAN_SM_FSM_FFd2.D = LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 # LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 ;Imported pterms FB15_17 # LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 # !RW & !Z3_ADR<13> & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; LAN_SM_FSM_FFd2.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd2.AR = LAN_SM_RST; LAN_SM_FSM_FFd2.EXP = DQ_SWAP & DQ<6>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 4 | LAN_SM_FSM_FFd1 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 74 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 10 | 0 | 12 | 2 | 14 | 6 | 7 | 5 | 14 | 15 | 14 | 4 | 10 | 17 | 15 | 15 | 5 | 15 | 7 | 0 | 12 | 15 | 7 | 11 | 12 | 17 | 12 | 11 | 15 | 16 | 5 | 12 | 7 | 13 | 12 | 10 | 7 | 8 | 12 | 6 | 10 | 15 | 14 | 9 | 12 | 4 | 14 | 5 | 14 | 8 | 7 | 10 | 12 | 16 | 14 | 12 | 5 | 11 | 5 | 14 | 7 | 7 | 7 | 14 | 7 | 17 | 10 | 14 | 10 | 16 | 12 | 0 | 12 | 5 | 12 | 9 | 12 | 14 | 14 | 3 | 14 | 7 | 14 | 11 | 15 | 14 | 15 | 17 INPUTS | 9 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DS1 | RW | LAN_SM_RST | Z3_ADR<13> | AUTO_CONFIG_Z2_DONE_CYCLE<1>.EXP INPUTMC | 7 | 14 | 6 | 14 | 4 | 7 | 6 | 14 | 15 | 6 | 12 | 8 | 6 | 14 | 3 INPUTP | 2 | 148 | 158 EXPORTS | 1 | 14 | 5 IMPORTS | 1 | 14 | 3 EQ | 12 | !LAN_SM_FSM_FFd1.D = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # !DS1 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1 ;Imported pterms FB15_4 # !DS0 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1; LAN_SM_FSM_FFd1.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd1.AR = LAN_SM_RST; LAN_SM_FSM_FFd1.EXP = RW & !Z3_ADR<13> & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 4 | 8 | AS_D0 ATTRIBUTES | 8553344 | 0 OUTPUTMC | 39 | 8 | 0 | 0 | 8 | 13 | 17 | 8 | 3 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 14 | 2 | 0 | 3 | 3 | 0 | 14 | 0 | 1 | 0 | 6 | 14 | 8 | 1 | 1 | 9 | 4 | 9 INPUTS | 9 | FCS | RESET | DQ<2>.PIN | AS | RW | LAN_ACCESS | AUTOCONFIG_Z2_ACCESS | Z3_DATA<18> | AS_D1.EXP INPUTMC | 4 | 11 | 2 | 4 | 12 | 15 | 11 | 4 | 7 INPUTP | 5 | 147 | 263 | 220 | 152 | 158 EXPORTS | 1 | 4 | 9 IMPORTS | 1 | 4 | 7 EQ | 8 | AS_D0.D = ;Imported pterms FB5_8 AS; AS_D0.CLK = CLK_EXT; // GCK AS_D0.AP = !RESET; AS_D0.EXP = FCS & DQ<2>.PIN # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<18> & !FCS GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 4 | 12 | AUTOCONFIG_Z2_ACCESS ATTRIBUTES | 8553232 | 0 OUTPUTMC | 61 | 8 | 3 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 3 | 1 | 4 | 13 | 4 | 12 | 4 | 15 | 6 | 1 | 6 | 3 | 6 | 11 | 1 | 13 | 4 | 8 | 1 | 9 | 0 | 5 | 0 | 4 | 1 | 8 | 1 | 12 | 1 | 15 | 4 | 11 | 14 | 2 | 0 | 3 | 3 | 0 | 14 | 17 | 1 | 0 | 6 | 14 | 8 | 1 | 13 | 13 | 4 | 10 | 1 | 14 | 4 | 0 | 4 | 14 | 4 | 16 | 4 | 17 | 6 | 0 | 6 | 2 | 6 | 10 | 6 | 12 INPUTS | 20 | AS | LAN_ACCESS | AUTO_CONFIG_Z2_DONE<0> | A<23>.PIN | A<22>.PIN | A<21>.PIN | A<19>.PIN | CFIN | A<16>.PIN | A<20>.PIN | A<18>.PIN | A<17>.PIN | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | RESET | RW | AUTOCONFIG_Z2_ACCESS | FCS | DQ<1>.PIN | CP_CS INPUTMC | 6 | 11 | 2 | 8 | 0 | 0 | 8 | 13 | 17 | 4 | 12 | 4 | 1 INPUTP | 14 | 152 | 161 | 162 | 163 | 169 | 190 | 175 | 167 | 171 | 172 | 263 | 158 | 147 | 216 EXPORTS | 1 | 4 | 11 EQ | 13 | AUTOCONFIG_Z2_ACCESS.D = !AS & !LAN_ACCESS & !AUTO_CONFIG_Z2_DONE<0> & A<23>.PIN & A<22>.PIN & A<21>.PIN & A<19>.PIN & !CFIN & !A<16>.PIN & !A<20>.PIN & !A<18>.PIN & !A<17>.PIN # !AS & !LAN_ACCESS & !AUTO_CONFIG_Z2_DONE<1> & A<23>.PIN & A<22>.PIN & A<21>.PIN & A<19>.PIN & !CFIN & !A<16>.PIN & !A<20>.PIN & !A<18>.PIN & !A<17>.PIN # !AS & !LAN_ACCESS & !AUTO_CONFIG_Z2_DONE<2> & A<23>.PIN & A<22>.PIN & A<21>.PIN & A<19>.PIN & !CFIN & !A<16>.PIN & !A<20>.PIN & !A<18>.PIN & !A<17>.PIN; AUTOCONFIG_Z2_ACCESS.CLK = CLK_EXT; // GCK AUTOCONFIG_Z2_ACCESS.AR = !RESET; AUTOCONFIG_Z2_ACCESS.EXP = !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<1>.PIN & !CP_CS GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 3 | LAN_RST_SM_FSM_FFd1 ATTRIBUTES | 4358928 | 0 OUTPUTMC | 6 | 13 | 3 | 13 | 11 | 13 | 9 | 2 | 14 | 2 | 12 | 2 | 15 INPUTS | 4 | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | RESET INPUTMC | 3 | 13 | 3 | 13 | 11 | 13 | 9 INPUTP | 1 | 263 EQ | 4 | LAN_RST_SM_FSM_FFd1.T = !LAN_RST_SM_FSM_FFd1 & LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3; LAN_RST_SM_FSM_FFd1.CLK = CLK_EXT; // GCK LAN_RST_SM_FSM_FFd1.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 17 | IDE_ACCESS ATTRIBUTES | 8553232 | 0 OUTPUTMC | 7 | 4 | 6 | 13 | 6 | 4 | 5 | 13 | 0 | 13 | 13 | 6 | 5 | 4 | 9 INPUTS | 8 | LAN_ACCESS | SHUT_UP_Z2<2> | AS | IDE_BASEADR<0> | A<16>.PIN | EXP32_.EXP | EXP36_.EXP | RESET INPUTMC | 5 | 11 | 2 | 3 | 0 | 1 | 10 | 5 | 0 | 5 | 16 INPUTP | 3 | 152 | 175 | 263 IMPORTS | 2 | 5 | 0 | 5 | 16 EQ | 25 | !IDE_ACCESS.D = AS # LAN_ACCESS # SHUT_UP_Z2<2> # !IDE_BASEADR<0> & A<16>.PIN ;Imported pterms FB6_1 # !IDE_BASEADR<2> & A<18>.PIN # IDE_BASEADR<5> & !A<21>.PIN # !IDE_BASEADR<5> & A<21>.PIN # IDE_BASEADR<6> & !A<22>.PIN # !IDE_BASEADR<6> & A<22>.PIN ;Imported pterms FB6_2 # IDE_BASEADR<4> & !A<20>.PIN # !IDE_BASEADR<4> & A<20>.PIN # IDE_BASEADR<7> & !A<23>.PIN # !IDE_BASEADR<7> & A<23>.PIN ;Imported pterms FB6_17 # IDE_BASEADR<0> & !A<16>.PIN # IDE_BASEADR<1> & !A<17>.PIN # !IDE_BASEADR<1> & A<17>.PIN # IDE_BASEADR<3> & !A<19>.PIN # !IDE_BASEADR<3> & A<19>.PIN ;Imported pterms FB6_16 # IDE_BASEADR<2> & !A<18>.PIN; IDE_ACCESS.CLK = CLK_EXT; // GCK IDE_ACCESS.AR = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 11 | LAN_RST_SM_FSM_FFd2 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 5 | 13 | 3 | 13 | 11 | 13 | 9 | 13 | 1 | 13 | 5 INPUTS | 4 | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd3 | LAN_RST_SM_FSM_FFd2 | RESET INPUTMC | 3 | 13 | 3 | 13 | 9 | 13 | 11 INPUTP | 1 | 263 EQ | 4 | LAN_RST_SM_FSM_FFd2.D = !LAN_RST_SM_FSM_FFd1 & LAN_RST_SM_FSM_FFd3 # LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3; LAN_RST_SM_FSM_FFd2.CLK = CLK_EXT; // GCK LAN_RST_SM_FSM_FFd2.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 9 | LAN_RST_SM_FSM_FFd3 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 4 | 13 | 3 | 13 | 11 | 13 | 1 | 13 | 5 INPUTS | 3 | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd2 | RESET INPUTMC | 2 | 13 | 3 | 13 | 11 INPUTP | 1 | 263 EQ | 4 | !LAN_RST_SM_FSM_FFd3.D = LAN_RST_SM_FSM_FFd1 $ LAN_RST_SM_FSM_FFd2; LAN_RST_SM_FSM_FFd3.CLK = CLK_EXT; // GCK LAN_RST_SM_FSM_FFd3.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 2 | 14 | LAN_D_INIT<1> ATTRIBUTES | 8553232 | 0 OUTPUTMC | 3 | 9 | 1 | 9 | 0 | 11 | 11 INPUTS | 2 | LAN_RST_SM_FSM_FFd1 | RESET INPUTMC | 1 | 13 | 3 INPUTP | 1 | 263 EQ | 3 | LAN_D_INIT<1>.D = LAN_RST_SM_FSM_FFd1; LAN_D_INIT<1>.CLK = CLK_EXT; // GCK LAN_D_INIT<1>.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 2 | 12 | LAN_D_INIT<8> ATTRIBUTES | 8553232 | 0 OUTPUTMC | 3 | 9 | 16 | 11 | 9 | 6 | 17 INPUTS | 2 | LAN_RST_SM_FSM_FFd1 | RESET INPUTMC | 1 | 13 | 3 INPUTP | 1 | 263 EQ | 3 | LAN_D_INIT<8>.D = !LAN_RST_SM_FSM_FFd1; LAN_D_INIT<8>.CLK = CLK_EXT; // GCK LAN_D_INIT<8>.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 4 | 6 | IDE_ENABLE ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 13 | 6 | 13 | 0 INPUTS | 3 | RESET | RW | IDE_ACCESS INPUTMC | 1 | 5 | 17 INPUTP | 2 | 263 | 158 EQ | 4 | IDE_ENABLE.D = Gnd; IDE_ENABLE.CLK = CLK_EXT; // GCK IDE_ENABLE.AP = !RESET; IDE_ENABLE.CE = !RW & IDE_ACCESS; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 4 | 7 | AS_D1 ATTRIBUTES | 8553280 | 0 OUTPUTMC | 26 | 11 | 15 | 11 | 2 | 8 | 6 | 8 | 4 | 8 | 5 | 11 | 6 | 11 | 8 | 8 | 7 | 8 | 8 | 8 | 9 | 8 | 11 | 8 | 12 | 8 | 14 | 13 | 8 | 13 | 7 | 8 | 15 | 8 | 17 | 11 | 0 | 11 | 1 | 11 | 3 | 11 | 4 | 11 | 13 | 11 | 14 | 11 | 16 | 11 | 17 | 4 | 8 INPUTS | 3 | FCS | RESET | AS INPUTP | 3 | 147 | 263 | 152 EXPORTS | 1 | 4 | 8 EQ | 4 | AS_D1.D = FCS; AS_D1.CLK = CLK_EXT; // GCK AS_D1.CE = RESET; AS_D1.EXP = AS GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 17 | DQ_DATA<0> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 10 | 17 | 9 | 3 INPUTS | 8 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<0> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | Z3_DATA<30>.EXP | CP_WE_OBUF.EXP | LAN_SM_RST INPUTMC | 8 | 7 | 6 | 14 | 15 | 10 | 17 | 14 | 4 | 14 | 6 | 10 | 0 | 10 | 16 | 6 | 12 IMPORTS | 2 | 10 | 0 | 10 | 16 EQ | 24 | DQ_DATA<0>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<0> # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<0> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<0> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<0> ;Imported pterms FB11_1 # DQ_SWAP & D<8>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & UDS & LDS & A<16>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<8>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB11_17 # DQ_SWAP & A<16>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<8>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<8>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<0>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<0>.PIN; DQ_DATA<0>.CLK = CLK_EXT; // GCK DQ_DATA<0>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 15 | DQ_DATA<10> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 9 | 15 | 15 | 15 | 9 | 14 INPUTS | 8 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<10> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | EXP81_.EXP | DQ_DATA<2>.EXP | LAN_SM_RST INPUTMC | 8 | 7 | 6 | 14 | 15 | 15 | 15 | 14 | 4 | 14 | 6 | 15 | 14 | 15 | 16 | 6 | 12 IMPORTS | 2 | 15 | 14 | 15 | 16 EQ | 25 | DQ_DATA<10>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<10> # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<10> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<10> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<10> ;Imported pterms FB16_15 # DQ_SWAP & A<10>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<18>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<2>.PIN # !DQ_SWAP & D<10>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<10>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB16_14 # !DQ_SWAP & UDS & LDS & A<18>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB16_17 # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<2>.PIN # DQ_SWAP & A<10>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<10>.CLK = CLK_EXT; // GCK DQ_DATA<10>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 15 | DQ_DATA<11> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 4 | 5 | 14 | 5 | 15 | 11 | 10 | 5 | 16 INPUTS | 9 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<11> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | IDE_BASEADR<2> | A<18>.PIN | EXP35_.EXP | LAN_SM_RST INPUTMC | 8 | 7 | 6 | 14 | 15 | 5 | 15 | 14 | 4 | 14 | 6 | 1 | 6 | 5 | 14 | 6 | 12 INPUTP | 1 | 171 EXPORTS | 1 | 5 | 16 IMPORTS | 1 | 5 | 14 EQ | 25 | DQ_DATA<11>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<11> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<11> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<11> ;Imported pterms FB6_15 # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<11> # DQ_SWAP & A<11>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<19>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & D<11>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<11>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB6_14 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<3>.PIN # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<3>.PIN # DQ_SWAP & A<11>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<19>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<11>.CLK = CLK_EXT; // GCK DQ_DATA<11>.AP = LAN_SM_RST; DQ_DATA<11>.EXP = IDE_BASEADR<2> & !A<18>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 7 | 0 | DQ_DATA<12> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 4 | 7 | 0 | 7 | 2 | 7 | 17 | 7 | 1 INPUTS | 12 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<12> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | RW | RESET | LAN_ACCESS | UDS | FCS | EXP50_.EXP | LAN_SM_RST INPUTMC | 8 | 7 | 6 | 14 | 15 | 7 | 0 | 14 | 4 | 14 | 6 | 11 | 2 | 7 | 17 | 6 | 12 INPUTP | 4 | 158 | 263 | 155 | 147 EXPORTS | 1 | 7 | 1 IMPORTS | 1 | 7 | 17 EQ | 26 | DQ_DATA<12>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<12> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<12> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<12> ;Imported pterms FB8_18 # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<12> # DQ_SWAP & A<12>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<20>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & D<12>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<12>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB8_17 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<4>.PIN # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<4>.PIN # DQ_SWAP & A<12>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<20>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<12>.CLK = CLK_EXT; // GCK DQ_DATA<12>.AP = LAN_SM_RST; DQ_DATA<12>.EXP = !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<12> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 15 | DQ_DATA<13> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 11 | 6 | 12 | 15 | 11 | 8 INPUTS | 8 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<13> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | EXP75_.EXP | LAN_WRL_S.EXP | LAN_SM_RST INPUTMC | 8 | 7 | 6 | 14 | 15 | 12 | 15 | 14 | 4 | 14 | 6 | 12 | 14 | 12 | 16 | 6 | 12 IMPORTS | 2 | 12 | 14 | 12 | 16 EQ | 24 | DQ_DATA<13>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<13> # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<13> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<13> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<13> ;Imported pterms FB13_15 # DQ_SWAP & A<13>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<21>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<5>.PIN # !DQ_SWAP & D<13>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<13>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB13_17 # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<5>.PIN # DQ_SWAP & A<13>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<21>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<13>.CLK = CLK_EXT; // GCK DQ_DATA<13>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 7 | 11 | DQ_DATA<14> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 7 | 11 | 7 | 3 | 7 | 4 INPUTS | 8 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<14> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | LAN_WRH_S.EXP | EXP46_.EXP | LAN_SM_RST INPUTMC | 8 | 7 | 6 | 14 | 15 | 7 | 11 | 14 | 4 | 14 | 6 | 7 | 10 | 7 | 12 | 6 | 12 IMPORTS | 2 | 7 | 10 | 7 | 12 EQ | 25 | DQ_DATA<14>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<14> # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<14> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<14> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<14> ;Imported pterms FB8_11 # DQ_SWAP & A<14>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<22>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 ;Imported pterms FB8_13 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<6>.PIN # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<6>.PIN # !DQ_SWAP & D<14>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<14>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & A<14>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB8_14 # !DQ_SWAP & UDS & LDS & A<22>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<14>.CLK = CLK_EXT; // GCK DQ_DATA<14>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 17 | DQ_DATA<15> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 4 | 12 | 17 | 11 | 5 | 12 | 0 | 12 | 16 INPUTS | 8 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<15> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | UDS | EXP70_.EXP | LAN_SM_RST INPUTMC | 7 | 7 | 6 | 14 | 15 | 12 | 17 | 14 | 4 | 14 | 6 | 12 | 0 | 6 | 12 INPUTP | 1 | 155 EXPORTS | 1 | 12 | 16 IMPORTS | 1 | 12 | 0 EQ | 26 | DQ_DATA<15>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<15> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<15> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<15> ;Imported pterms FB13_1 # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<15> # DQ_SWAP & A<15>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<23>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & D<15>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<15>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB13_2 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<7>.PIN # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<7>.PIN # DQ_SWAP & A<15>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<23>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<15>.CLK = CLK_EXT; // GCK DQ_DATA<15>.AP = LAN_SM_RST; DQ_DATA<15>.EXP = !UDS & LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 11 | DQ_DATA<1> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 9 | 0 | 12 | 11 | 9 | 2 INPUTS | 8 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<1> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | DQ_DATA<5>.EXP | EXP74_.EXP | LAN_SM_RST INPUTMC | 8 | 7 | 6 | 14 | 15 | 12 | 11 | 14 | 4 | 14 | 6 | 12 | 10 | 12 | 12 | 6 | 12 IMPORTS | 2 | 12 | 10 | 12 | 12 EQ | 25 | DQ_DATA<1>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<1> # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<1> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<1> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<1> ;Imported pterms FB13_11 # DQ_SWAP & A<17>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<9>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 ;Imported pterms FB13_13 # DQ_SWAP & D<9>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & D<9>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<1>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<1>.PIN # DQ_SWAP & UDS & LDS & A<17>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB13_14 # !DQ_SWAP & A<9>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<1>.CLK = CLK_EXT; // GCK DQ_DATA<1>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 16 | DQ_DATA<2> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 5 | 15 | 16 | 9 | 6 | 9 | 7 | 15 | 17 | 15 | 15 INPUTS | 12 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<2> | LAN_SM_FSM_FFd1 | DQ_SWAP | LDS | LAN_SM_FSM_FFd3 | D<2>.PIN | A<10>.PIN | UDS | EXP82_.EXP | LAN_SM_RST INPUTMC | 8 | 7 | 6 | 14 | 15 | 15 | 16 | 14 | 4 | 11 | 15 | 14 | 6 | 15 | 17 | 6 | 12 INPUTP | 4 | 157 | 71 | 112 | 155 EXPORTS | 1 | 15 | 15 IMPORTS | 1 | 15 | 17 EQ | 28 | DQ_DATA<2>.D = LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<2> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<2> ;Imported pterms FB16_18 # LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<2> # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<2> # DQ_SWAP & A<18>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<10>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<10>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB16_1 # DQ_SWAP & D<10>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<2>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<2>.PIN # DQ_SWAP & UDS & LDS & A<18>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<10>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<2>.CLK = CLK_EXT; // GCK DQ_DATA<2>.AP = LAN_SM_RST; DQ_DATA<2>.EXP = DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<2>.PIN # DQ_SWAP & A<10>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 12 | DQ_DATA<3> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 4 | 5 | 11 | 5 | 12 | 9 | 5 | 5 | 13 INPUTS | 10 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<3> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | RESET | LAN_ACCESS | Z3_ADR<8> | EXP34_.EXP | LAN_SM_RST INPUTMC | 9 | 7 | 6 | 14 | 15 | 5 | 12 | 14 | 4 | 14 | 6 | 11 | 2 | 13 | 8 | 5 | 11 | 6 | 12 INPUTP | 1 | 263 EXPORTS | 1 | 5 | 13 IMPORTS | 1 | 5 | 11 EQ | 25 | DQ_DATA<3>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<3> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<3> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<3> ;Imported pterms FB6_12 # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<3> # DQ_SWAP & A<19>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<11>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<11>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & D<11>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB6_11 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<3>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<3>.PIN # DQ_SWAP & UDS & LDS & A<19>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<11>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<3>.CLK = CLK_EXT; // GCK DQ_DATA<3>.AP = LAN_SM_RST; DQ_DATA<3>.EXP = RESET & LAN_ACCESS & !Z3_ADR<8> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 7 | 13 | DQ_DATA<4> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 5 | 7 | 14 | 7 | 13 | 9 | 16 | 9 | 17 | 7 | 12 INPUTS | 11 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<4> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | DQ_SWAP | UDS | LDS | A<22>.PIN | EXP47_.EXP | LAN_SM_RST INPUTMC | 8 | 7 | 6 | 14 | 15 | 7 | 13 | 14 | 4 | 14 | 6 | 11 | 15 | 7 | 14 | 6 | 12 INPUTP | 3 | 155 | 157 | 162 EXPORTS | 1 | 7 | 12 IMPORTS | 1 | 7 | 14 EQ | 26 | DQ_DATA<4>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<4> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<4> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<4> ;Imported pterms FB8_15 # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<4> # DQ_SWAP & A<20>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<12>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<12>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & D<12>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB8_16 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<4>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<4>.PIN # DQ_SWAP & UDS & LDS & A<20>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<12>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<4>.CLK = CLK_EXT; // GCK DQ_DATA<4>.AP = LAN_SM_RST; DQ_DATA<4>.EXP = !DQ_SWAP & UDS & LDS & A<22>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 10 | DQ_DATA<5> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 5 | 12 | 10 | 9 | 8 | 9 | 9 | 12 | 9 | 12 | 11 INPUTS | 10 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<5> | LAN_SM_FSM_FFd1 | DQ_SWAP | A<17>.PIN | LAN_SM_FSM_FFd3 | A<9>.PIN | EXP73_.EXP | LAN_SM_RST INPUTMC | 8 | 7 | 6 | 14 | 15 | 12 | 10 | 14 | 4 | 11 | 15 | 14 | 6 | 12 | 9 | 6 | 12 INPUTP | 2 | 172 | 108 EXPORTS | 1 | 12 | 11 IMPORTS | 1 | 12 | 9 EQ | 28 | DQ_DATA<5>.D = LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<5> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<5> ;Imported pterms FB13_10 # LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<5> # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<5> # DQ_SWAP & A<21>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<13>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<13>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB13_9 # DQ_SWAP & D<13>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<5>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<5>.PIN # DQ_SWAP & UDS & LDS & A<21>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<13>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<5>.CLK = CLK_EXT; // GCK DQ_DATA<5>.AP = LAN_SM_RST; DQ_DATA<5>.EXP = DQ_SWAP & A<17>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<9>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 7 | 8 | DQ_DATA<6> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 7 | 8 | 9 | 12 | 9 | 13 INPUTS | 8 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<6> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | LAN_CS_OBUF.EXP | LAN_RD_OBUF.EXP | LAN_SM_RST INPUTMC | 8 | 7 | 6 | 14 | 15 | 7 | 8 | 14 | 4 | 14 | 6 | 7 | 7 | 7 | 9 | 6 | 12 IMPORTS | 2 | 7 | 7 | 7 | 9 EQ | 24 | DQ_DATA<6>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<6> # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<6> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<6> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<6> ;Imported pterms FB8_8 # DQ_SWAP & A<22>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<14>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<14>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & D<14>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB8_10 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<6>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<6>.PIN # DQ_SWAP & UDS & LDS & A<22>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<14>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<6>.CLK = CLK_EXT; // GCK DQ_DATA<6>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 6 | DQ_DATA<7> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 12 | 6 | 9 | 11 INPUTS | 7 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<7> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | EXP71_.EXP | LAN_SM_RST INPUTMC | 7 | 7 | 6 | 14 | 15 | 12 | 6 | 14 | 4 | 14 | 6 | 12 | 5 | 6 | 12 IMPORTS | 1 | 12 | 5 EQ | 24 | DQ_DATA<7>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<7> # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<7> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<7> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<7> ;Imported pterms FB13_6 # DQ_SWAP & A<23>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<15>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<15>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & D<15>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<7>.PIN ;Imported pterms FB13_5 # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<7>.PIN # DQ_SWAP & UDS & LDS & A<23>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<15>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<7>.CLK = CLK_EXT; // GCK DQ_DATA<7>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 15 | DQ_DATA<8> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 4 | 6 | 16 | 10 | 15 | 10 | 14 | 10 | 16 INPUTS | 10 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<8> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | AS | CP_WE_S | CP_WE_QUIRK | EXP59_.EXP | LAN_SM_RST INPUTMC | 9 | 7 | 6 | 14 | 15 | 10 | 15 | 14 | 4 | 14 | 6 | 13 | 15 | 2 | 17 | 10 | 14 | 6 | 12 INPUTP | 1 | 152 EXPORTS | 1 | 10 | 16 IMPORTS | 1 | 10 | 14 EQ | 25 | DQ_DATA<8>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<8> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<8> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<8> ;Imported pterms FB11_15 # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<8> # DQ_SWAP & A<8>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<16>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<0>.PIN # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<0>.PIN ;Imported pterms FB11_14 # !DQ_SWAP & D<8>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<8>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & A<8>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<16>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<8>.CLK = CLK_EXT; // GCK DQ_DATA<8>.AP = LAN_SM_RST; DQ_DATA<8>.EXP = !AS & !CP_WE_S & CP_WE_QUIRK GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 9 | DQ_DATA<9> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 14 | 9 | 11 | 12 INPUTS | 8 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_DATA<9> | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | LAN_READY.EXP | EXP79_.EXP | LAN_SM_RST INPUTMC | 8 | 7 | 6 | 14 | 15 | 14 | 9 | 14 | 4 | 14 | 6 | 14 | 8 | 14 | 10 | 6 | 12 IMPORTS | 2 | 14 | 8 | 14 | 10 EQ | 24 | DQ_DATA<9>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<9> # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<9> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<9> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<9> ;Imported pterms FB15_9 # DQ_SWAP & A<9>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<17>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<1>.PIN ;Imported pterms FB15_11 # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<1>.PIN # !DQ_SWAP & D<9>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<9>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & A<9>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<17>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; DQ_DATA<9>.CLK = CLK_EXT; // GCK DQ_DATA<9>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 1 | LAN_WR_RST ATTRIBUTES | 8553232 | 0 OUTPUTMC | 2 | 7 | 4 | 12 | 13 INPUTS | 3 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | RESET INPUTMC | 2 | 13 | 11 | 13 | 9 INPUTP | 1 | 263 EQ | 3 | LAN_WR_RST.D = LAN_RST_SM_FSM_FFd2 & LAN_RST_SM_FSM_FFd3; LAN_WR_RST.CLK = CLK_EXT; // GCK LAN_WR_RST.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 2 | SHUT_UP_Z2<0> ATTRIBUTES | 4359044 | 0 OUTPUTMC | 4 | 11 | 15 | 11 | 2 | 14 | 2 | 14 | 1 INPUTS | 15 | RW | AUTO_CONFIG_Z2_DONE<0> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | SHUT_UP_Z2<0> | LDS | RESET | AUTO_CONFIG_Z2_DONE<1> INPUTMC | 5 | 8 | 0 | 4 | 8 | 4 | 12 | 14 | 2 | 0 | 8 INPUTP | 10 | 158 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 EXPORTS | 1 | 14 | 1 EQ | 10 | SHUT_UP_Z2<0>.T = !RW & !AUTO_CONFIG_Z2_DONE<0> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<0> # !RW & !AUTO_CONFIG_Z2_DONE<0> & !A<4> & !A<5> & A<6> & A<2> & !A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<0>; SHUT_UP_Z2<0>.CLK = CLK_EXT; // GCK SHUT_UP_Z2<0>.AP = !RESET; SHUT_UP_Z2<0>.EXP = AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<5> & !A<3> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 3 | SHUT_UP_Z2<1> ATTRIBUTES | 4359044 | 0 OUTPUTMC | 3 | 0 | 3 | 4 | 1 | 0 | 4 INPUTS | 19 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | SHUT_UP_Z2<1> | LDS | RESET | AS | FCS | LAN_ACCESS | Z3_DATA<21> INPUTMC | 7 | 8 | 0 | 0 | 8 | 4 | 8 | 4 | 12 | 0 | 3 | 11 | 2 | 10 | 7 INPUTP | 12 | 158 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 | 152 | 147 EXPORTS | 1 | 0 | 4 EQ | 10 | SHUT_UP_Z2<1>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<1> # !RW & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<1>; SHUT_UP_Z2<1>.CLK = CLK_EXT; // GCK SHUT_UP_Z2<1>.AP = !RESET; SHUT_UP_Z2<1>.EXP = !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<21> & !FCS GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 0 | SHUT_UP_Z2<2> ATTRIBUTES | 4359044 | 0 OUTPUTMC | 3 | 5 | 17 | 3 | 0 | 3 | 1 INPUTS | 20 | RW | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | A<4> | A<5> | A<6> | A<2> | A<3> | UDS | A<1> | AS_D0 | AUTOCONFIG_Z2_ACCESS | SHUT_UP_Z2<2> | LDS | RESET | AS | FCS | LAN_ACCESS | Z3_DATA<16> INPUTMC | 8 | 8 | 0 | 0 | 8 | 13 | 17 | 4 | 8 | 4 | 12 | 3 | 0 | 11 | 2 | 15 | 13 INPUTP | 12 | 158 | 97 | 91 | 98 | 101 | 99 | 155 | 107 | 157 | 263 | 152 | 147 EXPORTS | 1 | 3 | 1 EQ | 12 | SHUT_UP_Z2<2>.T = !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !UDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<2> # !RW & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !A<4> & !A<5> & A<6> & !A<2> & A<3> & !LDS & !A<1> & !AS_D0 & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<2>; SHUT_UP_Z2<2>.CLK = CLK_EXT; // GCK SHUT_UP_Z2<2>.AP = !RESET; SHUT_UP_Z2<2>.EXP = !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<16> & !FCS GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 17 | D_Z2_OUT<0> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 2 | 4 | 0 | 14 | 16 INPUTS | 7 | AUTOCONFIG_Z2_ACCESS | A<6> | DQ_SWAP | DQ<5>.PIN | DQ<13>.PIN | EXP76_.EXP | RESET INPUTMC | 3 | 4 | 12 | 11 | 15 | 14 | 0 INPUTP | 4 | 98 | 221 | 204 | 263 EXPORTS | 1 | 14 | 16 IMPORTS | 1 | 14 | 0 EQ | 21 | D_Z2_OUT<0>.D = A<6> # !AUTOCONFIG_Z2_ACCESS ;Imported pterms FB15_1 # AS_D0 # A<4> & A<5> # A<5> & !A<2> # UDS & LDS # !A<4> & !A<2> & A<1> ;Imported pterms FB15_2 # A<4> & !A<2> & !A<3> # A<4> & !A<3> & A<1> # A<2> & A<3> & !A<1> # AUTO_CONFIG_Z2_DONE<0> & !A<4> & !A<5> & A<1> # !A<4> & !A<5> & A<2> & A<3> ;Imported pterms FB15_3 # AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<5> & !A<3>; D_Z2_OUT<0>.CLK = CLK_EXT; // GCK D_Z2_OUT<0>.AP = !RESET; D_Z2_OUT<0>.EXP = DQ_SWAP & DQ<5>.PIN # !DQ_SWAP & DQ<13>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 1 | 0 | D_Z2_OUT<1> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 1 | 6 | 0 INPUTS | 8 | A<6> | AS_D0 | AUTOCONFIG_Z2_ACCESS | A<5> | A<1> | A_LAN_4_OBUF.EXP | EXP27_.EXP | RESET INPUTMC | 4 | 4 | 8 | 4 | 12 | 1 | 1 | 1 | 17 INPUTP | 4 | 98 | 91 | 107 | 263 IMPORTS | 2 | 1 | 1 | 1 | 17 EQ | 25 | D_Z2_OUT<1>.D = A<6> # AS_D0 # !AUTOCONFIG_Z2_ACCESS # A<5> & A<1> ;Imported pterms FB2_2 # !AUTO_CONFIG_Z2_DONE<0> & A<4> & !A<3> & !A<1> # !AUTO_CONFIG_Z2_DONE<1> & A<4> & !A<3> & !A<1> # A<4> & A<2> & !A<3> & A<1> # A<4> & !A<2> & A<3> & A<1> # A<4> & !A<2> & !A<3> & !A<1> ;Imported pterms FB2_18 # A<4> & A<5> # A<5> & !A<2> # UDS & LDS # !A<4> & A<2> & A<3> # !A<4> & A<3> & !A<1> ;Imported pterms FB2_17 # AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & A<4> & !A<2> & A<1> # AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !A<4> & A<2> & A<1> # AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<4> & !A<5> & A<2> & !A<1>; D_Z2_OUT<1>.CLK = CLK_EXT; // GCK D_Z2_OUT<1>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 6 | 14 | D_Z2_OUT<2> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 2 | 6 | 3 | 6 | 2 INPUTS | 8 | AUTOCONFIG_Z2_ACCESS | A<6> | AS_D0 | A<4> | A<2> | EXP41_.EXP | EXP42_.EXP | RESET INPUTMC | 4 | 4 | 12 | 4 | 8 | 6 | 13 | 6 | 15 INPUTP | 4 | 98 | 97 | 101 | 263 IMPORTS | 2 | 6 | 13 | 6 | 15 EQ | 20 | D_Z2_OUT<2>.D = A<6> # AS_D0 # !AUTOCONFIG_Z2_ACCESS # A<4> & !A<2> ;Imported pterms FB7_14 # A<4> & A<5> # !A<4> & A<3> # A<5> & !A<2> # A<5> & !A<1> # A<3> & A<1> ;Imported pterms FB7_16 # UDS & LDS # AUTO_CONFIG_Z2_DONE<0> & !A<2> & !A<1> # A<4> & !A<3> & !A<1> # AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<4> & !A<1> # !AUTO_CONFIG_Z2_DONE<0> & !A<4> & !A<5> & A<2> & A<1>; D_Z2_OUT<2>.CLK = CLK_EXT; // GCK D_Z2_OUT<2>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 2 | D_Z2_OUT<3> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 1 | 6 | 10 INPUTS | 10 | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | A<4> | A<5> | A<2> | A<3> | A<1> | EXP51_.EXP | AUTO_CONFIG_Z2_DONE_CYCLE<0>.EXP | RESET INPUTMC | 4 | 8 | 0 | 0 | 8 | 8 | 1 | 8 | 3 INPUTP | 6 | 97 | 91 | 101 | 99 | 107 | 263 IMPORTS | 2 | 8 | 1 | 8 | 3 EQ | 18 | D_Z2_OUT<3>.D = A<5> & !A<2> # !A<5> & !A<3> & !A<1> # A<2> & A<3> & !A<1> # AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<4> & !A<5> & A<2> ;Imported pterms FB9_2 # A<6> # AS_D0 # !AUTOCONFIG_Z2_ACCESS # UDS & LDS # A<4> & !A<3> & !A<1> ;Imported pterms FB9_1 # !A<2> & A<3> & A<1> ;Imported pterms FB9_4 # !A<4> & A<3> # A<5> & A<1>; D_Z2_OUT<3>.CLK = CLK_EXT; // GCK D_Z2_OUT<3>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 6 | IDE_R_S ATTRIBUTES | 8553344 | 0 OUTPUTMC | 1 | 0 | 16 INPUTS | 4 | RW | IDE_ACCESS | IDE_ENABLE | RESET INPUTMC | 2 | 5 | 17 | 4 | 6 INPUTP | 2 | 158 | 263 EQ | 3 | !IDE_R_S.D = RW & IDE_ACCESS & !IDE_ENABLE; IDE_R_S.CLK = CLK_EXT; // GCK IDE_R_S.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 4 | 5 | IDE_W_S ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 2 | 1 | 4 | 4 INPUTS | 5 | RW | IDE_ACCESS | RESET | AS | ROM_OE_S INPUTMC | 2 | 5 | 17 | 13 | 0 INPUTP | 3 | 158 | 263 | 152 EXPORTS | 1 | 4 | 4 EQ | 4 | !IDE_W_S.D = !RW & IDE_ACCESS; IDE_W_S.CLK = CLK_EXT; // GCK IDE_W_S.AP = !RESET; IDE_W_S.EXP = !AS & !ROM_OE_S GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 2 | 15 | LAN_A_INIT<6> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 1 | 1 | 4 INPUTS | 2 | LAN_RST_SM_FSM_FFd1 | RESET INPUTMC | 1 | 13 | 3 INPUTP | 1 | 263 EQ | 3 | LAN_A_INIT<6>.D = !LAN_RST_SM_FSM_FFd1; LAN_A_INIT<6>.CLK = CLK_EXT; // GCK LAN_A_INIT<6>.AP = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 5 | LAN_CS_RST ATTRIBUTES | 8553232 | 0 OUTPUTMC | 2 | 7 | 7 | 7 | 6 INPUTS | 3 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | RESET INPUTMC | 2 | 13 | 11 | 13 | 9 INPUTP | 1 | 263 EQ | 3 | !LAN_CS_RST.D = !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3; LAN_CS_RST.CLK = CLK_EXT; // GCK LAN_CS_RST.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 4 | LAN_INT_ENABLE ATTRIBUTES | 4358912 | 0 OUTPUTMC | 4 | 12 | 4 | 2 | 13 | 12 | 3 | 12 | 5 INPUTS | 15 | RW | D<15>.PIN | UDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_INT_ENABLE | LAN_SM_RST | DQ_SWAP | LDS | D<7>.PIN | A<23>.PIN | A<15>.PIN | Z3_DATA<23>.EXP INPUTMC | 8 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 | 12 | 4 | 6 | 12 | 11 | 15 | 12 | 3 INPUTP | 7 | 158 | 89 | 155 | 157 | 29 | 161 | 139 EXPORTS | 1 | 12 | 5 IMPORTS | 1 | 12 | 3 EQ | 20 | LAN_INT_ENABLE.T = !RW & D<15>.PIN & !UDS & !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_INT_ENABLE & !LAN_SM_RST # !RW & !D<15>.PIN & !UDS & !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_INT_ENABLE & !LAN_SM_RST ;Imported pterms FB13_4 # !RW & UDS & !DS1 & A<23>.PIN & !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_INT_ENABLE & !LAN_SM_RST # !RW & UDS & !DS1 & !A<23>.PIN & !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_INT_ENABLE & !LAN_SM_RST; LAN_INT_ENABLE.CLK = CLK_EXT; // GCK LAN_INT_ENABLE.EXP = !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<7>.PIN # DQ_SWAP & UDS & LDS & A<23>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<15>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 4 | LAN_IRQ_D0 ATTRIBUTES | 8553344 | 0 OUTPUTMC | 1 | 13 | 12 INPUTS | 2 | LAN_INT | RESET INPUTP | 2 | 201 | 263 EQ | 3 | LAN_IRQ_D0.D = LAN_INT; LAN_IRQ_D0.CLK = CLK_EXT; // GCK LAN_IRQ_D0.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 5 | LAN_RD_S ATTRIBUTES | 8553232 | 0 OUTPUTMC | 2 | 7 | 9 | 14 | 6 INPUTS | 6 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1.EXP | LAN_SM_RST INPUTMC | 6 | 14 | 6 | 14 | 15 | 14 | 4 | 7 | 6 | 14 | 4 | 6 | 12 EXPORTS | 1 | 14 | 6 IMPORTS | 1 | 14 | 4 EQ | 13 | LAN_RD_S.D = LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 ;Imported pterms FB15_5 # RW & !Z3_ADR<13> & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; LAN_RD_S.CLK = CLK_EXT; // GCK LAN_RD_S.AR = LAN_SM_RST; LAN_RD_S.EXP = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 8 | LAN_READY ATTRIBUTES | 8553232 | 0 OUTPUTMC | 2 | 14 | 11 | 14 | 9 INPUTS | 11 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_SWAP | A<9>.PIN | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_RST | A<17>.PIN | UDS | D<1>.PIN | EXP78_.EXP INPUTMC | 7 | 14 | 15 | 14 | 4 | 11 | 15 | 14 | 6 | 7 | 6 | 6 | 12 | 14 | 7 INPUTP | 4 | 108 | 172 | 155 | 30 EXPORTS | 1 | 14 | 9 IMPORTS | 1 | 14 | 7 EQ | 18 | LAN_READY.D = !LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1 ;Imported pterms FB15_8 # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DS1 & DS0 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 # DS1 & DS0 & !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd1; LAN_READY.CLK = CLK_EXT; // GCK LAN_READY.AR = LAN_SM_RST; LAN_READY.EXP = DQ_SWAP & A<9>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<17>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<1>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 7 | 10 | LAN_WRH_S ATTRIBUTES | 8553232 | 0 OUTPUTMC | 2 | 7 | 4 | 7 | 11 INPUTS | 10 | DS0 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LDS | LAN_SM_RST | DQ_SWAP | A<14>.PIN | A<22>.PIN INPUTMC | 6 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 | 6 | 12 | 11 | 15 INPUTP | 4 | 170 | 157 | 125 | 162 EXPORTS | 1 | 7 | 11 EQ | 10 | LAN_WRH_S.D = !LDS & LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # !DS0 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; LAN_WRH_S.CLK = CLK_EXT; // GCK LAN_WRH_S.AR = LAN_SM_RST; LAN_WRH_S.EXP = DQ_SWAP & A<14>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<22>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 16 | LAN_WRL_S ATTRIBUTES | 8553232 | 0 OUTPUTMC | 2 | 12 | 13 | 12 | 15 INPUTS | 13 | DS1 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_SWAP | LAN_SM_RST | LDS | D<5>.PIN | A<13>.PIN | UDS | A<21>.PIN | DQ_DATA<15>.EXP INPUTMC | 7 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 | 11 | 15 | 6 | 12 | 12 | 17 INPUTP | 6 | 148 | 157 | 37 | 123 | 155 | 163 EXPORTS | 1 | 12 | 15 IMPORTS | 1 | 12 | 17 EQ | 13 | LAN_WRL_S.D = !DS1 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 ;Imported pterms FB13_18 # !UDS & LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; LAN_WRL_S.CLK = CLK_EXT; // GCK LAN_WRL_S.AR = LAN_SM_RST; LAN_WRL_S.EXP = DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<5>.PIN # DQ_SWAP & A<13>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<21>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 0 | ROM_OE_S ATTRIBUTES | 8553344 | 0 OUTPUTMC | 1 | 4 | 5 INPUTS | 4 | RW | IDE_ACCESS | IDE_ENABLE | RESET INPUTMC | 2 | 5 | 17 | 4 | 6 INPUTP | 2 | 158 | 263 EQ | 3 | !ROM_OE_S.D = RW & IDE_ACCESS & IDE_ENABLE; ROM_OE_S.CLK = CLK_EXT; // GCK ROM_OE_S.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 12 | Z3_A_LOW ATTRIBUTES | 8553232 | 0 OUTPUTMC | 1 | 3 | 5 INPUTS | 9 | DS1 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | DS0 | LAN_SM_FSM_FFd2 | ROM_B_0_OBUF$BUF6.EXP | Z3_DATA<15>.EXP | LAN_SM_RST INPUTMC | 7 | 14 | 6 | 7 | 6 | 14 | 4 | 14 | 15 | 14 | 11 | 14 | 13 | 6 | 12 INPUTP | 2 | 148 | 170 IMPORTS | 2 | 14 | 11 | 14 | 13 EQ | 22 | Z3_A_LOW.D = !DS1 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DS1 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # !DS0 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1 ;Imported pterms FB15_12 # !DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 ;Imported pterms FB15_14 # UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2; Z3_A_LOW.CLK = CLK_EXT; // GCK Z3_A_LOW.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 5 | A_LAN_10_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 4 | RESET | LAN_ACCESS | A<9>.PIN | Z3_ADR<9> INPUTMC | 2 | 11 | 2 | 13 | 7 INPUTP | 2 | 263 | 108 EQ | 2 | !A_LAN<10> = RESET & LAN_ACCESS & !Z3_ADR<9> # RESET & !LAN_ACCESS & !A<9>.PIN; MACROCELL | 5 | 7 | A_LAN_11_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 4 | RESET | LAN_ACCESS | A<10>.PIN | Z3_ADR<10> INPUTMC | 2 | 11 | 2 | 8 | 5 INPUTP | 2 | 263 | 112 EQ | 2 | !A_LAN<11> = RESET & LAN_ACCESS & !Z3_ADR<10> # RESET & !LAN_ACCESS & !A<10>.PIN; MACROCELL | 5 | 2 | A_LAN_12_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 4 | RESET | LAN_ACCESS | A<11>.PIN | Z3_ADR<11> INPUTMC | 2 | 11 | 2 | 11 | 6 INPUTP | 2 | 263 | 114 EQ | 2 | !A_LAN<12> = RESET & LAN_ACCESS & !Z3_ADR<11> # RESET & !LAN_ACCESS & !A<11>.PIN; MACROCELL | 5 | 4 | A_LAN_13_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 4 | RESET | LAN_ACCESS | A<12>.PIN | Z3_ADR<12> INPUTMC | 2 | 11 | 2 | 11 | 8 INPUTP | 2 | 263 | 115 EQ | 2 | !A_LAN<13> = RESET & LAN_ACCESS & !Z3_ADR<12> # RESET & !LAN_ACCESS & !A<12>.PIN; MACROCELL | 3 | 11 | A_LAN_2_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 4 | RESET | LAN_ACCESS | A<1> | Z3_ADR_1 INPUTMC | 2 | 11 | 2 | 8 | 17 INPUTP | 2 | 263 | 107 EQ | 2 | !A_LAN<2> = RESET & LAN_ACCESS & !Z3_ADR_1 # RESET & !LAN_ACCESS & !A<1>; MACROCELL | 1 | 1 | A_LAN_4_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 1 | 0 INPUTS | 7 | AUTO_CONFIG_Z2_DONE<0> | A<4> | A<3> | A<1> | AUTO_CONFIG_Z2_DONE<1> | A<2> | A_LAN_7_OBUF.EXP INPUTMC | 3 | 8 | 0 | 0 | 8 | 1 | 2 INPUTP | 4 | 97 | 99 | 107 | 101 EXPORTS | 1 | 1 | 0 IMPORTS | 1 | 1 | 2 EQ | 8 | !A_LAN<4> = ;Imported pterms FB2_3 RESET & LAN_ACCESS & !Z3_ADR<3> # RESET & !LAN_ACCESS & !A<3>; A_LAN_4_OBUF.EXP = !AUTO_CONFIG_Z2_DONE<0> & A<4> & !A<3> & !A<1> # !AUTO_CONFIG_Z2_DONE<1> & A<4> & !A<3> & !A<1> # A<4> & A<2> & !A<3> & A<1> # A<4> & !A<2> & A<3> & A<1> # A<4> & !A<2> & !A<3> & !A<1> MACROCELL | 3 | 13 | A_LAN_5_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 4 | RESET | LAN_ACCESS | A<4> | Z3_ADR<4> INPUTMC | 2 | 11 | 2 | 8 | 9 INPUTP | 2 | 263 | 97 EQ | 2 | !A_LAN<5> = RESET & LAN_ACCESS & !Z3_ADR<4> # RESET & !LAN_ACCESS & !A<4>; MACROCELL | 1 | 2 | A_LAN_7_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 1 | 1 INPUTS | 6 | RESET | LAN_ACCESS | A<6> | Z3_ADR<6> | Z3_ADR<3> | A<3> INPUTMC | 3 | 11 | 2 | 8 | 12 | 8 | 8 INPUTP | 3 | 263 | 98 | 99 EXPORTS | 1 | 1 | 1 EQ | 4 | !A_LAN<7> = RESET & LAN_ACCESS & !Z3_ADR<6> # RESET & !LAN_ACCESS & !A<6>; A_LAN_7_OBUF.EXP = RESET & LAN_ACCESS & !Z3_ADR<3> # RESET & !LAN_ACCESS & !A<3> MACROCELL | 5 | 9 | A_LAN_8_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 4 | RESET | LAN_ACCESS | A<7> | Z3_ADR<7> INPUTMC | 2 | 11 | 2 | 8 | 14 INPUTP | 2 | 263 | 100 EQ | 2 | !A_LAN<8> = RESET & LAN_ACCESS & !Z3_ADR<7> # RESET & !LAN_ACCESS & !A<7>; MACROCELL | 5 | 13 | A_LAN_9_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 5 | 14 INPUTS | 13 | RESET | LAN_ACCESS | A<8>.PIN | DQ_SWAP | UDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | D<3>.PIN | LDS | A<11>.PIN | A<19>.PIN | DQ_DATA<3>.EXP INPUTMC | 6 | 11 | 2 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 15 | 5 | 12 INPUTP | 7 | 263 | 106 | 155 | 28 | 157 | 114 | 169 EXPORTS | 1 | 5 | 14 IMPORTS | 1 | 5 | 12 EQ | 11 | !A_LAN<9> = RESET & !LAN_ACCESS & !A<8>.PIN ;Imported pterms FB6_13 # RESET & LAN_ACCESS & !Z3_ADR<8>; A_LAN_9_OBUF.EXP = DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<3>.PIN # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<3>.PIN # DQ_SWAP & A<11>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<19>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 6 | 12 | LAN_SM_RST ATTRIBUTES | 8553216 | 0 OUTPUTMC | 59 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 10 | 0 | 12 | 2 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 | 10 | 17 | 15 | 15 | 5 | 15 | 7 | 0 | 12 | 15 | 7 | 11 | 12 | 17 | 12 | 11 | 15 | 16 | 5 | 12 | 7 | 13 | 12 | 10 | 7 | 8 | 12 | 6 | 10 | 15 | 14 | 9 | 12 | 4 | 14 | 5 | 14 | 8 | 7 | 10 | 12 | 16 | 14 | 12 | 6 | 11 INPUTS | 13 | RESET | LAN_ACCESS | INT_VECTOR_CYCLE | UDS | FCS | DS1 | DS0 | LDS | AS | RW | AUTOCONFIG_Z2_ACCESS | DQ<7>.PIN | CP_CS INPUTMC | 4 | 11 | 2 | 8 | 4 | 4 | 12 | 4 | 1 INPUTP | 9 | 263 | 155 | 147 | 148 | 170 | 157 | 152 | 158 | 226 EXPORTS | 1 | 6 | 11 EQ | 11 | !LAN_SM_RST.D = RESET & LAN_ACCESS & !INT_VECTOR_CYCLE & !UDS & !FCS # RESET & LAN_ACCESS & !INT_VECTOR_CYCLE & !LDS & !FCS # RESET & LAN_ACCESS & !INT_VECTOR_CYCLE & !DS1 & !FCS # RESET & LAN_ACCESS & !INT_VECTOR_CYCLE & !DS0 & !FCS; !LAN_SM_RST.CLK = CLK_EXT; // GCK LAN_SM_RST.EXP = !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & DQ<7>.PIN & !CP_CS GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 15 | CP_WE_S ATTRIBUTES | 8520480 | 0 OUTPUTMC | 2 | 2 | 17 | 10 | 15 INPUTS | 5 | RW | UDS | CP_CS | LDS | CP_WE_S/CP_WE_S_CLKF INPUTMC | 2 | 4 | 1 | 2 | 16 INPUTP | 3 | 158 | 155 | 157 EQ | 3 | !CP_WE_S.D = !RW & !UDS & !CP_CS # !RW & !LDS & !CP_CS; CP_WE_S.CLK = CP_WE_S/CP_WE_S_CLKF; MACROCELL | 13 | 16 | CP_RD_S ATTRIBUTES | 8520480 | 0 OUTPUTMC | 1 | 12 | 1 INPUTS | 5 | RW | UDS | CP_CS | LDS | CP_WE_S/CP_WE_S_CLKF INPUTMC | 2 | 4 | 1 | 2 | 16 INPUTP | 3 | 158 | 155 | 157 EQ | 3 | !CP_RD_S.D = RW & !UDS & !CP_CS # RW & !LDS & !CP_CS; CP_RD_S.CLK = CP_WE_S/CP_WE_S_CLKF; MACROCELL | 2 | 17 | CP_WE_QUIRK ATTRIBUTES | 8520480 | 0 OUTPUTMC | 1 | 10 | 15 INPUTS | 2 | CP_WE_S | CP_WE_S/CP_WE_S_CLKF INPUTMC | 2 | 13 | 15 | 2 | 16 EQ | 2 | CP_WE_QUIRK.D = CP_WE_S; CP_WE_QUIRK.CLK = CP_WE_S/CP_WE_S_CLKF; MACROCELL | 4 | 0 | LAN_A_INIT<3> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 2 | 3 | 7 | 4 | 17 INPUTS | 9 | RESET | AS | RW | LAN_ACCESS | AUTOCONFIG_Z2_ACCESS | D_Z2_OUT<0> | FCS | DQ<4>.PIN | CP_CS INPUTMC | 4 | 11 | 2 | 4 | 12 | 14 | 17 | 4 | 1 INPUTP | 5 | 263 | 152 | 158 | 147 | 225 EXPORTS | 1 | 4 | 17 EQ | 11 | LAN_A_INIT<3>.D = Gnd; LAN_A_INIT<3>.CLK = CLK_EXT; // GCK LAN_A_INIT<3>.AP = RESET; LAN_A_INIT<3>.EXP = !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<0> # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS & D_Z2_OUT<0> # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<4>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & DQ<4>.PIN & !CP_CS GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 5 | A_LAN_0_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 3 | RESET | LAN_ACCESS | Z3_A_LOW INPUTMC | 2 | 11 | 2 | 14 | 12 INPUTP | 1 | 263 EQ | 2 | A_LAN<0> = !RESET # LAN_ACCESS & Z3_A_LOW; MACROCELL | 3 | 4 | A_LAN_1_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 3 | RESET | LAN_ACCESS | Z3_ADR_0 INPUTMC | 2 | 11 | 2 | 8 | 15 INPUTP | 1 | 263 EQ | 2 | A_LAN<1> = !RESET # LAN_ACCESS & Z3_ADR_0; MACROCELL | 3 | 7 | A_LAN_3_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 5 | RESET | LAN_A_INIT<3> | LAN_ACCESS | Z3_ADR<2> | A<2> INPUTMC | 3 | 4 | 0 | 11 | 2 | 8 | 7 INPUTP | 2 | 263 | 101 EQ | 3 | A_LAN<3> = !RESET & LAN_A_INIT<3> # RESET & LAN_ACCESS & Z3_ADR<2> # RESET & !LAN_ACCESS & A<2>; MACROCELL | 1 | 4 | A_LAN_6_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 5 | RESET | LAN_A_INIT<6> | LAN_ACCESS | Z3_ADR<5> | A<5> INPUTMC | 3 | 2 | 15 | 11 | 2 | 8 | 11 INPUTP | 2 | 263 | 91 EQ | 3 | A_LAN<6> = !RESET & LAN_A_INIT<6> # RESET & LAN_ACCESS & Z3_ADR<5> # RESET & !LAN_ACCESS & A<5>; MACROCELL | 12 | 1 | CP_RD_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 12 | 0 INPUTS | 11 | AS | CP_RD_S | DQ_SWAP | UDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | D<7>.PIN | LDS | A<15>.PIN | A<23>.PIN INPUTMC | 5 | 13 | 16 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 15 INPUTP | 6 | 152 | 155 | 29 | 157 | 139 | 161 EXPORTS | 1 | 12 | 0 EQ | 9 | !CP_RD = !AS & !CP_RD_S; CP_RD_OBUF.EXP = DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<7>.PIN # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<7>.PIN # DQ_SWAP & A<15>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<23>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 10 | 16 | CP_WE_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 10 | 17 INPUTS | 12 | DQ_SWAP | A<16>.PIN | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | A<8>.PIN | D<8>.PIN | UDS | LAN_SM_FSM_FFd2 | D<0>.PIN | LDS | DQ_DATA<8>.EXP INPUTMC | 6 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 4 | 14 | 15 | 10 | 15 INPUTP | 6 | 175 | 106 | 32 | 155 | 4 | 157 EXPORTS | 1 | 10 | 17 IMPORTS | 1 | 10 | 15 EQ | 12 | !CP_WE = ;Imported pterms FB11_16 !AS & !CP_WE_S & CP_WE_QUIRK; CP_WE_OBUF.EXP = DQ_SWAP & A<16>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<8>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<8>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<0>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<0>.PIN MACROCELL | 0 | 16 | IDE_R_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | AS | IDE_R_S INPUTMC | 1 | 13 | 6 INPUTP | 1 | 152 EQ | 1 | !IDE_R = !AS & !IDE_R_S; MACROCELL | 2 | 1 | IDE_W_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | AS | IDE_W_S INPUTMC | 1 | 4 | 5 INPUTP | 1 | 152 EQ | 1 | !IDE_W = !AS & !IDE_W_S; MACROCELL | 7 | 7 | LAN_CS_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 7 | 8 INPUTS | 13 | RESET | LAN_CS_RST | DQ_SWAP | A<22>.PIN | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | A<14>.PIN | D<14>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS | LAN_SM_FSM_FFd4.EXP INPUTMC | 7 | 13 | 5 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 4 | 14 | 15 | 7 | 6 INPUTP | 6 | 263 | 162 | 125 | 81 | 155 | 157 EXPORTS | 1 | 7 | 8 IMPORTS | 1 | 7 | 6 EQ | 12 | LAN_CS = !RESET & LAN_CS_RST ;Imported pterms FB8_7 # Z3_ADR<13> & LAN_CS_RST # RESET & LAN_ACCESS & !Z3_ADR<13>; LAN_CS_OBUF.EXP = DQ_SWAP & A<22>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<14>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<14>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & D<14>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 7 | 4 | LAN_WRH_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 7 | 3 INPUTS | 9 | RESET | LAN_WR_RST | FCS | LAN_WRH_S | RW | LAN_ACCESS | DS1 | DQ_DATA<14> | DS0 INPUTMC | 4 | 13 | 1 | 7 | 10 | 11 | 2 | 7 | 11 INPUTP | 5 | 263 | 147 | 158 | 148 | 170 EXPORTS | 1 | 7 | 3 EQ | 7 | LAN_WRH = !RESET & LAN_WR_RST # FCS & LAN_WR_RST # RESET & !FCS & LAN_WRH_S; LAN_WRH_OBUF.EXP = !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<14> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<14> MACROCELL | 12 | 13 | LAN_WRL_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 12 | 12 INPUTS | 11 | RESET | LAN_WR_RST | FCS | LAN_WRL_S | DQ_SWAP | A<9>.PIN | UDS | LDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 INPUTMC | 6 | 13 | 1 | 12 | 16 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 15 INPUTP | 5 | 263 | 147 | 108 | 155 | 157 EXPORTS | 1 | 12 | 12 EQ | 5 | LAN_WRL = !RESET & LAN_WR_RST # FCS & LAN_WR_RST # RESET & !FCS & LAN_WRL_S; LAN_WRL_OBUF.EXP = !DQ_SWAP & A<9>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 4 | 4 | ROM_OE_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 4 | 3 INPUTS | 7 | CP_BASEADR<2> | A<18>.PIN | CP_BASEADR<4> | A<20>.PIN | CP_BASEADR<7> | A<23>.PIN | IDE_W_S.EXP INPUTMC | 4 | 3 | 16 | 3 | 14 | 3 | 10 | 4 | 5 INPUTP | 3 | 171 | 167 | 161 EXPORTS | 1 | 4 | 3 IMPORTS | 1 | 4 | 5 EQ | 7 | !ROM_OE = ;Imported pterms FB5_6 !AS & !ROM_OE_S; ROM_OE_OBUF.EXP = CP_BASEADR<2> & !A<18>.PIN # CP_BASEADR<4> & !A<20>.PIN # !CP_BASEADR<4> & A<20>.PIN # CP_BASEADR<7> & !A<23>.PIN # !CP_BASEADR<7> & A<23>.PIN MACROCELL | 7 | 9 | LAN_RD_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 7 | 8 INPUTS | 12 | RESET | FCS | LAN_RD_S | DQ_SWAP | UDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | D<6>.PIN | LDS | A<22>.PIN | A<14>.PIN INPUTMC | 5 | 14 | 5 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 15 INPUTP | 7 | 263 | 147 | 155 | 26 | 157 | 162 | 125 EXPORTS | 1 | 7 | 8 EQ | 9 | LAN_RD = RESET & !FCS & LAN_RD_S; LAN_RD_OBUF.EXP = !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<6>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<6>.PIN # DQ_SWAP & UDS & LDS & A<22>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<14>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 13 | 13 | SLAVE_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 6 | AS | LAN_ACCESS | FCS | AUTOCONFIG_Z2_ACCESS | IDE_ACCESS | CP_CS INPUTMC | 4 | 11 | 2 | 4 | 12 | 5 | 17 | 4 | 1 INPUTP | 2 | 152 | 147 EQ | 5 | SLAVE = AS & !LAN_ACCESS # AS & FCS # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !IDE_ACCESS & CP_CS # !AUTOCONFIG_Z2_ACCESS & !IDE_ACCESS & FCS & CP_CS; MACROCELL | 13 | 2 | ROM_B_0_OBUF$BUF2 ATTRIBUTES | 265986 | 0 INPUTS | 2 | LAN_ACCESS | FCS INPUTMC | 1 | 11 | 2 INPUTP | 1 | 147 EQ | 2 | OVR = Gnd; OVR.OE = LAN_ACCESS & !FCS; MACROCELL | 5 | 1 | ROM_B_0_OBUF$BUF4 ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 5 | 0 INPUTS | 5 | CP_IRQ | IDE_BASEADR<4> | A<20>.PIN | IDE_BASEADR<7> | A<23>.PIN INPUTMC | 2 | 1 | 3 | 3 | 9 INPUTP | 3 | 59 | 167 | 161 EXPORTS | 1 | 5 | 0 EQ | 6 | INT6_OUT = Gnd; INT6_OUT.OE = !CP_IRQ; ROM_B_0_OBUF$BUF4.EXP = IDE_BASEADR<4> & !A<20>.PIN # !IDE_BASEADR<4> & A<20>.PIN # IDE_BASEADR<7> & !A<23>.PIN # !IDE_BASEADR<7> & A<23>.PIN MACROCELL | 2 | 13 | ROM_B_0_OBUF$BUF5 ATTRIBUTES | 265986 | 0 INPUTS | 2 | LAN_IRQ_OUT | LAN_INT_ENABLE INPUTMC | 2 | 13 | 12 | 12 | 4 EQ | 2 | INT2_OUT = Gnd; INT2_OUT.OE = !LAN_IRQ_OUT & LAN_INT_ENABLE; MACROCELL | 14 | 11 | ROM_B_0_OBUF$BUF6 ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 14 | 12 INPUTS | 7 | FCS | LAN_READY | DS0 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 5 | 14 | 8 | 7 | 6 | 14 | 15 | 14 | 4 | 14 | 6 INPUTP | 2 | 147 | 170 EXPORTS | 1 | 14 | 12 EQ | 10 | DTACK = Gnd; DTACK.OE = !FCS & LAN_READY; ROM_B_0_OBUF$BUF6.EXP = !DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 MACROCELL | 13 | 10 | CFOUT_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 3 | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> INPUTMC | 3 | 8 | 0 | 0 | 8 | 13 | 17 EQ | 2 | !CFOUT = AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & AUTO_CONFIG_Z2_DONE<2>; MACROCELL | 4 | 1 | CP_CS_OBUF ATTRIBUTES | 8815494 | 0 OUTPUTMC | 22 | 4 | 13 | 4 | 12 | 4 | 15 | 6 | 1 | 6 | 3 | 6 | 11 | 1 | 15 | 4 | 11 | 13 | 15 | 13 | 16 | 13 | 13 | 6 | 5 | 4 | 10 | 1 | 14 | 4 | 0 | 4 | 14 | 4 | 16 | 4 | 17 | 6 | 0 | 6 | 2 | 6 | 10 | 6 | 12 INPUTS | 7 | LAN_ACCESS | SHUT_UP_Z2<1> | AS | CP_BASEADR<0> | A<16>.PIN | EXP28_.EXP | RESET INPUTMC | 4 | 11 | 2 | 0 | 3 | 6 | 6 | 4 | 2 INPUTP | 3 | 152 | 175 | 263 IMPORTS | 1 | 4 | 2 EQ | 24 | CP_CS.D = AS # LAN_ACCESS # SHUT_UP_Z2<1> # !CP_BASEADR<0> & A<16>.PIN ;Imported pterms FB5_3 # CP_BASEADR<0> & !A<16>.PIN # CP_BASEADR<1> & !A<17>.PIN # !CP_BASEADR<1> & A<17>.PIN # CP_BASEADR<3> & !A<19>.PIN # !CP_BASEADR<3> & A<19>.PIN ;Imported pterms FB5_4 # !CP_BASEADR<2> & A<18>.PIN # CP_BASEADR<5> & !A<21>.PIN # !CP_BASEADR<5> & A<21>.PIN # CP_BASEADR<6> & !A<22>.PIN # !CP_BASEADR<6> & A<22>.PIN ;Imported pterms FB5_5 # CP_BASEADR<2> & !A<18>.PIN # CP_BASEADR<4> & !A<20>.PIN # !CP_BASEADR<4> & A<20>.PIN # CP_BASEADR<7> & !A<23>.PIN # !CP_BASEADR<7> & A<23>.PIN; CP_CS.CLK = CLK_EXT; // GCK CP_CS.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 11 | IDE_A_0_OBUF$BUF0 ATTRIBUTES | 264962 | 0 INPUTS | 1 | A<9>.PIN INPUTP | 1 | 108 EQ | 1 | IDE_A<0> = A<9>.PIN; MACROCELL | 0 | 14 | IDE_A_1_OBUF$BUF0 ATTRIBUTES | 264962 | 0 INPUTS | 1 | A<10>.PIN INPUTP | 1 | 112 EQ | 1 | IDE_A<1> = A<10>.PIN; MACROCELL | 0 | 13 | IDE_A_2_OBUF$BUF0 ATTRIBUTES | 264962 | 0 INPUTS | 1 | A<11>.PIN INPUTP | 1 | 114 EQ | 1 | IDE_A<2> = A<11>.PIN; MACROCELL | 0 | 7 | IDE_CS_0_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 1 | A<12>.PIN INPUTP | 1 | 115 EQ | 1 | IDE_CS<0> = !A<12>.PIN; MACROCELL | 0 | 9 | IDE_CS_1_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 1 | A<13>.PIN INPUTP | 1 | 123 EQ | 1 | IDE_CS<1> = !A<13>.PIN; MACROCELL | 13 | 14 | ROM_B_0_OBUF$BUF1 ATTRIBUTES | 265986 | 0 INPUTS | 0 EQ | 2 | OWN = Gnd; OWN.OE = Gnd; MACROCELL | 15 | 9 | ROM_B_0_OBUF$BUF3 ATTRIBUTES | 265986 | 0 INPUTS | 0 EQ | 2 | MTACK = Gnd; MTACK.OE = Gnd; MACROCELL | 10 | 13 | ROM_B_0_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 10 | 14 INPUTS | 9 | DQ_SWAP | D<8>.PIN | UDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LDS | A<8>.PIN | A<16>.PIN INPUTMC | 4 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 15 INPUTP | 5 | 32 | 155 | 157 | 106 | 175 EXPORTS | 1 | 10 | 14 EQ | 9 | ROM_B<1> = Gnd; ROM_B_0_OBUF.EXP = !DQ_SWAP & D<8>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<8>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & A<8>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<16>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 10 | 11 | ROM_B_0_OBUF$BUF0 ATTRIBUTES | 264962 | 0 INPUTS | 0 EQ | 1 | ROM_B<0> = Gnd; MACROCELL | 6 | 5 | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST ATTRIBUTES | 133888 | 0 OUTPUTMC | 16 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 9 | 9 | 13 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 5 | 9 | 4 | 9 | 7 | 9 | 11 | 9 | 10 INPUTS | 10 | RESET | AS | RW | CP_CS | IDE_ACCESS | LAN_ACCESS | UDS | FCS | LDS | D_14_IOBUFE.EXP INPUTMC | 4 | 4 | 1 | 5 | 17 | 11 | 2 | 6 | 4 INPUTP | 6 | 263 | 152 | 158 | 155 | 147 | 157 IMPORTS | 1 | 6 | 4 EQ | 8 | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST = !RESET # !AS & !RW & IDE_ACCESS # !AS & !RW & !CP_CS # !RW & LAN_ACCESS & !UDS & !FCS # !RW & LAN_ACCESS & !LDS & !FCS ;Imported pterms FB7_5 # !RW & LAN_ACCESS & !DS1 & !FCS # !RW & LAN_ACCESS & !DS0 & !FCS; MACROCELL | 4 | 10 | D_8_IOBUFE/D_8_IOBUFE_TRST ATTRIBUTES | 133888 | 0 OUTPUTMC | 16 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 INPUTS | 10 | AS | RW | AUTOCONFIG_Z2_ACCESS | CP_CS | LAN_ACCESS | Z3_DATA<25> | FCS | DQ<9>.PIN | DQ<1>.PIN | D_2_IOBUFE.EXP INPUTMC | 5 | 4 | 12 | 4 | 1 | 11 | 2 | 15 | 6 | 4 | 9 INPUTP | 5 | 152 | 158 | 147 | 209 | 216 EXPORTS | 1 | 4 | 11 IMPORTS | 1 | 4 | 9 EQ | 9 | D_8_IOBUFE/D_8_IOBUFE_TRST = !AS & RW & AUTOCONFIG_Z2_ACCESS # !AS & RW & !CP_CS ;Imported pterms FB5_10 # !AS & RW & IDE_ACCESS # RW & LAN_ACCESS & !FCS; D_8_IOBUFE/D_8_IOBUFE_TRST.EXP = RW & LAN_ACCESS & !Z3_DATA<25> & !FCS # !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<9>.PIN & CP_CS # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<1>.PIN & !CP_CS MACROCELL | 2 | 16 | CP_WE_S/CP_WE_S_CLKF ATTRIBUTES | 133888 | 0 OUTPUTMC | 3 | 13 | 15 | 13 | 16 | 2 | 17 INPUTS | 2 | C3 | C1 INPUTP | 2 | 187 | 188 EQ | 2 | CP_WE_S/CP_WE_S_CLKF = C3 $ C1; MACROCELL | 9 | 13 | _18_ ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 12 INPUTS | 10 | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST | DQ<8>_BUFR | RW | RESET | LAN_ACCESS | LDS | FCS | DQ_DATA<6> | DS1 | DS0 INPUTMC | 4 | 6 | 5 | 6 | 17 | 11 | 2 | 7 | 8 INPUTP | 6 | 158 | 263 | 157 | 147 | 148 | 170 EXPORTS | 1 | 9 | 12 EQ | 8 | DQ<8> = DQ<8>_BUFR; DQ<8>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; _18_.EXP = !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<6> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<6> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<6> MACROCELL | 9 | 9 | _19_ ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 8 INPUTS | 9 | DQ_9_IOBUFE/DQ_9_IOBUFE_TRST | DQ<4>_BUFR | RW | RESET | LAN_ACCESS | DS1 | FCS | DQ_DATA<5> | DS0 INPUTMC | 4 | 6 | 5 | 9 | 0 | 11 | 2 | 12 | 10 INPUTP | 5 | 158 | 263 | 148 | 147 | 170 EXPORTS | 1 | 9 | 8 EQ | 6 | DQ<4> = DQ<4>_BUFR; DQ<4>.OE = DQ_9_IOBUFE/DQ_9_IOBUFE_TRST; _19_.EXP = !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<5> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<5> MACROCELL | 1 | 8 | EXP24_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 1 | 9 INPUTS | 7 | LAN_ACCESS | DQ<6>.PIN | FCS | AS | RW | AUTOCONFIG_Z2_ACCESS | Z3_DATA<22> INPUTMC | 3 | 11 | 2 | 4 | 12 | 10 | 6 INPUTP | 4 | 227 | 147 | 152 | 158 EXPORTS | 1 | 1 | 9 EQ | 5 | EXP24_.EXP = !LAN_ACCESS & DQ<6>.PIN # FCS & DQ<6>.PIN # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS # RW & LAN_ACCESS & Z3_DATA<22> & !FCS MACROCELL | 1 | 12 | EXP25_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 1 | 13 INPUTS | 7 | RW | DQ<7>.PIN | LAN_ACCESS | FCS | AS | AUTOCONFIG_Z2_ACCESS | D_3_IOBUFE.EXP INPUTMC | 3 | 11 | 2 | 4 | 12 | 1 | 11 INPUTP | 4 | 158 | 226 | 147 | 152 EXPORTS | 1 | 1 | 13 IMPORTS | 1 | 1 | 11 EQ | 7 | EXP25_.EXP = !RW & DQ<7>.PIN # !LAN_ACCESS & DQ<7>.PIN # FCS & DQ<7>.PIN # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS ;Imported pterms FB2_12 # RW & LAN_ACCESS & Z3_DATA<23> & !FCS MACROCELL | 1 | 15 | EXP26_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 1 | 16 INPUTS | 9 | AS | LAN_ACCESS | DQ<8>.PIN | FCS | RW | Z3_DATA<24> | AUTOCONFIG_Z2_ACCESS | CP_CS | D_1_IOBUFE.EXP INPUTMC | 5 | 11 | 2 | 15 | 8 | 4 | 12 | 4 | 1 | 1 | 14 INPUTP | 4 | 152 | 231 | 147 | 158 EXPORTS | 1 | 1 | 16 IMPORTS | 1 | 1 | 14 EQ | 11 | EXP26_.EXP = AS & !LAN_ACCESS & !DQ<8>.PIN # AS & FCS & !DQ<8>.PIN # RW & LAN_ACCESS & !Z3_DATA<24> & !FCS # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<8>.PIN & CP_CS # !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<8>.PIN & CP_CS ;Imported pterms FB2_15 # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<0>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<0>.PIN & !CP_CS MACROCELL | 1 | 17 | EXP27_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 1 | 0 INPUTS | 8 | A<4> | A<5> | A<2> | UDS | LDS | A<3> | A<1> | D_8_IOBUFE.EXP INPUTMC | 1 | 1 | 16 INPUTP | 7 | 97 | 91 | 101 | 155 | 157 | 99 | 107 EXPORTS | 1 | 1 | 0 IMPORTS | 1 | 1 | 16 EQ | 12 | EXP27_.EXP = A<4> & A<5> # A<5> & !A<2> # UDS & LDS # !A<4> & A<2> & A<3> # !A<4> & A<3> & !A<1> ;Imported pterms FB2_17 # AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & A<4> & !A<2> & A<1> # AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !A<4> & A<2> & A<1> # AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<4> & !A<5> & A<2> & !A<1> MACROCELL | 4 | 2 | EXP28_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 1 INPUTS | 7 | CP_BASEADR<0> | A<16>.PIN | CP_BASEADR<1> | A<17>.PIN | CP_BASEADR<3> | A<19>.PIN | EXP29_.EXP INPUTMC | 4 | 6 | 6 | 3 | 17 | 3 | 15 | 4 | 3 INPUTP | 3 | 175 | 172 | 169 EXPORTS | 1 | 4 | 1 IMPORTS | 1 | 4 | 3 EQ | 17 | EXP28_.EXP = CP_BASEADR<0> & !A<16>.PIN # CP_BASEADR<1> & !A<17>.PIN # !CP_BASEADR<1> & A<17>.PIN # CP_BASEADR<3> & !A<19>.PIN # !CP_BASEADR<3> & A<19>.PIN ;Imported pterms FB5_4 # !CP_BASEADR<2> & A<18>.PIN # CP_BASEADR<5> & !A<21>.PIN # !CP_BASEADR<5> & A<21>.PIN # CP_BASEADR<6> & !A<22>.PIN # !CP_BASEADR<6> & A<22>.PIN ;Imported pterms FB5_5 # CP_BASEADR<2> & !A<18>.PIN # CP_BASEADR<4> & !A<20>.PIN # !CP_BASEADR<4> & A<20>.PIN # CP_BASEADR<7> & !A<23>.PIN # !CP_BASEADR<7> & A<23>.PIN MACROCELL | 4 | 3 | EXP29_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 2 INPUTS | 7 | CP_BASEADR<2> | A<18>.PIN | CP_BASEADR<5> | A<21>.PIN | CP_BASEADR<6> | A<22>.PIN | ROM_OE_OBUF.EXP INPUTMC | 4 | 3 | 16 | 6 | 7 | 3 | 12 | 4 | 4 INPUTP | 3 | 171 | 163 | 162 EXPORTS | 1 | 4 | 2 IMPORTS | 1 | 4 | 4 EQ | 11 | EXP29_.EXP = !CP_BASEADR<2> & A<18>.PIN # CP_BASEADR<5> & !A<21>.PIN # !CP_BASEADR<5> & A<21>.PIN # CP_BASEADR<6> & !A<22>.PIN # !CP_BASEADR<6> & A<22>.PIN ;Imported pterms FB5_5 # CP_BASEADR<2> & !A<18>.PIN # CP_BASEADR<4> & !A<20>.PIN # !CP_BASEADR<4> & A<20>.PIN # CP_BASEADR<7> & !A<23>.PIN # !CP_BASEADR<7> & A<23>.PIN MACROCELL | 4 | 15 | EXP30_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 14 INPUTS | 8 | RW | DQ<11>.PIN | AS | LAN_ACCESS | FCS | AUTOCONFIG_Z2_ACCESS | CP_CS | D_12_IOBUFE.EXP INPUTMC | 4 | 11 | 2 | 4 | 12 | 4 | 1 | 4 | 16 INPUTP | 4 | 158 | 207 | 152 | 147 EXPORTS | 1 | 4 | 14 IMPORTS | 1 | 4 | 16 EQ | 12 | EXP30_.EXP = !RW & !DQ<11>.PIN # AS & !LAN_ACCESS & !DQ<11>.PIN # AS & FCS & !DQ<11>.PIN # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<11>.PIN & CP_CS # !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<11>.PIN & CP_CS ;Imported pterms FB5_17 # RW & LAN_ACCESS & !Z3_DATA<27> & !FCS # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & !DQ<3>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & !DQ<3>.PIN & !CP_CS MACROCELL | 4 | 17 | EXP31_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 16 INPUTS | 9 | AS | LAN_ACCESS | DQ<12>.PIN | FCS | RW | Z3_DATA<28> | AUTOCONFIG_Z2_ACCESS | CP_CS | LAN_A_INIT<3>.EXP INPUTMC | 5 | 11 | 2 | 10 | 3 | 4 | 12 | 4 | 1 | 4 | 0 INPUTP | 4 | 152 | 235 | 147 | 158 EXPORTS | 1 | 4 | 16 IMPORTS | 1 | 4 | 0 EQ | 15 | EXP31_.EXP = AS & !LAN_ACCESS & DQ<12>.PIN # AS & FCS & DQ<12>.PIN # RW & LAN_ACCESS & Z3_DATA<28> & !FCS # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<12>.PIN & CP_CS # !AUTOCONFIG_Z2_ACCESS & FCS & DQ<12>.PIN & CP_CS ;Imported pterms FB5_1 # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<0> # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS & D_Z2_OUT<0> # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<4>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & DQ<4>.PIN & !CP_CS MACROCELL | 5 | 0 | EXP32_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 5 | 17 INPUTS | 7 | IDE_BASEADR<2> | A<18>.PIN | IDE_BASEADR<5> | A<21>.PIN | IDE_BASEADR<6> | A<22>.PIN | ROM_B_0_OBUF$BUF4.EXP INPUTMC | 4 | 1 | 6 | 6 | 8 | 6 | 9 | 5 | 1 INPUTP | 3 | 171 | 163 | 162 EXPORTS | 1 | 5 | 17 IMPORTS | 1 | 5 | 1 EQ | 10 | EXP32_.EXP = !IDE_BASEADR<2> & A<18>.PIN # IDE_BASEADR<5> & !A<21>.PIN # !IDE_BASEADR<5> & A<21>.PIN # IDE_BASEADR<6> & !A<22>.PIN # !IDE_BASEADR<6> & A<22>.PIN ;Imported pterms FB6_2 # IDE_BASEADR<4> & !A<20>.PIN # !IDE_BASEADR<4> & A<20>.PIN # IDE_BASEADR<7> & !A<23>.PIN # !IDE_BASEADR<7> & A<23>.PIN MACROCELL | 5 | 10 | EXP33_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 5 | 11 INPUTS | 9 | DQ_SWAP | UDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | D<3>.PIN | LDS | A<19>.PIN | A<11>.PIN INPUTMC | 4 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 15 INPUTP | 5 | 155 | 28 | 157 | 169 | 114 EXPORTS | 1 | 5 | 11 EQ | 8 | EXP33_.EXP = !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<3>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<3>.PIN # DQ_SWAP & UDS & LDS & A<19>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<11>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 5 | 11 | EXP34_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 5 | 12 INPUTS | 12 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd1 | DQ_DATA<3> | DQ_SWAP | A<19>.PIN | LAN_SM_FSM_FFd4 | A<11>.PIN | D<11>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS | EXP33_.EXP INPUTMC | 7 | 14 | 6 | 14 | 4 | 5 | 12 | 11 | 15 | 7 | 6 | 14 | 15 | 5 | 10 INPUTP | 5 | 169 | 114 | 77 | 155 | 157 EXPORTS | 1 | 5 | 12 IMPORTS | 1 | 5 | 10 EQ | 18 | EXP34_.EXP = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<3> # DQ_SWAP & A<19>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<11>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<11>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & D<11>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB6_11 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<3>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<3>.PIN # DQ_SWAP & UDS & LDS & A<19>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<11>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 5 | 14 | EXP35_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 5 | 15 INPUTS | 12 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd1 | DQ_DATA<11> | DQ_SWAP | A<11>.PIN | LAN_SM_FSM_FFd4 | A<19>.PIN | D<11>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS | A_LAN_9_OBUF.EXP INPUTMC | 7 | 14 | 6 | 14 | 4 | 5 | 15 | 11 | 15 | 7 | 6 | 14 | 15 | 5 | 13 INPUTP | 5 | 114 | 169 | 77 | 155 | 157 EXPORTS | 1 | 5 | 15 IMPORTS | 1 | 5 | 13 EQ | 18 | EXP35_.EXP = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<11> # DQ_SWAP & A<11>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<19>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & D<11>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<11>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB6_14 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<3>.PIN # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<3>.PIN # DQ_SWAP & A<11>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<19>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 5 | 16 | EXP36_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 5 | 17 INPUTS | 7 | IDE_BASEADR<0> | A<16>.PIN | IDE_BASEADR<1> | A<17>.PIN | IDE_BASEADR<3> | A<19>.PIN | DQ_DATA<11>.EXP INPUTMC | 4 | 1 | 10 | 1 | 7 | 1 | 5 | 5 | 15 INPUTP | 3 | 175 | 172 | 169 EXPORTS | 1 | 5 | 17 IMPORTS | 1 | 5 | 15 EQ | 7 | EXP36_.EXP = IDE_BASEADR<0> & !A<16>.PIN # IDE_BASEADR<1> & !A<17>.PIN # !IDE_BASEADR<1> & A<17>.PIN # IDE_BASEADR<3> & !A<19>.PIN # !IDE_BASEADR<3> & A<19>.PIN ;Imported pterms FB6_16 # IDE_BASEADR<2> & !A<18>.PIN MACROCELL | 6 | 0 | EXP37_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 1 INPUTS | 8 | AS | RW | LAN_ACCESS | AUTOCONFIG_Z2_ACCESS | D_Z2_OUT<1> | FCS | DQ<5>.PIN | CP_CS INPUTMC | 4 | 11 | 2 | 4 | 12 | 1 | 0 | 4 | 1 INPUTP | 4 | 152 | 158 | 147 | 221 EXPORTS | 1 | 6 | 1 EQ | 8 | EXP37_.EXP = !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<1> # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS & D_Z2_OUT<1> # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<5>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & DQ<5>.PIN & !CP_CS MACROCELL | 6 | 1 | EXP38_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 2 INPUTS | 9 | AS | LAN_ACCESS | DQ<13>.PIN | FCS | RW | Z3_DATA<29> | AUTOCONFIG_Z2_ACCESS | CP_CS | EXP37_.EXP INPUTMC | 5 | 11 | 2 | 10 | 1 | 4 | 12 | 4 | 1 | 6 | 0 INPUTP | 4 | 152 | 204 | 147 | 158 EXPORTS | 1 | 6 | 2 IMPORTS | 1 | 6 | 0 EQ | 15 | EXP38_.EXP = AS & !LAN_ACCESS & DQ<13>.PIN # AS & FCS & DQ<13>.PIN # RW & LAN_ACCESS & Z3_DATA<29> & !FCS # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<13>.PIN & CP_CS # !AUTOCONFIG_Z2_ACCESS & FCS & DQ<13>.PIN & CP_CS ;Imported pterms FB7_1 # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<1> # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS & D_Z2_OUT<1> # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<5>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & DQ<5>.PIN & !CP_CS MACROCELL | 6 | 3 | EXP39_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 4 INPUTS | 10 | AS | FCS | DQ<14>.PIN | RW | LAN_ACCESS | Z3_DATA<30> | AUTOCONFIG_Z2_ACCESS | CP_CS | D_Z2_OUT<2> | D_13_IOBUFE.EXP INPUTMC | 6 | 11 | 2 | 10 | 0 | 4 | 12 | 4 | 1 | 6 | 14 | 6 | 2 INPUTP | 4 | 152 | 147 | 236 | 158 EXPORTS | 1 | 6 | 4 IMPORTS | 1 | 6 | 2 EQ | 14 | EXP39_.EXP = AS & FCS & DQ<14>.PIN # RW & LAN_ACCESS & Z3_DATA<30> & !FCS # !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<14>.PIN & CP_CS # !AUTOCONFIG_Z2_ACCESS & FCS & DQ<14>.PIN & CP_CS # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<2> ;Imported pterms FB7_3 # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS & D_Z2_OUT<2> # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<6>.PIN & !CP_CS # !AS & RW & !AUTOCONFIG_Z2_ACCESS & FCS & DQ<6>.PIN & !CP_CS MACROCELL | 6 | 10 | EXP40_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 11 INPUTS | 10 | RW | LAN_ACCESS | Z3_DATA<31> | FCS | AUTOCONFIG_Z2_ACCESS | DQ<15>.PIN | CP_CS | AS | D_Z2_OUT<3> | DQ<7>.PIN INPUTMC | 5 | 11 | 2 | 12 | 2 | 4 | 12 | 4 | 1 | 8 | 2 INPUTP | 5 | 158 | 147 | 202 | 152 | 226 EXPORTS | 1 | 6 | 11 EQ | 8 | EXP40_.EXP = RW & LAN_ACCESS & Z3_DATA<31> & !FCS # !AUTOCONFIG_Z2_ACCESS & FCS & DQ<15>.PIN & CP_CS # !AS & RW & !LAN_ACCESS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<3> # !AS & RW & AUTOCONFIG_Z2_ACCESS & FCS & D_Z2_OUT<3> # !AS & RW & !LAN_ACCESS & !AUTOCONFIG_Z2_ACCESS & DQ<7>.PIN & !CP_CS MACROCELL | 6 | 13 | EXP41_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 14 INPUTS | 5 | A<4> | A<5> | A<3> | A<2> | A<1> INPUTP | 5 | 97 | 91 | 99 | 101 | 107 EXPORTS | 1 | 6 | 14 EQ | 5 | EXP41_.EXP = A<4> & A<5> # !A<4> & A<3> # A<5> & !A<2> # A<5> & !A<1> # A<3> & A<1> MACROCELL | 6 | 15 | EXP42_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 14 INPUTS | 9 | UDS | LDS | AUTO_CONFIG_Z2_DONE<0> | A<2> | A<1> | A<4> | A<3> | AUTO_CONFIG_Z2_DONE<1> | A<5> INPUTMC | 2 | 8 | 0 | 0 | 8 INPUTP | 7 | 155 | 157 | 101 | 107 | 97 | 99 | 91 EXPORTS | 1 | 6 | 14 EQ | 7 | EXP42_.EXP = UDS & LDS # AUTO_CONFIG_Z2_DONE<0> & !A<2> & !A<1> # A<4> & !A<3> & !A<1> # AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<4> & !A<1> # !AUTO_CONFIG_Z2_DONE<0> & !A<4> & !A<5> & A<2> & A<1> MACROCELL | 6 | 16 | EXP43_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 17 INPUTS | 9 | RW | RESET | LAN_ACCESS | UDS | FCS | DQ_DATA<8> | LDS | DS1 | DS0 INPUTMC | 2 | 11 | 2 | 10 | 15 INPUTP | 7 | 158 | 263 | 155 | 147 | 157 | 148 | 170 EXPORTS | 1 | 6 | 17 EQ | 8 | EXP43_.EXP = !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<8> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<8> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<8> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<8> MACROCELL | 7 | 3 | EXP44_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 2 INPUTS | 11 | RW | RESET | D<14>.PIN | FCS | LAN_ACCESS | UDS | DQ_DATA<14> | LDS | DS1 | DS0 | LAN_WRH_OBUF.EXP INPUTMC | 3 | 11 | 2 | 7 | 11 | 7 | 4 INPUTP | 8 | 158 | 263 | 81 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 7 | 2 IMPORTS | 1 | 7 | 4 EQ | 12 | EXP44_.EXP = RW & RESET & D<14>.PIN # RESET & D<14>.PIN & FCS # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<14> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<14> # RESET & D<14>.PIN & UDS & LDS & DS1 & DS0 ;Imported pterms FB8_5 # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<14> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<14> MACROCELL | 7 | 5 | EXP45_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 6 INPUTS | 9 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DS1 | LAN_SM_FSM_FFd4 | DS0 | RW | UDS | LDS INPUTMC | 4 | 14 | 6 | 14 | 15 | 14 | 4 | 7 | 6 INPUTP | 5 | 148 | 170 | 158 | 155 | 157 EXPORTS | 1 | 7 | 6 EQ | 10 | EXP45_.EXP = LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # !DS1 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # !DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # RW & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # RW & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 7 | 12 | EXP46_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 11 INPUTS | 10 | DQ_SWAP | UDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | D<6>.PIN | LDS | D<14>.PIN | A<14>.PIN | DQ_DATA<4>.EXP INPUTMC | 5 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 15 | 7 | 13 INPUTP | 5 | 155 | 26 | 157 | 81 | 125 EXPORTS | 1 | 7 | 11 IMPORTS | 1 | 7 | 13 EQ | 13 | EXP46_.EXP = DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<6>.PIN # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<6>.PIN # !DQ_SWAP & D<14>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<14>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & A<14>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB8_14 # !DQ_SWAP & UDS & LDS & A<22>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 7 | 14 | EXP47_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 13 INPUTS | 12 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd1 | DQ_DATA<4> | DQ_SWAP | A<20>.PIN | LAN_SM_FSM_FFd4 | A<12>.PIN | D<12>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS | EXP48_.EXP INPUTMC | 7 | 14 | 6 | 14 | 4 | 7 | 13 | 11 | 15 | 7 | 6 | 14 | 15 | 7 | 15 INPUTP | 5 | 167 | 115 | 78 | 155 | 157 EXPORTS | 1 | 7 | 13 IMPORTS | 1 | 7 | 15 EQ | 18 | EXP47_.EXP = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<4> # DQ_SWAP & A<20>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<12>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<12>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & D<12>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB8_16 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<4>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<4>.PIN # DQ_SWAP & UDS & LDS & A<20>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<12>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 7 | 15 | EXP48_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 14 INPUTS | 9 | DQ_SWAP | UDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | D<4>.PIN | LDS | A<20>.PIN | A<12>.PIN INPUTMC | 4 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 15 INPUTP | 5 | 155 | 38 | 157 | 167 | 115 EXPORTS | 1 | 7 | 14 EQ | 8 | EXP48_.EXP = !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<4>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<4>.PIN # DQ_SWAP & UDS & LDS & A<20>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<12>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 7 | 16 | EXP49_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 17 INPUTS | 9 | DQ_SWAP | UDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | D<4>.PIN | LDS | A<12>.PIN | A<20>.PIN INPUTMC | 4 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 15 INPUTP | 5 | 155 | 38 | 157 | 115 | 167 EXPORTS | 1 | 7 | 17 EQ | 8 | EXP49_.EXP = DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<4>.PIN # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<4>.PIN # DQ_SWAP & A<12>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<20>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 7 | 17 | EXP50_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 0 INPUTS | 12 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd1 | DQ_DATA<12> | DQ_SWAP | A<12>.PIN | LAN_SM_FSM_FFd4 | A<20>.PIN | D<12>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS | EXP49_.EXP INPUTMC | 7 | 14 | 6 | 14 | 4 | 7 | 0 | 11 | 15 | 7 | 6 | 14 | 15 | 7 | 16 INPUTP | 5 | 115 | 167 | 78 | 155 | 157 EXPORTS | 1 | 7 | 0 IMPORTS | 1 | 7 | 16 EQ | 18 | EXP50_.EXP = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<12> # DQ_SWAP & A<12>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<20>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & D<12>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<12>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB8_17 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<4>.PIN # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<4>.PIN # DQ_SWAP & A<12>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<20>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 8 | 1 | EXP51_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 8 | 2 INPUTS | 9 | A<6> | AS_D0 | AUTOCONFIG_Z2_ACCESS | UDS | LDS | A<4> | A<3> | A<1> | AUTO_CONFIG_Z2_DONE<0>.EXP INPUTMC | 3 | 4 | 8 | 4 | 12 | 8 | 0 INPUTP | 6 | 98 | 155 | 157 | 97 | 99 | 107 EXPORTS | 1 | 8 | 2 IMPORTS | 1 | 8 | 0 EQ | 7 | EXP51_.EXP = A<6> # AS_D0 # !AUTOCONFIG_Z2_ACCESS # UDS & LDS # A<4> & !A<3> & !A<1> ;Imported pterms FB9_1 # !A<2> & A<3> & A<1> MACROCELL | 9 | 3 | EXP52_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 2 INPUTS | 10 | RW | RESET | LAN_ACCESS | UDS | FCS | DQ_DATA<0> | LDS | DS1 | DS0 | D<0>.PIN INPUTMC | 2 | 11 | 2 | 10 | 17 INPUTP | 8 | 158 | 263 | 155 | 147 | 157 | 148 | 170 | 4 EXPORTS | 1 | 9 | 2 EQ | 9 | EXP52_.EXP = !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<0> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<0> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<0> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<0> # RESET & UDS & LDS & DS1 & DS0 & D<0>.PIN MACROCELL | 9 | 6 | EXP53_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 5 INPUTS | 11 | RW | RESET | D<2>.PIN | LAN_ACCESS | FCS | UDS | DQ_DATA<2> | LDS | DS1 | DS0 | DQ_5_IOBUFE.EXP INPUTMC | 3 | 11 | 2 | 15 | 16 | 9 | 7 INPUTP | 8 | 158 | 263 | 71 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 9 | 5 IMPORTS | 1 | 9 | 7 EQ | 13 | EXP53_.EXP = RW & RESET & D<2>.PIN # RESET & !LAN_ACCESS & D<2>.PIN # RESET & FCS & D<2>.PIN # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<2> # RESET & UDS & LDS & DS1 & DS0 & D<2>.PIN ;Imported pterms FB10_8 # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<2> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<2> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<2> MACROCELL | 9 | 8 | EXP54_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 7 INPUTS | 11 | RW | RESET | D<5>.PIN | FCS | LAN_ACCESS | UDS | DQ_DATA<5> | LDS | DS1 | DS0 | _19_.EXP INPUTMC | 3 | 11 | 2 | 12 | 10 | 9 | 9 INPUTP | 8 | 158 | 263 | 37 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 9 | 7 IMPORTS | 1 | 9 | 9 EQ | 12 | EXP54_.EXP = RW & RESET & D<5>.PIN # RESET & FCS & D<5>.PIN # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<5> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<5> # RESET & UDS & LDS & DS1 & DS0 & D<5>.PIN ;Imported pterms FB10_10 # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<5> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<5> MACROCELL | 9 | 12 | EXP55_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 11 INPUTS | 11 | RW | RESET | D<6>.PIN | LAN_ACCESS | FCS | UDS | DQ_DATA<6> | LDS | DS1 | DS0 | _18_.EXP INPUTMC | 3 | 11 | 2 | 7 | 8 | 9 | 13 INPUTP | 8 | 158 | 263 | 26 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 9 | 11 IMPORTS | 1 | 9 | 13 EQ | 13 | EXP55_.EXP = RW & RESET & D<6>.PIN # RESET & !LAN_ACCESS & D<6>.PIN # RESET & FCS & D<6>.PIN # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<6> # RESET & UDS & LDS & DS1 & DS0 & D<6>.PIN ;Imported pterms FB10_14 # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<6> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<6> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<6> MACROCELL | 9 | 14 | EXP56_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 15 INPUTS | 8 | RW | RESET | LAN_ACCESS | LDS | FCS | DQ_DATA<10> | DS1 | DS0 INPUTMC | 2 | 11 | 2 | 15 | 15 INPUTP | 6 | 158 | 263 | 157 | 147 | 148 | 170 EXPORTS | 1 | 9 | 15 EQ | 6 | EXP56_.EXP = !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<10> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<10> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<10> MACROCELL | 9 | 15 | EXP57_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 16 INPUTS | 11 | RW | RESET | D<10>.PIN | LAN_ACCESS | FCS | UDS | DQ_DATA<10> | LDS | DS1 | DS0 | EXP56_.EXP INPUTMC | 3 | 11 | 2 | 15 | 15 | 9 | 14 INPUTP | 8 | 158 | 263 | 74 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 9 | 16 IMPORTS | 1 | 9 | 14 EQ | 13 | EXP57_.EXP = RW & RESET & D<10>.PIN # RESET & !LAN_ACCESS & D<10>.PIN # RESET & D<10>.PIN & FCS # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<10> # RESET & D<10>.PIN & UDS & LDS & DS1 & DS0 ;Imported pterms FB10_15 # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<10> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<10> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<10> MACROCELL | 9 | 17 | EXP58_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 0 INPUTS | 11 | RW | RESET | D<4>.PIN | LAN_ACCESS | FCS | UDS | DQ_DATA<4> | LDS | DS1 | DS0 | DQ_10_IOBUFE.EXP INPUTMC | 3 | 11 | 2 | 7 | 13 | 9 | 16 INPUTP | 8 | 158 | 263 | 38 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 9 | 0 IMPORTS | 1 | 9 | 16 EQ | 13 | EXP58_.EXP = RW & RESET & D<4>.PIN # RESET & !LAN_ACCESS & D<4>.PIN # RESET & FCS & D<4>.PIN # !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<4> # RESET & UDS & LDS & DS1 & DS0 & D<4>.PIN ;Imported pterms FB10_17 # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<4> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<4> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<4> MACROCELL | 10 | 14 | EXP59_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 10 | 15 INPUTS | 12 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd1 | DQ_DATA<8> | DQ_SWAP | A<8>.PIN | LAN_SM_FSM_FFd4 | A<16>.PIN | UDS | LAN_SM_FSM_FFd2 | D<0>.PIN | LDS | ROM_B_0_OBUF.EXP INPUTMC | 7 | 14 | 6 | 14 | 4 | 10 | 15 | 11 | 15 | 7 | 6 | 14 | 15 | 10 | 13 INPUTP | 5 | 106 | 175 | 155 | 4 | 157 EXPORTS | 1 | 10 | 15 IMPORTS | 1 | 10 | 13 EQ | 18 | EXP59_.EXP = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<8> # DQ_SWAP & A<8>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<16>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<0>.PIN # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<0>.PIN ;Imported pterms FB11_14 # !DQ_SWAP & D<8>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<8>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & A<8>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<16>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 11 | 0 | EXP60_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 1 INPUTS | 7 | D<13>.PIN | LAN_BASEADR<13> | AS_D1 | D<14>.PIN | LAN_BASEADR<14> | D<15>.PIN | LAN_BASEADR<15> INPUTMC | 4 | 0 | 17 | 4 | 7 | 3 | 2 | 0 | 15 INPUTP | 3 | 80 | 81 | 89 EXPORTS | 1 | 11 | 1 EQ | 5 | EXP60_.EXP = D<13>.PIN & !LAN_BASEADR<13> & AS_D1 # !D<13>.PIN & LAN_BASEADR<13> & AS_D1 # D<14>.PIN & !LAN_BASEADR<14> & AS_D1 # D<15>.PIN & !LAN_BASEADR<15> & AS_D1 # !D<15>.PIN & LAN_BASEADR<15> & AS_D1 MACROCELL | 11 | 1 | EXP61_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 2 INPUTS | 8 | D<8>.PIN | LAN_BASEADR<8> | AS_D1 | D<9>.PIN | LAN_BASEADR<9> | D<10>.PIN | LAN_BASEADR<10> | EXP60_.EXP INPUTMC | 5 | 0 | 12 | 4 | 7 | 0 | 10 | 3 | 8 | 11 | 0 INPUTP | 3 | 32 | 73 | 74 EXPORTS | 1 | 11 | 2 IMPORTS | 1 | 11 | 0 EQ | 11 | EXP61_.EXP = D<8>.PIN & !LAN_BASEADR<8> & AS_D1 # !D<8>.PIN & LAN_BASEADR<8> & AS_D1 # D<9>.PIN & !LAN_BASEADR<9> & AS_D1 # !D<9>.PIN & LAN_BASEADR<9> & AS_D1 # D<10>.PIN & !LAN_BASEADR<10> & AS_D1 ;Imported pterms FB12_1 # D<13>.PIN & !LAN_BASEADR<13> & AS_D1 # !D<13>.PIN & LAN_BASEADR<13> & AS_D1 # D<14>.PIN & !LAN_BASEADR<14> & AS_D1 # D<15>.PIN & !LAN_BASEADR<15> & AS_D1 # !D<15>.PIN & LAN_BASEADR<15> & AS_D1 MACROCELL | 11 | 3 | EXP62_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 2 INPUTS | 8 | D<10>.PIN | LAN_BASEADR<10> | AS_D1 | D<11>.PIN | LAN_BASEADR<11> | D<12>.PIN | LAN_BASEADR<12> | DQ_15_IOBUFE.EXP INPUTMC | 5 | 3 | 8 | 4 | 7 | 3 | 6 | 3 | 3 | 11 | 4 INPUTP | 3 | 74 | 77 | 78 EXPORTS | 1 | 11 | 2 IMPORTS | 1 | 11 | 4 EQ | 7 | EXP62_.EXP = !D<10>.PIN & LAN_BASEADR<10> & AS_D1 # D<11>.PIN & !LAN_BASEADR<11> & AS_D1 # !D<11>.PIN & LAN_BASEADR<11> & AS_D1 # D<12>.PIN & !LAN_BASEADR<12> & AS_D1 # !D<12>.PIN & LAN_BASEADR<12> & AS_D1 ;Imported pterms FB12_5 # !D<14>.PIN & LAN_BASEADR<14> & AS_D1 MACROCELL | 11 | 5 | EXP63_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 4 INPUTS | 10 | RW | RESET | LAN_ACCESS | UDS | FCS | DQ_DATA<15> | LDS | DS1 | DS0 | D<15>.PIN INPUTMC | 2 | 11 | 2 | 12 | 17 INPUTP | 8 | 158 | 263 | 155 | 147 | 157 | 148 | 170 | 89 EXPORTS | 1 | 11 | 4 EQ | 9 | EXP63_.EXP = !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<15> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<15> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<15> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<15> # RESET & D<15>.PIN & UDS & LDS & DS1 & DS0 MACROCELL | 11 | 10 | EXP64_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 9 INPUTS | 10 | RW | RESET | LAN_ACCESS | UDS | FCS | DQ_DATA<11> | LDS | DS1 | DS0 | D<11>.PIN INPUTMC | 2 | 11 | 2 | 5 | 15 INPUTP | 8 | 158 | 263 | 155 | 147 | 157 | 148 | 170 | 77 EXPORTS | 1 | 11 | 9 EQ | 9 | EXP64_.EXP = !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<11> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<11> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<11> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<11> # RESET & D<11>.PIN & UDS & LDS & DS1 & DS0 MACROCELL | 11 | 12 | EXP65_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 11 INPUTS | 10 | RW | RESET | LAN_ACCESS | UDS | FCS | DQ_DATA<9> | LDS | DS1 | DS0 | D<9>.PIN INPUTMC | 2 | 11 | 2 | 14 | 9 INPUTP | 8 | 158 | 263 | 155 | 147 | 157 | 148 | 170 | 73 EXPORTS | 1 | 11 | 11 EQ | 9 | EXP65_.EXP = !RW & RESET & LAN_ACCESS & !UDS & !FCS & DQ_DATA<9> # !RW & RESET & LAN_ACCESS & !LDS & !FCS & DQ_DATA<9> # !RW & RESET & LAN_ACCESS & !DS1 & !FCS & DQ_DATA<9> # !RW & RESET & LAN_ACCESS & !DS0 & !FCS & DQ_DATA<9> # RESET & D<9>.PIN & UDS & LDS & DS1 & DS0 MACROCELL | 11 | 13 | EXP66_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 14 INPUTS | 7 | D<12>.PIN | LAN_BASEADR<12> | AS_D1 | D<13>.PIN | LAN_BASEADR<13> | D<15>.PIN | LAN_BASEADR<15> INPUTMC | 4 | 3 | 3 | 4 | 7 | 0 | 17 | 0 | 15 INPUTP | 3 | 78 | 80 | 89 EXPORTS | 1 | 11 | 14 EQ | 5 | EXP66_.EXP = D<12>.PIN & !LAN_BASEADR<12> & AS_D1 # !D<12>.PIN & LAN_BASEADR<12> & AS_D1 # D<13>.PIN & !LAN_BASEADR<13> & AS_D1 # !D<13>.PIN & LAN_BASEADR<13> & AS_D1 # D<15>.PIN & !LAN_BASEADR<15> & AS_D1 MACROCELL | 11 | 14 | EXP67_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 15 INPUTS | 8 | DQ_SWAP | AS_D1 | A<13>.PIN | D<8>.PIN | LAN_BASEADR<8> | D<9>.PIN | LAN_BASEADR<9> | EXP66_.EXP INPUTMC | 5 | 11 | 15 | 4 | 7 | 0 | 12 | 0 | 10 | 11 | 13 INPUTP | 3 | 123 | 32 | 73 EXPORTS | 1 | 11 | 15 IMPORTS | 1 | 11 | 13 EQ | 11 | EXP67_.EXP = DQ_SWAP & !AS_D1 # !A<13>.PIN & AS_D1 # D<8>.PIN & !LAN_BASEADR<8> & AS_D1 # !D<8>.PIN & LAN_BASEADR<8> & AS_D1 # D<9>.PIN & !LAN_BASEADR<9> & AS_D1 ;Imported pterms FB12_14 # D<12>.PIN & !LAN_BASEADR<12> & AS_D1 # !D<12>.PIN & LAN_BASEADR<12> & AS_D1 # D<13>.PIN & !LAN_BASEADR<13> & AS_D1 # !D<13>.PIN & LAN_BASEADR<13> & AS_D1 # D<15>.PIN & !LAN_BASEADR<15> & AS_D1 MACROCELL | 11 | 16 | EXP68_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 15 INPUTS | 8 | D<9>.PIN | LAN_BASEADR<9> | AS_D1 | D<10>.PIN | LAN_BASEADR<10> | D<11>.PIN | LAN_BASEADR<11> | EXP69_.EXP INPUTMC | 5 | 0 | 10 | 4 | 7 | 3 | 8 | 3 | 6 | 11 | 17 INPUTP | 3 | 73 | 74 | 77 EXPORTS | 1 | 11 | 15 IMPORTS | 1 | 11 | 17 EQ | 9 | EXP68_.EXP = !D<9>.PIN & LAN_BASEADR<9> & AS_D1 # D<10>.PIN & !LAN_BASEADR<10> & AS_D1 # !D<10>.PIN & LAN_BASEADR<10> & AS_D1 # D<11>.PIN & !LAN_BASEADR<11> & AS_D1 # !D<11>.PIN & LAN_BASEADR<11> & AS_D1 ;Imported pterms FB12_18 # D<14>.PIN & !LAN_BASEADR<14> & AS_D1 # !D<14>.PIN & LAN_BASEADR<14> & AS_D1 # !D<15>.PIN & LAN_BASEADR<15> & AS_D1 MACROCELL | 11 | 17 | EXP69_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 16 INPUTS | 5 | D<14>.PIN | LAN_BASEADR<14> | AS_D1 | D<15>.PIN | LAN_BASEADR<15> INPUTMC | 3 | 3 | 2 | 4 | 7 | 0 | 15 INPUTP | 2 | 81 | 89 EXPORTS | 1 | 11 | 16 EQ | 3 | EXP69_.EXP = D<14>.PIN & !LAN_BASEADR<14> & AS_D1 # !D<14>.PIN & LAN_BASEADR<14> & AS_D1 # !D<15>.PIN & LAN_BASEADR<15> & AS_D1 MACROCELL | 12 | 0 | EXP70_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 17 INPUTS | 12 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd1 | DQ_DATA<15> | DQ_SWAP | A<15>.PIN | LAN_SM_FSM_FFd4 | A<23>.PIN | D<15>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS | CP_RD_OBUF.EXP INPUTMC | 7 | 14 | 6 | 14 | 4 | 12 | 17 | 11 | 15 | 7 | 6 | 14 | 15 | 12 | 1 INPUTP | 5 | 139 | 161 | 89 | 155 | 157 EXPORTS | 1 | 12 | 17 IMPORTS | 1 | 12 | 1 EQ | 18 | EXP70_.EXP = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<15> # DQ_SWAP & A<15>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<23>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & D<15>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<15>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB13_2 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<7>.PIN # DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<7>.PIN # DQ_SWAP & A<15>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<23>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 12 | 5 | EXP71_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 6 INPUTS | 12 | DQ_SWAP | A<23>.PIN | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | A<15>.PIN | D<15>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS | D<7>.PIN | LAN_INT_ENABLE.EXP INPUTMC | 6 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 4 | 14 | 15 | 12 | 4 INPUTP | 6 | 161 | 139 | 89 | 155 | 157 | 29 EXPORTS | 1 | 12 | 6 IMPORTS | 1 | 12 | 4 EQ | 17 | EXP71_.EXP = DQ_SWAP & A<23>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<15>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<15>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & D<15>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<7>.PIN ;Imported pterms FB13_5 # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<7>.PIN # DQ_SWAP & UDS & LDS & A<23>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<15>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 12 | 8 | EXP72_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 9 INPUTS | 10 | DQ_SWAP | D<13>.PIN | LDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | UDS | D<5>.PIN | A<21>.PIN | A<13>.PIN INPUTMC | 4 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 15 INPUTP | 6 | 80 | 157 | 155 | 37 | 163 | 123 EXPORTS | 1 | 12 | 9 EQ | 10 | EXP72_.EXP = DQ_SWAP & D<13>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<5>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<5>.PIN # DQ_SWAP & UDS & LDS & A<21>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<13>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 12 | 9 | EXP73_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 10 INPUTS | 11 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | DQ_DATA<5> | LAN_SM_FSM_FFd1 | DQ_SWAP | A<21>.PIN | A<13>.PIN | D<13>.PIN | UDS | LAN_SM_FSM_FFd2 | EXP72_.EXP INPUTMC | 7 | 14 | 6 | 7 | 6 | 12 | 10 | 14 | 4 | 11 | 15 | 14 | 15 | 12 | 8 INPUTP | 4 | 163 | 123 | 80 | 155 EXPORTS | 1 | 12 | 10 IMPORTS | 1 | 12 | 8 EQ | 19 | EXP73_.EXP = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<5> # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<5> # DQ_SWAP & A<21>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<13>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<13>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB13_9 # DQ_SWAP & D<13>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<5>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<5>.PIN # DQ_SWAP & UDS & LDS & A<21>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<13>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 12 | 12 | EXP74_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 11 INPUTS | 10 | DQ_SWAP | D<9>.PIN | UDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LDS | D<1>.PIN | A<17>.PIN | LAN_WRL_OBUF.EXP INPUTMC | 5 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 15 | 12 | 13 INPUTP | 5 | 73 | 155 | 157 | 30 | 172 EXPORTS | 1 | 12 | 11 IMPORTS | 1 | 12 | 13 EQ | 13 | EXP74_.EXP = DQ_SWAP & D<9>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & D<9>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<1>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<1>.PIN # DQ_SWAP & UDS & LDS & A<17>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB13_14 # !DQ_SWAP & A<9>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 12 | 14 | EXP75_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 15 INPUTS | 11 | DQ_SWAP | A<13>.PIN | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | A<21>.PIN | UDS | LAN_SM_FSM_FFd2 | D<5>.PIN | D<13>.PIN | LDS INPUTMC | 5 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 4 | 14 | 15 INPUTP | 6 | 123 | 163 | 155 | 37 | 80 | 157 EXPORTS | 1 | 12 | 15 EQ | 10 | EXP75_.EXP = DQ_SWAP & A<13>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<21>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<5>.PIN # !DQ_SWAP & D<13>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<13>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 14 | 0 | EXP76_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 14 | 17 INPUTS | 8 | AS_D0 | A<4> | A<5> | A<2> | UDS | LDS | A<1> | EXP77_.EXP INPUTMC | 2 | 4 | 8 | 14 | 1 INPUTP | 6 | 97 | 91 | 101 | 155 | 157 | 107 EXPORTS | 1 | 14 | 17 IMPORTS | 1 | 14 | 1 EQ | 14 | EXP76_.EXP = AS_D0 # A<4> & A<5> # A<5> & !A<2> # UDS & LDS # !A<4> & !A<2> & A<1> ;Imported pterms FB15_2 # A<4> & !A<2> & !A<3> # A<4> & !A<3> & A<1> # A<2> & A<3> & !A<1> # AUTO_CONFIG_Z2_DONE<0> & !A<4> & !A<5> & A<1> # !A<4> & !A<5> & A<2> & A<3> ;Imported pterms FB15_3 # AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<5> & !A<3> MACROCELL | 14 | 1 | EXP77_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 14 | 0 INPUTS | 7 | A<4> | A<2> | A<3> | A<1> | AUTO_CONFIG_Z2_DONE<0> | A<5> | SHUT_UP_Z2<0>.EXP INPUTMC | 2 | 8 | 0 | 14 | 2 INPUTP | 5 | 97 | 101 | 99 | 107 | 91 EXPORTS | 1 | 14 | 0 IMPORTS | 1 | 14 | 2 EQ | 8 | EXP77_.EXP = A<4> & !A<2> & !A<3> # A<4> & !A<3> & A<1> # A<2> & A<3> & !A<1> # AUTO_CONFIG_Z2_DONE<0> & !A<4> & !A<5> & A<1> # !A<4> & !A<5> & A<2> & A<3> ;Imported pterms FB15_3 # AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<5> & !A<3> MACROCELL | 14 | 7 | EXP78_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 14 | 8 INPUTS | 6 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd2 | DS1 | DS0 INPUTMC | 4 | 7 | 6 | 14 | 4 | 14 | 6 | 14 | 15 INPUTP | 2 | 148 | 170 EXPORTS | 1 | 14 | 8 EQ | 8 | EXP78_.EXP = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DS1 & DS0 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 # DS1 & DS0 & !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd1 MACROCELL | 14 | 10 | EXP79_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 14 | 9 INPUTS | 10 | DQ_SWAP | LDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | D<1>.PIN | D<9>.PIN | UDS | A<9>.PIN | A<17>.PIN INPUTMC | 4 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 15 INPUTP | 6 | 157 | 30 | 73 | 155 | 108 | 172 EXPORTS | 1 | 14 | 9 EQ | 10 | EXP79_.EXP = DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<1>.PIN # !DQ_SWAP & D<9>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<9>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # DQ_SWAP & A<9>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & UDS & LDS & A<17>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 15 | 0 | EXP80_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 15 | 17 INPUTS | 10 | DQ_SWAP | D<10>.PIN | LDS | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | UDS | D<2>.PIN | A<18>.PIN | A<10>.PIN INPUTMC | 4 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 15 INPUTP | 6 | 74 | 157 | 155 | 71 | 171 | 112 EXPORTS | 1 | 15 | 17 EQ | 10 | EXP80_.EXP = DQ_SWAP & D<10>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<2>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<2>.PIN # DQ_SWAP & UDS & LDS & A<18>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<10>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 15 | 14 | EXP81_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 15 | 15 INPUTS | 12 | DQ_SWAP | A<10>.PIN | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | A<18>.PIN | UDS | LAN_SM_FSM_FFd2 | D<2>.PIN | D<10>.PIN | LDS | Z3_DATA<16>.EXP INPUTMC | 6 | 11 | 15 | 14 | 6 | 7 | 6 | 14 | 4 | 14 | 15 | 15 | 13 INPUTP | 6 | 112 | 171 | 155 | 71 | 74 | 157 EXPORTS | 1 | 15 | 15 IMPORTS | 1 | 15 | 13 EQ | 13 | EXP81_.EXP = DQ_SWAP & A<10>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<18>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<2>.PIN # !DQ_SWAP & D<10>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & D<10>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB16_14 # !DQ_SWAP & UDS & LDS & A<18>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 MACROCELL | 15 | 17 | EXP82_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 15 | 16 INPUTS | 11 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | DQ_DATA<2> | LAN_SM_FSM_FFd1 | DQ_SWAP | A<18>.PIN | A<10>.PIN | D<10>.PIN | UDS | LAN_SM_FSM_FFd2 | EXP80_.EXP INPUTMC | 7 | 14 | 6 | 7 | 6 | 15 | 16 | 14 | 4 | 11 | 15 | 14 | 15 | 15 | 0 INPUTP | 4 | 171 | 112 | 74 | 155 EXPORTS | 1 | 15 | 16 IMPORTS | 1 | 15 | 0 EQ | 19 | EXP82_.EXP = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<2> # !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<2> # DQ_SWAP & A<18>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # !DQ_SWAP & A<10>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 # DQ_SWAP & D<10>.PIN & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB16_1 # DQ_SWAP & D<10>.PIN & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<2>.PIN # !DQ_SWAP & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & D<2>.PIN # DQ_SWAP & UDS & LDS & A<18>.PIN & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 # !DQ_SWAP & A<10>.PIN & UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 PIN | AS | 64 | 0 | N/A | 152 | 41 | 3 | 1 | 4 | 13 | 4 | 9 | 4 | 15 | 6 | 1 | 6 | 4 | 6 | 11 | 1 | 13 | 4 | 8 | 1 | 10 | 0 | 5 | 0 | 4 | 1 | 8 | 1 | 12 | 1 | 15 | 4 | 11 | 4 | 7 | 4 | 12 | 5 | 17 | 12 | 1 | 10 | 15 | 0 | 16 | 2 | 1 | 4 | 0 | 13 | 13 | 4 | 1 | 6 | 5 | 4 | 10 | 0 | 3 | 0 | 6 | 1 | 14 | 3 | 0 | 4 | 5 | 4 | 14 | 4 | 16 | 4 | 17 | 6 | 0 | 6 | 2 | 6 | 3 | 6 | 10 | 6 | 12 PIN | CLK_EXT | 4096 | 0 | N/A | 57 | 133 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 11 | 15 | 11 | 2 | 8 | 0 | 0 | 8 | 8 | 6 | 13 | 17 | 8 | 3 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 8 | 4 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 13 | 12 | 8 | 5 | 11 | 6 | 11 | 8 | 8 | 7 | 8 | 8 | 8 | 9 | 8 | 11 | 8 | 12 | 8 | 14 | 13 | 8 | 13 | 7 | 8 | 15 | 8 | 17 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 10 | 0 | 12 | 2 | 14 | 6 | 7 | 6 | 14 | 15 | 14 | 4 | 4 | 8 | 4 | 12 | 13 | 3 | 5 | 17 | 13 | 11 | 13 | 9 | 2 | 14 | 2 | 12 | 4 | 6 | 4 | 7 | 10 | 17 | 15 | 15 | 5 | 15 | 7 | 0 | 12 | 15 | 7 | 11 | 12 | 17 | 12 | 11 | 15 | 16 | 5 | 12 | 7 | 13 | 12 | 10 | 7 | 8 | 12 | 6 | 10 | 15 | 14 | 9 | 13 | 1 | 14 | 2 | 0 | 3 | 3 | 0 | 14 | 17 | 1 | 0 | 6 | 14 | 8 | 2 | 13 | 6 | 4 | 5 | 2 | 15 | 13 | 5 | 12 | 4 | 13 | 4 | 14 | 5 | 14 | 8 | 7 | 10 | 12 | 16 | 13 | 0 | 14 | 12 | 4 | 0 | 4 | 1 | 6 | 12 PIN | RW | 64 | 0 | N/A | 158 | 122 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 8 | 3 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 9 | 15 | 11 | 9 | 9 | 1 | 7 | 5 | 6 | 17 | 11 | 11 | 3 | 1 | 4 | 13 | 4 | 12 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 12 | 1 | 16 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 0 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 9 | 9 | 10 | 7 | 6 | 12 | 3 | 4 | 6 | 14 | 2 | 0 | 3 | 3 | 0 | 13 | 6 | 4 | 5 | 12 | 4 | 14 | 4 | 13 | 0 | 13 | 15 | 13 | 16 | 6 | 5 | 4 | 10 | 1 | 8 | 1 | 13 | 1 | 15 | 4 | 0 | 4 | 8 | 4 | 14 | 4 | 15 | 4 | 17 | 6 | 0 | 6 | 1 | 6 | 3 | 6 | 10 | 6 | 12 | 6 | 16 | 7 | 2 | 7 | 3 | 7 | 4 | 9 | 0 | 9 | 5 | 9 | 7 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 11 | 5 | 11 | 6 | 11 | 8 | 11 | 10 | 11 | 12 PIN | FCS | 64 | 0 | N/A | 147 | 104 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 11 | 15 | 11 | 2 | 8 | 6 | 8 | 4 | 8 | 5 | 11 | 6 | 11 | 8 | 8 | 7 | 8 | 8 | 8 | 9 | 8 | 11 | 8 | 12 | 8 | 14 | 13 | 8 | 13 | 7 | 8 | 15 | 8 | 17 | 9 | 15 | 11 | 9 | 9 | 1 | 7 | 3 | 6 | 17 | 11 | 11 | 3 | 1 | 4 | 13 | 4 | 12 | 4 | 15 | 6 | 1 | 6 | 3 | 6 | 11 | 1 | 13 | 4 | 8 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 8 | 1 | 12 | 1 | 15 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 0 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 9 | 9 | 10 | 4 | 7 | 6 | 12 | 7 | 4 | 12 | 13 | 7 | 9 | 13 | 13 | 13 | 2 | 14 | 11 | 6 | 5 | 4 | 9 | 0 | 3 | 0 | 6 | 1 | 10 | 1 | 14 | 3 | 0 | 4 | 0 | 4 | 10 | 4 | 14 | 4 | 16 | 4 | 17 | 6 | 0 | 6 | 2 | 6 | 4 | 6 | 10 | 6 | 16 | 7 | 2 | 9 | 0 | 9 | 5 | 9 | 7 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 11 | 5 | 11 | 10 | 11 | 12 PIN | RESET | 64 | 0 | N/A | 263 | 126 | 11 | 15 | 11 | 2 | 8 | 0 | 0 | 8 | 8 | 6 | 13 | 17 | 8 | 3 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 8 | 4 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 13 | 12 | 8 | 5 | 11 | 6 | 11 | 8 | 8 | 7 | 8 | 8 | 8 | 9 | 8 | 11 | 8 | 12 | 8 | 14 | 13 | 8 | 13 | 7 | 8 | 15 | 8 | 17 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 0 | 6 | 17 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 7 | 9 | 9 | 9 | 10 | 4 | 8 | 4 | 12 | 13 | 3 | 5 | 17 | 13 | 11 | 13 | 9 | 2 | 14 | 2 | 12 | 4 | 6 | 4 | 7 | 13 | 1 | 14 | 2 | 0 | 3 | 3 | 0 | 14 | 17 | 1 | 0 | 6 | 14 | 8 | 2 | 13 | 6 | 4 | 5 | 2 | 15 | 13 | 5 | 13 | 4 | 13 | 0 | 5 | 5 | 5 | 7 | 5 | 2 | 5 | 4 | 3 | 11 | 6 | 5 | 3 | 13 | 1 | 2 | 5 | 9 | 5 | 13 | 6 | 12 | 4 | 0 | 3 | 5 | 3 | 4 | 3 | 7 | 1 | 4 | 7 | 7 | 7 | 4 | 12 | 13 | 7 | 9 | 4 | 1 | 5 | 12 | 6 | 16 | 7 | 0 | 7 | 3 | 7 | 6 | 9 | 5 | 9 | 6 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 15 | 9 | 17 | 11 | 5 | 11 | 10 | 11 | 12 PIN | Z3 | 64 | 0 | N/A | 151 | 17 | 11 | 15 | 11 | 2 | 8 | 6 | 8 | 4 | 8 | 5 | 11 | 6 | 11 | 8 | 8 | 7 | 8 | 8 | 8 | 9 | 8 | 11 | 8 | 12 | 8 | 14 | 13 | 8 | 13 | 7 | 8 | 15 | 8 | 17 PIN | AUTOBOOT_OFF | 64 | 0 | N/A | 142 | 1 | 13 | 17 PIN | A<2> | 64 | 0 | N/A | 101 | 41 | 8 | 3 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 8 | 15 | 14 | 2 | 0 | 3 | 3 | 0 | 14 | 1 | 3 | 7 | 6 | 14 | 8 | 2 | 1 | 1 | 1 | 9 | 1 | 16 | 1 | 17 | 6 | 13 | 6 | 15 | 8 | 0 | 14 | 0 PIN | A<4> | 64 | 0 | N/A | 97 | 43 | 8 | 3 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 8 | 7 | 14 | 2 | 0 | 3 | 3 | 0 | 14 | 1 | 3 | 13 | 6 | 14 | 8 | 2 | 1 | 1 | 1 | 9 | 1 | 16 | 1 | 17 | 6 | 13 | 6 | 15 | 8 | 1 | 14 | 0 PIN | A<1> | 64 | 0 | N/A | 107 | 43 | 8 | 3 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 14 | 2 | 0 | 3 | 3 | 0 | 14 | 1 | 1 | 0 | 6 | 13 | 8 | 2 | 3 | 11 | 1 | 1 | 1 | 9 | 1 | 16 | 1 | 17 | 6 | 15 | 8 | 0 | 8 | 1 | 14 | 0 PIN | A<5> | 64 | 0 | N/A | 91 | 41 | 8 | 3 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 8 | 8 | 14 | 2 | 0 | 3 | 3 | 0 | 14 | 1 | 1 | 0 | 6 | 13 | 8 | 2 | 1 | 4 | 1 | 9 | 1 | 16 | 1 | 17 | 6 | 15 | 14 | 0 PIN | A<6> | 64 | 0 | N/A | 98 | 37 | 8 | 3 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 8 | 9 | 14 | 2 | 0 | 3 | 3 | 0 | 14 | 17 | 1 | 0 | 6 | 14 | 8 | 1 | 1 | 2 | 1 | 9 PIN | UDS | 64 | 0 | N/A | 155 | 98 | 8 | 3 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 9 | 15 | 11 | 6 | 9 | 0 | 7 | 17 | 6 | 17 | 11 | 10 | 7 | 16 | 7 | 1 | 11 | 7 | 7 | 0 | 10 | 13 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 8 | 9 | 10 | 7 | 6 | 10 | 16 | 15 | 14 | 5 | 14 | 6 | 16 | 12 | 14 | 7 | 9 | 12 | 16 | 12 | 8 | 15 | 13 | 5 | 11 | 7 | 12 | 12 | 9 | 7 | 7 | 12 | 5 | 10 | 14 | 14 | 8 | 14 | 2 | 0 | 3 | 3 | 0 | 14 | 13 | 6 | 5 | 5 | 13 | 8 | 1 | 12 | 4 | 12 | 13 | 14 | 10 | 6 | 12 | 13 | 15 | 13 | 16 | 1 | 9 | 1 | 17 | 5 | 10 | 6 | 15 | 7 | 3 | 7 | 5 | 7 | 13 | 7 | 14 | 7 | 15 | 9 | 5 | 9 | 11 | 9 | 12 | 9 | 17 | 10 | 0 | 11 | 5 | 11 | 12 | 12 | 0 | 12 | 1 | 12 | 3 | 12 | 12 | 12 | 17 | 14 | 0 | 15 | 0 | 15 | 16 | 15 | 17 PIN | LDS | 64 | 0 | N/A | 157 | 97 | 8 | 3 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 9 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 9 | 15 | 11 | 6 | 9 | 0 | 7 | 17 | 6 | 17 | 11 | 10 | 7 | 16 | 7 | 1 | 11 | 7 | 6 | 15 | 10 | 13 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 8 | 9 | 10 | 7 | 6 | 10 | 16 | 15 | 14 | 5 | 14 | 6 | 16 | 12 | 14 | 7 | 9 | 12 | 16 | 12 | 4 | 15 | 13 | 5 | 11 | 7 | 12 | 12 | 8 | 7 | 7 | 12 | 5 | 10 | 14 | 14 | 0 | 14 | 2 | 0 | 3 | 3 | 0 | 14 | 13 | 6 | 5 | 5 | 13 | 8 | 1 | 7 | 10 | 14 | 10 | 6 | 12 | 13 | 15 | 13 | 16 | 1 | 17 | 5 | 10 | 7 | 2 | 7 | 3 | 7 | 5 | 7 | 13 | 7 | 14 | 7 | 15 | 9 | 5 | 9 | 7 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 10 | 0 | 11 | 5 | 11 | 12 | 12 | 0 | 12 | 1 | 12 | 12 | 12 | 13 | 15 | 0 | 15 | 16 PIN | A<3> | 64 | 0 | N/A | 99 | 41 | 14 | 3 | 0 | 6 | 6 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 3 | 14 | 6 | 7 | 3 | 12 | 3 | 10 | 1 | 10 | 1 | 7 | 1 | 6 | 1 | 5 | 1 | 3 | 6 | 8 | 6 | 9 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 0 | 17 | 3 | 2 | 0 | 15 | 0 | 12 | 0 | 10 | 8 | 17 | 14 | 2 | 0 | 3 | 3 | 0 | 14 | 1 | 8 | 2 | 6 | 13 | 1 | 1 | 1 | 2 | 1 | 9 | 1 | 17 | 6 | 15 | 8 | 0 | 8 | 1 | 8 | 3 PIN | MTCR | 64 | 0 | N/A | 186 | 1 | 8 | 4 PIN | LAN_INT | 64 | 0 | N/A | 201 | 2 | 13 | 12 | 13 | 4 PIN | A<7> | 64 | 0 | N/A | 100 | 2 | 8 | 11 | 5 | 9 PIN | DS1 | 64 | 0 | N/A | 148 | 35 | 9 | 15 | 11 | 8 | 9 | 0 | 7 | 4 | 6 | 17 | 11 | 10 | 7 | 3 | 7 | 1 | 11 | 7 | 6 | 16 | 9 | 17 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 9 | 9 | 10 | 7 | 5 | 14 | 4 | 12 | 3 | 14 | 7 | 12 | 16 | 14 | 12 | 6 | 12 | 6 | 4 | 7 | 2 | 9 | 5 | 9 | 7 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 11 | 5 | 11 | 12 PIN | DS0 | 64 | 0 | N/A | 170 | 36 | 9 | 15 | 11 | 8 | 9 | 0 | 7 | 4 | 6 | 17 | 11 | 10 | 7 | 3 | 7 | 1 | 11 | 7 | 6 | 16 | 9 | 17 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 9 | 9 | 10 | 7 | 5 | 14 | 3 | 14 | 7 | 7 | 10 | 14 | 12 | 6 | 12 | 6 | 4 | 7 | 2 | 9 | 2 | 9 | 5 | 9 | 7 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 11 | 5 | 11 | 12 | 14 | 11 PIN | CFIN | 64 | 0 | N/A | 190 | 1 | 4 | 12 PIN | C1 | 64 | 0 | N/A | 188 | 1 | 2 | 16 PIN | C3 | 64 | 0 | N/A | 187 | 1 | 2 | 16 PIN | CP_IRQ | 64 | 0 | N/A | 59 | 1 | 5 | 1 PIN | A_LAN<10> | 536871040 | 0 | N/A | 255 PIN | A_LAN<11> | 536871040 | 0 | N/A | 256 PIN | A_LAN<12> | 536871040 | 0 | N/A | 253 PIN | A_LAN<13> | 536871040 | 0 | N/A | 254 PIN | A_LAN<2> | 536871040 | 0 | N/A | 12 PIN | A_LAN<4> | 536871040 | 0 | N/A | 20 PIN | A_LAN<5> | 536871040 | 0 | N/A | 13 PIN | A_LAN<7> | 536871040 | 0 | N/A | 21 PIN | A_LAN<8> | 536871040 | 0 | N/A | 258 PIN | A_LAN<9> | 536871040 | 0 | N/A | 262 PIN | A_LAN<0> | 536871040 | 0 | N/A | 7 PIN | A_LAN<1> | 536871040 | 0 | N/A | 6 PIN | A_LAN<3> | 536871040 | 0 | N/A | 8 PIN | A_LAN<6> | 536871040 | 0 | N/A | 22 PIN | CP_RD | 536871040 | 0 | N/A | 132 PIN | CP_WE | 536871040 | 0 | N/A | 131 PIN | IDE_R | 536871040 | 0 | N/A | 46 PIN | IDE_W | 536871040 | 0 | N/A | 47 PIN | LAN_CS | 536871040 | 0 | N/A | 240 PIN | LAN_WRH | 536871040 | 0 | N/A | 237 PIN | LAN_WRL | 536871040 | 0 | N/A | 145 PIN | ROM_OE | 536871040 | 0 | N/A | 65 PIN | LAN_RD | 536871040 | 0 | N/A | 242 PIN | SLAVE | 536871040 | 0 | N/A | 193 PIN | OVR | 536871040 | 0 | N/A | 185 PIN | INT6_OUT | 536871040 | 0 | N/A | 251 PIN | INT2_OUT | 536871040 | 0 | N/A | 60 PIN | DTACK | 536871040 | 0 | N/A | 160 PIN | CFOUT | 536871040 | 0 | N/A | 191 PIN | CP_CS | 536871040 | 0 | N/A | 63 PIN | IDE_A<0> | 536871040 | 0 | N/A | 43 PIN | IDE_A<1> | 536871040 | 0 | N/A | 45 PIN | IDE_A<2> | 536871040 | 0 | N/A | 44 PIN | IDE_CS<0> | 536871040 | 0 | N/A | 39 PIN | IDE_CS<1> | 536871040 | 0 | N/A | 41 PIN | OWN | 536871040 | 0 | N/A | 195 PIN | MTACK | 536871040 | 0 | N/A | 174 PIN | ROM_B<1> | 536871040 | 0 | N/A | 129 PIN | ROM_B<0> | 536871040 | 0 | N/A | 127 PIN | A<8> | 536870976 | 0 | N/A | 106 | 6 | 8 | 12 | 10 | 16 | 10 | 14 | 5 | 13 | 10 | 0 | 10 | 13 PIN | A<18> | 536870976 | 0 | N/A | 171 | 9 | 4 | 12 | 5 | 15 | 15 | 14 | 15 | 13 | 4 | 3 | 4 | 4 | 5 | 0 | 15 | 0 | 15 | 17 PIN | A<19> | 536870976 | 0 | N/A | 169 | 7 | 4 | 12 | 5 | 16 | 5 | 14 | 5 | 11 | 4 | 2 | 5 | 10 | 5 | 13 PIN | A<20> | 536870976 | 0 | N/A | 167 | 7 | 4 | 12 | 5 | 1 | 4 | 4 | 7 | 14 | 7 | 15 | 7 | 16 | 7 | 17 PIN | A<21> | 536870976 | 0 | N/A | 163 | 7 | 4 | 12 | 5 | 0 | 12 | 14 | 12 | 9 | 4 | 3 | 12 | 8 | 12 | 16 PIN | A<22> | 536870976 | 0 | N/A | 162 | 7 | 4 | 12 | 5 | 0 | 7 | 10 | 7 | 7 | 4 | 3 | 7 | 9 | 7 | 13 PIN | A<23> | 536870976 | 0 | N/A | 161 | 8 | 4 | 12 | 5 | 1 | 12 | 4 | 12 | 5 | 12 | 3 | 4 | 4 | 12 | 0 | 12 | 1 PIN | A<9> | 536870976 | 0 | N/A | 108 | 7 | 8 | 14 | 12 | 10 | 14 | 8 | 5 | 5 | 0 | 11 | 12 | 13 | 14 | 10 PIN | A<10> | 536870976 | 0 | N/A | 112 | 7 | 13 | 8 | 15 | 14 | 15 | 0 | 5 | 7 | 0 | 14 | 15 | 16 | 15 | 17 PIN | A<11> | 536870976 | 0 | N/A | 114 | 7 | 13 | 7 | 5 | 14 | 5 | 11 | 5 | 2 | 0 | 13 | 5 | 10 | 5 | 13 PIN | A<12> | 536870976 | 0 | N/A | 115 | 7 | 8 | 5 | 0 | 7 | 5 | 4 | 7 | 14 | 7 | 15 | 7 | 16 | 7 | 17 PIN | A<13> | 536870976 | 0 | N/A | 123 | 7 | 11 | 14 | 11 | 6 | 12 | 14 | 12 | 9 | 0 | 9 | 12 | 8 | 12 | 16 PIN | A<14> | 536870976 | 0 | N/A | 125 | 6 | 11 | 15 | 11 | 8 | 7 | 10 | 7 | 7 | 7 | 9 | 7 | 12 PIN | A<15> | 536870976 | 0 | N/A | 139 | 5 | 8 | 6 | 12 | 4 | 12 | 5 | 12 | 0 | 12 | 1 PIN | A<16> | 536870976 | 0 | N/A | 175 | 9 | 4 | 12 | 5 | 17 | 10 | 16 | 10 | 14 | 4 | 1 | 4 | 2 | 5 | 16 | 10 | 0 | 10 | 13 PIN | A<17> | 536870976 | 0 | N/A | 172 | 7 | 4 | 12 | 5 | 16 | 12 | 10 | 14 | 8 | 4 | 2 | 12 | 12 | 14 | 10 PIN | DQ<10> | 536870976 | 0 | N/A | 234 | 6 | 15 | 5 | 8 | 16 | 15 | 11 | 15 | 4 | 4 | 13 | 4 | 14 PIN | DQ<11> | 536870976 | 0 | N/A | 207 | 5 | 15 | 2 | 10 | 2 | 10 | 12 | 10 | 5 | 4 | 15 PIN | DQ<1> | 536870976 | 0 | N/A | 216 | 8 | 8 | 13 | 15 | 7 | 15 | 12 | 15 | 6 | 1 | 14 | 4 | 10 | 1 | 13 | 4 | 12 PIN | DQ<4> | 536870976 | 0 | N/A | 225 | 6 | 15 | 1 | 10 | 4 | 10 | 8 | 10 | 3 | 4 | 0 | 0 | 5 PIN | DQ<8> | 536870976 | 0 | N/A | 231 | 6 | 8 | 10 | 15 | 10 | 15 | 13 | 15 | 8 | 1 | 16 | 1 | 15 PIN | DQ<9> | 536870976 | 0 | N/A | 209 | 6 | 8 | 13 | 15 | 7 | 15 | 12 | 15 | 6 | 4 | 11 | 4 | 10 PIN | D<0> | 536870976 | 0 | N/A | 4 | 4 | 9 | 2 | 10 | 16 | 10 | 14 | 9 | 3 PIN | D<10> | 536870976 | 0 | N/A | 74 | 10 | 11 | 3 | 11 | 1 | 3 | 16 | 1 | 6 | 3 | 8 | 9 | 15 | 15 | 14 | 15 | 0 | 11 | 16 | 15 | 17 PIN | D<11> | 536870976 | 0 | N/A | 77 | 9 | 11 | 10 | 5 | 11 | 3 | 15 | 1 | 5 | 3 | 6 | 11 | 9 | 5 | 14 | 11 | 3 | 11 | 16 PIN | D<12> | 536870976 | 0 | N/A | 78 | 8 | 11 | 13 | 7 | 17 | 3 | 14 | 1 | 3 | 3 | 3 | 7 | 1 | 7 | 14 | 11 | 3 PIN | D<13> | 536870976 | 0 | N/A | 80 | 9 | 11 | 13 | 11 | 0 | 6 | 7 | 6 | 8 | 0 | 17 | 11 | 7 | 12 | 14 | 12 | 9 | 12 | 8 PIN | D<14> | 536870976 | 0 | N/A | 81 | 10 | 11 | 4 | 11 | 0 | 3 | 12 | 6 | 9 | 3 | 2 | 7 | 2 | 7 | 3 | 7 | 7 | 7 | 12 | 11 | 17 PIN | D<15> | 536870976 | 0 | N/A | 89 | 11 | 11 | 13 | 11 | 0 | 3 | 10 | 3 | 9 | 0 | 15 | 11 | 4 | 12 | 0 | 12 | 5 | 12 | 4 | 11 | 5 | 11 | 17 PIN | D<1> | 536870976 | 0 | N/A | 30 | 5 | 9 | 1 | 9 | 0 | 14 | 8 | 12 | 12 | 14 | 10 PIN | D<2> | 536870976 | 0 | N/A | 71 | 4 | 15 | 0 | 15 | 14 | 9 | 6 | 15 | 16 PIN | D<3> | 536870976 | 0 | N/A | 28 | 3 | 9 | 4 | 5 | 13 | 5 | 10 PIN | D<4> | 536870976 | 0 | N/A | 38 | 3 | 7 | 16 | 7 | 15 | 9 | 17 PIN | D<5> | 536870976 | 0 | N/A | 37 | 5 | 9 | 7 | 12 | 14 | 12 | 8 | 9 | 8 | 12 | 16 PIN | D<6> | 536870976 | 0 | N/A | 26 | 3 | 7 | 12 | 7 | 9 | 9 | 12 PIN | D<7> | 536870976 | 0 | N/A | 29 | 4 | 9 | 10 | 12 | 4 | 12 | 5 | 12 | 1 PIN | D<8> | 536870976 | 0 | N/A | 32 | 10 | 11 | 14 | 11 | 1 | 6 | 6 | 1 | 10 | 0 | 12 | 6 | 17 | 10 | 16 | 10 | 13 | 1 | 9 | 10 | 0 PIN | D<9> | 536870976 | 0 | N/A | 73 | 10 | 11 | 14 | 11 | 1 | 3 | 17 | 1 | 7 | 0 | 10 | 11 | 11 | 11 | 16 | 12 | 12 | 11 | 12 | 14 | 10 PIN | DQ<0> | 536870976 | 0 | N/A | 217 | 6 | 8 | 10 | 15 | 10 | 15 | 13 | 15 | 8 | 3 | 1 | 1 | 14 PIN | DQ<12> | 536870976 | 0 | N/A | 235 | 6 | 15 | 1 | 10 | 4 | 10 | 8 | 10 | 3 | 4 | 16 | 4 | 17 PIN | DQ<13> | 536870976 | 0 | N/A | 204 | 6 | 6 | 1 | 10 | 9 | 10 | 7 | 10 | 1 | 6 | 2 | 14 | 17 PIN | DQ<14> | 536870976 | 0 | N/A | 236 | 6 | 14 | 14 | 10 | 10 | 10 | 6 | 6 | 3 | 6 | 4 | 10 | 1 PIN | DQ<15> | 536870976 | 0 | N/A | 202 | 6 | 14 | 13 | 12 | 7 | 12 | 3 | 12 | 2 | 6 | 11 | 6 | 10 PIN | DQ<2> | 536870976 | 0 | N/A | 220 | 7 | 15 | 5 | 8 | 16 | 15 | 11 | 15 | 4 | 4 | 8 | 4 | 9 | 4 | 14 PIN | DQ<3> | 536870976 | 0 | N/A | 219 | 6 | 15 | 2 | 4 | 16 | 10 | 12 | 10 | 5 | 1 | 11 | 10 | 3 PIN | DQ<5> | 536870976 | 0 | N/A | 221 | 6 | 10 | 2 | 10 | 9 | 10 | 7 | 0 | 4 | 6 | 0 | 14 | 17 PIN | DQ<6> | 536870976 | 0 | N/A | 227 | 7 | 10 | 1 | 10 | 10 | 10 | 6 | 1 | 8 | 6 | 2 | 1 | 9 | 14 | 15 PIN | DQ<7> | 536870976 | 0 | N/A | 226 | 6 | 1 | 12 | 12 | 7 | 6 | 12 | 12 | 2 | 6 | 10 | 14 | 14