cpldfit: version P.20131013 Xilinx Inc. Fitter Report Design Name: LAN_IDE_CP Date: 3- 6-2022, 0:08AM Device Used: XC95288XL-10-TQ144 Fitting Status: Successful ************************* Mapped Resource Summary ************************** Macrocells Product Terms Function Block Registers Pins Used/Tot Used/Tot Inps Used/Tot Used/Tot Used/Tot 196/288 ( 68%) 908 /1440 ( 63%) 465/864 ( 54%) 91 /288 ( 32%) 106/117 ( 91%) ** Function Block Resources ** Function Mcells FB Inps Pterms IO Block Used/Tot Used/Tot Used/Tot Used/Tot FB1 12/18 29/54 68/90 8/ 8* FB2 11/18 37/54 86/90 8/10 FB3 11/18 33/54 88/90 4/ 5 FB4 13/18 37/54 53/90 6/ 6* FB5 7/18 43/54 77/90 7/ 8 FB6 11/18 37/54 55/90 8/ 8* FB7 9/18 33/54 85/90 4/ 4* FB8 10/18 37/54 40/90 5/ 5* FB9 18/18* 2/54 36/90 9/ 9* FB10 17/18 27/54 72/90 10/10* FB11 16/18 36/54 57/90 7/ 7* FB12 16/18 36/54 62/90 5/ 6 FB13 9/18 37/54 42/90 4/ 6 FB14 12/18 37/54 43/90 7/ 8 FB15 18/18* 2/54 34/90 8/ 9 FB16 6/18 2/54 10/90 6/ 8 ----- ----- ----- ----- 196/288 465/864 908/1440 106/117 * - Resource is exhausted ** Global Control Resources ** Signal 'CLK_EXT' mapped onto global clock net GCK1. Global output enable net(s) unused. Signal 'RESET' mapped onto global set/reset net GSR. ** Pin Resources ** Signal Type Required Mapped | Pin Type Used Total ------------------------------------|------------------------------------ Input : 33 33 | I/O : 99 109 Output : 39 39 | GCK/IO : 2 3 Bidirectional : 32 32 | GTS/IO : 4 4 GCK : 1 1 | GSR/IO : 1 1 GTS : 0 0 | GSR : 1 1 | ---- ---- Total 106 106 ** Power Data ** There are 196 macrocells in high performance mode (MCHP). There are 0 macrocells in low power mode (MCLP). End of Mapped Resource Summary ************************** Errors and Warnings *************************** WARNING:Cpld - Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'LAN_IDE_CP.ise'. INFO:Cpld - Inferring BUFG constraint for signal 'CLK_EXT' based upon the LOC constraint 'P30'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored. WARNING:Cpld:1007 - Removing unused input(s) 'BERR'. The input(s) are unused after optimization. Please verify functionality via simulation. WARNING:Cpld:1007 - Removing unused input(s) 'DS0'. The input(s) are unused after optimization. Please verify functionality via simulation. WARNING:Cpld:1007 - Removing unused input(s) 'DS1'. The input(s) are unused after optimization. Please verify functionality via simulation. WARNING:Cpld:1007 - Removing unused input(s) 'FCS'. The input(s) are unused after optimization. Please verify functionality via simulation. WARNING:Cpld:1007 - Removing unused input(s) 'IDE_WAIT'. The input(s) are unused after optimization. Please verify functionality via simulation. WARNING:Cpld:1007 - Removing unused input(s) 'MTCR'. The input(s) are unused after optimization. Please verify functionality via simulation. WARNING:Cpld:1007 - Removing unused input(s) 'Z3'. The input(s) are unused after optimization. Please verify functionality via simulation. INFO:Cpld:994 - Exhaustive fitting is trying pterm limit: 25 and input limit: 54 ************************* Summary of Mapped Logic ************************ ** 71 Outputs ** Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init Name Pts Inps No. Type Use Mode Rate State D<5> 11 11 FB1_5 20 I/O I/O STD FAST RESET D<4> 11 11 FB1_6 21 I/O I/O STD FAST RESET IDE_CS<0> 1 1 FB1_8 22 I/O O STD FAST IDE_CS<1> 1 1 FB1_10 23 I/O O STD FAST IDE_A<0> 1 1 FB1_12 24 I/O O STD FAST IDE_A<2> 1 1 FB1_14 25 I/O O STD FAST IDE_A<1> 1 1 FB1_15 26 I/O O STD FAST IDE_R 1 2 FB1_17 27 I/O O STD FAST A_LAN<4> 2 5 FB2_2 9 I/O O STD FAST A_LAN<7> 2 5 FB2_3 10 I/O O STD FAST A_LAN<6> 4 6 FB2_5 11 I/O O STD FAST D<6> 11 11 FB2_10 14 I/O I/O STD FAST RESET D<3> 11 11 FB2_12 15 I/O I/O STD FAST RESET D<7> 11 11 FB2_14 16 I/O I/O STD FAST RESET D<1> 11 11 FB2_15 17 I/O I/O STD FAST RESET D<8> 11 11 FB2_17 19 I/O I/O STD FAST RESET IDE_W 1 2 FB3_2 28 I/O O STD FAST INT2_OUT 1 2 FB3_14 32 GCK/I/O O STD FAST D<0> 11 11 FB4_2 2 GTS/I/O I/O STD FAST RESET A_LAN<1> 2 4 FB4_5 3 GTS/I/O O STD FAST A_LAN<0> 2 4 FB4_6 4 I/O O STD FAST A_LAN<3> 2 5 FB4_8 5 GTS/I/O O STD FAST A_LAN<2> 2 5 FB4_12 6 GTS/I/O O STD FAST A_LAN<5> 2 5 FB4_14 7 I/O O STD FAST CP_CS 18 18 FB5_2 34 I/O O STD FAST SET ROM_OE 2 3 FB5_5 35 I/O O STD FAST D<2> 11 11 FB5_10 39 I/O I/O STD FAST RESET D<9> 11 11 FB5_12 40 I/O I/O STD FAST RESET D<10> 11 11 FB5_14 41 I/O I/O STD FAST RESET D<11> 11 11 FB5_15 43 I/O I/O STD FAST RESET D<12> 13 12 FB5_17 44 I/O I/O STD FAST RESET INT6_OUT 1 1 FB6_2 135 I/O O STD FAST A_LAN<12> 2 5 FB6_3 136 I/O O STD FAST A_LAN<13> 2 5 FB6_5 137 I/O O STD FAST A_LAN<10> 2 5 FB6_6 138 I/O O STD FAST A_LAN<11> 2 5 FB6_8 139 I/O O STD FAST A_LAN<8> 2 5 FB6_10 140 I/O O STD FAST A_LAN<9> 2 5 FB6_14 142 I/O O STD FAST D<13> 13 12 FB7_3 45 I/O I/O STD FAST RESET D<14> 13 12 FB7_5 46 I/O I/O STD FAST RESET Signal Total Total Loc Pin Pin Pin Pwr Slew Reg Init Name Pts Inps No. Type Use Mode Rate State D<15> 13 12 FB7_12 48 I/O I/O STD FAST RESET DQ<12> 2 4 FB8_2 130 I/O I/O STD FAST DQ<14> 2 4 FB8_3 131 I/O I/O STD FAST LAN_WRH 5 6 FB8_5 132 I/O O STD FAST LAN_CS 4 5 FB8_8 133 I/O O STD FAST LAN_RD 2 6 FB8_10 134 I/O O STD FAST DQ<1> 2 4 FB10_2 117 I/O I/O STD FAST DQ<0> 2 4 FB10_3 118 I/O I/O STD FAST DQ<3> 2 4 FB10_5 119 I/O I/O STD FAST DQ<2> 2 4 FB10_6 120 I/O I/O STD FAST DQ<5> 2 4 FB10_8 121 I/O I/O STD FAST DQ<4> 4 5 FB10_10 124 I/O I/O STD FAST DQ<7> 2 4 FB10_11 125 I/O I/O STD FAST DQ<6> 2 4 FB10_12 126 I/O I/O STD FAST DQ<8> 4 5 FB10_14 128 I/O I/O STD FAST DQ<10> 4 5 FB10_17 129 I/O I/O STD FAST ROM_B<0> 0 0 FB11_12 68 I/O O STD FAST ROM_B<1> 0 0 FB11_14 69 I/O O STD FAST CP_WE 1 3 FB11_17 70 I/O O STD FAST DQ<15> 2 4 FB12_5 112 I/O I/O STD FAST DQ<13> 2 4 FB12_8 113 I/O I/O STD FAST DQ<11> 4 5 FB12_10 115 I/O I/O STD FAST DQ<9> 4 5 FB12_12 116 I/O I/O STD FAST CP_RD 2 3 FB13_2 71 I/O O STD FAST LAN_WRL 5 6 FB13_14 76 I/O O STD FAST OVR 0 0 FB14_3 100 I/O O STD FAST CFOUT 1 2 FB14_11 105 I/O O STD FAST SLAVE 2 6 FB14_14 106 I/O O STD FAST OWN 0 0 FB14_15 107 I/O O STD FAST DTACK 0 0 FB15_12 85 I/O O STD FAST MTACK 0 0 FB16_10 96 I/O O STD FAST ** 125 Buried Nodes ** Signal Total Total Loc Pwr Reg Init Name Pts Inps Mode State D_IN<3> 10 9 FB1_11 STD RESET D_IN<2> 10 9 FB1_13 STD RESET D_IN<11> 10 9 FB1_16 STD RESET D_IN<10> 10 9 FB1_18 STD RESET D_IN<0> 10 9 FB2_4 STD RESET DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT 3 7 FB2_6 STD D_IN<8> 10 9 FB2_8 STD RESET SHUT_UP<0> 3 15 FB3_3 STD RESET AUTO_CONFIG_DONE<0> 3 3 FB3_4 STD RESET SHUT_UP<1> 3 15 FB3_5 STD RESET Dout1<2> 20 14 FB3_7 STD RESET AUTO_CONFIG_DONE<1> 3 3 FB3_9 STD RESET Dout1<0> 20 14 FB3_12 STD RESET AUTO_CONFIG_DONE_CYCLE<1> 9 15 FB3_15 STD RESET SHUT_UP<2> 3 15 FB3_16 STD RESET Dout1<1> 22 14 FB3_18 STD RESET AUTO_CONFIG_DONE_CYCLE<0> 9 16 FB4_1 STD RESET LAN_WR_RST 1 3 FB4_10 STD RESET LAN_CS_RST 2 3 FB4_11 STD RESET LAN_BASEADR<0> 5 16 FB4_13 STD RESET IDE_BASEADR<0> 5 16 FB4_15 STD RESET CP_BASEADR<1> 5 16 FB4_16 STD RESET CP_BASEADR<0> 5 16 FB4_17 STD RESET lan_adr 18 18 FB6_13 STD RESET LAN_WRH_S 2 5 FB6_15 STD RESET autoconfig 3 12 FB6_16 STD RESET lan_adr_sw 19 20 FB6_18 STD RESET D_IN<13> 10 9 FB7_2 STD RESET D_IN<4> 10 9 FB7_9 STD RESET D_IN<5> 10 9 FB7_11 STD RESET $OpTx$INV$125__$INT 3 7 FB7_14 STD LAN_RD_S 3 6 FB7_15 STD RESET D_IN<12> 10 9 FB7_17 STD RESET LAN_BASEADR<2> 5 16 FB8_14 STD RESET IDE_BASEADR<3> 5 16 FB8_15 STD RESET IDE_BASEADR<2> 5 16 FB8_16 STD RESET CP_BASEADR<3> 5 16 FB8_17 STD RESET CP_BASEADR<2> 5 16 FB8_18 STD RESET IDE_BASEADR<7>/IDE_BASEADR<7>_CLKF 2 2 FB9_1 STD IDE_BASEADR<6>/IDE_BASEADR<6>_CLKF 2 2 FB9_2 STD Signal Total Total Loc Pwr Reg Init Name Pts Inps Mode State IDE_BASEADR<5>/IDE_BASEADR<5>_CLKF 2 2 FB9_3 STD IDE_BASEADR<4>/IDE_BASEADR<4>_CLKF 2 2 FB9_4 STD IDE_BASEADR<3>/IDE_BASEADR<3>_CLKF 2 2 FB9_5 STD IDE_BASEADR<2>/IDE_BASEADR<2>_CLKF 2 2 FB9_6 STD IDE_BASEADR<1>/IDE_BASEADR<1>_CLKF 2 2 FB9_7 STD IDE_BASEADR<0>/IDE_BASEADR<0>_CLKF 2 2 FB9_8 STD Dout1<3>/Dout1<3>_CLKF 2 2 FB9_9 STD Dout1<2>/Dout1<2>_CLKF 2 2 FB9_10 STD Dout1<1>/Dout1<1>_CLKF 2 2 FB9_11 STD Dout1<0>/Dout1<0>_CLKF 2 2 FB9_12 STD CP_WE_S/CP_WE_S_CLKF 2 2 FB9_13 STD CP_WE_QUIRK/CP_WE_QUIRK_CLKF 2 2 FB9_14 STD CP_RD_S/CP_RD_S_CLKF 2 2 FB9_15 STD CP_BASEADR<7>/CP_BASEADR<7>_CLKF 2 2 FB9_16 STD CP_BASEADR<6>/CP_BASEADR<6>_CLKF 2 2 FB9_17 STD CP_BASEADR<5>/CP_BASEADR<5>_CLKF 2 2 FB9_18 STD D_IN<1> 10 9 FB10_1 STD RESET D_IN<14> 10 9 FB10_4 STD RESET D_IN<6> 10 9 FB10_9 STD RESET D_IN<9> 10 9 FB10_13 STD RESET LAN_RST_SM_FSM_FFd1 2 4 FB10_15 STD RESET LAN_RST_SM_FSM_FFd2 2 4 FB10_16 STD RESET LAN_RST_SM_FSM_FFd3 2 3 FB10_18 STD RESET CP_WE_QUIRK 2 2 FB11_1 STD RESET ide 18 18 FB11_3 STD RESET CP_BASEADR<3>/CP_BASEADR<3>_CLKF 2 2 FB11_4 STD CP_BASEADR<2>/CP_BASEADR<2>_CLKF 2 2 FB11_5 STD CP_BASEADR<1>/CP_BASEADR<1>_CLKF 2 2 FB11_6 STD CP_BASEADR<0>/CP_BASEADR<0>_CLKF 2 2 FB11_7 STD AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF 2 2 FB11_8 STD AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF 2 2 FB11_9 STD AUTO_CONFIG_DONE<1>/AUTO_CONFIG_DONE<1>_CLKF 2 2 FB11_10 STD AUTO_CONFIG_DONE<0>/AUTO_CONFIG_DONE<0>_CLKF 2 2 FB11_11 STD AS_D 2 2 FB11_13 STD RESET Dout1<3> 16 13 FB11_15 STD RESET CP_BASEADR<4>/CP_BASEADR<4>_CLKF 2 2 FB11_18 STD D_IN<15> 10 9 FB12_2 STD RESET ROM_OE_S 2 5 FB12_3 STD RESET LAN_WRL_S 2 5 FB12_4 STD RESET LAN_IRQ_D0 2 2 FB12_6 STD RESET Signal Total Total Loc Pwr Reg Init Name Pts Inps Mode State IDE_W_S 2 4 FB12_7 STD RESET IDE_R_S 2 5 FB12_9 STD RESET IDE_ENABLE 2 4 FB12_11 STD RESET CP_RD_S 2 4 FB12_13 STD RESET CP_WE_S 3 5 FB12_14 STD RESET LAN_INT_ENABLE 5 8 FB12_15 STD RESET LAN_IRQ_OUT 8 11 FB12_16 STD RESET D_IN<7> 10 9 FB12_18 STD RESET LAN_BASEADR<5> 5 16 FB13_11 STD RESET LAN_BASEADR<4> 5 16 FB13_12 STD RESET IDE_BASEADR<5> 5 16 FB13_13 STD RESET IDE_BASEADR<4> 5 16 FB13_15 STD RESET CP_BASEADR<6> 5 16 FB13_16 STD RESET CP_BASEADR<5> 5 16 FB13_17 STD RESET CP_BASEADR<4> 5 16 FB13_18 STD RESET LAN_BASEADR<7> 5 16 FB14_8 STD RESET LAN_BASEADR<6> 5 16 FB14_9 STD RESET LAN_BASEADR<3> 5 16 FB14_10 STD RESET LAN_BASEADR<1> 5 16 FB14_12 STD RESET IDE_BASEADR<7> 5 16 FB14_13 STD RESET IDE_BASEADR<6> 5 16 FB14_16 STD RESET IDE_BASEADR<1> 5 16 FB14_17 STD RESET CP_BASEADR<7> 5 16 FB14_18 STD RESET LAN_WRL_S/LAN_WRL_S_CLKF 2 2 FB15_1 STD LAN_WRH_S/LAN_WRH_S_CLKF 2 2 FB15_2 STD LAN_RD_S/LAN_RD_S_CLKF 2 2 FB15_3 STD LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF 2 2 FB15_4 STD LAN_IRQ_D0/LAN_IRQ_D0_CLKF 2 2 FB15_5 STD LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF 2 2 FB15_6 STD LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF 2 2 FB15_7 STD LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF 2 2 FB15_8 STD LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF 2 2 FB15_9 STD LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF 2 2 FB15_10 STD LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF 2 2 FB15_11 STD LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF 2 2 FB15_13 STD LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF 2 2 FB15_14 STD LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF 2 2 FB15_15 STD IDE_W_S/IDE_W_S_CLKF 2 2 FB15_16 STD IDE_R_S/IDE_R_S_CLKF 2 2 FB15_17 STD IDE_ENABLE/IDE_ENABLE_CLKF 2 2 FB15_18 STD Signal Total Total Loc Pwr Reg Init Name Pts Inps Mode State lan_adr_sw/lan_adr_sw_CLKF 2 2 FB16_14 STD SHUT_UP<2>/SHUT_UP<2>_CLKF 2 2 FB16_15 STD SHUT_UP<1>/SHUT_UP<1>_CLKF 2 2 FB16_16 STD SHUT_UP<0>/SHUT_UP<0>_CLKF 2 2 FB16_17 STD ROM_OE_S/ROM_OE_S_CLKF 2 2 FB16_18 STD ** 35 Inputs ** Signal Loc Pin Pin Pin Name No. Type Use CLK_EXT FB3_10 30 GCK/I/O GCK CP_IRQ FB3_12 31 I/O I RESET FB6_15 143 GSR/I/O GSR/I A<5> FB7_15 49 I/O I A<4> FB9_2 50 I/O I A<6> FB9_3 51 I/O I A<3> FB9_5 52 I/O I A<7> FB9_6 53 I/O I A<2> FB9_8 54 I/O I A<8> FB9_11 56 I/O I A<1> FB9_12 57 I/O I A<9> FB9_14 58 I/O I A<10> FB9_17 59 I/O I A<11> FB11_3 60 I/O I A<12> FB11_5 61 I/O I A<13> FB11_10 64 I/O I A<14> FB11_11 66 I/O I LAN_INT FB12_3 111 I/O I A<15> FB13_8 74 I/O I AUTOBOOT_OFF FB13_11 75 I/O I C3 FB14_6 102 I/O I C1 FB14_8 103 I/O I CFIN FB14_10 104 I/O I AS FB15_3 80 I/O I UDS FB15_8 81 I/O I LDS FB15_10 82 I/O I RW FB15_11 83 I/O I A<23> FB15_14 86 I/O I A<22> FB15_15 87 I/O I A<21> FB15_17 88 I/O I A<20> FB16_2 91 I/O I A<19> FB16_3 92 I/O I A<18> FB16_6 94 I/O I A<17> FB16_8 95 I/O I A<16> FB16_11 97 I/O I Legend: Pin No. - ~ - User Assigned ************************** Function Block Details ************************ Legend: Total Pt - Total product terms used by the macrocell signal Imp Pt - Product terms imported from other macrocells Exp Pt - Product terms exported to other macrocells in direction shown Unused Pt - Unused local product terms remaining in macrocell Loc - Location where logic was mapped in device Pin Type/Use - I - Input GCK - Global Clock O - Output GTS - Global Output Enable (b) - Buried macrocell GSR - Global Set/Reset X - Signal used as input to the macrocell logic. Pin No. - ~ - User Assigned *********************************** FB1 *********************************** Number of function block inputs used/remaining: 29/25 Number of signals used by logic mapping into function block: 29 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 /\5 0 FB1_1 (b) (b) (unused) 0 0 /\1 4 FB1_2 (b) (b) (unused) 0 0 0 5 FB1_3 (b) (unused) 0 0 \/5 0 FB1_4 (b) (b) D<5> 11 6<- 0 0 FB1_5 20 I/O I/O D<4> 11 7<- /\1 0 FB1_6 21 I/O I/O (unused) 0 0 /\5 0 FB1_7 (b) (b) IDE_CS<0> 1 0 /\2 2 FB1_8 22 I/O O (unused) 0 0 0 5 FB1_9 (b) IDE_CS<1> 1 0 \/3 1 FB1_10 23 I/O O D_IN<3> 10 5<- 0 0 FB1_11 (b) (b) IDE_A<0> 1 0 /\2 2 FB1_12 24 I/O O D_IN<2> 10 5<- 0 0 FB1_13 (b) (b) IDE_A<2> 1 1<- /\5 0 FB1_14 25 I/O O IDE_A<1> 1 0 /\1 3 FB1_15 26 I/O O D_IN<11> 10 5<- 0 0 FB1_16 (b) (b) IDE_R 1 1<- /\5 0 FB1_17 27 I/O O D_IN<10> 10 6<- /\1 0 FB1_18 (b) (b) Signals Used by Logic in Function Block 1: $OpTx$INV$125__$INT 11: D_IN<3> 21: D<10>.PIN 2: AS 12: A<9> 22: D<3>.PIN 3: A<12> 13: A<10> 23: D<2>.PIN 4: A<13> 14: A<11> 24: DQ<12>.PIN 5: CP_CS 15: IDE_R_S 25: UDS 6: D<4> 16: LDS 26: autoconfig 7: D<5> 17: DQ<5>.PIN 27: ide 8: D_IN<10> 18: DQ<4>.PIN 28: lan_adr 9: D_IN<11> 19: DQ<13>.PIN 29: lan_adr_sw 10: D_IN<2> 20: D<11>.PIN Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs D<5> X...X.X........XX.X.....XXXXX........... 11 D<4> X...XX.........X.X.....XXXXXX........... 11 IDE_CS<0> ..X..................................... 1 IDE_CS<1> ...X.................................... 1 D_IN<3> ....X.....X....X...X.X..X.XXX........... 9 IDE_A<0> ...........X............................ 1 D_IN<2> ....X....X.....X....X.X.X.XXX........... 9 IDE_A<2> .............X.......................... 1 IDE_A<1> ............X........................... 1 D_IN<11> ....X...X......X...X.X..X.XXX........... 9 IDE_R .X............X......................... 2 D_IN<10> ....X..X.......X....X.X.X.XXX........... 9 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB2 *********************************** Number of function block inputs used/remaining: 37/17 Number of signals used by logic mapping into function block: 37 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 /\3 2 FB2_1 (b) (b) A_LAN<4> 2 0 \/1 2 FB2_2 9 I/O O A_LAN<7> 2 1<- \/4 0 FB2_3 10 I/O O D_IN<0> 10 5<- 0 0 FB2_4 (b) (b) A_LAN<6> 4 0 /\1 0 FB2_5 11 I/O O DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT 3 0 \/2 0 FB2_6 12 I/O (b) (unused) 0 0 \/5 0 FB2_7 (b) (b) D_IN<8> 10 7<- \/2 0 FB2_8 13 I/O (b) (unused) 0 0 \/5 0 FB2_9 (b) (b) D<6> 11 7<- \/1 0 FB2_10 14 I/O I/O (unused) 0 0 \/5 0 FB2_11 (b) (b) D<3> 11 6<- 0 0 FB2_12 15 I/O I/O (unused) 0 0 \/5 0 FB2_13 (b) (b) D<7> 11 6<- 0 0 FB2_14 16 I/O I/O D<1> 11 7<- /\1 0 FB2_15 17 I/O I/O (unused) 0 0 /\5 0 FB2_16 (b) (b) D<8> 11 8<- /\2 0 FB2_17 19 I/O I/O (unused) 0 0 /\5 0 FB2_18 (b) (b) Signals Used by Logic in Function Block 1: $OpTx$INV$125__$INT 14: D_IN<0> 26: D<0>.PIN 2: AS 15: D_IN<8> 27: DQ<11>.PIN 3: A<3> 16: LAN_RST_SM_FSM_FFd1 28: DQ<9>.PIN 4: A<5> 17: LAN_RST_SM_FSM_FFd2 29: DQ<8>.PIN 5: A<6> 18: LAN_RST_SM_FSM_FFd3 30: DQ<7>.PIN 6: A<7> 19: LDS 31: DQ<6>.PIN 7: A<8> 20: DQ<15>.PIN 32: RW 8: CP_CS 21: DQ<14>.PIN 33: UDS 9: D<1> 22: DQ<3>.PIN 34: autoconfig 10: D<3> 23: DQ<1>.PIN 35: ide 11: D<6> 24: DQ<0>.PIN 36: lan_adr 12: D<7> 25: D<8>.PIN 37: lan_adr_sw 13: D<8> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs A_LAN<4> ..XX............XX.................X.... 5 A_LAN<7> ....X.X.........XX.................X.... 5 D_IN<0> .......X.....X....X.....XX......X.XXX... 9 A_LAN<6> ...X.X.........XXX.................X.... 6 DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT .X.....X........XX.............X..XX.... 7 D_IN<8> .......X......X...X.....XX......X.XXX... 9 D<6> X......X..X.......X.X.........X.XXXXX... 11 D<3> X......X.X........X..X....X.....XXXXX... 11 D<7> X......X...X......XX.........X..XXXXX... 11 D<1> X......XX.........X...X....X....XXXXX... 11 D<8> X......X....X.....X....X....X...XXXXX... 11 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB3 *********************************** Number of function block inputs used/remaining: 33/21 Number of signals used by logic mapping into function block: 33 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 /\5 0 FB3_1 (b) (b) IDE_W 1 1<- /\5 0 FB3_2 28 I/O O SHUT_UP<0> 3 0 /\1 1 FB3_3 (b) (b) AUTO_CONFIG_DONE<0> 3 0 \/1 1 FB3_4 (b) (b) SHUT_UP<1> 3 1<- \/3 0 FB3_5 (b) (b) (unused) 0 0 \/5 0 FB3_6 (b) (b) Dout1<2> 20 15<- 0 0 FB3_7 (b) (b) (unused) 0 0 /\5 0 FB3_8 (b) (b) AUTO_CONFIG_DONE<1> 3 0 /\2 0 FB3_9 (b) (b) (unused) 0 0 \/5 0 FB3_10 30 GCK/I/O GCK (unused) 0 0 \/5 0 FB3_11 (b) (b) Dout1<0> 20 15<- 0 0 FB3_12 31 I/O I (unused) 0 0 /\5 0 FB3_13 (b) (b) INT2_OUT 1 0 \/4 0 FB3_14 32 GCK/I/O O AUTO_CONFIG_DONE_CYCLE<1> 9 4<- 0 0 FB3_15 33 I/O (b) SHUT_UP<2> 3 0 \/2 0 FB3_16 (b) (b) (unused) 0 0 \/5 0 FB3_17 (b) (b) Dout1<1> 22 17<- 0 0 FB3_18 (b) (b) Signals Used by Logic in Function Block 1: AS 12: A<4> 23: LAN_IRQ_OUT 2: AUTO_CONFIG_DONE<0> 13: A<5> 24: LDS 3: AUTO_CONFIG_DONE<0>/AUTO_CONFIG_DONE<0>_CLKF 14: A<6> 25: RW 4: AUTO_CONFIG_DONE<1> 15: Dout1<0> 26: SHUT_UP<0> 5: AUTO_CONFIG_DONE<1>/AUTO_CONFIG_DONE<1>_CLKF 16: Dout1<0>/Dout1<0>_CLKF 27: SHUT_UP<0>/SHUT_UP<0>_CLKF 6: AUTO_CONFIG_DONE_CYCLE<0> 17: Dout1<1> 28: SHUT_UP<1> 7: AUTO_CONFIG_DONE_CYCLE<1> 18: Dout1<1>/Dout1<1>_CLKF 29: SHUT_UP<1>/SHUT_UP<1>_CLKF 8: AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF 19: Dout1<2> 30: SHUT_UP<2> 9: A<1> 20: Dout1<2>/Dout1<2>_CLKF 31: SHUT_UP<2>/SHUT_UP<2>_CLKF 10: A<2> 21: IDE_W_S 32: UDS 11: A<3> 22: LAN_INT_ENABLE 33: autoconfig Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs IDE_W X...................X................... 2 SHUT_UP<0> XX.X....XXXXXX.........XXXX....XX....... 15 AUTO_CONFIG_DONE<0> X.X..X.................................. 3 SHUT_UP<1> XX.X....XXXXXX.........XX..XX..XX....... 15 Dout1<2> XX.X....XXXXXX....XX...X.......XX....... 14 AUTO_CONFIG_DONE<1> X...X.X................................. 3 Dout1<0> XX.X....XXXXXXXX.......X.......XX....... 14 INT2_OUT .....................XX................. 2 AUTO_CONFIG_DONE_CYCLE<1> XX.X..XXXXXXXX.........XX......XX....... 15 SHUT_UP<2> XX.X....XXXXXX.........XX....XXXX....... 15 Dout1<1> XX.X....XXXXXX..XX.....X.......XX....... 14 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB4 *********************************** Number of function block inputs used/remaining: 37/17 Number of signals used by logic mapping into function block: 37 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use AUTO_CONFIG_DONE_CYCLE<0> 9 5<- \/1 0 FB4_1 (b) (b) D<0> 11 6<- 0 0 FB4_2 2 GTS/I/O I/O (unused) 0 0 /\5 0 FB4_3 (b) (b) (unused) 0 0 0 5 FB4_4 (b) A_LAN<1> 2 0 0 3 FB4_5 3 GTS/I/O O A_LAN<0> 2 0 0 3 FB4_6 4 I/O O (unused) 0 0 0 5 FB4_7 (b) A_LAN<3> 2 0 0 3 FB4_8 5 GTS/I/O O (unused) 0 0 0 5 FB4_9 (b) LAN_WR_RST 1 0 0 4 FB4_10 (b) (b) LAN_CS_RST 2 0 0 3 FB4_11 (b) (b) A_LAN<2> 2 0 0 3 FB4_12 6 GTS/I/O O LAN_BASEADR<0> 5 0 0 0 FB4_13 (b) (b) A_LAN<5> 2 0 0 3 FB4_14 7 I/O O IDE_BASEADR<0> 5 0 0 0 FB4_15 (b) (b) CP_BASEADR<1> 5 0 0 0 FB4_16 (b) (b) CP_BASEADR<0> 5 0 0 0 FB4_17 (b) (b) (unused) 0 0 \/5 0 FB4_18 (b) (b) Signals Used by Logic in Function Block 1: $OpTx$INV$125__$INT 14: CP_BASEADR<0> 26: LDS 2: AS 15: CP_BASEADR<0>/CP_BASEADR<0>_CLKF 27: DQ<0>.PIN 3: AUTOBOOT_OFF 16: CP_BASEADR<1> 28: D<9>.PIN 4: AUTO_CONFIG_DONE<0> 17: CP_BASEADR<1>/CP_BASEADR<1>_CLKF 29: D<8>.PIN 5: AUTO_CONFIG_DONE<1> 18: CP_CS 30: DQ<8>.PIN 6: AUTO_CONFIG_DONE_CYCLE<0> 19: D<0> 31: RESET 7: AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF 20: IDE_BASEADR<0> 32: RW 8: A<1> 21: IDE_BASEADR<0>/IDE_BASEADR<0>_CLKF 33: UDS 9: A<2> 22: LAN_BASEADR<0> 34: autoconfig 10: A<3> 23: LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF 35: ide 11: A<4> 24: LAN_RST_SM_FSM_FFd2 36: lan_adr 12: A<5> 25: LAN_RST_SM_FSM_FFd3 37: lan_adr_sw 13: A<6> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs AUTO_CONFIG_DONE_CYCLE<0> .XXXXXXXXXXXX............X.....XXX...... 16 D<0> X................XX......XX..X..XXXXX... 11 A_LAN<1> ........X..............XX..........X.... 4 A_LAN<0> .......X...............XX..........X.... 4 A_LAN<3> ........X.X............XX..........X.... 5 LAN_WR_RST .......................XX.....X......... 3 LAN_CS_RST .......................XX.....X......... 3 A_LAN<2> .......X.X.............XX..........X.... 5 LAN_BASEADR<0> .X.XX..XXXXXX........XX..X..X..XXX...... 16 A_LAN<5> ..........X.X..........XX..........X.... 5 IDE_BASEADR<0> .X.XX..XXXXXX......XX....X..X..XXX...... 16 CP_BASEADR<1> .X.XX..XXXXXX..XX........X.X...XXX...... 16 CP_BASEADR<0> .X.XX..XXXXXXXX..........X..X..XXX...... 16 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB5 *********************************** Number of function block inputs used/remaining: 43/11 Number of signals used by logic mapping into function block: 43 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 /\5 0 FB5_1 (b) (b) CP_CS 18 13<- 0 0 FB5_2 34 I/O O (unused) 0 0 /\5 0 FB5_3 (b) (b) (unused) 0 0 /\5 0 FB5_4 (b) (b) ROM_OE 2 0 /\3 0 FB5_5 35 I/O O (unused) 0 0 0 5 FB5_6 (b) (unused) 0 0 0 5 FB5_7 (b) (unused) 0 0 \/2 3 FB5_8 38 GCK/I/O (b) (unused) 0 0 \/5 0 FB5_9 (b) (b) D<2> 11 7<- \/1 0 FB5_10 39 I/O I/O (unused) 0 0 \/5 0 FB5_11 (b) (b) D<9> 11 6<- 0 0 FB5_12 40 I/O I/O (unused) 0 0 \/5 0 FB5_13 (b) (b) D<10> 11 6<- 0 0 FB5_14 41 I/O I/O D<11> 11 7<- /\1 0 FB5_15 43 I/O I/O (unused) 0 0 /\5 0 FB5_16 (b) (b) D<12> 13 10<- /\2 0 FB5_17 44 I/O I/O (unused) 0 0 /\5 0 FB5_18 (b) (b) Signals Used by Logic in Function Block 1: $OpTx$INV$125__$INT 16: CP_BASEADR<4> 30: DQ<2>.PIN 2: AS_D 17: CP_BASEADR<5> 31: DQ<1>.PIN 3: AS 18: CP_BASEADR<6> 32: DQ<12>.PIN 4: A<16> 19: CP_BASEADR<7> 33: DQ<11>.PIN 5: A<17> 20: CP_CS 34: DQ<10>.PIN 6: A<18> 21: D<10> 35: DQ<9>.PIN 7: A<19> 22: D<11> 36: ROM_OE_S 8: A<20> 23: D<12> 37: SHUT_UP<1> 9: A<21> 24: D<2> 38: UDS 10: A<22> 25: D<9> 39: autoconfig 11: A<23> 26: Dout1<0> 40: ide 12: CP_BASEADR<0> 27: LDS 41: lan_adr 13: CP_BASEADR<1> 28: DQ<4>.PIN 42: lan_adr_sw 14: CP_BASEADR<2> 29: DQ<3>.PIN 43: lan_adr_sw/lan_adr_sw_CLKF 15: CP_BASEADR<3> Signal 1 2 3 4 5 FB Name 0----+----0----+----0----+----0----+----0----+----0 Inputs CP_CS ...XXXXXXXXXXXXXXXX.................X.....X....... 18 ROM_OE .XX................................X.............. 3 D<2> X..................X...X..X..X...X...XXXXX........ 11 D<9> X..................X....X.X...X...X..XXXXX........ 11 D<10> X..................XX.....X..X...X...XXXXX........ 11 D<11> X..................X.X....X.X...X....XXXXX........ 11 D<12> X..................X..X..XXX...X.....XXXXX........ 12 0----+----1----+----2----+----3----+----4----+----5 0 0 0 0 0 *********************************** FB6 *********************************** Number of function block inputs used/remaining: 37/17 Number of signals used by logic mapping into function block: 37 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 /\5 0 FB6_1 (b) (b) INT6_OUT 1 0 /\3 1 FB6_2 135 I/O O A_LAN<12> 2 0 0 3 FB6_3 136 I/O O (unused) 0 0 0 5 FB6_4 (b) A_LAN<13> 2 0 0 3 FB6_5 137 I/O O A_LAN<10> 2 0 0 3 FB6_6 138 I/O O (unused) 0 0 0 5 FB6_7 (b) A_LAN<11> 2 0 0 3 FB6_8 139 I/O O (unused) 0 0 0 5 FB6_9 (b) A_LAN<8> 2 0 0 3 FB6_10 140 I/O O (unused) 0 0 \/4 1 FB6_11 (b) (b) (unused) 0 0 \/5 0 FB6_12 (b) (b) lan_adr 18 13<- 0 0 FB6_13 (b) (b) A_LAN<9> 2 1<- /\4 0 FB6_14 142 I/O O LAN_WRH_S 2 0 /\1 2 FB6_15 143 GSR/I/O GSR/I autoconfig 3 0 \/1 1 FB6_16 (b) (b) (unused) 0 0 \/5 0 FB6_17 (b) (b) lan_adr_sw 19 14<- 0 0 FB6_18 (b) (b) Signals Used by Logic in Function Block 1: AUTO_CONFIG_DONE<0> 14: A<23> 26: LAN_BASEADR<4> 2: AUTO_CONFIG_DONE<1> 15: A<7> 27: LAN_BASEADR<5> 3: A<12> 16: A<8> 28: LAN_BASEADR<6> 4: A<13> 17: CFIN 29: LAN_BASEADR<7> 5: A<14> 18: CP_IRQ 30: LAN_RST_SM_FSM_FFd2 6: A<15> 19: A<9> 31: LAN_RST_SM_FSM_FFd3 7: A<16> 20: A<10> 32: LAN_WRH_S/LAN_WRH_S_CLKF 8: A<17> 21: A<11> 33: LDS 9: A<18> 22: LAN_BASEADR<0> 34: RW 10: A<19> 23: LAN_BASEADR<1> 35: SHUT_UP<0> 11: A<20> 24: LAN_BASEADR<2> 36: lan_adr 12: A<21> 25: LAN_BASEADR<3> 37: lan_adr_sw/lan_adr_sw_CLKF 13: A<22> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs INT6_OUT .................X...................... 1 A_LAN<12> ...X................X........XX....X.... 5 A_LAN<13> ..X.X........................XX....X.... 5 A_LAN<10> ..................X.X........XX....X.... 5 A_LAN<11> ..X................X.........XX....X.... 5 A_LAN<8> ..............X...X..........XX....X.... 5 lan_adr ......XXXXXXXX.......XXXXXXXX.....X.X... 18 A_LAN<9> ...............X...X.........XX....X.... 5 LAN_WRH_S .....X.........................XXX.X.... 5 autoconfig XX....XXXXXXXX..X...................X... 12 lan_adr_sw ...XX.XXXXXXXX.......XXXXXXXX.....X.X... 20 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB7 *********************************** Number of function block inputs used/remaining: 33/21 Number of signals used by logic mapping into function block: 33 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 \/5 0 FB7_1 (b) (b) D_IN<13> 10 8<- \/3 0 FB7_2 (b) (b) D<13> 13 8<- 0 0 FB7_3 45 I/O I/O (unused) 0 0 /\5 0 FB7_4 (b) (b) D<14> 13 8<- 0 0 FB7_5 46 I/O I/O (unused) 0 0 /\5 0 FB7_6 (b) (b) (unused) 0 0 /\3 2 FB7_7 (b) (b) (unused) 0 0 \/5 0 FB7_8 (b) (b) D_IN<4> 10 5<- 0 0 FB7_9 (b) (b) (unused) 0 0 \/5 0 FB7_10 (b) (b) D_IN<5> 10 5<- 0 0 FB7_11 (b) (b) D<15> 13 8<- 0 0 FB7_12 48 I/O I/O (unused) 0 0 /\5 0 FB7_13 (b) (b) $OpTx$INV$125__$INT 3 1<- /\3 0 FB7_14 (b) (b) LAN_RD_S 3 0 /\1 1 FB7_15 49 I/O I (unused) 0 0 \/5 0 FB7_16 (b) (b) D_IN<12> 10 5<- 0 0 FB7_17 (b) (b) (unused) 0 0 \/3 2 FB7_18 (b) (b) Signals Used by Logic in Function Block 1: $OpTx$INV$125__$INT 12: D_IN<5> 23: DQ<13>.PIN 2: AS_D 13: Dout1<1> 24: D<5>.PIN 3: AS 14: Dout1<2> 25: D<4>.PIN 4: A<15> 15: Dout1<3> 26: DQ<7>.PIN 5: CP_CS 16: LAN_RD_S/LAN_RD_S_CLKF 27: DQ<6>.PIN 6: D<13> 17: LDS 28: RW 7: D<14> 18: DQ<15>.PIN 29: UDS 8: D<15> 19: DQ<5>.PIN 30: autoconfig 9: D_IN<12> 20: DQ<14>.PIN 31: ide 10: D_IN<13> 21: D<13>.PIN 32: lan_adr 11: D_IN<4> 22: D<12>.PIN 33: lan_adr_sw Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs D_IN<13> ....X....X......X...X..X....X.XXX....... 9 D<13> X...XX......X...X.X...X.....XXXXX....... 12 D<14> X...X.X......X..X..X......X.XXXXX....... 12 D_IN<4> ....X.....X.....X....X..X...X.XXX....... 9 D_IN<5> ....X......X....X...X..X....X.XXX....... 9 D<15> X...X..X......X.XX.......X..XXXXX....... 12 $OpTx$INV$125__$INT .XX.X......................X.XXX........ 7 LAN_RD_S ...X...........XX..........XX..X........ 6 D_IN<12> ....X...X.......X....X..X...X.XXX....... 9 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB8 *********************************** Number of function block inputs used/remaining: 37/17 Number of signals used by logic mapping into function block: 37 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 0 5 FB8_1 (b) DQ<12> 2 0 0 3 FB8_2 130 I/O I/O DQ<14> 2 0 0 3 FB8_3 131 I/O I/O (unused) 0 0 0 5 FB8_4 (b) LAN_WRH 5 0 0 0 FB8_5 132 I/O O (unused) 0 0 0 5 FB8_6 (b) (unused) 0 0 0 5 FB8_7 (b) LAN_CS 4 0 0 1 FB8_8 133 I/O O (unused) 0 0 0 5 FB8_9 (b) LAN_RD 2 0 0 3 FB8_10 134 I/O O (unused) 0 0 0 5 FB8_11 (b) (unused) 0 0 0 5 FB8_12 (b) (unused) 0 0 0 5 FB8_13 (b) LAN_BASEADR<2> 5 0 0 0 FB8_14 (b) (b) IDE_BASEADR<3> 5 0 0 0 FB8_15 (b) (b) IDE_BASEADR<2> 5 0 0 0 FB8_16 (b) (b) CP_BASEADR<3> 5 0 0 0 FB8_17 (b) (b) CP_BASEADR<2> 5 0 0 0 FB8_18 (b) (b) Signals Used by Logic in Function Block 1: AS_D 14: CP_BASEADR<3>/CP_BASEADR<3>_CLKF 26: LAN_RST_SM_FSM_FFd1 2: AS 15: DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT 27: LAN_RST_SM_FSM_FFd2 3: AUTO_CONFIG_DONE<0> 16: D_IN<12> 28: LAN_RST_SM_FSM_FFd3 4: AUTO_CONFIG_DONE<1> 17: D_IN<14> 29: LAN_WRH_S 5: A<1> 18: IDE_BASEADR<2> 30: LAN_WR_RST 6: A<2> 19: IDE_BASEADR<2>/IDE_BASEADR<2>_CLKF 31: LDS 7: A<3> 20: IDE_BASEADR<3> 32: D<11>.PIN 8: A<4> 21: IDE_BASEADR<3>/IDE_BASEADR<3>_CLKF 33: D<10>.PIN 9: A<5> 22: LAN_BASEADR<2> 34: RW 10: A<6> 23: LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF 35: UDS 11: CP_BASEADR<2> 24: LAN_CS_RST 36: autoconfig 12: CP_BASEADR<2>/CP_BASEADR<2>_CLKF 25: LAN_RD_S 37: lan_adr 13: CP_BASEADR<3> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs DQ<12> ..............XX..........XX............ 4 DQ<14> ..............X.X.........XX............ 4 LAN_WRH .X.......................XXXXX.......... 6 LAN_CS .......................X.XXX........X... 5 LAN_RD XX......................XXXX............ 6 LAN_BASEADR<2> .XXXXXXXXX...........XX.......X.XXXX.... 16 IDE_BASEADR<3> .XXXXXXXXX.........XX.........XX.XXX.... 16 IDE_BASEADR<2> .XXXXXXXXX.......XX...........X.XXXX.... 16 CP_BASEADR<3> .XXXXXXXXX..XX................XX.XXX.... 16 CP_BASEADR<2> .XXXXXXXXXXX..................X.XXXX.... 16 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB9 *********************************** Number of function block inputs used/remaining: 2/52 Number of signals used by logic mapping into function block: 2 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use IDE_BASEADR<7>/IDE_BASEADR<7>_CLKF 2 0 0 3 FB9_1 (b) (b) IDE_BASEADR<6>/IDE_BASEADR<6>_CLKF 2 0 0 3 FB9_2 50 I/O I IDE_BASEADR<5>/IDE_BASEADR<5>_CLKF 2 0 0 3 FB9_3 51 I/O I IDE_BASEADR<4>/IDE_BASEADR<4>_CLKF 2 0 0 3 FB9_4 (b) (b) IDE_BASEADR<3>/IDE_BASEADR<3>_CLKF 2 0 0 3 FB9_5 52 I/O I IDE_BASEADR<2>/IDE_BASEADR<2>_CLKF 2 0 0 3 FB9_6 53 I/O I IDE_BASEADR<1>/IDE_BASEADR<1>_CLKF 2 0 0 3 FB9_7 (b) (b) IDE_BASEADR<0>/IDE_BASEADR<0>_CLKF 2 0 0 3 FB9_8 54 I/O I Dout1<3>/Dout1<3>_CLKF 2 0 0 3 FB9_9 (b) (b) Dout1<2>/Dout1<2>_CLKF 2 0 0 3 FB9_10 (b) (b) Dout1<1>/Dout1<1>_CLKF 2 0 0 3 FB9_11 56 I/O I Dout1<0>/Dout1<0>_CLKF 2 0 0 3 FB9_12 57 I/O I CP_WE_S/CP_WE_S_CLKF 2 0 0 3 FB9_13 (b) (b) CP_WE_QUIRK/CP_WE_QUIRK_CLKF 2 0 0 3 FB9_14 58 I/O I CP_RD_S/CP_RD_S_CLKF 2 0 0 3 FB9_15 (b) (b) CP_BASEADR<7>/CP_BASEADR<7>_CLKF 2 0 0 3 FB9_16 (b) (b) CP_BASEADR<6>/CP_BASEADR<6>_CLKF 2 0 0 3 FB9_17 59 I/O I CP_BASEADR<5>/CP_BASEADR<5>_CLKF 2 0 0 3 FB9_18 (b) (b) Signals Used by Logic in Function Block 1: C1 2: C3 Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs IDE_BASEADR<7>/IDE_BASEADR<7>_CLKF XX...................................... 2 IDE_BASEADR<6>/IDE_BASEADR<6>_CLKF XX...................................... 2 IDE_BASEADR<5>/IDE_BASEADR<5>_CLKF XX...................................... 2 IDE_BASEADR<4>/IDE_BASEADR<4>_CLKF XX...................................... 2 IDE_BASEADR<3>/IDE_BASEADR<3>_CLKF XX...................................... 2 IDE_BASEADR<2>/IDE_BASEADR<2>_CLKF XX...................................... 2 IDE_BASEADR<1>/IDE_BASEADR<1>_CLKF XX...................................... 2 IDE_BASEADR<0>/IDE_BASEADR<0>_CLKF XX...................................... 2 Dout1<3>/Dout1<3>_CLKF XX...................................... 2 Dout1<2>/Dout1<2>_CLKF XX...................................... 2 Dout1<1>/Dout1<1>_CLKF XX...................................... 2 Dout1<0>/Dout1<0>_CLKF XX...................................... 2 CP_WE_S/CP_WE_S_CLKF XX...................................... 2 CP_WE_QUIRK/CP_WE_QUIRK_CLKF XX...................................... 2 CP_RD_S/CP_RD_S_CLKF XX...................................... 2 CP_BASEADR<7>/CP_BASEADR<7>_CLKF XX...................................... 2 CP_BASEADR<6>/CP_BASEADR<6>_CLKF XX...................................... 2 CP_BASEADR<5>/CP_BASEADR<5>_CLKF XX...................................... 2 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB10 *********************************** Number of function block inputs used/remaining: 27/27 Number of signals used by logic mapping into function block: 27 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use D_IN<1> 10 5<- 0 0 FB10_1 (b) (b) DQ<1> 2 0 /\2 1 FB10_2 117 I/O I/O DQ<0> 2 0 \/3 0 FB10_3 118 I/O I/O D_IN<14> 10 5<- 0 0 FB10_4 (b) (b) DQ<3> 2 0 /\2 1 FB10_5 119 I/O I/O DQ<2> 2 0 0 3 FB10_6 120 I/O I/O (unused) 0 0 0 5 FB10_7 (b) DQ<5> 2 0 \/3 0 FB10_8 121 I/O I/O D_IN<6> 10 5<- 0 0 FB10_9 (b) (b) DQ<4> 4 1<- /\2 0 FB10_10 124 I/O I/O DQ<7> 2 0 /\1 2 FB10_11 125 I/O I/O DQ<6> 2 0 \/3 0 FB10_12 126 I/O I/O D_IN<9> 10 5<- 0 0 FB10_13 (b) (b) DQ<8> 4 1<- /\2 0 FB10_14 128 I/O I/O LAN_RST_SM_FSM_FFd1 2 0 /\1 2 FB10_15 (b) (b) LAN_RST_SM_FSM_FFd2 2 0 0 3 FB10_16 (b) (b) DQ<10> 4 0 0 1 FB10_17 129 I/O I/O LAN_RST_SM_FSM_FFd3 2 0 \/3 0 FB10_18 (b) (b) Signals Used by Logic in Function Block 1: CP_CS 10: D_IN<5> 19: D<14>.PIN 2: DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT 11: D_IN<6> 20: D<9>.PIN 3: D_IN<0> 12: D_IN<7> 21: D<6>.PIN 4: D_IN<10> 13: D_IN<8> 22: D<1>.PIN 5: D_IN<14> 14: D_IN<9> 23: RESET 6: D_IN<1> 15: LAN_RST_SM_FSM_FFd1 24: UDS 7: D_IN<2> 16: LAN_RST_SM_FSM_FFd2 25: ide 8: D_IN<3> 17: LAN_RST_SM_FSM_FFd3 26: lan_adr 9: D_IN<4> 18: LDS 27: lan_adr_sw Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs D_IN<1> X....X...........X.X.X.XXXX............. 9 DQ<1> .X...X.........XX....................... 4 DQ<0> .XX............XX....................... 4 D_IN<14> X...X............XX.X..XXXX............. 9 DQ<3> .X.....X.......XX....................... 4 DQ<2> .X....X........XX....................... 4 DQ<5> .X.......X.....XX....................... 4 D_IN<6> X.........X......XX.X..XXXX............. 9 DQ<4> .X......X.....XXX....................... 5 DQ<7> .X.........X...XX....................... 4 DQ<6> .X........X....XX....................... 4 D_IN<9> X............X...X.X.X.XXXX............. 9 DQ<8> .X..........X.XXX....................... 5 LAN_RST_SM_FSM_FFd1 ..............XXX.....X................. 4 LAN_RST_SM_FSM_FFd2 ..............XXX.....X................. 4 DQ<10> .X.X..........XXX....................... 5 LAN_RST_SM_FSM_FFd3 ..............XX......X................. 3 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB11 *********************************** Number of function block inputs used/remaining: 36/18 Number of signals used by logic mapping into function block: 36 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use CP_WE_QUIRK 2 1<- \/4 0 FB11_1 (b) (b) (unused) 0 0 \/5 0 FB11_2 (b) (b) ide 18 13<- 0 0 FB11_3 60 I/O I CP_BASEADR<3>/CP_BASEADR<3>_CLKF 2 1<- /\4 0 FB11_4 (b) (b) CP_BASEADR<2>/CP_BASEADR<2>_CLKF 2 0 /\1 2 FB11_5 61 I/O I CP_BASEADR<1>/CP_BASEADR<1>_CLKF 2 0 0 3 FB11_6 (b) (b) CP_BASEADR<0>/CP_BASEADR<0>_CLKF 2 0 0 3 FB11_7 (b) (b) AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF 2 0 0 3 FB11_8 (b) (b) AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF 2 0 0 3 FB11_9 (b) (b) AUTO_CONFIG_DONE<1>/AUTO_CONFIG_DONE<1>_CLKF 2 0 0 3 FB11_10 64 I/O I AUTO_CONFIG_DONE<0>/AUTO_CONFIG_DONE<0>_CLKF 2 0 0 3 FB11_11 66 I/O I ROM_B<0> 0 0 0 5 FB11_12 68 I/O O AS_D 2 0 0 3 FB11_13 (b) (b) ROM_B<1> 0 0 \/4 1 FB11_14 69 I/O O Dout1<3> 16 11<- 0 0 FB11_15 (b) (b) (unused) 0 0 /\5 0 FB11_16 (b) (b) CP_WE 1 0 /\2 2 FB11_17 70 I/O O CP_BASEADR<4>/CP_BASEADR<4>_CLKF 2 0 \/1 2 FB11_18 (b) (b) Signals Used by Logic in Function Block 1: AS 13: A<3> 25: IDE_BASEADR<1> 2: AUTO_CONFIG_DONE<1> 14: A<4> 26: IDE_BASEADR<2> 3: A<16> 15: A<5> 27: IDE_BASEADR<3> 4: A<17> 16: A<6> 28: IDE_BASEADR<4> 5: A<18> 17: C1 29: IDE_BASEADR<5> 6: A<19> 18: C3 30: IDE_BASEADR<6> 7: A<1> 19: CP_WE_QUIRK 31: IDE_BASEADR<7> 8: A<20> 20: CP_WE_QUIRK/CP_WE_QUIRK_CLKF 32: LDS 9: A<21> 21: CP_WE_S 33: SHUT_UP<2> 10: A<22> 22: Dout1<3> 34: UDS 11: A<23> 23: Dout1<3>/Dout1<3>_CLKF 35: autoconfig 12: A<2> 24: IDE_BASEADR<0> 36: lan_adr_sw/lan_adr_sw_CLKF Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs CP_WE_QUIRK ...................XX................... 2 ide ..XXXX.XXXX............XXXXXXXX.X..X.... 18 CP_BASEADR<3>/CP_BASEADR<3>_CLKF ................XX...................... 2 CP_BASEADR<2>/CP_BASEADR<2>_CLKF ................XX...................... 2 CP_BASEADR<1>/CP_BASEADR<1>_CLKF ................XX...................... 2 CP_BASEADR<0>/CP_BASEADR<0>_CLKF ................XX...................... 2 AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF ................XX...................... 2 AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF ................XX...................... 2 AUTO_CONFIG_DONE<1>/AUTO_CONFIG_DONE<1>_CLKF ................XX...................... 2 AUTO_CONFIG_DONE<0>/AUTO_CONFIG_DONE<0>_CLKF ................XX...................... 2 ROM_B<0> ........................................ 0 AS_D X..................................X.... 2 ROM_B<1> ........................................ 0 Dout1<3> XX....X....XXXXX.....XX........X.XX..... 13 CP_WE X.................X.X................... 3 CP_BASEADR<4>/CP_BASEADR<4>_CLKF ................XX...................... 2 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB12 *********************************** Number of function block inputs used/remaining: 36/18 Number of signals used by logic mapping into function block: 36 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 \/5 0 FB12_1 (b) (b) D_IN<15> 10 5<- 0 0 FB12_2 110 I/O (b) ROM_OE_S 2 0 0 3 FB12_3 111 I/O I LAN_WRL_S 2 0 0 3 FB12_4 (b) (b) DQ<15> 2 0 0 3 FB12_5 112 I/O I/O LAN_IRQ_D0 2 0 0 3 FB12_6 (b) (b) IDE_W_S 2 0 0 3 FB12_7 (b) (b) DQ<13> 2 0 0 3 FB12_8 113 I/O I/O IDE_R_S 2 0 0 3 FB12_9 (b) (b) DQ<11> 4 0 0 1 FB12_10 115 I/O I/O IDE_ENABLE 2 0 0 3 FB12_11 (b) (b) DQ<9> 4 0 0 1 FB12_12 116 I/O I/O CP_RD_S 2 0 \/1 2 FB12_13 (b) (b) CP_WE_S 3 1<- \/3 0 FB12_14 (b) (b) LAN_INT_ENABLE 5 3<- \/3 0 FB12_15 (b) (b) LAN_IRQ_OUT 8 3<- 0 0 FB12_16 (b) (b) (unused) 0 0 \/5 0 FB12_17 (b) (b) D_IN<7> 10 5<- 0 0 FB12_18 (b) (b) Signals Used by Logic in Function Block 1: AS 13: IDE_ENABLE/IDE_ENABLE_CLKF 25: LAN_RST_SM_FSM_FFd3 2: A<15> 14: IDE_R_S/IDE_R_S_CLKF 26: LAN_WRL_S/LAN_WRL_S_CLKF 3: CP_CS 15: IDE_W_S/IDE_W_S_CLKF 27: LDS 4: CP_RD_S/CP_RD_S_CLKF 16: LAN_INT_ENABLE 28: D<15>.PIN 5: CP_WE_S/CP_WE_S_CLKF 17: LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF 29: D<14>.PIN 6: DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT 18: LAN_INT 30: D<7>.PIN 7: D_IN<11> 19: LAN_IRQ_D0 31: ROM_OE_S/ROM_OE_S_CLKF 8: D_IN<13> 20: LAN_IRQ_D0/LAN_IRQ_D0_CLKF 32: RW 9: D_IN<15> 21: LAN_IRQ_OUT 33: UDS 10: D_IN<7> 22: LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF 34: ide 11: D_IN<9> 23: LAN_RST_SM_FSM_FFd1 35: lan_adr 12: IDE_ENABLE 24: LAN_RST_SM_FSM_FFd2 36: lan_adr_sw Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs D_IN<15> ..X.....X.................XX.X..XXXX.... 9 ROM_OE_S X..........X..................XX.X...... 5 LAN_WRL_S .X.......................X.....XX.X..... 5 DQ<15> .....X..X..............XX............... 4 LAN_IRQ_D0 .................X.X.................... 2 IDE_W_S X.............X................X.X...... 4 DQ<13> .....X.X...............XX............... 4 IDE_R_S X..........X.X.................X.X...... 5 DQ<11> .....XX...............XXX............... 5 IDE_ENABLE X...........X..................X.X...... 4 DQ<9> .....X....X...........XXX............... 5 CP_RD_S X.XX...........................X........ 4 CP_WE_S ..X.X.....................X....XX....... 5 LAN_INT_ENABLE .X.............XX.........XX...XX.X..... 8 LAN_IRQ_OUT .X.............X.XX.XX....X.X..XX.X..... 11 D_IN<7> ..X......X................XX.X..XXXX.... 9 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB13 *********************************** Number of function block inputs used/remaining: 37/17 Number of signals used by logic mapping into function block: 37 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 0 5 FB13_1 (b) CP_RD 2 0 0 3 FB13_2 71 I/O O (unused) 0 0 0 5 FB13_3 (b) (unused) 0 0 0 5 FB13_4 (b) (unused) 0 0 0 5 FB13_5 (b) (unused) 0 0 0 5 FB13_6 (b) (unused) 0 0 0 5 FB13_7 (b) (unused) 0 0 0 5 FB13_8 74 I/O I (unused) 0 0 0 5 FB13_9 (b) (unused) 0 0 0 5 FB13_10 (b) LAN_BASEADR<5> 5 0 0 0 FB13_11 75 I/O I LAN_BASEADR<4> 5 0 0 0 FB13_12 (b) (b) IDE_BASEADR<5> 5 0 0 0 FB13_13 (b) (b) LAN_WRL 5 0 0 0 FB13_14 76 I/O O IDE_BASEADR<4> 5 0 0 0 FB13_15 77 I/O (b) CP_BASEADR<6> 5 0 0 0 FB13_16 (b) (b) CP_BASEADR<5> 5 0 0 0 FB13_17 78 I/O (b) CP_BASEADR<4> 5 0 0 0 FB13_18 (b) (b) Signals Used by Logic in Function Block 1: AS_D 14: CP_BASEADR<5>/CP_BASEADR<5>_CLKF 26: LAN_RST_SM_FSM_FFd1 2: AS 15: CP_BASEADR<6> 27: LAN_RST_SM_FSM_FFd2 3: AUTO_CONFIG_DONE<0> 16: CP_BASEADR<6>/CP_BASEADR<6>_CLKF 28: LAN_RST_SM_FSM_FFd3 4: AUTO_CONFIG_DONE<1> 17: CP_RD_S 29: LAN_WRL_S 5: A<1> 18: IDE_BASEADR<4> 30: LAN_WR_RST 6: A<2> 19: IDE_BASEADR<4>/IDE_BASEADR<4>_CLKF 31: LDS 7: A<3> 20: IDE_BASEADR<5> 32: D<14>.PIN 8: A<4> 21: IDE_BASEADR<5>/IDE_BASEADR<5>_CLKF 33: D<13>.PIN 9: A<5> 22: LAN_BASEADR<4> 34: D<12>.PIN 10: A<6> 23: LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF 35: RW 11: CP_BASEADR<4> 24: LAN_BASEADR<5> 36: UDS 12: CP_BASEADR<4>/CP_BASEADR<4>_CLKF 25: LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF 37: autoconfig 13: CP_BASEADR<5> Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs CP_RD XX..............X....................... 3 LAN_BASEADR<5> .XXXXXXXXX.............XX.....X.X.XXX... 16 LAN_BASEADR<4> .XXXXXXXXX...........XX.......X..XXXX... 16 IDE_BASEADR<5> .XXXXXXXXX.........XX.........X.X.XXX... 16 LAN_WRL .X.......................XXXXX.......... 6 IDE_BASEADR<4> .XXXXXXXXX.......XX...........X..XXXX... 16 CP_BASEADR<6> .XXXXXXXXX....XX..............XX..XXX... 16 CP_BASEADR<5> .XXXXXXXXX..XX................X.X.XXX... 16 CP_BASEADR<4> .XXXXXXXXXXX..................X..XXXX... 16 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB14 *********************************** Number of function block inputs used/remaining: 37/17 Number of signals used by logic mapping into function block: 37 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 0 5 FB14_1 (b) (unused) 0 0 0 5 FB14_2 (b) OVR 0 0 0 5 FB14_3 100 I/O O (unused) 0 0 0 5 FB14_4 (b) (unused) 0 0 0 5 FB14_5 101 I/O (unused) 0 0 0 5 FB14_6 102 I/O I (unused) 0 0 0 5 FB14_7 (b) LAN_BASEADR<7> 5 0 0 0 FB14_8 103 I/O I LAN_BASEADR<6> 5 0 0 0 FB14_9 (b) (b) LAN_BASEADR<3> 5 0 0 0 FB14_10 104 I/O I CFOUT 1 0 0 4 FB14_11 105 I/O O LAN_BASEADR<1> 5 0 0 0 FB14_12 (b) (b) IDE_BASEADR<7> 5 0 0 0 FB14_13 (b) (b) SLAVE 2 0 0 3 FB14_14 106 I/O O OWN 0 0 0 5 FB14_15 107 I/O O IDE_BASEADR<6> 5 0 0 0 FB14_16 (b) (b) IDE_BASEADR<1> 5 0 0 0 FB14_17 (b) (b) CP_BASEADR<7> 5 0 0 0 FB14_18 (b) (b) Signals Used by Logic in Function Block 1: AS_D 14: IDE_BASEADR<1> 26: LAN_BASEADR<7> 2: AS 15: IDE_BASEADR<1>/IDE_BASEADR<1>_CLKF 27: LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF 3: AUTO_CONFIG_DONE<0> 16: IDE_BASEADR<6> 28: LDS 4: AUTO_CONFIG_DONE<1> 17: IDE_BASEADR<6>/IDE_BASEADR<6>_CLKF 29: D<15>.PIN 5: A<1> 18: IDE_BASEADR<7> 30: D<14>.PIN 6: A<2> 19: IDE_BASEADR<7>/IDE_BASEADR<7>_CLKF 31: D<11>.PIN 7: A<3> 20: LAN_BASEADR<1> 32: D<9>.PIN 8: A<4> 21: LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF 33: RW 9: A<5> 22: LAN_BASEADR<3> 34: UDS 10: A<6> 23: LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF 35: autoconfig 11: CP_BASEADR<7> 24: LAN_BASEADR<6> 36: ide 12: CP_BASEADR<7>/CP_BASEADR<7>_CLKF 25: LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF 37: lan_adr 13: CP_CS Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs OVR ........................................ 0 LAN_BASEADR<7> .XXXXXXXXX...............XXXX...XXX..... 16 LAN_BASEADR<6> .XXXXXXXXX.............XX..X.X..XXX..... 16 LAN_BASEADR<3> .XXXXXXXXX...........XX....X..X.XXX..... 16 CFOUT ..XX.................................... 2 LAN_BASEADR<1> .XXXXXXXXX.........XX......X...XXXX..... 16 IDE_BASEADR<7> .XXXXXXXXX.......XX........XX...XXX..... 16 SLAVE XX..........X.....................XXX... 6 OWN ........................................ 0 IDE_BASEADR<6> .XXXXXXXXX.....XX..........X.X..XXX..... 16 IDE_BASEADR<1> .XXXXXXXXX...XX............X...XXXX..... 16 CP_BASEADR<7> .XXXXXXXXXXX...............XX...XXX..... 16 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB15 *********************************** Number of function block inputs used/remaining: 2/52 Number of signals used by logic mapping into function block: 2 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use LAN_WRL_S/LAN_WRL_S_CLKF 2 0 0 3 FB15_1 (b) (b) LAN_WRH_S/LAN_WRH_S_CLKF 2 0 0 3 FB15_2 79 I/O (b) LAN_RD_S/LAN_RD_S_CLKF 2 0 0 3 FB15_3 80 I/O I LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF 2 0 0 3 FB15_4 (b) (b) LAN_IRQ_D0/LAN_IRQ_D0_CLKF 2 0 0 3 FB15_5 (b) (b) LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF 2 0 0 3 FB15_6 (b) (b) LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF 2 0 0 3 FB15_7 (b) (b) LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF 2 0 0 3 FB15_8 81 I/O I LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF 2 0 0 3 FB15_9 (b) (b) LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF 2 0 0 3 FB15_10 82 I/O I LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF 2 0 0 3 FB15_11 83 I/O I DTACK 0 0 0 5 FB15_12 85 I/O O LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF 2 0 0 3 FB15_13 (b) (b) LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF 2 0 0 3 FB15_14 86 I/O I LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF 2 0 0 3 FB15_15 87 I/O I IDE_W_S/IDE_W_S_CLKF 2 0 0 3 FB15_16 (b) (b) IDE_R_S/IDE_R_S_CLKF 2 0 0 3 FB15_17 88 I/O I IDE_ENABLE/IDE_ENABLE_CLKF 2 0 0 3 FB15_18 (b) (b) Signals Used by Logic in Function Block 1: C1 2: C3 Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs LAN_WRL_S/LAN_WRL_S_CLKF XX...................................... 2 LAN_WRH_S/LAN_WRH_S_CLKF XX...................................... 2 LAN_RD_S/LAN_RD_S_CLKF XX...................................... 2 LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF XX...................................... 2 LAN_IRQ_D0/LAN_IRQ_D0_CLKF XX...................................... 2 LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF XX...................................... 2 LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF XX...................................... 2 LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF XX...................................... 2 LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF XX...................................... 2 LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF XX...................................... 2 LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF XX...................................... 2 DTACK ........................................ 0 LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF XX...................................... 2 LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF XX...................................... 2 LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF XX...................................... 2 IDE_W_S/IDE_W_S_CLKF XX...................................... 2 IDE_R_S/IDE_R_S_CLKF XX...................................... 2 IDE_ENABLE/IDE_ENABLE_CLKF XX...................................... 2 0----+----1----+----2----+----3----+----4 0 0 0 0 *********************************** FB16 *********************************** Number of function block inputs used/remaining: 2/52 Number of signals used by logic mapping into function block: 2 Signal Total Imp Exp Unused Loc Pin Pin Pin Name Pt Pt Pt Pt # Type Use (unused) 0 0 0 5 FB16_1 (b) (unused) 0 0 0 5 FB16_2 91 I/O I (unused) 0 0 0 5 FB16_3 92 I/O I (unused) 0 0 0 5 FB16_4 (b) (unused) 0 0 0 5 FB16_5 93 I/O (unused) 0 0 0 5 FB16_6 94 I/O I (unused) 0 0 0 5 FB16_7 (b) (unused) 0 0 0 5 FB16_8 95 I/O I (unused) 0 0 0 5 FB16_9 (b) MTACK 0 0 0 5 FB16_10 96 I/O O (unused) 0 0 0 5 FB16_11 97 I/O I (unused) 0 0 0 5 FB16_12 98 I/O (unused) 0 0 0 5 FB16_13 (b) lan_adr_sw/lan_adr_sw_CLKF 2 0 0 3 FB16_14 (b) (b) SHUT_UP<2>/SHUT_UP<2>_CLKF 2 0 0 3 FB16_15 (b) (b) SHUT_UP<1>/SHUT_UP<1>_CLKF 2 0 0 3 FB16_16 (b) (b) SHUT_UP<0>/SHUT_UP<0>_CLKF 2 0 0 3 FB16_17 (b) (b) ROM_OE_S/ROM_OE_S_CLKF 2 0 0 3 FB16_18 (b) (b) Signals Used by Logic in Function Block 1: C1 2: C3 Signal 1 2 3 4 FB Name 0----+----0----+----0----+----0----+----0 Inputs MTACK ........................................ 0 lan_adr_sw/lan_adr_sw_CLKF XX...................................... 2 SHUT_UP<2>/SHUT_UP<2>_CLKF XX...................................... 2 SHUT_UP<1>/SHUT_UP<1>_CLKF XX...................................... 2 SHUT_UP<0>/SHUT_UP<0>_CLKF XX...................................... 2 ROM_OE_S/ROM_OE_S_CLKF XX...................................... 2 0----+----1----+----2----+----3----+----4 0 0 0 0 ******************************* Equations ******************************** ********** Mapped Logic ********** $OpTx$INV$125__$INT <= ((NOT RW) OR (NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (AS AND AS_D)); FDCPE_AS_D: FDCPE port map (AS_D,AS,lan_adr_sw/lan_adr_sw_CLKF,'0','0'); AUTO_CONFIG_DONE(0)/AUTO_CONFIG_DONE(0)_CLKF <= C3 XOR AUTO_CONFIG_DONE(0)/AUTO_CONFIG_DONE(0)_CLKF <= C1; FDCPE_AUTO_CONFIG_DONE0: FDCPE port map (AUTO_CONFIG_DONE(0),AUTO_CONFIG_DONE_CYCLE(0),AUTO_CONFIG_DONE(0)/AUTO_CONFIG_DONE(0)_CLKF,'0',NOT RESET,AS); AUTO_CONFIG_DONE(1)/AUTO_CONFIG_DONE(1)_CLKF <= C3 XOR AUTO_CONFIG_DONE(1)/AUTO_CONFIG_DONE(1)_CLKF <= C1; FDCPE_AUTO_CONFIG_DONE1: FDCPE port map (AUTO_CONFIG_DONE(1),AUTO_CONFIG_DONE_CYCLE(1),AUTO_CONFIG_DONE(1)/AUTO_CONFIG_DONE(1)_CLKF,'0',NOT RESET,AS); FTCPE_AUTO_CONFIG_DONE_CYCLE0: FTCPE port map (AUTO_CONFIG_DONE_CYCLE(0),AUTO_CONFIG_DONE_CYCLE_T(0),AUTO_CONFIG_DONE_CYCLE(0)/AUTO_CONFIG_DONE_CYCLE(0)_CLKF,'0',NOT RESET); AUTO_CONFIG_DONE_CYCLE_T(0) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(0) AND NOT AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND AUTOBOOT_OFF) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND AUTOBOOT_OFF) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2) AND NOT AUTOBOOT_OFF) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2) AND NOT AUTOBOOT_OFF) OR (NOT AS AND AUTO_CONFIG_DONE(0) AND AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS) OR (NOT AS AND AUTO_CONFIG_DONE(0) AND AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS) OR (NOT AS AND NOT AUTO_CONFIG_DONE(0) AND NOT AUTO_CONFIG_DONE_CYCLE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND A(2))); AUTO_CONFIG_DONE_CYCLE(0)/AUTO_CONFIG_DONE_CYCLE(0)_CLKF <= C3 XOR AUTO_CONFIG_DONE_CYCLE(0)/AUTO_CONFIG_DONE_CYCLE(0)_CLKF <= C1; AUTO_CONFIG_DONE_CYCLE(1)/AUTO_CONFIG_DONE_CYCLE(1)_CLKF <= C3 XOR AUTO_CONFIG_DONE_CYCLE(1)/AUTO_CONFIG_DONE_CYCLE(1)_CLKF <= C1; FTCPE_AUTO_CONFIG_DONE_CYCLE1: FTCPE port map (AUTO_CONFIG_DONE_CYCLE(1),AUTO_CONFIG_DONE_CYCLE_T(1),AUTO_CONFIG_DONE_CYCLE(1)/AUTO_CONFIG_DONE_CYCLE(1)_CLKF,'0',NOT RESET); AUTO_CONFIG_DONE_CYCLE_T(1) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND AUTO_CONFIG_DONE_CYCLE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS)); A_LAN(0) <= NOT (((NOT A(1) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3) OR (NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3))); A_LAN(1) <= NOT (((NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3) OR (NOT A(2) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3))); A_LAN(2) <= NOT (((NOT A(1) AND NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3) OR (NOT A(3) AND lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3))); A_LAN(3) <= ((A(4) AND lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3) OR (NOT lan_adr AND A(2) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3)); A_LAN(4) <= NOT (((NOT A(5) AND lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3) OR (NOT A(3) AND NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3))); A_LAN(5) <= NOT (((NOT A(4) AND NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3) OR (NOT A(6) AND lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3))); A_LAN(6) <= ((LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1) OR (LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1) OR (A(5) AND NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3) OR (lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND A(7))); A_LAN(7) <= NOT (((lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(8)) OR (NOT A(6) AND NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3))); A_LAN(8) <= NOT (((lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(9)) OR (NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(7)))); A_LAN(9) <= NOT (((NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(8)) OR (lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(10)))); A_LAN(10) <= NOT (((lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(11)) OR (NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(9)))); A_LAN(11) <= NOT (((lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(12)) OR (NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(10)))); A_LAN(12) <= NOT (((lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(13)) OR (NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(11)))); A_LAN(13) <= NOT (((lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(14)) OR (NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(12)))); CFOUT <= NOT ((NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0))); FTCPE_CP_BASEADR0: FTCPE port map (CP_BASEADR(0),CP_BASEADR_T(0),CP_BASEADR(0)/CP_BASEADR(0)_CLKF,'0',NOT RESET); CP_BASEADR_T(0) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(8).PIN AND NOT CP_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(8).PIN AND NOT CP_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(8).PIN AND CP_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(8).PIN AND CP_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); CP_BASEADR(0)/CP_BASEADR(0)_CLKF <= C3 XOR CP_BASEADR(0)/CP_BASEADR(0)_CLKF <= C1; CP_BASEADR(1)/CP_BASEADR(1)_CLKF <= C3 XOR CP_BASEADR(1)/CP_BASEADR(1)_CLKF <= C1; FTCPE_CP_BASEADR1: FTCPE port map (CP_BASEADR(1),CP_BASEADR_T(1),CP_BASEADR(1)/CP_BASEADR(1)_CLKF,'0',NOT RESET); CP_BASEADR_T(1) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(9).PIN AND NOT CP_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(9).PIN AND NOT CP_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(9).PIN AND CP_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(9).PIN AND CP_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); FTCPE_CP_BASEADR2: FTCPE port map (CP_BASEADR(2),CP_BASEADR_T(2),CP_BASEADR(2)/CP_BASEADR(2)_CLKF,'0',NOT RESET); CP_BASEADR_T(2) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(10).PIN AND NOT CP_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(10).PIN AND NOT CP_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(10).PIN AND CP_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(10).PIN AND CP_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); CP_BASEADR(2)/CP_BASEADR(2)_CLKF <= C3 XOR CP_BASEADR(2)/CP_BASEADR(2)_CLKF <= C1; CP_BASEADR(3)/CP_BASEADR(3)_CLKF <= C3 XOR CP_BASEADR(3)/CP_BASEADR(3)_CLKF <= C1; FTCPE_CP_BASEADR3: FTCPE port map (CP_BASEADR(3),CP_BASEADR_T(3),CP_BASEADR(3)/CP_BASEADR(3)_CLKF,'0',NOT RESET); CP_BASEADR_T(3) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(11).PIN AND NOT CP_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(11).PIN AND NOT CP_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(11).PIN AND CP_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(11).PIN AND CP_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); FTCPE_CP_BASEADR4: FTCPE port map (CP_BASEADR(4),CP_BASEADR_T(4),CP_BASEADR(4)/CP_BASEADR(4)_CLKF,'0',NOT RESET); CP_BASEADR_T(4) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(12).PIN AND NOT CP_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(12).PIN AND NOT CP_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(12).PIN AND CP_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(12).PIN AND CP_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); CP_BASEADR(4)/CP_BASEADR(4)_CLKF <= C3 XOR CP_BASEADR(4)/CP_BASEADR(4)_CLKF <= C1; CP_BASEADR(5)/CP_BASEADR(5)_CLKF <= C3 XOR CP_BASEADR(5)/CP_BASEADR(5)_CLKF <= C1; FTCPE_CP_BASEADR5: FTCPE port map (CP_BASEADR(5),CP_BASEADR_T(5),CP_BASEADR(5)/CP_BASEADR(5)_CLKF,'0',NOT RESET); CP_BASEADR_T(5) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(13).PIN AND NOT CP_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(13).PIN AND NOT CP_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(13).PIN AND CP_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(13).PIN AND CP_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); FTCPE_CP_BASEADR6: FTCPE port map (CP_BASEADR(6),CP_BASEADR_T(6),CP_BASEADR(6)/CP_BASEADR(6)_CLKF,'0',NOT RESET); CP_BASEADR_T(6) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(14).PIN AND NOT CP_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(14).PIN AND NOT CP_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(14).PIN AND CP_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(14).PIN AND CP_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); CP_BASEADR(6)/CP_BASEADR(6)_CLKF <= C3 XOR CP_BASEADR(6)/CP_BASEADR(6)_CLKF <= C1; FTCPE_CP_BASEADR7: FTCPE port map (CP_BASEADR(7),CP_BASEADR_T(7),CP_BASEADR(7)/CP_BASEADR(7)_CLKF,'0',NOT RESET); CP_BASEADR_T(7) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(15).PIN AND NOT CP_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND D(15).PIN AND NOT CP_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(15).PIN AND CP_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT D(15).PIN AND CP_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); CP_BASEADR(7)/CP_BASEADR(7)_CLKF <= C3 XOR CP_BASEADR(7)/CP_BASEADR(7)_CLKF <= C1; FDCPE_CP_CS: FDCPE port map (CP_CS,CP_CS_D,lan_adr_sw/lan_adr_sw_CLKF,'0',NOT RESET); CP_CS_D <= ((SHUT_UP(1)) OR (EXP44_.EXP) OR (CP_BASEADR(1) AND NOT A(17)) OR (CP_BASEADR(3) AND NOT A(19)) OR (NOT CP_BASEADR(3) AND A(19)) OR (CP_BASEADR(4) AND NOT A(20)) OR (NOT CP_BASEADR(4) AND A(20)) OR (CP_BASEADR(0) AND NOT A(16)) OR (NOT CP_BASEADR(0) AND A(16)) OR (NOT CP_BASEADR(1) AND A(17))); CP_RD <= ((CP_RD_S) OR (AS AND AS_D)); FDCPE_CP_RD_S: FDCPE port map (CP_RD_S,CP_RD_S_D,CP_RD_S/CP_RD_S_CLKF,'0',NOT RESET); CP_RD_S_D <= (NOT AS AND RW AND NOT CP_CS); CP_RD_S/CP_RD_S_CLKF <= C3 XOR CP_RD_S/CP_RD_S_CLKF <= C1; CP_WE <= NOT ((NOT AS AND NOT CP_WE_S AND CP_WE_QUIRK)); FDCPE_CP_WE_QUIRK: FDCPE port map (CP_WE_QUIRK,CP_WE_S,CP_WE_QUIRK/CP_WE_QUIRK_CLKF,'0',NOT RESET); CP_WE_QUIRK/CP_WE_QUIRK_CLKF <= C3 XOR CP_WE_QUIRK/CP_WE_QUIRK_CLKF <= C1; FDCPE_CP_WE_S: FDCPE port map (CP_WE_S,CP_WE_S_D,CP_WE_S/CP_WE_S_CLKF,'0',NOT RESET); CP_WE_S_D <= ((NOT RW AND NOT UDS AND NOT CP_CS) OR (NOT RW AND NOT LDS AND NOT CP_CS)); CP_WE_S/CP_WE_S_CLKF <= C3 XOR CP_WE_S/CP_WE_S_CLKF <= C1; FDCPE_D0: FDCPE port map (D_I(0),D(0),CLK_EXT,'0','0'); D(0) <= ((NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(0).PIN) OR (NOT D(0) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND NOT DQ(0).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(0).PIN) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND NOT DQ(8).PIN AND CP_CS) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND NOT DQ(8).PIN AND CP_CS) OR (NOT D(0) AND LDS AND UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(0).PIN AND NOT CP_CS) OR (NOT autoconfig AND NOT UDS AND NOT DQ(0).PIN AND NOT CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(0).PIN)); D(0) <= D_I(0) when D_OE(0) = '1' else 'Z'; D_OE(0) <= NOT $OpTx$INV$125__$INT; FDCPE_D1: FDCPE port map (D_I(1),D(1),CLK_EXT,'0','0'); D(1) <= ((D_OUT(8).EXP) OR (NOT D(1) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(1).PIN) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND NOT DQ(1).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(1).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(1).PIN) OR (NOT D(1) AND LDS AND UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(1).PIN AND NOT CP_CS) OR (NOT autoconfig AND NOT UDS AND NOT DQ(1).PIN AND NOT CP_CS)); D(1) <= D_I(1) when D_OE(1) = '1' else 'Z'; D_OE(1) <= NOT $OpTx$INV$125__$INT; FDCPE_D2: FDCPE port map (D_I(2),D(2),CLK_EXT,'0','0'); D(2) <= ((EXP45_.EXP) OR (NOT D(2) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(2).PIN) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND NOT DQ(2).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(2).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(2).PIN) OR (NOT D(2) AND LDS AND UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(2).PIN AND NOT CP_CS) OR (NOT autoconfig AND NOT UDS AND NOT DQ(2).PIN AND NOT CP_CS)); D(2) <= D_I(2) when D_OE(2) = '1' else 'Z'; D_OE(2) <= NOT $OpTx$INV$125__$INT; FDCPE_D3: FDCPE port map (D_I(3),D(3),CLK_EXT,'0','0'); D(3) <= ((D_OUT(6).EXP) OR (NOT D(3) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND NOT DQ(3).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(3).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(3).PIN) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND NOT DQ(11).PIN AND CP_CS) OR (NOT D(3) AND LDS AND UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(3).PIN AND NOT CP_CS) OR (NOT autoconfig AND NOT UDS AND NOT DQ(3).PIN AND NOT CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(3).PIN)); D(3) <= D_I(3) when D_OE(3) = '1' else 'Z'; D_OE(3) <= NOT $OpTx$INV$125__$INT; FDCPE_D4: FDCPE port map (D_I(4),D(4),CLK_EXT,'0','0'); D(4) <= ((IDE_CS_0_OBUF.EXP) OR (NOT D(4) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(4).PIN) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND NOT DQ(4).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(4).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(4).PIN) OR (NOT D(4) AND LDS AND UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(4).PIN AND NOT CP_CS) OR (NOT autoconfig AND NOT UDS AND NOT DQ(4).PIN AND NOT CP_CS)); D(4) <= D_I(4) when D_OE(4) = '1' else 'Z'; D_OE(4) <= NOT $OpTx$INV$125__$INT; FDCPE_D5: FDCPE port map (D_I(5),D(5),CLK_EXT,'0','0'); D(5) <= ((NOT D(5) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND NOT DQ(5).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(5).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(5).PIN) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND NOT DQ(13).PIN AND CP_CS) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND NOT DQ(13).PIN AND CP_CS) OR (NOT D(5) AND LDS AND UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(5).PIN AND NOT CP_CS) OR (NOT autoconfig AND NOT UDS AND NOT DQ(5).PIN AND NOT CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(5).PIN)); D(5) <= D_I(5) when D_OE(5) = '1' else 'Z'; D_OE(5) <= NOT $OpTx$INV$125__$INT; FDCPE_D6: FDCPE port map (D_I(6),D(6),CLK_EXT,'0','0'); D(6) <= ((D_IN(8).EXP) OR (NOT D(6) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(6).PIN) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND NOT DQ(6).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(6).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(6).PIN) OR (NOT D(6) AND LDS AND UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(6).PIN AND NOT CP_CS) OR (NOT autoconfig AND NOT UDS AND NOT DQ(6).PIN AND NOT CP_CS)); D(6) <= D_I(6) when D_OE(6) = '1' else 'Z'; D_OE(6) <= NOT $OpTx$INV$125__$INT; FDCPE_D7: FDCPE port map (D_I(7),D(7),CLK_EXT,'0','0'); D(7) <= ((NOT D(7) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND NOT DQ(7).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(7).PIN) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(7).PIN) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND NOT DQ(15).PIN AND CP_CS) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND NOT DQ(15).PIN AND CP_CS) OR (NOT D(7) AND LDS AND UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(7).PIN AND NOT CP_CS) OR (NOT autoconfig AND NOT UDS AND NOT DQ(7).PIN AND NOT CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(7).PIN)); D(7) <= D_I(7) when D_OE(7) = '1' else 'Z'; D_OE(7) <= NOT $OpTx$INV$125__$INT; FDCPE_D8: FDCPE port map (D_I(8),D(8),CLK_EXT,'0','0'); D(8) <= ((EXP26_.EXP) OR (NOT autoconfig AND NOT UDS AND NOT DQ(0).PIN AND NOT CP_CS) OR (NOT D(8) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND NOT DQ(0).PIN) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND NOT DQ(0).PIN) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(8).PIN AND CP_CS) OR (NOT D(8) AND LDS AND UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(0).PIN AND NOT CP_CS)); D(8) <= D_I(8) when D_OE(8) = '1' else 'Z'; D_OE(8) <= NOT $OpTx$INV$125__$INT; FDCPE_D9: FDCPE port map (D_I(9),D(9),CLK_EXT,'0','0'); D(9) <= ((D_OUT(2).EXP) OR (NOT D(9) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND NOT DQ(1).PIN) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(9).PIN AND CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND NOT DQ(9).PIN AND CP_CS) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(9).PIN AND CP_CS) OR (NOT D(9) AND LDS AND UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(1).PIN AND NOT CP_CS) OR (NOT autoconfig AND NOT UDS AND NOT DQ(1).PIN AND NOT CP_CS) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND NOT DQ(1).PIN)); D(9) <= D_I(9) when D_OE(9) = '1' else 'Z'; D_OE(9) <= NOT $OpTx$INV$125__$INT; FDCPE_D10: FDCPE port map (D_I(10),D(10),CLK_EXT,'0','0'); D(10) <= ((NOT D(10) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND NOT DQ(2).PIN) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(10).PIN AND CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND NOT DQ(10).PIN AND CP_CS) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(10).PIN AND CP_CS) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(10).PIN AND CP_CS) OR (NOT D(10) AND LDS AND UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(2).PIN AND NOT CP_CS) OR (NOT autoconfig AND NOT UDS AND NOT DQ(2).PIN AND NOT CP_CS) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND NOT DQ(2).PIN)); D(10) <= D_I(10) when D_OE(10) = '1' else 'Z'; D_OE(10) <= NOT $OpTx$INV$125__$INT; FDCPE_D11: FDCPE port map (D_I(11),D(11),CLK_EXT,'0','0'); D(11) <= ((D_OUT(12).EXP) OR (NOT D(11) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND NOT DQ(3).PIN) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND NOT DQ(3).PIN) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(11).PIN AND CP_CS) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(11).PIN AND CP_CS) OR (NOT D(11) AND LDS AND UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(3).PIN AND NOT CP_CS) OR (NOT autoconfig AND NOT UDS AND NOT DQ(3).PIN AND NOT CP_CS)); D(11) <= D_I(11) when D_OE(11) = '1' else 'Z'; D_OE(11) <= NOT $OpTx$INV$125__$INT; FDCPE_D12: FDCPE port map (D_I(12),D(12),CLK_EXT,'0','0'); D(12) <= ((EXP42_.EXP) OR (NOT D(12) AND LDS AND UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(4).PIN AND NOT CP_CS) OR (NOT autoconfig AND NOT UDS AND NOT DQ(4).PIN AND NOT CP_CS) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND NOT DQ(4).PIN) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND NOT DQ(4).PIN) OR (NOT Dout1(0) AND autoconfig AND NOT LDS) OR (NOT Dout1(0) AND autoconfig AND NOT UDS)); D(12) <= D_I(12) when D_OE(12) = '1' else 'Z'; D_OE(12) <= NOT $OpTx$INV$125__$INT; FDCPE_D13: FDCPE port map (D_I(13),D(13),CLK_EXT,'0','0'); D(13) <= ((NOT autoconfig AND NOT UDS AND NOT DQ(5).PIN AND NOT CP_CS) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND NOT DQ(5).PIN) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND NOT DQ(5).PIN) OR (NOT D(13) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(13).PIN AND CP_CS) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT UDS AND NOT DQ(13).PIN AND CP_CS) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT LDS AND NOT DQ(13).PIN AND CP_CS) OR (NOT lan_adr AND NOT autoconfig AND ide AND NOT UDS AND NOT DQ(13).PIN AND CP_CS) OR (NOT D(13) AND LDS AND UDS) OR (NOT Dout1(1) AND autoconfig AND NOT LDS) OR (NOT Dout1(1) AND autoconfig AND NOT UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(5).PIN AND NOT CP_CS)); D(13) <= D_I(13) when D_OE(13) = '1' else 'Z'; D_OE(13) <= NOT $OpTx$INV$125__$INT; FDCPE_D14: FDCPE port map (D_I(14),D(14),CLK_EXT,'0','0'); D(14) <= ((EXP58_.EXP) OR (NOT autoconfig AND NOT UDS AND NOT DQ(6).PIN AND NOT CP_CS) OR (NOT D(14) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND NOT DQ(6).PIN) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND NOT DQ(6).PIN) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(14).PIN AND CP_CS) OR (NOT D(14) AND LDS AND UDS) OR (NOT Dout1(2) AND autoconfig AND NOT LDS) OR (NOT Dout1(2) AND autoconfig AND NOT UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(6).PIN AND NOT CP_CS)); D(14) <= D_I(14) when D_OE(14) = '1' else 'Z'; D_OE(14) <= NOT $OpTx$INV$125__$INT; FDCPE_D15: FDCPE port map (D_I(15),D(15),CLK_EXT,'0','0'); D(15) <= (($OpTx$INV$125__$INT.EXP) OR (NOT autoconfig AND NOT UDS AND NOT DQ(7).PIN AND NOT CP_CS) OR (NOT D(15) AND NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT LDS AND NOT DQ(7).PIN) OR (lan_adr AND NOT autoconfig AND lan_adr_sw AND NOT UDS AND NOT DQ(7).PIN) OR (lan_adr AND NOT autoconfig AND NOT lan_adr_sw AND NOT LDS AND NOT DQ(15).PIN AND CP_CS) OR (NOT D(15) AND LDS AND UDS) OR (NOT Dout1(3) AND autoconfig AND NOT LDS) OR (NOT Dout1(3) AND autoconfig AND NOT UDS) OR (NOT autoconfig AND NOT LDS AND NOT DQ(7).PIN AND NOT CP_CS)); D(15) <= D_I(15) when D_OE(15) = '1' else 'Z'; D_OE(15) <= NOT $OpTx$INV$125__$INT; DQ_I(0) <= (D_IN(0) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3); DQ(0) <= DQ_I(0) when DQ_OE(0) = '1' else 'Z'; DQ_OE(0) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(1) <= (D_IN(1) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3); DQ(1) <= DQ_I(1) when DQ_OE(1) = '1' else 'Z'; DQ_OE(1) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(2) <= (D_IN(2) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3); DQ(2) <= DQ_I(2) when DQ_OE(2) = '1' else 'Z'; DQ_OE(2) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(3) <= (D_IN(3) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3); DQ(3) <= DQ_I(3) when DQ_OE(3) = '1' else 'Z'; DQ_OE(3) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(4) <= NOT (((NOT D_IN(4) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3) OR (LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1) OR (LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1))); DQ(4) <= DQ_I(4) when DQ_OE(4) = '1' else 'Z'; DQ_OE(4) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(5) <= (D_IN(5) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3); DQ(5) <= DQ_I(5) when DQ_OE(5) = '1' else 'Z'; DQ_OE(5) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(6) <= (D_IN(6) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3); DQ(6) <= DQ_I(6) when DQ_OE(6) = '1' else 'Z'; DQ_OE(6) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(7) <= (D_IN(7) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3); DQ(7) <= DQ_I(7) when DQ_OE(7) = '1' else 'Z'; DQ_OE(7) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(8) <= NOT (((NOT D_IN(8) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3) OR (LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1) OR (LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1))); DQ(8) <= DQ_I(8) when DQ_OE(8) = '1' else 'Z'; DQ_OE(8) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(9) <= ((LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1) OR (LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1) OR (D_IN(9) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3)); DQ(9) <= DQ_I(9) when DQ_OE(9) = '1' else 'Z'; DQ_OE(9) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(10) <= ((LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1) OR (LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1) OR (D_IN(10) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3)); DQ(10) <= DQ_I(10) when DQ_OE(10) = '1' else 'Z'; DQ_OE(10) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(11) <= ((LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1) OR (LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1) OR (D_IN(11) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3)); DQ(11) <= DQ_I(11) when DQ_OE(11) = '1' else 'Z'; DQ_OE(11) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(12) <= (D_IN(12) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3); DQ(12) <= DQ_I(12) when DQ_OE(12) = '1' else 'Z'; DQ_OE(12) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(13) <= (D_IN(13) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3); DQ(13) <= DQ_I(13) when DQ_OE(13) = '1' else 'Z'; DQ_OE(13) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(14) <= (D_IN(14) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3); DQ(14) <= DQ_I(14) when DQ_OE(14) = '1' else 'Z'; DQ_OE(14) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_I(15) <= (D_IN(15) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3); DQ(15) <= DQ_I(15) when DQ_OE(15) = '1' else 'Z'; DQ_OE(15) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT; DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT <= ((AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3) OR (RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3) OR (NOT lan_adr AND NOT ide AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND CP_CS)); DTACK_I <= '0'; DTACK <= DTACK_I when DTACK_OE = '1' else 'Z'; DTACK_OE <= '0'; FDCPE_D_IN0: FDCPE port map (D_IN(0),D_IN_D(0),CLK_EXT,'0','0'); D_IN_D(0) <= ((NOT lan_adr AND NOT ide AND NOT D_IN(0) AND CP_CS) OR (NOT D(8).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS) OR (NOT D(8).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS) OR (NOT D(8).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS) OR (NOT D(8).PIN AND NOT lan_adr AND NOT ide AND NOT UDS AND NOT CP_CS) OR (ide AND NOT LDS AND NOT D(0).PIN) OR (ide AND NOT UDS AND NOT D(0).PIN) OR (LDS AND UDS AND NOT D_IN(0)) OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND NOT D(0).PIN) OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND NOT D(0).PIN)); FDCPE_D_IN1: FDCPE port map (D_IN(1),D_IN_D(1),CLK_EXT,'0','0'); D_IN_D(1) <= ((NOT D(9).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS) OR (NOT D(9).PIN AND NOT lan_adr AND NOT ide AND NOT UDS AND NOT CP_CS) OR (NOT lan_adr AND NOT ide AND NOT D_IN(1) AND CP_CS) OR (NOT D(9).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS) OR (NOT D(9).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS) OR (ide AND NOT LDS AND NOT D(1).PIN) OR (ide AND NOT UDS AND NOT D(1).PIN) OR (LDS AND UDS AND NOT D_IN(1)) OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND NOT D(1).PIN) OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND NOT D(1).PIN)); FDCPE_D_IN2: FDCPE port map (D_IN(2),D_IN_D(2),CLK_EXT,'0','0'); D_IN_D(2) <= ((NOT lan_adr AND NOT ide AND NOT D_IN(2) AND CP_CS) OR (NOT D(10).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS) OR (NOT D(10).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS) OR (NOT D(10).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS) OR (NOT D(10).PIN AND NOT lan_adr AND NOT ide AND NOT UDS AND NOT CP_CS) OR (ide AND NOT LDS AND NOT D(2).PIN) OR (ide AND NOT UDS AND NOT D(2).PIN) OR (LDS AND UDS AND NOT D_IN(2)) OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND NOT D(2).PIN) OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND NOT D(2).PIN)); FDCPE_D_IN3: FDCPE port map (D_IN(3),D_IN_D(3),CLK_EXT,'0','0'); D_IN_D(3) <= ((NOT lan_adr AND NOT ide AND NOT D_IN(3) AND CP_CS) OR (NOT D(11).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS) OR (NOT D(11).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS) OR (NOT D(11).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS) OR (NOT D(11).PIN AND NOT lan_adr AND NOT ide AND NOT UDS AND NOT CP_CS) OR (ide AND NOT LDS AND NOT D(3).PIN) OR (ide AND NOT UDS AND NOT D(3).PIN) OR (LDS AND UDS AND NOT D_IN(3)) OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND NOT D(3).PIN) OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND NOT D(3).PIN)); FDCPE_D_IN4: FDCPE port map (D_IN(4),D_IN_D(4),CLK_EXT,'0','0'); D_IN_D(4) <= ((NOT lan_adr AND NOT ide AND NOT D_IN(4) AND CP_CS) OR (NOT D(12).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS) OR (NOT D(12).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS) OR (NOT D(12).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS) OR (NOT D(12).PIN AND NOT lan_adr AND NOT ide AND NOT UDS AND NOT CP_CS) OR (ide AND NOT LDS AND NOT D(4).PIN) OR (ide AND NOT UDS AND NOT D(4).PIN) OR (LDS AND UDS AND NOT D_IN(4)) OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND NOT D(4).PIN) OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND NOT D(4).PIN)); FDCPE_D_IN5: FDCPE port map (D_IN(5),D_IN_D(5),CLK_EXT,'0','0'); D_IN_D(5) <= ((NOT lan_adr AND NOT ide AND NOT D_IN(5) AND CP_CS) OR (NOT D(13).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS) OR (NOT D(13).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS) OR (NOT D(13).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS) OR (NOT D(13).PIN AND NOT lan_adr AND NOT ide AND NOT UDS AND NOT CP_CS) OR (ide AND NOT LDS AND NOT D(5).PIN) OR (ide AND NOT UDS AND NOT D(5).PIN) OR (LDS AND UDS AND NOT D_IN(5)) OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND NOT D(5).PIN) OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND NOT D(5).PIN)); FDCPE_D_IN6: FDCPE port map (D_IN(6),D_IN_D(6),CLK_EXT,'0','0'); D_IN_D(6) <= ((NOT lan_adr AND NOT ide AND NOT D_IN(6) AND CP_CS) OR (NOT D(14).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS) OR (NOT D(14).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS) OR (NOT D(14).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS) OR (NOT D(14).PIN AND NOT lan_adr AND NOT ide AND NOT UDS AND NOT CP_CS) OR (ide AND NOT LDS AND NOT D(6).PIN) OR (ide AND NOT UDS AND NOT D(6).PIN) OR (LDS AND UDS AND NOT D_IN(6)) OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND NOT D(6).PIN) OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND NOT D(6).PIN)); FDCPE_D_IN7: FDCPE port map (D_IN(7),D_IN_D(7),CLK_EXT,'0','0'); D_IN_D(7) <= ((NOT lan_adr AND NOT ide AND NOT D_IN(7) AND CP_CS) OR (NOT D(15).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS) OR (NOT D(15).PIN AND lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS) OR (NOT D(15).PIN AND NOT lan_adr AND NOT ide AND NOT LDS AND NOT CP_CS) OR (NOT D(15).PIN AND NOT lan_adr AND NOT ide AND NOT UDS AND NOT CP_CS) OR (ide AND NOT LDS AND NOT D(7).PIN) OR (ide AND NOT UDS AND NOT D(7).PIN) OR (LDS AND UDS AND NOT D_IN(7)) OR (lan_adr AND NOT lan_adr_sw AND NOT LDS AND NOT D(7).PIN) OR (lan_adr AND NOT lan_adr_sw AND NOT UDS AND NOT D(7).PIN)); FDCPE_D_IN8: FDCPE port map (D_IN(8),D_IN_D(8),CLK_EXT,'0','0'); D_IN_D(8) <= ((DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT.EXP) OR (D(8).PIN AND NOT UDS AND NOT CP_CS) OR (LDS AND UDS AND D_IN(8)) OR (D(8).PIN AND lan_adr AND NOT lan_adr_sw AND NOT LDS) OR (D(8).PIN AND lan_adr AND NOT lan_adr_sw AND NOT UDS) OR (NOT lan_adr AND NOT ide AND D_IN(8) AND CP_CS) OR (D(8).PIN AND ide AND NOT LDS) OR (D(8).PIN AND ide AND NOT UDS) OR (D(8).PIN AND NOT LDS AND NOT CP_CS)); FDCPE_D_IN9: FDCPE port map (D_IN(9),D_IN_D(9),CLK_EXT,'0','0'); D_IN_D(9) <= ((D(9).PIN AND lan_adr AND NOT lan_adr_sw AND NOT LDS) OR (D(9).PIN AND lan_adr AND NOT lan_adr_sw AND NOT UDS) OR (NOT lan_adr AND NOT ide AND D_IN(9) AND CP_CS) OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS AND D(1).PIN AND CP_CS) OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS AND D(1).PIN AND CP_CS) OR (D(9).PIN AND ide AND NOT LDS) OR (D(9).PIN AND ide AND NOT UDS) OR (D(9).PIN AND NOT LDS AND NOT CP_CS) OR (D(9).PIN AND NOT UDS AND NOT CP_CS) OR (LDS AND UDS AND D_IN(9))); FDCPE_D_IN10: FDCPE port map (D_IN(10),D_IN_D(10),CLK_EXT,'0','0'); D_IN_D(10) <= ((EXP23_.EXP) OR (LDS AND UDS AND D_IN(10)) OR (D(10).PIN AND lan_adr AND NOT lan_adr_sw AND NOT LDS) OR (D(10).PIN AND lan_adr AND NOT lan_adr_sw AND NOT UDS) OR (NOT lan_adr AND NOT ide AND D_IN(10) AND CP_CS) OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS AND D(2).PIN AND CP_CS) OR (D(10).PIN AND ide AND NOT LDS) OR (D(10).PIN AND ide AND NOT UDS) OR (D(10).PIN AND NOT LDS AND NOT CP_CS) OR (D(10).PIN AND NOT UDS AND NOT CP_CS)); FDCPE_D_IN11: FDCPE port map (D_IN(11),D_IN_D(11),CLK_EXT,'0','0'); D_IN_D(11) <= ((D(11).PIN AND lan_adr AND NOT lan_adr_sw AND NOT LDS) OR (D(11).PIN AND lan_adr AND NOT lan_adr_sw AND NOT UDS) OR (NOT lan_adr AND NOT ide AND D_IN(11) AND CP_CS) OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS AND D(3).PIN AND CP_CS) OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS AND D(3).PIN AND CP_CS) OR (D(11).PIN AND ide AND NOT LDS) OR (D(11).PIN AND ide AND NOT UDS) OR (D(11).PIN AND NOT LDS AND NOT CP_CS) OR (D(11).PIN AND NOT UDS AND NOT CP_CS) OR (LDS AND UDS AND D_IN(11))); FDCPE_D_IN12: FDCPE port map (D_IN(12),D_IN_D(12),CLK_EXT,'0','0'); D_IN_D(12) <= ((D(12).PIN AND lan_adr AND NOT lan_adr_sw AND NOT LDS) OR (D(12).PIN AND lan_adr AND NOT lan_adr_sw AND NOT UDS) OR (NOT lan_adr AND NOT ide AND D_IN(12) AND CP_CS) OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS AND D(4).PIN AND CP_CS) OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS AND D(4).PIN AND CP_CS) OR (D(12).PIN AND ide AND NOT LDS) OR (D(12).PIN AND ide AND NOT UDS) OR (D(12).PIN AND NOT LDS AND NOT CP_CS) OR (D(12).PIN AND NOT UDS AND NOT CP_CS) OR (LDS AND UDS AND D_IN(12))); FDCPE_D_IN13: FDCPE port map (D_IN(13),D_IN_D(13),CLK_EXT,'0','0'); D_IN_D(13) <= ((EXP63_.EXP) OR (D(13).PIN AND ide AND NOT UDS) OR (D(13).PIN AND NOT UDS AND NOT CP_CS) OR (LDS AND UDS AND D_IN(13)) OR (D(13).PIN AND lan_adr AND NOT lan_adr_sw AND NOT LDS) OR (D(13).PIN AND lan_adr AND NOT lan_adr_sw AND NOT UDS) OR (D(13).PIN AND ide AND NOT LDS) OR (D(13).PIN AND NOT LDS AND NOT CP_CS)); FDCPE_D_IN14: FDCPE port map (D_IN(14),D_IN_D(14),CLK_EXT,'0','0'); D_IN_D(14) <= ((D(14).PIN AND lan_adr AND NOT lan_adr_sw AND NOT LDS) OR (D(14).PIN AND lan_adr AND NOT lan_adr_sw AND NOT UDS) OR (NOT lan_adr AND NOT ide AND D_IN(14) AND CP_CS) OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS AND D(6).PIN AND CP_CS) OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS AND D(6).PIN AND CP_CS) OR (D(14).PIN AND ide AND NOT LDS) OR (D(14).PIN AND ide AND NOT UDS) OR (D(14).PIN AND NOT LDS AND NOT CP_CS) OR (D(14).PIN AND NOT UDS AND NOT CP_CS) OR (LDS AND UDS AND D_IN(14))); FDCPE_D_IN15: FDCPE port map (D_IN(15),D_IN_D(15),CLK_EXT,'0','0'); D_IN_D(15) <= ((D(15).PIN AND lan_adr AND NOT lan_adr_sw AND NOT LDS) OR (D(15).PIN AND lan_adr AND NOT lan_adr_sw AND NOT UDS) OR (NOT lan_adr AND NOT ide AND D_IN(15) AND CP_CS) OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT LDS AND D(7).PIN AND CP_CS) OR (lan_adr AND NOT ide AND lan_adr_sw AND NOT UDS AND D(7).PIN AND CP_CS) OR (D(15).PIN AND ide AND NOT LDS) OR (D(15).PIN AND ide AND NOT UDS) OR (D(15).PIN AND NOT LDS AND NOT CP_CS) OR (D(15).PIN AND NOT UDS AND NOT CP_CS) OR (LDS AND UDS AND D_IN(15))); FDCPE_Dout10: FDCPE port map (Dout1(0),Dout1_D(0),Dout1(0)/Dout1(0)_CLKF,'0',NOT RESET); Dout1_D(0) <= ((EXP36_.EXP) OR (NOT AS AND A(5) AND NOT A(4) AND A(1) AND NOT A(6) AND autoconfig AND NOT LDS AND A(2)) OR (NOT AS AND A(5) AND NOT A(4) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND A(2)) OR (NOT AS AND NOT A(5) AND A(4) AND A(1) AND NOT A(6) AND A(3) AND autoconfig AND NOT LDS) OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(6) AND A(3) AND autoconfig AND NOT UDS AND NOT A(2)) OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND NOT A(2)) OR (NOT AS AND A(5) AND NOT A(4) AND A(1) AND NOT A(6) AND autoconfig AND NOT UDS AND A(2)) OR (NOT AS AND A(5) AND NOT A(4) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT UDS AND A(2)) OR (NOT AS AND NOT A(5) AND A(4) AND A(1) AND NOT A(6) AND A(3) AND autoconfig AND NOT UDS) OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(6) AND NOT A(3) AND autoconfig AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT A(5) AND NOT A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND A(2)) OR (AS AND NOT Dout1(0)) OR (NOT Dout1(0) AND NOT autoconfig) OR (NOT Dout1(0) AND LDS AND UDS) OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(6) AND A(3) AND autoconfig AND NOT LDS AND NOT A(2))); Dout1(0)/Dout1(0)_CLKF <= C3 XOR Dout1(0)/Dout1(0)_CLKF <= C1; FDCPE_Dout11: FDCPE port map (Dout1(1),Dout1_D(1),Dout1(1)/Dout1(1)_CLKF,'0',NOT RESET); Dout1_D(1) <= ((IDE_W_OBUF.EXP) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT A(5) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT A(4) AND NOT A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND NOT A(5) AND A(4) AND NOT A(1) AND NOT A(6) AND autoconfig AND NOT LDS AND A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND NOT A(5) AND NOT A(4) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS) OR (NOT AS AND A(5) AND NOT A(4) AND NOT A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND A(2)) OR (SHUT_UP(2).EXP) OR (NOT AS AND NOT A(5) AND NOT A(4) AND NOT A(3) AND autoconfig AND NOT UDS AND NOT A(2)) OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(1) AND NOT A(6) AND A(3) AND autoconfig AND NOT LDS) OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(1) AND NOT A(6) AND A(3) AND autoconfig AND NOT UDS) OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(6) AND A(3) AND autoconfig AND NOT LDS AND A(2)) OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(6) AND A(3) AND autoconfig AND NOT UDS AND A(2)) OR (AS AND NOT Dout1(1)) OR (NOT Dout1(1) AND NOT autoconfig) OR (NOT Dout1(1) AND LDS AND UDS) OR (NOT AS AND NOT A(5) AND NOT A(4) AND NOT A(3) AND autoconfig AND NOT LDS AND NOT A(2))); Dout1(1)/Dout1(1)_CLKF <= C3 XOR Dout1(1)/Dout1(1)_CLKF <= C1; Dout1(2)/Dout1(2)_CLKF <= C3 XOR Dout1(2)/Dout1(2)_CLKF <= C1; FDCPE_Dout12: FDCPE port map (Dout1(2),Dout1_D(2),Dout1(2)/Dout1(2)_CLKF,'0',NOT RESET); Dout1_D(2) <= ((SHUT_UP(1).EXP) OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(1) AND NOT A(3) AND autoconfig AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(1) AND NOT A(3) AND autoconfig AND NOT UDS AND NOT A(2)) OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(6) AND NOT A(3) AND autoconfig AND NOT UDS AND NOT A(2)) OR (NOT AS AND A(5) AND NOT A(4) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND A(2)) OR (NOT AS AND NOT A(5) AND A(4) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND A(2)) OR (AUTO_CONFIG_DONE(1).EXP) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND NOT A(4) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND NOT A(4) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT UDS AND A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(0) AND NOT A(4) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND A(2)) OR (NOT AS AND A(5) AND NOT A(4) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT UDS AND A(2)) OR (NOT AS AND NOT A(5) AND A(4) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT UDS AND A(2)) OR (AS AND NOT Dout1(2)) OR (NOT Dout1(2) AND NOT autoconfig) OR (NOT Dout1(2) AND LDS AND UDS) OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND NOT A(2))); Dout1(3)/Dout1(3)_CLKF <= C3 XOR Dout1(3)/Dout1(3)_CLKF <= C1; FDCPE_Dout13: FDCPE port map (Dout1(3),Dout1_D(3),Dout1(3)/Dout1(3)_CLKF,'0',NOT RESET); Dout1_D(3) <= ((NOT Dout1(3) AND LDS AND UDS) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT A(5) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS) OR (NOT AS AND NOT A(5) AND A(4) AND A(1) AND NOT A(6) AND autoconfig AND NOT LDS AND A(2)) OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND NOT A(2)) OR (CP_WE_OBUF.EXP) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT A(5) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT UDS) OR (NOT AS AND NOT A(5) AND A(4) AND A(1) AND NOT A(6) AND autoconfig AND NOT UDS AND A(2)) OR (NOT AS AND NOT A(5) AND NOT A(4) AND A(6) AND NOT A(3) AND autoconfig AND NOT UDS AND NOT A(2)) OR (NOT AS AND A(5) AND NOT A(4) AND NOT A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND A(2)) OR (NOT AS AND NOT A(5) AND A(4) AND NOT A(1) AND NOT A(6) AND A(3) AND autoconfig AND NOT LDS AND NOT A(2)) OR (AS AND NOT Dout1(3)) OR (NOT Dout1(3) AND NOT autoconfig) OR (NOT AS AND NOT A(5) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT A(5) AND A(1) AND NOT A(6) AND NOT A(3) AND autoconfig AND NOT UDS AND NOT A(2))); IDE_A(0) <= A(9); IDE_A(1) <= A(10); IDE_A(2) <= A(11); FTCPE_IDE_BASEADR0: FTCPE port map (IDE_BASEADR(0),IDE_BASEADR_T(0),IDE_BASEADR(0)/IDE_BASEADR(0)_CLKF,'0',NOT RESET); IDE_BASEADR_T(0) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(8).PIN AND NOT IDE_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(8).PIN AND NOT IDE_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(8).PIN AND IDE_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(8).PIN AND IDE_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); IDE_BASEADR(0)/IDE_BASEADR(0)_CLKF <= C3 XOR IDE_BASEADR(0)/IDE_BASEADR(0)_CLKF <= C1; FTCPE_IDE_BASEADR1: FTCPE port map (IDE_BASEADR(1),IDE_BASEADR_T(1),IDE_BASEADR(1)/IDE_BASEADR(1)_CLKF,'0',NOT RESET); IDE_BASEADR_T(1) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(9).PIN AND NOT IDE_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(9).PIN AND NOT IDE_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(9).PIN AND IDE_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(9).PIN AND IDE_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); IDE_BASEADR(1)/IDE_BASEADR(1)_CLKF <= C3 XOR IDE_BASEADR(1)/IDE_BASEADR(1)_CLKF <= C1; IDE_BASEADR(2)/IDE_BASEADR(2)_CLKF <= C3 XOR IDE_BASEADR(2)/IDE_BASEADR(2)_CLKF <= C1; FTCPE_IDE_BASEADR2: FTCPE port map (IDE_BASEADR(2),IDE_BASEADR_T(2),IDE_BASEADR(2)/IDE_BASEADR(2)_CLKF,'0',NOT RESET); IDE_BASEADR_T(2) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(10).PIN AND NOT IDE_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(10).PIN AND NOT IDE_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(10).PIN AND IDE_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(10).PIN AND IDE_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); FTCPE_IDE_BASEADR3: FTCPE port map (IDE_BASEADR(3),IDE_BASEADR_T(3),IDE_BASEADR(3)/IDE_BASEADR(3)_CLKF,'0',NOT RESET); IDE_BASEADR_T(3) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(11).PIN AND NOT IDE_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(11).PIN AND NOT IDE_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(11).PIN AND IDE_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(11).PIN AND IDE_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); IDE_BASEADR(3)/IDE_BASEADR(3)_CLKF <= C3 XOR IDE_BASEADR(3)/IDE_BASEADR(3)_CLKF <= C1; FTCPE_IDE_BASEADR4: FTCPE port map (IDE_BASEADR(4),IDE_BASEADR_T(4),IDE_BASEADR(4)/IDE_BASEADR(4)_CLKF,'0',NOT RESET); IDE_BASEADR_T(4) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(12).PIN AND NOT IDE_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(12).PIN AND NOT IDE_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(12).PIN AND IDE_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(12).PIN AND IDE_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); IDE_BASEADR(4)/IDE_BASEADR(4)_CLKF <= C3 XOR IDE_BASEADR(4)/IDE_BASEADR(4)_CLKF <= C1; IDE_BASEADR(5)/IDE_BASEADR(5)_CLKF <= C3 XOR IDE_BASEADR(5)/IDE_BASEADR(5)_CLKF <= C1; FTCPE_IDE_BASEADR5: FTCPE port map (IDE_BASEADR(5),IDE_BASEADR_T(5),IDE_BASEADR(5)/IDE_BASEADR(5)_CLKF,'0',NOT RESET); IDE_BASEADR_T(5) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(13).PIN AND NOT IDE_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(13).PIN AND NOT IDE_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(13).PIN AND IDE_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(13).PIN AND IDE_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); FTCPE_IDE_BASEADR6: FTCPE port map (IDE_BASEADR(6),IDE_BASEADR_T(6),IDE_BASEADR(6)/IDE_BASEADR(6)_CLKF,'0',NOT RESET); IDE_BASEADR_T(6) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(14).PIN AND NOT IDE_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(14).PIN AND NOT IDE_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(14).PIN AND IDE_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(14).PIN AND IDE_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); IDE_BASEADR(6)/IDE_BASEADR(6)_CLKF <= C3 XOR IDE_BASEADR(6)/IDE_BASEADR(6)_CLKF <= C1; IDE_BASEADR(7)/IDE_BASEADR(7)_CLKF <= C3 XOR IDE_BASEADR(7)/IDE_BASEADR(7)_CLKF <= C1; FTCPE_IDE_BASEADR7: FTCPE port map (IDE_BASEADR(7),IDE_BASEADR_T(7),IDE_BASEADR(7)/IDE_BASEADR(7)_CLKF,'0',NOT RESET); IDE_BASEADR_T(7) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(15).PIN AND NOT IDE_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(15).PIN AND NOT IDE_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(15).PIN AND IDE_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(15).PIN AND IDE_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); IDE_CS(0) <= NOT A(12); IDE_CS(1) <= NOT A(13); FDCPE_IDE_ENABLE: FDCPE port map (IDE_ENABLE,'0',IDE_ENABLE/IDE_ENABLE_CLKF,'0',NOT RESET,IDE_ENABLE_CE); IDE_ENABLE_CE <= (NOT AS AND NOT RW AND ide); IDE_ENABLE/IDE_ENABLE_CLKF <= C3 XOR IDE_ENABLE/IDE_ENABLE_CLKF <= C1; IDE_R <= NOT ((NOT AS AND NOT IDE_R_S)); FDCPE_IDE_R_S: FDCPE port map (IDE_R_S,IDE_R_S_D,IDE_R_S/IDE_R_S_CLKF,'0',NOT RESET); IDE_R_S_D <= (NOT AS AND RW AND ide AND NOT IDE_ENABLE); IDE_R_S/IDE_R_S_CLKF <= C3 XOR IDE_R_S/IDE_R_S_CLKF <= C1; IDE_W <= NOT ((NOT AS AND NOT IDE_W_S)); FDCPE_IDE_W_S: FDCPE port map (IDE_W_S,IDE_W_S_D,IDE_W_S/IDE_W_S_CLKF,'0',NOT RESET); IDE_W_S_D <= (NOT AS AND NOT RW AND ide); IDE_W_S/IDE_W_S_CLKF <= C3 XOR IDE_W_S/IDE_W_S_CLKF <= C1; INT2_OUT_I <= '0'; INT2_OUT <= INT2_OUT_I when INT2_OUT_OE = '1' else 'Z'; INT2_OUT_OE <= (LAN_INT_ENABLE AND NOT LAN_IRQ_OUT); INT6_OUT_I <= '0'; INT6_OUT <= INT6_OUT_I when INT6_OUT_OE = '1' else 'Z'; INT6_OUT_OE <= NOT CP_IRQ; FTCPE_LAN_BASEADR0: FTCPE port map (LAN_BASEADR(0),LAN_BASEADR_T(0),LAN_BASEADR(0)/LAN_BASEADR(0)_CLKF,'0',NOT RESET); LAN_BASEADR_T(0) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(8).PIN AND NOT LAN_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(8).PIN AND NOT LAN_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(8).PIN AND LAN_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(8).PIN AND LAN_BASEADR(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); LAN_BASEADR(0)/LAN_BASEADR(0)_CLKF <= C3 XOR LAN_BASEADR(0)/LAN_BASEADR(0)_CLKF <= C1; LAN_BASEADR(1)/LAN_BASEADR(1)_CLKF <= C3 XOR LAN_BASEADR(1)/LAN_BASEADR(1)_CLKF <= C1; FTCPE_LAN_BASEADR1: FTCPE port map (LAN_BASEADR(1),LAN_BASEADR_T(1),LAN_BASEADR(1)/LAN_BASEADR(1)_CLKF,'0',NOT RESET); LAN_BASEADR_T(1) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(9).PIN AND NOT LAN_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(9).PIN AND NOT LAN_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(9).PIN AND LAN_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(9).PIN AND LAN_BASEADR(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); LAN_BASEADR(2)/LAN_BASEADR(2)_CLKF <= C3 XOR LAN_BASEADR(2)/LAN_BASEADR(2)_CLKF <= C1; FTCPE_LAN_BASEADR2: FTCPE port map (LAN_BASEADR(2),LAN_BASEADR_T(2),LAN_BASEADR(2)/LAN_BASEADR(2)_CLKF,'0',NOT RESET); LAN_BASEADR_T(2) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(10).PIN AND NOT LAN_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(10).PIN AND NOT LAN_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(10).PIN AND LAN_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(10).PIN AND LAN_BASEADR(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); LAN_BASEADR(3)/LAN_BASEADR(3)_CLKF <= C3 XOR LAN_BASEADR(3)/LAN_BASEADR(3)_CLKF <= C1; FTCPE_LAN_BASEADR3: FTCPE port map (LAN_BASEADR(3),LAN_BASEADR_T(3),LAN_BASEADR(3)/LAN_BASEADR(3)_CLKF,'0',NOT RESET); LAN_BASEADR_T(3) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(11).PIN AND NOT LAN_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(11).PIN AND NOT LAN_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(11).PIN AND LAN_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(11).PIN AND LAN_BASEADR(3) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); FTCPE_LAN_BASEADR4: FTCPE port map (LAN_BASEADR(4),LAN_BASEADR_T(4),LAN_BASEADR(4)/LAN_BASEADR(4)_CLKF,'0',NOT RESET); LAN_BASEADR_T(4) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(12).PIN AND NOT LAN_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(12).PIN AND NOT LAN_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(12).PIN AND LAN_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(12).PIN AND LAN_BASEADR(4) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); LAN_BASEADR(4)/LAN_BASEADR(4)_CLKF <= C3 XOR LAN_BASEADR(4)/LAN_BASEADR(4)_CLKF <= C1; LAN_BASEADR(5)/LAN_BASEADR(5)_CLKF <= C3 XOR LAN_BASEADR(5)/LAN_BASEADR(5)_CLKF <= C1; FTCPE_LAN_BASEADR5: FTCPE port map (LAN_BASEADR(5),LAN_BASEADR_T(5),LAN_BASEADR(5)/LAN_BASEADR(5)_CLKF,'0',NOT RESET); LAN_BASEADR_T(5) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(13).PIN AND NOT LAN_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(13).PIN AND NOT LAN_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(13).PIN AND LAN_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(13).PIN AND LAN_BASEADR(5) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); FTCPE_LAN_BASEADR6: FTCPE port map (LAN_BASEADR(6),LAN_BASEADR_T(6),LAN_BASEADR(6)/LAN_BASEADR(6)_CLKF,'0',NOT RESET); LAN_BASEADR_T(6) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(14).PIN AND NOT LAN_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(14).PIN AND NOT LAN_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(14).PIN AND LAN_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(14).PIN AND LAN_BASEADR(6) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); LAN_BASEADR(6)/LAN_BASEADR(6)_CLKF <= C3 XOR LAN_BASEADR(6)/LAN_BASEADR(6)_CLKF <= C1; LAN_BASEADR(7)/LAN_BASEADR(7)_CLKF <= C3 XOR LAN_BASEADR(7)/LAN_BASEADR(7)_CLKF <= C1; FTCPE_LAN_BASEADR7: FTCPE port map (LAN_BASEADR(7),LAN_BASEADR_T(7),LAN_BASEADR(7)/LAN_BASEADR(7)_CLKF,'0',NOT RESET); LAN_BASEADR_T(7) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(15).PIN AND NOT LAN_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND D(15).PIN AND NOT LAN_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(15).PIN AND LAN_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT D(15).PIN AND LAN_BASEADR(7) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND NOT UDS AND NOT A(2))); LAN_CS <= ((LAN_RST_SM_FSM_FFd2 AND LAN_CS_RST) OR (LAN_RST_SM_FSM_FFd3 AND LAN_CS_RST) OR (NOT LAN_RST_SM_FSM_FFd1 AND LAN_CS_RST) OR (lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND LAN_RST_SM_FSM_FFd1)); FDCPE_LAN_CS_RST: FDCPE port map (LAN_CS_RST,LAN_CS_RST_D,CLK_EXT,'0','0'); LAN_CS_RST_D <= ((RESET AND LAN_RST_SM_FSM_FFd2) OR (RESET AND LAN_RST_SM_FSM_FFd3)); FTCPE_LAN_INT_ENABLE: FTCPE port map (LAN_INT_ENABLE,LAN_INT_ENABLE_T,LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF,NOT RESET,'0'); LAN_INT_ENABLE_T <= ((D(15).PIN AND NOT LAN_INT_ENABLE AND lan_adr AND NOT RW AND A(15) AND NOT LDS) OR (D(15).PIN AND NOT LAN_INT_ENABLE AND lan_adr AND NOT RW AND A(15) AND NOT UDS) OR (NOT D(15).PIN AND LAN_INT_ENABLE AND lan_adr AND NOT RW AND A(15) AND NOT LDS) OR (NOT D(15).PIN AND LAN_INT_ENABLE AND lan_adr AND NOT RW AND A(15) AND NOT UDS)); LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF <= C3 XOR LAN_INT_ENABLE/LAN_INT_ENABLE_CLKF <= C1; FDCPE_LAN_IRQ_D0: FDCPE port map (LAN_IRQ_D0,LAN_INT,LAN_IRQ_D0/LAN_IRQ_D0_CLKF,'0',NOT RESET); LAN_IRQ_D0/LAN_IRQ_D0_CLKF <= C3 XOR LAN_IRQ_D0/LAN_IRQ_D0_CLKF <= C1; FDCPE_LAN_IRQ_OUT: FDCPE port map (LAN_IRQ_OUT,LAN_IRQ_OUT_D,LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF,'0',NOT RESET); LAN_IRQ_OUT_D <= ((NOT LAN_INT AND LAN_IRQ_D0) OR (LAN_INT_ENABLE AND NOT D(14).PIN AND lan_adr AND NOT RW AND A(15) AND NOT LAN_INT AND NOT LDS) OR (LAN_INT_ENABLE AND NOT D(14).PIN AND lan_adr AND NOT RW AND A(15) AND NOT LAN_INT AND NOT UDS) OR (LAN_INT_ENABLE AND NOT LAN_IRQ_OUT AND NOT lan_adr AND NOT LAN_INT) OR (LAN_INT_ENABLE AND NOT LAN_IRQ_OUT AND RW AND NOT LAN_INT) OR (LAN_INT_ENABLE AND NOT LAN_IRQ_OUT AND NOT A(15) AND NOT LAN_INT) OR (LAN_INT_ENABLE AND NOT LAN_IRQ_OUT AND NOT LAN_INT AND LDS AND UDS)); LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF <= C3 XOR LAN_IRQ_OUT/LAN_IRQ_OUT_CLKF <= C1; LAN_RD <= ((NOT AS AND LAN_RD_S AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND LAN_RST_SM_FSM_FFd1) OR (LAN_RD_S AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND LAN_RST_SM_FSM_FFd1 AND NOT AS_D)); FDCPE_LAN_RD_S: FDCPE port map (LAN_RD_S,LAN_RD_S_D,LAN_RD_S/LAN_RD_S_CLKF,NOT RESET,'0'); LAN_RD_S_D <= ((lan_adr AND RW AND NOT A(15) AND NOT LDS) OR (lan_adr AND RW AND NOT A(15) AND NOT UDS)); LAN_RD_S/LAN_RD_S_CLKF <= C3 XOR LAN_RD_S/LAN_RD_S_CLKF <= C1; FDCPE_LAN_RST_SM_FSM_FFd1: FDCPE port map (LAN_RST_SM_FSM_FFd1,LAN_RST_SM_FSM_FFd1_D,CLK_EXT,'0','0'); LAN_RST_SM_FSM_FFd1_D <= ((RESET AND LAN_RST_SM_FSM_FFd1) OR (RESET AND LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3)); FDCPE_LAN_RST_SM_FSM_FFd2: FDCPE port map (LAN_RST_SM_FSM_FFd2,LAN_RST_SM_FSM_FFd2_D,CLK_EXT,'0','0'); LAN_RST_SM_FSM_FFd2_D <= ((RESET AND LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3) OR (RESET AND LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1)); FDCPE_LAN_RST_SM_FSM_FFd3: FDCPE port map (LAN_RST_SM_FSM_FFd3,LAN_RST_SM_FSM_FFd3_D,CLK_EXT,'0','0'); LAN_RST_SM_FSM_FFd3_D <= ((RESET AND LAN_RST_SM_FSM_FFd2 AND LAN_RST_SM_FSM_FFd1) OR (RESET AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1)); LAN_WRH <= ((AS AND LAN_WR_RST) OR (LAN_RST_SM_FSM_FFd2 AND LAN_WR_RST) OR (LAN_RST_SM_FSM_FFd3 AND LAN_WR_RST) OR (NOT LAN_RST_SM_FSM_FFd1 AND LAN_WR_RST) OR (NOT AS AND LAN_WRH_S AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND LAN_RST_SM_FSM_FFd1)); FDCPE_LAN_WRH_S: FDCPE port map (LAN_WRH_S,LAN_WRH_S_D,LAN_WRH_S/LAN_WRH_S_CLKF,NOT RESET,'0'); LAN_WRH_S_D <= (lan_adr AND NOT RW AND NOT A(15) AND NOT LDS); LAN_WRH_S/LAN_WRH_S_CLKF <= C3 XOR LAN_WRH_S/LAN_WRH_S_CLKF <= C1; LAN_WRL <= ((AS AND LAN_WR_RST) OR (LAN_RST_SM_FSM_FFd2 AND LAN_WR_RST) OR (LAN_RST_SM_FSM_FFd3 AND LAN_WR_RST) OR (NOT LAN_RST_SM_FSM_FFd1 AND LAN_WR_RST) OR (NOT AS AND LAN_WRL_S AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND LAN_RST_SM_FSM_FFd1)); FDCPE_LAN_WRL_S: FDCPE port map (LAN_WRL_S,LAN_WRL_S_D,LAN_WRL_S/LAN_WRL_S_CLKF,NOT RESET,'0'); LAN_WRL_S_D <= (lan_adr AND NOT RW AND NOT A(15) AND NOT UDS); LAN_WRL_S/LAN_WRL_S_CLKF <= C3 XOR LAN_WRL_S/LAN_WRL_S_CLKF <= C1; FDCPE_LAN_WR_RST: FDCPE port map (LAN_WR_RST,LAN_WR_RST_D,CLK_EXT,'0','0'); LAN_WR_RST_D <= (RESET AND LAN_RST_SM_FSM_FFd2 AND LAN_RST_SM_FSM_FFd3); MTACK_I <= '0'; MTACK <= MTACK_I when MTACK_OE = '1' else 'Z'; MTACK_OE <= '0'; OVR_I <= '0'; OVR <= OVR_I when OVR_OE = '1' else 'Z'; OVR_OE <= '0'; OWN_I <= '0'; OWN <= OWN_I when OWN_OE = '1' else 'Z'; OWN_OE <= '0'; ROM_B(0) <= '0'; ROM_B(1) <= '0'; ROM_OE <= ((ROM_OE_S) OR (AS AND AS_D)); FDCPE_ROM_OE_S: FDCPE port map (ROM_OE_S,ROM_OE_S_D,ROM_OE_S/ROM_OE_S_CLKF,'0',NOT RESET); ROM_OE_S_D <= (NOT AS AND RW AND ide AND IDE_ENABLE); ROM_OE_S/ROM_OE_S_CLKF <= C3 XOR ROM_OE_S/ROM_OE_S_CLKF <= C1; SHUT_UP(0)/SHUT_UP(0)_CLKF <= C3 XOR SHUT_UP(0)/SHUT_UP(0)_CLKF <= C1; FTCPE_SHUT_UP0: FTCPE port map (SHUT_UP(0),SHUT_UP_T(0),SHUT_UP(0)/SHUT_UP(0)_CLKF,'0',NOT RESET); SHUT_UP_T(0) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND SHUT_UP(0) AND NOT LDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND SHUT_UP(0) AND NOT UDS AND NOT A(2))); SHUT_UP(1)/SHUT_UP(1)_CLKF <= C3 XOR SHUT_UP(1)/SHUT_UP(1)_CLKF <= C1; FTCPE_SHUT_UP1: FTCPE port map (SHUT_UP(1),SHUT_UP_T(1),SHUT_UP(1)/SHUT_UP(1)_CLKF,'0',NOT RESET); SHUT_UP_T(1) <= ((NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND SHUT_UP(1) AND NOT UDS AND NOT A(2)) OR (NOT AS AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND SHUT_UP(1) AND NOT LDS AND NOT A(2))); SHUT_UP(2)/SHUT_UP(2)_CLKF <= C3 XOR SHUT_UP(2)/SHUT_UP(2)_CLKF <= C1; FTCPE_SHUT_UP2: FTCPE port map (SHUT_UP(2),SHUT_UP_T(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET); SHUT_UP_T(2) <= ((NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND SHUT_UP(2) AND NOT LDS AND NOT A(2)) OR (NOT AS AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND A(3) AND autoconfig AND NOT RW AND SHUT_UP(2) AND NOT UDS AND NOT A(2))); SLAVE <= ((AS AND AS_D) OR (NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS)); FDCPE_autoconfig: FDCPE port map (autoconfig,autoconfig_D,lan_adr_sw/lan_adr_sw_CLKF,NOT RESET,'0'); autoconfig_D <= ((AUTO_CONFIG_DONE(1) AND A(23) AND A(22) AND A(21) AND A(19) AND NOT A(18) AND NOT A(17) AND NOT A(16) AND NOT A(20) AND NOT CFIN) OR (AUTO_CONFIG_DONE(0) AND A(23) AND A(22) AND A(21) AND A(19) AND NOT A(18) AND NOT A(17) AND NOT A(16) AND NOT A(20) AND NOT CFIN)); FDCPE_ide: FDCPE port map (ide,ide_D,lan_adr_sw/lan_adr_sw_CLKF,NOT RESET,'0'); ide_D <= ((SHUT_UP(2)) OR (CP_WE_QUIRK.EXP) OR (IDE_BASEADR(1) AND NOT A(17)) OR (IDE_BASEADR(2) AND NOT A(18)) OR (NOT IDE_BASEADR(2) AND A(18)) OR (IDE_BASEADR(3) AND NOT A(19)) OR (NOT IDE_BASEADR(3) AND A(19)) OR (IDE_BASEADR(5) AND NOT A(21)) OR (NOT IDE_BASEADR(5) AND A(21)) OR (IDE_BASEADR(6) AND NOT A(22)) OR (NOT IDE_BASEADR(6) AND A(22)) OR (IDE_BASEADR(0) AND NOT A(16)) OR (NOT IDE_BASEADR(0) AND A(16)) OR (NOT IDE_BASEADR(1) AND A(17))); FDCPE_lan_adr: FDCPE port map (lan_adr,lan_adr_D,lan_adr_sw/lan_adr_sw_CLKF,NOT RESET,'0'); lan_adr_D <= ((SHUT_UP(0)) OR (EXP52_.EXP) OR (LAN_BASEADR(1) AND NOT A(17)) OR (LAN_BASEADR(2) AND NOT A(18)) OR (NOT LAN_BASEADR(2) AND A(18)) OR (LAN_BASEADR(3) AND NOT A(19)) OR (NOT LAN_BASEADR(3) AND A(19)) OR (LAN_BASEADR(4) AND NOT A(20)) OR (NOT LAN_BASEADR(4) AND A(20)) OR (LAN_BASEADR(5) AND NOT A(21)) OR (NOT LAN_BASEADR(5) AND A(21)) OR (LAN_BASEADR(0) AND NOT A(16)) OR (NOT LAN_BASEADR(0) AND A(16)) OR (NOT LAN_BASEADR(1) AND A(17))); FDCPE_lan_adr_sw: FDCPE port map (lan_adr_sw,lan_adr_sw_D,lan_adr_sw/lan_adr_sw_CLKF,NOT RESET,'0'); lan_adr_sw_D <= ((SHUT_UP(0)) OR (ROM_B_0_OBUF$BUF4.EXP) OR (LAN_BASEADR(4) AND NOT A(20)) OR (NOT LAN_BASEADR(4) AND A(20)) OR (LAN_BASEADR(5) AND NOT A(21)) OR (NOT LAN_BASEADR(5) AND A(21)) OR (NOT LAN_BASEADR(7) AND A(23)) OR (autoconfig.EXP) OR (LAN_BASEADR(1) AND NOT A(17)) OR (LAN_BASEADR(2) AND NOT A(18)) OR (NOT LAN_BASEADR(2) AND A(18)) OR (LAN_BASEADR(3) AND NOT A(19)) OR (NOT LAN_BASEADR(3) AND A(19)) OR (LAN_BASEADR(0) AND NOT A(16)) OR (NOT LAN_BASEADR(0) AND A(16)) OR (NOT LAN_BASEADR(1) AND A(17))); lan_adr_sw/lan_adr_sw_CLKF <= NOT (C3 XOR lan_adr_sw/lan_adr_sw_CLKF <= NOT (C1); Register Legend: FDCPE (Q,D,C,CLR,PRE,CE); FTCPE (Q,D,C,CLR,PRE,CE); LDCP (Q,D,G,CLR,PRE); ****************************** Device Pin Out ***************************** Device : XC95288XL-10-TQ144 Pin Signal Pin Signal No. Name No. Name 1 VCC 73 VCC 2 D<0> 74 A<15> 3 A_LAN<1> 75 AUTOBOOT_OFF 4 A_LAN<0> 76 LAN_WRL 5 A_LAN<3> 77 KPR 6 A_LAN<2> 78 KPR 7 A_LAN<5> 79 KPR 8 VCC 80 AS 9 A_LAN<4> 81 UDS 10 A_LAN<7> 82 LDS 11 A_LAN<6> 83 RW 12 KPR 84 VCC 13 KPR 85 DTACK 14 D<6> 86 A<23> 15 D<3> 87 A<22> 16 D<7> 88 A<21> 17 D<1> 89 GND 18 GND 90 GND 19 D<8> 91 A<20> 20 D<5> 92 A<19> 21 D<4> 93 KPR 22 IDE_CS<0> 94 A<18> 23 IDE_CS<1> 95 A<17> 24 IDE_A<0> 96 MTACK 25 IDE_A<2> 97 A<16> 26 IDE_A<1> 98 KPR 27 IDE_R 99 GND 28 IDE_W 100 OVR 29 GND 101 KPR 30 CLK_EXT 102 C3 31 CP_IRQ 103 C1 32 INT2_OUT 104 CFIN 33 KPR 105 CFOUT 34 CP_CS 106 SLAVE 35 ROM_OE 107 OWN 36 GND 108 GND 37 VCC 109 VCC 38 KPR 110 KPR 39 D<2> 111 LAN_INT 40 D<9> 112 DQ<15> 41 D<10> 113 DQ<13> 42 VCC 114 GND 43 D<11> 115 DQ<11> 44 D<12> 116 DQ<9> 45 D<13> 117 DQ<1> 46 D<14> 118 DQ<0> 47 GND 119 DQ<3> 48 D<15> 120 DQ<2> 49 A<5> 121 DQ<5> 50 A<4> 122 TDO 51 A<6> 123 GND 52 A<3> 124 DQ<4> 53 A<7> 125 DQ<7> 54 A<2> 126 DQ<6> 55 VCC 127 VCC 56 A<8> 128 DQ<8> 57 A<1> 129 DQ<10> 58 A<9> 130 DQ<12> 59 A<10> 131 DQ<14> 60 A<11> 132 LAN_WRH 61 A<12> 133 LAN_CS 62 GND 134 LAN_RD 63 TDI 135 INT6_OUT 64 A<13> 136 A_LAN<12> 65 TMS 137 A_LAN<13> 66 A<14> 138 A_LAN<10> 67 TCK 139 A_LAN<11> 68 ROM_B<0> 140 A_LAN<8> 69 ROM_B<1> 141 VCC 70 CP_WE 142 A_LAN<9> 71 CP_RD 143 RESET 72 GND 144 GND Legend : NC = Not Connected, unbonded pin PGND = Unused I/O configured as additional Ground pin TIE = Unused I/O floating -- must tie to VCC, GND or other signal KPR = Unused I/O with weak keeper (leave unconnected) VCC = Dedicated Power Pin GND = Dedicated Ground Pin TDI = Test Data In, JTAG pin TDO = Test Data Out, JTAG pin TCK = Test Clock, JTAG pin TMS = Test Mode Select, JTAG pin PROHIBITED = User reserved pin **************************** Compiler Options **************************** Following is a list of all global compiler options used by the fitter run. Device(s) Specified : xc95288xl-10-TQ144 Optimization Method : SPEED Multi-Level Logic Optimization : ON Ignore Timing Specifications : OFF Default Register Power Up Value : LOW Keep User Location Constraints : ON What-You-See-Is-What-You-Get : OFF Exhaustive Fitting : ON Keep Unused Inputs : OFF Slew Rate : FAST Power Mode : STD Ground on Unused IOs : OFF Set I/O Pin Termination : KEEPER Global Clock Optimization : ON Global Set/Reset Optimization : ON Global Ouput Enable Optimization : ON Input Limit : 54 Pterm Limit : 25