MDF Database: version 1.0 MDF_INFO | LAN_IDE_CP | XC95288XL-10-TQ144 MACROCELL | 8 | 10 | Z3_DATA<0> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<0>.PIN | DQ<8>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 217 | 231 | 158 EQ | 7 | A<8>.D = DQ_SWAP & DQ<8>.PIN # !DQ_SWAP & DQ<0>.PIN; A<8>.CLK = CLK_EXT; // GCK A<8>.AP = LAN_SM_RST; A<8>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<8>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 5 | Z3_DATA<10> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<10>.PIN | DQ<2>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 234 | 220 | 158 EQ | 7 | A<18>.D = DQ_SWAP & DQ<2>.PIN # !DQ_SWAP & DQ<10>.PIN; A<18>.CLK = CLK_EXT; // GCK A<18>.AP = LAN_SM_RST; A<18>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<18>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 2 | Z3_DATA<11> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<3>.PIN | DQ<11>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 219 | 207 | 158 EQ | 7 | A<19>.D = DQ_SWAP & DQ<3>.PIN # !DQ_SWAP & DQ<11>.PIN; A<19>.CLK = CLK_EXT; // GCK A<19>.AP = LAN_SM_RST; A<19>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<19>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 1 | Z3_DATA<12> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<12>.PIN | DQ<4>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 235 | 225 | 158 EQ | 7 | A<20>.D = DQ_SWAP & DQ<4>.PIN # !DQ_SWAP & DQ<12>.PIN; A<20>.CLK = CLK_EXT; // GCK A<20>.AP = LAN_SM_RST; A<20>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<20>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 16 | Z3_DATA<13> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<13>.PIN | DQ<5>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 204 | 221 | 158 EQ | 7 | A<21>.D = DQ_SWAP & DQ<5>.PIN # !DQ_SWAP & DQ<13>.PIN; A<21>.CLK = CLK_EXT; // GCK A<21>.AP = LAN_SM_RST; A<21>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<21>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 14 | Z3_DATA<14> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<14>.PIN | DQ<6>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 236 | 227 | 158 EQ | 7 | A<22>.D = DQ_SWAP & DQ<6>.PIN # !DQ_SWAP & DQ<14>.PIN; A<22>.CLK = CLK_EXT; // GCK A<22>.AP = LAN_SM_RST; A<22>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<22>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 13 | Z3_DATA<15> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<15>.PIN | DQ<7>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 202 | 226 | 158 EQ | 7 | A<23>.D = DQ_SWAP & DQ<7>.PIN # !DQ_SWAP & DQ<15>.PIN; A<23>.CLK = CLK_EXT; // GCK A<23>.AP = LAN_SM_RST; A<23>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<23>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 13 | Z3_DATA<1> ATTRIBUTES | 8685506 | 0 OUTPUTMC | 1 | 8 | 14 INPUTS | 14 | DQ_SWAP | DQ<1>.PIN | UDS | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | LDS | A<23>.PIN | Z3_A_LOW.EXP INPUTMC | 9 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 | 8 | 12 INPUTP | 5 | 216 | 155 | 158 | 157 | 161 EXPORTS | 1 | 8 | 14 IMPORTS | 1 | 8 | 12 EQ | 10 | A<9>.D = !DQ_SWAP & DQ<1>.PIN ;Imported pterms FB9_13 # DQ_SWAP & DQ<9>.PIN; A<9>.CLK = CLK_EXT; // GCK A<9>.AP = LAN_SM_RST; A<9>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<9>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; Z3_DATA<1>.EXP = UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<23>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 16 | Z3_DATA<2> ATTRIBUTES | 8685506 | 0 OUTPUTMC | 1 | 8 | 15 INPUTS | 14 | LDS | D<7>.PIN | DQ_SWAP | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | UDS | A<15>.PIN | DQ_DATA<14>.EXP INPUTMC | 9 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 | 8 | 17 INPUTP | 5 | 157 | 29 | 158 | 155 | 139 EXPORTS | 1 | 8 | 15 IMPORTS | 1 | 8 | 17 EQ | 12 | A<10>.D = ;Imported pterms FB9_18 DQ_SWAP & DQ<10>.PIN # !DQ_SWAP & DQ<2>.PIN; A<10>.CLK = CLK_EXT; // GCK A<10>.AP = LAN_SM_RST; A<10>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<10>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; Z3_DATA<2>.EXP = !LDS & D<7>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<15>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 2 | Z3_DATA<3> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<11>.PIN | DQ<3>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 207 | 219 | 158 EQ | 7 | A<11>.D = DQ_SWAP & DQ<11>.PIN # !DQ_SWAP & DQ<3>.PIN; A<11>.CLK = CLK_EXT; // GCK A<11>.AP = LAN_SM_RST; A<11>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<11>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 4 | Z3_DATA<4> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<12>.PIN | DQ<4>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 235 | 225 | 158 EQ | 7 | A<12>.D = DQ_SWAP & DQ<12>.PIN # !DQ_SWAP & DQ<4>.PIN; A<12>.CLK = CLK_EXT; // GCK A<12>.AP = LAN_SM_RST; A<12>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<12>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 9 | Z3_DATA<5> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<13>.PIN | DQ<5>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 204 | 221 | 158 EQ | 7 | A<13>.D = DQ_SWAP & DQ<13>.PIN # !DQ_SWAP & DQ<5>.PIN; A<13>.CLK = CLK_EXT; // GCK A<13>.AP = LAN_SM_RST; A<13>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<13>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 10 | Z3_DATA<6> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<14>.PIN | DQ<6>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 236 | 227 | 158 EQ | 7 | A<14>.D = DQ_SWAP & DQ<14>.PIN # !DQ_SWAP & DQ<6>.PIN; A<14>.CLK = CLK_EXT; // GCK A<14>.AP = LAN_SM_RST; A<14>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<14>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 7 | Z3_DATA<7> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<15>.PIN | DQ<7>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 202 | 226 | 158 EQ | 7 | A<15>.D = DQ_SWAP & DQ<15>.PIN # !DQ_SWAP & DQ<7>.PIN; A<15>.CLK = CLK_EXT; // GCK A<15>.AP = LAN_SM_RST; A<15>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<15>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 10 | Z3_DATA<8> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<0>.PIN | DQ<8>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 217 | 231 | 158 EQ | 7 | A<16>.D = DQ_SWAP & DQ<0>.PIN # !DQ_SWAP & DQ<8>.PIN; A<16>.CLK = CLK_EXT; // GCK A<16>.AP = LAN_SM_RST; A<16>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<16>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 7 | Z3_DATA<9> ATTRIBUTES | 8685506 | 0 INPUTS | 11 | DQ_SWAP | DQ<1>.PIN | DQ<9>.PIN | LAN_SM_RST | RW | LAN_ACCESS | $OpTx$FX_DC$112 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 8 | 7 | 17 | 9 | 12 | 7 | 12 | 9 | 6 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 216 | 209 | 158 EQ | 7 | A<17>.D = DQ_SWAP & DQ<1>.PIN # !DQ_SWAP & DQ<9>.PIN; A<17>.CLK = CLK_EXT; // GCK A<17>.AP = LAN_SM_RST; A<17>.OE = RW & LAN_ACCESS & !$OpTx$FX_DC$112; A<17>.CE = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 4 | 0 | AUTO_CONFIG_DONE_CYCLE ATTRIBUTES | 4358928 | 0 OUTPUTMC | 4 | 4 | 0 | 13 | 10 | 4 | 1 | 4 | 17 INPUTS | 17 | RW | FCS | DS0 | AUTO_CONFIG_DONE_CYCLE | Z3_ADR<2> | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | LAN_ACCESS | UDS | LDS | RESET | DS1 | ROM_B_0_OBUF$BUF11.EXP INPUTMC | 10 | 4 | 0 | 5 | 16 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 7 | 12 | 4 | 1 INPUTP | 7 | 158 | 147 | 170 | 155 | 157 | 263 | 148 EXPORTS | 1 | 4 | 17 IMPORTS | 1 | 4 | 1 EQ | 18 | AUTO_CONFIG_DONE_CYCLE.T = !RW & !FCS & !DS0 & !AUTO_CONFIG_DONE_CYCLE & !Z3_ADR<2> & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB5_2 # !RW & !FCS & !UDS & !AUTO_CONFIG_DONE_CYCLE & !Z3_ADR<2> & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & !AUTO_CONFIG_DONE_CYCLE & !Z3_ADR<2> & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & !AUTO_CONFIG_DONE_CYCLE & !Z3_ADR<2> & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; AUTO_CONFIG_DONE_CYCLE.CLK = CLK_EXT; // GCK AUTO_CONFIG_DONE_CYCLE.AR = !RESET; AUTO_CONFIG_DONE_CYCLE.EXP = RW & RESET # RESET & !LAN_ACCESS # UDS & LDS & DS1 & DS0 & RESET GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 1 | 0 | LAN_BASEADR<0> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 3 | 1 | 0 | 1 | 1 | 5 | 1 INPUTS | 18 | RW | FCS | DS0 | D<0>.PIN | LAN_BASEADR<0> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | A_LAN_4_OBUF.EXP INPUTMC | 10 | 1 | 0 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 1 | 1 INPUTP | 8 | 158 | 147 | 170 | 4 | 148 | 155 | 157 | 263 IMPORTS | 1 | 1 | 1 EQ | 27 | LAN_BASEADR<0>.T = !RW & !FCS & !UDS & !D<0>.PIN & LAN_BASEADR<0> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & !D<0>.PIN & LAN_BASEADR<0> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & !D<0>.PIN & LAN_BASEADR<0> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & !D<0>.PIN & LAN_BASEADR<0> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB2_2 # !RW & !FCS & !UDS & D<0>.PIN & !LAN_BASEADR<0> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<0>.PIN & !LAN_BASEADR<0> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<0>.PIN & !LAN_BASEADR<0> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<0>.PIN & !LAN_BASEADR<0> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<0>.CLK = CLK_EXT; // GCK LAN_BASEADR<0>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 1 | 15 | LAN_BASEADR<10> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 5 | 1 | 15 | 7 | 13 | 7 | 0 | 1 | 14 | 1 | 16 INPUTS | 19 | D<10>.PIN | RW | FCS | DS0 | LAN_BASEADR<10> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | D_1_IOBUFE.EXP | D_8_IOBUFE.EXP INPUTMC | 11 | 1 | 15 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 1 | 14 | 1 | 16 INPUTP | 8 | 74 | 158 | 147 | 170 | 148 | 155 | 157 | 263 IMPORTS | 2 | 1 | 14 | 1 | 16 EQ | 28 | LAN_BASEADR<10>.T = !D<10>.PIN & !RW & !FCS & !UDS & LAN_BASEADR<10> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<10>.PIN & !RW & !FCS & !LDS & LAN_BASEADR<10> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<10>.PIN & !RW & !FCS & !DS1 & LAN_BASEADR<10> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<10>.PIN & !RW & !FCS & !DS0 & LAN_BASEADR<10> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB2_15 # D<10>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<10> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<10>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<10> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<10>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<10> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB2_17 # D<10>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<10> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<10>.CLK = CLK_EXT; // GCK LAN_BASEADR<10>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 1 | 3 | LAN_BASEADR<11> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 5 | 1 | 3 | 7 | 16 | 7 | 11 | 1 | 2 | 7 | 0 INPUTS | 18 | D<11>.PIN | RW | FCS | DS0 | LAN_BASEADR<11> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | A_LAN_7_OBUF.EXP INPUTMC | 10 | 1 | 3 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 1 | 2 INPUTP | 8 | 77 | 158 | 147 | 170 | 148 | 155 | 157 | 263 IMPORTS | 1 | 1 | 2 EQ | 27 | LAN_BASEADR<11>.T = !D<11>.PIN & !RW & !FCS & !UDS & LAN_BASEADR<11> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<11>.PIN & !RW & !FCS & !LDS & LAN_BASEADR<11> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<11>.PIN & !RW & !FCS & !DS1 & LAN_BASEADR<11> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<11>.PIN & !RW & !FCS & !DS0 & LAN_BASEADR<11> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB2_3 # D<11>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<11> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<11>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<11> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<11>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<11> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<11>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<11> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<11>.CLK = CLK_EXT; // GCK LAN_BASEADR<11>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 1 | 6 | LAN_BASEADR<12> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 4 | 1 | 6 | 7 | 15 | 1 | 7 | 7 | 13 INPUTS | 18 | D<12>.PIN | RW | FCS | DS0 | LAN_BASEADR<12> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | N0$BUF3.EXP INPUTMC | 10 | 1 | 6 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 1 | 7 INPUTP | 8 | 78 | 158 | 147 | 170 | 148 | 155 | 157 | 263 IMPORTS | 1 | 1 | 7 EQ | 27 | LAN_BASEADR<12>.T = !D<12>.PIN & !RW & !FCS & !UDS & LAN_BASEADR<12> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<12>.PIN & !RW & !FCS & !LDS & LAN_BASEADR<12> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<12>.PIN & !RW & !FCS & !DS1 & LAN_BASEADR<12> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<12>.PIN & !RW & !FCS & !DS0 & LAN_BASEADR<12> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB2_8 # D<12>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<12> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<12>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<12> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<12>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<12> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<12>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<12> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<12>.CLK = CLK_EXT; // GCK LAN_BASEADR<12>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 4 | 3 | LAN_BASEADR<13> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 6 | 4 | 3 | 7 | 15 | 7 | 1 | 4 | 2 | 4 | 4 | 7 | 14 INPUTS | 19 | D<13>.PIN | RW | FCS | DS0 | LAN_BASEADR<13> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | EXP27_.EXP | ROM_B_0_OBUF.EXP INPUTMC | 11 | 4 | 3 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 4 | 2 | 4 | 4 INPUTP | 8 | 80 | 158 | 147 | 170 | 148 | 155 | 157 | 263 IMPORTS | 2 | 4 | 2 | 4 | 4 EQ | 28 | LAN_BASEADR<13>.T = !D<13>.PIN & !RW & !FCS & !UDS & LAN_BASEADR<13> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<13>.PIN & !RW & !FCS & !LDS & LAN_BASEADR<13> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<13>.PIN & !RW & !FCS & !DS1 & LAN_BASEADR<13> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<13>.PIN & !RW & !FCS & !DS0 & LAN_BASEADR<13> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB5_3 # D<13>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<13> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<13>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<13> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB5_5 # D<13>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<13> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<13>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<13> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<13>.CLK = CLK_EXT; // GCK LAN_BASEADR<13>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 4 | 6 | LAN_BASEADR<14> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 3 | 4 | 6 | 4 | 5 | 5 | 17 INPUTS | 18 | D<14>.PIN | RW | FCS | DS0 | LAN_BASEADR<14> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | EXP28_.EXP INPUTMC | 10 | 4 | 6 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 4 | 5 INPUTP | 8 | 81 | 158 | 147 | 170 | 148 | 155 | 157 | 263 IMPORTS | 1 | 4 | 5 EQ | 27 | LAN_BASEADR<14>.T = !D<14>.PIN & !RW & !FCS & !UDS & LAN_BASEADR<14> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<14>.PIN & !RW & !FCS & !LDS & LAN_BASEADR<14> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<14>.PIN & !RW & !FCS & !DS1 & LAN_BASEADR<14> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<14>.PIN & !RW & !FCS & !DS0 & LAN_BASEADR<14> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB5_6 # D<14>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<14> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<14>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<14> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<14>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<14> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<14>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<14> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<14>.CLK = CLK_EXT; // GCK LAN_BASEADR<14>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 4 | 7 | LAN_BASEADR<15> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 5 | 4 | 7 | 7 | 13 | 7 | 11 | 4 | 8 | 7 | 0 INPUTS | 18 | D<15>.PIN | RW | FCS | DS0 | LAN_BASEADR<15> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | EXP29_.EXP INPUTMC | 10 | 4 | 7 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 4 | 8 INPUTP | 8 | 89 | 158 | 147 | 170 | 148 | 155 | 157 | 263 IMPORTS | 1 | 4 | 8 EQ | 27 | LAN_BASEADR<15>.T = !D<15>.PIN & !RW & !FCS & !UDS & LAN_BASEADR<15> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<15>.PIN & !RW & !FCS & !LDS & LAN_BASEADR<15> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<15>.PIN & !RW & !FCS & !DS1 & LAN_BASEADR<15> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<15>.PIN & !RW & !FCS & !DS0 & LAN_BASEADR<15> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB5_9 # D<15>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<15> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<15>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<15> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<15>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<15> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<15>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<15> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<15>.CLK = CLK_EXT; // GCK LAN_BASEADR<15>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 14 | LAN_BASEADR<1> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 3 | 3 | 14 | 5 | 0 | 3 | 13 INPUTS | 18 | RW | FCS | DS0 | D<1>.PIN | LAN_BASEADR<1> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | A_LAN_5_OBUF.EXP INPUTMC | 10 | 3 | 14 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 3 | 13 INPUTP | 8 | 158 | 147 | 170 | 30 | 148 | 155 | 157 | 263 IMPORTS | 1 | 3 | 13 EQ | 27 | LAN_BASEADR<1>.T = !RW & !FCS & !UDS & !D<1>.PIN & LAN_BASEADR<1> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & !D<1>.PIN & LAN_BASEADR<1> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & !D<1>.PIN & LAN_BASEADR<1> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & !D<1>.PIN & LAN_BASEADR<1> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB4_14 # !RW & !FCS & !UDS & D<1>.PIN & !LAN_BASEADR<1> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<1>.PIN & !LAN_BASEADR<1> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<1>.PIN & !LAN_BASEADR<1> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<1>.PIN & !LAN_BASEADR<1> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<1>.CLK = CLK_EXT; // GCK LAN_BASEADR<1>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 12 | LAN_BASEADR<2> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 3 | 3 | 12 | 3 | 11 | 5 | 17 INPUTS | 18 | RW | FCS | DS0 | D<2>.PIN | LAN_BASEADR<2> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | A_LAN_2_OBUF.EXP INPUTMC | 10 | 3 | 12 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 3 | 11 INPUTP | 8 | 158 | 147 | 170 | 71 | 148 | 155 | 157 | 263 IMPORTS | 1 | 3 | 11 EQ | 27 | LAN_BASEADR<2>.T = !RW & !FCS & !UDS & !D<2>.PIN & LAN_BASEADR<2> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & !D<2>.PIN & LAN_BASEADR<2> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & !D<2>.PIN & LAN_BASEADR<2> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & !D<2>.PIN & LAN_BASEADR<2> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB4_12 # !RW & !FCS & !UDS & D<2>.PIN & !LAN_BASEADR<2> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<2>.PIN & !LAN_BASEADR<2> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<2>.PIN & !LAN_BASEADR<2> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<2>.PIN & !LAN_BASEADR<2> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<2>.CLK = CLK_EXT; // GCK LAN_BASEADR<2>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 8 | LAN_BASEADR<3> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 4 | 3 | 8 | 3 | 9 | 3 | 7 | 5 | 16 INPUTS | 19 | RW | FCS | DS0 | D<3>.PIN | LAN_BASEADR<3> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | A_LAN_3_OBUF.EXP | LAN_BASEADR<4>.EXP INPUTMC | 11 | 3 | 8 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 3 | 7 | 3 | 9 INPUTP | 8 | 158 | 147 | 170 | 28 | 148 | 155 | 157 | 263 IMPORTS | 2 | 3 | 7 | 3 | 9 EQ | 28 | LAN_BASEADR<3>.T = !RW & !FCS & !UDS & !D<3>.PIN & LAN_BASEADR<3> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & !D<3>.PIN & LAN_BASEADR<3> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & !D<3>.PIN & LAN_BASEADR<3> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & !D<3>.PIN & LAN_BASEADR<3> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB4_8 # !RW & !FCS & !UDS & D<3>.PIN & !LAN_BASEADR<3> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<3>.PIN & !LAN_BASEADR<3> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<3>.PIN & !LAN_BASEADR<3> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB4_10 # !RW & !FCS & !LDS & D<3>.PIN & !LAN_BASEADR<3> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<3>.CLK = CLK_EXT; // GCK LAN_BASEADR<3>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 9 | LAN_BASEADR<4> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 4 | 3 | 9 | 3 | 10 | 5 | 1 | 3 | 8 INPUTS | 20 | RW | FCS | DS0 | D<4>.PIN | LAN_BASEADR<4> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | D<3>.PIN | LAN_BASEADR<3> | EXP25_.EXP INPUTMC | 11 | 3 | 9 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 3 | 8 | 3 | 10 INPUTP | 9 | 158 | 147 | 170 | 38 | 148 | 155 | 157 | 263 | 28 EXPORTS | 1 | 3 | 8 IMPORTS | 1 | 3 | 10 EQ | 30 | LAN_BASEADR<4>.T = !RW & !FCS & !UDS & !D<4>.PIN & LAN_BASEADR<4> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & !D<4>.PIN & LAN_BASEADR<4> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & !D<4>.PIN & LAN_BASEADR<4> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB4_11 # !RW & !FCS & !UDS & D<4>.PIN & !LAN_BASEADR<4> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<4>.PIN & !LAN_BASEADR<4> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & !D<4>.PIN & LAN_BASEADR<4> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<4>.PIN & !LAN_BASEADR<4> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<4>.PIN & !LAN_BASEADR<4> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<4>.CLK = CLK_EXT; // GCK LAN_BASEADR<4>.AP = !RESET; LAN_BASEADR<4>.EXP = !RW & !FCS & !LDS & D<3>.PIN & !LAN_BASEADR<3> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 6 | LAN_BASEADR<5> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 3 | 3 | 6 | 5 | 0 | 3 | 5 INPUTS | 18 | RW | FCS | DS0 | D<5>.PIN | LAN_BASEADR<5> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | A_LAN_0_OBUF.EXP INPUTMC | 10 | 3 | 6 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 3 | 5 INPUTP | 8 | 158 | 147 | 170 | 37 | 148 | 155 | 157 | 263 IMPORTS | 1 | 3 | 5 EQ | 27 | LAN_BASEADR<5>.T = !RW & !FCS & !UDS & !D<5>.PIN & LAN_BASEADR<5> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & !D<5>.PIN & LAN_BASEADR<5> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & !D<5>.PIN & LAN_BASEADR<5> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & !D<5>.PIN & LAN_BASEADR<5> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB4_6 # !RW & !FCS & !UDS & D<5>.PIN & !LAN_BASEADR<5> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<5>.PIN & !LAN_BASEADR<5> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<5>.PIN & !LAN_BASEADR<5> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<5>.PIN & !LAN_BASEADR<5> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<5>.CLK = CLK_EXT; // GCK LAN_BASEADR<5>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 3 | LAN_BASEADR<6> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 4 | 3 | 3 | 7 | 14 | 7 | 1 | 3 | 4 INPUTS | 18 | RW | FCS | DS0 | D<6>.PIN | LAN_BASEADR<6> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | A_LAN_1_OBUF.EXP INPUTMC | 10 | 3 | 3 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 3 | 4 INPUTP | 8 | 158 | 147 | 170 | 26 | 148 | 155 | 157 | 263 IMPORTS | 1 | 3 | 4 EQ | 27 | LAN_BASEADR<6>.T = !RW & !FCS & !UDS & !D<6>.PIN & LAN_BASEADR<6> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & !D<6>.PIN & LAN_BASEADR<6> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & !D<6>.PIN & LAN_BASEADR<6> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & !D<6>.PIN & LAN_BASEADR<6> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB4_5 # !RW & !FCS & !UDS & D<6>.PIN & !LAN_BASEADR<6> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<6>.PIN & !LAN_BASEADR<6> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<6>.PIN & !LAN_BASEADR<6> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<6>.PIN & !LAN_BASEADR<6> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<6>.CLK = CLK_EXT; // GCK LAN_BASEADR<6>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 6 | 12 | LAN_BASEADR<7> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 5 | 6 | 12 | 5 | 0 | 5 | 17 | 6 | 13 | 6 | 11 INPUTS | 19 | RW | FCS | DS0 | D<7>.PIN | LAN_BASEADR<7> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | D_OUT<7> | EXP39_.EXP INPUTMC | 11 | 6 | 12 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 9 | 14 | 6 | 13 INPUTP | 8 | 158 | 147 | 170 | 29 | 148 | 155 | 157 | 263 EXPORTS | 1 | 6 | 11 IMPORTS | 1 | 6 | 13 EQ | 28 | LAN_BASEADR<7>.T = !RW & !FCS & !UDS & !D<7>.PIN & LAN_BASEADR<7> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & !D<7>.PIN & LAN_BASEADR<7> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & !D<7>.PIN & LAN_BASEADR<7> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB7_14 # !RW & !FCS & !UDS & D<7>.PIN & !LAN_BASEADR<7> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<7>.PIN & !LAN_BASEADR<7> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & !D<7>.PIN & LAN_BASEADR<7> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<7>.PIN & !LAN_BASEADR<7> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<7>.PIN & !LAN_BASEADR<7> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<7>.CLK = CLK_EXT; // GCK LAN_BASEADR<7>.AP = !RESET; LAN_BASEADR<7>.EXP = UDS & LDS & DS1 & DS0 & D_OUT<7> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 6 | 10 | LAN_BASEADR<8> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 7 | 6 | 10 | 7 | 15 | 7 | 10 | 6 | 8 | 6 | 9 | 7 | 14 | 6 | 11 INPUTS | 20 | D<8>.PIN | RW | FCS | DS0 | LAN_BASEADR<8> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | UDS | Z3_DATA<31> | LAN_ACCESS | RESET | LDS | DS1 | EXP38_.EXP INPUTMC | 12 | 6 | 10 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 14 | 3 | 7 | 12 | 6 | 9 INPUTP | 8 | 32 | 158 | 147 | 170 | 155 | 263 | 157 | 148 EXPORTS | 1 | 6 | 11 IMPORTS | 1 | 6 | 9 EQ | 31 | LAN_BASEADR<8>.T = !D<8>.PIN & !RW & !FCS & !DS0 & LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB7_10 # D<8>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<8>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<8>.PIN & !RW & !FCS & !UDS & LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<8>.PIN & !RW & !FCS & !LDS & LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<8>.PIN & !RW & !FCS & !DS1 & LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB7_9 # D<8>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<8>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<8>.CLK = CLK_EXT; // GCK LAN_BASEADR<8>.AP = !RESET; LAN_BASEADR<8>.EXP = RW & !FCS & !UDS & Z3_DATA<31> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<31> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<31> & LAN_ACCESS GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 6 | 8 | LAN_BASEADR<9> ATTRIBUTES | 4359040 | 0 OUTPUTMC | 6 | 6 | 8 | 7 | 16 | 7 | 11 | 6 | 6 | 6 | 7 | 6 | 9 INPUTS | 20 | D<9>.PIN | RW | FCS | DS0 | LAN_BASEADR<9> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | D<8>.PIN | UDS | RESET | LAN_BASEADR<8> | LDS | EXP37_.EXP INPUTMC | 11 | 6 | 8 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 6 | 10 | 6 | 7 INPUTP | 9 | 73 | 158 | 147 | 170 | 148 | 32 | 155 | 263 | 157 EXPORTS | 1 | 6 | 9 IMPORTS | 1 | 6 | 7 EQ | 34 | LAN_BASEADR<9>.T = !D<9>.PIN & !RW & !FCS & !DS1 & LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<9>.PIN & !RW & !FCS & !DS0 & LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB7_8 # D<9>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<9>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<9>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<9>.PIN & !RW & !FCS & !UDS & LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<9>.PIN & !RW & !FCS & !LDS & LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB7_7 # D<9>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5>; LAN_BASEADR<9>.CLK = CLK_EXT; // GCK LAN_BASEADR<9>.AP = !RESET; LAN_BASEADR<9>.EXP = D<8>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<8>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 9 | 8 | LAN_INT_ENABLE ATTRIBUTES | 8553296 | 0 OUTPUTMC | 1 | 2 | 13 INPUTS | 7 | D<15>.PIN | RESET | RW | FCS | UDS | LAN_ACCESS | Z3_ADR<13> INPUTMC | 2 | 7 | 12 | 7 | 3 INPUTP | 5 | 89 | 263 | 158 | 147 | 155 EQ | 4 | LAN_INT_ENABLE.D = D<15>.PIN; LAN_INT_ENABLE.CLK = CLK_EXT; // GCK LAN_INT_ENABLE.AR = !RESET; LAN_INT_ENABLE.CE = !RW & !FCS & !UDS & LAN_ACCESS & Z3_ADR<13>; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 12 | LAN_IRQ_OUT ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 0 | 12 | 2 | 13 INPUTS | 4 | LAN_IRQ_OUT | LAN_IRQ_D0 | LAN_INT | RESET INPUTMC | 2 | 0 | 12 | 0 | 1 INPUTP | 2 | 201 | 263 EQ | 4 | LAN_IRQ_OUT.D = LAN_INT # LAN_IRQ_OUT & !LAN_IRQ_D0; LAN_IRQ_OUT.CLK = CLK_EXT; // GCK LAN_IRQ_OUT.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 14 | Z3_DATA<16> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 3 | 3 | 1 | 3 | 2 | 15 | 15 INPUTS | 10 | DQ_SWAP | DQ<0>.PIN | A<16>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | A<8>.PIN | Z3_DATA<17>.EXP INPUTMC | 7 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 | 15 | 13 INPUTP | 3 | 217 | 175 | 106 EXPORTS | 1 | 15 | 15 IMPORTS | 1 | 15 | 13 EQ | 11 | Z3_DATA<16>.D = !DQ_SWAP & DQ<0>.PIN ;Imported pterms FB16_14 # DQ_SWAP & DQ<8>.PIN; Z3_DATA<16>.CLK = CLK_EXT; // GCK Z3_DATA<16>.AP = LAN_SM_RST; Z3_DATA<16>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; Z3_DATA<16>.EXP = A<16>.PIN & LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<8>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 13 | Z3_DATA<17> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 3 | 1 | 14 | 1 | 13 | 15 | 14 INPUTS | 9 | DQ_SWAP | DQ<1>.PIN | DQ<9>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | DQ<8>.PIN INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 3 | 216 | 209 | 231 EXPORTS | 1 | 15 | 14 EQ | 7 | Z3_DATA<17>.D = DQ_SWAP & DQ<9>.PIN # !DQ_SWAP & DQ<1>.PIN; Z3_DATA<17>.CLK = CLK_EXT; // GCK Z3_DATA<17>.AP = LAN_SM_RST; Z3_DATA<17>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; Z3_DATA<17>.EXP = DQ_SWAP & DQ<8>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 12 | Z3_DATA<18> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 4 | 9 INPUTS | 8 | DQ_SWAP | DQ<10>.PIN | DQ<2>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 2 | 234 | 220 EQ | 6 | Z3_DATA<18>.D = DQ_SWAP & DQ<10>.PIN # !DQ_SWAP & DQ<2>.PIN; Z3_DATA<18>.CLK = CLK_EXT; // GCK Z3_DATA<18>.AP = LAN_SM_RST; Z3_DATA<18>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 11 | Z3_DATA<19> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 11 INPUTS | 8 | DQ_SWAP | DQ<11>.PIN | DQ<3>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 2 | 207 | 219 EQ | 6 | Z3_DATA<19>.D = DQ_SWAP & DQ<11>.PIN # !DQ_SWAP & DQ<3>.PIN; Z3_DATA<19>.CLK = CLK_EXT; // GCK Z3_DATA<19>.AP = LAN_SM_RST; Z3_DATA<19>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 17 | Z3_DATA<20> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 0 | 5 | 15 | 16 INPUTS | 11 | DQ_SWAP | DQ<12>.PIN | DQ<4>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | UDS | LDS | A<8>.PIN INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 5 | 235 | 225 | 155 | 157 | 106 EXPORTS | 1 | 15 | 16 EQ | 8 | Z3_DATA<20>.D = DQ_SWAP & DQ<12>.PIN # !DQ_SWAP & DQ<4>.PIN; Z3_DATA<20>.CLK = CLK_EXT; // GCK Z3_DATA<20>.AP = LAN_SM_RST; Z3_DATA<20>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; Z3_DATA<20>.EXP = UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<8>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 8 | Z3_DATA<21> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 0 | 4 INPUTS | 8 | DQ_SWAP | DQ<13>.PIN | DQ<5>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 2 | 204 | 221 EQ | 6 | Z3_DATA<21>.D = DQ_SWAP & DQ<13>.PIN # !DQ_SWAP & DQ<5>.PIN; Z3_DATA<21>.CLK = CLK_EXT; // GCK Z3_DATA<21>.AP = LAN_SM_RST; Z3_DATA<21>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 7 | Z3_DATA<22> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 9 INPUTS | 8 | DQ_SWAP | DQ<14>.PIN | DQ<6>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 2 | 236 | 227 EQ | 6 | Z3_DATA<22>.D = DQ_SWAP & DQ<14>.PIN # !DQ_SWAP & DQ<6>.PIN; Z3_DATA<22>.CLK = CLK_EXT; // GCK Z3_DATA<22>.AP = LAN_SM_RST; Z3_DATA<22>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 12 | Z3_DATA<23> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 1 | 13 | 1 | 12 INPUTS | 8 | DQ_SWAP | DQ<15>.PIN | DQ<7>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 2 | 202 | 226 EQ | 6 | Z3_DATA<23>.D = DQ_SWAP & DQ<15>.PIN # !DQ_SWAP & DQ<7>.PIN; Z3_DATA<23>.CLK = CLK_EXT; // GCK Z3_DATA<23>.AP = LAN_SM_RST; Z3_DATA<23>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 8 | Z3_DATA<24> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 17 INPUTS | 8 | DQ_SWAP | DQ<0>.PIN | DQ<8>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 2 | 217 | 231 EQ | 6 | Z3_DATA<24>.D = DQ_SWAP & DQ<0>.PIN # !DQ_SWAP & DQ<8>.PIN; Z3_DATA<24>.CLK = CLK_EXT; // GCK Z3_DATA<24>.AP = LAN_SM_RST; Z3_DATA<24>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 6 | Z3_DATA<25> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 4 | 11 | 4 | 10 INPUTS | 8 | DQ_SWAP | DQ<1>.PIN | DQ<9>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 2 | 216 | 209 EQ | 6 | Z3_DATA<25>.D = DQ_SWAP & DQ<1>.PIN # !DQ_SWAP & DQ<9>.PIN; Z3_DATA<25>.CLK = CLK_EXT; // GCK Z3_DATA<25>.AP = LAN_SM_RST; Z3_DATA<25>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 4 | Z3_DATA<26> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 4 | 13 | 4 | 12 INPUTS | 8 | DQ_SWAP | DQ<10>.PIN | DQ<2>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 2 | 234 | 220 EQ | 6 | Z3_DATA<26>.D = DQ_SWAP & DQ<2>.PIN # !DQ_SWAP & DQ<10>.PIN; Z3_DATA<26>.CLK = CLK_EXT; // GCK Z3_DATA<26>.AP = LAN_SM_RST; Z3_DATA<26>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 3 | Z3_DATA<27> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 4 | 14 | 4 | 15 INPUTS | 8 | DQ_SWAP | DQ<3>.PIN | DQ<11>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 2 | 219 | 207 EQ | 6 | Z3_DATA<27>.D = DQ_SWAP & DQ<3>.PIN # !DQ_SWAP & DQ<11>.PIN; Z3_DATA<27>.CLK = CLK_EXT; // GCK Z3_DATA<27>.AP = LAN_SM_RST; Z3_DATA<27>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 0 | Z3_DATA<28> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 4 | 16 | 4 | 17 INPUTS | 8 | DQ_SWAP | DQ<12>.PIN | DQ<4>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 2 | 235 | 225 EQ | 6 | Z3_DATA<28>.D = DQ_SWAP & DQ<4>.PIN # !DQ_SWAP & DQ<12>.PIN; Z3_DATA<28>.CLK = CLK_EXT; // GCK Z3_DATA<28>.AP = LAN_SM_RST; Z3_DATA<28>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 6 | Z3_DATA<29> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 6 | 2 | 6 | 3 INPUTS | 8 | DQ_SWAP | DQ<13>.PIN | DQ<5>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 2 | 204 | 221 EQ | 6 | Z3_DATA<29>.D = DQ_SWAP & DQ<5>.PIN # !DQ_SWAP & DQ<13>.PIN; Z3_DATA<29>.CLK = CLK_EXT; // GCK Z3_DATA<29>.AP = LAN_SM_RST; Z3_DATA<29>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 5 | Z3_DATA<30> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 2 | 6 | 4 | 6 | 5 INPUTS | 8 | DQ_SWAP | DQ<14>.PIN | DQ<6>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 2 | 236 | 227 EQ | 6 | Z3_DATA<30>.D = DQ_SWAP & DQ<6>.PIN # !DQ_SWAP & DQ<14>.PIN; Z3_DATA<30>.CLK = CLK_EXT; // GCK Z3_DATA<30>.AP = LAN_SM_RST; Z3_DATA<30>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 3 | Z3_DATA<31> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 3 | 6 | 11 | 6 | 10 | 14 | 4 INPUTS | 11 | DQ_SWAP | DQ<15>.PIN | DQ<7>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | A<20>.PIN | UDS | LDS INPUTMC | 6 | 7 | 17 | 9 | 12 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 INPUTP | 5 | 202 | 226 | 167 | 155 | 157 EXPORTS | 1 | 14 | 4 EQ | 8 | Z3_DATA<31>.D = DQ_SWAP & DQ<7>.PIN # !DQ_SWAP & DQ<15>.PIN; Z3_DATA<31>.CLK = CLK_EXT; // GCK Z3_DATA<31>.AP = LAN_SM_RST; Z3_DATA<31>.CE = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; Z3_DATA<31>.EXP = A<20>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 9 | 16 | DQ_10_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 4 | RESET | LAN_D_INIT<8> | DQ_DATA<10> | $OpTx$FX_DC$118__$INT INPUTMC | 3 | 11 | 14 | 10 | 0 | 4 | 17 INPUTP | 1 | 263 EQ | 3 | DQ<10> = RESET & DQ_DATA<10> # !RESET & LAN_D_INIT<8>; DQ<10>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 11 | 9 | DQ_11_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 4 | RESET | LAN_D_INIT<8> | DQ_DATA<11> | $OpTx$FX_DC$118__$INT INPUTMC | 3 | 11 | 14 | 10 | 15 | 4 | 17 INPUTP | 1 | 263 EQ | 3 | DQ<11> = RESET & DQ_DATA<11> # !RESET & LAN_D_INIT<8>; DQ<11>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 9 | 1 | DQ_1_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 4 | RESET | LAN_D_INIT<1> | DQ_DATA<1> | $OpTx$FX_DC$118__$INT INPUTMC | 3 | 11 | 15 | 12 | 0 | 4 | 17 INPUTP | 1 | 263 EQ | 3 | DQ<1> = RESET & DQ_DATA<1> # !RESET & LAN_D_INIT<1>; DQ<1>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 9 | 9 | DQ_4_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 4 | RESET | LAN_D_INIT<1> | DQ_DATA<4> | $OpTx$FX_DC$118__$INT INPUTMC | 3 | 11 | 15 | 14 | 5 | 4 | 17 INPUTP | 1 | 263 EQ | 3 | DQ<4> = RESET & DQ_DATA<4> # !RESET & LAN_D_INIT<1>; DQ<4>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 9 | 13 | DQ_8_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 4 | RESET | LAN_D_INIT<8> | DQ_DATA<8> | $OpTx$FX_DC$118__$INT INPUTMC | 3 | 11 | 14 | 12 | 11 | 4 | 17 INPUTP | 1 | 263 EQ | 3 | DQ<8> = RESET & DQ_DATA<8> # !RESET & LAN_D_INIT<8>; DQ<8>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 11 | 11 | DQ_9_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 4 | RESET | LAN_D_INIT<1> | DQ_DATA<9> | $OpTx$FX_DC$118__$INT INPUTMC | 3 | 11 | 15 | 12 | 15 | 4 | 17 INPUTP | 1 | 263 EQ | 3 | DQ<9> = RESET & DQ_DATA<9> # !RESET & LAN_D_INIT<1>; DQ<9>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 3 | 1 | D_0_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 3 | 0 INPUTS | 13 | RW | FCS | DS0 | Z3_DATA<16> | LAN_ACCESS | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | $OpTx$FX_SC$119__$INT | UDS | LDS | DS1 | CONFIG_READY.EXP INPUTMC | 7 | 15 | 14 | 7 | 12 | 13 | 17 | 5 | 3 | 5 | 11 | 6 | 6 | 3 | 2 INPUTP | 6 | 158 | 147 | 170 | 155 | 157 | 148 EXPORTS | 1 | 3 | 0 IMPORTS | 1 | 3 | 2 EQ | 9 | !D<0> = RW & !FCS & !DS0 & !Z3_DATA<16> & LAN_ACCESS ;Imported pterms FB4_3 # RW & !FCS & !UDS & !Z3_DATA<16> & LAN_ACCESS # RW & !FCS & !LDS & !Z3_DATA<16> & LAN_ACCESS # RW & !FCS & !DS1 & !Z3_DATA<16> & LAN_ACCESS; D<0>.OE = !$OpTx$FX_SC$119__$INT; D_0_IOBUFE.EXP = Z3_ADR_1 & Z3_ADR_0 # !Z3_ADR_0 & Z3_ADR<6> # UDS & LDS & DS1 & DS0 MACROCELL | 4 | 13 | D_10_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | FCS | D_OUT<2> | LAN_ACCESS | RW | DS0 | Z3_DATA<26> | EXP31_.EXP | $OpTx$FX_SC$119__$INT INPUTMC | 5 | 6 | 15 | 7 | 12 | 15 | 4 | 4 | 12 | 6 | 6 INPUTP | 3 | 147 | 158 | 170 IMPORTS | 1 | 4 | 12 EQ | 10 | D<10> = !RW & D_OUT<2> # FCS & D_OUT<2> # !LAN_ACCESS & D_OUT<2> # RW & !FCS & !DS0 & Z3_DATA<26> & LAN_ACCESS ;Imported pterms FB5_13 # RW & !FCS & !UDS & Z3_DATA<26> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<26> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<26> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<2>; D<10>.OE = !$OpTx$FX_SC$119__$INT; MACROCELL | 4 | 14 | D_11_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | FCS | D_OUT<3> | LAN_ACCESS | RW | DS0 | Z3_DATA<27> | EXP32_.EXP | $OpTx$FX_SC$119__$INT INPUTMC | 5 | 9 | 15 | 7 | 12 | 15 | 3 | 4 | 15 | 6 | 6 INPUTP | 3 | 147 | 158 | 170 IMPORTS | 1 | 4 | 15 EQ | 10 | D<11> = !RW & D_OUT<3> # FCS & D_OUT<3> # !LAN_ACCESS & D_OUT<3> # RW & !FCS & !DS0 & Z3_DATA<27> & LAN_ACCESS ;Imported pterms FB5_16 # RW & !FCS & !UDS & Z3_DATA<27> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<27> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<27> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<3>; D<11>.OE = !$OpTx$FX_SC$119__$INT; MACROCELL | 4 | 16 | D_12_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | FCS | D_OUT<4> | LAN_ACCESS | RW | DS0 | Z3_DATA<28> | $OpTx$FX_DC$118__$INT.EXP | $OpTx$FX_SC$119__$INT INPUTMC | 5 | 3 | 17 | 7 | 12 | 15 | 0 | 4 | 17 | 6 | 6 INPUTP | 3 | 147 | 158 | 170 IMPORTS | 1 | 4 | 17 EQ | 10 | D<12> = !RW & D_OUT<4> # FCS & D_OUT<4> # !LAN_ACCESS & D_OUT<4> # RW & !FCS & !DS0 & Z3_DATA<28> & LAN_ACCESS ;Imported pterms FB5_18 # RW & !FCS & !UDS & Z3_DATA<28> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<28> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<28> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<4>; D<12>.OE = !$OpTx$FX_SC$119__$INT; MACROCELL | 6 | 2 | D_13_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | FCS | D_OUT<5> | LAN_ACCESS | RW | DS0 | Z3_DATA<29> | EXP35_.EXP | $OpTx$FX_SC$119__$INT INPUTMC | 5 | 3 | 16 | 7 | 12 | 10 | 6 | 6 | 3 | 6 | 6 INPUTP | 3 | 147 | 158 | 170 IMPORTS | 1 | 6 | 3 EQ | 10 | D<13> = !RW & D_OUT<5> # FCS & D_OUT<5> # !LAN_ACCESS & D_OUT<5> # RW & !FCS & !DS0 & Z3_DATA<29> & LAN_ACCESS ;Imported pterms FB7_4 # RW & !FCS & !UDS & Z3_DATA<29> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<29> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<29> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<5>; D<13>.OE = !$OpTx$FX_SC$119__$INT; MACROCELL | 6 | 4 | D_14_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | FCS | D_OUT<6> | LAN_ACCESS | RW | DS0 | Z3_DATA<30> | EXP36_.EXP | $OpTx$FX_SC$119__$INT INPUTMC | 5 | 6 | 0 | 7 | 12 | 10 | 5 | 6 | 5 | 6 | 6 INPUTP | 3 | 147 | 158 | 170 IMPORTS | 1 | 6 | 5 EQ | 10 | D<14> = !RW & D_OUT<6> # FCS & D_OUT<6> # !LAN_ACCESS & D_OUT<6> # RW & !FCS & !DS0 & Z3_DATA<30> & LAN_ACCESS ;Imported pterms FB7_6 # RW & !FCS & !UDS & Z3_DATA<30> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<30> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<30> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<6>; D<14>.OE = !$OpTx$FX_SC$119__$INT; MACROCELL | 6 | 11 | D_15_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 9 | FCS | D_OUT<7> | LAN_ACCESS | RW | DS0 | Z3_DATA<31> | LAN_BASEADR<8>.EXP | LAN_BASEADR<7>.EXP | $OpTx$FX_SC$119__$INT INPUTMC | 6 | 9 | 14 | 7 | 12 | 14 | 3 | 6 | 10 | 6 | 12 | 6 | 6 INPUTP | 3 | 147 | 158 | 170 IMPORTS | 2 | 6 | 10 | 6 | 12 EQ | 11 | D<15> = !RW & D_OUT<7> # FCS & D_OUT<7> # !LAN_ACCESS & D_OUT<7> # RW & !FCS & !DS0 & Z3_DATA<31> & LAN_ACCESS ;Imported pterms FB7_11 # RW & !FCS & !UDS & Z3_DATA<31> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<31> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<31> & LAN_ACCESS ;Imported pterms FB7_13 # UDS & LDS & DS1 & DS0 & D_OUT<7>; D<15>.OE = !$OpTx$FX_SC$119__$INT; MACROCELL | 1 | 14 | D_1_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 1 | 15 INPUTS | 19 | RW | FCS | DS0 | Z3_DATA<17> | LAN_ACCESS | D<10>.PIN | UDS | LAN_BASEADR<10> | $OpTx$FX_SC$119__$INT | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | D_7_IOBUFE.EXP INPUTMC | 13 | 15 | 13 | 7 | 12 | 1 | 15 | 6 | 6 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 1 | 13 INPUTP | 6 | 158 | 147 | 170 | 74 | 155 | 148 EXPORTS | 1 | 1 | 15 IMPORTS | 1 | 1 | 13 EQ | 15 | !D<1> = RW & !FCS & !DS0 & !Z3_DATA<17> & LAN_ACCESS ;Imported pterms FB2_14 # RW & !FCS & !UDS & !Z3_DATA<17> & LAN_ACCESS # RW & !FCS & !LDS & !Z3_DATA<17> & LAN_ACCESS # RW & !FCS & !DS1 & !Z3_DATA<17> & LAN_ACCESS; D<1>.OE = !$OpTx$FX_SC$119__$INT; D_1_IOBUFE.EXP = D<10>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<10> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<10>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<10> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<10>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<10> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 4 | 9 | D_2_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 9 | RW | FCS | DS0 | Z3_DATA<18> | LAN_ACCESS | DS1 | UDS | LDS | $OpTx$FX_SC$119__$INT INPUTMC | 3 | 15 | 12 | 7 | 12 | 6 | 6 INPUTP | 6 | 158 | 147 | 170 | 148 | 155 | 157 EQ | 5 | !D<2> = RW & !FCS & !UDS & !Z3_DATA<18> & LAN_ACCESS # RW & !FCS & !LDS & !Z3_DATA<18> & LAN_ACCESS # RW & !FCS & !DS1 & !Z3_DATA<18> & LAN_ACCESS # RW & !FCS & !DS0 & !Z3_DATA<18> & LAN_ACCESS; D<2>.OE = !$OpTx$FX_SC$119__$INT; MACROCELL | 1 | 11 | D_3_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 9 | RW | FCS | DS0 | Z3_DATA<19> | LAN_ACCESS | DS1 | UDS | LDS | $OpTx$FX_SC$119__$INT INPUTMC | 3 | 15 | 11 | 7 | 12 | 6 | 6 INPUTP | 6 | 158 | 147 | 170 | 148 | 155 | 157 EQ | 5 | !D<3> = RW & !FCS & !UDS & !Z3_DATA<19> & LAN_ACCESS # RW & !FCS & !LDS & !Z3_DATA<19> & LAN_ACCESS # RW & !FCS & !DS1 & !Z3_DATA<19> & LAN_ACCESS # RW & !FCS & !DS0 & !Z3_DATA<19> & LAN_ACCESS; D<3>.OE = !$OpTx$FX_SC$119__$INT; MACROCELL | 0 | 5 | D_4_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 9 | RW | FCS | DS0 | Z3_DATA<20> | LAN_ACCESS | DS1 | UDS | LDS | $OpTx$FX_SC$119__$INT INPUTMC | 3 | 15 | 17 | 7 | 12 | 6 | 6 INPUTP | 6 | 158 | 147 | 170 | 148 | 155 | 157 EQ | 5 | !D<4> = RW & !FCS & !UDS & !Z3_DATA<20> & LAN_ACCESS # RW & !FCS & !LDS & !Z3_DATA<20> & LAN_ACCESS # RW & !FCS & !DS1 & !Z3_DATA<20> & LAN_ACCESS # RW & !FCS & !DS0 & !Z3_DATA<20> & LAN_ACCESS; D<4>.OE = !$OpTx$FX_SC$119__$INT; MACROCELL | 0 | 4 | D_5_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 9 | RW | FCS | DS0 | Z3_DATA<21> | LAN_ACCESS | DS1 | UDS | LDS | $OpTx$FX_SC$119__$INT INPUTMC | 3 | 10 | 8 | 7 | 12 | 6 | 6 INPUTP | 6 | 158 | 147 | 170 | 148 | 155 | 157 EQ | 5 | !D<5> = RW & !FCS & !UDS & !Z3_DATA<21> & LAN_ACCESS # RW & !FCS & !LDS & !Z3_DATA<21> & LAN_ACCESS # RW & !FCS & !DS1 & !Z3_DATA<21> & LAN_ACCESS # RW & !FCS & !DS0 & !Z3_DATA<21> & LAN_ACCESS; D<5>.OE = !$OpTx$FX_SC$119__$INT; MACROCELL | 1 | 9 | D_6_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 9 | RW | FCS | DS0 | Z3_DATA<22> | LAN_ACCESS | DS1 | UDS | LDS | $OpTx$FX_SC$119__$INT INPUTMC | 3 | 10 | 7 | 7 | 12 | 6 | 6 INPUTP | 6 | 158 | 147 | 170 | 148 | 155 | 157 EQ | 5 | !D<6> = RW & !FCS & !UDS & !Z3_DATA<22> & LAN_ACCESS # RW & !FCS & !LDS & !Z3_DATA<22> & LAN_ACCESS # RW & !FCS & !DS1 & !Z3_DATA<22> & LAN_ACCESS # RW & !FCS & !DS0 & !Z3_DATA<22> & LAN_ACCESS; D<6>.OE = !$OpTx$FX_SC$119__$INT; MACROCELL | 1 | 13 | D_7_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 1 | 14 INPUTS | 11 | RW | FCS | DS0 | Z3_DATA<23> | LAN_ACCESS | UDS | Z3_DATA<17> | LDS | $OpTx$FX_SC$119__$INT | DS1 | EXP22_.EXP INPUTMC | 5 | 14 | 12 | 7 | 12 | 15 | 13 | 6 | 6 | 1 | 12 INPUTP | 6 | 158 | 147 | 170 | 155 | 157 | 148 EXPORTS | 1 | 1 | 14 IMPORTS | 1 | 1 | 12 EQ | 9 | !D<7> = RW & !FCS & !DS0 & !Z3_DATA<23> & LAN_ACCESS ;Imported pterms FB2_13 # RW & !FCS & !UDS & !Z3_DATA<23> & LAN_ACCESS # RW & !FCS & !LDS & !Z3_DATA<23> & LAN_ACCESS # RW & !FCS & !DS1 & !Z3_DATA<23> & LAN_ACCESS; D<7>.OE = !$OpTx$FX_SC$119__$INT; D_7_IOBUFE.EXP = RW & !FCS & !UDS & !Z3_DATA<17> & LAN_ACCESS # RW & !FCS & !LDS & !Z3_DATA<17> & LAN_ACCESS # RW & !FCS & !DS1 & !Z3_DATA<17> & LAN_ACCESS MACROCELL | 1 | 16 | D_8_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 1 | 15 INPUTS | 17 | FCS | D_OUT<0> | LAN_ACCESS | RW | D<10>.PIN | LDS | LAN_BASEADR<10> | Z3_ADR<2> | Z3_ADR_1 | $OpTx$FX_SC$119__$INT | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | EXP23_.EXP INPUTMC | 13 | 9 | 17 | 7 | 12 | 1 | 15 | 5 | 16 | 13 | 17 | 6 | 6 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 1 | 17 INPUTP | 4 | 147 | 158 | 74 | 157 EXPORTS | 1 | 1 | 15 IMPORTS | 1 | 1 | 17 EQ | 13 | D<8> = !RW & D_OUT<0> # FCS & D_OUT<0> # !LAN_ACCESS & D_OUT<0> ;Imported pterms FB2_18 # RW & !FCS & !UDS & Z3_DATA<24> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<24> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<24> & LAN_ACCESS # RW & !FCS & !DS0 & Z3_DATA<24> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<0>; D<8>.OE = !$OpTx$FX_SC$119__$INT; D_8_IOBUFE.EXP = D<10>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<10> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 4 | 11 | D_9_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | FCS | D_OUT<1> | LAN_ACCESS | RW | DS0 | Z3_DATA<25> | EXP30_.EXP | $OpTx$FX_SC$119__$INT INPUTMC | 5 | 6 | 17 | 7 | 12 | 15 | 6 | 4 | 10 | 6 | 6 INPUTP | 3 | 147 | 158 | 170 IMPORTS | 1 | 4 | 10 EQ | 10 | D<9> = !RW & D_OUT<1> # FCS & D_OUT<1> # !LAN_ACCESS & D_OUT<1> # RW & !FCS & !DS0 & Z3_DATA<25> & LAN_ACCESS ;Imported pterms FB5_11 # RW & !FCS & !UDS & Z3_DATA<25> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<25> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<25> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<1>; D<9>.OE = !$OpTx$FX_SC$119__$INT; MACROCELL | 9 | 2 | DQ_0_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 3 | RESET | DQ_DATA<0> | $OpTx$FX_DC$118__$INT INPUTMC | 2 | 15 | 15 | 4 | 17 INPUTP | 1 | 263 EQ | 2 | DQ<0> = RESET & DQ_DATA<0>; DQ<0>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 7 | 1 | DQ_12_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 7 | 0 INPUTS | 7 | RESET | DQ_DATA<12> | $OpTx$FX_DC$118__$INT | D<13>.PIN | LAN_BASEADR<13> | LAN_BASEADR<6> | A<22>.PIN INPUTMC | 4 | 14 | 0 | 4 | 17 | 4 | 3 | 3 | 3 INPUTP | 3 | 263 | 80 | 162 EXPORTS | 1 | 7 | 0 EQ | 5 | DQ<12> = RESET & DQ_DATA<12>; DQ<12>.OE = !$OpTx$FX_DC$118__$INT; DQ_12_IOBUFE.EXP = !D<13>.PIN & LAN_BASEADR<13> # LAN_BASEADR<6> & !A<22>.PIN # !LAN_BASEADR<6> & A<22>.PIN MACROCELL | 11 | 7 | DQ_13_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 3 | RESET | DQ_DATA<13> | $OpTx$FX_DC$118__$INT INPUTMC | 2 | 14 | 10 | 4 | 17 INPUTP | 1 | 263 EQ | 2 | DQ<13> = RESET & DQ_DATA<13>; DQ<13>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 7 | 2 | DQ_14_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 3 | RESET | DQ_DATA<14> | $OpTx$FX_DC$118__$INT INPUTMC | 2 | 8 | 17 | 4 | 17 INPUTP | 1 | 263 EQ | 2 | DQ<14> = RESET & DQ_DATA<14>; DQ<14>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 11 | 4 | DQ_15_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 3 | RESET | DQ_DATA<15> | $OpTx$FX_DC$118__$INT INPUTMC | 2 | 8 | 15 | 4 | 17 INPUTP | 1 | 263 EQ | 2 | DQ<15> = RESET & DQ_DATA<15>; DQ<15>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 9 | 5 | DQ_2_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 3 | RESET | DQ_DATA<2> | $OpTx$FX_DC$118__$INT INPUTMC | 2 | 10 | 12 | 4 | 17 INPUTP | 1 | 263 EQ | 2 | DQ<2> = RESET & DQ_DATA<2>; DQ<2>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 9 | 4 | DQ_3_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 3 | RESET | DQ_DATA<3> | $OpTx$FX_DC$118__$INT INPUTMC | 2 | 12 | 5 | 4 | 17 INPUTP | 1 | 263 EQ | 2 | DQ<3> = RESET & DQ_DATA<3>; DQ<3>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 9 | 7 | DQ_5_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 3 | RESET | DQ_DATA<5> | $OpTx$FX_DC$118__$INT INPUTMC | 2 | 14 | 6 | 4 | 17 INPUTP | 1 | 263 EQ | 2 | DQ<5> = RESET & DQ_DATA<5>; DQ<5>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 9 | 11 | DQ_6_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 3 | RESET | DQ_DATA<6> | $OpTx$FX_DC$118__$INT INPUTMC | 2 | 8 | 8 | 4 | 17 INPUTP | 1 | 263 EQ | 2 | DQ<6> = RESET & DQ_DATA<6>; DQ<6>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 9 | 10 | DQ_7_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 3 | RESET | DQ_DATA<7> | $OpTx$FX_DC$118__$INT INPUTMC | 2 | 8 | 3 | 4 | 17 INPUTP | 1 | 263 EQ | 2 | DQ<7> = RESET & DQ_DATA<7>; DQ<7>.OE = !$OpTx$FX_DC$118__$INT; MACROCELL | 8 | 7 | LAN_SM_FSM_FFd4 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 87 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 14 | 15 | 13 | 15 | 12 | 15 | 11 | 15 | 17 | 10 | 8 | 10 | 7 | 14 | 12 | 15 | 8 | 15 | 6 | 15 | 4 | 15 | 3 | 15 | 0 | 10 | 6 | 10 | 5 | 14 | 3 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 | 15 | 15 | 10 | 0 | 10 | 15 | 14 | 0 | 14 | 10 | 8 | 17 | 8 | 15 | 12 | 0 | 10 | 12 | 12 | 5 | 14 | 5 | 14 | 6 | 8 | 8 | 8 | 3 | 12 | 11 | 12 | 15 | 12 | 14 | 0 | 17 | 0 | 6 | 0 | 3 | 8 | 12 | 8 | 0 | 8 | 1 | 8 | 2 | 8 | 4 | 8 | 6 | 8 | 9 | 8 | 11 | 8 | 14 | 10 | 1 | 10 | 11 | 10 | 13 | 10 | 14 | 10 | 16 | 10 | 17 | 12 | 1 | 12 | 4 | 12 | 6 | 12 | 10 | 12 | 12 | 12 | 13 | 12 | 16 | 12 | 17 | 14 | 2 | 14 | 4 | 14 | 7 | 14 | 8 | 14 | 9 | 14 | 11 | 14 | 17 | 15 | 16 INPUTS | 11 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_SWAP | LAN_SM_FSM_FFd3 | A<22>.PIN | A<14>.PIN | LAN_SM_RST | D<14>.PIN | UDS | EXP52_.EXP INPUTMC | 7 | 8 | 7 | 8 | 5 | 0 | 15 | 7 | 17 | 14 | 1 | 9 | 12 | 8 | 6 INPUTP | 4 | 162 | 125 | 81 | 155 EXPORTS | 1 | 8 | 8 IMPORTS | 1 | 8 | 6 EQ | 19 | LAN_SM_FSM_FFd4.D = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 ;Imported pterms FB9_7 # RW & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3 # DS1 & DS0 & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; LAN_SM_FSM_FFd4.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd4.AR = LAN_SM_RST; LAN_SM_FSM_FFd4.EXP = LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<22>.PIN # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<14>.PIN # D<14>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 7 | 17 | DQ_SWAP ATTRIBUTES | 8520608 | 0 OUTPUTMC | 64 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 12 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 14 | 15 | 13 | 15 | 12 | 15 | 11 | 15 | 17 | 10 | 8 | 10 | 7 | 14 | 12 | 15 | 8 | 15 | 6 | 15 | 4 | 15 | 3 | 15 | 0 | 10 | 6 | 10 | 5 | 14 | 3 | 14 | 17 | 8 | 17 | 10 | 14 | 12 | 17 | 14 | 9 | 8 | 16 | 8 | 14 | 10 | 17 | 10 | 11 | 12 | 4 | 14 | 4 | 14 | 1 | 8 | 7 | 8 | 2 | 12 | 10 | 12 | 14 | 8 | 0 | 8 | 1 | 8 | 4 | 8 | 9 | 10 | 1 | 10 | 13 | 10 | 16 | 12 | 1 | 12 | 6 | 12 | 12 | 12 | 16 | 14 | 6 | 14 | 7 | 14 | 8 | 14 | 11 | 15 | 16 INPUTS | 7 | SHUT_UP | Z3 | $OpTx$INV$205 | EXP42_.EXP | EXP47_.EXP | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 5 | 1 | 8 | 5 | 0 | 7 | 0 | 7 | 16 | 11 | 12 INPUTP | 2 | 151 | 147 IMPORTS | 2 | 7 | 0 | 7 | 16 EQ | 27 | DQ_SWAP.D = !Z3 # SHUT_UP # $OpTx$INV$205 ;Imported pterms FB8_1 # !D<11>.PIN & LAN_BASEADR<11> # D<10>.PIN & !LAN_BASEADR<10> # !D<10>.PIN & LAN_BASEADR<10> # D<15>.PIN & !LAN_BASEADR<15> # !D<15>.PIN & LAN_BASEADR<15> ;Imported pterms FB8_2 # !D<13>.PIN & LAN_BASEADR<13> # LAN_BASEADR<6> & !A<22>.PIN # !LAN_BASEADR<6> & A<22>.PIN ;Imported pterms FB8_17 # !A<13>.PIN # !A<14>.PIN # D<9>.PIN & !LAN_BASEADR<9> # !D<9>.PIN & LAN_BASEADR<9> # D<11>.PIN & !LAN_BASEADR<11> ;Imported pterms FB8_16 # D<8>.PIN & !LAN_BASEADR<8> # !D<8>.PIN & LAN_BASEADR<8> # D<13>.PIN & !LAN_BASEADR<13> # D<12>.PIN & !LAN_BASEADR<12> # !D<12>.PIN & LAN_BASEADR<12>; DQ_SWAP.CLK = !FCS; DQ_SWAP.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 8 | 5 | LAN_SM_FSM_FFd2 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 85 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 14 | 15 | 13 | 15 | 12 | 15 | 11 | 15 | 17 | 10 | 8 | 10 | 7 | 14 | 12 | 15 | 8 | 15 | 6 | 15 | 4 | 15 | 3 | 15 | 0 | 10 | 6 | 10 | 5 | 14 | 3 | 8 | 7 | 8 | 5 | 14 | 1 | 15 | 15 | 10 | 0 | 10 | 15 | 14 | 0 | 14 | 10 | 8 | 17 | 8 | 15 | 12 | 0 | 10 | 12 | 12 | 5 | 14 | 5 | 14 | 6 | 8 | 8 | 8 | 3 | 12 | 11 | 12 | 15 | 12 | 14 | 0 | 17 | 0 | 6 | 0 | 3 | 8 | 11 | 8 | 0 | 8 | 1 | 8 | 2 | 8 | 4 | 8 | 6 | 8 | 9 | 8 | 14 | 10 | 1 | 10 | 11 | 10 | 13 | 10 | 14 | 10 | 16 | 10 | 17 | 12 | 1 | 12 | 4 | 12 | 6 | 12 | 10 | 12 | 12 | 12 | 13 | 12 | 16 | 12 | 17 | 14 | 2 | 14 | 4 | 14 | 7 | 14 | 8 | 14 | 9 | 14 | 11 | 14 | 17 | 15 | 16 INPUTS | 8 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | UDS | LDS | RW | LAN_SM_RST INPUTMC | 5 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 | 9 | 12 INPUTP | 3 | 155 | 157 | 158 EQ | 10 | !LAN_SM_FSM_FFd2.D = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # RW & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # !UDS & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # !LDS & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; LAN_SM_FSM_FFd2.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd2.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 15 | LAN_SM_FSM_FFd1 ATTRIBUTES | 4358928 | 0 OUTPUTMC | 73 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 14 | 15 | 13 | 15 | 12 | 15 | 11 | 15 | 17 | 10 | 8 | 10 | 7 | 14 | 12 | 15 | 8 | 15 | 6 | 15 | 4 | 15 | 3 | 15 | 0 | 10 | 6 | 10 | 5 | 14 | 3 | 8 | 7 | 8 | 5 | 0 | 15 | 12 | 17 | 15 | 15 | 10 | 0 | 10 | 15 | 14 | 0 | 14 | 10 | 8 | 17 | 8 | 15 | 12 | 0 | 10 | 12 | 12 | 5 | 14 | 5 | 14 | 6 | 8 | 8 | 8 | 3 | 12 | 11 | 12 | 15 | 12 | 13 | 0 | 17 | 0 | 6 | 0 | 3 | 8 | 12 | 8 | 0 | 8 | 2 | 8 | 6 | 8 | 11 | 8 | 14 | 10 | 11 | 10 | 14 | 10 | 17 | 12 | 4 | 12 | 10 | 12 | 14 | 14 | 2 | 14 | 4 | 14 | 7 | 14 | 9 | 14 | 17 INPUTS | 6 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | DS0 | DS1 | LAN_SM_RST INPUTMC | 4 | 8 | 7 | 0 | 15 | 14 | 1 | 9 | 12 INPUTP | 2 | 170 | 148 EQ | 8 | LAN_SM_FSM_FFd1.T = !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3 # !DS1 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # !DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; LAN_SM_FSM_FFd1.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd1.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 1 | LAN_SM_FSM_FFd3 ATTRIBUTES | 4358928 | 0 OUTPUTMC | 86 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 14 | 15 | 13 | 15 | 12 | 15 | 11 | 15 | 17 | 10 | 8 | 10 | 7 | 14 | 12 | 15 | 8 | 15 | 6 | 15 | 4 | 15 | 3 | 15 | 0 | 10 | 6 | 10 | 5 | 14 | 3 | 8 | 6 | 8 | 5 | 0 | 15 | 12 | 17 | 15 | 15 | 10 | 0 | 10 | 15 | 14 | 0 | 14 | 10 | 8 | 14 | 8 | 15 | 12 | 0 | 10 | 12 | 12 | 5 | 14 | 5 | 14 | 4 | 8 | 8 | 8 | 3 | 12 | 11 | 12 | 15 | 12 | 13 | 0 | 17 | 0 | 6 | 0 | 3 | 8 | 12 | 8 | 0 | 8 | 1 | 8 | 2 | 8 | 4 | 8 | 7 | 8 | 9 | 8 | 11 | 10 | 1 | 10 | 11 | 10 | 13 | 10 | 14 | 10 | 16 | 10 | 17 | 12 | 1 | 12 | 4 | 12 | 6 | 12 | 10 | 12 | 12 | 12 | 14 | 12 | 16 | 14 | 1 | 14 | 2 | 14 | 6 | 14 | 7 | 14 | 8 | 14 | 9 | 14 | 11 | 14 | 17 | 15 | 16 INPUTS | 11 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LDS | D<4>.PIN | DQ_SWAP | LAN_SM_FSM_FFd3 | A<20>.PIN | UDS | A<12>.PIN | LAN_SM_RST | EXP64_.EXP INPUTMC | 6 | 8 | 7 | 8 | 5 | 7 | 17 | 14 | 1 | 9 | 12 | 14 | 2 INPUTP | 5 | 157 | 38 | 167 | 155 | 115 EXPORTS | 1 | 14 | 0 IMPORTS | 1 | 14 | 2 EQ | 15 | !LAN_SM_FSM_FFd3.T = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 ;Imported pterms FB15_3 # LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3 # RW & !UDS & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 # RW & !LDS & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 # DS1 & DS0 & LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1 # DS1 & DS0 & LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd3; LAN_SM_FSM_FFd3.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd3.AR = LAN_SM_RST; LAN_SM_FSM_FFd3.EXP = !LDS & D<4>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<20>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<12>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 16 | Z3_ADR<2> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 46 | 4 | 0 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 10 | 6 | 8 | 1 | 8 | 9 | 17 | 6 | 16 | 6 | 15 | 3 | 13 | 3 | 15 | 4 | 8 | 3 | 7 | 1 | 1 | 1 | 2 | 1 | 7 | 1 | 14 | 1 | 16 | 3 | 0 | 3 | 4 | 3 | 5 | 3 | 10 | 3 | 11 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 5 | 6 | 1 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 13 | 6 | 14 | 5 | 17 INPUTS | 5 | A<4> | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT | A<19>.PIN | LAN_BASEADR<3> INPUTMC | 2 | 11 | 12 | 3 | 8 INPUTP | 3 | 97 | 147 | 169 EXPORTS | 1 | 5 | 17 EQ | 5 | Z3_ADR<2>.D = A<4>; Z3_ADR<2>.CLK = !FCS; Z3_ADR<2>.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; Z3_ADR<2>.EXP = A<19>.PIN & !LAN_BASEADR<3> # !A<19>.PIN & LAN_BASEADR<3> MACROCELL | 13 | 17 | Z3_ADR_1 ATTRIBUTES | 8520608 | 0 OUTPUTMC | 46 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 10 | 6 | 8 | 1 | 8 | 9 | 17 | 6 | 16 | 6 | 15 | 9 | 15 | 3 | 13 | 3 | 15 | 6 | 0 | 9 | 14 | 3 | 11 | 1 | 1 | 1 | 2 | 1 | 7 | 1 | 14 | 1 | 16 | 3 | 1 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 10 | 3 | 17 | 4 | 2 | 4 | 4 | 4 | 5 | 4 | 8 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 13 | 6 | 14 INPUTS | 3 | A<3> | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 1 | 11 | 12 INPUTP | 2 | 99 | 147 EQ | 3 | Z3_ADR_1.D = A<3>; Z3_ADR_1.CLK = !FCS; Z3_ADR_1.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 5 | 3 | Z3_ADR_0 ATTRIBUTES | 8520608 | 0 OUTPUTMC | 47 | 4 | 0 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 10 | 6 | 8 | 1 | 8 | 9 | 17 | 6 | 16 | 6 | 15 | 3 | 13 | 3 | 15 | 4 | 8 | 3 | 4 | 1 | 1 | 1 | 2 | 1 | 7 | 1 | 14 | 1 | 16 | 3 | 0 | 3 | 1 | 3 | 5 | 3 | 7 | 3 | 10 | 3 | 11 | 3 | 17 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 5 | 6 | 1 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 13 | 6 | 14 INPUTS | 3 | A<2> | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 1 | 11 | 12 INPUTP | 2 | 101 | 147 EQ | 3 | Z3_ADR_0.D = A<2>; Z3_ADR_0.CLK = !FCS; Z3_ADR_0.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 5 | 11 | Z3_ADR<6> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 43 | 4 | 0 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 10 | 6 | 8 | 1 | 8 | 3 | 13 | 3 | 15 | 4 | 8 | 9 | 14 | 1 | 2 | 1 | 1 | 1 | 7 | 1 | 14 | 1 | 16 | 3 | 0 | 3 | 1 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 10 | 3 | 11 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 5 | 6 | 1 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 13 INPUTS | 3 | A<8>.PIN | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 1 | 11 | 12 INPUTP | 2 | 106 | 147 EQ | 3 | Z3_ADR<6>.D = A<8>.PIN; Z3_ADR<6>.CLK = !FCS; Z3_ADR<6>.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 7 | 12 | LAN_ACCESS ATTRIBUTES | 8520496 | 0 OUTPUTMC | 48 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 9 | 8 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 3 | 2 | 9 | 12 | 7 | 7 | 13 | 13 | 4 | 15 | 6 | 6 | 1 | 12 | 1 | 17 | 4 | 0 | 4 | 10 | 4 | 12 | 4 | 17 | 6 | 3 | 6 | 5 | 6 | 10 INPUTS | 7 | SHUT_UP | Z3 | $OpTx$INV$205 | EXP43_.EXP | EXP44_.EXP | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 5 | 1 | 8 | 5 | 0 | 7 | 11 | 7 | 13 | 11 | 12 INPUTP | 2 | 151 | 147 IMPORTS | 2 | 7 | 11 | 7 | 13 EQ | 25 | !LAN_ACCESS.D = !Z3 # SHUT_UP # $OpTx$INV$205 ;Imported pterms FB8_12 # D<9>.PIN & !LAN_BASEADR<9> # !D<9>.PIN & LAN_BASEADR<9> # D<11>.PIN & !LAN_BASEADR<11> # !D<11>.PIN & LAN_BASEADR<11> # D<15>.PIN & !LAN_BASEADR<15> ;Imported pterms FB8_11 # D<8>.PIN & !LAN_BASEADR<8> ;Imported pterms FB8_14 # D<12>.PIN & !LAN_BASEADR<12> # !D<12>.PIN & LAN_BASEADR<12> # D<10>.PIN & !LAN_BASEADR<10> # !D<10>.PIN & LAN_BASEADR<10> # !D<15>.PIN & LAN_BASEADR<15> ;Imported pterms FB8_15 # !D<8>.PIN & LAN_BASEADR<8> # D<13>.PIN & !LAN_BASEADR<13> # !D<13>.PIN & LAN_BASEADR<13> # LAN_BASEADR<6> & !A<22>.PIN # !LAN_BASEADR<6> & A<22>.PIN; LAN_ACCESS.CLK = !FCS; LAN_ACCESS.AR = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 0 | 0 | LAN_RST_SM_FSM_FFd1 ATTRIBUTES | 4358928 | 0 OUTPUTMC | 6 | 0 | 0 | 0 | 10 | 0 | 8 | 11 | 15 | 11 | 14 | 11 | 16 INPUTS | 4 | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | RESET INPUTMC | 3 | 0 | 0 | 0 | 10 | 0 | 8 INPUTP | 1 | 263 EQ | 4 | LAN_RST_SM_FSM_FFd1.T = !LAN_RST_SM_FSM_FFd1 & LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3; LAN_RST_SM_FSM_FFd1.CLK = CLK_EXT; // GCK LAN_RST_SM_FSM_FFd1.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 17 | AUTOCONFIG_ACCESS ATTRIBUTES | 8520496 | 0 OUTPUTMC | 49 | 4 | 0 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 10 | 6 | 8 | 1 | 8 | 9 | 17 | 6 | 16 | 6 | 15 | 9 | 15 | 3 | 13 | 3 | 15 | 4 | 8 | 9 | 14 | 13 | 13 | 6 | 6 | 9 | 3 | 1 | 1 | 1 | 2 | 1 | 7 | 1 | 14 | 1 | 16 | 3 | 0 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 10 | 3 | 11 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 5 | 6 | 1 | 6 | 7 | 6 | 9 | 6 | 13 | 6 | 14 INPUTS | 21 | Z3 | D<9>.PIN | D<8>.PIN | D<14>.PIN | D<13>.PIN | D<12>.PIN | D<11>.PIN | D<10>.PIN | D<15>.PIN | CFIN | A<20>.PIN | A<19>.PIN | A<18>.PIN | A<17>.PIN | A<16>.PIN | A<23>.PIN | A<22>.PIN | A<21>.PIN | CFOUT | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 2 | 13 | 10 | 11 | 12 INPUTP | 19 | 151 | 73 | 32 | 81 | 80 | 78 | 77 | 74 | 89 | 190 | 167 | 169 | 171 | 172 | 175 | 161 | 162 | 163 | 147 EQ | 6 | AUTOCONFIG_ACCESS.D = Z3 & D<9>.PIN & D<8>.PIN & D<14>.PIN & D<13>.PIN & D<12>.PIN & D<11>.PIN & D<10>.PIN & D<15>.PIN & !CFIN & !A<20>.PIN & !A<19>.PIN & !A<18>.PIN & !A<17>.PIN & !A<16>.PIN & !A<23>.PIN & !A<22>.PIN & !A<21>.PIN & CFOUT; AUTOCONFIG_ACCESS.CLK = !FCS; AUTOCONFIG_ACCESS.AR = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 0 | 10 | LAN_RST_SM_FSM_FFd2 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 5 | 0 | 0 | 0 | 10 | 0 | 8 | 11 | 13 | 0 | 2 INPUTS | 4 | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd3 | LAN_RST_SM_FSM_FFd2 | RESET INPUTMC | 3 | 0 | 0 | 0 | 8 | 0 | 10 INPUTP | 1 | 263 EQ | 4 | LAN_RST_SM_FSM_FFd2.D = !LAN_RST_SM_FSM_FFd1 & LAN_RST_SM_FSM_FFd3 # LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3; LAN_RST_SM_FSM_FFd2.CLK = CLK_EXT; // GCK LAN_RST_SM_FSM_FFd2.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 8 | LAN_RST_SM_FSM_FFd3 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 4 | 0 | 0 | 0 | 10 | 11 | 13 | 0 | 2 INPUTS | 3 | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd2 | RESET INPUTMC | 2 | 0 | 0 | 0 | 10 INPUTP | 1 | 263 EQ | 4 | !LAN_RST_SM_FSM_FFd3.D = LAN_RST_SM_FSM_FFd1 $ LAN_RST_SM_FSM_FFd2; LAN_RST_SM_FSM_FFd3.CLK = CLK_EXT; // GCK LAN_RST_SM_FSM_FFd3.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 15 | Z3_ADR<3> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 47 | 4 | 0 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 10 | 6 | 8 | 1 | 8 | 9 | 17 | 6 | 17 | 6 | 15 | 9 | 15 | 3 | 17 | 3 | 16 | 6 | 0 | 9 | 14 | 1 | 1 | 1 | 2 | 1 | 7 | 1 | 14 | 1 | 16 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 10 | 3 | 11 | 3 | 13 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 5 | 4 | 8 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 13 | 6 | 14 INPUTS | 3 | A<5> | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 1 | 11 | 12 INPUTP | 2 | 91 | 147 EQ | 3 | Z3_ADR<3>.D = A<5>; Z3_ADR<3>.CLK = !FCS; Z3_ADR<3>.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 5 | 14 | Z3_ADR<4> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 47 | 4 | 0 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 10 | 6 | 8 | 1 | 8 | 9 | 17 | 6 | 17 | 6 | 15 | 9 | 15 | 3 | 11 | 3 | 16 | 6 | 0 | 9 | 14 | 3 | 13 | 1 | 1 | 1 | 2 | 1 | 7 | 1 | 14 | 1 | 16 | 3 | 0 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 10 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 5 | 4 | 8 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 13 | 6 | 14 INPUTS | 3 | A<6> | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 1 | 11 | 12 INPUTP | 2 | 98 | 147 EQ | 3 | Z3_ADR<4>.D = A<6>; Z3_ADR<4>.CLK = !FCS; Z3_ADR<4>.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 5 | 12 | Z3_ADR<5> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 47 | 4 | 0 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 10 | 6 | 8 | 1 | 8 | 9 | 17 | 6 | 17 | 6 | 15 | 9 | 15 | 3 | 13 | 3 | 16 | 4 | 8 | 9 | 14 | 1 | 4 | 1 | 1 | 1 | 2 | 1 | 7 | 1 | 14 | 1 | 16 | 3 | 0 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 10 | 3 | 11 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 5 | 6 | 6 | 6 | 7 | 6 | 9 | 6 | 13 | 6 | 14 INPUTS | 3 | A<7> | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 1 | 11 | 12 INPUTP | 2 | 100 | 147 EQ | 3 | Z3_ADR<5>.D = A<7>; Z3_ADR<5>.CLK = !FCS; Z3_ADR<5>.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 7 | 3 | Z3_ADR<13> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 3 | 9 | 8 | 3 | 2 | 9 | 12 INPUTS | 3 | A<15>.PIN | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 1 | 11 | 12 INPUTP | 2 | 139 | 147 EQ | 3 | Z3_ADR<13>.D = A<15>.PIN; Z3_ADR<13>.CLK = !FCS; Z3_ADR<13>.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 11 | 15 | LAN_D_INIT<1> ATTRIBUTES | 8553232 | 0 OUTPUTMC | 3 | 9 | 1 | 9 | 9 | 11 | 11 INPUTS | 2 | LAN_RST_SM_FSM_FFd1 | RESET INPUTMC | 1 | 0 | 0 INPUTP | 1 | 263 EQ | 3 | LAN_D_INIT<1>.D = LAN_RST_SM_FSM_FFd1; LAN_D_INIT<1>.CLK = CLK_EXT; // GCK LAN_D_INIT<1>.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 14 | LAN_D_INIT<8> ATTRIBUTES | 8553232 | 0 OUTPUTMC | 3 | 9 | 16 | 11 | 9 | 9 | 13 INPUTS | 2 | LAN_RST_SM_FSM_FFd1 | RESET INPUTMC | 1 | 0 | 0 INPUTP | 1 | 263 EQ | 3 | LAN_D_INIT<8>.D = !LAN_RST_SM_FSM_FFd1; LAN_D_INIT<8>.CLK = CLK_EXT; // GCK LAN_D_INIT<8>.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 15 | DQ_DATA<0> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 9 | 2 | 15 | 15 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<0> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | Z3_DATA<16>.EXP | EXP70_.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 15 | 15 | 8 | 7 | 14 | 1 | 15 | 14 | 15 | 16 | 9 | 12 IMPORTS | 2 | 15 | 14 | 15 | 16 EQ | 25 | DQ_DATA<0>.D = LAN_SM_FSM_FFd3 & DQ_DATA<0> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<0> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<0> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<0> ;Imported pterms FB16_15 # A<16>.PIN & LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<8>.PIN ;Imported pterms FB16_17 # D<8>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<8>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<0>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<0>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<16>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB16_18 # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<8>.PIN; DQ_DATA<0>.CLK = CLK_EXT; // GCK DQ_DATA<0>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 0 | DQ_DATA<10> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 9 | 16 | 10 | 0 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<10> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | EXP56_.EXP | EXP58_.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 10 | 0 | 8 | 7 | 14 | 1 | 10 | 1 | 10 | 17 | 9 | 12 IMPORTS | 2 | 10 | 1 | 10 | 17 EQ | 24 | DQ_DATA<10>.D = LAN_SM_FSM_FFd3 & DQ_DATA<10> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<10> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<10> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<10> ;Imported pterms FB11_2 # !LDS & D<2>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<18>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<10>.PIN ;Imported pterms FB11_18 # A<18>.PIN & LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<10>.PIN # D<10>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<10>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<2>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3; DQ_DATA<10>.CLK = CLK_EXT; // GCK DQ_DATA<10>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 15 | DQ_DATA<11> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 11 | 9 | 10 | 15 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<11> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | EXP57_.EXP | ROM_B_0_OBUF$BUF9.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 10 | 15 | 8 | 7 | 14 | 1 | 10 | 14 | 10 | 16 | 9 | 12 IMPORTS | 2 | 10 | 14 | 10 | 16 EQ | 24 | DQ_DATA<11>.D = LAN_SM_FSM_FFd3 & DQ_DATA<11> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<11> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<11> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<11> ;Imported pterms FB11_15 # A<19>.PIN & LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<11>.PIN # D<11>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<11>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB11_17 # !UDS & D<3>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<3>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<19>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<11>.PIN; DQ_DATA<11>.CLK = CLK_EXT; // GCK DQ_DATA<11>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 0 | DQ_DATA<12> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 7 | 1 | 14 | 0 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<12> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd3.EXP | EXP69_.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 14 | 0 | 8 | 7 | 14 | 1 | 14 | 1 | 14 | 17 | 9 | 12 IMPORTS | 2 | 14 | 1 | 14 | 17 EQ | 24 | DQ_DATA<12>.D = LAN_SM_FSM_FFd3 & DQ_DATA<12> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<12> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<12> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<12> ;Imported pterms FB15_2 # !LDS & D<4>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<20>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<12>.PIN ;Imported pterms FB15_18 # A<20>.PIN & LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<12>.PIN # D<12>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<12>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<4>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3; DQ_DATA<12>.CLK = CLK_EXT; // GCK DQ_DATA<12>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 10 | DQ_DATA<13> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 11 | 7 | 14 | 10 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<13> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | EXP68_.EXP | N0$BUF7.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 14 | 10 | 8 | 7 | 14 | 1 | 14 | 9 | 14 | 11 | 9 | 12 IMPORTS | 2 | 14 | 9 | 14 | 11 EQ | 24 | DQ_DATA<13>.D = LAN_SM_FSM_FFd3 & DQ_DATA<13> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<13> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<13> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<13> ;Imported pterms FB15_10 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<13>.PIN # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<21>.PIN # D<13>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<13>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB15_12 # !UDS & D<5>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<5>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<13>.PIN # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<21>.PIN; DQ_DATA<13>.CLK = CLK_EXT; // GCK DQ_DATA<13>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 17 | DQ_DATA<14> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 4 | 7 | 2 | 8 | 17 | 8 | 0 | 8 | 16 INPUTS | 9 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<14> | LAN_SM_FSM_FFd4 | DQ_SWAP | DQ<10>.PIN | DQ<2>.PIN | EXP48_.EXP | LAN_SM_RST INPUTMC | 7 | 8 | 5 | 0 | 15 | 8 | 17 | 8 | 7 | 7 | 17 | 8 | 0 | 9 | 12 INPUTP | 2 | 234 | 220 EXPORTS | 1 | 8 | 16 IMPORTS | 1 | 8 | 0 EQ | 26 | DQ_DATA<14>.D = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<14> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<14> ;Imported pterms FB9_1 # LAN_SM_FSM_FFd3 & DQ_DATA<14> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<14> # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<14>.PIN # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<22>.PIN # D<14>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB9_2 # D<14>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<6>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<6>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<14>.PIN # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<22>.PIN; DQ_DATA<14>.CLK = CLK_EXT; // GCK DQ_DATA<14>.AP = LAN_SM_RST; DQ_DATA<14>.EXP = DQ_SWAP & DQ<10>.PIN # !DQ_SWAP & DQ<2>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 15 | DQ_DATA<15> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 11 | 4 | 8 | 15 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<15> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | EXP55_.EXP | Z3_DATA<2>.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 8 | 15 | 8 | 7 | 14 | 1 | 8 | 14 | 8 | 16 | 9 | 12 IMPORTS | 2 | 8 | 14 | 8 | 16 EQ | 25 | DQ_DATA<15>.D = LAN_SM_FSM_FFd3 & DQ_DATA<15> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<15> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<15> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<15> ;Imported pterms FB9_15 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<15>.PIN # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<23>.PIN # D<15>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<15>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<7>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB9_14 # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<23>.PIN ;Imported pterms FB9_17 # !LDS & D<7>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<15>.PIN; DQ_DATA<15>.CLK = CLK_EXT; // GCK DQ_DATA<15>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 0 | DQ_DATA<1> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 9 | 1 | 12 | 0 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<1> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | ROM_B_0_OBUF$BUF10.EXP | LAN_A_INIT<3>.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 12 | 0 | 8 | 7 | 14 | 1 | 12 | 1 | 12 | 17 | 9 | 12 IMPORTS | 2 | 12 | 1 | 12 | 17 EQ | 24 | DQ_DATA<1>.D = LAN_SM_FSM_FFd3 & DQ_DATA<1> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<1> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<1> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<1> ;Imported pterms FB13_2 # D<9>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<9>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<17>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<9>.PIN ;Imported pterms FB13_18 # A<17>.PIN & LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<9>.PIN # !UDS & D<1>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<1>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3; DQ_DATA<1>.CLK = CLK_EXT; // GCK DQ_DATA<1>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 12 | DQ_DATA<2> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 9 | 5 | 10 | 12 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<2> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | ROM_B_0_OBUF$BUF1.EXP | ROM_B_0_OBUF$BUF0.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 10 | 12 | 8 | 7 | 14 | 1 | 10 | 11 | 10 | 13 | 9 | 12 IMPORTS | 2 | 10 | 11 | 10 | 13 EQ | 24 | DQ_DATA<2>.D = LAN_SM_FSM_FFd3 & DQ_DATA<2> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<2> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<2> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<2> ;Imported pterms FB11_12 # A<18>.PIN & LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<10>.PIN # D<10>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<10>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB11_14 # !UDS & D<2>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<2>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<18>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<10>.PIN; DQ_DATA<2>.CLK = CLK_EXT; // GCK DQ_DATA<2>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 5 | DQ_DATA<3> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 9 | 4 | 12 | 5 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<3> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | EXP59_.EXP | EXP60_.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 12 | 5 | 8 | 7 | 14 | 1 | 12 | 4 | 12 | 6 | 9 | 12 IMPORTS | 2 | 12 | 4 | 12 | 6 EQ | 24 | DQ_DATA<3>.D = LAN_SM_FSM_FFd3 & DQ_DATA<3> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<3> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<3> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<3> ;Imported pterms FB13_5 # A<19>.PIN & LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<11>.PIN # D<11>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB13_7 # D<11>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<3>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<3>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<19>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<11>.PIN; DQ_DATA<3>.CLK = CLK_EXT; // GCK DQ_DATA<3>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 5 | DQ_DATA<4> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 9 | 9 | 14 | 5 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<4> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | EXP65_.EXP | DQ_DATA<5>.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 14 | 5 | 8 | 7 | 14 | 1 | 14 | 4 | 14 | 6 | 9 | 12 IMPORTS | 2 | 14 | 4 | 14 | 6 EQ | 25 | DQ_DATA<4>.D = LAN_SM_FSM_FFd3 & DQ_DATA<4> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<4> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<4> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<4> ;Imported pterms FB15_5 # A<20>.PIN & LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<12>.PIN # D<12>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<12>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<4>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB15_4 # A<20>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB15_7 # !LDS & D<4>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<12>.PIN; DQ_DATA<4>.CLK = CLK_EXT; // GCK DQ_DATA<4>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 6 | DQ_DATA<5> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 4 | 9 | 7 | 14 | 6 | 14 | 7 | 14 | 5 INPUTS | 12 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<5> | LAN_SM_FSM_FFd4 | LDS | D<4>.PIN | DQ_SWAP | LAN_SM_FSM_FFd3 | UDS | A<12>.PIN | EXP66_.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 14 | 6 | 8 | 7 | 7 | 17 | 14 | 1 | 14 | 7 | 9 | 12 INPUTP | 4 | 157 | 38 | 155 | 115 EXPORTS | 1 | 14 | 5 IMPORTS | 1 | 14 | 7 EQ | 28 | DQ_DATA<5>.D = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<5> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<5> ;Imported pterms FB15_8 # LAN_SM_FSM_FFd3 & DQ_DATA<5> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<5> # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<21>.PIN # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<13>.PIN # D<13>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB15_9 # D<13>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<5>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<5>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<21>.PIN # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<13>.PIN; DQ_DATA<5>.CLK = CLK_EXT; // GCK DQ_DATA<5>.AP = LAN_SM_RST; DQ_DATA<5>.EXP = !LDS & D<4>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<12>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 8 | DQ_DATA<6> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 9 | 11 | 8 | 8 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<6> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4.EXP | EXP53_.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 8 | 8 | 8 | 7 | 14 | 1 | 8 | 7 | 8 | 9 | 9 | 12 IMPORTS | 2 | 8 | 7 | 8 | 9 EQ | 24 | DQ_DATA<6>.D = LAN_SM_FSM_FFd3 & DQ_DATA<6> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<6> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<6> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<6> ;Imported pterms FB9_8 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<22>.PIN # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<14>.PIN # D<14>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB9_10 # D<14>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<6>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<6>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<22>.PIN # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<14>.PIN; DQ_DATA<6>.CLK = CLK_EXT; // GCK DQ_DATA<6>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 3 | DQ_DATA<7> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 9 | 10 | 8 | 3 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<7> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | EXP50_.EXP | EXP51_.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 8 | 3 | 8 | 7 | 14 | 1 | 8 | 2 | 8 | 4 | 9 | 12 IMPORTS | 2 | 8 | 2 | 8 | 4 EQ | 24 | DQ_DATA<7>.D = LAN_SM_FSM_FFd3 & DQ_DATA<7> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<7> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<7> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<7> ;Imported pterms FB9_3 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<23>.PIN # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<15>.PIN # D<15>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB9_5 # D<15>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<7>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<7>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<23>.PIN # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<15>.PIN; DQ_DATA<7>.CLK = CLK_EXT; // GCK DQ_DATA<7>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 11 | DQ_DATA<8> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 9 | 13 | 12 | 11 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<8> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | EXP61_.EXP | EXP62_.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 12 | 11 | 8 | 7 | 14 | 1 | 12 | 10 | 12 | 12 | 9 | 12 IMPORTS | 2 | 12 | 10 | 12 | 12 EQ | 24 | DQ_DATA<8>.D = LAN_SM_FSM_FFd3 & DQ_DATA<8> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<8> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<8> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<8> ;Imported pterms FB13_11 # A<16>.PIN & LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<8>.PIN # !UDS & D<0>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB13_13 # D<8>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<8>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<0>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<16>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<8>.PIN; DQ_DATA<8>.CLK = CLK_EXT; // GCK DQ_DATA<8>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 15 | DQ_DATA<9> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 11 | 11 | 12 | 15 INPUTS | 8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DQ_DATA<9> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd3 | LAN_RD_S.EXP | EXP63_.EXP | LAN_SM_RST INPUTMC | 8 | 8 | 5 | 0 | 15 | 12 | 15 | 8 | 7 | 14 | 1 | 12 | 14 | 12 | 16 | 9 | 12 IMPORTS | 2 | 12 | 14 | 12 | 16 EQ | 24 | DQ_DATA<9>.D = LAN_SM_FSM_FFd3 & DQ_DATA<9> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<9> # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<9> # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<9> ;Imported pterms FB13_15 # A<17>.PIN & LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<9>.PIN # !UDS & D<1>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB13_17 # D<9>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<9>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<1>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<17>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<9>.PIN; DQ_DATA<9>.CLK = CLK_EXT; // GCK DQ_DATA<9>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 13 | LAN_WR_RST ATTRIBUTES | 8553232 | 0 OUTPUTMC | 2 | 7 | 4 | 12 | 13 INPUTS | 3 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | RESET INPUTMC | 2 | 0 | 10 | 0 | 8 INPUTP | 1 | 263 EQ | 3 | LAN_WR_RST.D = LAN_RST_SM_FSM_FFd2 & LAN_RST_SM_FSM_FFd3; LAN_WR_RST.CLK = CLK_EXT; // GCK LAN_WR_RST.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 2 | CONFIG_READY ATTRIBUTES | 8553296 | 0 OUTPUTMC | 2 | 9 | 3 | 3 | 1 INPUTS | 9 | RESET | RW | FCS | LAN_ACCESS | Z3_ADR<13> | UDS | Z3_DATA<16> | LDS | DS1 INPUTMC | 3 | 7 | 12 | 7 | 3 | 15 | 14 INPUTP | 6 | 263 | 158 | 147 | 155 | 157 | 148 EXPORTS | 1 | 3 | 1 EQ | 7 | CONFIG_READY.D = Vcc; CONFIG_READY.CLK = CLK_EXT; // GCK CONFIG_READY.AR = !RESET; CONFIG_READY.CE = !RW & !FCS & LAN_ACCESS & Z3_ADR<13>; CONFIG_READY.EXP = RW & !FCS & !UDS & !Z3_DATA<16> & LAN_ACCESS # RW & !FCS & !LDS & !Z3_DATA<16> & LAN_ACCESS # RW & !FCS & !DS1 & !Z3_DATA<16> & LAN_ACCESS GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 1 | 8 | SHUT_UP ATTRIBUTES | 4359040 | 0 OUTPUTMC | 3 | 7 | 17 | 7 | 12 | 1 | 8 INPUTS | 16 | RW | FCS | DS0 | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | SHUT_UP | DS1 | UDS | LDS | RESET INPUTMC | 9 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 1 | 8 INPUTP | 7 | 158 | 147 | 170 | 148 | 155 | 157 | 263 EQ | 14 | SHUT_UP.T = !RW & !FCS & !UDS & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> & SHUT_UP # !RW & !FCS & !LDS & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> & SHUT_UP # !RW & !FCS & !DS1 & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> & SHUT_UP # !RW & !FCS & !DS0 & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> & SHUT_UP; SHUT_UP.CLK = CLK_EXT; // GCK SHUT_UP.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 7 | 10 | Z3_ADR<10> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 2 | 5 | 7 | 7 | 11 INPUTS | 5 | A<12>.PIN | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT | D<8>.PIN | LAN_BASEADR<8> INPUTMC | 2 | 11 | 12 | 6 | 10 INPUTP | 3 | 115 | 147 | 32 EXPORTS | 1 | 7 | 11 EQ | 4 | Z3_ADR<10>.D = A<12>.PIN; Z3_ADR<10>.CLK = !FCS; Z3_ADR<10>.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; Z3_ADR<10>.EXP = D<8>.PIN & !LAN_BASEADR<8> MACROCELL | 7 | 8 | Z3_ADR<11> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 5 | 2 INPUTS | 3 | A<13>.PIN | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 1 | 11 | 12 INPUTP | 2 | 123 | 147 EQ | 3 | Z3_ADR<11>.D = A<13>.PIN; Z3_ADR<11>.CLK = !FCS; Z3_ADR<11>.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 7 | 6 | Z3_ADR<12> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 5 | 4 INPUTS | 3 | A<14>.PIN | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 1 | 11 | 12 INPUTP | 2 | 125 | 147 EQ | 3 | Z3_ADR<12>.D = A<14>.PIN; Z3_ADR<12>.CLK = !FCS; Z3_ADR<12>.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 5 | 10 | Z3_ADR<7> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 5 | 9 INPUTS | 3 | A<9>.PIN | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 1 | 11 | 12 INPUTP | 2 | 108 | 147 EQ | 3 | Z3_ADR<7>.D = A<9>.PIN; Z3_ADR<7>.CLK = !FCS; Z3_ADR<7>.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 5 | 8 | Z3_ADR<8> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 5 | 13 INPUTS | 3 | A<10>.PIN | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 1 | 11 | 12 INPUTP | 2 | 112 | 147 EQ | 3 | Z3_ADR<8>.D = A<10>.PIN; Z3_ADR<8>.CLK = !FCS; Z3_ADR<8>.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 5 | 6 | Z3_ADR<9> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 5 | 5 INPUTS | 3 | A<11>.PIN | FCS | Z3_ADR_1/Z3_ADR_1_SETF__$INT INPUTMC | 1 | 11 | 12 INPUTP | 2 | 114 | 147 EQ | 3 | Z3_ADR<9>.D = A<11>.PIN; Z3_ADR<9>.CLK = !FCS; Z3_ADR<9>.AP = !Z3_ADR_1/Z3_ADR_1_SETF__$INT; MACROCELL | 9 | 17 | D_OUT<0> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 2 | 1 | 16 | 1 | 17 INPUTS | 13 | FCS | DS0 | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET INPUTMC | 7 | 5 | 16 | 13 | 17 | 5 | 3 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 6 | 147 | 170 | 148 | 155 | 157 | 263 EQ | 10 | !D_OUT<0>.D = !FCS & !UDS & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !LDS & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !DS1 & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !DS0 & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5>; D_OUT<0>.CLK = CLK_EXT; // GCK D_OUT<0>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 6 | 17 | D_OUT<1> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 3 | 4 | 11 | 4 | 10 | 6 | 0 INPUTS | 5 | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | EXP41_.EXP | RESET INPUTMC | 4 | 5 | 15 | 5 | 14 | 5 | 12 | 6 | 16 INPUTP | 1 | 263 EXPORTS | 1 | 6 | 0 IMPORTS | 1 | 6 | 16 EQ | 14 | D_OUT<1>.D = Z3_ADR<3> # Z3_ADR<4> # Z3_ADR<5> ;Imported pterms FB7_17 # FCS # !AUTOCONFIG_ACCESS # Z3_ADR<2> & Z3_ADR_1 # Z3_ADR<2> & Z3_ADR_0 # Z3_ADR_1 & Z3_ADR_0 ;Imported pterms FB7_16 # UDS & LDS & DS1 & DS0; D_OUT<1>.CLK = CLK_EXT; // GCK D_OUT<1>.AP = !RESET; D_OUT<1>.EXP = Z3_ADR<5> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 6 | 15 | D_OUT<2> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 3 | 4 | 13 | 4 | 12 | 6 | 16 INPUTS | 14 | FCS | DS0 | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET | EXP40_.EXP INPUTMC | 8 | 5 | 16 | 13 | 17 | 5 | 3 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 6 | 14 INPUTP | 6 | 147 | 170 | 148 | 155 | 157 | 263 EXPORTS | 1 | 6 | 16 IMPORTS | 1 | 6 | 14 EQ | 20 | !D_OUT<2>.D = !FCS & !DS1 & Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !DS0 & Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !DS0 & !Z3_ADR<2> & !Z3_ADR_1 & !Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB7_15 # !FCS & !UDS & Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !UDS & !Z3_ADR<2> & !Z3_ADR_1 & !Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !LDS & Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !LDS & !Z3_ADR<2> & !Z3_ADR_1 & !Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !DS1 & !Z3_ADR<2> & !Z3_ADR_1 & !Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5>; D_OUT<2>.CLK = CLK_EXT; // GCK D_OUT<2>.AP = !RESET; D_OUT<2>.EXP = UDS & LDS & DS1 & DS0 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 9 | 15 | D_OUT<3> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 2 | 4 | 14 | 4 | 15 INPUTS | 11 | FCS | DS0 | Z3_ADR_1 | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET INPUTMC | 5 | 13 | 17 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 6 | 147 | 170 | 148 | 155 | 157 | 263 EQ | 10 | !D_OUT<3>.D = !FCS & !UDS & !Z3_ADR_1 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !LDS & !Z3_ADR_1 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !DS1 & !Z3_ADR_1 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !DS0 & !Z3_ADR_1 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5>; D_OUT<3>.CLK = CLK_EXT; // GCK D_OUT<3>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 17 | D_OUT<4> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 3 | 4 | 16 | 4 | 17 | 3 | 16 INPUTS | 10 | FCS | Z3_ADR<3> | Z3_ADR_1 | Z3_ADR_0 | UDS | LDS | DS1 | DS0 | EXP24_.EXP | RESET INPUTMC | 4 | 5 | 15 | 13 | 17 | 5 | 3 | 3 | 0 INPUTP | 6 | 147 | 155 | 157 | 148 | 170 | 263 EXPORTS | 1 | 3 | 16 IMPORTS | 1 | 3 | 0 EQ | 16 | D_OUT<4>.D = FCS # Z3_ADR<3> ;Imported pterms FB4_1 # !AUTOCONFIG_ACCESS # Z3_ADR<4> # Z3_ADR<5> # Z3_ADR<2> & !Z3_ADR_0 # Z3_ADR<2> & Z3_ADR<6> ;Imported pterms FB4_2 # Z3_ADR_1 & Z3_ADR_0 # !Z3_ADR_0 & Z3_ADR<6> # UDS & LDS & DS1 & DS0; D_OUT<4>.CLK = CLK_EXT; // GCK D_OUT<4>.AP = !RESET; D_OUT<4>.EXP = Z3_ADR_1 & Z3_ADR_0 # UDS & LDS & DS1 & DS0 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 16 | D_OUT<5> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 2 | 6 | 2 | 6 | 3 INPUTS | 7 | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | FCS | EXP26_.EXP | D_OUT<4>.EXP | RESET INPUTMC | 5 | 5 | 15 | 5 | 14 | 5 | 12 | 3 | 15 | 3 | 17 INPUTP | 2 | 147 | 263 IMPORTS | 2 | 3 | 15 | 3 | 17 EQ | 15 | D_OUT<5>.D = FCS # Z3_ADR<3> # Z3_ADR<4> # Z3_ADR<5> ;Imported pterms FB4_16 # !AUTOCONFIG_ACCESS # Z3_ADR<2> & Z3_ADR_1 # Z3_ADR<2> & Z3_ADR_0 # Z3_ADR<2> & !Z3_ADR<6> # Z3_ADR_1 & !Z3_ADR<6> ;Imported pterms FB4_18 # Z3_ADR_1 & Z3_ADR_0 # UDS & LDS & DS1 & DS0; D_OUT<5>.CLK = CLK_EXT; // GCK D_OUT<5>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 6 | 0 | D_OUT<6> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 2 | 6 | 4 | 6 | 5 INPUTS | 7 | FCS | Z3_ADR_1 | Z3_ADR<3> | Z3_ADR<4> | EXP34_.EXP | D_OUT<1>.EXP | RESET INPUTMC | 5 | 13 | 17 | 5 | 15 | 5 | 14 | 6 | 1 | 6 | 17 INPUTP | 2 | 147 | 263 IMPORTS | 2 | 6 | 1 | 6 | 17 EQ | 14 | D_OUT<6>.D = FCS # Z3_ADR_1 # Z3_ADR<3> # Z3_ADR<4> ;Imported pterms FB7_2 # !AUTOCONFIG_ACCESS # Z3_ADR<2> & !Z3_ADR_0 # Z3_ADR<2> & !Z3_ADR<6> # !Z3_ADR<2> & Z3_ADR_0 & Z3_ADR<6> # UDS & LDS & DS1 & DS0 ;Imported pterms FB7_18 # Z3_ADR<5>; D_OUT<6>.CLK = CLK_EXT; // GCK D_OUT<6>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 9 | 14 | D_OUT<7> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 2 | 6 | 11 | 6 | 12 INPUTS | 12 | FCS | DS0 | Z3_ADR_1 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | UDS | LDS | RESET INPUTMC | 6 | 13 | 17 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 6 | 147 | 170 | 148 | 155 | 157 | 263 EQ | 10 | !D_OUT<7>.D = !FCS & !UDS & !Z3_ADR_1 & Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !LDS & !Z3_ADR_1 & Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !DS1 & !Z3_ADR_1 & Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !DS0 & !Z3_ADR_1 & Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5>; D_OUT<7>.CLK = CLK_EXT; // GCK D_OUT<7>.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 16 | LAN_A_INIT<6> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 1 | 1 | 4 INPUTS | 2 | LAN_RST_SM_FSM_FFd1 | RESET INPUTMC | 1 | 0 | 0 INPUTP | 1 | 263 EQ | 3 | LAN_A_INIT<6>.D = !LAN_RST_SM_FSM_FFd1; LAN_A_INIT<6>.CLK = CLK_EXT; // GCK LAN_A_INIT<6>.AP = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 2 | LAN_CS_RST ATTRIBUTES | 8553232 | 0 OUTPUTMC | 1 | 7 | 7 INPUTS | 3 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd3 | RESET INPUTMC | 2 | 0 | 10 | 0 | 8 INPUTP | 1 | 263 EQ | 3 | !LAN_CS_RST.D = !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3; LAN_CS_RST.CLK = CLK_EXT; // GCK LAN_CS_RST.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 1 | LAN_IRQ_D0 ATTRIBUTES | 8553344 | 0 OUTPUTMC | 1 | 0 | 12 INPUTS | 2 | LAN_INT | RESET INPUTP | 2 | 201 | 263 EQ | 3 | LAN_IRQ_D0.D = LAN_INT; LAN_IRQ_D0.CLK = CLK_EXT; // GCK LAN_IRQ_D0.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 14 | LAN_RD_S ATTRIBUTES | 8553232 | 0 OUTPUTMC | 2 | 7 | 9 | 12 | 15 INPUTS | 11 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | A<17>.PIN | DQ_SWAP | LAN_SM_FSM_FFd1 | LAN_SM_RST | LAN_SM_FSM_FFd3 | A<9>.PIN | UDS | D<1>.PIN | LAN_WRL_OBUF.EXP INPUTMC | 7 | 8 | 7 | 8 | 5 | 7 | 17 | 0 | 15 | 9 | 12 | 14 | 1 | 12 | 13 INPUTP | 4 | 172 | 108 | 155 | 30 EXPORTS | 1 | 12 | 15 IMPORTS | 1 | 12 | 13 EQ | 13 | LAN_RD_S.D = LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 ;Imported pterms FB13_14 # RW & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3; LAN_RD_S.CLK = CLK_EXT; // GCK LAN_RD_S.AR = LAN_SM_RST; LAN_RD_S.EXP = A<17>.PIN & LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<9>.PIN # !UDS & D<1>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 17 | LAN_READY ATTRIBUTES | 8553232 | 0 OUTPUTMC | 1 | 9 | 3 INPUTS | 7 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd2 | DS1 | DS0 | LAN_SM_RST INPUTMC | 5 | 8 | 7 | 0 | 15 | 14 | 1 | 8 | 5 | 9 | 12 INPUTP | 2 | 148 | 170 EQ | 10 | LAN_READY.D = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3 # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # DS1 & DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # DS1 & DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; LAN_READY.CLK = CLK_EXT; // GCK LAN_READY.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 6 | LAN_WRH_S ATTRIBUTES | 8553232 | 0 OUTPUTMC | 1 | 7 | 4 INPUTS | 7 | LDS | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | DS0 | LAN_SM_FSM_FFd1 | LAN_SM_RST INPUTMC | 5 | 8 | 7 | 8 | 5 | 14 | 1 | 0 | 15 | 9 | 12 INPUTP | 2 | 157 | 170 EQ | 6 | LAN_WRH_S.D = !LDS & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd3 # !DS0 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; LAN_WRH_S.CLK = CLK_EXT; // GCK LAN_WRH_S.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 0 | 3 | LAN_WRL_S ATTRIBUTES | 8553232 | 0 OUTPUTMC | 1 | 12 | 13 INPUTS | 7 | UDS | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | DS1 | LAN_SM_FSM_FFd1 | LAN_SM_RST INPUTMC | 5 | 8 | 7 | 8 | 5 | 14 | 1 | 0 | 15 | 9 | 12 INPUTP | 2 | 155 | 148 EQ | 6 | LAN_WRL_S.D = !UDS & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd3 # !DS1 & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; LAN_WRL_S.CLK = CLK_EXT; // GCK LAN_WRL_S.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 12 | Z3_A_LOW ATTRIBUTES | 8553232 | 0 OUTPUTMC | 2 | 3 | 5 | 8 | 13 INPUTS | 9 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | UDS | LDS | DQ_SWAP | DQ<9>.PIN | EXP54_.EXP | LAN_SM_RST INPUTMC | 6 | 8 | 7 | 0 | 15 | 14 | 1 | 7 | 17 | 8 | 11 | 9 | 12 INPUTP | 3 | 155 | 157 | 209 EXPORTS | 1 | 8 | 13 IMPORTS | 1 | 8 | 11 EQ | 18 | !Z3_A_LOW.D = !UDS & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 # !LDS & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3 ;Imported pterms FB9_12 # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # DS1 & DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # DS1 & DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3; Z3_A_LOW.CLK = CLK_EXT; // GCK Z3_A_LOW.AR = LAN_SM_RST; Z3_A_LOW.EXP = DQ_SWAP & DQ<9>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 9 | 12 | LAN_SM_RST ATTRIBUTES | 8553216 | 0 OUTPUTMC | 57 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 14 | 15 | 13 | 15 | 12 | 15 | 11 | 15 | 17 | 10 | 8 | 10 | 7 | 14 | 12 | 15 | 8 | 15 | 6 | 15 | 4 | 15 | 3 | 15 | 0 | 10 | 6 | 10 | 5 | 14 | 3 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 | 15 | 15 | 10 | 0 | 10 | 15 | 14 | 0 | 14 | 10 | 8 | 17 | 8 | 15 | 12 | 0 | 10 | 12 | 12 | 5 | 14 | 5 | 14 | 6 | 8 | 8 | 8 | 3 | 12 | 11 | 12 | 15 | 12 | 14 | 0 | 17 | 0 | 6 | 0 | 3 | 8 | 12 INPUTS | 8 | FCS | DS0 | RESET | LAN_ACCESS | Z3_ADR<13> | DS1 | UDS | LDS INPUTMC | 2 | 7 | 12 | 7 | 3 INPUTP | 6 | 147 | 170 | 263 | 148 | 155 | 157 EQ | 5 | !LAN_SM_RST.D = !FCS & !UDS & RESET & LAN_ACCESS & !Z3_ADR<13> # !FCS & !LDS & RESET & LAN_ACCESS & !Z3_ADR<13> # !FCS & !DS1 & RESET & LAN_ACCESS & !Z3_ADR<13> # !FCS & !DS0 & RESET & LAN_ACCESS & !Z3_ADR<13>; LAN_SM_RST.CLK = CLK_EXT; // GCK GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 17 | LAN_A_INIT<3> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 2 | 3 | 7 | 12 | 0 INPUTS | 11 | RESET | A<17>.PIN | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | A<9>.PIN | UDS | D<1>.PIN | LAN_SM_FSM_FFd2 | LDS INPUTMC | 5 | 8 | 7 | 7 | 17 | 0 | 15 | 14 | 1 | 8 | 5 INPUTP | 6 | 263 | 172 | 108 | 155 | 30 | 157 EXPORTS | 1 | 12 | 0 EQ | 11 | LAN_A_INIT<3>.D = Gnd; LAN_A_INIT<3>.CLK = CLK_EXT; // GCK LAN_A_INIT<3>.AP = RESET; LAN_A_INIT<3>.EXP = A<17>.PIN & LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<9>.PIN # !UDS & D<1>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<1>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 5 | A_LAN_0_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 3 | 6 INPUTS | 18 | RESET | Z3_A_LOW | RW | FCS | UDS | D<5>.PIN | LAN_BASEADR<5> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | LDS | DS1 | DS0 INPUTMC | 10 | 8 | 12 | 3 | 6 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 8 | 263 | 158 | 147 | 155 | 37 | 157 | 148 | 170 EXPORTS | 1 | 3 | 6 EQ | 13 | !A_LAN<0> = RESET & !Z3_A_LOW; A_LAN_0_OBUF.EXP = !RW & !FCS & !UDS & D<5>.PIN & !LAN_BASEADR<5> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<5>.PIN & !LAN_BASEADR<5> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<5>.PIN & !LAN_BASEADR<5> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<5>.PIN & !LAN_BASEADR<5> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 5 | 5 | A_LAN_10_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | RESET | Z3_ADR<9> INPUTMC | 1 | 5 | 6 INPUTP | 1 | 263 EQ | 1 | !A_LAN<10> = RESET & !Z3_ADR<9>; MACROCELL | 5 | 7 | A_LAN_11_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | RESET | Z3_ADR<10> INPUTMC | 1 | 7 | 10 INPUTP | 1 | 263 EQ | 1 | !A_LAN<11> = RESET & !Z3_ADR<10>; MACROCELL | 5 | 2 | A_LAN_12_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | RESET | Z3_ADR<11> INPUTMC | 1 | 7 | 8 INPUTP | 1 | 263 EQ | 1 | !A_LAN<12> = RESET & !Z3_ADR<11>; MACROCELL | 5 | 4 | A_LAN_13_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | RESET | Z3_ADR<12> INPUTMC | 1 | 7 | 6 INPUTP | 1 | 263 EQ | 1 | !A_LAN<13> = RESET & !Z3_ADR<12>; MACROCELL | 3 | 4 | A_LAN_1_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 3 | 3 INPUTS | 17 | RESET | Z3_ADR_0 | RW | FCS | UDS | D<6>.PIN | LAN_BASEADR<6> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | LDS | DS1 | DS0 INPUTMC | 9 | 5 | 3 | 3 | 3 | 5 | 16 | 13 | 17 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 8 | 263 | 158 | 147 | 155 | 26 | 157 | 148 | 170 EXPORTS | 1 | 3 | 3 EQ | 13 | !A_LAN<1> = RESET & !Z3_ADR_0; A_LAN_1_OBUF.EXP = !RW & !FCS & !UDS & D<6>.PIN & !LAN_BASEADR<6> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<6>.PIN & !LAN_BASEADR<6> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<6>.PIN & !LAN_BASEADR<6> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<6>.PIN & !LAN_BASEADR<6> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 3 | 11 | A_LAN_2_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 3 | 12 INPUTS | 17 | RESET | Z3_ADR_1 | RW | FCS | UDS | D<2>.PIN | LAN_BASEADR<2> | Z3_ADR<2> | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | LDS | DS1 | DS0 INPUTMC | 9 | 13 | 17 | 3 | 12 | 5 | 16 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 8 | 263 | 158 | 147 | 155 | 71 | 157 | 148 | 170 EXPORTS | 1 | 3 | 12 EQ | 13 | !A_LAN<2> = RESET & !Z3_ADR_1; A_LAN_2_OBUF.EXP = !RW & !FCS & !UDS & D<2>.PIN & !LAN_BASEADR<2> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<2>.PIN & !LAN_BASEADR<2> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<2>.PIN & !LAN_BASEADR<2> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<2>.PIN & !LAN_BASEADR<2> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 3 | 7 | A_LAN_3_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 3 | 8 INPUTS | 17 | RESET | LAN_A_INIT<3> | Z3_ADR<2> | RW | FCS | UDS | D<3>.PIN | LAN_BASEADR<3> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | DS0 INPUTMC | 10 | 12 | 17 | 5 | 16 | 3 | 8 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 7 | 263 | 158 | 147 | 155 | 28 | 148 | 170 EXPORTS | 1 | 3 | 8 EQ | 11 | A_LAN<3> = RESET & Z3_ADR<2> # !RESET & LAN_A_INIT<3>; A_LAN_3_OBUF.EXP = !RW & !FCS & !UDS & D<3>.PIN & !LAN_BASEADR<3> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<3>.PIN & !LAN_BASEADR<3> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<3>.PIN & !LAN_BASEADR<3> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 1 | 1 | A_LAN_4_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 1 | 0 INPUTS | 17 | RESET | Z3_ADR<3> | RW | FCS | UDS | D<0>.PIN | LAN_BASEADR<0> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<4> | Z3_ADR<5> | LDS | DS1 | DS0 INPUTMC | 9 | 5 | 15 | 1 | 0 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 14 | 5 | 12 INPUTP | 8 | 263 | 158 | 147 | 155 | 4 | 157 | 148 | 170 EXPORTS | 1 | 1 | 0 EQ | 13 | !A_LAN<4> = RESET & !Z3_ADR<3>; A_LAN_4_OBUF.EXP = !RW & !FCS & !UDS & D<0>.PIN & !LAN_BASEADR<0> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<0>.PIN & !LAN_BASEADR<0> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<0>.PIN & !LAN_BASEADR<0> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<0>.PIN & !LAN_BASEADR<0> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 3 | 13 | A_LAN_5_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 3 | 14 INPUTS | 17 | RESET | Z3_ADR<4> | RW | FCS | UDS | D<1>.PIN | LAN_BASEADR<1> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<5> | LDS | DS1 | DS0 INPUTMC | 9 | 5 | 14 | 3 | 14 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 12 INPUTP | 8 | 263 | 158 | 147 | 155 | 30 | 157 | 148 | 170 EXPORTS | 1 | 3 | 14 EQ | 13 | !A_LAN<5> = RESET & !Z3_ADR<4>; A_LAN_5_OBUF.EXP = !RW & !FCS & !UDS & D<1>.PIN & !LAN_BASEADR<1> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<1>.PIN & !LAN_BASEADR<1> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<1>.PIN & !LAN_BASEADR<1> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<1>.PIN & !LAN_BASEADR<1> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 1 | 4 | A_LAN_6_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 3 | RESET | LAN_A_INIT<6> | Z3_ADR<5> INPUTMC | 2 | 11 | 16 | 5 | 12 INPUTP | 1 | 263 EQ | 2 | A_LAN<6> = RESET & Z3_ADR<5> # !RESET & LAN_A_INIT<6>; MACROCELL | 1 | 2 | A_LAN_7_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 1 | 3 INPUTS | 17 | RESET | Z3_ADR<6> | D<11>.PIN | RW | FCS | UDS | LAN_BASEADR<11> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | LDS | DS1 | DS0 INPUTMC | 9 | 5 | 11 | 1 | 3 | 5 | 16 | 13 | 17 | 5 | 3 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 8 | 263 | 77 | 158 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 1 | 3 EQ | 13 | !A_LAN<7> = RESET & !Z3_ADR<6>; A_LAN_7_OBUF.EXP = D<11>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<11> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<11>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<11> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<11>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<11> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<11>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<11> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 5 | 9 | A_LAN_8_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | RESET | Z3_ADR<7> INPUTMC | 1 | 5 | 10 INPUTP | 1 | 263 EQ | 1 | !A_LAN<8> = RESET & !Z3_ADR<7>; MACROCELL | 5 | 13 | A_LAN_9_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | RESET | Z3_ADR<8> INPUTMC | 1 | 5 | 8 INPUTP | 1 | 263 EQ | 1 | !A_LAN<9> = RESET & !Z3_ADR<8>; MACROCELL | 7 | 7 | LAN_CS_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 3 | RESET | LAN_CS_RST | LAN_ACCESS INPUTMC | 2 | 0 | 2 | 7 | 12 INPUTP | 1 | 263 EQ | 2 | LAN_CS = RESET & LAN_ACCESS # !RESET & LAN_CS_RST; MACROCELL | 7 | 4 | LAN_WRH_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 4 | RESET | LAN_WR_RST | FCS | LAN_WRH_S INPUTMC | 2 | 11 | 13 | 0 | 6 INPUTP | 2 | 263 | 147 EQ | 3 | LAN_WRH = FCS & LAN_WR_RST # !RESET & LAN_WR_RST # !FCS & RESET & LAN_WRH_S; MACROCELL | 12 | 13 | LAN_WRL_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 12 | 14 INPUTS | 9 | RESET | LAN_WR_RST | FCS | LAN_WRL_S | RW | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 INPUTMC | 6 | 11 | 13 | 0 | 3 | 8 | 5 | 14 | 1 | 8 | 7 | 0 | 15 INPUTP | 3 | 263 | 147 | 158 EXPORTS | 1 | 12 | 14 EQ | 6 | LAN_WRL = FCS & LAN_WR_RST # !RESET & LAN_WR_RST # !FCS & RESET & LAN_WRL_S; LAN_WRL_OBUF.EXP = RW & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 MACROCELL | 13 | 13 | SLAVE_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 3 | FCS | LAN_ACCESS | AUTOCONFIG_ACCESS INPUTMC | 2 | 7 | 12 | 11 | 17 INPUTP | 1 | 147 EQ | 2 | SLAVE = FCS # !LAN_ACCESS & !AUTOCONFIG_ACCESS; MACROCELL | 7 | 9 | LAN_RD_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 3 | FCS | RESET | LAN_RD_S INPUTMC | 1 | 12 | 14 INPUTP | 2 | 147 | 263 EQ | 1 | LAN_RD = !FCS & RESET & LAN_RD_S; MACROCELL | 2 | 13 | N0$BUF6 ATTRIBUTES | 265986 | 0 INPUTS | 2 | LAN_INT_ENABLE | LAN_IRQ_OUT INPUTMC | 2 | 9 | 8 | 0 | 12 EQ | 2 | INT_OUT = Gnd; INT_OUT.OE = LAN_INT_ENABLE & !LAN_IRQ_OUT; MACROCELL | 14 | 11 | N0$BUF7 ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 14 | 10 INPUTS | 10 | N0$BUF7/N0$BUF7_TRST__$INT | UDS | D<5>.PIN | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | LDS | A<13>.PIN | A<21>.PIN INPUTMC | 5 | 9 | 3 | 8 | 7 | 7 | 17 | 8 | 5 | 14 | 1 INPUTP | 5 | 155 | 37 | 157 | 123 | 163 EXPORTS | 1 | 14 | 10 EQ | 10 | DTACK = Gnd; DTACK.OE = !N0$BUF7/N0$BUF7_TRST__$INT; N0$BUF7.EXP = !UDS & D<5>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<5>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<13>.PIN # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<21>.PIN MACROCELL | 13 | 10 | CFOUT_OBUF ATTRIBUTES | 8815558 | 0 OUTPUTMC | 1 | 11 | 17 INPUTS | 4 | AUTO_CONFIG_DONE_CYCLE | AUTOBOOT_OFF | RESET | FCS INPUTMC | 1 | 4 | 0 INPUTP | 3 | 142 | 263 | 147 EQ | 4 | CFOUT.D = !AUTO_CONFIG_DONE_CYCLE & AUTOBOOT_OFF; CFOUT.CLK = CLK_EXT; // GCK CFOUT.AP = !RESET; CFOUT.CE = FCS; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 14 | N0 ATTRIBUTES | 265986 | 0 INPUTS | 0 EQ | 2 | OWN = Gnd; OWN.OE = Gnd; MACROCELL | 13 | 2 | N0$BUF0 ATTRIBUTES | 265986 | 0 INPUTS | 0 EQ | 2 | OVR = Gnd; OVR.OE = Gnd; MACROCELL | 15 | 9 | N0$BUF1 ATTRIBUTES | 265986 | 0 INPUTS | 0 EQ | 2 | MTACK = Gnd; MTACK.OE = Gnd; MACROCELL | 11 | 1 | N0$BUF2 ATTRIBUTES | 265986 | 0 INPUTS | 0 EQ | 2 | LAN_CFG<4> = Gnd; LAN_CFG<4>.OE = Gnd; MACROCELL | 1 | 7 | N0$BUF3 ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 1 | 6 INPUTS | 16 | D<12>.PIN | RW | FCS | UDS | LAN_BASEADR<12> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | LDS | DS1 | DS0 INPUTMC | 9 | 1 | 6 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 7 | 78 | 158 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 1 | 6 EQ | 14 | LAN_CFG<3> = Gnd; LAN_CFG<3>.OE = Gnd; N0$BUF3.EXP = D<12>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<12> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<12>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<12> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<12>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<12> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<12>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<12> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 5 | 1 | N0$BUF4 ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 5 | 0 INPUTS | 4 | A<20>.PIN | LAN_BASEADR<4> | A<16>.PIN | LAN_BASEADR<0> INPUTMC | 2 | 3 | 9 | 1 | 0 INPUTP | 2 | 167 | 175 EXPORTS | 1 | 5 | 0 EQ | 6 | LAN_CFG<2> = Gnd; LAN_CFG<2>.OE = Gnd; N0$BUF4.EXP = A<20>.PIN & !LAN_BASEADR<4> # !A<20>.PIN & LAN_BASEADR<4> # A<16>.PIN & !LAN_BASEADR<0> # !A<16>.PIN & LAN_BASEADR<0> MACROCELL | 1 | 5 | N0$BUF5 ATTRIBUTES | 265986 | 0 INPUTS | 0 EQ | 2 | LAN_CFG<1> = Gnd; LAN_CFG<1>.OE = Gnd; MACROCELL | 4 | 4 | ROM_B_0_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 4 | 3 INPUTS | 14 | D<13>.PIN | RW | FCS | UDS | LAN_BASEADR<13> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | LDS INPUTMC | 9 | 4 | 3 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 5 | 80 | 158 | 147 | 155 | 157 EXPORTS | 1 | 4 | 3 EQ | 7 | ROM_OE = Vcc; ROM_B_0_OBUF.EXP = D<13>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<13> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<13>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<13> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 10 | 13 | ROM_B_0_OBUF$BUF0 ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 10 | 12 INPUTS | 9 | UDS | D<2>.PIN | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | LDS | A<18>.PIN | A<10>.PIN INPUTMC | 4 | 8 | 7 | 7 | 17 | 8 | 5 | 14 | 1 INPUTP | 5 | 155 | 71 | 157 | 171 | 112 EXPORTS | 1 | 10 | 12 EQ | 9 | ROM_B<1> = Vcc; ROM_B_0_OBUF$BUF0.EXP = !UDS & D<2>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<2>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<18>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<10>.PIN MACROCELL | 10 | 11 | ROM_B_0_OBUF$BUF1 ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 10 | 12 INPUTS | 10 | A<18>.PIN | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | A<10>.PIN | D<10>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS INPUTMC | 5 | 8 | 7 | 7 | 17 | 0 | 15 | 14 | 1 | 8 | 5 INPUTP | 5 | 171 | 112 | 74 | 155 | 157 EXPORTS | 1 | 10 | 12 EQ | 9 | ROM_B<0> = Vcc; ROM_B_0_OBUF$BUF1.EXP = A<18>.PIN & LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<10>.PIN # D<10>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<10>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 MACROCELL | 12 | 1 | ROM_B_0_OBUF$BUF10 ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 12 | 0 INPUTS | 9 | D<9>.PIN | UDS | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | LDS | A<17>.PIN | A<9>.PIN INPUTMC | 4 | 8 | 7 | 7 | 17 | 8 | 5 | 14 | 1 INPUTP | 5 | 73 | 155 | 157 | 172 | 108 EXPORTS | 1 | 12 | 0 EQ | 9 | CP_RD = Vcc; ROM_B_0_OBUF$BUF10.EXP = D<9>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<9>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<17>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<9>.PIN MACROCELL | 4 | 1 | ROM_B_0_OBUF$BUF11 ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 4 | 0 INPUTS | 13 | RW | FCS | UDS | AUTO_CONFIG_DONE_CYCLE | Z3_ADR<2> | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | LDS | DS1 INPUTMC | 8 | 4 | 0 | 5 | 16 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 5 | 158 | 147 | 155 | 157 | 148 EXPORTS | 1 | 4 | 0 EQ | 10 | CP_CS = Vcc; ROM_B_0_OBUF$BUF11.EXP = !RW & !FCS & !UDS & !AUTO_CONFIG_DONE_CYCLE & !Z3_ADR<2> & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & !AUTO_CONFIG_DONE_CYCLE & !Z3_ADR<2> & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & !AUTO_CONFIG_DONE_CYCLE & !Z3_ADR<2> & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 2 | 1 | ROM_B_0_OBUF$BUF2 ATTRIBUTES | 264962 | 0 INPUTS | 0 EQ | 1 | IDE_W = Vcc; MACROCELL | 0 | 16 | ROM_B_0_OBUF$BUF3 ATTRIBUTES | 264962 | 0 INPUTS | 0 EQ | 1 | IDE_R = Vcc; MACROCELL | 0 | 9 | ROM_B_0_OBUF$BUF4 ATTRIBUTES | 264962 | 0 INPUTS | 0 EQ | 1 | IDE_CS<1> = Vcc; MACROCELL | 0 | 7 | ROM_B_0_OBUF$BUF5 ATTRIBUTES | 264962 | 0 INPUTS | 0 EQ | 1 | IDE_CS<0> = Vcc; MACROCELL | 0 | 13 | ROM_B_0_OBUF$BUF6 ATTRIBUTES | 264962 | 0 INPUTS | 0 EQ | 1 | IDE_A<2> = Vcc; MACROCELL | 0 | 14 | ROM_B_0_OBUF$BUF7 ATTRIBUTES | 264962 | 0 INPUTS | 0 EQ | 1 | IDE_A<1> = Vcc; MACROCELL | 0 | 11 | ROM_B_0_OBUF$BUF8 ATTRIBUTES | 264962 | 0 INPUTS | 0 EQ | 1 | IDE_A<0> = Vcc; MACROCELL | 10 | 16 | ROM_B_0_OBUF$BUF9 ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 10 | 15 INPUTS | 9 | UDS | D<3>.PIN | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | LDS | A<19>.PIN | A<11>.PIN INPUTMC | 4 | 8 | 7 | 7 | 17 | 8 | 5 | 14 | 1 INPUTP | 5 | 155 | 28 | 157 | 169 | 114 EXPORTS | 1 | 10 | 15 EQ | 9 | CP_WE = Vcc; ROM_B_0_OBUF$BUF9.EXP = !UDS & D<3>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<3>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<19>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<11>.PIN MACROCELL | 9 | 6 | $OpTx$FX_DC$112 ATTRIBUTES | 133888 | 0 OUTPUTMC | 16 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 INPUTS | 5 | FCS | UDS | LDS | DS1 | DS0 INPUTP | 5 | 147 | 155 | 157 | 148 | 170 EQ | 2 | $OpTx$FX_DC$112 = FCS # UDS & LDS & DS1 & DS0; MACROCELL | 4 | 17 | $OpTx$FX_DC$118__$INT ATTRIBUTES | 133888 | 0 OUTPUTMC | 17 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 9 | 9 | 13 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 5 | 9 | 4 | 9 | 7 | 9 | 11 | 9 | 10 | 4 | 16 INPUTS | 11 | FCS | RESET | RW | UDS | Z3_DATA<28> | LAN_ACCESS | LDS | DS1 | DS0 | D_OUT<4> | AUTO_CONFIG_DONE_CYCLE.EXP INPUTMC | 4 | 15 | 0 | 7 | 12 | 3 | 17 | 4 | 0 INPUTP | 7 | 147 | 263 | 158 | 155 | 157 | 148 | 170 EXPORTS | 1 | 4 | 16 IMPORTS | 1 | 4 | 0 EQ | 9 | $OpTx$FX_DC$118__$INT = FCS & RESET ;Imported pterms FB5_1 # RW & RESET # RESET & !LAN_ACCESS # UDS & LDS & DS1 & DS0 & RESET; $OpTx$FX_DC$118__$INT.EXP = RW & !FCS & !UDS & Z3_DATA<28> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<28> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<28> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<4> MACROCELL | 6 | 6 | $OpTx$FX_SC$119__$INT ATTRIBUTES | 133888 | 0 OUTPUTMC | 17 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 6 | 7 INPUTS | 17 | FCS | RW | LAN_ACCESS | AUTOCONFIG_ACCESS | UDS | LDS | DS1 | DS0 | D<9>.PIN | LAN_BASEADR<9> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> INPUTMC | 10 | 7 | 12 | 11 | 17 | 6 | 8 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 7 | 147 | 158 | 155 | 157 | 148 | 170 | 73 EXPORTS | 1 | 6 | 7 EQ | 7 | $OpTx$FX_SC$119__$INT = !RW # FCS # !LAN_ACCESS & !AUTOCONFIG_ACCESS # UDS & LDS & DS1 & DS0; $OpTx$FX_SC$119__$INT.EXP = D<9>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 11 | 12 | Z3_ADR_1/Z3_ADR_1_SETF__$INT ATTRIBUTES | 133888 | 0 OUTPUTMC | 17 | 7 | 17 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 7 | 12 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 7 | 3 | 7 | 10 | 7 | 8 | 7 | 6 | 5 | 10 | 5 | 8 | 5 | 6 INPUTS | 2 | RESET | BERR INPUTP | 2 | 263 | 176 EQ | 1 | Z3_ADR_1/Z3_ADR_1_SETF__$INT = RESET & BERR; MACROCELL | 5 | 0 | $OpTx$INV$205 ATTRIBUTES | 133888 | 0 OUTPUTMC | 2 | 7 | 17 | 7 | 12 INPUTS | 8 | LAN_BASEADR<5> | A<21>.PIN | A<17>.PIN | LAN_BASEADR<1> | LAN_BASEADR<7> | A<23>.PIN | N0$BUF4.EXP | EXP33_.EXP INPUTMC | 5 | 3 | 6 | 3 | 14 | 6 | 12 | 5 | 1 | 5 | 17 INPUTP | 3 | 163 | 172 | 161 IMPORTS | 2 | 5 | 1 | 5 | 17 EQ | 19 | $OpTx$INV$205 = A<17>.PIN & !LAN_BASEADR<1> # !A<17>.PIN & LAN_BASEADR<1> # LAN_BASEADR<5> & !A<21>.PIN # !LAN_BASEADR<5> & A<21>.PIN # !LAN_BASEADR<7> & A<23>.PIN ;Imported pterms FB6_2 # A<20>.PIN & !LAN_BASEADR<4> # !A<20>.PIN & LAN_BASEADR<4> # A<16>.PIN & !LAN_BASEADR<0> # !A<16>.PIN & LAN_BASEADR<0> ;Imported pterms FB6_18 # D<14>.PIN & !LAN_BASEADR<14> # !D<14>.PIN & LAN_BASEADR<14> # A<18>.PIN & !LAN_BASEADR<2> # !A<18>.PIN & LAN_BASEADR<2> # LAN_BASEADR<7> & !A<23>.PIN ;Imported pterms FB6_17 # A<19>.PIN & !LAN_BASEADR<3> # !A<19>.PIN & LAN_BASEADR<3>; MACROCELL | 9 | 3 | N0$BUF7/N0$BUF7_TRST__$INT ATTRIBUTES | 133888 | 0 OUTPUTMC | 1 | 14 | 11 INPUTS | 4 | FCS | AUTOCONFIG_ACCESS | CONFIG_READY | LAN_READY INPUTMC | 3 | 11 | 17 | 3 | 2 | 0 | 17 INPUTP | 1 | 147 EQ | 2 | N0$BUF7/N0$BUF7_TRST__$INT = FCS # !AUTOCONFIG_ACCESS & !CONFIG_READY & !LAN_READY; MACROCELL | 1 | 12 | EXP22_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 1 | 13 INPUTS | 7 | RW | FCS | UDS | Z3_DATA<23> | LAN_ACCESS | LDS | DS1 INPUTMC | 2 | 14 | 12 | 7 | 12 INPUTP | 5 | 158 | 147 | 155 | 157 | 148 EXPORTS | 1 | 1 | 13 EQ | 3 | EXP22_.EXP = RW & !FCS & !UDS & !Z3_DATA<23> & LAN_ACCESS # RW & !FCS & !LDS & !Z3_DATA<23> & LAN_ACCESS # RW & !FCS & !DS1 & !Z3_DATA<23> & LAN_ACCESS MACROCELL | 1 | 17 | EXP23_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 1 | 16 INPUTS | 9 | RW | FCS | UDS | Z3_DATA<24> | LAN_ACCESS | LDS | DS1 | DS0 | D_OUT<0> INPUTMC | 3 | 15 | 8 | 7 | 12 | 9 | 17 INPUTP | 6 | 158 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 1 | 16 EQ | 5 | EXP23_.EXP = RW & !FCS & !UDS & Z3_DATA<24> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<24> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<24> & LAN_ACCESS # RW & !FCS & !DS0 & Z3_DATA<24> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<0> MACROCELL | 3 | 0 | EXP24_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 3 | 17 INPUTS | 7 | AUTOCONFIG_ACCESS | Z3_ADR<4> | Z3_ADR<5> | Z3_ADR<2> | Z3_ADR_0 | Z3_ADR<6> | D_0_IOBUFE.EXP INPUTMC | 7 | 11 | 17 | 5 | 14 | 5 | 12 | 5 | 16 | 5 | 3 | 5 | 11 | 3 | 1 EXPORTS | 1 | 3 | 17 IMPORTS | 1 | 3 | 1 EQ | 9 | EXP24_.EXP = !AUTOCONFIG_ACCESS # Z3_ADR<4> # Z3_ADR<5> # Z3_ADR<2> & !Z3_ADR_0 # Z3_ADR<2> & Z3_ADR<6> ;Imported pterms FB4_2 # Z3_ADR_1 & Z3_ADR_0 # !Z3_ADR_0 & Z3_ADR<6> # UDS & LDS & DS1 & DS0 MACROCELL | 3 | 10 | EXP25_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 3 | 9 INPUTS | 16 | RW | FCS | UDS | D<4>.PIN | LAN_BASEADR<4> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | LDS | DS1 | DS0 INPUTMC | 9 | 3 | 9 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 7 | 158 | 147 | 155 | 38 | 157 | 148 | 170 EXPORTS | 1 | 3 | 9 EQ | 15 | EXP25_.EXP = !RW & !FCS & !UDS & D<4>.PIN & !LAN_BASEADR<4> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<4>.PIN & !LAN_BASEADR<4> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & !D<4>.PIN & LAN_BASEADR<4> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<4>.PIN & !LAN_BASEADR<4> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<4>.PIN & !LAN_BASEADR<4> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 3 | 15 | EXP26_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 3 | 16 INPUTS | 5 | AUTOCONFIG_ACCESS | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> INPUTMC | 5 | 11 | 17 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 EXPORTS | 1 | 3 | 16 EQ | 5 | EXP26_.EXP = !AUTOCONFIG_ACCESS # Z3_ADR<2> & Z3_ADR_1 # Z3_ADR<2> & Z3_ADR_0 # Z3_ADR<2> & !Z3_ADR<6> # Z3_ADR_1 & !Z3_ADR<6> MACROCELL | 4 | 2 | EXP27_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 3 INPUTS | 14 | D<13>.PIN | RW | FCS | DS1 | LAN_BASEADR<13> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS0 INPUTMC | 9 | 4 | 3 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 5 | 80 | 158 | 147 | 148 | 170 EXPORTS | 1 | 4 | 3 EQ | 6 | EXP27_.EXP = D<13>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<13> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<13>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<13> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 4 | 5 | EXP28_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 6 INPUTS | 16 | D<14>.PIN | RW | FCS | UDS | LAN_BASEADR<14> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | LDS | DS1 | DS0 INPUTMC | 9 | 4 | 6 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 7 | 81 | 158 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 4 | 6 EQ | 12 | EXP28_.EXP = D<14>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<14> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<14>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<14> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<14>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<14> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<14>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<14> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 4 | 8 | EXP29_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 7 INPUTS | 16 | D<15>.PIN | RW | FCS | UDS | LAN_BASEADR<15> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | LDS | DS1 | DS0 INPUTMC | 9 | 4 | 7 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 7 | 89 | 158 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 4 | 7 EQ | 12 | EXP29_.EXP = D<15>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<15> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<15>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<15> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<15>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<15> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<15>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<15> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 4 | 10 | EXP30_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 11 INPUTS | 9 | RW | FCS | UDS | Z3_DATA<25> | LAN_ACCESS | LDS | DS1 | DS0 | D_OUT<1> INPUTMC | 3 | 15 | 6 | 7 | 12 | 6 | 17 INPUTP | 6 | 158 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 4 | 11 EQ | 4 | EXP30_.EXP = RW & !FCS & !UDS & Z3_DATA<25> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<25> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<25> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<1> MACROCELL | 4 | 12 | EXP31_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 13 INPUTS | 9 | RW | FCS | UDS | Z3_DATA<26> | LAN_ACCESS | LDS | DS1 | DS0 | D_OUT<2> INPUTMC | 3 | 15 | 4 | 7 | 12 | 6 | 15 INPUTP | 6 | 158 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 4 | 13 EQ | 4 | EXP31_.EXP = RW & !FCS & !UDS & Z3_DATA<26> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<26> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<26> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<2> MACROCELL | 4 | 15 | EXP32_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 14 INPUTS | 9 | RW | FCS | UDS | Z3_DATA<27> | LAN_ACCESS | LDS | DS1 | DS0 | D_OUT<3> INPUTMC | 3 | 15 | 3 | 7 | 12 | 9 | 15 INPUTP | 6 | 158 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 4 | 14 EQ | 4 | EXP32_.EXP = RW & !FCS & !UDS & Z3_DATA<27> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<27> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<27> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<3> MACROCELL | 5 | 17 | EXP33_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 5 | 0 INPUTS | 7 | D<14>.PIN | LAN_BASEADR<14> | A<18>.PIN | LAN_BASEADR<2> | LAN_BASEADR<7> | A<23>.PIN | Z3_ADR<2>.EXP INPUTMC | 4 | 4 | 6 | 3 | 12 | 6 | 12 | 5 | 16 INPUTP | 3 | 81 | 171 | 161 EXPORTS | 1 | 5 | 0 IMPORTS | 1 | 5 | 16 EQ | 8 | EXP33_.EXP = D<14>.PIN & !LAN_BASEADR<14> # !D<14>.PIN & LAN_BASEADR<14> # A<18>.PIN & !LAN_BASEADR<2> # !A<18>.PIN & LAN_BASEADR<2> # LAN_BASEADR<7> & !A<23>.PIN ;Imported pterms FB6_17 # A<19>.PIN & !LAN_BASEADR<3> # !A<19>.PIN & LAN_BASEADR<3> MACROCELL | 6 | 1 | EXP34_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 0 INPUTS | 8 | AUTOCONFIG_ACCESS | Z3_ADR<2> | Z3_ADR_0 | Z3_ADR<6> | UDS | LDS | DS1 | DS0 INPUTMC | 4 | 11 | 17 | 5 | 16 | 5 | 3 | 5 | 11 INPUTP | 4 | 155 | 157 | 148 | 170 EXPORTS | 1 | 6 | 0 EQ | 5 | EXP34_.EXP = !AUTOCONFIG_ACCESS # Z3_ADR<2> & !Z3_ADR_0 # Z3_ADR<2> & !Z3_ADR<6> # !Z3_ADR<2> & Z3_ADR_0 & Z3_ADR<6> # UDS & LDS & DS1 & DS0 MACROCELL | 6 | 3 | EXP35_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 2 INPUTS | 9 | RW | FCS | UDS | Z3_DATA<29> | LAN_ACCESS | LDS | DS1 | DS0 | D_OUT<5> INPUTMC | 3 | 10 | 6 | 7 | 12 | 3 | 16 INPUTP | 6 | 158 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 6 | 2 EQ | 4 | EXP35_.EXP = RW & !FCS & !UDS & Z3_DATA<29> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<29> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<29> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<5> MACROCELL | 6 | 5 | EXP36_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 4 INPUTS | 9 | RW | FCS | UDS | Z3_DATA<30> | LAN_ACCESS | LDS | DS1 | DS0 | D_OUT<6> INPUTMC | 3 | 10 | 5 | 7 | 12 | 6 | 0 INPUTP | 6 | 158 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 6 | 4 EQ | 4 | EXP36_.EXP = RW & !FCS & !UDS & Z3_DATA<30> & LAN_ACCESS # RW & !FCS & !LDS & Z3_DATA<30> & LAN_ACCESS # RW & !FCS & !DS1 & Z3_DATA<30> & LAN_ACCESS # UDS & LDS & DS1 & DS0 & D_OUT<6> MACROCELL | 6 | 7 | EXP37_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 8 INPUTS | 17 | D<9>.PIN | RW | FCS | UDS | LAN_BASEADR<9> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS1 | DS0 | LDS | $OpTx$FX_SC$119__$INT.EXP INPUTMC | 10 | 6 | 8 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 6 | 6 INPUTP | 7 | 73 | 158 | 147 | 155 | 148 | 170 | 157 EXPORTS | 1 | 6 | 8 IMPORTS | 1 | 6 | 6 EQ | 19 | EXP37_.EXP = D<9>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<9>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<9>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<9>.PIN & !RW & !FCS & !UDS & LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<9>.PIN & !RW & !FCS & !LDS & LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB7_7 # D<9>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<9> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 6 | 9 | EXP38_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 10 INPUTS | 17 | D<8>.PIN | RW | FCS | DS1 | LAN_BASEADR<8> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | DS0 | UDS | LDS | LAN_BASEADR<9>.EXP INPUTMC | 10 | 6 | 10 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 6 | 8 INPUTP | 7 | 32 | 158 | 147 | 148 | 170 | 155 | 157 EXPORTS | 1 | 6 | 10 IMPORTS | 1 | 6 | 8 EQ | 22 | EXP38_.EXP = D<8>.PIN & !RW & !FCS & !DS1 & !LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<8>.PIN & !RW & !FCS & !DS0 & !LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<8>.PIN & !RW & !FCS & !UDS & LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<8>.PIN & !RW & !FCS & !LDS & LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !D<8>.PIN & !RW & !FCS & !DS1 & LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> ;Imported pterms FB7_9 # D<8>.PIN & !RW & !FCS & !UDS & !LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # D<8>.PIN & !RW & !FCS & !LDS & !LAN_BASEADR<8> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 6 | 13 | EXP39_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 12 INPUTS | 16 | RW | FCS | UDS | D<7>.PIN | LAN_BASEADR<7> | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | Z3_ADR<6> | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | LDS | DS1 | DS0 INPUTMC | 9 | 6 | 12 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 7 | 158 | 147 | 155 | 29 | 157 | 148 | 170 EXPORTS | 1 | 6 | 12 EQ | 15 | EXP39_.EXP = !RW & !FCS & !UDS & D<7>.PIN & !LAN_BASEADR<7> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & D<7>.PIN & !LAN_BASEADR<7> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !LDS & !D<7>.PIN & LAN_BASEADR<7> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS1 & D<7>.PIN & !LAN_BASEADR<7> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> # !RW & !FCS & !DS0 & D<7>.PIN & !LAN_BASEADR<7> & !Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & !Z3_ADR<6> & AUTOCONFIG_ACCESS & !Z3_ADR<3> & Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 6 | 14 | EXP40_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 15 INPUTS | 11 | FCS | UDS | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | AUTOCONFIG_ACCESS | Z3_ADR<3> | Z3_ADR<4> | Z3_ADR<5> | LDS | DS1 INPUTMC | 7 | 5 | 16 | 13 | 17 | 5 | 3 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 INPUTP | 4 | 147 | 155 | 157 | 148 EXPORTS | 1 | 6 | 15 EQ | 10 | EXP40_.EXP = !FCS & !UDS & Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !UDS & !Z3_ADR<2> & !Z3_ADR_1 & !Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !LDS & Z3_ADR<2> & !Z3_ADR_1 & Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !LDS & !Z3_ADR<2> & !Z3_ADR_1 & !Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> # !FCS & !DS1 & !Z3_ADR<2> & !Z3_ADR_1 & !Z3_ADR_0 & AUTOCONFIG_ACCESS & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> MACROCELL | 6 | 16 | EXP41_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 17 INPUTS | 6 | FCS | AUTOCONFIG_ACCESS | Z3_ADR<2> | Z3_ADR_1 | Z3_ADR_0 | D_OUT<2>.EXP INPUTMC | 5 | 11 | 17 | 5 | 16 | 13 | 17 | 5 | 3 | 6 | 15 INPUTP | 1 | 147 EXPORTS | 1 | 6 | 17 IMPORTS | 1 | 6 | 15 EQ | 7 | EXP41_.EXP = FCS # !AUTOCONFIG_ACCESS # Z3_ADR<2> & Z3_ADR_1 # Z3_ADR<2> & Z3_ADR_0 # Z3_ADR_1 & Z3_ADR_0 ;Imported pterms FB7_16 # UDS & LDS & DS1 & DS0 MACROCELL | 7 | 0 | EXP42_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 17 INPUTS | 7 | D<11>.PIN | LAN_BASEADR<11> | D<10>.PIN | LAN_BASEADR<10> | D<15>.PIN | LAN_BASEADR<15> | DQ_12_IOBUFE.EXP INPUTMC | 4 | 1 | 3 | 1 | 15 | 4 | 7 | 7 | 1 INPUTP | 3 | 77 | 74 | 89 EXPORTS | 1 | 7 | 17 IMPORTS | 1 | 7 | 1 EQ | 9 | EXP42_.EXP = !D<11>.PIN & LAN_BASEADR<11> # D<10>.PIN & !LAN_BASEADR<10> # !D<10>.PIN & LAN_BASEADR<10> # D<15>.PIN & !LAN_BASEADR<15> # !D<15>.PIN & LAN_BASEADR<15> ;Imported pterms FB8_2 # !D<13>.PIN & LAN_BASEADR<13> # LAN_BASEADR<6> & !A<22>.PIN # !LAN_BASEADR<6> & A<22>.PIN MACROCELL | 7 | 11 | EXP43_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 12 INPUTS | 7 | D<9>.PIN | LAN_BASEADR<9> | D<11>.PIN | LAN_BASEADR<11> | D<15>.PIN | LAN_BASEADR<15> | Z3_ADR<10>.EXP INPUTMC | 4 | 6 | 8 | 1 | 3 | 4 | 7 | 7 | 10 INPUTP | 3 | 73 | 77 | 89 EXPORTS | 1 | 7 | 12 IMPORTS | 1 | 7 | 10 EQ | 7 | EXP43_.EXP = D<9>.PIN & !LAN_BASEADR<9> # !D<9>.PIN & LAN_BASEADR<9> # D<11>.PIN & !LAN_BASEADR<11> # !D<11>.PIN & LAN_BASEADR<11> # D<15>.PIN & !LAN_BASEADR<15> ;Imported pterms FB8_11 # D<8>.PIN & !LAN_BASEADR<8> MACROCELL | 7 | 13 | EXP44_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 12 INPUTS | 7 | D<12>.PIN | LAN_BASEADR<12> | D<10>.PIN | LAN_BASEADR<10> | D<15>.PIN | LAN_BASEADR<15> | EXP45_.EXP INPUTMC | 4 | 1 | 6 | 1 | 15 | 4 | 7 | 7 | 14 INPUTP | 3 | 78 | 74 | 89 EXPORTS | 1 | 7 | 12 IMPORTS | 1 | 7 | 14 EQ | 11 | EXP44_.EXP = D<12>.PIN & !LAN_BASEADR<12> # !D<12>.PIN & LAN_BASEADR<12> # D<10>.PIN & !LAN_BASEADR<10> # !D<10>.PIN & LAN_BASEADR<10> # !D<15>.PIN & LAN_BASEADR<15> ;Imported pterms FB8_15 # !D<8>.PIN & LAN_BASEADR<8> # D<13>.PIN & !LAN_BASEADR<13> # !D<13>.PIN & LAN_BASEADR<13> # LAN_BASEADR<6> & !A<22>.PIN # !LAN_BASEADR<6> & A<22>.PIN MACROCELL | 7 | 14 | EXP45_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 13 INPUTS | 6 | D<8>.PIN | LAN_BASEADR<8> | D<13>.PIN | LAN_BASEADR<13> | LAN_BASEADR<6> | A<22>.PIN INPUTMC | 3 | 6 | 10 | 4 | 3 | 3 | 3 INPUTP | 3 | 32 | 80 | 162 EXPORTS | 1 | 7 | 13 EQ | 5 | EXP45_.EXP = !D<8>.PIN & LAN_BASEADR<8> # D<13>.PIN & !LAN_BASEADR<13> # !D<13>.PIN & LAN_BASEADR<13> # LAN_BASEADR<6> & !A<22>.PIN # !LAN_BASEADR<6> & A<22>.PIN MACROCELL | 7 | 15 | EXP46_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 16 INPUTS | 6 | D<8>.PIN | LAN_BASEADR<8> | D<13>.PIN | LAN_BASEADR<13> | D<12>.PIN | LAN_BASEADR<12> INPUTMC | 3 | 6 | 10 | 4 | 3 | 1 | 6 INPUTP | 3 | 32 | 80 | 78 EXPORTS | 1 | 7 | 16 EQ | 5 | EXP46_.EXP = D<8>.PIN & !LAN_BASEADR<8> # !D<8>.PIN & LAN_BASEADR<8> # D<13>.PIN & !LAN_BASEADR<13> # D<12>.PIN & !LAN_BASEADR<12> # !D<12>.PIN & LAN_BASEADR<12> MACROCELL | 7 | 16 | EXP47_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 17 INPUTS | 7 | A<13>.PIN | A<14>.PIN | D<9>.PIN | LAN_BASEADR<9> | D<11>.PIN | LAN_BASEADR<11> | EXP46_.EXP INPUTMC | 3 | 6 | 8 | 1 | 3 | 7 | 15 INPUTP | 4 | 123 | 125 | 73 | 77 EXPORTS | 1 | 7 | 17 IMPORTS | 1 | 7 | 15 EQ | 11 | EXP47_.EXP = !A<13>.PIN # !A<14>.PIN # D<9>.PIN & !LAN_BASEADR<9> # !D<9>.PIN & LAN_BASEADR<9> # D<11>.PIN & !LAN_BASEADR<11> ;Imported pterms FB8_16 # D<8>.PIN & !LAN_BASEADR<8> # !D<8>.PIN & LAN_BASEADR<8> # D<13>.PIN & !LAN_BASEADR<13> # D<12>.PIN & !LAN_BASEADR<12> # !D<12>.PIN & LAN_BASEADR<12> MACROCELL | 8 | 0 | EXP48_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 8 | 17 INPUTS | 11 | LAN_SM_FSM_FFd3 | DQ_DATA<14> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_SWAP | LAN_SM_FSM_FFd1 | A<14>.PIN | A<22>.PIN | D<14>.PIN | UDS | EXP49_.EXP INPUTMC | 7 | 14 | 1 | 8 | 17 | 8 | 7 | 8 | 5 | 7 | 17 | 0 | 15 | 8 | 1 INPUTP | 4 | 125 | 162 | 81 | 155 EXPORTS | 1 | 8 | 17 IMPORTS | 1 | 8 | 1 EQ | 19 | EXP48_.EXP = LAN_SM_FSM_FFd3 & DQ_DATA<14> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<14> # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<14>.PIN # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<22>.PIN # D<14>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB9_2 # D<14>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<6>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<6>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<14>.PIN # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<22>.PIN MACROCELL | 8 | 1 | EXP49_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 8 | 0 INPUTS | 10 | D<14>.PIN | LDS | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | UDS | D<6>.PIN | A<14>.PIN | A<22>.PIN INPUTMC | 4 | 8 | 7 | 7 | 17 | 8 | 5 | 14 | 1 INPUTP | 6 | 81 | 157 | 155 | 26 | 125 | 162 EXPORTS | 1 | 8 | 0 EQ | 10 | EXP49_.EXP = D<14>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<6>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<6>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<14>.PIN # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<22>.PIN MACROCELL | 8 | 2 | EXP50_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 8 | 3 INPUTS | 9 | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | A<23>.PIN | A<15>.PIN | D<15>.PIN | UDS | LAN_SM_FSM_FFd2 INPUTMC | 5 | 8 | 7 | 7 | 17 | 0 | 15 | 14 | 1 | 8 | 5 INPUTP | 4 | 161 | 139 | 89 | 155 EXPORTS | 1 | 8 | 3 EQ | 6 | EXP50_.EXP = LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<23>.PIN # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<15>.PIN # D<15>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 MACROCELL | 8 | 4 | EXP51_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 8 | 3 INPUTS | 10 | D<15>.PIN | LDS | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | UDS | D<7>.PIN | A<23>.PIN | A<15>.PIN INPUTMC | 4 | 8 | 7 | 7 | 17 | 8 | 5 | 14 | 1 INPUTP | 6 | 89 | 157 | 155 | 29 | 161 | 139 EXPORTS | 1 | 8 | 3 EQ | 10 | EXP51_.EXP = D<15>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<7>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<7>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<23>.PIN # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<15>.PIN MACROCELL | 8 | 6 | EXP52_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 8 | 7 INPUTS | 7 | RW | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd1 | DS1 | DS0 INPUTMC | 4 | 8 | 5 | 14 | 1 | 8 | 7 | 0 | 15 INPUTP | 3 | 158 | 148 | 170 EXPORTS | 1 | 8 | 7 EQ | 8 | EXP52_.EXP = RW & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3 # DS1 & DS0 & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 MACROCELL | 8 | 9 | EXP53_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 8 | 8 INPUTS | 10 | D<14>.PIN | LDS | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | UDS | D<6>.PIN | A<22>.PIN | A<14>.PIN INPUTMC | 4 | 8 | 7 | 7 | 17 | 8 | 5 | 14 | 1 INPUTP | 6 | 81 | 157 | 155 | 26 | 162 | 125 EXPORTS | 1 | 8 | 8 EQ | 10 | EXP53_.EXP = D<14>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<6>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<6>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<22>.PIN # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<14>.PIN MACROCELL | 8 | 11 | EXP54_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 8 | 12 INPUTS | 6 | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd1 | DS1 | DS0 INPUTMC | 4 | 8 | 7 | 8 | 5 | 14 | 1 | 0 | 15 INPUTP | 2 | 148 | 170 EXPORTS | 1 | 8 | 12 EQ | 10 | EXP54_.EXP = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # DS1 & DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # DS1 & DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3 MACROCELL | 8 | 14 | EXP55_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 8 | 15 INPUTS | 12 | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | A<15>.PIN | A<23>.PIN | D<15>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS | D<7>.PIN | Z3_DATA<1>.EXP INPUTMC | 6 | 8 | 7 | 7 | 17 | 0 | 15 | 14 | 1 | 8 | 5 | 8 | 13 INPUTP | 6 | 139 | 161 | 89 | 155 | 157 | 29 EXPORTS | 1 | 8 | 15 IMPORTS | 1 | 8 | 13 EQ | 13 | EXP55_.EXP = LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<15>.PIN # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<23>.PIN # D<15>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<15>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<7>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB9_14 # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<23>.PIN MACROCELL | 10 | 1 | EXP56_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 10 | 0 INPUTS | 9 | LDS | D<2>.PIN | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | A<18>.PIN | UDS | A<10>.PIN INPUTMC | 4 | 8 | 7 | 7 | 17 | 8 | 5 | 14 | 1 INPUTP | 5 | 157 | 71 | 171 | 155 | 112 EXPORTS | 1 | 10 | 0 EQ | 6 | EXP56_.EXP = !LDS & D<2>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<18>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<10>.PIN MACROCELL | 10 | 14 | EXP57_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 10 | 15 INPUTS | 10 | A<19>.PIN | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | A<11>.PIN | D<11>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS INPUTMC | 5 | 8 | 7 | 7 | 17 | 0 | 15 | 14 | 1 | 8 | 5 INPUTP | 5 | 169 | 114 | 77 | 155 | 157 EXPORTS | 1 | 10 | 15 EQ | 8 | EXP57_.EXP = A<19>.PIN & LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<11>.PIN # D<11>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<11>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 MACROCELL | 10 | 17 | EXP58_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 10 | 0 INPUTS | 11 | A<18>.PIN | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | A<10>.PIN | D<10>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS | D<2>.PIN INPUTMC | 5 | 8 | 7 | 7 | 17 | 0 | 15 | 14 | 1 | 8 | 5 INPUTP | 6 | 171 | 112 | 74 | 155 | 157 | 71 EXPORTS | 1 | 10 | 0 EQ | 10 | EXP58_.EXP = A<18>.PIN & LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<10>.PIN # D<10>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<10>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<2>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 MACROCELL | 12 | 4 | EXP59_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 5 INPUTS | 9 | A<19>.PIN | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | A<11>.PIN | D<11>.PIN | UDS | LAN_SM_FSM_FFd2 INPUTMC | 5 | 8 | 7 | 7 | 17 | 0 | 15 | 14 | 1 | 8 | 5 INPUTP | 4 | 169 | 114 | 77 | 155 EXPORTS | 1 | 12 | 5 EQ | 6 | EXP59_.EXP = A<19>.PIN & LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<11>.PIN # D<11>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 MACROCELL | 12 | 6 | EXP60_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 5 INPUTS | 10 | D<11>.PIN | LDS | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | UDS | D<3>.PIN | A<19>.PIN | A<11>.PIN INPUTMC | 4 | 8 | 7 | 7 | 17 | 8 | 5 | 14 | 1 INPUTP | 6 | 77 | 157 | 155 | 28 | 169 | 114 EXPORTS | 1 | 12 | 5 EQ | 10 | EXP60_.EXP = D<11>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<3>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<3>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<19>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<11>.PIN MACROCELL | 12 | 10 | EXP61_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 11 INPUTS | 9 | A<16>.PIN | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | A<8>.PIN | UDS | D<0>.PIN | LAN_SM_FSM_FFd2 INPUTMC | 5 | 8 | 7 | 7 | 17 | 0 | 15 | 14 | 1 | 8 | 5 INPUTP | 4 | 175 | 106 | 155 | 4 EXPORTS | 1 | 12 | 11 EQ | 6 | EXP61_.EXP = A<16>.PIN & LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<8>.PIN # !UDS & D<0>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 MACROCELL | 12 | 12 | EXP62_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 11 INPUTS | 10 | D<8>.PIN | UDS | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | LDS | D<0>.PIN | A<16>.PIN | A<8>.PIN INPUTMC | 4 | 8 | 7 | 7 | 17 | 8 | 5 | 14 | 1 INPUTP | 6 | 32 | 155 | 157 | 4 | 175 | 106 EXPORTS | 1 | 12 | 11 EQ | 10 | EXP62_.EXP = D<8>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<8>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<0>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<16>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<8>.PIN MACROCELL | 12 | 16 | EXP63_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 15 INPUTS | 10 | D<9>.PIN | UDS | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | LDS | D<1>.PIN | A<17>.PIN | A<9>.PIN INPUTMC | 4 | 8 | 7 | 7 | 17 | 8 | 5 | 14 | 1 INPUTP | 6 | 73 | 155 | 157 | 30 | 172 | 108 EXPORTS | 1 | 12 | 15 EQ | 10 | EXP63_.EXP = D<9>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<9>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<1>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<17>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<9>.PIN MACROCELL | 14 | 2 | EXP64_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 14 | 1 INPUTS | 9 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | RW | UDS | LAN_SM_FSM_FFd4 | LDS | DS1 | DS0 | LAN_SM_FSM_FFd2 INPUTMC | 4 | 0 | 15 | 14 | 1 | 8 | 7 | 8 | 5 INPUTP | 5 | 158 | 155 | 157 | 148 | 170 EXPORTS | 1 | 14 | 1 EQ | 5 | EXP64_.EXP = LAN_SM_FSM_FFd1 & LAN_SM_FSM_FFd3 # RW & !UDS & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 # RW & !LDS & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 # DS1 & DS0 & LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1 # DS1 & DS0 & LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd3 MACROCELL | 14 | 4 | EXP65_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 14 | 5 INPUTS | 12 | A<20>.PIN | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | A<12>.PIN | D<12>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS | D<4>.PIN | Z3_DATA<31>.EXP INPUTMC | 6 | 8 | 7 | 7 | 17 | 0 | 15 | 14 | 1 | 8 | 5 | 14 | 3 INPUTP | 6 | 167 | 115 | 78 | 155 | 157 | 38 EXPORTS | 1 | 14 | 5 IMPORTS | 1 | 14 | 3 EQ | 13 | EXP65_.EXP = A<20>.PIN & LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<12>.PIN # D<12>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<12>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<4>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB15_4 # A<20>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 MACROCELL | 14 | 7 | EXP66_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 14 | 6 INPUTS | 11 | LAN_SM_FSM_FFd3 | DQ_DATA<5> | LAN_SM_FSM_FFd4 | LAN_SM_FSM_FFd2 | DQ_SWAP | LAN_SM_FSM_FFd1 | A<21>.PIN | A<13>.PIN | D<13>.PIN | UDS | EXP67_.EXP INPUTMC | 7 | 14 | 1 | 14 | 6 | 8 | 7 | 8 | 5 | 7 | 17 | 0 | 15 | 14 | 8 INPUTP | 4 | 163 | 123 | 80 | 155 EXPORTS | 1 | 14 | 6 IMPORTS | 1 | 14 | 8 EQ | 19 | EXP66_.EXP = LAN_SM_FSM_FFd3 & DQ_DATA<5> # LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<5> # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<21>.PIN # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<13>.PIN # D<13>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB15_9 # D<13>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<5>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<5>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<21>.PIN # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<13>.PIN MACROCELL | 14 | 8 | EXP67_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 14 | 7 INPUTS | 10 | D<13>.PIN | LDS | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | UDS | D<5>.PIN | A<21>.PIN | A<13>.PIN INPUTMC | 4 | 8 | 7 | 7 | 17 | 8 | 5 | 14 | 1 INPUTP | 6 | 80 | 157 | 155 | 37 | 163 | 123 EXPORTS | 1 | 14 | 7 EQ | 10 | EXP67_.EXP = D<13>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<5>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<5>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<21>.PIN # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<13>.PIN MACROCELL | 14 | 9 | EXP68_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 14 | 10 INPUTS | 10 | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | A<13>.PIN | A<21>.PIN | D<13>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS INPUTMC | 5 | 8 | 7 | 7 | 17 | 0 | 15 | 14 | 1 | 8 | 5 INPUTP | 5 | 123 | 163 | 80 | 155 | 157 EXPORTS | 1 | 14 | 10 EQ | 8 | EXP68_.EXP = LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<13>.PIN # LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<21>.PIN # D<13>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<13>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 MACROCELL | 14 | 17 | EXP69_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 14 | 0 INPUTS | 11 | A<20>.PIN | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd3 | A<12>.PIN | D<12>.PIN | UDS | LAN_SM_FSM_FFd2 | LDS | D<4>.PIN INPUTMC | 5 | 8 | 7 | 7 | 17 | 0 | 15 | 14 | 1 | 8 | 5 INPUTP | 6 | 167 | 115 | 78 | 155 | 157 | 38 EXPORTS | 1 | 14 | 0 EQ | 10 | EXP69_.EXP = A<20>.PIN & LAN_SM_FSM_FFd4 & !DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 # LAN_SM_FSM_FFd4 & DQ_SWAP & LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd3 & A<12>.PIN # D<12>.PIN & !UDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<12>.PIN & !LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<4>.PIN & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 MACROCELL | 15 | 16 | EXP70_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 15 | 15 INPUTS | 10 | D<8>.PIN | UDS | LAN_SM_FSM_FFd4 | DQ_SWAP | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd3 | LDS | D<0>.PIN | A<16>.PIN | Z3_DATA<20>.EXP INPUTMC | 5 | 8 | 7 | 7 | 17 | 8 | 5 | 14 | 1 | 15 | 17 INPUTP | 5 | 32 | 155 | 157 | 4 | 175 EXPORTS | 1 | 15 | 15 IMPORTS | 1 | 15 | 17 EQ | 13 | EXP70_.EXP = D<8>.PIN & !UDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # D<8>.PIN & !LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !UDS & D<0>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # !LDS & D<0>.PIN & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 # A<16>.PIN & UDS & LDS & !LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 ;Imported pterms FB16_18 # UDS & LDS & !LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & A<8>.PIN PIN | Z3 | 64 | 0 | N/A | 151 | 3 | 7 | 17 | 7 | 12 | 11 | 17 PIN | CFIN | 64 | 0 | N/A | 190 | 1 | 11 | 17 PIN | CLK_EXT | 4096 | 0 | N/A | 57 | 98 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 4 | 0 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 10 | 6 | 8 | 9 | 8 | 0 | 12 | 15 | 14 | 15 | 13 | 15 | 12 | 15 | 11 | 15 | 17 | 10 | 8 | 10 | 7 | 14 | 12 | 15 | 8 | 15 | 6 | 15 | 4 | 15 | 3 | 15 | 0 | 10 | 6 | 10 | 5 | 14 | 3 | 8 | 7 | 8 | 5 | 0 | 15 | 14 | 1 | 0 | 0 | 0 | 10 | 0 | 8 | 11 | 15 | 11 | 14 | 15 | 15 | 10 | 0 | 10 | 15 | 14 | 0 | 14 | 10 | 8 | 17 | 8 | 15 | 12 | 0 | 10 | 12 | 12 | 5 | 14 | 5 | 14 | 6 | 8 | 8 | 8 | 3 | 12 | 11 | 12 | 15 | 11 | 13 | 3 | 2 | 1 | 8 | 9 | 17 | 6 | 17 | 6 | 15 | 9 | 15 | 3 | 17 | 3 | 16 | 6 | 0 | 9 | 14 | 11 | 16 | 0 | 2 | 0 | 1 | 12 | 14 | 0 | 17 | 0 | 6 | 0 | 3 | 8 | 12 | 9 | 12 | 12 | 17 | 13 | 10 PIN | RW | 64 | 0 | N/A | 158 | 82 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 4 | 0 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 10 | 6 | 8 | 9 | 8 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 8 | 6 | 8 | 5 | 6 | 13 | 3 | 2 | 1 | 8 | 12 | 13 | 4 | 15 | 6 | 6 | 1 | 1 | 1 | 2 | 1 | 7 | 1 | 12 | 1 | 17 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 10 | 3 | 11 | 3 | 13 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 5 | 4 | 8 | 4 | 10 | 4 | 12 | 4 | 17 | 6 | 3 | 6 | 5 | 6 | 7 | 6 | 9 | 14 | 2 PIN | FCS | 64 | 0 | N/A | 147 | 96 | 4 | 0 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 10 | 6 | 8 | 9 | 8 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 7 | 17 | 5 | 16 | 13 | 17 | 5 | 3 | 5 | 11 | 7 | 12 | 11 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 7 | 3 | 3 | 2 | 1 | 8 | 7 | 10 | 7 | 8 | 7 | 6 | 5 | 10 | 5 | 8 | 5 | 6 | 9 | 17 | 6 | 16 | 6 | 15 | 9 | 15 | 3 | 17 | 3 | 16 | 6 | 0 | 9 | 14 | 9 | 12 | 7 | 4 | 12 | 13 | 13 | 13 | 7 | 9 | 13 | 10 | 9 | 6 | 4 | 17 | 6 | 6 | 9 | 3 | 1 | 1 | 1 | 2 | 1 | 7 | 1 | 12 | 1 | 17 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 10 | 3 | 11 | 3 | 13 | 4 | 1 | 4 | 2 | 4 | 4 | 4 | 5 | 4 | 8 | 4 | 10 | 4 | 12 | 4 | 15 | 6 | 3 | 6 | 5 | 6 | 7 | 6 | 9 | 6 | 13 | 6 | 14 PIN | UDS | 64 | 0 | N/A | 155 | 100 | 3 | 17 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 9 | 6 | 7 | 9 | 8 | 1 | 17 | 4 | 12 | 4 | 8 | 4 | 15 | 6 | 1 | 6 | 3 | 6 | 10 | 1 | 13 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 12 | 1 | 14 | 4 | 10 | 8 | 5 | 12 | 16 | 14 | 17 | 8 | 13 | 10 | 14 | 12 | 17 | 14 | 9 | 8 | 16 | 8 | 14 | 10 | 17 | 10 | 11 | 12 | 4 | 14 | 4 | 14 | 3 | 8 | 7 | 8 | 2 | 12 | 10 | 12 | 14 | 1 | 8 | 9 | 17 | 6 | 15 | 6 | 14 | 9 | 15 | 3 | 11 | 3 | 13 | 4 | 17 | 9 | 14 | 0 | 3 | 8 | 12 | 9 | 12 | 9 | 6 | 4 | 5 | 6 | 6 | 1 | 1 | 1 | 2 | 1 | 7 | 3 | 1 | 3 | 2 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 10 | 4 | 0 | 4 | 1 | 4 | 4 | 6 | 5 | 6 | 8 | 6 | 13 | 8 | 0 | 8 | 1 | 8 | 4 | 8 | 9 | 10 | 1 | 10 | 13 | 10 | 16 | 12 | 1 | 12 | 6 | 12 | 12 | 14 | 1 | 14 | 2 | 14 | 6 | 14 | 7 | 14 | 8 | 14 | 11 | 15 | 16 | 15 | 17 PIN | LDS | 64 | 0 | N/A | 157 | 91 | 3 | 17 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 5 | 3 | 6 | 3 | 3 | 6 | 8 | 6 | 9 | 6 | 7 | 1 | 17 | 4 | 12 | 4 | 8 | 4 | 15 | 6 | 1 | 6 | 3 | 6 | 10 | 1 | 13 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 12 | 1 | 7 | 4 | 10 | 8 | 5 | 12 | 16 | 14 | 17 | 8 | 13 | 10 | 14 | 12 | 17 | 14 | 9 | 8 | 16 | 8 | 14 | 10 | 17 | 10 | 11 | 12 | 1 | 14 | 4 | 14 | 3 | 8 | 4 | 8 | 1 | 12 | 6 | 12 | 12 | 1 | 8 | 9 | 17 | 6 | 15 | 6 | 14 | 9 | 15 | 3 | 11 | 3 | 13 | 4 | 17 | 9 | 14 | 0 | 6 | 8 | 12 | 9 | 12 | 9 | 6 | 4 | 5 | 6 | 6 | 1 | 1 | 1 | 2 | 1 | 16 | 3 | 1 | 3 | 2 | 3 | 4 | 3 | 9 | 3 | 10 | 4 | 0 | 4 | 1 | 4 | 4 | 6 | 5 | 6 | 12 | 6 | 13 | 8 | 9 | 10 | 1 | 10 | 13 | 10 | 16 | 14 | 1 | 14 | 2 | 14 | 6 | 14 | 8 | 14 | 11 | 15 | 16 | 15 | 17 PIN | DS1 | 64 | 0 | N/A | 148 | 67 | 3 | 17 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 9 | 6 | 8 | 1 | 17 | 4 | 12 | 4 | 8 | 4 | 15 | 6 | 1 | 6 | 3 | 6 | 10 | 1 | 13 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 12 | 1 | 14 | 4 | 10 | 8 | 6 | 0 | 15 | 6 | 13 | 1 | 8 | 9 | 17 | 6 | 14 | 6 | 15 | 9 | 15 | 3 | 11 | 3 | 13 | 4 | 17 | 9 | 14 | 0 | 17 | 0 | 3 | 8 | 11 | 9 | 12 | 9 | 6 | 4 | 5 | 6 | 6 | 1 | 1 | 1 | 2 | 1 | 7 | 3 | 1 | 3 | 2 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 10 | 4 | 0 | 4 | 1 | 4 | 2 | 6 | 5 | 6 | 7 | 14 | 2 PIN | DS0 | 64 | 0 | N/A | 170 | 70 | 4 | 0 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 10 | 6 | 8 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 7 | 4 | 11 | 8 | 6 | 0 | 15 | 6 | 9 | 1 | 8 | 9 | 17 | 6 | 13 | 6 | 15 | 9 | 15 | 3 | 11 | 3 | 13 | 4 | 17 | 9 | 14 | 0 | 17 | 0 | 6 | 8 | 11 | 9 | 12 | 9 | 6 | 4 | 15 | 6 | 6 | 1 | 1 | 1 | 2 | 1 | 17 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 10 | 3 | 17 | 4 | 2 | 4 | 5 | 4 | 8 | 4 | 10 | 4 | 12 | 6 | 1 | 6 | 3 | 6 | 5 | 6 | 7 | 14 | 2 PIN | RESET | 64 | 0 | N/A | 263 | 77 | 4 | 0 | 1 | 0 | 1 | 15 | 1 | 3 | 1 | 6 | 4 | 3 | 4 | 6 | 4 | 7 | 3 | 14 | 3 | 12 | 3 | 8 | 3 | 9 | 3 | 6 | 3 | 3 | 6 | 12 | 6 | 10 | 6 | 8 | 9 | 8 | 0 | 12 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 9 | 9 | 13 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 5 | 9 | 4 | 9 | 7 | 9 | 11 | 9 | 10 | 0 | 0 | 0 | 10 | 0 | 8 | 11 | 15 | 11 | 14 | 11 | 13 | 3 | 2 | 1 | 8 | 9 | 17 | 6 | 17 | 6 | 15 | 9 | 15 | 3 | 17 | 3 | 16 | 6 | 0 | 9 | 14 | 11 | 16 | 0 | 2 | 0 | 1 | 9 | 12 | 12 | 17 | 3 | 5 | 5 | 5 | 5 | 7 | 5 | 2 | 5 | 4 | 3 | 4 | 3 | 11 | 3 | 7 | 1 | 1 | 3 | 13 | 1 | 4 | 1 | 2 | 5 | 9 | 5 | 13 | 7 | 7 | 7 | 4 | 12 | 13 | 7 | 9 | 13 | 10 | 4 | 17 | 11 | 12 PIN | LAN_INT | 64 | 0 | N/A | 201 | 2 | 0 | 12 | 0 | 1 PIN | A<4> | 64 | 0 | N/A | 97 | 1 | 5 | 16 PIN | A<3> | 64 | 0 | N/A | 99 | 1 | 13 | 17 PIN | A<2> | 64 | 0 | N/A | 101 | 1 | 5 | 3 PIN | A<5> | 64 | 0 | N/A | 91 | 1 | 5 | 15 PIN | A<6> | 64 | 0 | N/A | 98 | 1 | 5 | 14 PIN | A<7> | 64 | 0 | N/A | 100 | 1 | 5 | 12 PIN | BERR | 64 | 0 | N/A | 176 | 1 | 11 | 12 PIN | AUTOBOOT_OFF | 64 | 0 | N/A | 142 | 1 | 13 | 10 PIN | A_LAN<0> | 536871040 | 0 | N/A | 7 PIN | A_LAN<10> | 536871040 | 0 | N/A | 255 PIN | A_LAN<11> | 536871040 | 0 | N/A | 256 PIN | A_LAN<12> | 536871040 | 0 | N/A | 253 PIN | A_LAN<13> | 536871040 | 0 | N/A | 254 PIN | A_LAN<1> | 536871040 | 0 | N/A | 6 PIN | A_LAN<2> | 536871040 | 0 | N/A | 12 PIN | A_LAN<3> | 536871040 | 0 | N/A | 8 PIN | A_LAN<4> | 536871040 | 0 | N/A | 20 PIN | A_LAN<5> | 536871040 | 0 | N/A | 13 PIN | A_LAN<6> | 536871040 | 0 | N/A | 22 PIN | A_LAN<7> | 536871040 | 0 | N/A | 21 PIN | A_LAN<8> | 536871040 | 0 | N/A | 258 PIN | A_LAN<9> | 536871040 | 0 | N/A | 262 PIN | LAN_CS | 536871040 | 0 | N/A | 240 PIN | LAN_WRH | 536871040 | 0 | N/A | 237 PIN | LAN_WRL | 536871040 | 0 | N/A | 145 PIN | SLAVE | 536871040 | 0 | N/A | 193 PIN | LAN_RD | 536871040 | 0 | N/A | 242 PIN | INT_OUT | 536871040 | 0 | N/A | 60 PIN | DTACK | 536871040 | 0 | N/A | 160 PIN | CFOUT | 536871040 | 0 | N/A | 191 PIN | OWN | 536871040 | 0 | N/A | 195 PIN | OVR | 536871040 | 0 | N/A | 185 PIN | MTACK | 536871040 | 0 | N/A | 174 PIN | LAN_CFG<4> | 536871040 | 0 | N/A | 199 PIN | LAN_CFG<3> | 536871040 | 0 | N/A | 24 PIN | LAN_CFG<2> | 536871040 | 0 | N/A | 251 PIN | LAN_CFG<1> | 536871040 | 0 | N/A | 23 PIN | ROM_OE | 536871040 | 0 | N/A | 65 PIN | ROM_B<1> | 536871040 | 0 | N/A | 129 PIN | ROM_B<0> | 536871040 | 0 | N/A | 127 PIN | CP_RD | 536871040 | 0 | N/A | 132 PIN | CP_CS | 536871040 | 0 | N/A | 63 PIN | IDE_W | 536871040 | 0 | N/A | 47 PIN | IDE_R | 536871040 | 0 | N/A | 46 PIN | IDE_CS<1> | 536871040 | 0 | N/A | 41 PIN | IDE_CS<0> | 536871040 | 0 | N/A | 39 PIN | IDE_A<2> | 536871040 | 0 | N/A | 44 PIN | IDE_A<1> | 536871040 | 0 | N/A | 45 PIN | IDE_A<0> | 536871040 | 0 | N/A | 43 PIN | CP_WE | 536871040 | 0 | N/A | 131 PIN | A<8> | 536870976 | 0 | N/A | 106 | 5 | 5 | 11 | 15 | 14 | 12 | 10 | 12 | 12 | 15 | 17 PIN | A<18> | 536870976 | 0 | N/A | 171 | 6 | 11 | 17 | 5 | 17 | 10 | 11 | 10 | 1 | 10 | 13 | 10 | 17 PIN | A<19> | 536870976 | 0 | N/A | 169 | 6 | 11 | 17 | 10 | 14 | 12 | 4 | 5 | 16 | 10 | 16 | 12 | 6 PIN | A<20> | 536870976 | 0 | N/A | 167 | 6 | 11 | 17 | 5 | 1 | 14 | 4 | 14 | 1 | 14 | 3 | 14 | 17 PIN | A<21> | 536870976 | 0 | N/A | 163 | 6 | 11 | 17 | 14 | 9 | 5 | 0 | 14 | 7 | 14 | 8 | 14 | 11 PIN | A<22> | 536870976 | 0 | N/A | 162 | 7 | 7 | 14 | 7 | 1 | 11 | 17 | 8 | 9 | 8 | 7 | 8 | 0 | 8 | 1 PIN | A<23> | 536870976 | 0 | N/A | 161 | 7 | 11 | 17 | 8 | 14 | 8 | 2 | 5 | 0 | 5 | 17 | 8 | 4 | 8 | 13 PIN | A<9> | 536870976 | 0 | N/A | 108 | 5 | 5 | 10 | 12 | 14 | 12 | 1 | 12 | 16 | 12 | 17 PIN | A<10> | 536870976 | 0 | N/A | 112 | 5 | 5 | 8 | 10 | 11 | 10 | 1 | 10 | 13 | 10 | 17 PIN | A<11> | 536870976 | 0 | N/A | 114 | 5 | 10 | 14 | 12 | 4 | 5 | 6 | 10 | 16 | 12 | 6 PIN | A<12> | 536870976 | 0 | N/A | 115 | 5 | 7 | 10 | 14 | 4 | 14 | 1 | 14 | 6 | 14 | 17 PIN | A<13> | 536870976 | 0 | N/A | 123 | 6 | 7 | 16 | 14 | 9 | 7 | 8 | 14 | 7 | 14 | 8 | 14 | 11 PIN | A<14> | 536870976 | 0 | N/A | 125 | 6 | 7 | 16 | 8 | 9 | 8 | 7 | 7 | 6 | 8 | 0 | 8 | 1 PIN | A<15> | 536870976 | 0 | N/A | 139 | 5 | 7 | 3 | 8 | 14 | 8 | 2 | 8 | 4 | 8 | 16 PIN | A<16> | 536870976 | 0 | N/A | 175 | 6 | 11 | 17 | 15 | 14 | 12 | 10 | 5 | 1 | 12 | 12 | 15 | 16 PIN | A<17> | 536870976 | 0 | N/A | 172 | 6 | 11 | 17 | 5 | 0 | 12 | 14 | 12 | 1 | 12 | 16 | 12 | 17 PIN | DQ<10> | 536870976 | 0 | N/A | 234 | 4 | 15 | 5 | 15 | 4 | 15 | 12 | 8 | 17 PIN | DQ<11> | 536870976 | 0 | N/A | 207 | 4 | 15 | 2 | 10 | 2 | 15 | 11 | 15 | 3 PIN | DQ<1> | 536870976 | 0 | N/A | 216 | 4 | 8 | 13 | 15 | 7 | 15 | 13 | 15 | 6 PIN | DQ<4> | 536870976 | 0 | N/A | 225 | 4 | 15 | 1 | 10 | 4 | 15 | 17 | 15 | 0 PIN | DQ<8> | 536870976 | 0 | N/A | 231 | 4 | 8 | 10 | 15 | 10 | 15 | 13 | 15 | 8 PIN | DQ<9> | 536870976 | 0 | N/A | 209 | 4 | 8 | 12 | 15 | 7 | 15 | 13 | 15 | 6 PIN | D<0> | 536870976 | 0 | N/A | 4 | 5 | 1 | 0 | 12 | 12 | 12 | 10 | 1 | 1 | 15 | 16 PIN | D<10> | 536870976 | 0 | N/A | 74 | 8 | 1 | 15 | 7 | 13 | 7 | 0 | 11 | 17 | 1 | 16 | 10 | 11 | 1 | 14 | 10 | 17 PIN | D<11> | 536870976 | 0 | N/A | 77 | 9 | 1 | 3 | 7 | 16 | 7 | 11 | 11 | 17 | 10 | 14 | 12 | 4 | 1 | 2 | 7 | 0 | 12 | 6 PIN | D<12> | 536870976 | 0 | N/A | 78 | 7 | 1 | 6 | 7 | 15 | 1 | 7 | 11 | 17 | 7 | 13 | 14 | 4 | 14 | 17 PIN | D<13> | 536870976 | 0 | N/A | 80 | 10 | 4 | 3 | 7 | 15 | 7 | 1 | 11 | 17 | 14 | 9 | 7 | 14 | 4 | 2 | 4 | 4 | 14 | 7 | 14 | 8 PIN | D<14> | 536870976 | 0 | N/A | 81 | 8 | 4 | 6 | 11 | 17 | 8 | 9 | 8 | 7 | 4 | 5 | 5 | 17 | 8 | 0 | 8 | 1 PIN | D<15> | 536870976 | 0 | N/A | 89 | 10 | 4 | 7 | 9 | 8 | 7 | 13 | 7 | 11 | 11 | 17 | 8 | 14 | 8 | 2 | 4 | 8 | 7 | 0 | 8 | 4 PIN | D<1> | 536870976 | 0 | N/A | 30 | 5 | 3 | 14 | 3 | 13 | 12 | 14 | 12 | 16 | 12 | 17 PIN | D<2> | 536870976 | 0 | N/A | 71 | 5 | 3 | 12 | 3 | 11 | 10 | 1 | 10 | 13 | 10 | 17 PIN | D<3> | 536870976 | 0 | N/A | 28 | 5 | 3 | 8 | 3 | 9 | 10 | 16 | 3 | 7 | 12 | 6 PIN | D<4> | 536870976 | 0 | N/A | 38 | 6 | 3 | 9 | 3 | 10 | 14 | 4 | 14 | 1 | 14 | 6 | 14 | 17 PIN | D<5> | 536870976 | 0 | N/A | 37 | 4 | 3 | 6 | 14 | 8 | 3 | 5 | 14 | 11 PIN | D<6> | 536870976 | 0 | N/A | 26 | 4 | 3 | 3 | 8 | 9 | 8 | 1 | 3 | 4 PIN | D<7> | 536870976 | 0 | N/A | 29 | 5 | 6 | 12 | 8 | 14 | 6 | 13 | 8 | 4 | 8 | 16 PIN | D<8> | 536870976 | 0 | N/A | 32 | 9 | 6 | 10 | 7 | 15 | 7 | 10 | 11 | 17 | 12 | 12 | 7 | 14 | 6 | 8 | 6 | 9 | 15 | 16 PIN | D<9> | 536870976 | 0 | N/A | 73 | 8 | 6 | 8 | 7 | 16 | 7 | 11 | 11 | 17 | 6 | 7 | 12 | 1 | 6 | 6 | 12 | 16 PIN | DQ<0> | 536870976 | 0 | N/A | 217 | 4 | 8 | 10 | 15 | 10 | 15 | 14 | 15 | 8 PIN | DQ<12> | 536870976 | 0 | N/A | 235 | 4 | 15 | 1 | 10 | 4 | 15 | 17 | 15 | 0 PIN | DQ<13> | 536870976 | 0 | N/A | 204 | 4 | 14 | 16 | 10 | 9 | 10 | 8 | 10 | 6 PIN | DQ<14> | 536870976 | 0 | N/A | 236 | 4 | 14 | 14 | 10 | 10 | 10 | 7 | 10 | 5 PIN | DQ<15> | 536870976 | 0 | N/A | 202 | 4 | 14 | 13 | 12 | 7 | 14 | 12 | 14 | 3 PIN | DQ<2> | 536870976 | 0 | N/A | 220 | 4 | 15 | 5 | 15 | 4 | 15 | 12 | 8 | 17 PIN | DQ<3> | 536870976 | 0 | N/A | 219 | 4 | 15 | 2 | 10 | 2 | 15 | 11 | 15 | 3 PIN | DQ<5> | 536870976 | 0 | N/A | 221 | 4 | 14 | 16 | 10 | 9 | 10 | 8 | 10 | 6 PIN | DQ<6> | 536870976 | 0 | N/A | 227 | 4 | 14 | 14 | 10 | 10 | 10 | 7 | 10 | 5 PIN | DQ<7> | 536870976 | 0 | N/A | 226 | 4 | 14 | 13 | 12 | 7 | 14 | 12 | 14 | 3