MDF Database: version 1.0 MDF_INFO | LAN_IDE_CP | XC95288XL-10-TQ144 MACROCELL | 8 | 10 | Z3_DATA<0> ATTRIBUTES | 8685506 | 0 OUTPUTMC | 1 | 8 | 11 INPUTS | 21 | LAN_BASEADR<0> | LAN_BASEADR<1> | LAN_BASEADR<2> | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 | A<17>.PIN | A<16>.PIN | A<13>.PIN | A<14>.PIN | A<18>.PIN | Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D | $OpTx$FX_DC$81 | $OpTx$FX_DC$82 | $OpTx$FX_DC$83 | $OpTx$FX_DC$84 | $OpTx$INV$62 | $OpTx$INV$61 | IDE_ENABLE.EXP INPUTMC | 14 | 7 | 14 | 0 | 10 | 0 | 8 | 11 | 5 | 8 | 1 | 14 | 17 | 2 | 5 | 8 | 4 | 8 | 15 | 2 | 10 | 2 | 9 | 2 | 15 | 2 | 16 | 8 | 9 INPUTP | 7 | 158 | 147 | 172 | 175 | 123 | 125 | 171 EXPORTS | 1 | 8 | 11 IMPORTS | 1 | 8 | 9 EQ | 15 | A<8>.D = ;Imported pterms FB9_10 DQ_SWAP & DQ<8>.PIN # !DQ_SWAP & DQ<0>.PIN; A<8>.CLK = CLK_EXT; // GCK A<8>.AP = LAN_SM_RST; A<8>.OE = RW & !FCS & LAN_ACCESS; A<8>.CE = LAN_SM_FSM_FFd5; Z3_DATA<0>.EXP = LAN_BASEADR<0> & LAN_BASEADR<1> & !LAN_BASEADR<2> & A<17>.PIN & A<16>.PIN & A<13>.PIN & A<14>.PIN & !A<18>.PIN & !Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D & !$OpTx$FX_DC$81 & !$OpTx$FX_DC$82 & !$OpTx$FX_DC$83 & !$OpTx$FX_DC$84 & !$OpTx$INV$62 & !$OpTx$INV$61 # !LAN_BASEADR<0> & !LAN_BASEADR<1> & LAN_BASEADR<2> & !A<17>.PIN & !A<16>.PIN & A<13>.PIN & A<14>.PIN & A<18>.PIN & !Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D & !$OpTx$FX_DC$81 & !$OpTx$FX_DC$82 & !$OpTx$FX_DC$83 & !$OpTx$FX_DC$84 & !$OpTx$INV$62 & !$OpTx$INV$61 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 5 | Z3_DATA<10> ATTRIBUTES | 8685506 | 0 INPUTS | 8 | DQ_SWAP | DQ<10>.PIN | DQ<2>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 INPUTMC | 4 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 INPUTP | 4 | 234 | 220 | 158 | 147 EQ | 6 | A<18>.D = DQ_SWAP & DQ<2>.PIN # !DQ_SWAP & DQ<10>.PIN; A<18>.CLK = CLK_EXT; // GCK A<18>.AP = LAN_SM_RST; A<18>.OE = RW & !FCS & LAN_ACCESS; A<18>.CE = LAN_SM_FSM_FFd5; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 2 | Z3_DATA<11> ATTRIBUTES | 8685506 | 0 INPUTS | 8 | DQ_SWAP | DQ<11>.PIN | DQ<3>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 INPUTMC | 4 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 INPUTP | 4 | 207 | 219 | 158 | 147 EQ | 6 | A<19>.D = DQ_SWAP & DQ<3>.PIN # !DQ_SWAP & DQ<11>.PIN; A<19>.CLK = CLK_EXT; // GCK A<19>.AP = LAN_SM_RST; A<19>.OE = RW & !FCS & LAN_ACCESS; A<19>.CE = LAN_SM_FSM_FFd5; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 1 | Z3_DATA<12> ATTRIBUTES | 8685506 | 0 INPUTS | 8 | DQ_SWAP | DQ<12>.PIN | DQ<4>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 INPUTMC | 4 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 INPUTP | 4 | 235 | 225 | 158 | 147 EQ | 6 | A<20>.D = DQ_SWAP & DQ<4>.PIN # !DQ_SWAP & DQ<12>.PIN; A<20>.CLK = CLK_EXT; // GCK A<20>.AP = LAN_SM_RST; A<20>.OE = RW & !FCS & LAN_ACCESS; A<20>.CE = LAN_SM_FSM_FFd5; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 16 | Z3_DATA<13> ATTRIBUTES | 8685506 | 0 INPUTS | 8 | DQ_SWAP | DQ<13>.PIN | DQ<5>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 INPUTMC | 4 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 INPUTP | 4 | 204 | 221 | 158 | 147 EQ | 6 | A<21>.D = DQ_SWAP & DQ<5>.PIN # !DQ_SWAP & DQ<13>.PIN; A<21>.CLK = CLK_EXT; // GCK A<21>.AP = LAN_SM_RST; A<21>.OE = RW & !FCS & LAN_ACCESS; A<21>.CE = LAN_SM_FSM_FFd5; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 14 | Z3_DATA<14> ATTRIBUTES | 8685506 | 0 OUTPUTMC | 1 | 14 | 13 INPUTS | 9 | DQ_SWAP | DQ<14>.PIN | DQ<7>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 | LAN_INT_ENABLE.EXP INPUTMC | 5 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 | 14 | 15 INPUTP | 4 | 236 | 226 | 158 | 147 EXPORTS | 1 | 14 | 13 IMPORTS | 1 | 14 | 15 EQ | 8 | A<22>.D = !DQ_SWAP & DQ<14>.PIN ;Imported pterms FB15_16 # DQ_SWAP & DQ<6>.PIN; A<22>.CLK = CLK_EXT; // GCK A<22>.AP = LAN_SM_RST; A<22>.OE = RW & !FCS & LAN_ACCESS; A<22>.CE = LAN_SM_FSM_FFd5; Z3_DATA<14>.EXP = DQ_SWAP & DQ<7>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 13 | Z3_DATA<15> ATTRIBUTES | 8685506 | 0 OUTPUTMC | 1 | 14 | 12 INPUTS | 12 | DQ_SWAP | DQ<15>.PIN | UDS | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 | LDS | A<15>.PIN | LAN_SM_FSM_FFd13 | Z3_DATA<14>.EXP INPUTMC | 6 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 | 8 | 8 | 14 | 14 INPUTP | 6 | 202 | 155 | 158 | 147 | 157 | 139 EXPORTS | 1 | 14 | 12 IMPORTS | 1 | 14 | 14 EQ | 9 | A<23>.D = !DQ_SWAP & DQ<15>.PIN ;Imported pterms FB15_15 # DQ_SWAP & DQ<7>.PIN; A<23>.CLK = CLK_EXT; // GCK A<23>.AP = LAN_SM_RST; A<23>.OE = RW & !FCS & LAN_ACCESS; A<23>.CE = LAN_SM_FSM_FFd5; Z3_DATA<15>.EXP = UDS & LDS & !DQ_SWAP & A<15>.PIN & LAN_SM_FSM_FFd13 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 13 | Z3_DATA<1> ATTRIBUTES | 8685506 | 0 INPUTS | 8 | DQ_SWAP | DQ<1>.PIN | DQ<9>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 INPUTMC | 4 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 INPUTP | 4 | 216 | 209 | 158 | 147 EQ | 6 | A<9>.D = DQ_SWAP & DQ<9>.PIN # !DQ_SWAP & DQ<1>.PIN; A<9>.CLK = CLK_EXT; // GCK A<9>.AP = LAN_SM_RST; A<9>.OE = RW & !FCS & LAN_ACCESS; A<9>.CE = LAN_SM_FSM_FFd5; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 16 | Z3_DATA<2> ATTRIBUTES | 8685506 | 0 INPUTS | 8 | DQ_SWAP | DQ<10>.PIN | DQ<2>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 INPUTMC | 4 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 INPUTP | 4 | 234 | 220 | 158 | 147 EQ | 6 | A<10>.D = DQ_SWAP & DQ<10>.PIN # !DQ_SWAP & DQ<2>.PIN; A<10>.CLK = CLK_EXT; // GCK A<10>.AP = LAN_SM_RST; A<10>.OE = RW & !FCS & LAN_ACCESS; A<10>.CE = LAN_SM_FSM_FFd5; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 2 | Z3_DATA<3> ATTRIBUTES | 8685506 | 0 INPUTS | 8 | DQ_SWAP | DQ<11>.PIN | DQ<3>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 INPUTMC | 4 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 INPUTP | 4 | 207 | 219 | 158 | 147 EQ | 6 | A<11>.D = DQ_SWAP & DQ<11>.PIN # !DQ_SWAP & DQ<3>.PIN; A<11>.CLK = CLK_EXT; // GCK A<11>.AP = LAN_SM_RST; A<11>.OE = RW & !FCS & LAN_ACCESS; A<11>.CE = LAN_SM_FSM_FFd5; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 4 | Z3_DATA<4> ATTRIBUTES | 8685506 | 0 INPUTS | 8 | DQ_SWAP | DQ<12>.PIN | DQ<4>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 INPUTMC | 4 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 INPUTP | 4 | 235 | 225 | 158 | 147 EQ | 6 | A<12>.D = DQ_SWAP & DQ<12>.PIN # !DQ_SWAP & DQ<4>.PIN; A<12>.CLK = CLK_EXT; // GCK A<12>.AP = LAN_SM_RST; A<12>.OE = RW & !FCS & LAN_ACCESS; A<12>.CE = LAN_SM_FSM_FFd5; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 9 | Z3_DATA<5> ATTRIBUTES | 8685506 | 0 INPUTS | 8 | DQ_SWAP | DQ<13>.PIN | DQ<5>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 INPUTMC | 4 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 INPUTP | 4 | 204 | 221 | 158 | 147 EQ | 6 | A<13>.D = DQ_SWAP & DQ<13>.PIN # !DQ_SWAP & DQ<5>.PIN; A<13>.CLK = CLK_EXT; // GCK A<13>.AP = LAN_SM_RST; A<13>.OE = RW & !FCS & LAN_ACCESS; A<13>.CE = LAN_SM_FSM_FFd5; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 10 | Z3_DATA<6> ATTRIBUTES | 8685506 | 0 INPUTS | 8 | DQ_SWAP | DQ<14>.PIN | DQ<6>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 INPUTMC | 4 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 INPUTP | 4 | 236 | 227 | 158 | 147 EQ | 6 | A<14>.D = DQ_SWAP & DQ<14>.PIN # !DQ_SWAP & DQ<6>.PIN; A<14>.CLK = CLK_EXT; // GCK A<14>.AP = LAN_SM_RST; A<14>.OE = RW & !FCS & LAN_ACCESS; A<14>.CE = LAN_SM_FSM_FFd5; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 7 | Z3_DATA<7> ATTRIBUTES | 8685506 | 0 INPUTS | 8 | DQ_SWAP | DQ<15>.PIN | DQ<7>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 INPUTMC | 4 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 INPUTP | 4 | 202 | 226 | 158 | 147 EQ | 6 | A<15>.D = DQ_SWAP & DQ<15>.PIN # !DQ_SWAP & DQ<7>.PIN; A<15>.CLK = CLK_EXT; // GCK A<15>.AP = LAN_SM_RST; A<15>.OE = RW & !FCS & LAN_ACCESS; A<15>.CE = LAN_SM_FSM_FFd5; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 10 | Z3_DATA<8> ATTRIBUTES | 8685506 | 0 INPUTS | 8 | DQ_SWAP | DQ<0>.PIN | DQ<8>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 INPUTMC | 4 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 INPUTP | 4 | 217 | 231 | 158 | 147 EQ | 6 | A<16>.D = DQ_SWAP & DQ<0>.PIN # !DQ_SWAP & DQ<8>.PIN; A<16>.CLK = CLK_EXT; // GCK A<16>.AP = LAN_SM_RST; A<16>.OE = RW & !FCS & LAN_ACCESS; A<16>.CE = LAN_SM_FSM_FFd5; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 7 | Z3_DATA<9> ATTRIBUTES | 8685506 | 0 INPUTS | 8 | DQ_SWAP | DQ<1>.PIN | DQ<9>.PIN | LAN_SM_RST | RW | FCS | LAN_ACCESS | LAN_SM_FSM_FFd5 INPUTMC | 4 | 8 | 11 | 11 | 5 | 8 | 1 | 14 | 17 INPUTP | 4 | 216 | 209 | 158 | 147 EQ | 6 | A<17>.D = DQ_SWAP & DQ<1>.PIN # !DQ_SWAP & DQ<9>.PIN; A<17>.CLK = CLK_EXT; // GCK A<17>.AP = LAN_SM_RST; A<17>.OE = RW & !FCS & LAN_ACCESS; A<17>.CE = LAN_SM_FSM_FFd5; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 17 | AUTO_CONFIG_Z2_DONE<0> ATTRIBUTES | 8520560 | 0 OUTPUTMC | 56 | 13 | 17 | 6 | 9 | 6 | 3 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 1 | 11 | 3 | 2 | 7 | 14 | 0 | 10 | 0 | 8 | 7 | 10 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 4 | 0 | 6 | 0 | 7 | 17 | 3 | 0 | 6 | 4 | 6 | 11 | 6 | 14 | 13 | 0 | 13 | 10 | 0 | 4 | 0 | 9 | 0 | 11 | 0 | 17 | 1 | 4 | 1 | 5 | 1 | 7 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 3 | 13 | 6 | 8 | 6 | 17 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 16 INPUTS | 5 | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE_CYCLE<0> | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | AS INPUTMC | 3 | 13 | 17 | 6 | 9 | 2 | 4 INPUTP | 2 | 263 | 152 EQ | 5 | !AUTO_CONFIG_Z2_DONE<0>.D = !AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE_CYCLE<0>; AUTO_CONFIG_Z2_DONE<0>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; AUTO_CONFIG_Z2_DONE<0>.AR = !RESET; AUTO_CONFIG_Z2_DONE<0>.CE = AS; MACROCELL | 13 | 3 | AUTO_CONFIG_Z2_DONE<1> ATTRIBUTES | 8520560 | 0 OUTPUTMC | 54 | 13 | 3 | 6 | 3 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 1 | 11 | 3 | 2 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 7 | 5 | 0 | 1 | 4 | 0 | 7 | 17 | 3 | 0 | 6 | 4 | 6 | 11 | 6 | 14 | 13 | 0 | 13 | 10 | 0 | 2 | 0 | 13 | 0 | 14 | 0 | 16 | 1 | 4 | 1 | 5 | 1 | 7 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 3 | 13 | 6 | 8 | 6 | 17 | 7 | 4 | 7 | 10 | 7 | 14 | 7 | 16 INPUTS | 5 | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE_CYCLE<1> | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | AS INPUTMC | 3 | 13 | 3 | 6 | 3 | 2 | 4 INPUTP | 2 | 263 | 152 EQ | 5 | !AUTO_CONFIG_Z2_DONE<1>.D = !AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE_CYCLE<1>; AUTO_CONFIG_Z2_DONE<1>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; AUTO_CONFIG_Z2_DONE<1>.AR = !RESET; AUTO_CONFIG_Z2_DONE<1>.CE = AS; MACROCELL | 4 | 5 | AUTO_CONFIG_Z2_DONE<2> ATTRIBUTES | 8520560 | 0 OUTPUTMC | 20 | 4 | 5 | 4 | 6 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 1 | 11 | 3 | 2 | 4 | 0 | 3 | 0 | 13 | 10 | 1 | 4 | 1 | 5 | 1 | 7 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 7 INPUTS | 5 | AUTO_CONFIG_Z2_DONE<2> | AUTO_CONFIG_Z2_DONE_CYCLE<2> | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | AS INPUTMC | 3 | 4 | 5 | 4 | 6 | 2 | 4 INPUTP | 2 | 263 | 152 EQ | 5 | !AUTO_CONFIG_Z2_DONE<2>.D = !AUTO_CONFIG_Z2_DONE<2> & !AUTO_CONFIG_Z2_DONE_CYCLE<2>; AUTO_CONFIG_Z2_DONE<2>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; AUTO_CONFIG_Z2_DONE<2>.AR = !RESET; AUTO_CONFIG_Z2_DONE<2>.CE = AS; MACROCELL | 6 | 9 | AUTO_CONFIG_Z2_DONE_CYCLE<0> ATTRIBUTES | 4326192 | 0 OUTPUTMC | 3 | 13 | 17 | 6 | 9 | 6 | 10 INPUTS | 16 | A<5> | A<4> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE_CYCLE<0> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | FCS | D_Z2_OUT<3> INPUTMC | 5 | 13 | 17 | 6 | 9 | 4 | 0 | 2 | 4 | 13 | 1 INPUTP | 11 | 91 | 97 | 107 | 152 | 155 | 98 | 99 | 158 | 157 | 263 | 147 EXPORTS | 1 | 6 | 10 EQ | 10 | AUTO_CONFIG_Z2_DONE_CYCLE<0>.T = !A<5> & !A<4> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE_CYCLE<0> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE_CYCLE<0> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; AUTO_CONFIG_Z2_DONE_CYCLE<0>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; AUTO_CONFIG_Z2_DONE_CYCLE<0>.AR = !RESET; AUTO_CONFIG_Z2_DONE_CYCLE<0>.EXP = !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<3> MACROCELL | 6 | 3 | AUTO_CONFIG_Z2_DONE_CYCLE<1> ATTRIBUTES | 4326192 | 0 OUTPUTMC | 4 | 13 | 3 | 6 | 3 | 6 | 4 | 6 | 2 INPUTS | 18 | A<5> | A<4> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE_CYCLE<1> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | FCS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | D_Z2_OUT<1> | LAN_ACCESS | D_14_IOBUFE.EXP INPUTMC | 8 | 13 | 17 | 13 | 3 | 6 | 3 | 4 | 0 | 2 | 4 | 6 | 13 | 8 | 1 | 6 | 4 INPUTP | 10 | 91 | 97 | 107 | 152 | 155 | 98 | 99 | 158 | 147 | 263 EXPORTS | 1 | 6 | 2 IMPORTS | 1 | 6 | 4 EQ | 13 | AUTO_CONFIG_Z2_DONE_CYCLE<1>.T = !A<5> & !A<4> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE_CYCLE<1> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB7_5 # !A<5> & !A<4> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE_CYCLE<1> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; AUTO_CONFIG_Z2_DONE_CYCLE<1>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; AUTO_CONFIG_Z2_DONE_CYCLE<1>.AR = !RESET; AUTO_CONFIG_Z2_DONE_CYCLE<1>.EXP = !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<1> # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & D_Z2_OUT<1> MACROCELL | 4 | 6 | AUTO_CONFIG_Z2_DONE_CYCLE<2> ATTRIBUTES | 4326192 | 0 OUTPUTMC | 2 | 4 | 5 | 4 | 6 INPUTS | 16 | A<5> | A<4> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | AUTO_CONFIG_Z2_DONE_CYCLE<2> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET INPUTMC | 6 | 13 | 17 | 13 | 3 | 4 | 5 | 4 | 6 | 4 | 0 | 2 | 4 INPUTP | 10 | 91 | 97 | 107 | 152 | 155 | 98 | 99 | 158 | 157 | 263 EQ | 8 | AUTO_CONFIG_Z2_DONE_CYCLE<2>.T = !A<5> & !A<4> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !AUTO_CONFIG_Z2_DONE_CYCLE<2> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !AUTO_CONFIG_Z2_DONE_CYCLE<2> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; AUTO_CONFIG_Z2_DONE_CYCLE<2>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; AUTO_CONFIG_Z2_DONE_CYCLE<2>.AR = !RESET; MACROCELL | 3 | 17 | CP_BASEADR<0> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 3 | 3 | 17 | 3 | 0 | 4 | 2 INPUTS | 18 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<8>.PIN | CP_BASEADR<0> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | SHUT_UP_Z2<2>.EXP INPUTMC | 6 | 13 | 17 | 13 | 3 | 3 | 17 | 4 | 0 | 2 | 4 | 3 | 0 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 32 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 3 | 0 EQ | 15 | CP_BASEADR<0>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<8>.PIN & !CP_BASEADR<0> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<8>.PIN & CP_BASEADR<0> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<8>.PIN & CP_BASEADR<0> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB4_1 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<8>.PIN & !CP_BASEADR<0> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<0>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; CP_BASEADR<0>.AP = !RESET; MACROCELL | 3 | 16 | CP_BASEADR<1> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 3 | 3 | 16 | 3 | 15 | 4 | 3 INPUTS | 18 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<9>.PIN | CP_BASEADR<1> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | CP_BASEADR<2>.EXP INPUTMC | 6 | 13 | 17 | 13 | 3 | 3 | 16 | 4 | 0 | 2 | 4 | 3 | 15 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 73 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 3 | 15 EQ | 15 | CP_BASEADR<1>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<9>.PIN & !CP_BASEADR<1> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<9>.PIN & CP_BASEADR<1> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<9>.PIN & CP_BASEADR<1> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB4_16 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<9>.PIN & !CP_BASEADR<1> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<1>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; CP_BASEADR<1>.AP = !RESET; MACROCELL | 3 | 15 | CP_BASEADR<2> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 5 | 3 | 15 | 3 | 14 | 4 | 2 | 4 | 3 | 3 | 16 INPUTS | 20 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<10>.PIN | CP_BASEADR<2> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | D<9>.PIN | CP_BASEADR<1> | CP_BASEADR<4>.EXP INPUTMC | 7 | 13 | 17 | 13 | 3 | 3 | 15 | 4 | 0 | 2 | 4 | 3 | 16 | 3 | 14 INPUTP | 13 | 91 | 97 | 101 | 107 | 152 | 74 | 155 | 98 | 99 | 158 | 157 | 263 | 73 EXPORTS | 1 | 3 | 16 IMPORTS | 1 | 3 | 14 EQ | 18 | CP_BASEADR<2>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<10>.PIN & CP_BASEADR<2> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<10>.PIN & CP_BASEADR<2> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB4_15 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !CP_BASEADR<2> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !CP_BASEADR<2> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<2>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; CP_BASEADR<2>.AP = !RESET; CP_BASEADR<2>.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<9>.PIN & !CP_BASEADR<1> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 7 | 15 | CP_BASEADR<3> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 7 | 15 | 4 | 4 | 7 | 16 | 7 | 14 INPUTS | 20 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<11>.PIN | CP_BASEADR<3> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | D<8>.PIN | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | LAN_BASEADR<0> | LDS | EXP41_.EXP INPUTMC | 7 | 13 | 17 | 13 | 3 | 7 | 15 | 4 | 0 | 2 | 4 | 7 | 14 | 7 | 16 INPUTP | 13 | 91 | 97 | 101 | 107 | 152 | 77 | 155 | 98 | 99 | 158 | 32 | 263 | 157 EXPORTS | 1 | 7 | 14 IMPORTS | 1 | 7 | 16 EQ | 21 | CP_BASEADR<3>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<11>.PIN & CP_BASEADR<3> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB8_17 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<11>.PIN & !CP_BASEADR<3> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<11>.PIN & !CP_BASEADR<3> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<11>.PIN & CP_BASEADR<3> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<3>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; CP_BASEADR<3>.AP = !RESET; CP_BASEADR<3>.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<8>.PIN & !LAN_BASEADR<0> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<8>.PIN & !LAN_BASEADR<0> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 3 | 14 | CP_BASEADR<4> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 3 | 14 | 3 | 13 | 4 | 3 | 3 | 15 INPUTS | 20 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<12>.PIN | CP_BASEADR<4> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | D<10>.PIN | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | CP_BASEADR<2> | LDS | A_LAN_5_OBUF.EXP INPUTMC | 7 | 13 | 17 | 13 | 3 | 3 | 14 | 4 | 0 | 2 | 4 | 3 | 15 | 3 | 13 INPUTP | 13 | 91 | 97 | 101 | 107 | 152 | 78 | 155 | 98 | 99 | 158 | 74 | 263 | 157 EXPORTS | 1 | 3 | 15 IMPORTS | 1 | 3 | 13 EQ | 21 | CP_BASEADR<4>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<12>.PIN & CP_BASEADR<4> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB4_14 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<12>.PIN & !CP_BASEADR<4> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<12>.PIN & !CP_BASEADR<4> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<12>.PIN & CP_BASEADR<4> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<4>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; CP_BASEADR<4>.AP = !RESET; CP_BASEADR<4>.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !CP_BASEADR<2> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !CP_BASEADR<2> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 3 | 12 | CP_BASEADR<5> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 3 | 3 | 12 | 3 | 11 | 4 | 4 INPUTS | 18 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<13>.PIN | CP_BASEADR<5> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | A_LAN_2_OBUF.EXP INPUTMC | 6 | 13 | 17 | 13 | 3 | 3 | 12 | 4 | 0 | 2 | 4 | 3 | 11 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 80 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 3 | 11 EQ | 15 | CP_BASEADR<5>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<13>.PIN & !CP_BASEADR<5> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<13>.PIN & CP_BASEADR<5> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<13>.PIN & CP_BASEADR<5> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB4_12 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<13>.PIN & !CP_BASEADR<5> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<5>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; CP_BASEADR<5>.AP = !RESET; MACROCELL | 3 | 10 | CP_BASEADR<6> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 3 | 3 | 10 | 4 | 1 | 3 | 9 INPUTS | 18 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<14>.PIN | CP_BASEADR<6> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | CP_BASEADR<7>.EXP INPUTMC | 6 | 13 | 17 | 13 | 3 | 3 | 10 | 4 | 0 | 2 | 4 | 3 | 9 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 81 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 3 | 9 EQ | 15 | CP_BASEADR<6>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<14>.PIN & !CP_BASEADR<6> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<14>.PIN & CP_BASEADR<6> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<14>.PIN & CP_BASEADR<6> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB4_10 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<14>.PIN & !CP_BASEADR<6> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<6>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; CP_BASEADR<6>.AP = !RESET; MACROCELL | 3 | 9 | CP_BASEADR<7> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 3 | 9 | 3 | 8 | 4 | 2 | 3 | 10 INPUTS | 20 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<15>.PIN | CP_BASEADR<7> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | D<14>.PIN | CP_BASEADR<6> | IDE_BASEADR<4>.EXP INPUTMC | 7 | 13 | 17 | 13 | 3 | 3 | 9 | 4 | 0 | 2 | 4 | 3 | 10 | 3 | 8 INPUTP | 13 | 91 | 97 | 101 | 107 | 152 | 89 | 155 | 98 | 99 | 158 | 157 | 263 | 81 EXPORTS | 1 | 3 | 10 IMPORTS | 1 | 3 | 8 EQ | 18 | CP_BASEADR<7>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<15>.PIN & CP_BASEADR<7> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<15>.PIN & CP_BASEADR<7> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB4_9 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<15>.PIN & !CP_BASEADR<7> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<15>.PIN & !CP_BASEADR<7> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; CP_BASEADR<7>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; CP_BASEADR<7>.AP = !RESET; CP_BASEADR<7>.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<14>.PIN & !CP_BASEADR<6> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 1 | 12 | IDE_BASEADR<0> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 1 | 12 | 8 | 5 | 1 | 11 | 1 | 13 INPUTS | 21 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<8>.PIN | IDE_BASEADR<0> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | FCS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | Z3_DATA<23> | LAN_ACCESS | D_3_IOBUFE.EXP INPUTMC | 9 | 13 | 17 | 13 | 3 | 4 | 5 | 1 | 12 | 4 | 0 | 2 | 4 | 15 | 11 | 8 | 1 | 1 | 11 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 32 | 155 | 98 | 99 | 158 | 147 | 263 EXPORTS | 1 | 1 | 13 IMPORTS | 1 | 1 | 11 EQ | 21 | IDE_BASEADR<0>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<8>.PIN & IDE_BASEADR<0> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB2_12 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<8>.PIN & !IDE_BASEADR<0> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<8>.PIN & !IDE_BASEADR<0> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<8>.PIN & IDE_BASEADR<0> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<0>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; IDE_BASEADR<0>.AP = !RESET; IDE_BASEADR<0>.EXP = !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<23> & RW & !FCS & LAN_ACCESS MACROCELL | 1 | 8 | IDE_BASEADR<1> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 1 | 8 | 8 | 5 | 1 | 7 | 1 | 9 INPUTS | 21 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<9>.PIN | IDE_BASEADR<1> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | FCS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | Z3_DATA<22> | LAN_ACCESS | ROM_B_0_OBUF$BUF5.EXP INPUTMC | 9 | 13 | 17 | 13 | 3 | 4 | 5 | 1 | 8 | 4 | 0 | 2 | 4 | 10 | 7 | 8 | 1 | 1 | 7 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 73 | 155 | 98 | 99 | 158 | 147 | 263 EXPORTS | 1 | 1 | 9 IMPORTS | 1 | 1 | 7 EQ | 21 | IDE_BASEADR<1>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<9>.PIN & IDE_BASEADR<1> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB2_8 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<9>.PIN & !IDE_BASEADR<1> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<9>.PIN & !IDE_BASEADR<1> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<9>.PIN & IDE_BASEADR<1> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<1>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; IDE_BASEADR<1>.AP = !RESET; IDE_BASEADR<1>.EXP = !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<22> & RW & !FCS & LAN_ACCESS MACROCELL | 1 | 6 | IDE_BASEADR<2> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 3 | 1 | 6 | 8 | 4 | 1 | 5 INPUTS | 19 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<10>.PIN | IDE_BASEADR<2> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | ROM_B_0_OBUF$BUF7.EXP INPUTMC | 7 | 13 | 17 | 13 | 3 | 4 | 5 | 1 | 6 | 4 | 0 | 2 | 4 | 1 | 5 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 74 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 1 | 5 EQ | 19 | IDE_BASEADR<2>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<10>.PIN & !IDE_BASEADR<2> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<10>.PIN & IDE_BASEADR<2> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<10>.PIN & IDE_BASEADR<2> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB2_6 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<10>.PIN & !IDE_BASEADR<2> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<2>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; IDE_BASEADR<2>.AP = !RESET; MACROCELL | 1 | 3 | IDE_BASEADR<3> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 1 | 3 | 8 | 4 | 1 | 4 | 8 | 6 INPUTS | 19 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<11>.PIN | IDE_BASEADR<3> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | A_LAN_6_OBUF.EXP INPUTMC | 7 | 13 | 17 | 13 | 3 | 4 | 5 | 1 | 3 | 4 | 0 | 2 | 4 | 1 | 4 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 77 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 1 | 4 EQ | 19 | IDE_BASEADR<3>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<11>.PIN & !IDE_BASEADR<3> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<11>.PIN & IDE_BASEADR<3> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<11>.PIN & IDE_BASEADR<3> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB2_5 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<11>.PIN & !IDE_BASEADR<3> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<3>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; IDE_BASEADR<3>.AP = !RESET; MACROCELL | 3 | 8 | IDE_BASEADR<4> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 3 | 8 | 3 | 7 | 8 | 6 | 3 | 9 INPUTS | 21 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<12>.PIN | IDE_BASEADR<4> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | D<15>.PIN | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | CP_BASEADR<7> | LDS | A_LAN_3_OBUF.EXP INPUTMC | 8 | 13 | 17 | 13 | 3 | 4 | 5 | 3 | 8 | 4 | 0 | 2 | 4 | 3 | 9 | 3 | 7 INPUTP | 13 | 91 | 97 | 101 | 107 | 152 | 78 | 155 | 98 | 99 | 158 | 89 | 263 | 157 EXPORTS | 1 | 3 | 9 IMPORTS | 1 | 3 | 7 EQ | 25 | IDE_BASEADR<4>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<12>.PIN & IDE_BASEADR<4> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB4_8 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<12>.PIN & !IDE_BASEADR<4> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<12>.PIN & !IDE_BASEADR<4> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<12>.PIN & IDE_BASEADR<4> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<4>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; IDE_BASEADR<4>.AP = !RESET; IDE_BASEADR<4>.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<15>.PIN & !CP_BASEADR<7> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<15>.PIN & !CP_BASEADR<7> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 3 | 6 | IDE_BASEADR<5> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 3 | 6 | 3 | 5 | 8 | 6 | 3 | 7 INPUTS | 20 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<13>.PIN | IDE_BASEADR<5> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | CP_CS | A_LAN_0_OBUF.EXP INPUTMC | 8 | 13 | 17 | 13 | 3 | 4 | 5 | 3 | 6 | 4 | 0 | 2 | 4 | 4 | 1 | 3 | 5 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 80 | 155 | 98 | 99 | 158 | 157 | 263 EXPORTS | 1 | 3 | 7 IMPORTS | 1 | 3 | 5 EQ | 20 | IDE_BASEADR<5>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<13>.PIN & IDE_BASEADR<5> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<13>.PIN & IDE_BASEADR<5> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB4_6 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<13>.PIN & !IDE_BASEADR<5> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<13>.PIN & !IDE_BASEADR<5> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<5>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; IDE_BASEADR<5>.AP = !RESET; IDE_BASEADR<5>.EXP = RESET & A<3> & !CP_CS MACROCELL | 3 | 3 | IDE_BASEADR<6> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 3 | 13 | 4 | 3 | 4 | 3 | 2 INPUTS | 19 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<15>.PIN | IDE_BASEADR<7> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | A_LAN_1_OBUF.EXP INPUTMC | 7 | 13 | 17 | 13 | 3 | 4 | 5 | 3 | 2 | 4 | 0 | 2 | 4 | 3 | 4 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 89 | 155 | 98 | 99 | 158 | 157 | 263 EXPORTS | 1 | 3 | 2 IMPORTS | 1 | 3 | 4 EQ | 31 | IDE_BASEADR<6>.T = ;Imported pterms FB4_5 !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<14>.PIN & !IDE_BASEADR<6> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<14>.PIN & !IDE_BASEADR<6> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<14>.PIN & IDE_BASEADR<6> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<14>.PIN & IDE_BASEADR<6> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<6>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; IDE_BASEADR<6>.AP = !RESET; IDE_BASEADR<6>.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<15>.PIN & !IDE_BASEADR<7> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<15>.PIN & !IDE_BASEADR<7> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<15>.PIN & IDE_BASEADR<7> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 3 | 2 | IDE_BASEADR<7> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 3 | 2 | 3 | 3 | 8 | 7 | 3 | 1 INPUTS | 21 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<15>.PIN | IDE_BASEADR<7> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | FCS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | Z3_DATA<16> | LAN_ACCESS | IDE_BASEADR<6>.EXP INPUTMC | 9 | 13 | 17 | 13 | 3 | 4 | 5 | 3 | 2 | 4 | 0 | 2 | 4 | 15 | 16 | 8 | 1 | 3 | 3 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 89 | 155 | 98 | 99 | 158 | 147 | 263 EXPORTS | 1 | 3 | 1 IMPORTS | 1 | 3 | 3 EQ | 21 | IDE_BASEADR<7>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<15>.PIN & IDE_BASEADR<7> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB4_4 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<15>.PIN & !IDE_BASEADR<7> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<15>.PIN & !IDE_BASEADR<7> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<15>.PIN & IDE_BASEADR<7> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; IDE_BASEADR<7>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; IDE_BASEADR<7>.AP = !RESET; IDE_BASEADR<7>.EXP = !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<16> & RW & !FCS & LAN_ACCESS MACROCELL | 7 | 14 | LAN_BASEADR<0> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 7 | 7 | 14 | 8 | 11 | 8 | 0 | 7 | 15 | 8 | 10 | 8 | 12 | 7 | 13 INPUTS | 20 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | D<8>.PIN | LAN_BASEADR<0> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | AUTO_CONFIG_Z2_DONE<1> | D<11>.PIN | LAN_BASEADR<11> | CP_BASEADR<3>.EXP INPUTMC | 7 | 13 | 17 | 7 | 14 | 4 | 0 | 2 | 4 | 13 | 3 | 7 | 13 | 7 | 15 INPUTP | 13 | 91 | 97 | 101 | 107 | 152 | 32 | 155 | 98 | 99 | 158 | 157 | 263 | 77 EXPORTS | 1 | 7 | 13 IMPORTS | 1 | 7 | 15 EQ | 18 | LAN_BASEADR<0>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<8>.PIN & LAN_BASEADR<0> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<8>.PIN & LAN_BASEADR<0> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB8_16 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<8>.PIN & !LAN_BASEADR<0> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<8>.PIN & !LAN_BASEADR<0> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<0>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<0>.AP = !RESET; LAN_BASEADR<0>.EXP = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<11>.PIN & !LAN_BASEADR<11> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 0 | 17 | LAN_BASEADR<10> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 0 | 17 | 2 | 15 | 0 | 16 | 0 | 0 INPUTS | 20 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<1> | D<10>.PIN | LAN_BASEADR<10> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | AUTO_CONFIG_Z2_DONE<0> | D<13>.PIN | LAN_BASEADR<5> | IDE_R_OBUF.EXP INPUTMC | 7 | 13 | 3 | 0 | 17 | 4 | 0 | 2 | 4 | 13 | 17 | 0 | 0 | 0 | 16 INPUTP | 13 | 91 | 97 | 101 | 107 | 152 | 74 | 155 | 98 | 99 | 158 | 157 | 263 | 80 EXPORTS | 1 | 0 | 0 IMPORTS | 1 | 0 | 16 EQ | 18 | LAN_BASEADR<10>.T = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<10>.PIN & LAN_BASEADR<10> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<10>.PIN & LAN_BASEADR<10> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB1_17 # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !LAN_BASEADR<10> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !LAN_BASEADR<10> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<10>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<10>.AP = !RESET; LAN_BASEADR<10>.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<13>.PIN & !LAN_BASEADR<5> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 7 | 13 | LAN_BASEADR<11> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 7 | 13 | 2 | 15 | 2 | 17 | 7 | 14 INPUTS | 17 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<1> | D<11>.PIN | LAN_BASEADR<11> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | LAN_BASEADR<0>.EXP INPUTMC | 5 | 13 | 3 | 7 | 13 | 4 | 0 | 2 | 4 | 7 | 14 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 77 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 7 | 14 EQ | 15 | LAN_BASEADR<11>.T = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<11>.PIN & !LAN_BASEADR<11> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<11>.PIN & LAN_BASEADR<11> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<11>.PIN & LAN_BASEADR<11> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB8_15 # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<11>.PIN & !LAN_BASEADR<11> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<11>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<11>.AP = !RESET; MACROCELL | 7 | 12 | LAN_BASEADR<12> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 3 | 7 | 12 | 2 | 17 | 7 | 11 INPUTS | 17 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<1> | D<12>.PIN | LAN_BASEADR<12> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | LAN_BASEADR<14>.EXP INPUTMC | 5 | 13 | 3 | 7 | 12 | 4 | 0 | 2 | 4 | 7 | 11 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 78 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 7 | 11 EQ | 15 | LAN_BASEADR<12>.T = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<12>.PIN & !LAN_BASEADR<12> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<12>.PIN & LAN_BASEADR<12> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<12>.PIN & LAN_BASEADR<12> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB8_12 # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<12>.PIN & !LAN_BASEADR<12> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<12>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<12>.AP = !RESET; MACROCELL | 0 | 15 | LAN_BASEADR<13> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 3 | 0 | 15 | 2 | 14 | 0 | 14 INPUTS | 17 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<1> | D<13>.PIN | LAN_BASEADR<13> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | IDE_A_1_OBUF$BUF0.EXP INPUTMC | 5 | 13 | 3 | 0 | 15 | 4 | 0 | 2 | 4 | 0 | 14 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 80 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 0 | 14 EQ | 15 | LAN_BASEADR<13>.T = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<13>.PIN & !LAN_BASEADR<13> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<13>.PIN & LAN_BASEADR<13> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<13>.PIN & LAN_BASEADR<13> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB1_15 # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<13>.PIN & !LAN_BASEADR<13> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<13>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<13>.AP = !RESET; MACROCELL | 7 | 11 | LAN_BASEADR<14> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 7 | 11 | 2 | 5 | 7 | 10 | 7 | 12 INPUTS | 19 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<1> | D<14>.PIN | LAN_BASEADR<14> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | D<12>.PIN | LAN_BASEADR<12> | LAN_BASEADR<3>.EXP INPUTMC | 6 | 13 | 3 | 7 | 11 | 4 | 0 | 2 | 4 | 7 | 12 | 7 | 10 INPUTP | 13 | 91 | 97 | 101 | 107 | 152 | 81 | 155 | 98 | 99 | 158 | 157 | 263 | 78 EXPORTS | 1 | 7 | 12 IMPORTS | 1 | 7 | 10 EQ | 18 | LAN_BASEADR<14>.T = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<14>.PIN & LAN_BASEADR<14> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<14>.PIN & LAN_BASEADR<14> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB8_11 # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<14>.PIN & !LAN_BASEADR<14> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<14>.PIN & !LAN_BASEADR<14> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<14>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<14>.AP = !RESET; LAN_BASEADR<14>.EXP = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<12>.PIN & !LAN_BASEADR<12> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 0 | 12 | LAN_BASEADR<15> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 3 | 0 | 12 | 0 | 13 | 2 | 17 INPUTS | 17 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<1> | D<15>.PIN | LAN_BASEADR<15> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | IDE_A_2_OBUF$BUF0.EXP INPUTMC | 5 | 13 | 3 | 0 | 12 | 4 | 0 | 2 | 4 | 0 | 13 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 89 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 0 | 13 EQ | 15 | LAN_BASEADR<15>.T = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<15>.PIN & !LAN_BASEADR<15> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<15>.PIN & LAN_BASEADR<15> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<15>.PIN & LAN_BASEADR<15> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB1_14 # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<15>.PIN & !LAN_BASEADR<15> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<15>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<15>.AP = !RESET; MACROCELL | 0 | 10 | LAN_BASEADR<1> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 7 | 0 | 10 | 8 | 11 | 8 | 0 | 0 | 11 | 8 | 2 | 8 | 10 | 8 | 12 INPUTS | 17 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | D<9>.PIN | LAN_BASEADR<1> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | IDE_A_0_OBUF$BUF0.EXP INPUTMC | 5 | 13 | 17 | 0 | 10 | 4 | 0 | 2 | 4 | 0 | 11 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 73 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 0 | 11 EQ | 15 | LAN_BASEADR<1>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<9>.PIN & !LAN_BASEADR<1> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<9>.PIN & LAN_BASEADR<1> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<9>.PIN & LAN_BASEADR<1> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB1_12 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<9>.PIN & !LAN_BASEADR<1> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<1>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<1>.AP = !RESET; MACROCELL | 0 | 8 | LAN_BASEADR<2> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 6 | 0 | 8 | 8 | 11 | 0 | 9 | 8 | 2 | 8 | 10 | 8 | 12 INPUTS | 17 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | D<10>.PIN | LAN_BASEADR<2> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | IDE_CS_1_OBUF.EXP INPUTMC | 5 | 13 | 17 | 0 | 8 | 4 | 0 | 2 | 4 | 0 | 9 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 74 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 0 | 9 EQ | 15 | LAN_BASEADR<2>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<10>.PIN & !LAN_BASEADR<2> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<10>.PIN & LAN_BASEADR<2> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<10>.PIN & LAN_BASEADR<2> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB1_10 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<10>.PIN & !LAN_BASEADR<2> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<2>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<2>.AP = !RESET; MACROCELL | 7 | 10 | LAN_BASEADR<3> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 6 | 7 | 10 | 7 | 9 | 8 | 4 | 8 | 2 | 8 | 17 | 7 | 11 INPUTS | 20 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | D<11>.PIN | LAN_BASEADR<3> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | AUTO_CONFIG_Z2_DONE<1> | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | D<14>.PIN | LAN_BASEADR<14> | LDS | LAN_RD_OBUF.EXP INPUTMC | 7 | 13 | 17 | 7 | 10 | 4 | 0 | 13 | 3 | 2 | 4 | 7 | 11 | 7 | 9 INPUTP | 13 | 91 | 97 | 101 | 107 | 152 | 77 | 155 | 98 | 99 | 158 | 263 | 81 | 157 EXPORTS | 1 | 7 | 11 IMPORTS | 1 | 7 | 9 EQ | 21 | LAN_BASEADR<3>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<11>.PIN & LAN_BASEADR<3> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB8_10 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<11>.PIN & !LAN_BASEADR<3> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<11>.PIN & !LAN_BASEADR<3> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<11>.PIN & LAN_BASEADR<3> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<3>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<3>.AP = !RESET; LAN_BASEADR<3>.EXP = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<14>.PIN & !LAN_BASEADR<14> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<14>.PIN & !LAN_BASEADR<14> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 7 | 8 | LAN_BASEADR<4> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 7 | 8 | 7 | 7 | 8 | 15 | 8 | 17 INPUTS | 17 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | D<12>.PIN | LAN_BASEADR<4> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | LAN_CS_OBUF.EXP INPUTMC | 5 | 13 | 17 | 7 | 8 | 4 | 0 | 2 | 4 | 7 | 7 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 78 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 7 | 7 EQ | 15 | LAN_BASEADR<4>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<12>.PIN & !LAN_BASEADR<4> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<12>.PIN & LAN_BASEADR<4> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<12>.PIN & LAN_BASEADR<4> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB8_8 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<12>.PIN & !LAN_BASEADR<4> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<4>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<4>.AP = !RESET; MACROCELL | 0 | 0 | LAN_BASEADR<5> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 3 | 0 | 0 | 2 | 10 | 0 | 17 INPUTS | 17 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | D<13>.PIN | LAN_BASEADR<5> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | LAN_BASEADR<10>.EXP INPUTMC | 5 | 13 | 17 | 0 | 0 | 4 | 0 | 2 | 4 | 0 | 17 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 80 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 0 | 17 EQ | 15 | LAN_BASEADR<5>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<13>.PIN & !LAN_BASEADR<5> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<13>.PIN & LAN_BASEADR<5> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<13>.PIN & LAN_BASEADR<5> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB1_18 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<13>.PIN & !LAN_BASEADR<5> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<5>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<5>.AP = !RESET; MACROCELL | 7 | 6 | LAN_BASEADR<6> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 7 | 6 | 2 | 15 | 2 | 14 | 7 | 5 INPUTS | 17 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | D<14>.PIN | LAN_BASEADR<6> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | LAN_BASEADR<8>.EXP INPUTMC | 5 | 13 | 17 | 7 | 6 | 4 | 0 | 2 | 4 | 7 | 5 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 81 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 7 | 5 EQ | 15 | LAN_BASEADR<6>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<14>.PIN & !LAN_BASEADR<6> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<14>.PIN & LAN_BASEADR<6> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<14>.PIN & LAN_BASEADR<6> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB8_6 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<14>.PIN & !LAN_BASEADR<6> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<6>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<6>.AP = !RESET; MACROCELL | 0 | 3 | LAN_BASEADR<7> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 3 | 0 | 3 | 2 | 9 | 0 | 4 INPUTS | 17 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | D<15>.PIN | LAN_BASEADR<7> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | D_5_IOBUFE.EXP INPUTMC | 5 | 13 | 17 | 0 | 3 | 4 | 0 | 2 | 4 | 0 | 4 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 89 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 0 | 4 EQ | 15 | LAN_BASEADR<7>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<15>.PIN & !LAN_BASEADR<7> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<15>.PIN & LAN_BASEADR<7> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<15>.PIN & LAN_BASEADR<7> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB1_5 # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<15>.PIN & !LAN_BASEADR<7> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<7>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<7>.AP = !RESET; MACROCELL | 7 | 5 | LAN_BASEADR<8> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 7 | 5 | 2 | 16 | 7 | 4 | 7 | 6 INPUTS | 20 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<1> | D<8>.PIN | LAN_BASEADR<8> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | AUTO_CONFIG_Z2_DONE<0> | D<14>.PIN | LAN_BASEADR<6> | LAN_WRH_OBUF.EXP INPUTMC | 7 | 13 | 3 | 7 | 5 | 4 | 0 | 2 | 4 | 13 | 17 | 7 | 6 | 7 | 4 INPUTP | 13 | 91 | 97 | 101 | 107 | 152 | 32 | 155 | 98 | 99 | 158 | 157 | 263 | 81 EXPORTS | 1 | 7 | 6 IMPORTS | 1 | 7 | 4 EQ | 18 | LAN_BASEADR<8>.T = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<8>.PIN & LAN_BASEADR<8> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<8>.PIN & LAN_BASEADR<8> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB8_5 # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<8>.PIN & !LAN_BASEADR<8> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<8>.PIN & !LAN_BASEADR<8> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<8>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<8>.AP = !RESET; LAN_BASEADR<8>.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<14>.PIN & !LAN_BASEADR<6> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 0 | 1 | LAN_BASEADR<9> ATTRIBUTES | 4326304 | 0 OUTPUTMC | 4 | 0 | 1 | 2 | 16 | 0 | 2 | 2 | 15 INPUTS | 17 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<1> | D<9>.PIN | LAN_BASEADR<9> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | D_10_IOBUFE/D_10_IOBUFE_TRST.EXP INPUTMC | 5 | 13 | 3 | 0 | 1 | 4 | 0 | 2 | 4 | 0 | 2 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 73 | 155 | 98 | 99 | 158 | 157 | 263 IMPORTS | 1 | 0 | 2 EQ | 15 | LAN_BASEADR<9>.T = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<9>.PIN & !LAN_BASEADR<9> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<9>.PIN & LAN_BASEADR<9> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !D<9>.PIN & LAN_BASEADR<9> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB1_3 # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<9>.PIN & !LAN_BASEADR<9> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS; LAN_BASEADR<9>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; LAN_BASEADR<9>.AP = !RESET; MACROCELL | 2 | 0 | LAN_IRQ_OUT ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 2 | 0 | 2 | 13 INPUTS | 4 | LAN_IRQ_OUT | LAN_IRQ_D0 | LAN_INT | RESET INPUTMC | 2 | 2 | 0 | 2 | 7 INPUTP | 2 | 201 | 263 EQ | 4 | LAN_IRQ_OUT.D = LAN_INT # LAN_IRQ_OUT & !LAN_IRQ_D0; LAN_IRQ_OUT.CLK = CLK_EXT; // GCK LAN_IRQ_OUT.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 16 | Z3_DATA<16> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 3 | 2 INPUTS | 5 | DQ_SWAP | DQ<8>.PIN | DQ<0>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 231 | 217 EQ | 5 | Z3_DATA<16>.D = DQ_SWAP & DQ<8>.PIN # !DQ_SWAP & DQ<0>.PIN; Z3_DATA<16>.CLK = CLK_EXT; // GCK Z3_DATA<16>.AP = LAN_SM_RST; Z3_DATA<16>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 6 | Z3_DATA<17> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 15 INPUTS | 5 | DQ_SWAP | DQ<1>.PIN | DQ<9>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 216 | 209 EQ | 5 | Z3_DATA<17>.D = DQ_SWAP & DQ<9>.PIN # !DQ_SWAP & DQ<1>.PIN; Z3_DATA<17>.CLK = CLK_EXT; // GCK Z3_DATA<17>.AP = LAN_SM_RST; Z3_DATA<17>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 8 | Z3_DATA<18> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 4 | 8 INPUTS | 5 | DQ_SWAP | DQ<10>.PIN | DQ<2>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 234 | 220 EQ | 5 | Z3_DATA<18>.D = DQ_SWAP & DQ<10>.PIN # !DQ_SWAP & DQ<2>.PIN; Z3_DATA<18>.CLK = CLK_EXT; // GCK Z3_DATA<18>.AP = LAN_SM_RST; Z3_DATA<18>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 14 | Z3_DATA<19> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 10 INPUTS | 5 | DQ_SWAP | DQ<11>.PIN | DQ<3>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 207 | 219 EQ | 5 | Z3_DATA<19>.D = DQ_SWAP & DQ<11>.PIN # !DQ_SWAP & DQ<3>.PIN; Z3_DATA<19>.CLK = CLK_EXT; // GCK Z3_DATA<19>.AP = LAN_SM_RST; Z3_DATA<19>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 12 | Z3_DATA<20> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 0 | 6 INPUTS | 5 | DQ_SWAP | DQ<12>.PIN | DQ<4>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 235 | 225 EQ | 5 | Z3_DATA<20>.D = DQ_SWAP & DQ<12>.PIN # !DQ_SWAP & DQ<4>.PIN; Z3_DATA<20>.CLK = CLK_EXT; // GCK Z3_DATA<20>.AP = LAN_SM_RST; Z3_DATA<20>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 8 | Z3_DATA<21> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 0 | 5 INPUTS | 5 | DQ_SWAP | DQ<13>.PIN | DQ<5>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 204 | 221 EQ | 5 | Z3_DATA<21>.D = DQ_SWAP & DQ<13>.PIN # !DQ_SWAP & DQ<5>.PIN; Z3_DATA<21>.CLK = CLK_EXT; // GCK Z3_DATA<21>.AP = LAN_SM_RST; Z3_DATA<21>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 7 | Z3_DATA<22> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 8 INPUTS | 5 | DQ_SWAP | DQ<14>.PIN | DQ<6>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 236 | 227 EQ | 5 | Z3_DATA<22>.D = DQ_SWAP & DQ<14>.PIN # !DQ_SWAP & DQ<6>.PIN; Z3_DATA<22>.CLK = CLK_EXT; // GCK Z3_DATA<22>.AP = LAN_SM_RST; Z3_DATA<22>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 11 | Z3_DATA<23> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 12 INPUTS | 5 | DQ_SWAP | DQ<15>.PIN | DQ<7>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 202 | 226 EQ | 5 | Z3_DATA<23>.D = DQ_SWAP & DQ<15>.PIN # !DQ_SWAP & DQ<7>.PIN; Z3_DATA<23>.CLK = CLK_EXT; // GCK Z3_DATA<23>.AP = LAN_SM_RST; Z3_DATA<23>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 12 | Z3_DATA<24> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 1 | 17 INPUTS | 5 | DQ_SWAP | DQ<0>.PIN | DQ<8>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 217 | 231 EQ | 5 | Z3_DATA<24>.D = DQ_SWAP & DQ<0>.PIN # !DQ_SWAP & DQ<8>.PIN; Z3_DATA<24>.CLK = CLK_EXT; // GCK Z3_DATA<24>.AP = LAN_SM_RST; Z3_DATA<24>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 13 | Z3_DATA<25> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 4 | 10 INPUTS | 5 | DQ_SWAP | DQ<1>.PIN | DQ<9>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 216 | 209 EQ | 5 | Z3_DATA<25>.D = DQ_SWAP & DQ<1>.PIN # !DQ_SWAP & DQ<9>.PIN; Z3_DATA<25>.CLK = CLK_EXT; // GCK Z3_DATA<25>.AP = LAN_SM_RST; Z3_DATA<25>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 14 | Z3_DATA<26> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 4 | 12 INPUTS | 5 | DQ_SWAP | DQ<10>.PIN | DQ<2>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 234 | 220 EQ | 5 | Z3_DATA<26>.D = DQ_SWAP & DQ<2>.PIN # !DQ_SWAP & DQ<10>.PIN; Z3_DATA<26>.CLK = CLK_EXT; // GCK Z3_DATA<26>.AP = LAN_SM_RST; Z3_DATA<26>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 6 | Z3_DATA<27> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 4 | 15 INPUTS | 5 | DQ_SWAP | DQ<11>.PIN | DQ<3>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 207 | 219 EQ | 5 | Z3_DATA<27>.D = DQ_SWAP & DQ<3>.PIN # !DQ_SWAP & DQ<11>.PIN; Z3_DATA<27>.CLK = CLK_EXT; // GCK Z3_DATA<27>.AP = LAN_SM_RST; Z3_DATA<27>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 5 | Z3_DATA<28> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 4 | 17 INPUTS | 5 | DQ_SWAP | DQ<12>.PIN | DQ<4>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 235 | 225 EQ | 5 | Z3_DATA<28>.D = DQ_SWAP & DQ<4>.PIN # !DQ_SWAP & DQ<12>.PIN; Z3_DATA<28>.CLK = CLK_EXT; // GCK Z3_DATA<28>.AP = LAN_SM_RST; Z3_DATA<28>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 3 | Z3_DATA<29> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 6 | 1 INPUTS | 5 | DQ_SWAP | DQ<13>.PIN | DQ<5>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 204 | 221 EQ | 5 | Z3_DATA<29>.D = DQ_SWAP & DQ<5>.PIN # !DQ_SWAP & DQ<13>.PIN; Z3_DATA<29>.CLK = CLK_EXT; // GCK Z3_DATA<29>.AP = LAN_SM_RST; Z3_DATA<29>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 1 | Z3_DATA<30> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 6 | 5 INPUTS | 5 | DQ_SWAP | DQ<14>.PIN | DQ<6>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 236 | 227 EQ | 5 | Z3_DATA<30>.D = DQ_SWAP & DQ<6>.PIN # !DQ_SWAP & DQ<14>.PIN; Z3_DATA<30>.CLK = CLK_EXT; // GCK Z3_DATA<30>.AP = LAN_SM_RST; Z3_DATA<30>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 15 | Z3_DATA<31> ATTRIBUTES | 8553408 | 0 OUTPUTMC | 1 | 6 | 10 INPUTS | 5 | DQ_SWAP | DQ<15>.PIN | DQ<7>.PIN | LAN_SM_RST | LAN_SM_FSM_FFd7 INPUTMC | 3 | 8 | 11 | 11 | 5 | 14 | 4 INPUTP | 2 | 202 | 226 EQ | 5 | Z3_DATA<31>.D = DQ_SWAP & DQ<7>.PIN # !DQ_SWAP & DQ<15>.PIN; Z3_DATA<31>.CLK = CLK_EXT; // GCK Z3_DATA<31>.AP = LAN_SM_RST; Z3_DATA<31>.CE = LAN_SM_FSM_FFd7; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 9 | 16 | DQ_10_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 17 INPUTS | 11 | RESET | LAN_D_INIT<8> | LDS | RW | FCS | LAN_ACCESS | DQ_DATA<4> | DS1 | DS0 | EXP49_.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST INPUTMC | 5 | 5 | 14 | 8 | 1 | 12 | 6 | 9 | 15 | 1 | 15 INPUTP | 6 | 263 | 157 | 158 | 147 | 148 | 170 EXPORTS | 1 | 9 | 17 IMPORTS | 1 | 9 | 15 EQ | 22 | DQ<10> = !RESET & LAN_D_INIT<8> ;Imported pterms FB10_16 # RESET & D<10>.PIN & RW # RESET & D<10>.PIN & FCS # RESET & D<10>.PIN & !LAN_ACCESS # RESET & D<10>.PIN & UDS & LDS & DS1 & DS0 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<10> ;Imported pterms FB10_15 # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<10> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<10> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<10>; DQ<10>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; DQ_10_IOBUFE.EXP = RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<4> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<4> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<4> MACROCELL | 11 | 9 | DQ_11_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 11 | 10 INPUTS | 10 | RESET | LAN_D_INIT<8> | D<11>.PIN | LAN_ACCESS | RW | DS0 | FCS | DQ_DATA<9> | EXP52_.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST INPUTMC | 5 | 5 | 14 | 8 | 1 | 14 | 9 | 11 | 8 | 1 | 15 INPUTP | 5 | 263 | 77 | 158 | 170 | 147 EXPORTS | 1 | 11 | 10 IMPORTS | 1 | 11 | 8 EQ | 18 | DQ<11> = !RESET & LAN_D_INIT<8> # RESET & D<11>.PIN & RW # RESET & D<11>.PIN & !LAN_ACCESS ;Imported pterms FB12_9 # RESET & D<11>.PIN & FCS # RESET & D<11>.PIN & UDS & LDS & DS1 & DS0 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<11> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<11> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<11> ;Imported pterms FB12_8 # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<11>; DQ<11>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; DQ_11_IOBUFE.EXP = RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<9> MACROCELL | 9 | 1 | DQ_1_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 9 | RESET | LAN_D_INIT<1> | LAN_ACCESS | D<1>.PIN | RW | FCS | DQ<4>_BUFR.EXP | DQ_0_IOBUFE.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST INPUTMC | 5 | 5 | 15 | 8 | 1 | 9 | 0 | 9 | 2 | 1 | 15 INPUTP | 4 | 263 | 30 | 158 | 147 IMPORTS | 2 | 9 | 0 | 9 | 2 EQ | 16 | DQ<1> = !RESET & LAN_D_INIT<1> # RESET & RW & D<1>.PIN # RESET & FCS & D<1>.PIN # RESET & !LAN_ACCESS & D<1>.PIN ;Imported pterms FB10_1 # RESET & UDS & LDS & DS1 & DS0 & D<1>.PIN # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<1> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<1> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<1> ;Imported pterms FB10_3 # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<1>; DQ<1>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; MACROCELL | 9 | 0 | DQ<4>_BUFR.MC ATTRIBUTES | 133888 | 0 OUTPUTMC | 2 | 9 | 9 | 9 | 1 INPUTS | 12 | RESET | LAN_D_INIT<1> | UDS | LDS | DS1 | DS0 | D<1>.PIN | RW | FCS | LAN_ACCESS | DQ_DATA<1> | EXP50_.EXP INPUTMC | 4 | 5 | 15 | 8 | 1 | 14 | 0 | 9 | 17 INPUTP | 8 | 263 | 155 | 157 | 148 | 170 | 30 | 158 | 147 EXPORTS | 1 | 9 | 1 IMPORTS | 1 | 9 | 17 EQ | 22 | DQ<4>_BUFR = !RESET & LAN_D_INIT<1> ;Imported pterms FB10_18 # RESET & RW & D<4>.PIN # RESET & FCS & D<4>.PIN # RESET & !LAN_ACCESS & D<4>.PIN # RESET & UDS & LDS & DS1 & DS0 & D<4>.PIN # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<4> ;Imported pterms FB10_17 # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<4> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<4> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<4>; DQ<4>_BUFR.EXP = RESET & UDS & LDS & DS1 & DS0 & D<1>.PIN # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<1> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<1> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<1> MACROCELL | 1 | 0 | DQ<8>_BUFR.MC ATTRIBUTES | 133888 | 0 OUTPUTMC | 1 | 9 | 13 INPUTS | 11 | RESET | LAN_D_INIT<8> | D<8>.PIN | LAN_ACCESS | RW | FCS | UDS | LDS | DS1 | DS0 | A_LAN_4_OBUF.EXP INPUTMC | 3 | 5 | 14 | 8 | 1 | 1 | 1 INPUTP | 8 | 263 | 32 | 158 | 147 | 155 | 157 | 148 | 170 IMPORTS | 1 | 1 | 1 EQ | 14 | DQ<8>_BUFR = !RESET & LAN_D_INIT<8> # RESET & D<8>.PIN & RW # RESET & D<8>.PIN & FCS # RESET & D<8>.PIN & !LAN_ACCESS # RESET & D<8>.PIN & UDS & LDS & DS1 & DS0 ;Imported pterms FB2_2 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<8> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<8> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<8> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<8>; MACROCELL | 11 | 11 | DQ_9_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 11 | 12 INPUTS | 12 | RESET | LAN_D_INIT<1> | D<9>.PIN | LAN_ACCESS | RW | UDS | LDS | DQ_SWAP | A<13>.PIN | LAN_SM_FSM_FFd13 | EXP53_.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST INPUTMC | 6 | 5 | 15 | 8 | 1 | 8 | 11 | 8 | 8 | 11 | 10 | 1 | 15 INPUTP | 6 | 263 | 73 | 158 | 155 | 157 | 123 EXPORTS | 1 | 11 | 12 IMPORTS | 1 | 11 | 10 EQ | 18 | DQ<9> = !RESET & LAN_D_INIT<1> # RESET & D<9>.PIN & RW # RESET & D<9>.PIN & !LAN_ACCESS ;Imported pterms FB12_11 # RESET & D<9>.PIN & FCS # RESET & D<9>.PIN & UDS & LDS & DS1 & DS0 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<9> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<9> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<9> ;Imported pterms FB12_10 # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<9>; DQ<9>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; DQ_9_IOBUFE.EXP = UDS & LDS & !DQ_SWAP & A<13>.PIN & LAN_SM_FSM_FFd13 MACROCELL | 3 | 1 | D_0_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RW | DQ<0>.PIN | LAN_ACCESS | FCS | AS | AUTOCONFIG_Z2_ACCESS | IDE_BASEADR<7>.EXP | D_10_IOBUFE/D_10_IOBUFE_TRST INPUTMC | 4 | 8 | 1 | 4 | 0 | 3 | 2 | 0 | 2 INPUTP | 4 | 158 | 217 | 147 | 152 IMPORTS | 1 | 3 | 2 EQ | 8 | D<0> = !RW & DQ<0>.PIN # FCS & DQ<0>.PIN # !LAN_ACCESS & DQ<0>.PIN # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS ;Imported pterms FB4_3 # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<16> & RW & !FCS & LAN_ACCESS; D<0>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; MACROCELL | 4 | 13 | D_10_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RW | DQ<10>.PIN | LAN_ACCESS | FCS | AS | AUTOCONFIG_Z2_ACCESS | Z3_ADR_1.EXP | D_10_IOBUFE/D_10_IOBUFE_TRST INPUTMC | 4 | 8 | 1 | 4 | 0 | 4 | 12 | 0 | 2 INPUTP | 4 | 158 | 234 | 147 | 152 IMPORTS | 1 | 4 | 12 EQ | 8 | D<10> = !RW & DQ<10>.PIN # FCS & DQ<10>.PIN # !LAN_ACCESS & DQ<10>.PIN # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS ;Imported pterms FB5_13 # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<26> & RW & !FCS & LAN_ACCESS; D<10>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; MACROCELL | 4 | 14 | D_11_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RW | DQ<11>.PIN | LAN_ACCESS | FCS | AS | AUTOCONFIG_Z2_ACCESS | $OpTx$$OpTx$FX_DC$87_INV$1549.EXP | D_10_IOBUFE/D_10_IOBUFE_TRST INPUTMC | 4 | 8 | 1 | 4 | 0 | 4 | 15 | 0 | 2 INPUTP | 4 | 158 | 207 | 147 | 152 IMPORTS | 1 | 4 | 15 EQ | 8 | D<11> = !RW & DQ<11>.PIN # FCS & DQ<11>.PIN # !LAN_ACCESS & DQ<11>.PIN # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS ;Imported pterms FB5_16 # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<27> & RW & !FCS & LAN_ACCESS; D<11>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; MACROCELL | 4 | 16 | D_12_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RW | DQ<12>.PIN | AUTOCONFIG_Z2_ACCESS | LAN_ACCESS | AS | FCS | EXP30_.EXP | D_10_IOBUFE/D_10_IOBUFE_TRST INPUTMC | 4 | 4 | 0 | 8 | 1 | 4 | 17 | 0 | 2 INPUTP | 4 | 158 | 235 | 152 | 147 IMPORTS | 1 | 4 | 17 EQ | 12 | D<12> = !RW & DQ<12>.PIN # AS & !LAN_ACCESS & DQ<12>.PIN # FCS & !AUTOCONFIG_Z2_ACCESS & DQ<12>.PIN # !AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & DQ<12>.PIN ;Imported pterms FB5_18 # AS & FCS & DQ<12>.PIN # Z3_DATA<28> & RW & !FCS & LAN_ACCESS # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<0> # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & D_Z2_OUT<0>; D<12>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; MACROCELL | 6 | 2 | D_13_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 9 | RW | DQ<13>.PIN | AUTOCONFIG_Z2_ACCESS | LAN_ACCESS | AS | FCS | CP_RD_S.EXP | AUTO_CONFIG_Z2_DONE_CYCLE<1>.EXP | D_10_IOBUFE/D_10_IOBUFE_TRST INPUTMC | 5 | 4 | 0 | 8 | 1 | 6 | 1 | 6 | 3 | 0 | 2 INPUTP | 4 | 158 | 204 | 152 | 147 IMPORTS | 2 | 6 | 1 | 6 | 3 EQ | 13 | D<13> = !RW & DQ<13>.PIN # AS & !LAN_ACCESS & DQ<13>.PIN # FCS & !AUTOCONFIG_Z2_ACCESS & DQ<13>.PIN # !AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & DQ<13>.PIN ;Imported pterms FB7_2 # AS & FCS & DQ<13>.PIN # Z3_DATA<29> & RW & !FCS & LAN_ACCESS ;Imported pterms FB7_4 # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<1> # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & D_Z2_OUT<1>; D<13>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; MACROCELL | 6 | 4 | D_14_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 6 | 3 INPUTS | 16 | RW | DQ<14>.PIN | AUTOCONFIG_Z2_ACCESS | LAN_ACCESS | AS | A<5> | A<4> | A<1> | D_10_IOBUFE/D_10_IOBUFE_TRST | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE_CYCLE<1> | LDS | A<6> | A<3> | EXP31_.EXP INPUTMC | 7 | 4 | 0 | 8 | 1 | 0 | 2 | 13 | 17 | 13 | 3 | 6 | 3 | 6 | 5 INPUTP | 9 | 158 | 236 | 152 | 91 | 97 | 107 | 157 | 98 | 99 EXPORTS | 1 | 6 | 3 IMPORTS | 1 | 6 | 5 EQ | 15 | D<14> = !RW & DQ<14>.PIN # AS & !LAN_ACCESS & DQ<14>.PIN # !AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & DQ<14>.PIN ;Imported pterms FB7_6 # AS & FCS & DQ<14>.PIN # FCS & !AUTOCONFIG_Z2_ACCESS & DQ<14>.PIN # Z3_DATA<30> & RW & !FCS & LAN_ACCESS # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<2> # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & D_Z2_OUT<2>; D<14>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; D_14_IOBUFE.EXP = !A<5> & !A<4> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE_CYCLE<1> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 6 | 11 | D_15_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 6 | 12 INPUTS | 12 | RW | DQ<15>.PIN | AUTOCONFIG_Z2_ACCESS | LAN_ACCESS | A<4> | A<1> | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D_10_IOBUFE/D_10_IOBUFE_TRST | A<3> | A<2> | EXP34_.EXP INPUTMC | 6 | 4 | 0 | 8 | 1 | 13 | 17 | 13 | 3 | 0 | 2 | 6 | 10 INPUTP | 6 | 158 | 202 | 97 | 107 | 99 | 101 EXPORTS | 1 | 6 | 12 IMPORTS | 1 | 6 | 10 EQ | 17 | D<15> = !RW & DQ<15>.PIN # !AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & DQ<15>.PIN ;Imported pterms FB7_11 # AS & FCS & DQ<15>.PIN # AS & !LAN_ACCESS & DQ<15>.PIN # FCS & !AUTOCONFIG_Z2_ACCESS & DQ<15>.PIN # Z3_DATA<31> & RW & !FCS & LAN_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & D_Z2_OUT<3> ;Imported pterms FB7_10 # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<3>; D<15>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; D_15_IOBUFE.EXP = A<4> & A<1> & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<3> # A<2> & A<1> & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !A<3> MACROCELL | 1 | 14 | D_1_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RW | DQ<1>.PIN | LAN_ACCESS | FCS | AS | AUTOCONFIG_Z2_ACCESS | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST.EXP | D_10_IOBUFE/D_10_IOBUFE_TRST INPUTMC | 4 | 8 | 1 | 4 | 0 | 1 | 15 | 0 | 2 INPUTP | 4 | 158 | 216 | 147 | 152 IMPORTS | 1 | 1 | 15 EQ | 8 | D<1> = !RW & DQ<1>.PIN # FCS & DQ<1>.PIN # !LAN_ACCESS & DQ<1>.PIN # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS ;Imported pterms FB2_16 # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<17> & RW & !FCS & LAN_ACCESS; D<1>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; MACROCELL | 4 | 9 | D_2_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RW | DQ<2>.PIN | LAN_ACCESS | FCS | AS | AUTOCONFIG_Z2_ACCESS | Z3_ADR<3>.EXP | D_10_IOBUFE/D_10_IOBUFE_TRST INPUTMC | 4 | 8 | 1 | 4 | 0 | 4 | 8 | 0 | 2 INPUTP | 4 | 158 | 220 | 147 | 152 IMPORTS | 1 | 4 | 8 EQ | 8 | D<2> = !RW & DQ<2>.PIN # FCS & DQ<2>.PIN # !LAN_ACCESS & DQ<2>.PIN # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS ;Imported pterms FB5_9 # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<18> & RW & !FCS & LAN_ACCESS; D<2>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; MACROCELL | 1 | 11 | D_3_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 1 | 12 INPUTS | 19 | RW | DQ<3>.PIN | A<5> | A<4> | A<2> | A<1> | AS | D_10_IOBUFE/D_10_IOBUFE_TRST | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<8>.PIN | IDE_BASEADR<0> | UDS | A<6> | A<3> | AUTOCONFIG_Z2_ACCESS | LDS | EXP25_.EXP INPUTMC | 7 | 0 | 2 | 13 | 17 | 13 | 3 | 4 | 5 | 1 | 12 | 4 | 0 | 1 | 10 INPUTP | 12 | 158 | 219 | 91 | 97 | 101 | 107 | 152 | 32 | 155 | 98 | 99 | 157 EXPORTS | 1 | 1 | 12 IMPORTS | 1 | 1 | 10 EQ | 20 | D<3> = !RW & DQ<3>.PIN ;Imported pterms FB2_11 # FCS & DQ<3>.PIN # !LAN_ACCESS & DQ<3>.PIN # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS # Z3_DATA<19> & RW & !FCS & LAN_ACCESS; D<3>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; D_3_IOBUFE.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<8>.PIN & !IDE_BASEADR<0> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<8>.PIN & !IDE_BASEADR<0> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<8>.PIN & IDE_BASEADR<0> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 0 | 5 | D_4_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 0 | 4 INPUTS | 9 | RW | DQ<4>.PIN | AS | FCS | AUTOCONFIG_Z2_ACCESS | LAN_ACCESS | Z3_DATA<21> | D_10_IOBUFE/D_10_IOBUFE_TRST | EXP24_.EXP INPUTMC | 5 | 4 | 0 | 8 | 1 | 10 | 8 | 0 | 2 | 0 | 6 INPUTP | 4 | 158 | 225 | 152 | 147 EXPORTS | 1 | 0 | 4 IMPORTS | 1 | 0 | 6 EQ | 11 | D<4> = !RW & DQ<4>.PIN ;Imported pterms FB1_7 # FCS & DQ<4>.PIN # !LAN_ACCESS & DQ<4>.PIN # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS # Z3_DATA<20> & RW & !FCS & LAN_ACCESS; D<4>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; D_4_IOBUFE.EXP = !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS # Z3_DATA<21> & RW & !FCS & LAN_ACCESS MACROCELL | 0 | 4 | D_5_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 0 | 3 INPUTS | 18 | RW | DQ<5>.PIN | LAN_ACCESS | FCS | A<5> | A<4> | A<2> | D_10_IOBUFE/D_10_IOBUFE_TRST | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | D<15>.PIN | LAN_BASEADR<7> | LDS | A<6> | A<3> | AUTOCONFIG_Z2_ACCESS | D_4_IOBUFE.EXP INPUTMC | 6 | 8 | 1 | 0 | 2 | 13 | 17 | 0 | 3 | 4 | 0 | 0 | 5 INPUTP | 12 | 158 | 221 | 147 | 91 | 97 | 101 | 107 | 152 | 89 | 157 | 98 | 99 EXPORTS | 1 | 0 | 3 IMPORTS | 1 | 0 | 5 EQ | 11 | D<5> = !RW & DQ<5>.PIN # FCS & DQ<5>.PIN # !LAN_ACCESS & DQ<5>.PIN ;Imported pterms FB1_6 # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS # Z3_DATA<21> & RW & !FCS & LAN_ACCESS; D<5>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; D_5_IOBUFE.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<15>.PIN & !LAN_BASEADR<7> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 1 | 9 | D_6_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RW | DQ<6>.PIN | LAN_ACCESS | FCS | AS | AUTOCONFIG_Z2_ACCESS | IDE_BASEADR<1>.EXP | D_10_IOBUFE/D_10_IOBUFE_TRST INPUTMC | 4 | 8 | 1 | 4 | 0 | 1 | 8 | 0 | 2 INPUTP | 4 | 158 | 227 | 147 | 152 IMPORTS | 1 | 1 | 8 EQ | 8 | D<6> = !RW & DQ<6>.PIN # FCS & DQ<6>.PIN # !LAN_ACCESS & DQ<6>.PIN # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS ;Imported pterms FB2_9 # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<22> & RW & !FCS & LAN_ACCESS; D<6>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; MACROCELL | 1 | 13 | D_7_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RW | DQ<7>.PIN | LAN_ACCESS | FCS | AS | AUTOCONFIG_Z2_ACCESS | IDE_BASEADR<0>.EXP | D_10_IOBUFE/D_10_IOBUFE_TRST INPUTMC | 4 | 8 | 1 | 4 | 0 | 1 | 12 | 0 | 2 INPUTP | 4 | 158 | 226 | 147 | 152 IMPORTS | 1 | 1 | 12 EQ | 8 | D<7> = !RW & DQ<7>.PIN # FCS & DQ<7>.PIN # !LAN_ACCESS & DQ<7>.PIN # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS ;Imported pterms FB2_13 # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<23> & RW & !FCS & LAN_ACCESS; D<7>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; MACROCELL | 1 | 16 | D_8_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 1 | 15 INPUTS | 9 | RW | DQ<8>.PIN | LDS | FCS | LAN_ACCESS | DS1 | DS0 | D_10_IOBUFE/D_10_IOBUFE_TRST | EXP26_.EXP INPUTMC | 3 | 8 | 1 | 0 | 2 | 1 | 17 INPUTP | 6 | 158 | 231 | 157 | 147 | 148 | 170 EXPORTS | 1 | 1 | 15 IMPORTS | 1 | 1 | 17 EQ | 11 | D<8> = !RW & DQ<8>.PIN ;Imported pterms FB2_18 # FCS & DQ<8>.PIN # !LAN_ACCESS & DQ<8>.PIN # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS # Z3_DATA<24> & RW & !FCS & LAN_ACCESS; D<8>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; D_8_IOBUFE.EXP = !LDS & !RW & !FCS & LAN_ACCESS # !DS1 & !RW & !FCS & LAN_ACCESS # !DS0 & !RW & !FCS & LAN_ACCESS MACROCELL | 4 | 11 | D_9_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 8 | RW | DQ<9>.PIN | LAN_ACCESS | FCS | AS | AUTOCONFIG_Z2_ACCESS | Z3_ADR<4>.EXP | D_10_IOBUFE/D_10_IOBUFE_TRST INPUTMC | 4 | 8 | 1 | 4 | 0 | 4 | 10 | 0 | 2 INPUTP | 4 | 158 | 209 | 147 | 152 IMPORTS | 1 | 4 | 10 EQ | 8 | D<9> = !RW & DQ<9>.PIN # FCS & DQ<9>.PIN # !LAN_ACCESS & DQ<9>.PIN # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS ;Imported pterms FB5_11 # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<25> & RW & !FCS & LAN_ACCESS; D<9>.OE = D_10_IOBUFE/D_10_IOBUFE_TRST; MACROCELL | 9 | 2 | DQ_0_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 1 INPUTS | 9 | RESET | LAN_ACCESS | D<0>.PIN | RW | FCS | DS0 | DQ_DATA<1> | EXP44_.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST INPUTMC | 4 | 8 | 1 | 14 | 0 | 9 | 3 | 1 | 15 INPUTP | 5 | 263 | 4 | 158 | 147 | 170 EXPORTS | 1 | 9 | 1 IMPORTS | 1 | 9 | 3 EQ | 16 | DQ<0> = RESET & RW & D<0>.PIN # RESET & FCS & D<0>.PIN # RESET & !LAN_ACCESS & D<0>.PIN ;Imported pterms FB10_4 # RESET & UDS & LDS & DS1 & DS0 & D<0>.PIN # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<0> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<0> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<0> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<0>; DQ<0>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; DQ_0_IOBUFE.EXP = RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<1> MACROCELL | 7 | 1 | DQ_12_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 11 | RESET | D<12>.PIN | LAN_ACCESS | RW | FCS | UDS | LDS | DS1 | DS0 | EXP39_.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST INPUTMC | 3 | 8 | 1 | 7 | 0 | 1 | 15 INPUTP | 8 | 263 | 78 | 158 | 147 | 155 | 157 | 148 | 170 IMPORTS | 1 | 7 | 0 EQ | 14 | DQ<12> = RESET & D<12>.PIN & RW # RESET & D<12>.PIN & FCS # RESET & D<12>.PIN & !LAN_ACCESS # RESET & D<12>.PIN & UDS & LDS & DS1 & DS0 ;Imported pterms FB8_1 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<12> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<12> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<12> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<12>; DQ<12>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; MACROCELL | 11 | 7 | DQ_13_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 11 | 8 INPUTS | 9 | RESET | D<13>.PIN | LAN_ACCESS | RW | FCS | DS0 | DQ_DATA<11> | EXP51_.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST INPUTMC | 4 | 8 | 1 | 11 | 0 | 11 | 6 | 1 | 15 INPUTP | 5 | 263 | 80 | 158 | 147 | 170 EXPORTS | 1 | 11 | 8 IMPORTS | 1 | 11 | 6 EQ | 16 | DQ<13> = RESET & D<13>.PIN & RW # RESET & D<13>.PIN & FCS # RESET & D<13>.PIN & !LAN_ACCESS ;Imported pterms FB12_7 # RESET & D<13>.PIN & UDS & LDS & DS1 & DS0 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<13> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<13> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<13> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<13>; DQ<13>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; DQ_13_IOBUFE.EXP = RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<11> MACROCELL | 7 | 2 | DQ_14_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 11 | RESET | D<14>.PIN | LAN_ACCESS | RW | FCS | UDS | LDS | DS1 | DS0 | EXP40_.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST INPUTMC | 3 | 8 | 1 | 7 | 3 | 1 | 15 INPUTP | 8 | 263 | 81 | 158 | 147 | 155 | 157 | 148 | 170 IMPORTS | 1 | 7 | 3 EQ | 14 | DQ<14> = RESET & D<14>.PIN & RW # RESET & D<14>.PIN & FCS # RESET & D<14>.PIN & !LAN_ACCESS # RESET & D<14>.PIN & UDS & LDS & DS1 & DS0 ;Imported pterms FB8_4 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<14> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<14> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<14> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<14>; DQ<14>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; MACROCELL | 11 | 4 | DQ_15_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 12 | RESET | D<15>.PIN | LAN_ACCESS | RW | FCS | UDS | LDS | DS1 | DS0 | LAN_SM_FSM_FFd10.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST | LAN_SM_RST.EXP INPUTMC | 4 | 8 | 1 | 11 | 3 | 1 | 15 | 11 | 5 INPUTP | 8 | 263 | 89 | 158 | 147 | 155 | 157 | 148 | 170 IMPORTS | 2 | 11 | 3 | 11 | 5 EQ | 15 | DQ<15> = RESET & D<15>.PIN & RW # RESET & D<15>.PIN & FCS # RESET & D<15>.PIN & !LAN_ACCESS # RESET & D<15>.PIN & UDS & LDS & DS1 & DS0 ;Imported pterms FB12_4 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<15> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<15> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<15> ;Imported pterms FB12_6 # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<15>; DQ<15>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; MACROCELL | 9 | 5 | DQ_2_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 4 INPUTS | 11 | RESET | UDS | RW | FCS | LAN_ACCESS | DQ_DATA<3> | LDS | DS1 | DS0 | EXP45_.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST INPUTMC | 4 | 8 | 1 | 11 | 15 | 9 | 6 | 1 | 15 INPUTP | 7 | 263 | 155 | 158 | 147 | 157 | 148 | 170 EXPORTS | 1 | 9 | 4 IMPORTS | 1 | 9 | 6 EQ | 23 | DQ<2> = ;Imported pterms FB10_7 RESET & RW & D<2>.PIN # RESET & FCS & D<2>.PIN # RESET & !LAN_ACCESS & D<2>.PIN # RESET & UDS & LDS & DS1 & DS0 & D<2>.PIN # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<2> ;Imported pterms FB10_8 # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<2> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<2> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<2>; DQ<2>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; DQ_2_IOBUFE.EXP = RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<3> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<3> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<3> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<3> MACROCELL | 9 | 4 | DQ_3_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 11 | RESET | LAN_ACCESS | D<3>.PIN | RW | FCS | UDS | LDS | DS1 | DS0 | DQ_2_IOBUFE.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST INPUTMC | 3 | 8 | 1 | 9 | 5 | 1 | 15 INPUTP | 8 | 263 | 28 | 158 | 147 | 155 | 157 | 148 | 170 IMPORTS | 1 | 9 | 5 EQ | 14 | DQ<3> = RESET & RW & D<3>.PIN # RESET & FCS & D<3>.PIN # RESET & !LAN_ACCESS & D<3>.PIN # RESET & UDS & LDS & DS1 & DS0 & D<3>.PIN ;Imported pterms FB10_6 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<3> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<3> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<3> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<3>; DQ<3>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; MACROCELL | 9 | 7 | DQ_5_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 6 INPUTS | 11 | RESET | LAN_ACCESS | D<5>.PIN | LDS | RW | FCS | DQ_DATA<2> | DS1 | DS0 | EXP46_.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST INPUTMC | 4 | 8 | 1 | 12 | 9 | 9 | 8 | 1 | 15 INPUTP | 7 | 263 | 37 | 157 | 158 | 147 | 148 | 170 EXPORTS | 1 | 9 | 6 IMPORTS | 1 | 9 | 8 EQ | 21 | DQ<5> = RESET & !LAN_ACCESS & D<5>.PIN ;Imported pterms FB10_9 # RESET & RW & D<5>.PIN # RESET & FCS & D<5>.PIN # RESET & UDS & LDS & DS1 & DS0 & D<5>.PIN # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<5> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<5> ;Imported pterms FB10_10 # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<5> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<5>; DQ<5>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; DQ_5_IOBUFE.EXP = RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<2> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<2> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<2> MACROCELL | 9 | 11 | DQ_6_IOBUFE ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 10 INPUTS | 11 | RESET | UDS | RW | FCS | LAN_ACCESS | DQ_DATA<7> | LDS | DS1 | DS0 | EXP47_.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST INPUTMC | 4 | 8 | 1 | 14 | 12 | 9 | 12 | 1 | 15 INPUTP | 7 | 263 | 155 | 158 | 147 | 157 | 148 | 170 EXPORTS | 1 | 9 | 10 IMPORTS | 1 | 9 | 12 EQ | 23 | DQ<6> = ;Imported pterms FB10_13 RESET & RW & D<6>.PIN # RESET & FCS & D<6>.PIN # RESET & !LAN_ACCESS & D<6>.PIN # RESET & UDS & LDS & DS1 & DS0 & D<6>.PIN # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<6> ;Imported pterms FB10_14 # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<6> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<6> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<6>; DQ<6>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; DQ_6_IOBUFE.EXP = RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<7> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<7> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<7> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<7> MACROCELL | 9 | 10 | DQ_7_IOBUFE ATTRIBUTES | 265986 | 0 INPUTS | 11 | RESET | LAN_ACCESS | D<7>.PIN | RW | FCS | UDS | LDS | DS1 | DS0 | DQ_6_IOBUFE.EXP | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST INPUTMC | 3 | 8 | 1 | 9 | 11 | 1 | 15 INPUTP | 8 | 263 | 29 | 158 | 147 | 155 | 157 | 148 | 170 IMPORTS | 1 | 9 | 11 EQ | 14 | DQ<7> = RESET & RW & D<7>.PIN # RESET & FCS & D<7>.PIN # RESET & !LAN_ACCESS & D<7>.PIN # RESET & UDS & LDS & DS1 & DS0 & D<7>.PIN ;Imported pterms FB10_12 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<7> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<7> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<7> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<7>; DQ<7>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; MACROCELL | 8 | 11 | DQ_SWAP ATTRIBUTES | 8520608 | 0 OUTPUTMC | 69 | 8 | 9 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 16 | 15 | 6 | 15 | 8 | 10 | 14 | 10 | 12 | 10 | 8 | 10 | 7 | 15 | 11 | 15 | 12 | 15 | 13 | 15 | 14 | 10 | 6 | 10 | 5 | 10 | 3 | 10 | 1 | 15 | 15 | 15 | 0 | 12 | 0 | 11 | 0 | 12 | 17 | 11 | 17 | 12 | 15 | 12 | 12 | 14 | 0 | 12 | 9 | 11 | 15 | 12 | 6 | 11 | 13 | 12 | 4 | 14 | 12 | 15 | 4 | 14 | 9 | 11 | 1 | 11 | 11 | 11 | 12 | 11 | 14 | 11 | 16 | 12 | 1 | 12 | 3 | 12 | 5 | 12 | 8 | 12 | 11 | 12 | 13 | 12 | 14 | 12 | 16 | 14 | 1 | 14 | 8 | 14 | 10 | 14 | 11 | 14 | 15 | 14 | 17 | 15 | 3 | 15 | 17 INPUTS | 19 | LAN_BASEADR<0> | LAN_BASEADR<1> | LAN_BASEADR<2> | A<17>.PIN | A<16>.PIN | A<13>.PIN | A<14>.PIN | A<18>.PIN | Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D | $OpTx$FX_DC$81 | $OpTx$FX_DC$82 | $OpTx$FX_DC$83 | $OpTx$FX_DC$84 | $OpTx$INV$62 | $OpTx$INV$61 | FCS | RESET | Z3_DATA<0>.EXP | LAN_SM_FSM_FFd2.EXP INPUTMC | 12 | 7 | 14 | 0 | 10 | 0 | 8 | 2 | 5 | 8 | 4 | 8 | 15 | 2 | 10 | 2 | 9 | 2 | 15 | 2 | 16 | 8 | 10 | 8 | 12 INPUTP | 7 | 172 | 175 | 123 | 125 | 171 | 147 | 263 IMPORTS | 2 | 8 | 10 | 8 | 12 EQ | 36 | !DQ_SWAP.D = LAN_BASEADR<0> & LAN_BASEADR<1> & LAN_BASEADR<2> & A<17>.PIN & A<16>.PIN & A<13>.PIN & A<14>.PIN & A<18>.PIN & !Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D & !$OpTx$FX_DC$81 & !$OpTx$FX_DC$82 & !$OpTx$FX_DC$83 & !$OpTx$FX_DC$84 & !$OpTx$INV$62 & !$OpTx$INV$61 # LAN_BASEADR<0> & !LAN_BASEADR<1> & LAN_BASEADR<2> & !A<17>.PIN & A<16>.PIN & A<13>.PIN & A<14>.PIN & A<18>.PIN & !Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D & !$OpTx$FX_DC$81 & !$OpTx$FX_DC$82 & !$OpTx$FX_DC$83 & !$OpTx$FX_DC$84 & !$OpTx$INV$62 & !$OpTx$INV$61 # !LAN_BASEADR<0> & LAN_BASEADR<1> & LAN_BASEADR<2> & A<17>.PIN & !A<16>.PIN & A<13>.PIN & A<14>.PIN & A<18>.PIN & !Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D & !$OpTx$FX_DC$81 & !$OpTx$FX_DC$82 & !$OpTx$FX_DC$83 & !$OpTx$FX_DC$84 & !$OpTx$INV$62 & !$OpTx$INV$61 ;Imported pterms FB9_11 # LAN_BASEADR<0> & LAN_BASEADR<1> & !LAN_BASEADR<2> & A<17>.PIN & A<16>.PIN & A<13>.PIN & A<14>.PIN & !A<18>.PIN & !Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D & !$OpTx$FX_DC$81 & !$OpTx$FX_DC$82 & !$OpTx$FX_DC$83 & !$OpTx$FX_DC$84 & !$OpTx$INV$62 & !$OpTx$INV$61 # !LAN_BASEADR<0> & !LAN_BASEADR<1> & LAN_BASEADR<2> & !A<17>.PIN & !A<16>.PIN & A<13>.PIN & A<14>.PIN & A<18>.PIN & !Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D & !$OpTx$FX_DC$81 & !$OpTx$FX_DC$82 & !$OpTx$FX_DC$83 & !$OpTx$FX_DC$84 & !$OpTx$INV$62 & !$OpTx$INV$61 ;Imported pterms FB9_13 # LAN_BASEADR<0> & !LAN_BASEADR<1> & !LAN_BASEADR<2> & !A<17>.PIN & A<16>.PIN & A<13>.PIN & A<14>.PIN & !A<18>.PIN & !Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D & !$OpTx$FX_DC$81 & !$OpTx$FX_DC$82 & !$OpTx$FX_DC$83 & !$OpTx$FX_DC$84 & !$OpTx$INV$62 & !$OpTx$INV$61 # !LAN_BASEADR<0> & LAN_BASEADR<1> & !LAN_BASEADR<2> & A<17>.PIN & !A<16>.PIN & A<13>.PIN & A<14>.PIN & !A<18>.PIN & !Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D & !$OpTx$FX_DC$81 & !$OpTx$FX_DC$82 & !$OpTx$FX_DC$83 & !$OpTx$FX_DC$84 & !$OpTx$INV$62 & !$OpTx$INV$61 # !LAN_BASEADR<0> & !LAN_BASEADR<1> & !LAN_BASEADR<2> & !A<17>.PIN & !A<16>.PIN & A<13>.PIN & A<14>.PIN & !A<18>.PIN & !Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D & !$OpTx$FX_DC$81 & !$OpTx$FX_DC$82 & !$OpTx$FX_DC$83 & !$OpTx$FX_DC$84 & !$OpTx$INV$62 & !$OpTx$INV$61; DQ_SWAP.CLK = !FCS; DQ_SWAP.AP = !RESET; MACROCELL | 14 | 4 | LAN_SM_FSM_FFd7 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 22 | 15 | 16 | 15 | 6 | 15 | 8 | 10 | 14 | 10 | 12 | 10 | 8 | 10 | 7 | 15 | 11 | 15 | 12 | 15 | 13 | 15 | 14 | 10 | 6 | 10 | 5 | 10 | 3 | 10 | 1 | 15 | 15 | 14 | 4 | 14 | 10 | 10 | 15 | 10 | 17 | 10 | 0 | 10 | 16 INPUTS | 5 | LAN_SM_FSM_FFd11 | DS1 | DS0 | LAN_SM_FSM_FFd7 | LAN_SM_RST INPUTMC | 3 | 14 | 7 | 14 | 4 | 11 | 5 INPUTP | 2 | 148 | 170 EQ | 4 | LAN_SM_FSM_FFd7.D = LAN_SM_FSM_FFd11 # DS1 & DS0 & LAN_SM_FSM_FFd7; LAN_SM_FSM_FFd7.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd7.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 17 | LAN_SM_FSM_FFd5 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 20 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 14 | 17 | 10 | 15 | 10 | 0 | 14 | 0 INPUTS | 9 | LAN_SM_FSM_FFd5 | LAN_SM_FSM_FFd10 | LAN_SM_RST | D<9>.PIN | UDS | DQ_SWAP | LAN_SM_FSM_FFd13 | LDS | D<1>.PIN INPUTMC | 5 | 14 | 17 | 11 | 3 | 11 | 5 | 8 | 11 | 8 | 8 INPUTP | 4 | 73 | 155 | 157 | 30 EXPORTS | 1 | 14 | 0 EQ | 6 | !LAN_SM_FSM_FFd5.D = !LAN_SM_FSM_FFd5 & !LAN_SM_FSM_FFd10; LAN_SM_FSM_FFd5.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd5.AR = LAN_SM_RST; LAN_SM_FSM_FFd5.EXP = D<9>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<9>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<1>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 3 | LAN_SM_FSM_FFd10 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 8 | 14 | 17 | 14 | 8 | 10 | 15 | 10 | 17 | 10 | 0 | 10 | 16 | 14 | 7 | 11 | 4 INPUTS | 11 | LAN_SM_FSM_FFd6 | RESET | UDS | RW | FCS | LAN_ACCESS | LAN_SM_RST | DQ_DATA<15> | LDS | DS1 | LAN_SM_FSM_FFd8.EXP INPUTMC | 5 | 14 | 10 | 8 | 1 | 11 | 5 | 12 | 12 | 11 | 2 INPUTP | 6 | 263 | 155 | 158 | 147 | 157 | 148 EXPORTS | 1 | 11 | 4 IMPORTS | 1 | 11 | 2 EQ | 11 | LAN_SM_FSM_FFd10.D = LAN_SM_FSM_FFd6 ;Imported pterms FB12_3 # UDS & LDS & RW & !Z3_ADR<13> & LAN_SM_FSM_FFd13; LAN_SM_FSM_FFd10.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd10.AR = LAN_SM_RST; LAN_SM_FSM_FFd10.EXP = RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<15> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<15> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<15> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 5 | LAN_SM_FSM_FFd3 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 21 | 14 | 5 | 11 | 2 | 15 | 0 | 12 | 0 | 11 | 0 | 12 | 17 | 11 | 17 | 12 | 15 | 12 | 12 | 14 | 0 | 12 | 9 | 11 | 15 | 12 | 6 | 11 | 13 | 12 | 4 | 14 | 12 | 15 | 4 | 14 | 9 | 10 | 15 | 10 | 17 | 10 | 16 INPUTS | 5 | LAN_SM_FSM_FFd4 | DS1 | DS0 | LAN_SM_FSM_FFd3 | LAN_SM_RST INPUTMC | 3 | 8 | 17 | 14 | 5 | 11 | 5 INPUTP | 2 | 148 | 170 EQ | 4 | LAN_SM_FSM_FFd3.D = LAN_SM_FSM_FFd4 # DS1 & DS0 & LAN_SM_FSM_FFd3; LAN_SM_FSM_FFd3.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd3.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 2 | LAN_SM_FSM_FFd8 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 7 | 8 | 12 | 14 | 3 | 14 | 2 | 10 | 17 | 10 | 0 | 10 | 16 | 11 | 3 INPUTS | 9 | DS1 | LAN_SM_FSM_FFd3 | DS0 | UDS | LDS | RW | Z3_ADR<13> | LAN_SM_FSM_FFd13 | LAN_SM_RST INPUTMC | 4 | 14 | 5 | 13 | 9 | 8 | 8 | 11 | 5 INPUTP | 5 | 148 | 170 | 155 | 157 | 158 EXPORTS | 1 | 11 | 3 EQ | 6 | LAN_SM_FSM_FFd8.D = !DS1 & LAN_SM_FSM_FFd3 # !DS0 & LAN_SM_FSM_FFd3 # UDS & LDS & !RW & !Z3_ADR<13> & LAN_SM_FSM_FFd13; LAN_SM_FSM_FFd8.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd8.AR = LAN_SM_RST; LAN_SM_FSM_FFd8.EXP = UDS & LDS & RW & !Z3_ADR<13> & LAN_SM_FSM_FFd13 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 1 | LAN_SM_FSM_FFd12 ATTRIBUTES | 4358928 | 0 OUTPUTMC | 5 | 14 | 1 | 14 | 15 | 10 | 15 | 10 | 0 | 14 | 0 INPUTS | 9 | LAN_SM_FSM_FFd12 | Z3_ADR<13> | LAN_SM_FSM_FFd13 | LAN_SM_RST | UDS | LDS | A<17>.PIN | DQ_SWAP | A<9>.PIN INPUTMC | 5 | 14 | 1 | 13 | 9 | 8 | 8 | 11 | 5 | 8 | 11 INPUTP | 4 | 155 | 157 | 172 | 108 EXPORTS | 1 | 14 | 0 EQ | 7 | LAN_SM_FSM_FFd12.T = !LAN_SM_FSM_FFd12 & Z3_ADR<13> & LAN_SM_FSM_FFd13; LAN_SM_FSM_FFd12.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd12.AR = LAN_SM_RST; LAN_SM_FSM_FFd12.EXP = UDS & LDS & A<17>.PIN & DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & !DQ_SWAP & A<9>.PIN & LAN_SM_FSM_FFd13 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 12 | LAN_SM_FSM_FFd2 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 6 | 10 | 0 | 10 | 15 | 10 | 17 | 8 | 3 | 10 | 16 | 8 | 11 INPUTS | 17 | LAN_SM_FSM_FFd8 | LAN_SM_RST | LAN_BASEADR<0> | LAN_BASEADR<1> | LAN_BASEADR<2> | A<17>.PIN | A<16>.PIN | A<13>.PIN | A<14>.PIN | A<18>.PIN | Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D | $OpTx$FX_DC$81 | $OpTx$FX_DC$82 | $OpTx$FX_DC$83 | $OpTx$FX_DC$84 | $OpTx$INV$62 | $OpTx$INV$61 INPUTMC | 12 | 11 | 2 | 11 | 5 | 7 | 14 | 0 | 10 | 0 | 8 | 2 | 5 | 8 | 4 | 8 | 15 | 2 | 10 | 2 | 9 | 2 | 15 | 2 | 16 INPUTP | 5 | 172 | 175 | 123 | 125 | 171 EXPORTS | 1 | 8 | 11 EQ | 15 | LAN_SM_FSM_FFd2.D = LAN_SM_FSM_FFd8; LAN_SM_FSM_FFd2.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd2.AR = LAN_SM_RST; LAN_SM_FSM_FFd2.EXP = LAN_BASEADR<0> & !LAN_BASEADR<1> & !LAN_BASEADR<2> & !A<17>.PIN & A<16>.PIN & A<13>.PIN & A<14>.PIN & !A<18>.PIN & !Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D & !$OpTx$FX_DC$81 & !$OpTx$FX_DC$82 & !$OpTx$FX_DC$83 & !$OpTx$FX_DC$84 & !$OpTx$INV$62 & !$OpTx$INV$61 # !LAN_BASEADR<0> & LAN_BASEADR<1> & !LAN_BASEADR<2> & A<17>.PIN & !A<16>.PIN & A<13>.PIN & A<14>.PIN & !A<18>.PIN & !Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D & !$OpTx$FX_DC$81 & !$OpTx$FX_DC$82 & !$OpTx$FX_DC$83 & !$OpTx$FX_DC$84 & !$OpTx$INV$62 & !$OpTx$INV$61 # !LAN_BASEADR<0> & !LAN_BASEADR<1> & !LAN_BASEADR<2> & !A<17>.PIN & !A<16>.PIN & A<13>.PIN & A<14>.PIN & !A<18>.PIN & !Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D & !$OpTx$FX_DC$81 & !$OpTx$FX_DC$82 & !$OpTx$FX_DC$83 & !$OpTx$FX_DC$84 & !$OpTx$INV$62 & !$OpTx$INV$61 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 10 | LAN_SM_FSM_FFd6 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 7 | 11 | 3 | 14 | 8 | 10 | 17 | 10 | 0 | 10 | 16 | 14 | 7 | 14 | 9 INPUTS | 10 | DS1 | LAN_SM_FSM_FFd7 | DS0 | LAN_SM_RST | UDS | LDS | A<17>.PIN | DQ_SWAP | LAN_SM_FSM_FFd13 | A<9>.PIN INPUTMC | 4 | 14 | 4 | 11 | 5 | 8 | 11 | 8 | 8 INPUTP | 6 | 148 | 170 | 155 | 157 | 172 | 108 EXPORTS | 1 | 14 | 9 EQ | 8 | LAN_SM_FSM_FFd6.D = !DS1 & LAN_SM_FSM_FFd7 # !DS0 & LAN_SM_FSM_FFd7; LAN_SM_FSM_FFd6.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd6.AR = LAN_SM_RST; LAN_SM_FSM_FFd6.EXP = UDS & LDS & A<17>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & DQ_SWAP & A<9>.PIN & LAN_SM_FSM_FFd13 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 6 | LAN_SM_FSM_FFd9 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 4 | 8 | 17 | 14 | 3 | 14 | 2 | 10 | 0 INPUTS | 6 | UDS | RW | Z3_ADR<13> | LAN_SM_FSM_FFd13 | LDS | LAN_SM_RST INPUTMC | 3 | 13 | 9 | 8 | 8 | 11 | 5 INPUTP | 3 | 155 | 158 | 157 EQ | 4 | LAN_SM_FSM_FFd9.D = !UDS & !RW & !Z3_ADR<13> & LAN_SM_FSM_FFd13 # !LDS & !RW & !Z3_ADR<13> & LAN_SM_FSM_FFd13; LAN_SM_FSM_FFd9.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd9.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 2 | LAN_SM_FSM_FFd1 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 4 | 10 | 0 | 10 | 15 | 8 | 3 | 8 | 1 INPUTS | 8 | LAN_BASEADR<1> | A<17>.PIN | LAN_SM_RST | LAN_BASEADR<2> | A<18>.PIN | LAN_BASEADR<3> | A<19>.PIN | Z3_ADR<11>.EXP INPUTMC | 5 | 0 | 10 | 11 | 5 | 0 | 8 | 7 | 10 | 8 | 3 INPUTP | 3 | 172 | 171 | 169 EXPORTS | 1 | 8 | 1 IMPORTS | 1 | 8 | 3 EQ | 8 | !LAN_SM_FSM_FFd1.D = ;Imported pterms FB9_4 !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; LAN_SM_FSM_FFd1.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd1.AR = LAN_SM_RST; LAN_SM_FSM_FFd1.EXP = !LAN_BASEADR<1> & A<17>.PIN # LAN_BASEADR<2> & !A<18>.PIN # !LAN_BASEADR<2> & A<18>.PIN # LAN_BASEADR<3> & !A<19>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 7 | LAN_SM_FSM_FFd11 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 4 | 14 | 4 | 14 | 8 | 10 | 0 | 14 | 7 INPUTS | 9 | UDS | RW | Z3_ADR<13> | LAN_SM_FSM_FFd13 | LDS | LAN_SM_RST | LAN_SM_FSM_FFd10 | LAN_SM_FSM_FFd6 | LAN_SM_FSM_FFd11 INPUTMC | 6 | 13 | 9 | 8 | 8 | 11 | 5 | 11 | 3 | 14 | 10 | 14 | 7 INPUTP | 3 | 155 | 158 | 157 EXPORTS | 1 | 14 | 8 EQ | 8 | LAN_SM_FSM_FFd11.D = !UDS & RW & !Z3_ADR<13> & LAN_SM_FSM_FFd13 # !LDS & RW & !Z3_ADR<13> & LAN_SM_FSM_FFd13; LAN_SM_FSM_FFd11.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd11.AR = LAN_SM_RST; LAN_SM_FSM_FFd11.EXP = !RW & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd6 & !LAN_SM_FSM_FFd11 # !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd6 & !LAN_SM_FSM_FFd11 & Z3_ADR<13> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 17 | LAN_SM_FSM_FFd4 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 3 | 14 | 5 | 10 | 0 | 8 | 0 INPUTS | 6 | LAN_SM_FSM_FFd9 | LAN_SM_RST | LAN_BASEADR<3> | A<19>.PIN | LAN_BASEADR<4> | A<20>.PIN INPUTMC | 4 | 14 | 6 | 11 | 5 | 7 | 10 | 7 | 8 INPUTP | 2 | 169 | 167 EXPORTS | 1 | 8 | 0 EQ | 6 | LAN_SM_FSM_FFd4.D = LAN_SM_FSM_FFd9; LAN_SM_FSM_FFd4.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd4.AR = LAN_SM_RST; LAN_SM_FSM_FFd4.EXP = !LAN_BASEADR<3> & A<19>.PIN # LAN_BASEADR<4> & !A<20>.PIN # !LAN_BASEADR<4> & A<20>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 4 | 0 | AUTOCONFIG_Z2_ACCESS ATTRIBUTES | 8520496 | 0 OUTPUTMC | 89 | 6 | 9 | 6 | 3 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 1 | 17 | 3 | 2 | 7 | 14 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 0 | 10 | 0 | 8 | 7 | 10 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 7 | 5 | 0 | 1 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 10 | 0 | 4 | 0 | 2 | 1 | 9 | 1 | 13 | 1 | 15 | 4 | 11 | 6 | 0 | 7 | 17 | 3 | 0 | 6 | 7 | 6 | 13 | 6 | 16 | 13 | 1 | 13 | 13 | 0 | 5 | 0 | 6 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 0 | 16 | 1 | 4 | 1 | 5 | 1 | 7 | 1 | 11 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 3 | 13 | 4 | 8 | 4 | 10 | 4 | 12 | 4 | 15 | 4 | 17 | 6 | 5 | 6 | 10 | 7 | 4 | 7 | 7 | 7 | 9 | 7 | 16 | 13 | 0 | 13 | 2 INPUTS | 14 | AUTO_CONFIG_Z2_DONE<0> | A<23>.PIN | A<22>.PIN | A<21>.PIN | A<19>.PIN | CFIN | A<17>.PIN | A<16>.PIN | A<20>.PIN | A<18>.PIN | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | AS | RESET INPUTMC | 3 | 13 | 17 | 13 | 3 | 4 | 5 INPUTP | 11 | 161 | 162 | 163 | 169 | 190 | 172 | 175 | 167 | 171 | 152 | 263 EQ | 11 | AUTOCONFIG_Z2_ACCESS.D = !AUTO_CONFIG_Z2_DONE<0> & A<23>.PIN & A<22>.PIN & A<21>.PIN & A<19>.PIN & !CFIN & !A<17>.PIN & !A<16>.PIN & !A<20>.PIN & !A<18>.PIN # !AUTO_CONFIG_Z2_DONE<1> & A<23>.PIN & A<22>.PIN & A<21>.PIN & A<19>.PIN & !CFIN & !A<17>.PIN & !A<16>.PIN & !A<20>.PIN & !A<18>.PIN # !AUTO_CONFIG_Z2_DONE<2> & A<23>.PIN & A<22>.PIN & A<21>.PIN & A<19>.PIN & !CFIN & !A<17>.PIN & !A<16>.PIN & !A<20>.PIN & !A<18>.PIN; AUTOCONFIG_Z2_ACCESS.CLK = !AS; AUTOCONFIG_Z2_ACCESS.AR = !RESET; MACROCELL | 13 | 9 | Z3_ADR<13> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 5 | 7 | 7 | 11 | 2 | 14 | 1 | 14 | 6 | 14 | 7 INPUTS | 3 | A<15>.PIN | FCS | RESET INPUTP | 3 | 139 | 147 | 263 EQ | 3 | Z3_ADR<13>.D = A<15>.PIN; Z3_ADR<13>.CLK = !FCS; Z3_ADR<13>.AP = !RESET; MACROCELL | 8 | 1 | LAN_ACCESS ATTRIBUTES | 8520496 | 0 OUTPUTMC | 84 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 9 | 15 | 11 | 9 | 9 | 1 | 7 | 3 | 1 | 0 | 11 | 11 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 10 | 0 | 2 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 12 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 7 | 9 | 9 | 9 | 10 | 11 | 5 | 7 | 7 | 13 | 13 | 13 | 2 | 1 | 15 | 0 | 5 | 0 | 6 | 1 | 1 | 1 | 8 | 1 | 16 | 1 | 17 | 3 | 2 | 4 | 8 | 4 | 10 | 4 | 12 | 4 | 15 | 4 | 17 | 6 | 1 | 6 | 3 | 6 | 5 | 6 | 10 | 7 | 0 | 9 | 0 | 9 | 5 | 9 | 6 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 11 | 3 | 11 | 6 | 11 | 8 | 11 | 10 INPUTS | 7 | Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D | $OpTx$FX_DC$83 | $OpTx$FX_DC$84 | EXP42_.EXP | LAN_SM_FSM_FFd1.EXP | FCS | RESET INPUTMC | 5 | 2 | 5 | 2 | 10 | 2 | 9 | 8 | 0 | 8 | 2 INPUTP | 2 | 147 | 263 IMPORTS | 2 | 8 | 0 | 8 | 2 EQ | 21 | !LAN_ACCESS.D = Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D # $OpTx$FX_DC$83 # $OpTx$FX_DC$84 ;Imported pterms FB9_1 # $OpTx$INV$62 # $OpTx$INV$61 # LAN_BASEADR<0> & !A<16>.PIN # !LAN_BASEADR<0> & A<16>.PIN # LAN_BASEADR<1> & !A<17>.PIN ;Imported pterms FB9_18 # !LAN_BASEADR<3> & A<19>.PIN # LAN_BASEADR<4> & !A<20>.PIN # !LAN_BASEADR<4> & A<20>.PIN ;Imported pterms FB9_3 # !LAN_BASEADR<1> & A<17>.PIN # LAN_BASEADR<2> & !A<18>.PIN # !LAN_BASEADR<2> & A<18>.PIN # LAN_BASEADR<3> & !A<19>.PIN; LAN_ACCESS.CLK = !FCS; LAN_ACCESS.AR = !RESET; MACROCELL | 13 | 4 | IDE_ACCESS ATTRIBUTES | 8520496 | 0 OUTPUTMC | 5 | 8 | 9 | 13 | 6 | 8 | 14 | 13 | 7 | 13 | 13 INPUTS | 5 | IDE_BASEADR<6> | A<22>.PIN | $OpTx$INV$63 | AS | RESET INPUTMC | 2 | 3 | 3 | 8 | 5 INPUTP | 3 | 162 | 152 | 263 EQ | 4 | IDE_ACCESS.D = IDE_BASEADR<6> & A<22>.PIN & !$OpTx$INV$63 # !IDE_BASEADR<6> & !A<22>.PIN & !$OpTx$INV$63; IDE_ACCESS.CLK = !AS; IDE_ACCESS.AR = !RESET; MACROCELL | 5 | 15 | LAN_D_INIT<1> ATTRIBUTES | 8553232 | 0 OUTPUTMC | 3 | 9 | 1 | 9 | 0 | 11 | 11 INPUTS | 5 | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd3 | LAN_RST_SM_FSM_FFd2 | LAN_RST_SM_FSM_FFd4 | RESET INPUTMC | 4 | 5 | 12 | 5 | 10 | 5 | 11 | 5 | 8 INPUTP | 1 | 263 EQ | 4 | !LAN_D_INIT<1>.D = !LAN_RST_SM_FSM_FFd1 & !LAN_RST_SM_FSM_FFd3 & !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd4; LAN_D_INIT<1>.CLK = CLK_EXT; // GCK LAN_D_INIT<1>.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 14 | LAN_D_INIT<8> ATTRIBUTES | 8553232 | 0 OUTPUTMC | 3 | 9 | 16 | 11 | 9 | 1 | 0 INPUTS | 5 | LAN_RST_SM_FSM_FFd6 | LAN_RST_SM_FSM_FFd5 | LAN_RST_SM_FSM_FFd7 | LAN_A_INIT<3> | RESET INPUTMC | 4 | 5 | 3 | 5 | 6 | 2 | 6 | 2 | 3 INPUTP | 1 | 263 EQ | 4 | !LAN_D_INIT<8>.D = !LAN_RST_SM_FSM_FFd6 & !LAN_RST_SM_FSM_FFd5 & !LAN_RST_SM_FSM_FFd7 & !LAN_A_INIT<3>; LAN_D_INIT<8>.CLK = CLK_EXT; // GCK LAN_D_INIT<8>.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 12 | LAN_RST_SM_FSM_FFd1 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 3 | 5 | 15 | 5 | 12 | 5 | 16 INPUTS | 3 | LAN_RST_SM_FSM_FFd1 | LAN_RST_SM_FSM_FFd2 | RESET INPUTMC | 2 | 5 | 12 | 5 | 11 INPUTP | 1 | 263 EQ | 3 | !LAN_RST_SM_FSM_FFd1.D = !LAN_RST_SM_FSM_FFd1 & !LAN_RST_SM_FSM_FFd2; LAN_RST_SM_FSM_FFd1.CLK = CLK_EXT; // GCK LAN_RST_SM_FSM_FFd1.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 10 | LAN_RST_SM_FSM_FFd3 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 3 | 5 | 15 | 5 | 11 | 5 | 0 INPUTS | 2 | LAN_RST_SM_FSM_FFd4 | RESET INPUTMC | 1 | 5 | 8 INPUTP | 1 | 263 EQ | 3 | LAN_RST_SM_FSM_FFd3.D = LAN_RST_SM_FSM_FFd4; LAN_RST_SM_FSM_FFd3.CLK = CLK_EXT; // GCK LAN_RST_SM_FSM_FFd3.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 3 | LAN_RST_SM_FSM_FFd6 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 4 | 5 | 14 | 5 | 6 | 5 | 0 | 5 | 17 INPUTS | 2 | LAN_RST_SM_FSM_FFd7 | RESET INPUTMC | 1 | 2 | 6 INPUTP | 1 | 263 EQ | 3 | LAN_RST_SM_FSM_FFd6.D = LAN_RST_SM_FSM_FFd7; LAN_RST_SM_FSM_FFd6.CLK = CLK_EXT; // GCK LAN_RST_SM_FSM_FFd6.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 9 | IDE_ENABLE ATTRIBUTES | 8520672 | 0 OUTPUTMC | 3 | 13 | 6 | 13 | 7 | 8 | 10 INPUTS | 8 | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | AS | RW | IDE_ACCESS | DQ_SWAP | DQ<8>.PIN | DQ<0>.PIN INPUTMC | 3 | 2 | 4 | 13 | 4 | 8 | 11 INPUTP | 5 | 263 | 152 | 158 | 231 | 217 EXPORTS | 1 | 8 | 10 EQ | 6 | IDE_ENABLE.D = Gnd; IDE_ENABLE.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; IDE_ENABLE.AP = !RESET; IDE_ENABLE.CE = !AS & !RW & IDE_ACCESS; IDE_ENABLE.EXP = DQ_SWAP & DQ<8>.PIN # !DQ_SWAP & DQ<0>.PIN MACROCELL | 15 | 0 | DQ_DATA<0> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 15 | 0 | 9 | 3 INPUTS | 11 | DQ_DATA<0> | $OpTx$FX_DC$1248 | A<16>.PIN | DQ_SWAP | LAN_SM_FSM_FFd3 | A<8>.PIN | UDS | LAN_SM_FSM_FFd13 | D<0>.PIN | EXP66_.EXP | LAN_SM_RST INPUTMC | 7 | 15 | 0 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 15 | 17 | 11 | 5 INPUTP | 4 | 175 | 106 | 155 | 4 IMPORTS | 1 | 15 | 17 EQ | 14 | DQ_DATA<0>.D = DQ_DATA<0> & !$OpTx$FX_DC$1248 # A<16>.PIN & DQ_SWAP & LAN_SM_FSM_FFd3 # !DQ_SWAP & LAN_SM_FSM_FFd3 & A<8>.PIN # !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<0>.PIN ;Imported pterms FB16_18 # D<8>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<8>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<0>.PIN # UDS & LDS & A<16>.PIN & DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & !DQ_SWAP & A<8>.PIN & LAN_SM_FSM_FFd13; DQ_DATA<0>.CLK = CLK_EXT; // GCK DQ_DATA<0>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 0 | DQ_DATA<10> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 9 | 15 | 12 | 0 | 9 | 14 INPUTS | 11 | DQ_DATA<10> | $OpTx$FX_DC$1248 | DQ_SWAP | LAN_SM_FSM_FFd3 | A<10>.PIN | A<18>.PIN | D<10>.PIN | UDS | LAN_SM_FSM_FFd13 | CP_RD_OBUF.EXP | LAN_SM_RST INPUTMC | 7 | 12 | 0 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 12 | 1 | 11 | 5 INPUTP | 4 | 112 | 171 | 74 | 155 IMPORTS | 1 | 12 | 1 EQ | 14 | DQ_DATA<10>.D = DQ_DATA<10> & !$OpTx$FX_DC$1248 # DQ_SWAP & LAN_SM_FSM_FFd3 & A<10>.PIN # !DQ_SWAP & LAN_SM_FSM_FFd3 & A<18>.PIN # D<10>.PIN & !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 ;Imported pterms FB13_2 # D<10>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<2>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<2>.PIN # UDS & LDS & DQ_SWAP & A<10>.PIN & LAN_SM_FSM_FFd13 # UDS & LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & A<18>.PIN; DQ_DATA<10>.CLK = CLK_EXT; // GCK DQ_DATA<10>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 0 | DQ_DATA<11> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 11 | 8 | 11 | 0 | 11 | 7 INPUTS | 12 | DQ_DATA<11> | $OpTx$FX_DC$1248 | DQ_SWAP | LAN_SM_FSM_FFd3 | A<11>.PIN | A<19>.PIN | D<11>.PIN | UDS | LAN_SM_FSM_FFd13 | ROM_B_0_OBUF$BUF4.EXP | DQ_DATA<13>.EXP | LAN_SM_RST INPUTMC | 8 | 11 | 0 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 11 | 1 | 11 | 17 | 11 | 5 INPUTP | 4 | 114 | 169 | 77 | 155 IMPORTS | 2 | 11 | 1 | 11 | 17 EQ | 15 | DQ_DATA<11>.D = DQ_DATA<11> & !$OpTx$FX_DC$1248 # A<19>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd3 # DQ_SWAP & LAN_SM_FSM_FFd3 & A<11>.PIN # D<11>.PIN & !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 ;Imported pterms FB12_2 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<3>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<3>.PIN # UDS & LDS & A<19>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & DQ_SWAP & A<11>.PIN & LAN_SM_FSM_FFd13 ;Imported pterms FB12_18 # D<11>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13; DQ_DATA<11>.CLK = CLK_EXT; // GCK DQ_DATA<11>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 17 | DQ_DATA<12> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 7 | 0 | 12 | 17 INPUTS | 11 | DQ_DATA<12> | $OpTx$FX_DC$1248 | DQ_SWAP | LAN_SM_FSM_FFd3 | A<12>.PIN | A<20>.PIN | D<12>.PIN | UDS | LAN_SM_FSM_FFd13 | EXP63_.EXP | LAN_SM_RST INPUTMC | 7 | 12 | 17 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 12 | 16 | 11 | 5 INPUTP | 4 | 115 | 167 | 78 | 155 IMPORTS | 1 | 12 | 16 EQ | 14 | DQ_DATA<12>.D = DQ_DATA<12> & !$OpTx$FX_DC$1248 # DQ_SWAP & LAN_SM_FSM_FFd3 & A<12>.PIN # !DQ_SWAP & LAN_SM_FSM_FFd3 & A<20>.PIN # D<12>.PIN & !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 ;Imported pterms FB13_17 # D<12>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<4>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<4>.PIN # UDS & LDS & DQ_SWAP & A<12>.PIN & LAN_SM_FSM_FFd13 # UDS & LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & A<20>.PIN; DQ_DATA<12>.CLK = CLK_EXT; // GCK DQ_DATA<12>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 17 | DQ_DATA<13> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 11 | 6 | 11 | 17 | 11 | 0 INPUTS | 11 | DQ_DATA<13> | $OpTx$FX_DC$1248 | DQ_SWAP | LAN_SM_FSM_FFd3 | A<13>.PIN | A<21>.PIN | D<11>.PIN | LDS | LAN_SM_FSM_FFd13 | EXP56_.EXP | LAN_SM_RST INPUTMC | 7 | 11 | 17 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 11 | 16 | 11 | 5 INPUTP | 4 | 123 | 163 | 77 | 157 EXPORTS | 1 | 11 | 0 IMPORTS | 1 | 11 | 16 EQ | 16 | DQ_DATA<13>.D = DQ_DATA<13> & !$OpTx$FX_DC$1248 # A<21>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd3 # DQ_SWAP & LAN_SM_FSM_FFd3 & A<13>.PIN ;Imported pterms FB12_17 # D<13>.PIN & !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # D<13>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<5>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<5>.PIN # UDS & LDS & DQ_SWAP & A<13>.PIN & LAN_SM_FSM_FFd13 ;Imported pterms FB12_16 # UDS & LDS & A<21>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd13; DQ_DATA<13>.CLK = CLK_EXT; // GCK DQ_DATA<13>.AP = LAN_SM_RST; DQ_DATA<13>.EXP = D<11>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 15 | DQ_DATA<14> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 12 | 15 | 7 | 3 INPUTS | 11 | DQ_DATA<14> | $OpTx$FX_DC$1248 | DQ_SWAP | LAN_SM_FSM_FFd3 | A<14>.PIN | A<22>.PIN | D<14>.PIN | UDS | LAN_SM_FSM_FFd13 | EXP62_.EXP | LAN_SM_RST INPUTMC | 7 | 12 | 15 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 12 | 14 | 11 | 5 INPUTP | 4 | 125 | 162 | 81 | 155 IMPORTS | 1 | 12 | 14 EQ | 14 | DQ_DATA<14>.D = DQ_DATA<14> & !$OpTx$FX_DC$1248 # A<22>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd3 # DQ_SWAP & LAN_SM_FSM_FFd3 & A<14>.PIN # D<14>.PIN & !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 ;Imported pterms FB13_15 # D<14>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<6>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<6>.PIN # UDS & LDS & A<22>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & DQ_SWAP & A<14>.PIN & LAN_SM_FSM_FFd13; DQ_DATA<14>.CLK = CLK_EXT; // GCK DQ_DATA<14>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 12 | DQ_DATA<15> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 11 | 3 | 12 | 12 | 11 | 5 INPUTS | 12 | DQ_DATA<15> | $OpTx$FX_DC$1248 | DQ_SWAP | LAN_SM_FSM_FFd3 | A<15>.PIN | A<23>.PIN | D<15>.PIN | UDS | LAN_SM_FSM_FFd13 | EXP61_.EXP | LAN_WRL_OBUF.EXP | LAN_SM_RST INPUTMC | 8 | 12 | 12 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 12 | 11 | 12 | 13 | 11 | 5 INPUTP | 4 | 139 | 161 | 89 | 155 IMPORTS | 2 | 12 | 11 | 12 | 13 EQ | 15 | DQ_DATA<15>.D = DQ_DATA<15> & !$OpTx$FX_DC$1248 # A<23>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd3 # DQ_SWAP & LAN_SM_FSM_FFd3 & A<15>.PIN # D<15>.PIN & !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 ;Imported pterms FB13_12 # D<15>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<7>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<7>.PIN # UDS & LDS & DQ_SWAP & A<15>.PIN & LAN_SM_FSM_FFd13 ;Imported pterms FB13_14 # UDS & LDS & A<23>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd13; DQ_DATA<15>.CLK = CLK_EXT; // GCK DQ_DATA<15>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 0 | DQ_DATA<1> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 9 | 0 | 14 | 0 | 9 | 2 INPUTS | 12 | DQ_DATA<1> | $OpTx$FX_DC$1248 | A<17>.PIN | DQ_SWAP | LAN_SM_FSM_FFd3 | A<9>.PIN | UDS | LAN_SM_FSM_FFd13 | D<1>.PIN | LAN_SM_FSM_FFd12.EXP | LAN_SM_FSM_FFd5.EXP | LAN_SM_RST INPUTMC | 8 | 14 | 0 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 14 | 1 | 14 | 17 | 11 | 5 INPUTP | 4 | 172 | 108 | 155 | 30 IMPORTS | 2 | 14 | 1 | 14 | 17 EQ | 15 | DQ_DATA<1>.D = DQ_DATA<1> & !$OpTx$FX_DC$1248 # A<17>.PIN & DQ_SWAP & LAN_SM_FSM_FFd3 # !DQ_SWAP & LAN_SM_FSM_FFd3 & A<9>.PIN # !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<1>.PIN ;Imported pterms FB15_2 # UDS & LDS & A<17>.PIN & DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & !DQ_SWAP & A<9>.PIN & LAN_SM_FSM_FFd13 ;Imported pterms FB15_18 # D<9>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<9>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<1>.PIN; DQ_DATA<1>.CLK = CLK_EXT; // GCK DQ_DATA<1>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 9 | DQ_DATA<2> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 12 | 9 | 9 | 6 | 9 | 7 INPUTS | 11 | DQ_DATA<2> | $OpTx$FX_DC$1248 | DQ_SWAP | LAN_SM_FSM_FFd3 | A<18>.PIN | A<10>.PIN | UDS | LAN_SM_FSM_FFd13 | D<2>.PIN | EXP60_.EXP | LAN_SM_RST INPUTMC | 7 | 12 | 9 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 12 | 8 | 11 | 5 INPUTP | 4 | 171 | 112 | 155 | 71 IMPORTS | 1 | 12 | 8 EQ | 14 | DQ_DATA<2>.D = DQ_DATA<2> & !$OpTx$FX_DC$1248 # DQ_SWAP & LAN_SM_FSM_FFd3 & A<18>.PIN # !DQ_SWAP & LAN_SM_FSM_FFd3 & A<10>.PIN # !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<2>.PIN ;Imported pterms FB13_9 # D<10>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<10>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<2>.PIN # UDS & LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & A<18>.PIN # UDS & LDS & !DQ_SWAP & A<10>.PIN & LAN_SM_FSM_FFd13; DQ_DATA<2>.CLK = CLK_EXT; // GCK DQ_DATA<2>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 15 | DQ_DATA<3> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 11 | 15 | 9 | 5 | 11 | 16 INPUTS | 12 | DQ_DATA<3> | $OpTx$FX_DC$1248 | A<19>.PIN | DQ_SWAP | LAN_SM_FSM_FFd3 | A<11>.PIN | UDS | LDS | A<21>.PIN | LAN_SM_FSM_FFd13 | EXP55_.EXP | LAN_SM_RST INPUTMC | 7 | 11 | 15 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 11 | 14 | 11 | 5 INPUTP | 5 | 169 | 114 | 155 | 157 | 163 EXPORTS | 1 | 11 | 16 IMPORTS | 1 | 11 | 14 EQ | 17 | DQ_DATA<3>.D = DQ_DATA<3> & !$OpTx$FX_DC$1248 # A<19>.PIN & DQ_SWAP & LAN_SM_FSM_FFd3 # !DQ_SWAP & LAN_SM_FSM_FFd3 & A<11>.PIN ;Imported pterms FB12_15 # D<11>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<11>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<3>.PIN # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<3>.PIN # UDS & LDS & A<19>.PIN & DQ_SWAP & LAN_SM_FSM_FFd13 ;Imported pterms FB12_14 # UDS & LDS & !DQ_SWAP & A<11>.PIN & LAN_SM_FSM_FFd13; DQ_DATA<3>.CLK = CLK_EXT; // GCK DQ_DATA<3>.AP = LAN_SM_RST; DQ_DATA<3>.EXP = UDS & LDS & A<21>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd13 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 6 | DQ_DATA<4> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 12 | 6 | 9 | 16 | 9 | 17 INPUTS | 11 | DQ_DATA<4> | $OpTx$FX_DC$1248 | DQ_SWAP | LAN_SM_FSM_FFd3 | A<20>.PIN | A<12>.PIN | UDS | LAN_SM_FSM_FFd13 | D<4>.PIN | EXP59_.EXP | LAN_SM_RST INPUTMC | 7 | 12 | 6 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 12 | 5 | 11 | 5 INPUTP | 4 | 167 | 115 | 155 | 38 IMPORTS | 1 | 12 | 5 EQ | 14 | DQ_DATA<4>.D = DQ_DATA<4> & !$OpTx$FX_DC$1248 # DQ_SWAP & LAN_SM_FSM_FFd3 & A<20>.PIN # !DQ_SWAP & LAN_SM_FSM_FFd3 & A<12>.PIN # !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<4>.PIN ;Imported pterms FB13_6 # D<12>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<12>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<4>.PIN # UDS & LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & A<20>.PIN # UDS & LDS & !DQ_SWAP & A<12>.PIN & LAN_SM_FSM_FFd13; DQ_DATA<4>.CLK = CLK_EXT; // GCK DQ_DATA<4>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 11 | 13 | DQ_DATA<5> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 4 | 11 | 13 | 9 | 8 | 9 | 9 | 11 | 14 INPUTS | 12 | DQ_DATA<5> | $OpTx$FX_DC$1248 | A<21>.PIN | DQ_SWAP | LAN_SM_FSM_FFd3 | A<13>.PIN | UDS | LDS | A<11>.PIN | LAN_SM_FSM_FFd13 | EXP54_.EXP | LAN_SM_RST INPUTMC | 7 | 11 | 13 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 11 | 12 | 11 | 5 INPUTP | 5 | 163 | 123 | 155 | 157 | 114 EXPORTS | 1 | 11 | 14 IMPORTS | 1 | 11 | 12 EQ | 17 | DQ_DATA<5>.D = DQ_DATA<5> & !$OpTx$FX_DC$1248 # A<21>.PIN & DQ_SWAP & LAN_SM_FSM_FFd3 # !DQ_SWAP & LAN_SM_FSM_FFd3 & A<13>.PIN ;Imported pterms FB12_13 # D<13>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<13>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<5>.PIN # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<5>.PIN # UDS & LDS & A<21>.PIN & DQ_SWAP & LAN_SM_FSM_FFd13 ;Imported pterms FB12_12 # UDS & LDS & !DQ_SWAP & A<13>.PIN & LAN_SM_FSM_FFd13; DQ_DATA<5>.CLK = CLK_EXT; // GCK DQ_DATA<5>.AP = LAN_SM_RST; DQ_DATA<5>.EXP = UDS & LDS & !DQ_SWAP & A<11>.PIN & LAN_SM_FSM_FFd13 GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 12 | 4 | DQ_DATA<6> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 12 | 4 | 9 | 12 | 9 | 13 INPUTS | 11 | DQ_DATA<6> | $OpTx$FX_DC$1248 | A<22>.PIN | DQ_SWAP | LAN_SM_FSM_FFd3 | A<14>.PIN | UDS | LAN_SM_FSM_FFd13 | D<6>.PIN | EXP58_.EXP | LAN_SM_RST INPUTMC | 7 | 12 | 4 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 12 | 3 | 11 | 5 INPUTP | 4 | 162 | 125 | 155 | 26 IMPORTS | 1 | 12 | 3 EQ | 14 | DQ_DATA<6>.D = DQ_DATA<6> & !$OpTx$FX_DC$1248 # A<22>.PIN & DQ_SWAP & LAN_SM_FSM_FFd3 # !DQ_SWAP & LAN_SM_FSM_FFd3 & A<14>.PIN # !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<6>.PIN ;Imported pterms FB13_4 # D<14>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<14>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<6>.PIN # UDS & LDS & A<22>.PIN & DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & !DQ_SWAP & A<14>.PIN & LAN_SM_FSM_FFd13; DQ_DATA<6>.CLK = CLK_EXT; // GCK DQ_DATA<6>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 12 | DQ_DATA<7> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 14 | 12 | 9 | 11 INPUTS | 12 | DQ_DATA<7> | $OpTx$FX_DC$1248 | A<23>.PIN | DQ_SWAP | LAN_SM_FSM_FFd3 | A<15>.PIN | UDS | LAN_SM_FSM_FFd13 | D<7>.PIN | ROM_B_0_OBUF$BUF10.EXP | Z3_DATA<15>.EXP | LAN_SM_RST INPUTMC | 8 | 14 | 12 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 14 | 11 | 14 | 13 | 11 | 5 INPUTP | 4 | 161 | 139 | 155 | 29 IMPORTS | 2 | 14 | 11 | 14 | 13 EQ | 15 | DQ_DATA<7>.D = DQ_DATA<7> & !$OpTx$FX_DC$1248 # A<23>.PIN & DQ_SWAP & LAN_SM_FSM_FFd3 # !DQ_SWAP & LAN_SM_FSM_FFd3 & A<15>.PIN # !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<7>.PIN ;Imported pterms FB15_12 # D<15>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<15>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<7>.PIN # UDS & LDS & A<23>.PIN & DQ_SWAP & LAN_SM_FSM_FFd13 ;Imported pterms FB15_14 # UDS & LDS & !DQ_SWAP & A<15>.PIN & LAN_SM_FSM_FFd13; DQ_DATA<7>.CLK = CLK_EXT; // GCK DQ_DATA<7>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 15 | 4 | DQ_DATA<8> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 2 | 15 | 4 | 1 | 1 INPUTS | 11 | DQ_DATA<8> | $OpTx$FX_DC$1248 | DQ_SWAP | LAN_SM_FSM_FFd3 | A<8>.PIN | A<16>.PIN | D<8>.PIN | UDS | LAN_SM_FSM_FFd13 | EXP65_.EXP | LAN_SM_RST INPUTMC | 7 | 15 | 4 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 15 | 3 | 11 | 5 INPUTP | 4 | 106 | 175 | 32 | 155 IMPORTS | 1 | 15 | 3 EQ | 14 | DQ_DATA<8>.D = DQ_DATA<8> & !$OpTx$FX_DC$1248 # A<16>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd3 # DQ_SWAP & LAN_SM_FSM_FFd3 & A<8>.PIN # D<8>.PIN & !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 ;Imported pterms FB16_4 # D<8>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<0>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<0>.PIN # UDS & LDS & A<16>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & DQ_SWAP & A<8>.PIN & LAN_SM_FSM_FFd13; DQ_DATA<8>.CLK = CLK_EXT; // GCK DQ_DATA<8>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 9 | DQ_DATA<9> ATTRIBUTES | 8553344 | 0 OUTPUTMC | 3 | 11 | 10 | 14 | 9 | 11 | 9 INPUTS | 12 | DQ_DATA<9> | $OpTx$FX_DC$1248 | DQ_SWAP | LAN_SM_FSM_FFd3 | A<9>.PIN | A<17>.PIN | D<9>.PIN | UDS | LAN_SM_FSM_FFd13 | LAN_RD_S.EXP | LAN_SM_FSM_FFd6.EXP | LAN_SM_RST INPUTMC | 8 | 14 | 9 | 10 | 0 | 8 | 11 | 14 | 5 | 8 | 8 | 14 | 8 | 14 | 10 | 11 | 5 INPUTP | 4 | 108 | 172 | 73 | 155 IMPORTS | 2 | 14 | 8 | 14 | 10 EQ | 15 | DQ_DATA<9>.D = DQ_DATA<9> & !$OpTx$FX_DC$1248 # A<17>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd3 # DQ_SWAP & LAN_SM_FSM_FFd3 & A<9>.PIN # D<9>.PIN & !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 ;Imported pterms FB15_9 # D<9>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<1>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<1>.PIN ;Imported pterms FB15_11 # UDS & LDS & A<17>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & DQ_SWAP & A<9>.PIN & LAN_SM_FSM_FFd13; DQ_DATA<9>.CLK = CLK_EXT; // GCK DQ_DATA<9>.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 11 | LAN_RST_SM_FSM_FFd2 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 2 | 5 | 15 | 5 | 12 INPUTS | 2 | LAN_RST_SM_FSM_FFd3 | RESET INPUTMC | 1 | 5 | 10 INPUTP | 1 | 263 EQ | 3 | LAN_RST_SM_FSM_FFd2.D = LAN_RST_SM_FSM_FFd3; LAN_RST_SM_FSM_FFd2.CLK = CLK_EXT; // GCK LAN_RST_SM_FSM_FFd2.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 8 | LAN_RST_SM_FSM_FFd4 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 2 | 5 | 15 | 5 | 10 INPUTS | 2 | LAN_RST_SM_FSM_FFd5 | RESET INPUTMC | 1 | 5 | 6 INPUTP | 1 | 263 EQ | 3 | LAN_RST_SM_FSM_FFd4.D = LAN_RST_SM_FSM_FFd5; LAN_RST_SM_FSM_FFd4.CLK = CLK_EXT; // GCK LAN_RST_SM_FSM_FFd4.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 6 | LAN_RST_SM_FSM_FFd5 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 3 | 5 | 14 | 5 | 8 | 5 | 17 INPUTS | 2 | LAN_RST_SM_FSM_FFd6 | RESET INPUTMC | 1 | 5 | 3 INPUTP | 1 | 263 EQ | 3 | LAN_RST_SM_FSM_FFd5.D = LAN_RST_SM_FSM_FFd6; LAN_RST_SM_FSM_FFd5.CLK = CLK_EXT; // GCK LAN_RST_SM_FSM_FFd5.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 2 | 6 | LAN_RST_SM_FSM_FFd7 ATTRIBUTES | 8553232 | 0 OUTPUTMC | 3 | 5 | 14 | 5 | 3 | 5 | 17 INPUTS | 2 | LAN_A_INIT<3> | RESET INPUTMC | 1 | 2 | 3 INPUTP | 1 | 263 EQ | 3 | LAN_RST_SM_FSM_FFd7.D = LAN_A_INIT<3>; LAN_RST_SM_FSM_FFd7.CLK = CLK_EXT; // GCK LAN_RST_SM_FSM_FFd7.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 0 | LAN_WR_RST ATTRIBUTES | 8553232 | 0 OUTPUTMC | 2 | 7 | 4 | 12 | 13 INPUTS | 3 | LAN_RST_SM_FSM_FFd3 | LAN_RST_SM_FSM_FFd6 | RESET INPUTMC | 2 | 5 | 10 | 5 | 3 INPUTP | 1 | 263 EQ | 3 | !LAN_WR_RST.D = !LAN_RST_SM_FSM_FFd3 & !LAN_RST_SM_FSM_FFd6; LAN_WR_RST.CLK = CLK_EXT; // GCK LAN_WR_RST.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 6 | 0 | SHUT_UP_Z2<0> ATTRIBUTES | 4326308 | 0 OUTPUTMC | 3 | 6 | 0 | 2 | 16 | 6 | 17 INPUTS | 15 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | SHUT_UP_Z2<0> | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET INPUTMC | 4 | 13 | 17 | 4 | 0 | 6 | 0 | 2 | 4 INPUTP | 11 | 91 | 97 | 101 | 107 | 152 | 155 | 98 | 99 | 158 | 157 | 263 EXPORTS | 1 | 6 | 17 EQ | 10 | SHUT_UP_Z2<0>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<0> # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<0>; SHUT_UP_Z2<0>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; SHUT_UP_Z2<0>.AP = !RESET; SHUT_UP_Z2<0>.EXP = !A<5> & !A<4> & A<2> & A<1> & !AUTO_CONFIG_Z2_DONE<0> MACROCELL | 7 | 17 | SHUT_UP_Z2<1> ATTRIBUTES | 4326308 | 0 OUTPUTMC | 2 | 7 | 17 | 4 | 1 INPUTS | 16 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | SHUT_UP_Z2<1> | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET INPUTMC | 5 | 13 | 17 | 13 | 3 | 4 | 0 | 7 | 17 | 2 | 4 INPUTP | 11 | 91 | 97 | 101 | 107 | 152 | 155 | 98 | 99 | 158 | 157 | 263 EQ | 8 | SHUT_UP_Z2<1>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<1> # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<1>; SHUT_UP_Z2<1>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; SHUT_UP_Z2<1>.AP = !RESET; MACROCELL | 3 | 0 | SHUT_UP_Z2<2> ATTRIBUTES | 4326308 | 0 OUTPUTMC | 3 | 3 | 0 | 8 | 5 | 3 | 17 INPUTS | 19 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | SHUT_UP_Z2<2> | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET | D<8>.PIN | CP_BASEADR<0> INPUTMC | 7 | 13 | 17 | 13 | 3 | 4 | 5 | 4 | 0 | 3 | 0 | 2 | 4 | 3 | 17 INPUTP | 12 | 91 | 97 | 101 | 107 | 152 | 155 | 98 | 99 | 158 | 157 | 263 | 32 EXPORTS | 1 | 3 | 17 EQ | 13 | SHUT_UP_Z2<2>.T = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<2> # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<2>; SHUT_UP_Z2<2>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; SHUT_UP_Z2<2>.AP = !RESET; SHUT_UP_Z2<2>.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<8>.PIN & !CP_BASEADR<0> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 6 | 7 | D_Z2_OUT<0> ATTRIBUTES | 8520612 | 0 OUTPUTMC | 1 | 4 | 17 INPUTS | 7 | AUTOCONFIG_Z2_ACCESS | A<6> | AS | EXP32_.EXP | EXP33_.EXP | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET INPUTMC | 4 | 4 | 0 | 6 | 6 | 6 | 8 | 2 | 4 INPUTP | 3 | 98 | 152 | 263 IMPORTS | 2 | 6 | 6 | 6 | 8 EQ | 18 | D_Z2_OUT<0>.D = AS # A<6> # !AUTOCONFIG_Z2_ACCESS ;Imported pterms FB7_7 # A<5> & A<4> # A<5> & !A<2> # UDS & LDS # A<4> & !A<2> & !A<3> # A<4> & A<1> & !A<3> ;Imported pterms FB7_9 # !A<4> & !A<2> & A<1> # A<2> & !A<1> & A<3> # !A<5> & !A<4> & A<1> & A<3> # !A<5> & A<1> & AUTO_CONFIG_Z2_DONE<0> & !A<3> # !A<5> & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<3>; D_Z2_OUT<0>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; D_Z2_OUT<0>.AP = !RESET; MACROCELL | 6 | 13 | D_Z2_OUT<1> ATTRIBUTES | 8520612 | 0 OUTPUTMC | 1 | 6 | 3 INPUTS | 7 | A<6> | AS | AUTOCONFIG_Z2_ACCESS | EXP35_.EXP | EXP36_.EXP | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET INPUTMC | 4 | 4 | 0 | 6 | 12 | 6 | 14 | 2 | 4 INPUTP | 3 | 98 | 152 | 263 IMPORTS | 2 | 6 | 12 | 6 | 14 EQ | 23 | D_Z2_OUT<1>.D = AS # A<6> # !AUTOCONFIG_Z2_ACCESS ;Imported pterms FB7_13 # A<5> & !A<2> # A<5> & !$OpTx$$OpTx$FX_DC$87_INV$1549 # UDS & LDS # !A<4> & A<2> & A<3> # !A<4> & !A<1> & A<3> ;Imported pterms FB7_12 # A<4> & A<1> & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<3> # A<2> & A<1> & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !A<3> ;Imported pterms FB7_15 # A<4> & A<2> & !AUTO_CONFIG_Z2_DONE<0> & !A<3> # A<4> & !A<2> & A<1> & A<3> # A<4> & !A<2> & !A<1> & !A<3> # A<4> & !A<1> & !AUTO_CONFIG_Z2_DONE<1> & !A<3> # !A<5> & A<2> & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & $OpTx$$OpTx$FX_DC$87_INV$1549; D_Z2_OUT<1>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; D_Z2_OUT<1>.AP = !RESET; MACROCELL | 6 | 16 | D_Z2_OUT<2> ATTRIBUTES | 8520612 | 0 OUTPUTMC | 1 | 6 | 5 INPUTS | 7 | AUTOCONFIG_Z2_ACCESS | A<6> | AS | EXP37_.EXP | EXP38_.EXP | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET INPUTMC | 4 | 4 | 0 | 6 | 15 | 6 | 17 | 2 | 4 INPUTP | 3 | 98 | 152 | 263 IMPORTS | 2 | 6 | 15 | 6 | 17 EQ | 21 | D_Z2_OUT<2>.D = AS # A<6> # !AUTOCONFIG_Z2_ACCESS ;Imported pterms FB7_16 # A<5> & A<4> # A<5> & !A<2> # A<4> & !A<2> # !A<4> & A<3> # A<1> & A<3> ;Imported pterms FB7_18 # A<5> & !A<1> # UDS & LDS # A<4> & !A<1> & !A<3> # !A<2> & !A<1> & AUTO_CONFIG_Z2_DONE<0> # !A<4> & !A<1> & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> ;Imported pterms FB7_1 # !A<5> & !A<4> & A<2> & A<1> & !AUTO_CONFIG_Z2_DONE<0>; D_Z2_OUT<2>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; D_Z2_OUT<2>.AP = !RESET; MACROCELL | 13 | 1 | D_Z2_OUT<3> ATTRIBUTES | 8520612 | 0 OUTPUTMC | 2 | 6 | 10 | 6 | 9 INPUTS | 14 | A<5> | A<4> | A<2> | A<1> | AS | UDS | A<6> | AUTOCONFIG_Z2_ACCESS | LDS | A<3> | EXP64_.EXP | ROM_B_0_OBUF$BUF2.EXP | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET INPUTMC | 4 | 4 | 0 | 13 | 0 | 13 | 2 | 2 | 4 INPUTP | 10 | 91 | 97 | 101 | 107 | 152 | 155 | 98 | 157 | 99 | 263 IMPORTS | 2 | 13 | 0 | 13 | 2 EQ | 28 | !D_Z2_OUT<3>.D = !A<5> & A<4> & A<2> & A<1> & !AS & !UDS & !A<6> & AUTOCONFIG_Z2_ACCESS # !A<5> & A<4> & A<2> & A<1> & !AS & !LDS & !A<6> & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<2> & A<1> & !AS & !UDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB14_1 # !A<5> & !A<2> & A<1> & !AS & !LDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS # !A<5> & A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !UDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS # !A<5> & A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !LDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS # !A<5> & A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !UDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS # !A<5> & A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !LDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS ;Imported pterms FB14_3 # A<5> & !A<4> & A<2> & !A<1> & !AS & !UDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS # A<5> & !A<4> & A<2> & !A<1> & !AS & !LDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS # !A<5> & A<4> & !A<2> & !A<1> & !AS & !UDS & !A<6> & A<3> & AUTOCONFIG_Z2_ACCESS # !A<5> & A<4> & !A<2> & !A<1> & !AS & !LDS & !A<6> & A<3> & AUTOCONFIG_Z2_ACCESS; D_Z2_OUT<3>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; D_Z2_OUT<3>.AP = !RESET; MACROCELL | 13 | 6 | IDE_R_S ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 0 | 16 INPUTS | 6 | AS | RW | IDE_ACCESS | IDE_ENABLE | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET INPUTMC | 3 | 13 | 4 | 8 | 9 | 2 | 4 INPUTP | 3 | 152 | 158 | 263 EQ | 3 | !IDE_R_S.D = !AS & RW & IDE_ACCESS & !IDE_ENABLE; IDE_R_S.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; IDE_R_S.AP = !RESET; MACROCELL | 8 | 14 | IDE_W_S ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 2 | 1 INPUTS | 5 | AS | RW | IDE_ACCESS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET INPUTMC | 2 | 13 | 4 | 2 | 4 INPUTP | 3 | 152 | 158 | 263 EQ | 3 | !IDE_W_S.D = !AS & !RW & IDE_ACCESS; IDE_W_S.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; IDE_W_S.AP = !RESET; MACROCELL | 13 | 7 | ROM_OE_S ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 4 | 4 INPUTS | 6 | AS | RW | IDE_ACCESS | IDE_ENABLE | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | RESET INPUTMC | 3 | 13 | 4 | 8 | 9 | 2 | 4 INPUTP | 3 | 152 | 158 | 263 EQ | 3 | !ROM_OE_S.D = !AS & RW & IDE_ACCESS & IDE_ENABLE; ROM_OE_S.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; ROM_OE_S.AP = !RESET; MACROCELL | 13 | 8 | Z3_ADR<10> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 5 | 7 INPUTS | 3 | A<12>.PIN | FCS | RESET INPUTP | 3 | 115 | 147 | 263 EQ | 3 | Z3_ADR<10>.D = A<12>.PIN; Z3_ADR<10>.CLK = !FCS; Z3_ADR<10>.AP = !RESET; MACROCELL | 8 | 3 | Z3_ADR<11> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 2 | 5 | 2 | 8 | 2 INPUTS | 5 | A<13>.PIN | FCS | RESET | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 INPUTMC | 2 | 8 | 12 | 8 | 2 INPUTP | 3 | 123 | 147 | 263 EXPORTS | 1 | 8 | 2 EQ | 4 | Z3_ADR<11>.D = A<13>.PIN; Z3_ADR<11>.CLK = !FCS; Z3_ADR<11>.AP = !RESET; Z3_ADR<11>.EXP = !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 MACROCELL | 8 | 7 | Z3_ADR<12> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 2 | 5 | 4 | 8 | 6 INPUTS | 5 | A<14>.PIN | FCS | RESET | IDE_BASEADR<7> | A<23>.PIN INPUTMC | 1 | 3 | 2 INPUTP | 4 | 125 | 147 | 263 | 161 EXPORTS | 1 | 8 | 6 EQ | 5 | Z3_ADR<12>.D = A<14>.PIN; Z3_ADR<12>.CLK = !FCS; Z3_ADR<12>.AP = !RESET; Z3_ADR<12>.EXP = IDE_BASEADR<7> & !A<23>.PIN # !IDE_BASEADR<7> & A<23>.PIN MACROCELL | 4 | 7 | Z3_ADR<2> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 3 | 7 INPUTS | 3 | A<4> | FCS | RESET INPUTP | 3 | 97 | 147 | 263 EQ | 3 | Z3_ADR<2>.D = A<4>; Z3_ADR<2>.CLK = !FCS; Z3_ADR<2>.AP = !RESET; MACROCELL | 4 | 8 | Z3_ADR<3> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 2 | 1 | 2 | 4 | 9 INPUTS | 8 | A<5> | FCS | RESET | AS | RW | AUTOCONFIG_Z2_ACCESS | Z3_DATA<18> | LAN_ACCESS INPUTMC | 3 | 4 | 0 | 15 | 8 | 8 | 1 INPUTP | 5 | 91 | 147 | 263 | 152 | 158 EXPORTS | 1 | 4 | 9 EQ | 5 | Z3_ADR<3>.D = A<5>; Z3_ADR<3>.CLK = !FCS; Z3_ADR<3>.AP = !RESET; Z3_ADR<3>.EXP = !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<18> & RW & !FCS & LAN_ACCESS MACROCELL | 4 | 10 | Z3_ADR<4> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 2 | 3 | 13 | 4 | 11 INPUTS | 8 | A<6> | FCS | RESET | AS | RW | AUTOCONFIG_Z2_ACCESS | Z3_DATA<25> | LAN_ACCESS INPUTMC | 3 | 4 | 0 | 15 | 13 | 8 | 1 INPUTP | 5 | 98 | 147 | 263 | 152 | 158 EXPORTS | 1 | 4 | 11 EQ | 5 | Z3_ADR<4>.D = A<6>; Z3_ADR<4>.CLK = !FCS; Z3_ADR<4>.AP = !RESET; Z3_ADR<4>.EXP = !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<25> & RW & !FCS & LAN_ACCESS MACROCELL | 13 | 11 | Z3_ADR<5> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 1 | 4 INPUTS | 3 | A<7> | FCS | RESET INPUTP | 3 | 100 | 147 | 263 EQ | 3 | Z3_ADR<5>.D = A<7>; Z3_ADR<5>.CLK = !FCS; Z3_ADR<5>.AP = !RESET; MACROCELL | 13 | 12 | Z3_ADR<6> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 1 | 2 INPUTS | 3 | A<8>.PIN | FCS | RESET INPUTP | 3 | 106 | 147 | 263 EQ | 3 | Z3_ADR<6>.D = A<8>.PIN; Z3_ADR<6>.CLK = !FCS; Z3_ADR<6>.AP = !RESET; MACROCELL | 13 | 15 | Z3_ADR<7> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 5 | 9 INPUTS | 3 | A<9>.PIN | FCS | RESET INPUTP | 3 | 108 | 147 | 263 EQ | 3 | Z3_ADR<7>.D = A<9>.PIN; Z3_ADR<7>.CLK = !FCS; Z3_ADR<7>.AP = !RESET; MACROCELL | 2 | 12 | Z3_ADR<8> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 5 | 13 INPUTS | 3 | A<10>.PIN | FCS | RESET INPUTP | 3 | 112 | 147 | 263 EQ | 3 | Z3_ADR<8>.D = A<10>.PIN; Z3_ADR<8>.CLK = !FCS; Z3_ADR<8>.AP = !RESET; MACROCELL | 2 | 11 | Z3_ADR<9> ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 5 | 5 INPUTS | 3 | A<11>.PIN | FCS | RESET INPUTP | 3 | 114 | 147 | 263 EQ | 3 | Z3_ADR<9>.D = A<11>.PIN; Z3_ADR<9>.CLK = !FCS; Z3_ADR<9>.AP = !RESET; MACROCELL | 13 | 16 | Z3_ADR_0 ATTRIBUTES | 8520608 | 0 OUTPUTMC | 1 | 3 | 4 INPUTS | 3 | A<2> | FCS | RESET INPUTP | 3 | 101 | 147 | 263 EQ | 3 | Z3_ADR_0.D = A<2>; Z3_ADR_0.CLK = !FCS; Z3_ADR_0.AP = !RESET; MACROCELL | 4 | 12 | Z3_ADR_1 ATTRIBUTES | 8520608 | 0 OUTPUTMC | 2 | 3 | 11 | 4 | 13 INPUTS | 8 | A<3> | FCS | RESET | AS | RW | AUTOCONFIG_Z2_ACCESS | Z3_DATA<26> | LAN_ACCESS INPUTMC | 3 | 4 | 0 | 15 | 14 | 8 | 1 INPUTP | 5 | 99 | 147 | 263 | 152 | 158 EXPORTS | 1 | 4 | 13 EQ | 5 | Z3_ADR_1.D = A<3>; Z3_ADR_1.CLK = !FCS; Z3_ADR_1.AP = !RESET; Z3_ADR_1.EXP = !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<26> & RW & !FCS & LAN_ACCESS MACROCELL | 5 | 17 | LAN_A_INIT<6> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 1 | 1 | 4 INPUTS | 5 | LAN_RST_SM_FSM_FFd6 | LAN_RST_SM_FSM_FFd5 | LAN_RST_SM_FSM_FFd7 | LAN_A_INIT<3> | RESET INPUTMC | 4 | 5 | 3 | 5 | 6 | 2 | 6 | 2 | 3 INPUTP | 1 | 263 EQ | 4 | !LAN_A_INIT<6>.D = !LAN_RST_SM_FSM_FFd6 & !LAN_RST_SM_FSM_FFd5 & !LAN_RST_SM_FSM_FFd7 & !LAN_A_INIT<3>; LAN_A_INIT<6>.CLK = CLK_EXT; // GCK LAN_A_INIT<6>.AP = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 5 | 16 | LAN_CS_RST ATTRIBUTES | 8553232 | 0 OUTPUTMC | 1 | 7 | 7 INPUTS | 3 | LAN_RST_SM_FSM_FFd1 | LAN_A_INIT<3> | RESET INPUTMC | 2 | 5 | 12 | 2 | 3 INPUTP | 1 | 263 EQ | 3 | LAN_CS_RST.D = !LAN_RST_SM_FSM_FFd1 & !LAN_A_INIT<3>; LAN_CS_RST.CLK = CLK_EXT; // GCK LAN_CS_RST.AR = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 15 | LAN_INT_ENABLE ATTRIBUTES | 4358912 | 0 OUTPUTMC | 3 | 14 | 15 | 2 | 13 | 14 | 14 INPUTS | 10 | D<15>.PIN | UDS | RW | LAN_SM_FSM_FFd12 | LAN_INT_ENABLE | LAN_SM_RST | DS1 | A<23>.PIN | DQ_SWAP | DQ<6>.PIN INPUTMC | 4 | 14 | 1 | 14 | 15 | 11 | 5 | 8 | 11 INPUTP | 6 | 89 | 155 | 158 | 148 | 161 | 227 EXPORTS | 1 | 14 | 14 EQ | 10 | LAN_INT_ENABLE.T = D<15>.PIN & !UDS & !RW & LAN_SM_FSM_FFd12 & !LAN_INT_ENABLE & !LAN_SM_RST # !D<15>.PIN & !UDS & !RW & LAN_SM_FSM_FFd12 & LAN_INT_ENABLE & !LAN_SM_RST # UDS & !DS1 & A<23>.PIN & !RW & LAN_SM_FSM_FFd12 & !LAN_INT_ENABLE & !LAN_SM_RST # UDS & !DS1 & !A<23>.PIN & !RW & LAN_SM_FSM_FFd12 & LAN_INT_ENABLE & !LAN_SM_RST; LAN_INT_ENABLE.CLK = CLK_EXT; // GCK LAN_INT_ENABLE.EXP = DQ_SWAP & DQ<6>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 2 | 7 | LAN_IRQ_D0 ATTRIBUTES | 8553344 | 0 OUTPUTMC | 1 | 2 | 0 INPUTS | 2 | LAN_INT | RESET INPUTP | 2 | 201 | 263 EQ | 3 | LAN_IRQ_D0.D = LAN_INT; LAN_IRQ_D0.CLK = CLK_EXT; // GCK LAN_IRQ_D0.AP = !RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 8 | LAN_RD_S ATTRIBUTES | 8553232 | 0 OUTPUTMC | 2 | 7 | 9 | 14 | 9 INPUTS | 11 | LAN_SM_FSM_FFd10 | LAN_SM_FSM_FFd6 | LAN_SM_FSM_FFd11 | LAN_SM_FSM_FFd13 | D<9>.PIN | LDS | LAN_SM_RST | DQ_SWAP | UDS | D<1>.PIN | LAN_SM_FSM_FFd11.EXP INPUTMC | 7 | 11 | 3 | 14 | 10 | 14 | 7 | 8 | 8 | 11 | 5 | 8 | 11 | 14 | 7 INPUTP | 4 | 73 | 157 | 155 | 30 EXPORTS | 1 | 14 | 9 IMPORTS | 1 | 14 | 7 EQ | 12 | !LAN_RD_S.D = !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd6 & !LAN_SM_FSM_FFd11 & !LAN_SM_FSM_FFd13 ;Imported pterms FB15_8 # !RW & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd6 & !LAN_SM_FSM_FFd11 # !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd6 & !LAN_SM_FSM_FFd11 & Z3_ADR<13>; LAN_RD_S.CLK = CLK_EXT; // GCK LAN_RD_S.AR = LAN_SM_RST; LAN_RD_S.EXP = D<9>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<1>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<1>.PIN GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 15 | LAN_READY ATTRIBUTES | 8553232 | 0 OUTPUTMC | 1 | 14 | 11 INPUTS | 10 | DS1 | LAN_SM_FSM_FFd5 | LAN_SM_FSM_FFd10 | LAN_SM_FSM_FFd12 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd1 | DS0 | LAN_SM_FSM_FFd7 | LAN_SM_FSM_FFd3 | LAN_SM_RST INPUTMC | 8 | 14 | 17 | 11 | 3 | 14 | 1 | 8 | 12 | 8 | 2 | 14 | 4 | 14 | 5 | 11 | 5 INPUTP | 2 | 148 | 170 EQ | 9 | !LAN_READY.D = !DS1 & !LAN_SM_FSM_FFd5 & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd12 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # !DS0 & !LAN_SM_FSM_FFd5 & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd12 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 # !LAN_SM_FSM_FFd7 & !LAN_SM_FSM_FFd5 & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd12 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1; LAN_READY.CLK = CLK_EXT; // GCK LAN_READY.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 3 | LAN_WRH_S ATTRIBUTES | 8553232 | 0 OUTPUTMC | 1 | 7 | 4 INPUTS | 5 | LDS | LAN_SM_FSM_FFd9 | DS0 | LAN_SM_FSM_FFd8 | LAN_SM_RST INPUTMC | 3 | 14 | 6 | 11 | 2 | 11 | 5 INPUTP | 2 | 157 | 170 EQ | 4 | LAN_WRH_S.D = !LDS & LAN_SM_FSM_FFd9 # !DS0 & LAN_SM_FSM_FFd8; LAN_WRH_S.CLK = CLK_EXT; // GCK LAN_WRH_S.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 14 | 2 | LAN_WRL_S ATTRIBUTES | 8553232 | 0 OUTPUTMC | 1 | 12 | 13 INPUTS | 5 | UDS | LAN_SM_FSM_FFd9 | DS1 | LAN_SM_FSM_FFd8 | LAN_SM_RST INPUTMC | 3 | 14 | 6 | 11 | 2 | 11 | 5 INPUTP | 2 | 155 | 148 EQ | 4 | LAN_WRL_S.D = !UDS & LAN_SM_FSM_FFd9 # !DS1 & LAN_SM_FSM_FFd8; LAN_WRL_S.CLK = CLK_EXT; // GCK LAN_WRL_S.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 10 | 17 | Z3_A_LOW ATTRIBUTES | 8553232 | 0 OUTPUTMC | 1 | 3 | 5 INPUTS | 12 | UDS | LAN_SM_FSM_FFd7 | LAN_SM_FSM_FFd10 | LAN_SM_FSM_FFd3 | LAN_SM_FSM_FFd8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd6 | DS1 | DS0 | LDS | CP_WE_OBUF.EXP | LAN_SM_RST INPUTMC | 8 | 14 | 4 | 11 | 3 | 14 | 5 | 11 | 2 | 8 | 12 | 14 | 10 | 10 | 16 | 11 | 5 INPUTP | 4 | 155 | 148 | 170 | 157 IMPORTS | 1 | 10 | 16 EQ | 18 | !Z3_A_LOW.D = !UDS & DS1 & DS0 & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd8 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd6 # !UDS & !LAN_SM_FSM_FFd7 & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd8 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd6 # !LDS & DS1 & DS0 & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd8 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd6 # !LDS & !LAN_SM_FSM_FFd7 & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd8 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd6 ;Imported pterms FB11_17 # DS1 & DS0 & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd8 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd6 & !LAN_SM_FSM_FFd13 # !LAN_SM_FSM_FFd7 & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd8 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd6 & !LAN_SM_FSM_FFd13; Z3_A_LOW.CLK = CLK_EXT; // GCK Z3_A_LOW.AR = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 3 | 11 | A_LAN_2_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 3 | 12 INPUTS | 17 | A<2> | RESET | CP_CS | Z3_ADR_1 | A<5> | A<4> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<13>.PIN | CP_BASEADR<5> | LDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS INPUTMC | 6 | 4 | 1 | 4 | 12 | 13 | 17 | 13 | 3 | 3 | 12 | 4 | 0 INPUTP | 11 | 101 | 263 | 91 | 97 | 107 | 152 | 80 | 157 | 98 | 99 | 158 EXPORTS | 1 | 3 | 12 EQ | 5 | !A_LAN<2> = !A<2> & RESET & !CP_CS # RESET & !Z3_ADR_1 & CP_CS; A_LAN_2_OBUF.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<13>.PIN & !CP_BASEADR<5> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 1 | 1 | A_LAN_4_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 1 | 0 INPUTS | 12 | A<4> | RESET | CP_CS | UDS | RW | FCS | LAN_ACCESS | DQ_DATA<8> | LDS | DS1 | DS0 | A_LAN_7_OBUF.EXP INPUTMC | 4 | 4 | 1 | 8 | 1 | 15 | 4 | 1 | 2 INPUTP | 8 | 97 | 263 | 155 | 158 | 147 | 157 | 148 | 170 EXPORTS | 1 | 1 | 0 IMPORTS | 1 | 1 | 2 EQ | 11 | !A_LAN<4> = !A<4> & RESET & !CP_CS ;Imported pterms FB2_3 # RESET & !Z3_ADR<3> & CP_CS; A_LAN_4_OBUF.EXP = RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<8> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<8> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<8> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<8> MACROCELL | 3 | 13 | A_LAN_5_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 3 | 14 INPUTS | 18 | A<5> | RESET | CP_CS | Z3_ADR<4> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<12>.PIN | CP_BASEADR<4> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS INPUTMC | 6 | 4 | 1 | 4 | 10 | 13 | 17 | 13 | 3 | 3 | 14 | 4 | 0 INPUTP | 12 | 91 | 263 | 97 | 101 | 107 | 152 | 78 | 155 | 98 | 99 | 158 | 157 EXPORTS | 1 | 3 | 14 EQ | 11 | !A_LAN<5> = !A<5> & RESET & !CP_CS # RESET & !Z3_ADR<4> & CP_CS; A_LAN_5_OBUF.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<12>.PIN & !CP_BASEADR<4> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<12>.PIN & !CP_BASEADR<4> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<12>.PIN & CP_BASEADR<4> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 4 | 4 | ROM_OE_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 4 | 3 INPUTS | 7 | AS | ROM_OE_S | AUTOBOOT_OFF | CP_BASEADR<3> | A<19>.PIN | CP_BASEADR<5> | A<21>.PIN INPUTMC | 3 | 13 | 7 | 7 | 15 | 3 | 12 INPUTP | 4 | 152 | 142 | 169 | 163 EXPORTS | 1 | 4 | 3 EQ | 5 | !ROM_OE = !AS & !ROM_OE_S & !AUTOBOOT_OFF; ROM_OE_OBUF.EXP = CP_BASEADR<3> & !A<19>.PIN # !CP_BASEADR<3> & A<19>.PIN # CP_BASEADR<5> & !A<21>.PIN # !CP_BASEADR<5> & A<21>.PIN MACROCELL | 11 | 5 | LAN_SM_RST ATTRIBUTES | 8553216 | 0 OUTPUTMC | 68 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 16 | 15 | 6 | 15 | 8 | 10 | 14 | 10 | 12 | 10 | 8 | 10 | 7 | 15 | 11 | 15 | 12 | 15 | 13 | 15 | 14 | 10 | 6 | 10 | 5 | 10 | 3 | 10 | 1 | 15 | 15 | 14 | 4 | 14 | 17 | 11 | 3 | 14 | 5 | 11 | 2 | 14 | 1 | 8 | 12 | 14 | 10 | 14 | 6 | 8 | 2 | 14 | 7 | 8 | 17 | 15 | 0 | 12 | 0 | 11 | 0 | 12 | 17 | 11 | 17 | 12 | 15 | 12 | 12 | 14 | 0 | 12 | 9 | 11 | 15 | 12 | 6 | 11 | 13 | 12 | 4 | 14 | 12 | 15 | 4 | 14 | 9 | 14 | 15 | 14 | 8 | 10 | 15 | 14 | 3 | 14 | 2 | 10 | 17 | 8 | 8 | 11 | 4 INPUTS | 10 | RESET | UDS | FCS | LAN_ACCESS | BERR | DS1 | DS0 | LDS | RW | DQ_DATA<15> INPUTMC | 2 | 8 | 1 | 12 | 12 INPUTP | 8 | 263 | 155 | 147 | 176 | 148 | 170 | 157 | 158 EXPORTS | 1 | 11 | 4 EQ | 7 | !LAN_SM_RST.D = RESET & !UDS & !FCS & LAN_ACCESS & BERR # RESET & !LDS & !FCS & LAN_ACCESS & BERR # RESET & !DS1 & !FCS & LAN_ACCESS & BERR # RESET & !DS0 & !FCS & LAN_ACCESS & BERR; !LAN_SM_RST.CLK = CLK_EXT; // GCK LAN_SM_RST.EXP = RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<15> GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 8 | 8 | LAN_SM_FSM_FFd13 ATTRIBUTES | 8553348 | 0 OUTPUTMC | 41 | 11 | 1 | 11 | 2 | 14 | 1 | 14 | 6 | 14 | 7 | 15 | 0 | 12 | 0 | 11 | 0 | 12 | 17 | 11 | 16 | 12 | 15 | 12 | 12 | 14 | 0 | 12 | 9 | 11 | 14 | 12 | 6 | 11 | 12 | 12 | 4 | 14 | 12 | 15 | 4 | 14 | 9 | 14 | 8 | 10 | 16 | 11 | 11 | 11 | 13 | 11 | 15 | 11 | 17 | 12 | 1 | 12 | 3 | 12 | 5 | 12 | 8 | 12 | 11 | 12 | 13 | 12 | 14 | 12 | 16 | 14 | 10 | 14 | 11 | 14 | 13 | 14 | 17 | 15 | 3 | 15 | 17 INPUTS | 1 | LAN_SM_RST INPUTMC | 1 | 11 | 5 EQ | 3 | LAN_SM_FSM_FFd13.D = Gnd; LAN_SM_FSM_FFd13.CLK = CLK_EXT; // GCK LAN_SM_FSM_FFd13.AP = LAN_SM_RST; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 2 | 3 | LAN_A_INIT<3> ATTRIBUTES | 8553348 | 0 OUTPUTMC | 5 | 5 | 14 | 2 | 6 | 5 | 17 | 5 | 16 | 3 | 7 INPUTS | 1 | RESET INPUTP | 1 | 263 EQ | 3 | LAN_A_INIT<3>.D = Gnd; LAN_A_INIT<3>.CLK = CLK_EXT; // GCK LAN_A_INIT<3>.AP = RESET; GLOBALS | 1 | 2 | CLK_EXT MACROCELL | 13 | 5 | CP_WE_S ATTRIBUTES | 8520480 | 0 OUTPUTMC | 2 | 2 | 8 | 10 | 16 INPUTS | 6 | AS | UDS | RW | CP_CS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF INPUTMC | 2 | 4 | 1 | 2 | 4 INPUTP | 4 | 152 | 155 | 158 | 157 EQ | 3 | !CP_WE_S.D = !AS & !UDS & !RW & !CP_CS # !AS & !LDS & !RW & !CP_CS; CP_WE_S.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; MACROCELL | 6 | 1 | CP_RD_S ATTRIBUTES | 8520480 | 0 OUTPUTMC | 2 | 12 | 2 | 6 | 2 INPUTS | 10 | AS | UDS | RW | CP_CS | LDS | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF | FCS | DQ<13>.PIN | Z3_DATA<29> | LAN_ACCESS INPUTMC | 4 | 4 | 1 | 2 | 4 | 10 | 3 | 8 | 1 INPUTP | 6 | 152 | 155 | 158 | 157 | 147 | 204 EXPORTS | 1 | 6 | 2 EQ | 5 | !CP_RD_S.D = !AS & !UDS & RW & !CP_CS # !AS & !LDS & RW & !CP_CS; CP_RD_S.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; CP_RD_S.EXP = AS & FCS & DQ<13>.PIN # Z3_DATA<29> & RW & !FCS & LAN_ACCESS MACROCELL | 2 | 8 | CP_WE_QUIRK ATTRIBUTES | 8520480 | 0 OUTPUTMC | 1 | 10 | 16 INPUTS | 2 | CP_WE_S | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF INPUTMC | 2 | 13 | 5 | 2 | 4 EQ | 2 | CP_WE_QUIRK.D = CP_WE_S; CP_WE_QUIRK.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF; MACROCELL | 3 | 5 | A_LAN_0_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 3 | 6 INPUTS | 18 | RESET | Z3_A_LOW | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<13>.PIN | IDE_BASEADR<5> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS INPUTMC | 6 | 10 | 17 | 13 | 17 | 13 | 3 | 4 | 5 | 3 | 6 | 4 | 0 INPUTP | 12 | 263 | 91 | 97 | 101 | 107 | 152 | 80 | 155 | 98 | 99 | 158 | 157 EXPORTS | 1 | 3 | 6 EQ | 9 | !A_LAN<0> = RESET & !Z3_A_LOW; A_LAN_0_OBUF.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<13>.PIN & !IDE_BASEADR<5> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<13>.PIN & !IDE_BASEADR<5> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 5 | 5 | A_LAN_10_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | RESET | Z3_ADR<9> INPUTMC | 1 | 2 | 11 INPUTP | 1 | 263 EQ | 1 | !A_LAN<10> = RESET & !Z3_ADR<9>; MACROCELL | 5 | 7 | A_LAN_11_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | RESET | Z3_ADR<10> INPUTMC | 1 | 13 | 8 INPUTP | 1 | 263 EQ | 1 | !A_LAN<11> = RESET & !Z3_ADR<10>; MACROCELL | 5 | 2 | A_LAN_12_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | RESET | Z3_ADR<11> INPUTMC | 1 | 8 | 3 INPUTP | 1 | 263 EQ | 1 | !A_LAN<12> = RESET & !Z3_ADR<11>; MACROCELL | 5 | 4 | A_LAN_13_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | RESET | Z3_ADR<12> INPUTMC | 1 | 8 | 7 INPUTP | 1 | 263 EQ | 1 | !A_LAN<13> = RESET & !Z3_ADR<12>; MACROCELL | 3 | 4 | A_LAN_1_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 3 | 3 INPUTS | 18 | RESET | Z3_ADR_0 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<14>.PIN | IDE_BASEADR<6> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS INPUTMC | 6 | 13 | 16 | 13 | 17 | 13 | 3 | 4 | 5 | 3 | 3 | 4 | 0 INPUTP | 12 | 263 | 91 | 97 | 101 | 107 | 152 | 81 | 155 | 98 | 99 | 158 | 157 EXPORTS | 1 | 3 | 3 EQ | 17 | !A_LAN<1> = RESET & !Z3_ADR_0; A_LAN_1_OBUF.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<14>.PIN & !IDE_BASEADR<6> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<14>.PIN & !IDE_BASEADR<6> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<14>.PIN & IDE_BASEADR<6> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<14>.PIN & IDE_BASEADR<6> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 3 | 7 | A_LAN_3_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 3 | 8 INPUTS | 21 | RESET | LAN_A_INIT<3> | Z3_ADR<2> | CP_CS | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<12>.PIN | IDE_BASEADR<4> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS | IDE_BASEADR<5>.EXP INPUTMC | 9 | 2 | 3 | 4 | 7 | 4 | 1 | 13 | 17 | 13 | 3 | 4 | 5 | 3 | 8 | 4 | 0 | 3 | 6 INPUTP | 12 | 263 | 91 | 97 | 101 | 107 | 152 | 78 | 155 | 98 | 99 | 158 | 157 EXPORTS | 1 | 3 | 8 IMPORTS | 1 | 3 | 6 EQ | 16 | A_LAN<3> = !RESET & LAN_A_INIT<3> # RESET & Z3_ADR<2> & CP_CS ;Imported pterms FB4_7 # RESET & A<3> & !CP_CS; A_LAN_3_OBUF.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<12>.PIN & !IDE_BASEADR<4> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<12>.PIN & !IDE_BASEADR<4> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<12>.PIN & IDE_BASEADR<4> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 1 | 4 | A_LAN_6_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 1 | 3 INPUTS | 18 | RESET | LAN_A_INIT<6> | Z3_ADR<5> | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<11>.PIN | IDE_BASEADR<3> | LDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS INPUTMC | 7 | 5 | 17 | 13 | 11 | 13 | 17 | 13 | 3 | 4 | 5 | 1 | 3 | 4 | 0 INPUTP | 11 | 263 | 91 | 97 | 101 | 107 | 152 | 77 | 157 | 98 | 99 | 158 EXPORTS | 1 | 1 | 3 EQ | 6 | A_LAN<6> = RESET & Z3_ADR<5> # !RESET & LAN_A_INIT<6>; A_LAN_6_OBUF.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<11>.PIN & !IDE_BASEADR<3> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 1 | 2 | A_LAN_7_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 1 | 1 INPUTS | 4 | RESET | Z3_ADR<6> | Z3_ADR<3> | CP_CS INPUTMC | 3 | 13 | 12 | 4 | 8 | 4 | 1 INPUTP | 1 | 263 EXPORTS | 1 | 1 | 1 EQ | 2 | !A_LAN<7> = RESET & !Z3_ADR<6>; A_LAN_7_OBUF.EXP = RESET & !Z3_ADR<3> & CP_CS MACROCELL | 5 | 9 | A_LAN_8_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | RESET | Z3_ADR<7> INPUTMC | 1 | 13 | 15 INPUTP | 1 | 263 EQ | 1 | !A_LAN<8> = RESET & !Z3_ADR<7>; MACROCELL | 5 | 13 | A_LAN_9_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | RESET | Z3_ADR<8> INPUTMC | 1 | 2 | 12 INPUTP | 1 | 263 EQ | 1 | !A_LAN<9> = RESET & !Z3_ADR<8>; MACROCELL | 12 | 1 | CP_RD_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 12 | 0 INPUTS | 9 | D<10>.PIN | LDS | DQ_SWAP | LAN_SM_FSM_FFd13 | UDS | D<2>.PIN | A<10>.PIN | A<18>.PIN | EXP57_.EXP INPUTMC | 3 | 8 | 11 | 8 | 8 | 12 | 2 INPUTP | 6 | 74 | 157 | 155 | 71 | 112 | 171 EXPORTS | 1 | 12 | 0 IMPORTS | 1 | 12 | 2 EQ | 9 | !CP_RD = ;Imported pterms FB13_3 !AS & !CP_RD_S; CP_RD_OBUF.EXP = D<10>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<2>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<2>.PIN # UDS & LDS & DQ_SWAP & A<10>.PIN & LAN_SM_FSM_FFd13 # UDS & LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & A<18>.PIN MACROCELL | 10 | 16 | CP_WE_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 10 | 17 INPUTS | 12 | AS | CP_WE_S | CP_WE_QUIRK | DS1 | DS0 | LAN_SM_FSM_FFd10 | LAN_SM_FSM_FFd8 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd6 | LAN_SM_FSM_FFd13 | LAN_SM_FSM_FFd7 | LAN_SM_FSM_FFd3 INPUTMC | 9 | 13 | 5 | 2 | 8 | 11 | 3 | 11 | 2 | 8 | 12 | 14 | 10 | 8 | 8 | 14 | 4 | 14 | 5 INPUTP | 3 | 152 | 148 | 170 EXPORTS | 1 | 10 | 17 EQ | 6 | !CP_WE = !AS & !CP_WE_S & CP_WE_QUIRK; CP_WE_OBUF.EXP = DS1 & DS0 & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd8 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd6 & !LAN_SM_FSM_FFd13 # !LAN_SM_FSM_FFd7 & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd8 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd6 & !LAN_SM_FSM_FFd13 MACROCELL | 0 | 16 | IDE_R_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 0 | 17 INPUTS | 15 | AS | IDE_R_S | A<5> | A<4> | A<2> | A<1> | AUTO_CONFIG_Z2_DONE<1> | D<10>.PIN | LAN_BASEADR<10> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS INPUTMC | 4 | 13 | 6 | 13 | 3 | 0 | 17 | 4 | 0 INPUTP | 11 | 152 | 91 | 97 | 101 | 107 | 74 | 155 | 98 | 99 | 158 | 157 EXPORTS | 1 | 0 | 17 EQ | 7 | !IDE_R = !AS & !IDE_R_S; IDE_R_OBUF.EXP = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !LAN_BASEADR<10> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !LAN_BASEADR<10> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 2 | 1 | IDE_W_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 2 | AS | IDE_W_S INPUTMC | 1 | 8 | 14 INPUTP | 1 | 152 EQ | 1 | !IDE_W = !AS & !IDE_W_S; MACROCELL | 7 | 7 | LAN_CS_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 7 | 8 INPUTS | 17 | RESET | LAN_CS_RST | Z3_ADR<13> | LAN_ACCESS | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | D<12>.PIN | LAN_BASEADR<4> | LDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS INPUTMC | 6 | 5 | 16 | 13 | 9 | 8 | 1 | 13 | 17 | 7 | 8 | 4 | 0 INPUTP | 11 | 263 | 91 | 97 | 101 | 107 | 152 | 78 | 157 | 98 | 99 | 158 EXPORTS | 1 | 7 | 8 EQ | 6 | LAN_CS = !RESET & LAN_CS_RST # Z3_ADR<13> & LAN_CS_RST # RESET & !Z3_ADR<13> & LAN_ACCESS; LAN_CS_OBUF.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<12>.PIN & !LAN_BASEADR<4> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 7 | 4 | LAN_WRH_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 7 | 5 INPUTS | 18 | RESET | LAN_WR_RST | FCS | LAN_WRH_S | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<1> | D<8>.PIN | LAN_BASEADR<8> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS INPUTMC | 5 | 5 | 0 | 14 | 3 | 13 | 3 | 7 | 5 | 4 | 0 INPUTP | 13 | 263 | 147 | 91 | 97 | 101 | 107 | 152 | 32 | 155 | 98 | 99 | 158 | 157 EXPORTS | 1 | 7 | 5 EQ | 9 | LAN_WRH = !RESET & LAN_WR_RST # FCS & LAN_WR_RST # RESET & !FCS & LAN_WRH_S; LAN_WRH_OBUF.EXP = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<8>.PIN & !LAN_BASEADR<8> & !UDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<8>.PIN & !LAN_BASEADR<8> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 12 | 13 | LAN_WRL_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 12 | 12 INPUTS | 9 | RESET | LAN_WR_RST | FCS | LAN_WRL_S | UDS | LDS | A<23>.PIN | DQ_SWAP | LAN_SM_FSM_FFd13 INPUTMC | 4 | 5 | 0 | 14 | 2 | 8 | 11 | 8 | 8 INPUTP | 5 | 263 | 147 | 155 | 157 | 161 EXPORTS | 1 | 12 | 12 EQ | 5 | LAN_WRL = !RESET & LAN_WR_RST # FCS & LAN_WR_RST # RESET & !FCS & LAN_WRL_S; LAN_WRL_OBUF.EXP = UDS & LDS & A<23>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd13 MACROCELL | 7 | 9 | LAN_RD_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 7 | 10 INPUTS | 17 | RESET | FCS | LAN_RD_S | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | D<11>.PIN | LAN_BASEADR<3> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS INPUTMC | 4 | 14 | 8 | 13 | 17 | 7 | 10 | 4 | 0 INPUTP | 13 | 263 | 147 | 91 | 97 | 101 | 107 | 152 | 77 | 155 | 98 | 99 | 158 | 157 EXPORTS | 1 | 7 | 10 EQ | 10 | LAN_RD = RESET & !FCS & LAN_RD_S; LAN_RD_OBUF.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<11>.PIN & !LAN_BASEADR<3> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<11>.PIN & !LAN_BASEADR<3> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<11>.PIN & LAN_BASEADR<3> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 13 | 13 | SLAVE_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 6 | AS | LAN_ACCESS | FCS | AUTOCONFIG_Z2_ACCESS | IDE_ACCESS | CP_CS INPUTMC | 4 | 8 | 1 | 4 | 0 | 13 | 4 | 4 | 1 INPUTP | 2 | 152 | 147 EQ | 5 | SLAVE = AS & FCS # AS & !LAN_ACCESS # FCS & !AUTOCONFIG_Z2_ACCESS & !IDE_ACCESS & CP_CS # !AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & !IDE_ACCESS & CP_CS; MACROCELL | 14 | 11 | ROM_B_0_OBUF$BUF10 ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 14 | 12 INPUTS | 9 | FCS | LAN_READY | D<15>.PIN | UDS | DQ_SWAP | LAN_SM_FSM_FFd13 | LDS | D<7>.PIN | A<23>.PIN INPUTMC | 3 | 10 | 15 | 8 | 11 | 8 | 8 INPUTP | 6 | 147 | 89 | 155 | 157 | 29 | 161 EXPORTS | 1 | 14 | 12 EQ | 7 | DTACK = Gnd; DTACK.OE = !FCS & LAN_READY; ROM_B_0_OBUF$BUF10.EXP = D<15>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<15>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<7>.PIN # UDS & LDS & A<23>.PIN & DQ_SWAP & LAN_SM_FSM_FFd13 MACROCELL | 13 | 2 | ROM_B_0_OBUF$BUF2 ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 13 | 1 INPUTS | 12 | FCS | LAN_ACCESS | A<5> | A<4> | A<2> | A<1> | AS | UDS | A<6> | A<3> | AUTOCONFIG_Z2_ACCESS | LDS INPUTMC | 2 | 8 | 1 | 4 | 0 INPUTP | 10 | 147 | 91 | 97 | 101 | 107 | 152 | 155 | 98 | 99 | 157 EXPORTS | 1 | 13 | 1 EQ | 10 | OVR = Gnd; OVR.OE = !FCS & LAN_ACCESS; ROM_B_0_OBUF$BUF2.EXP = A<5> & !A<4> & A<2> & !A<1> & !AS & !UDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS # A<5> & !A<4> & A<2> & !A<1> & !AS & !LDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS # !A<5> & A<4> & !A<2> & !A<1> & !AS & !UDS & !A<6> & A<3> & AUTOCONFIG_Z2_ACCESS # !A<5> & A<4> & !A<2> & !A<1> & !AS & !LDS & !A<6> & A<3> & AUTOCONFIG_Z2_ACCESS MACROCELL | 10 | 11 | ROM_B_0_OBUF$BUF8 ATTRIBUTES | 265986 | 0 INPUTS | 1 | CP_IRQ INPUTP | 1 | 59 EQ | 2 | INT6_OUT = Gnd; INT6_OUT.OE = !CP_IRQ; MACROCELL | 2 | 13 | ROM_B_0_OBUF$BUF9 ATTRIBUTES | 265986 | 0 INPUTS | 2 | LAN_IRQ_OUT | LAN_INT_ENABLE INPUTMC | 2 | 2 | 0 | 14 | 15 EQ | 2 | INT2_OUT = Gnd; INT2_OUT.OE = !LAN_IRQ_OUT & LAN_INT_ENABLE; MACROCELL | 13 | 10 | CFOUT_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 3 | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> INPUTMC | 3 | 13 | 17 | 13 | 3 | 4 | 5 EQ | 2 | !CFOUT = AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & AUTO_CONFIG_Z2_DONE<2>; MACROCELL | 4 | 1 | CP_CS_OBUF ATTRIBUTES | 8782758 | 0 OUTPUTMC | 11 | 3 | 11 | 1 | 1 | 3 | 13 | 13 | 5 | 6 | 1 | 3 | 7 | 13 | 13 | 1 | 15 | 0 | 2 | 1 | 2 | 3 | 6 INPUTS | 6 | SHUT_UP_Z2<1> | CP_BASEADR<6> | A<22>.PIN | EXP28_.EXP | AS | RESET INPUTMC | 3 | 7 | 17 | 3 | 10 | 4 | 2 INPUTP | 3 | 162 | 152 | 263 IMPORTS | 1 | 4 | 2 EQ | 22 | CP_CS.D = SHUT_UP_Z2<1> # CP_BASEADR<6> & !A<22>.PIN # !CP_BASEADR<6> & A<22>.PIN ;Imported pterms FB5_3 # CP_BASEADR<0> & !A<16>.PIN # !CP_BASEADR<0> & A<16>.PIN # !CP_BASEADR<2> & A<18>.PIN # CP_BASEADR<7> & !A<23>.PIN # !CP_BASEADR<7> & A<23>.PIN ;Imported pterms FB5_4 # CP_BASEADR<1> & !A<17>.PIN # !CP_BASEADR<1> & A<17>.PIN # CP_BASEADR<2> & !A<18>.PIN # CP_BASEADR<4> & !A<20>.PIN # !CP_BASEADR<4> & A<20>.PIN ;Imported pterms FB5_5 # CP_BASEADR<3> & !A<19>.PIN # !CP_BASEADR<3> & A<19>.PIN # CP_BASEADR<5> & !A<21>.PIN # !CP_BASEADR<5> & A<21>.PIN; CP_CS.CLK = !AS; CP_CS.AP = !RESET; MACROCELL | 0 | 11 | IDE_A_0_OBUF$BUF0 ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 0 | 10 INPUTS | 14 | A<9>.PIN | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | D<9>.PIN | LAN_BASEADR<1> | LDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS INPUTMC | 3 | 13 | 17 | 0 | 10 | 4 | 0 INPUTP | 11 | 108 | 91 | 97 | 101 | 107 | 152 | 73 | 157 | 98 | 99 | 158 EXPORTS | 1 | 0 | 10 EQ | 4 | IDE_A<0> = A<9>.PIN; IDE_A_0_OBUF$BUF0.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<9>.PIN & !LAN_BASEADR<1> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 0 | 14 | IDE_A_1_OBUF$BUF0 ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 0 | 15 INPUTS | 14 | A<10>.PIN | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<1> | D<13>.PIN | LAN_BASEADR<13> | LDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS INPUTMC | 3 | 13 | 3 | 0 | 15 | 4 | 0 INPUTP | 11 | 112 | 91 | 97 | 101 | 107 | 152 | 80 | 157 | 98 | 99 | 158 EXPORTS | 1 | 0 | 15 EQ | 4 | IDE_A<1> = A<10>.PIN; IDE_A_1_OBUF$BUF0.EXP = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<13>.PIN & !LAN_BASEADR<13> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 0 | 13 | IDE_A_2_OBUF$BUF0 ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 0 | 12 INPUTS | 14 | A<11>.PIN | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<1> | D<15>.PIN | LAN_BASEADR<15> | LDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS INPUTMC | 3 | 13 | 3 | 0 | 12 | 4 | 0 INPUTP | 11 | 114 | 91 | 97 | 101 | 107 | 152 | 89 | 157 | 98 | 99 | 158 EXPORTS | 1 | 0 | 12 EQ | 4 | IDE_A<2> = A<11>.PIN; IDE_A_2_OBUF$BUF0.EXP = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<15>.PIN & !LAN_BASEADR<15> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 0 | 7 | IDE_CS_0_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 1 | A<12>.PIN INPUTP | 1 | 115 EQ | 1 | IDE_CS<0> = !A<12>.PIN; MACROCELL | 0 | 9 | IDE_CS_1_OBUF ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 0 | 8 INPUTS | 14 | A<13>.PIN | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | D<10>.PIN | LAN_BASEADR<2> | LDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS INPUTMC | 3 | 13 | 17 | 0 | 8 | 4 | 0 INPUTP | 11 | 123 | 91 | 97 | 101 | 107 | 152 | 74 | 157 | 98 | 99 | 158 EXPORTS | 1 | 0 | 8 EQ | 4 | IDE_CS<1> = !A<13>.PIN; IDE_CS_1_OBUF.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<10>.PIN & !LAN_BASEADR<2> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 13 | 14 | ROM_B_0_OBUF$BUF1 ATTRIBUTES | 265986 | 0 INPUTS | 0 EQ | 2 | OWN = Gnd; OWN.OE = Gnd; MACROCELL | 15 | 9 | ROM_B_0_OBUF$BUF3 ATTRIBUTES | 265986 | 0 INPUTS | 0 EQ | 2 | MTACK = Gnd; MTACK.OE = Gnd; MACROCELL | 11 | 1 | ROM_B_0_OBUF$BUF4 ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 11 | 0 INPUTS | 7 | UDS | DQ_SWAP | LAN_SM_FSM_FFd13 | D<3>.PIN | LDS | A<19>.PIN | A<11>.PIN INPUTMC | 2 | 8 | 11 | 8 | 8 INPUTP | 5 | 155 | 28 | 157 | 169 | 114 EXPORTS | 1 | 11 | 0 EQ | 8 | LAN_CFG<4> = Gnd; LAN_CFG<4>.OE = Gnd; ROM_B_0_OBUF$BUF4.EXP = !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<3>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<3>.PIN # UDS & LDS & A<19>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & DQ_SWAP & A<11>.PIN & LAN_SM_FSM_FFd13 MACROCELL | 1 | 7 | ROM_B_0_OBUF$BUF5 ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 1 | 8 INPUTS | 16 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<9>.PIN | IDE_BASEADR<1> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS INPUTMC | 5 | 13 | 17 | 13 | 3 | 4 | 5 | 1 | 8 | 4 | 0 INPUTP | 11 | 91 | 97 | 101 | 107 | 152 | 73 | 155 | 98 | 99 | 158 | 157 EXPORTS | 1 | 1 | 8 EQ | 14 | LAN_CFG<3> = Gnd; LAN_CFG<3>.OE = Gnd; ROM_B_0_OBUF$BUF5.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<9>.PIN & !IDE_BASEADR<1> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<9>.PIN & !IDE_BASEADR<1> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<9>.PIN & IDE_BASEADR<1> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 5 | 1 | ROM_B_0_OBUF$BUF6 ATTRIBUTES | 265986 | 0 INPUTS | 0 EQ | 2 | LAN_CFG<2> = Gnd; LAN_CFG<2>.OE = Gnd; MACROCELL | 1 | 5 | ROM_B_0_OBUF$BUF7 ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 1 | 6 INPUTS | 15 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | AUTO_CONFIG_Z2_DONE<2> | D<10>.PIN | IDE_BASEADR<2> | LDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS INPUTMC | 5 | 13 | 17 | 13 | 3 | 4 | 5 | 1 | 6 | 4 | 0 INPUTP | 10 | 91 | 97 | 101 | 107 | 152 | 74 | 157 | 98 | 99 | 158 EXPORTS | 1 | 1 | 6 EQ | 6 | LAN_CFG<1> = Gnd; LAN_CFG<1>.OE = Gnd; ROM_B_0_OBUF$BUF7.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<10>.PIN & !IDE_BASEADR<2> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 10 | 13 | ROM_B_0_OBUF ATTRIBUTES | 264962 | 0 INPUTS | 0 EQ | 1 | ROM_B<1> = Gnd; MACROCELL | 2 | 14 | ROM_B_0_OBUF$BUF0 ATTRIBUTES | 264962 | 0 OUTPUTMC | 1 | 2 | 15 INPUTS | 4 | D<13>.PIN | LAN_BASEADR<13> | LAN_BASEADR<6> | A<22>.PIN INPUTMC | 2 | 0 | 15 | 7 | 6 INPUTP | 2 | 80 | 162 EXPORTS | 1 | 2 | 15 EQ | 4 | ROM_B<0> = Gnd; ROM_B_0_OBUF$BUF0.EXP = D<13>.PIN & !LAN_BASEADR<13> # !D<13>.PIN & LAN_BASEADR<13> # LAN_BASEADR<6> & !A<22>.PIN MACROCELL | 2 | 4 | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF ATTRIBUTES | 133888 | 0 OUTPUTMC | 52 | 13 | 17 | 13 | 3 | 4 | 5 | 6 | 9 | 6 | 3 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 2 | 7 | 14 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 0 | 10 | 0 | 8 | 7 | 10 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 7 | 5 | 0 | 1 | 8 | 9 | 6 | 0 | 7 | 17 | 3 | 0 | 6 | 7 | 6 | 13 | 6 | 16 | 13 | 1 | 13 | 6 | 8 | 14 | 13 | 7 | 13 | 5 | 6 | 1 | 2 | 8 INPUTS | 2 | C1 | C3 INPUTP | 2 | 188 | 187 EQ | 2 | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF = C1 $ C3; MACROCELL | 1 | 15 | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST ATTRIBUTES | 133888 | 0 OUTPUTMC | 17 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 9 | 9 | 13 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 5 | 9 | 4 | 9 | 7 | 9 | 11 | 9 | 10 | 1 | 14 INPUTS | 10 | RESET | AS | RW | CP_CS | UDS | FCS | LAN_ACCESS | AUTOCONFIG_Z2_ACCESS | Z3_DATA<17> | D_8_IOBUFE.EXP INPUTMC | 5 | 4 | 1 | 8 | 1 | 4 | 0 | 15 | 6 | 1 | 16 INPUTP | 5 | 263 | 152 | 158 | 155 | 147 EXPORTS | 1 | 1 | 14 IMPORTS | 1 | 1 | 16 EQ | 9 | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST = !RESET # !AS & !RW & !CP_CS # !UDS & !RW & !FCS & LAN_ACCESS ;Imported pterms FB2_17 # !LDS & !RW & !FCS & LAN_ACCESS # !DS1 & !RW & !FCS & LAN_ACCESS # !DS0 & !RW & !FCS & LAN_ACCESS; DQ_4_IOBUFE/DQ_4_IOBUFE_TRST.EXP = !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<17> & RW & !FCS & LAN_ACCESS MACROCELL | 0 | 2 | D_10_IOBUFE/D_10_IOBUFE_TRST ATTRIBUTES | 133888 | 0 OUTPUTMC | 17 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 0 | 1 INPUTS | 16 | AS | RW | AUTOCONFIG_Z2_ACCESS | CP_CS | FCS | LAN_ACCESS | A<5> | A<4> | A<2> | A<1> | AUTO_CONFIG_Z2_DONE<1> | D<9>.PIN | LAN_BASEADR<9> | LDS | A<6> | A<3> INPUTMC | 5 | 4 | 0 | 4 | 1 | 8 | 1 | 13 | 3 | 0 | 1 INPUTP | 11 | 152 | 158 | 147 | 91 | 97 | 101 | 107 | 73 | 157 | 98 | 99 EXPORTS | 1 | 0 | 1 EQ | 6 | D_10_IOBUFE/D_10_IOBUFE_TRST = !AS & RW & AUTOCONFIG_Z2_ACCESS # !AS & RW & !CP_CS # RW & !FCS & LAN_ACCESS; D_10_IOBUFE/D_10_IOBUFE_TRST.EXP = !A<5> & !A<4> & A<2> & !A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & D<9>.PIN & !LAN_BASEADR<9> & !LDS & A<6> & !A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 2 | 5 | Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D ATTRIBUTES | 133888 | 0 OUTPUTMC | 4 | 8 | 11 | 8 | 1 | 8 | 10 | 8 | 12 INPUTS | 2 | LAN_BASEADR<14> | D<14>.PIN INPUTMC | 1 | 7 | 11 INPUTP | 1 | 81 EQ | 2 | Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D = LAN_BASEADR<14> $ D<14>.PIN; MACROCELL | 8 | 4 | $OpTx$FX_DC$81 ATTRIBUTES | 133888 | 0 OUTPUTMC | 4 | 8 | 11 | 8 | 10 | 8 | 12 | 8 | 5 INPUTS | 5 | A<19>.PIN | LAN_BASEADR<3> | IDE_BASEADR<2> | A<18>.PIN | IDE_BASEADR<3> INPUTMC | 3 | 7 | 10 | 1 | 6 | 1 | 3 INPUTP | 2 | 169 | 171 EXPORTS | 1 | 8 | 5 EQ | 5 | $OpTx$FX_DC$81 = A<19>.PIN $ LAN_BASEADR<3>; $OpTx$FX_DC$81.EXP = IDE_BASEADR<2> & !A<18>.PIN # !IDE_BASEADR<2> & A<18>.PIN # !IDE_BASEADR<3> & A<19>.PIN MACROCELL | 8 | 15 | $OpTx$FX_DC$82 ATTRIBUTES | 133888 | 0 OUTPUTMC | 3 | 8 | 11 | 8 | 10 | 8 | 12 INPUTS | 2 | A<20>.PIN | LAN_BASEADR<4> INPUTMC | 1 | 7 | 8 INPUTP | 1 | 167 EQ | 2 | $OpTx$FX_DC$82 = A<20>.PIN $ LAN_BASEADR<4>; MACROCELL | 2 | 10 | $OpTx$FX_DC$83 ATTRIBUTES | 133888 | 0 OUTPUTMC | 4 | 8 | 11 | 8 | 1 | 8 | 10 | 8 | 12 INPUTS | 2 | A<21>.PIN | LAN_BASEADR<5> INPUTMC | 1 | 0 | 0 INPUTP | 1 | 163 EQ | 2 | $OpTx$FX_DC$83 = A<21>.PIN $ LAN_BASEADR<5>; MACROCELL | 2 | 9 | $OpTx$FX_DC$84 ATTRIBUTES | 133888 | 0 OUTPUTMC | 4 | 8 | 11 | 8 | 1 | 8 | 10 | 8 | 12 INPUTS | 2 | A<23>.PIN | LAN_BASEADR<7> INPUTMC | 1 | 0 | 3 INPUTP | 1 | 161 EQ | 2 | $OpTx$FX_DC$84 = A<23>.PIN $ LAN_BASEADR<7>; MACROCELL | 2 | 15 | $OpTx$INV$62 ATTRIBUTES | 133888 | 0 OUTPUTMC | 5 | 8 | 11 | 8 | 0 | 8 | 10 | 8 | 12 | 2 | 16 INPUTS | 9 | LAN_BASEADR<6> | A<22>.PIN | D<9>.PIN | LAN_BASEADR<9> | D<10>.PIN | LAN_BASEADR<10> | D<11>.PIN | LAN_BASEADR<11> | ROM_B_0_OBUF$BUF0.EXP INPUTMC | 5 | 7 | 6 | 0 | 1 | 0 | 17 | 7 | 13 | 2 | 14 INPUTP | 4 | 162 | 73 | 74 | 77 EXPORTS | 1 | 2 | 16 IMPORTS | 1 | 2 | 14 EQ | 9 | $OpTx$INV$62 = !LAN_BASEADR<6> & A<22>.PIN ;Imported pterms FB3_15 # D<13>.PIN & !LAN_BASEADR<13> # !D<13>.PIN & LAN_BASEADR<13> # LAN_BASEADR<6> & !A<22>.PIN; $OpTx$INV$62.EXP = !D<9>.PIN & LAN_BASEADR<9> # D<10>.PIN & !LAN_BASEADR<10> # !D<10>.PIN & LAN_BASEADR<10> # D<11>.PIN & !LAN_BASEADR<11> MACROCELL | 2 | 16 | $OpTx$INV$61 ATTRIBUTES | 133888 | 0 OUTPUTMC | 4 | 8 | 11 | 8 | 0 | 8 | 10 | 8 | 12 INPUTS | 8 | SHUT_UP_Z2<0> | Z3 | D<8>.PIN | LAN_BASEADR<8> | D<9>.PIN | LAN_BASEADR<9> | $OpTx$INV$62.EXP | EXP27_.EXP INPUTMC | 5 | 6 | 0 | 7 | 5 | 0 | 1 | 2 | 15 | 2 | 17 INPUTP | 3 | 151 | 32 | 73 IMPORTS | 2 | 2 | 15 | 2 | 17 EQ | 16 | $OpTx$INV$61 = !Z3 # SHUT_UP_Z2<0> # D<8>.PIN & !LAN_BASEADR<8> # !D<8>.PIN & LAN_BASEADR<8> # D<9>.PIN & !LAN_BASEADR<9> ;Imported pterms FB3_16 # !D<9>.PIN & LAN_BASEADR<9> # D<10>.PIN & !LAN_BASEADR<10> # !D<10>.PIN & LAN_BASEADR<10> # D<11>.PIN & !LAN_BASEADR<11> ;Imported pterms FB3_18 # !D<11>.PIN & LAN_BASEADR<11> # D<12>.PIN & !LAN_BASEADR<12> # !D<12>.PIN & LAN_BASEADR<12> # D<15>.PIN & !LAN_BASEADR<15> # !D<15>.PIN & LAN_BASEADR<15>; MACROCELL | 8 | 5 | $OpTx$INV$63 ATTRIBUTES | 133888 | 0 OUTPUTMC | 1 | 13 | 4 INPUTS | 7 | SHUT_UP_Z2<2> | IDE_BASEADR<0> | A<16>.PIN | IDE_BASEADR<1> | A<17>.PIN | $OpTx$FX_DC$81.EXP | EXP43_.EXP INPUTMC | 5 | 3 | 0 | 1 | 12 | 1 | 8 | 8 | 4 | 8 | 6 INPUTP | 2 | 175 | 172 IMPORTS | 2 | 8 | 4 | 8 | 6 EQ | 18 | $OpTx$INV$63 = SHUT_UP_Z2<2> # IDE_BASEADR<0> & !A<16>.PIN # !IDE_BASEADR<0> & A<16>.PIN # IDE_BASEADR<1> & !A<17>.PIN # !IDE_BASEADR<1> & A<17>.PIN ;Imported pterms FB9_5 # IDE_BASEADR<2> & !A<18>.PIN # !IDE_BASEADR<2> & A<18>.PIN # !IDE_BASEADR<3> & A<19>.PIN ;Imported pterms FB9_7 # IDE_BASEADR<3> & !A<19>.PIN # IDE_BASEADR<4> & !A<20>.PIN # !IDE_BASEADR<4> & A<20>.PIN # IDE_BASEADR<5> & !A<21>.PIN # !IDE_BASEADR<5> & A<21>.PIN ;Imported pterms FB9_8 # IDE_BASEADR<7> & !A<23>.PIN # !IDE_BASEADR<7> & A<23>.PIN; MACROCELL | 10 | 0 | $OpTx$FX_DC$1248 ATTRIBUTES | 133888 | 0 OUTPUTMC | 16 | 15 | 0 | 12 | 0 | 11 | 0 | 12 | 17 | 11 | 17 | 12 | 15 | 12 | 12 | 14 | 0 | 12 | 9 | 11 | 15 | 12 | 6 | 11 | 13 | 12 | 4 | 14 | 12 | 15 | 4 | 14 | 9 INPUTS | 11 | LAN_SM_FSM_FFd7 | LAN_SM_FSM_FFd5 | LAN_SM_FSM_FFd10 | LAN_SM_FSM_FFd8 | LAN_SM_FSM_FFd12 | LAN_SM_FSM_FFd2 | LAN_SM_FSM_FFd6 | LAN_SM_FSM_FFd9 | LAN_SM_FSM_FFd1 | LAN_SM_FSM_FFd11 | LAN_SM_FSM_FFd4 INPUTMC | 11 | 14 | 4 | 14 | 17 | 11 | 3 | 11 | 2 | 14 | 1 | 8 | 12 | 14 | 10 | 14 | 6 | 8 | 2 | 14 | 7 | 8 | 17 EQ | 4 | $OpTx$FX_DC$1248 = !LAN_SM_FSM_FFd7 & !LAN_SM_FSM_FFd5 & !LAN_SM_FSM_FFd10 & !LAN_SM_FSM_FFd8 & !LAN_SM_FSM_FFd12 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd6 & !LAN_SM_FSM_FFd9 & !LAN_SM_FSM_FFd1 & !LAN_SM_FSM_FFd11 & !LAN_SM_FSM_FFd4; MACROCELL | 4 | 15 | $OpTx$$OpTx$FX_DC$87_INV$1549 ATTRIBUTES | 133888 | 0 OUTPUTMC | 3 | 6 | 12 | 6 | 14 | 4 | 14 INPUTS | 8 | A<4> | A<1> | AS | RW | FCS | AUTOCONFIG_Z2_ACCESS | Z3_DATA<27> | LAN_ACCESS INPUTMC | 3 | 4 | 0 | 10 | 6 | 8 | 1 INPUTP | 5 | 97 | 107 | 152 | 158 | 147 EXPORTS | 1 | 4 | 14 EQ | 3 | $OpTx$$OpTx$FX_DC$87_INV$1549 = !A<4> & !A<1>; $OpTx$$OpTx$FX_DC$87_INV$1549.EXP = !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # Z3_DATA<27> & RW & !FCS & LAN_ACCESS MACROCELL | 9 | 13 | _18_ ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 12 INPUTS | 10 | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST | DQ<8>_BUFR | RESET | LDS | RW | FCS | LAN_ACCESS | DQ_DATA<6> | DS1 | DS0 INPUTMC | 4 | 1 | 15 | 1 | 0 | 8 | 1 | 12 | 4 INPUTP | 6 | 263 | 157 | 158 | 147 | 148 | 170 EXPORTS | 1 | 9 | 12 EQ | 8 | DQ<8> = DQ<8>_BUFR; DQ<8>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; _18_.EXP = RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<6> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<6> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<6> MACROCELL | 9 | 9 | _19_ ATTRIBUTES | 265986 | 0 OUTPUTMC | 1 | 9 | 8 INPUTS | 9 | DQ_4_IOBUFE/DQ_4_IOBUFE_TRST | DQ<4>_BUFR | RESET | DS1 | RW | FCS | LAN_ACCESS | DQ_DATA<5> | DS0 INPUTMC | 4 | 1 | 15 | 9 | 0 | 8 | 1 | 11 | 13 INPUTP | 5 | 263 | 148 | 158 | 147 | 170 EXPORTS | 1 | 9 | 8 EQ | 6 | DQ<4> = DQ<4>_BUFR; DQ<4>.OE = DQ_4_IOBUFE/DQ_4_IOBUFE_TRST; _19_.EXP = RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<5> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<5> MACROCELL | 0 | 6 | EXP24_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 0 | 5 INPUTS | 7 | FCS | DQ<4>.PIN | LAN_ACCESS | AS | RW | AUTOCONFIG_Z2_ACCESS | Z3_DATA<20> INPUTMC | 3 | 8 | 1 | 4 | 0 | 10 | 12 INPUTP | 4 | 147 | 225 | 152 | 158 EXPORTS | 1 | 0 | 5 EQ | 5 | EXP24_.EXP = FCS & DQ<4>.PIN # !LAN_ACCESS & DQ<4>.PIN # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS # Z3_DATA<20> & RW & !FCS & LAN_ACCESS MACROCELL | 1 | 10 | EXP25_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 1 | 11 INPUTS | 7 | FCS | DQ<3>.PIN | LAN_ACCESS | AS | RW | AUTOCONFIG_Z2_ACCESS | Z3_DATA<19> INPUTMC | 3 | 8 | 1 | 4 | 0 | 10 | 14 INPUTP | 4 | 147 | 219 | 152 | 158 EXPORTS | 1 | 1 | 11 EQ | 5 | EXP25_.EXP = FCS & DQ<3>.PIN # !LAN_ACCESS & DQ<3>.PIN # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS # Z3_DATA<19> & RW & !FCS & LAN_ACCESS MACROCELL | 1 | 17 | EXP26_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 1 | 16 INPUTS | 7 | FCS | DQ<8>.PIN | LAN_ACCESS | AS | RW | AUTOCONFIG_Z2_ACCESS | Z3_DATA<24> INPUTMC | 3 | 8 | 1 | 4 | 0 | 15 | 12 INPUTP | 4 | 147 | 231 | 152 | 158 EXPORTS | 1 | 1 | 16 EQ | 5 | EXP26_.EXP = FCS & DQ<8>.PIN # !LAN_ACCESS & DQ<8>.PIN # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS # Z3_DATA<24> & RW & !FCS & LAN_ACCESS MACROCELL | 2 | 17 | EXP27_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 2 | 16 INPUTS | 6 | D<11>.PIN | LAN_BASEADR<11> | D<12>.PIN | LAN_BASEADR<12> | D<15>.PIN | LAN_BASEADR<15> INPUTMC | 3 | 7 | 13 | 7 | 12 | 0 | 12 INPUTP | 3 | 77 | 78 | 89 EXPORTS | 1 | 2 | 16 EQ | 5 | EXP27_.EXP = !D<11>.PIN & LAN_BASEADR<11> # D<12>.PIN & !LAN_BASEADR<12> # !D<12>.PIN & LAN_BASEADR<12> # D<15>.PIN & !LAN_BASEADR<15> # !D<15>.PIN & LAN_BASEADR<15> MACROCELL | 4 | 2 | EXP28_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 1 INPUTS | 7 | CP_BASEADR<0> | A<16>.PIN | CP_BASEADR<2> | A<18>.PIN | CP_BASEADR<7> | A<23>.PIN | EXP29_.EXP INPUTMC | 4 | 3 | 17 | 3 | 15 | 3 | 9 | 4 | 3 INPUTP | 3 | 175 | 171 | 161 EXPORTS | 1 | 4 | 1 IMPORTS | 1 | 4 | 3 EQ | 16 | EXP28_.EXP = CP_BASEADR<0> & !A<16>.PIN # !CP_BASEADR<0> & A<16>.PIN # !CP_BASEADR<2> & A<18>.PIN # CP_BASEADR<7> & !A<23>.PIN # !CP_BASEADR<7> & A<23>.PIN ;Imported pterms FB5_4 # CP_BASEADR<1> & !A<17>.PIN # !CP_BASEADR<1> & A<17>.PIN # CP_BASEADR<2> & !A<18>.PIN # CP_BASEADR<4> & !A<20>.PIN # !CP_BASEADR<4> & A<20>.PIN ;Imported pterms FB5_5 # CP_BASEADR<3> & !A<19>.PIN # !CP_BASEADR<3> & A<19>.PIN # CP_BASEADR<5> & !A<21>.PIN # !CP_BASEADR<5> & A<21>.PIN MACROCELL | 4 | 3 | EXP29_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 2 INPUTS | 7 | CP_BASEADR<1> | A<17>.PIN | CP_BASEADR<2> | A<18>.PIN | CP_BASEADR<4> | A<20>.PIN | ROM_OE_OBUF.EXP INPUTMC | 4 | 3 | 16 | 3 | 15 | 3 | 14 | 4 | 4 INPUTP | 3 | 172 | 171 | 167 EXPORTS | 1 | 4 | 2 IMPORTS | 1 | 4 | 4 EQ | 10 | EXP29_.EXP = CP_BASEADR<1> & !A<17>.PIN # !CP_BASEADR<1> & A<17>.PIN # CP_BASEADR<2> & !A<18>.PIN # CP_BASEADR<4> & !A<20>.PIN # !CP_BASEADR<4> & A<20>.PIN ;Imported pterms FB5_5 # CP_BASEADR<3> & !A<19>.PIN # !CP_BASEADR<3> & A<19>.PIN # CP_BASEADR<5> & !A<21>.PIN # !CP_BASEADR<5> & A<21>.PIN MACROCELL | 4 | 17 | EXP30_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 4 | 16 INPUTS | 8 | AS | FCS | DQ<12>.PIN | Z3_DATA<28> | RW | LAN_ACCESS | AUTOCONFIG_Z2_ACCESS | D_Z2_OUT<0> INPUTMC | 4 | 10 | 5 | 8 | 1 | 4 | 0 | 6 | 7 INPUTP | 4 | 152 | 147 | 235 | 158 EXPORTS | 1 | 4 | 16 EQ | 6 | EXP30_.EXP = AS & FCS & DQ<12>.PIN # Z3_DATA<28> & RW & !FCS & LAN_ACCESS # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<0> # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & D_Z2_OUT<0> MACROCELL | 6 | 5 | EXP31_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 4 INPUTS | 8 | AS | FCS | DQ<14>.PIN | AUTOCONFIG_Z2_ACCESS | Z3_DATA<30> | RW | LAN_ACCESS | D_Z2_OUT<2> INPUTMC | 4 | 4 | 0 | 10 | 1 | 8 | 1 | 6 | 16 INPUTP | 4 | 152 | 147 | 236 | 158 EXPORTS | 1 | 6 | 4 EQ | 7 | EXP31_.EXP = AS & FCS & DQ<14>.PIN # FCS & !AUTOCONFIG_Z2_ACCESS & DQ<14>.PIN # Z3_DATA<30> & RW & !FCS & LAN_ACCESS # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<2> # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & D_Z2_OUT<2> MACROCELL | 6 | 6 | EXP32_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 7 INPUTS | 7 | A<5> | A<4> | A<2> | UDS | LDS | A<3> | A<1> INPUTP | 7 | 91 | 97 | 101 | 155 | 157 | 99 | 107 EXPORTS | 1 | 6 | 7 EQ | 5 | EXP32_.EXP = A<5> & A<4> # A<5> & !A<2> # UDS & LDS # A<4> & !A<2> & !A<3> # A<4> & A<1> & !A<3> MACROCELL | 6 | 8 | EXP33_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 7 INPUTS | 7 | A<4> | A<2> | A<1> | A<3> | A<5> | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> INPUTMC | 2 | 13 | 17 | 13 | 3 INPUTP | 5 | 97 | 101 | 107 | 99 | 91 EXPORTS | 1 | 6 | 7 EQ | 6 | EXP33_.EXP = !A<4> & !A<2> & A<1> # A<2> & !A<1> & A<3> # !A<5> & !A<4> & A<1> & A<3> # !A<5> & A<1> & AUTO_CONFIG_Z2_DONE<0> & !A<3> # !A<5> & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<3> MACROCELL | 6 | 10 | EXP34_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 11 INPUTS | 9 | AS | FCS | DQ<15>.PIN | LAN_ACCESS | AUTOCONFIG_Z2_ACCESS | Z3_DATA<31> | RW | D_Z2_OUT<3> | AUTO_CONFIG_Z2_DONE_CYCLE<0>.EXP INPUTMC | 5 | 8 | 1 | 4 | 0 | 15 | 15 | 13 | 1 | 6 | 9 INPUTP | 4 | 152 | 147 | 202 | 158 EXPORTS | 1 | 6 | 11 IMPORTS | 1 | 6 | 9 EQ | 9 | EXP34_.EXP = AS & FCS & DQ<15>.PIN # AS & !LAN_ACCESS & DQ<15>.PIN # FCS & !AUTOCONFIG_Z2_ACCESS & DQ<15>.PIN # Z3_DATA<31> & RW & !FCS & LAN_ACCESS # !AS & RW & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & D_Z2_OUT<3> ;Imported pterms FB7_10 # !AS & RW & FCS & AUTOCONFIG_Z2_ACCESS & D_Z2_OUT<3> MACROCELL | 6 | 12 | EXP35_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 13 INPUTS | 9 | A<5> | A<2> | $OpTx$$OpTx$FX_DC$87_INV$1549 | UDS | LDS | A<4> | A<3> | A<1> | D_15_IOBUFE.EXP INPUTMC | 2 | 4 | 15 | 6 | 11 INPUTP | 7 | 91 | 101 | 155 | 157 | 97 | 99 | 107 EXPORTS | 1 | 6 | 13 IMPORTS | 1 | 6 | 11 EQ | 10 | EXP35_.EXP = A<5> & !A<2> # A<5> & !$OpTx$$OpTx$FX_DC$87_INV$1549 # UDS & LDS # !A<4> & A<2> & A<3> # !A<4> & !A<1> & A<3> ;Imported pterms FB7_12 # A<4> & A<1> & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & !A<3> # A<2> & A<1> & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !A<3> MACROCELL | 6 | 14 | EXP36_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 13 INPUTS | 8 | A<4> | A<2> | AUTO_CONFIG_Z2_DONE<0> | A<3> | A<1> | AUTO_CONFIG_Z2_DONE<1> | A<5> | $OpTx$$OpTx$FX_DC$87_INV$1549 INPUTMC | 3 | 13 | 17 | 13 | 3 | 4 | 15 INPUTP | 5 | 97 | 101 | 99 | 107 | 91 EXPORTS | 1 | 6 | 13 EQ | 6 | EXP36_.EXP = A<4> & A<2> & !AUTO_CONFIG_Z2_DONE<0> & !A<3> # A<4> & !A<2> & A<1> & A<3> # A<4> & !A<2> & !A<1> & !A<3> # A<4> & !A<1> & !AUTO_CONFIG_Z2_DONE<1> & !A<3> # !A<5> & A<2> & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & $OpTx$$OpTx$FX_DC$87_INV$1549 MACROCELL | 6 | 15 | EXP37_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 16 INPUTS | 5 | A<5> | A<4> | A<2> | A<3> | A<1> INPUTP | 5 | 91 | 97 | 101 | 99 | 107 EXPORTS | 1 | 6 | 16 EQ | 5 | EXP37_.EXP = A<5> & A<4> # A<5> & !A<2> # A<4> & !A<2> # !A<4> & A<3> # A<1> & A<3> MACROCELL | 6 | 17 | EXP38_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 6 | 16 INPUTS | 10 | A<5> | A<1> | UDS | LDS | A<4> | A<3> | A<2> | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | SHUT_UP_Z2<0>.EXP INPUTMC | 3 | 13 | 17 | 13 | 3 | 6 | 0 INPUTP | 7 | 91 | 107 | 155 | 157 | 97 | 99 | 101 EXPORTS | 1 | 6 | 16 IMPORTS | 1 | 6 | 0 EQ | 9 | EXP38_.EXP = A<5> & !A<1> # UDS & LDS # A<4> & !A<1> & !A<3> # !A<2> & !A<1> & AUTO_CONFIG_Z2_DONE<0> # !A<4> & !A<1> & AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> ;Imported pterms FB7_1 # !A<5> & !A<4> & A<2> & A<1> & !AUTO_CONFIG_Z2_DONE<0> MACROCELL | 7 | 0 | EXP39_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 1 INPUTS | 9 | RESET | UDS | RW | FCS | LAN_ACCESS | DQ_DATA<12> | LDS | DS1 | DS0 INPUTMC | 2 | 8 | 1 | 12 | 17 INPUTP | 7 | 263 | 155 | 158 | 147 | 157 | 148 | 170 EXPORTS | 1 | 7 | 1 EQ | 8 | EXP39_.EXP = RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<12> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<12> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<12> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<12> MACROCELL | 7 | 3 | EXP40_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 2 INPUTS | 9 | RESET | UDS | RW | FCS | LAN_ACCESS | DQ_DATA<14> | LDS | DS1 | DS0 INPUTMC | 2 | 8 | 1 | 12 | 15 INPUTP | 7 | 263 | 155 | 158 | 147 | 157 | 148 | 170 EXPORTS | 1 | 7 | 2 EQ | 8 | EXP40_.EXP = RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<14> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<14> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<14> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<14> MACROCELL | 7 | 16 | EXP41_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 7 | 15 INPUTS | 15 | A<5> | A<4> | A<2> | A<1> | AS | AUTO_CONFIG_Z2_DONE<0> | AUTO_CONFIG_Z2_DONE<1> | D<11>.PIN | CP_BASEADR<3> | UDS | A<6> | A<3> | RW | AUTOCONFIG_Z2_ACCESS | LDS INPUTMC | 4 | 13 | 17 | 13 | 3 | 7 | 15 | 4 | 0 INPUTP | 11 | 91 | 97 | 101 | 107 | 152 | 77 | 155 | 98 | 99 | 158 | 157 EXPORTS | 1 | 7 | 15 EQ | 9 | EXP41_.EXP = !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<11>.PIN & !CP_BASEADR<3> & !UDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & D<11>.PIN & !CP_BASEADR<3> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS # !A<5> & !A<4> & !A<2> & !A<1> & !AS & AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & !D<11>.PIN & CP_BASEADR<3> & !LDS & A<6> & A<3> & !RW & AUTOCONFIG_Z2_ACCESS MACROCELL | 8 | 0 | EXP42_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 8 | 1 INPUTS | 7 | $OpTx$INV$62 | $OpTx$INV$61 | LAN_BASEADR<0> | A<16>.PIN | LAN_BASEADR<1> | A<17>.PIN | LAN_SM_FSM_FFd4.EXP INPUTMC | 5 | 2 | 15 | 2 | 16 | 7 | 14 | 0 | 10 | 8 | 17 INPUTP | 2 | 175 | 172 EXPORTS | 1 | 8 | 1 IMPORTS | 1 | 8 | 17 EQ | 9 | EXP42_.EXP = $OpTx$INV$62 # $OpTx$INV$61 # LAN_BASEADR<0> & !A<16>.PIN # !LAN_BASEADR<0> & A<16>.PIN # LAN_BASEADR<1> & !A<17>.PIN ;Imported pterms FB9_18 # !LAN_BASEADR<3> & A<19>.PIN # LAN_BASEADR<4> & !A<20>.PIN # !LAN_BASEADR<4> & A<20>.PIN MACROCELL | 8 | 6 | EXP43_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 8 | 5 INPUTS | 7 | IDE_BASEADR<3> | A<19>.PIN | IDE_BASEADR<4> | A<20>.PIN | IDE_BASEADR<5> | A<21>.PIN | Z3_ADR<12>.EXP INPUTMC | 4 | 1 | 3 | 3 | 8 | 3 | 6 | 8 | 7 INPUTP | 3 | 169 | 167 | 163 EXPORTS | 1 | 8 | 5 IMPORTS | 1 | 8 | 7 EQ | 8 | EXP43_.EXP = IDE_BASEADR<3> & !A<19>.PIN # IDE_BASEADR<4> & !A<20>.PIN # !IDE_BASEADR<4> & A<20>.PIN # IDE_BASEADR<5> & !A<21>.PIN # !IDE_BASEADR<5> & A<21>.PIN ;Imported pterms FB9_8 # IDE_BASEADR<7> & !A<23>.PIN # !IDE_BASEADR<7> & A<23>.PIN MACROCELL | 9 | 3 | EXP44_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 2 INPUTS | 10 | RESET | UDS | LDS | DS1 | DS0 | D<0>.PIN | RW | FCS | LAN_ACCESS | DQ_DATA<0> INPUTMC | 2 | 8 | 1 | 15 | 0 INPUTP | 8 | 263 | 155 | 157 | 148 | 170 | 4 | 158 | 147 EXPORTS | 1 | 9 | 2 EQ | 9 | EXP44_.EXP = RESET & UDS & LDS & DS1 & DS0 & D<0>.PIN # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<0> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<0> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<0> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<0> MACROCELL | 9 | 6 | EXP45_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 5 INPUTS | 11 | RESET | RW | D<2>.PIN | FCS | LAN_ACCESS | UDS | LDS | DS1 | DS0 | DQ_DATA<2> | DQ_5_IOBUFE.EXP INPUTMC | 3 | 8 | 1 | 12 | 9 | 9 | 7 INPUTP | 8 | 263 | 158 | 71 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 9 | 5 IMPORTS | 1 | 9 | 7 EQ | 13 | EXP45_.EXP = RESET & RW & D<2>.PIN # RESET & FCS & D<2>.PIN # RESET & !LAN_ACCESS & D<2>.PIN # RESET & UDS & LDS & DS1 & DS0 & D<2>.PIN # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<2> ;Imported pterms FB10_8 # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<2> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<2> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<2> MACROCELL | 9 | 8 | EXP46_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 7 INPUTS | 11 | RESET | RW | D<5>.PIN | FCS | UDS | LDS | DS1 | DS0 | LAN_ACCESS | DQ_DATA<5> | _19_.EXP INPUTMC | 3 | 8 | 1 | 11 | 13 | 9 | 9 INPUTP | 8 | 263 | 158 | 37 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 9 | 7 IMPORTS | 1 | 9 | 9 EQ | 12 | EXP46_.EXP = RESET & RW & D<5>.PIN # RESET & FCS & D<5>.PIN # RESET & UDS & LDS & DS1 & DS0 & D<5>.PIN # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<5> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<5> ;Imported pterms FB10_10 # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<5> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<5> MACROCELL | 9 | 12 | EXP47_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 11 INPUTS | 11 | RESET | RW | D<6>.PIN | FCS | LAN_ACCESS | UDS | LDS | DS1 | DS0 | DQ_DATA<6> | _18_.EXP INPUTMC | 3 | 8 | 1 | 12 | 4 | 9 | 13 INPUTP | 8 | 263 | 158 | 26 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 9 | 11 IMPORTS | 1 | 9 | 13 EQ | 13 | EXP47_.EXP = RESET & RW & D<6>.PIN # RESET & FCS & D<6>.PIN # RESET & !LAN_ACCESS & D<6>.PIN # RESET & UDS & LDS & DS1 & DS0 & D<6>.PIN # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<6> ;Imported pterms FB10_14 # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<6> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<6> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<6> MACROCELL | 9 | 14 | EXP48_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 15 INPUTS | 8 | RESET | LDS | RW | FCS | LAN_ACCESS | DQ_DATA<10> | DS1 | DS0 INPUTMC | 2 | 8 | 1 | 12 | 0 INPUTP | 6 | 263 | 157 | 158 | 147 | 148 | 170 EXPORTS | 1 | 9 | 15 EQ | 6 | EXP48_.EXP = RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<10> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<10> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<10> MACROCELL | 9 | 15 | EXP49_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 16 INPUTS | 11 | RESET | D<10>.PIN | RW | FCS | LAN_ACCESS | UDS | LDS | DS1 | DS0 | DQ_DATA<10> | EXP48_.EXP INPUTMC | 3 | 8 | 1 | 12 | 0 | 9 | 14 INPUTP | 8 | 263 | 74 | 158 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 9 | 16 IMPORTS | 1 | 9 | 14 EQ | 13 | EXP49_.EXP = RESET & D<10>.PIN & RW # RESET & D<10>.PIN & FCS # RESET & D<10>.PIN & !LAN_ACCESS # RESET & D<10>.PIN & UDS & LDS & DS1 & DS0 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<10> ;Imported pterms FB10_15 # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<10> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<10> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<10> MACROCELL | 9 | 17 | EXP50_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 9 | 0 INPUTS | 11 | RESET | RW | D<4>.PIN | FCS | LAN_ACCESS | UDS | LDS | DS1 | DS0 | DQ_DATA<4> | DQ_10_IOBUFE.EXP INPUTMC | 3 | 8 | 1 | 12 | 6 | 9 | 16 INPUTP | 8 | 263 | 158 | 38 | 147 | 155 | 157 | 148 | 170 EXPORTS | 1 | 9 | 0 IMPORTS | 1 | 9 | 16 EQ | 13 | EXP50_.EXP = RESET & RW & D<4>.PIN # RESET & FCS & D<4>.PIN # RESET & !LAN_ACCESS & D<4>.PIN # RESET & UDS & LDS & DS1 & DS0 & D<4>.PIN # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<4> ;Imported pterms FB10_17 # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<4> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<4> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<4> MACROCELL | 11 | 6 | EXP51_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 7 INPUTS | 10 | RESET | D<13>.PIN | UDS | LDS | DS1 | DS0 | RW | FCS | LAN_ACCESS | DQ_DATA<13> INPUTMC | 2 | 8 | 1 | 11 | 17 INPUTP | 8 | 263 | 80 | 155 | 157 | 148 | 170 | 158 | 147 EXPORTS | 1 | 11 | 7 EQ | 9 | EXP51_.EXP = RESET & D<13>.PIN & UDS & LDS & DS1 & DS0 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<13> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<13> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<13> # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<13> MACROCELL | 11 | 8 | EXP52_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 9 INPUTS | 11 | RESET | D<11>.PIN | FCS | UDS | LDS | DS1 | DS0 | RW | LAN_ACCESS | DQ_DATA<11> | DQ_13_IOBUFE.EXP INPUTMC | 3 | 8 | 1 | 11 | 0 | 11 | 7 INPUTP | 8 | 263 | 77 | 147 | 155 | 157 | 148 | 170 | 158 EXPORTS | 1 | 11 | 9 IMPORTS | 1 | 11 | 7 EQ | 11 | EXP52_.EXP = RESET & D<11>.PIN & FCS # RESET & D<11>.PIN & UDS & LDS & DS1 & DS0 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<11> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<11> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<11> ;Imported pterms FB12_8 # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<11> MACROCELL | 11 | 10 | EXP53_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 11 INPUTS | 11 | RESET | D<9>.PIN | FCS | UDS | LDS | DS1 | DS0 | RW | LAN_ACCESS | DQ_DATA<9> | DQ_11_IOBUFE.EXP INPUTMC | 3 | 8 | 1 | 14 | 9 | 11 | 9 INPUTP | 8 | 263 | 73 | 147 | 155 | 157 | 148 | 170 | 158 EXPORTS | 1 | 11 | 11 IMPORTS | 1 | 11 | 9 EQ | 11 | EXP53_.EXP = RESET & D<9>.PIN & FCS # RESET & D<9>.PIN & UDS & LDS & DS1 & DS0 # RESET & !UDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<9> # RESET & !LDS & !RW & !FCS & LAN_ACCESS & DQ_DATA<9> # RESET & !DS1 & !RW & !FCS & LAN_ACCESS & DQ_DATA<9> ;Imported pterms FB12_10 # RESET & !DS0 & !RW & !FCS & LAN_ACCESS & DQ_DATA<9> MACROCELL | 11 | 12 | EXP54_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 13 INPUTS | 8 | D<13>.PIN | UDS | DQ_SWAP | LAN_SM_FSM_FFd13 | LDS | D<5>.PIN | A<21>.PIN | DQ_9_IOBUFE.EXP INPUTMC | 3 | 8 | 11 | 8 | 8 | 11 | 11 INPUTP | 5 | 80 | 155 | 157 | 37 | 163 EXPORTS | 1 | 11 | 13 IMPORTS | 1 | 11 | 11 EQ | 9 | EXP54_.EXP = D<13>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<13>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<5>.PIN # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<5>.PIN # UDS & LDS & A<21>.PIN & DQ_SWAP & LAN_SM_FSM_FFd13 ;Imported pterms FB12_12 # UDS & LDS & !DQ_SWAP & A<13>.PIN & LAN_SM_FSM_FFd13 MACROCELL | 11 | 14 | EXP55_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 15 INPUTS | 8 | D<11>.PIN | UDS | DQ_SWAP | LAN_SM_FSM_FFd13 | LDS | D<3>.PIN | A<19>.PIN | DQ_DATA<5>.EXP INPUTMC | 3 | 8 | 11 | 8 | 8 | 11 | 13 INPUTP | 5 | 77 | 155 | 157 | 28 | 169 EXPORTS | 1 | 11 | 15 IMPORTS | 1 | 11 | 13 EQ | 9 | EXP55_.EXP = D<11>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<11>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<3>.PIN # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<3>.PIN # UDS & LDS & A<19>.PIN & DQ_SWAP & LAN_SM_FSM_FFd13 ;Imported pterms FB12_14 # UDS & LDS & !DQ_SWAP & A<11>.PIN & LAN_SM_FSM_FFd13 MACROCELL | 11 | 16 | EXP56_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 11 | 17 INPUTS | 8 | D<13>.PIN | UDS | DQ_SWAP | LAN_SM_FSM_FFd13 | LDS | D<5>.PIN | A<13>.PIN | DQ_DATA<3>.EXP INPUTMC | 3 | 8 | 11 | 8 | 8 | 11 | 15 INPUTP | 5 | 80 | 155 | 157 | 37 | 123 EXPORTS | 1 | 11 | 17 IMPORTS | 1 | 11 | 15 EQ | 9 | EXP56_.EXP = D<13>.PIN & !UDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # D<13>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<5>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<5>.PIN # UDS & LDS & DQ_SWAP & A<13>.PIN & LAN_SM_FSM_FFd13 ;Imported pterms FB12_16 # UDS & LDS & A<21>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd13 MACROCELL | 12 | 2 | EXP57_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 1 INPUTS | 2 | AS | CP_RD_S INPUTMC | 1 | 6 | 1 INPUTP | 1 | 152 EXPORTS | 1 | 12 | 1 EQ | 1 | EXP57_.EXP = !AS & !CP_RD_S MACROCELL | 12 | 3 | EXP58_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 4 INPUTS | 8 | D<14>.PIN | UDS | DQ_SWAP | LAN_SM_FSM_FFd13 | LDS | D<6>.PIN | A<22>.PIN | A<14>.PIN INPUTMC | 2 | 8 | 11 | 8 | 8 INPUTP | 6 | 81 | 155 | 157 | 26 | 162 | 125 EXPORTS | 1 | 12 | 4 EQ | 7 | EXP58_.EXP = D<14>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<14>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<6>.PIN # UDS & LDS & A<22>.PIN & DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & !DQ_SWAP & A<14>.PIN & LAN_SM_FSM_FFd13 MACROCELL | 12 | 5 | EXP59_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 6 INPUTS | 8 | D<12>.PIN | UDS | DQ_SWAP | LAN_SM_FSM_FFd13 | LDS | D<4>.PIN | A<20>.PIN | A<12>.PIN INPUTMC | 2 | 8 | 11 | 8 | 8 INPUTP | 6 | 78 | 155 | 157 | 38 | 167 | 115 EXPORTS | 1 | 12 | 6 EQ | 7 | EXP59_.EXP = D<12>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<12>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<4>.PIN # UDS & LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & A<20>.PIN # UDS & LDS & !DQ_SWAP & A<12>.PIN & LAN_SM_FSM_FFd13 MACROCELL | 12 | 8 | EXP60_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 9 INPUTS | 8 | D<10>.PIN | UDS | DQ_SWAP | LAN_SM_FSM_FFd13 | LDS | D<2>.PIN | A<18>.PIN | A<10>.PIN INPUTMC | 2 | 8 | 11 | 8 | 8 INPUTP | 6 | 74 | 155 | 157 | 71 | 171 | 112 EXPORTS | 1 | 12 | 9 EQ | 7 | EXP60_.EXP = D<10>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<10>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<2>.PIN # UDS & LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & A<18>.PIN # UDS & LDS & !DQ_SWAP & A<10>.PIN & LAN_SM_FSM_FFd13 MACROCELL | 12 | 11 | EXP61_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 12 INPUTS | 7 | D<15>.PIN | LDS | DQ_SWAP | LAN_SM_FSM_FFd13 | UDS | D<7>.PIN | A<15>.PIN INPUTMC | 2 | 8 | 11 | 8 | 8 INPUTP | 5 | 89 | 157 | 155 | 29 | 139 EXPORTS | 1 | 12 | 12 EQ | 5 | EXP61_.EXP = D<15>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<7>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<7>.PIN # UDS & LDS & DQ_SWAP & A<15>.PIN & LAN_SM_FSM_FFd13 MACROCELL | 12 | 14 | EXP62_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 15 INPUTS | 8 | D<14>.PIN | LDS | DQ_SWAP | LAN_SM_FSM_FFd13 | UDS | D<6>.PIN | A<22>.PIN | A<14>.PIN INPUTMC | 2 | 8 | 11 | 8 | 8 INPUTP | 6 | 81 | 157 | 155 | 26 | 162 | 125 EXPORTS | 1 | 12 | 15 EQ | 7 | EXP62_.EXP = D<14>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<6>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<6>.PIN # UDS & LDS & A<22>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & DQ_SWAP & A<14>.PIN & LAN_SM_FSM_FFd13 MACROCELL | 12 | 16 | EXP63_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 12 | 17 INPUTS | 8 | D<12>.PIN | LDS | DQ_SWAP | LAN_SM_FSM_FFd13 | UDS | D<4>.PIN | A<12>.PIN | A<20>.PIN INPUTMC | 2 | 8 | 11 | 8 | 8 INPUTP | 6 | 78 | 157 | 155 | 38 | 115 | 167 EXPORTS | 1 | 12 | 17 EQ | 7 | EXP63_.EXP = D<12>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<4>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<4>.PIN # UDS & LDS & DQ_SWAP & A<12>.PIN & LAN_SM_FSM_FFd13 # UDS & LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & A<20>.PIN MACROCELL | 13 | 0 | EXP64_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 13 | 1 INPUTS | 11 | A<5> | A<2> | A<1> | AS | LDS | A<6> | A<3> | AUTOCONFIG_Z2_ACCESS | AUTO_CONFIG_Z2_DONE<0> | UDS | AUTO_CONFIG_Z2_DONE<1> INPUTMC | 3 | 4 | 0 | 13 | 17 | 13 | 3 INPUTP | 8 | 91 | 101 | 107 | 152 | 157 | 98 | 99 | 155 EXPORTS | 1 | 13 | 1 EQ | 10 | EXP64_.EXP = !A<5> & !A<2> & A<1> & !AS & !LDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS # !A<5> & A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !UDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS # !A<5> & A<1> & !AS & !AUTO_CONFIG_Z2_DONE<0> & !LDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS # !A<5> & A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !UDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS # !A<5> & A<1> & !AS & !AUTO_CONFIG_Z2_DONE<1> & !LDS & !A<6> & !A<3> & AUTOCONFIG_Z2_ACCESS MACROCELL | 15 | 3 | EXP65_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 15 | 4 INPUTS | 8 | D<8>.PIN | LDS | DQ_SWAP | LAN_SM_FSM_FFd13 | UDS | D<0>.PIN | A<16>.PIN | A<8>.PIN INPUTMC | 2 | 8 | 11 | 8 | 8 INPUTP | 6 | 32 | 157 | 155 | 4 | 175 | 106 EXPORTS | 1 | 15 | 4 EQ | 7 | EXP65_.EXP = D<8>.PIN & !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 # !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<0>.PIN # !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 & D<0>.PIN # UDS & LDS & A<16>.PIN & !DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & DQ_SWAP & A<8>.PIN & LAN_SM_FSM_FFd13 MACROCELL | 15 | 17 | EXP66_ ATTRIBUTES | 2048 | 0 OUTPUTMC | 1 | 15 | 0 INPUTS | 8 | D<8>.PIN | UDS | DQ_SWAP | LAN_SM_FSM_FFd13 | LDS | D<0>.PIN | A<16>.PIN | A<8>.PIN INPUTMC | 2 | 8 | 11 | 8 | 8 INPUTP | 6 | 32 | 155 | 157 | 4 | 175 | 106 EXPORTS | 1 | 15 | 0 EQ | 7 | EXP66_.EXP = D<8>.PIN & !UDS & DQ_SWAP & LAN_SM_FSM_FFd13 # D<8>.PIN & !LDS & DQ_SWAP & LAN_SM_FSM_FFd13 # !LDS & !DQ_SWAP & LAN_SM_FSM_FFd13 & D<0>.PIN # UDS & LDS & A<16>.PIN & DQ_SWAP & LAN_SM_FSM_FFd13 # UDS & LDS & !DQ_SWAP & A<8>.PIN & LAN_SM_FSM_FFd13 PIN | Z3 | 64 | 0 | N/A | 151 | 1 | 2 | 16 PIN | CLK_EXT | 4096 | 0 | N/A | 57 | 83 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 2 | 0 | 15 | 16 | 15 | 6 | 15 | 8 | 10 | 14 | 10 | 12 | 10 | 8 | 10 | 7 | 15 | 11 | 15 | 12 | 15 | 13 | 15 | 14 | 10 | 6 | 10 | 5 | 10 | 3 | 10 | 1 | 15 | 15 | 14 | 4 | 14 | 17 | 11 | 3 | 14 | 5 | 11 | 2 | 14 | 1 | 8 | 12 | 14 | 10 | 14 | 6 | 8 | 2 | 14 | 7 | 8 | 17 | 5 | 15 | 5 | 14 | 5 | 12 | 5 | 10 | 5 | 3 | 15 | 0 | 12 | 0 | 11 | 0 | 12 | 17 | 11 | 17 | 12 | 15 | 12 | 12 | 14 | 0 | 12 | 9 | 11 | 15 | 12 | 6 | 11 | 13 | 12 | 4 | 14 | 12 | 15 | 4 | 14 | 9 | 5 | 11 | 5 | 8 | 5 | 6 | 2 | 6 | 5 | 0 | 5 | 17 | 5 | 16 | 14 | 15 | 2 | 7 | 14 | 8 | 10 | 15 | 14 | 3 | 14 | 2 | 10 | 17 | 8 | 8 | 2 | 3 | 11 | 5 PIN | RW | 64 | 0 | N/A | 158 | 142 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 6 | 9 | 6 | 3 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 1 | 17 | 3 | 2 | 7 | 14 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 0 | 10 | 0 | 8 | 7 | 10 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 7 | 5 | 0 | 1 | 9 | 15 | 11 | 9 | 9 | 1 | 7 | 16 | 1 | 0 | 11 | 11 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 9 | 9 | 10 | 9 | 17 | 11 | 2 | 14 | 6 | 14 | 7 | 8 | 9 | 6 | 0 | 7 | 17 | 3 | 0 | 13 | 6 | 8 | 14 | 13 | 7 | 14 | 15 | 11 | 10 | 13 | 5 | 6 | 1 | 1 | 15 | 0 | 2 | 0 | 6 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 0 | 16 | 1 | 1 | 1 | 4 | 1 | 5 | 1 | 7 | 1 | 10 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 3 | 13 | 4 | 8 | 4 | 10 | 4 | 12 | 4 | 15 | 4 | 17 | 6 | 5 | 6 | 10 | 7 | 0 | 7 | 3 | 7 | 4 | 7 | 7 | 7 | 9 | 9 | 0 | 9 | 5 | 9 | 7 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 11 | 3 | 11 | 5 | 11 | 6 | 11 | 8 PIN | FCS | 64 | 0 | N/A | 147 | 98 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 9 | 15 | 11 | 8 | 9 | 1 | 7 | 3 | 1 | 0 | 11 | 10 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 3 | 6 | 10 | 1 | 14 | 4 | 9 | 1 | 10 | 0 | 2 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 12 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 9 | 9 | 10 | 8 | 11 | 13 | 9 | 8 | 1 | 13 | 8 | 8 | 3 | 8 | 7 | 4 | 7 | 4 | 8 | 4 | 10 | 13 | 11 | 13 | 12 | 13 | 15 | 2 | 12 | 2 | 11 | 13 | 16 | 4 | 12 | 11 | 5 | 7 | 4 | 12 | 13 | 7 | 9 | 13 | 13 | 14 | 11 | 13 | 2 | 1 | 15 | 0 | 5 | 0 | 6 | 1 | 1 | 1 | 8 | 1 | 16 | 1 | 17 | 3 | 2 | 4 | 15 | 4 | 17 | 6 | 1 | 6 | 5 | 6 | 9 | 7 | 0 | 9 | 0 | 9 | 5 | 9 | 7 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 11 | 3 | 11 | 6 | 11 | 9 PIN | A<5> | 64 | 0 | N/A | 91 | 69 | 6 | 9 | 6 | 3 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 1 | 11 | 3 | 2 | 7 | 14 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 0 | 10 | 0 | 8 | 7 | 10 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 7 | 5 | 0 | 1 | 6 | 0 | 7 | 17 | 3 | 0 | 6 | 6 | 6 | 12 | 6 | 15 | 13 | 1 | 4 | 8 | 3 | 13 | 0 | 2 | 0 | 4 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 0 | 16 | 1 | 4 | 1 | 5 | 1 | 7 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 6 | 4 | 6 | 8 | 6 | 14 | 6 | 17 | 7 | 4 | 7 | 7 | 7 | 9 | 7 | 16 | 13 | 0 | 13 | 2 PIN | A<4> | 64 | 0 | N/A | 97 | 71 | 6 | 9 | 6 | 3 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 1 | 11 | 3 | 2 | 7 | 14 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 0 | 10 | 0 | 8 | 7 | 10 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 7 | 5 | 0 | 1 | 6 | 0 | 7 | 17 | 3 | 0 | 6 | 6 | 6 | 12 | 6 | 15 | 13 | 1 | 4 | 7 | 1 | 1 | 4 | 15 | 0 | 2 | 0 | 4 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 0 | 16 | 1 | 4 | 1 | 5 | 1 | 7 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 3 | 13 | 6 | 4 | 6 | 8 | 6 | 11 | 6 | 14 | 6 | 17 | 7 | 4 | 7 | 7 | 7 | 9 | 7 | 16 | 13 | 2 PIN | A<2> | 64 | 0 | N/A | 101 | 66 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 1 | 11 | 3 | 2 | 7 | 14 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 0 | 10 | 0 | 8 | 7 | 10 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 7 | 5 | 0 | 1 | 6 | 0 | 7 | 17 | 3 | 0 | 6 | 6 | 6 | 12 | 6 | 15 | 13 | 1 | 13 | 16 | 3 | 11 | 0 | 2 | 0 | 4 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 0 | 16 | 1 | 4 | 1 | 5 | 1 | 7 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 13 | 6 | 8 | 6 | 11 | 6 | 14 | 6 | 17 | 7 | 4 | 7 | 7 | 7 | 9 | 7 | 16 | 13 | 0 | 13 | 2 PIN | A<1> | 64 | 0 | N/A | 107 | 70 | 6 | 9 | 6 | 3 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 1 | 11 | 3 | 2 | 7 | 14 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 0 | 10 | 0 | 8 | 7 | 10 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 7 | 5 | 0 | 1 | 6 | 0 | 7 | 17 | 3 | 0 | 6 | 6 | 6 | 12 | 6 | 15 | 13 | 1 | 4 | 15 | 0 | 2 | 0 | 4 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 0 | 16 | 1 | 4 | 1 | 5 | 1 | 7 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 3 | 13 | 6 | 4 | 6 | 8 | 6 | 11 | 6 | 14 | 6 | 17 | 7 | 4 | 7 | 7 | 7 | 9 | 7 | 16 | 13 | 0 | 13 | 2 PIN | AS | 64 | 0 | N/A | 152 | 104 | 13 | 17 | 13 | 3 | 4 | 5 | 6 | 9 | 6 | 3 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 1 | 17 | 3 | 2 | 7 | 14 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 0 | 10 | 0 | 8 | 7 | 10 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 7 | 5 | 0 | 1 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 10 | 1 | 14 | 4 | 9 | 1 | 10 | 0 | 4 | 0 | 2 | 1 | 9 | 1 | 13 | 1 | 11 | 4 | 11 | 4 | 0 | 13 | 4 | 8 | 9 | 6 | 0 | 7 | 17 | 3 | 0 | 6 | 7 | 6 | 13 | 6 | 16 | 13 | 1 | 13 | 6 | 8 | 14 | 13 | 7 | 4 | 4 | 13 | 5 | 6 | 1 | 7 | 16 | 10 | 16 | 0 | 16 | 2 | 1 | 13 | 13 | 4 | 1 | 1 | 15 | 0 | 5 | 0 | 6 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 1 | 4 | 1 | 5 | 1 | 7 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 3 | 13 | 4 | 8 | 4 | 10 | 4 | 12 | 4 | 15 | 4 | 17 | 6 | 5 | 7 | 4 | 7 | 7 | 7 | 9 | 12 | 2 | 13 | 0 | 13 | 2 PIN | RESET | 64 | 0 | N/A | 263 | 134 | 13 | 17 | 13 | 3 | 4 | 5 | 6 | 9 | 6 | 3 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 2 | 7 | 14 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 0 | 10 | 0 | 8 | 7 | 10 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 7 | 5 | 0 | 1 | 2 | 0 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 0 | 1 | 0 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 7 | 9 | 9 | 9 | 10 | 8 | 11 | 4 | 0 | 13 | 9 | 8 | 1 | 13 | 4 | 5 | 15 | 5 | 14 | 5 | 12 | 5 | 10 | 5 | 3 | 8 | 9 | 5 | 11 | 5 | 8 | 5 | 6 | 2 | 6 | 5 | 0 | 6 | 0 | 7 | 17 | 3 | 0 | 6 | 7 | 6 | 13 | 6 | 16 | 13 | 1 | 13 | 6 | 8 | 14 | 13 | 7 | 13 | 8 | 8 | 3 | 8 | 7 | 4 | 7 | 4 | 8 | 4 | 10 | 13 | 11 | 13 | 12 | 13 | 15 | 2 | 12 | 2 | 11 | 13 | 16 | 4 | 12 | 5 | 17 | 5 | 16 | 2 | 7 | 3 | 11 | 1 | 1 | 3 | 13 | 11 | 5 | 2 | 3 | 3 | 5 | 5 | 5 | 5 | 7 | 5 | 2 | 5 | 4 | 3 | 4 | 3 | 7 | 1 | 4 | 1 | 2 | 5 | 9 | 5 | 13 | 7 | 7 | 7 | 4 | 12 | 13 | 7 | 9 | 4 | 1 | 1 | 15 | 7 | 0 | 7 | 3 | 9 | 5 | 9 | 6 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 15 | 9 | 17 | 11 | 3 | 11 | 6 | 11 | 8 | 11 | 10 PIN | A<3> | 64 | 0 | N/A | 99 | 70 | 6 | 9 | 6 | 3 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 1 | 11 | 3 | 2 | 7 | 14 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 0 | 10 | 0 | 8 | 7 | 10 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 7 | 5 | 0 | 1 | 6 | 0 | 7 | 17 | 3 | 0 | 6 | 6 | 6 | 12 | 6 | 15 | 13 | 1 | 4 | 12 | 3 | 5 | 0 | 2 | 0 | 4 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 0 | 16 | 1 | 4 | 1 | 5 | 1 | 7 | 3 | 3 | 3 | 4 | 3 | 7 | 3 | 11 | 3 | 13 | 6 | 4 | 6 | 8 | 6 | 11 | 6 | 14 | 6 | 17 | 7 | 4 | 7 | 7 | 7 | 9 | 7 | 16 | 13 | 0 | 13 | 2 PIN | A<6> | 64 | 0 | N/A | 98 | 66 | 6 | 9 | 6 | 3 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 1 | 11 | 3 | 2 | 7 | 14 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 0 | 10 | 0 | 8 | 7 | 10 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 7 | 5 | 0 | 1 | 6 | 0 | 7 | 17 | 3 | 0 | 6 | 7 | 6 | 13 | 6 | 16 | 13 | 1 | 4 | 10 | 0 | 2 | 0 | 4 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 0 | 16 | 1 | 4 | 1 | 5 | 1 | 7 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 3 | 13 | 6 | 4 | 7 | 4 | 7 | 7 | 7 | 9 | 7 | 16 | 13 | 0 | 13 | 2 PIN | UDS | 64 | 0 | N/A | 155 | 122 | 6 | 9 | 6 | 3 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 12 | 1 | 8 | 1 | 6 | 1 | 3 | 3 | 8 | 3 | 6 | 1 | 11 | 3 | 2 | 7 | 14 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 0 | 10 | 0 | 8 | 7 | 10 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 7 | 5 | 0 | 1 | 9 | 15 | 11 | 8 | 9 | 0 | 7 | 16 | 1 | 0 | 11 | 10 | 7 | 9 | 7 | 1 | 11 | 6 | 7 | 2 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 8 | 9 | 10 | 11 | 1 | 11 | 2 | 14 | 6 | 14 | 7 | 15 | 0 | 12 | 0 | 11 | 0 | 12 | 17 | 11 | 16 | 12 | 15 | 12 | 12 | 14 | 0 | 12 | 9 | 11 | 14 | 12 | 6 | 11 | 12 | 12 | 4 | 14 | 12 | 15 | 4 | 14 | 9 | 6 | 0 | 7 | 17 | 3 | 0 | 6 | 6 | 6 | 12 | 3 | 13 | 13 | 1 | 14 | 15 | 14 | 2 | 10 | 17 | 11 | 5 | 13 | 5 | 6 | 1 | 1 | 15 | 0 | 16 | 1 | 1 | 1 | 7 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 7 | 6 | 17 | 7 | 0 | 7 | 3 | 7 | 4 | 9 | 5 | 9 | 11 | 9 | 12 | 9 | 17 | 11 | 3 | 11 | 11 | 11 | 13 | 11 | 15 | 12 | 1 | 12 | 3 | 12 | 5 | 12 | 8 | 12 | 11 | 12 | 13 | 12 | 14 | 12 | 16 | 13 | 0 | 13 | 2 | 14 | 1 | 14 | 8 | 14 | 10 | 14 | 11 | 14 | 13 | 14 | 17 | 15 | 3 | 15 | 17 PIN | LDS | 64 | 0 | N/A | 157 | 120 | 6 | 9 | 3 | 14 | 4 | 6 | 3 | 17 | 3 | 16 | 3 | 15 | 7 | 10 | 3 | 13 | 3 | 12 | 3 | 10 | 3 | 9 | 1 | 11 | 1 | 7 | 1 | 6 | 1 | 3 | 3 | 7 | 3 | 6 | 1 | 4 | 1 | 16 | 7 | 14 | 0 | 17 | 7 | 13 | 7 | 12 | 0 | 15 | 7 | 11 | 0 | 12 | 0 | 10 | 0 | 8 | 7 | 9 | 7 | 8 | 0 | 0 | 7 | 6 | 0 | 3 | 7 | 5 | 0 | 1 | 9 | 15 | 11 | 8 | 9 | 0 | 7 | 16 | 1 | 0 | 11 | 10 | 7 | 15 | 7 | 1 | 11 | 6 | 7 | 2 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 8 | 9 | 10 | 11 | 1 | 11 | 2 | 14 | 6 | 14 | 7 | 14 | 17 | 11 | 17 | 9 | 17 | 12 | 16 | 11 | 16 | 12 | 14 | 12 | 11 | 13 | 2 | 12 | 8 | 11 | 14 | 12 | 5 | 11 | 12 | 12 | 3 | 14 | 11 | 15 | 3 | 14 | 8 | 6 | 0 | 7 | 17 | 3 | 0 | 6 | 6 | 6 | 12 | 6 | 4 | 13 | 1 | 14 | 3 | 10 | 17 | 11 | 5 | 13 | 5 | 6 | 1 | 1 | 5 | 0 | 2 | 0 | 4 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 0 | 16 | 1 | 1 | 3 | 3 | 3 | 4 | 3 | 5 | 3 | 8 | 3 | 11 | 6 | 17 | 7 | 0 | 7 | 3 | 7 | 4 | 7 | 7 | 9 | 5 | 9 | 7 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 11 | 3 | 11 | 11 | 11 | 13 | 11 | 15 | 12 | 1 | 12 | 13 | 13 | 0 | 14 | 1 | 14 | 10 | 14 | 13 | 15 | 17 PIN | LAN_INT | 64 | 0 | N/A | 201 | 2 | 2 | 0 | 2 | 7 PIN | DS1 | 64 | 0 | N/A | 148 | 38 | 9 | 15 | 11 | 8 | 9 | 0 | 7 | 3 | 1 | 0 | 11 | 10 | 7 | 0 | 7 | 1 | 11 | 6 | 7 | 2 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 9 | 9 | 10 | 14 | 4 | 14 | 5 | 11 | 2 | 14 | 10 | 14 | 15 | 10 | 15 | 14 | 2 | 10 | 17 | 11 | 5 | 1 | 1 | 1 | 16 | 9 | 5 | 9 | 7 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 10 | 16 | 11 | 3 PIN | DS0 | 64 | 0 | N/A | 170 | 39 | 9 | 15 | 11 | 8 | 9 | 0 | 7 | 3 | 1 | 0 | 11 | 10 | 7 | 0 | 7 | 1 | 11 | 6 | 7 | 2 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 9 | 9 | 10 | 14 | 4 | 14 | 5 | 11 | 2 | 14 | 10 | 10 | 15 | 14 | 3 | 10 | 17 | 11 | 5 | 1 | 1 | 1 | 16 | 9 | 2 | 9 | 5 | 9 | 7 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 10 | 16 | 11 | 7 | 11 | 9 PIN | CFIN | 64 | 0 | N/A | 190 | 1 | 4 | 0 PIN | A<7> | 64 | 0 | N/A | 100 | 1 | 13 | 11 PIN | AUTOBOOT_OFF | 64 | 0 | N/A | 142 | 1 | 4 | 4 PIN | BERR | 64 | 0 | N/A | 176 | 1 | 11 | 5 PIN | C1 | 64 | 0 | N/A | 188 | 1 | 2 | 4 PIN | C3 | 64 | 0 | N/A | 187 | 1 | 2 | 4 PIN | CP_IRQ | 64 | 0 | N/A | 59 | 1 | 10 | 11 PIN | A_LAN<2> | 536871040 | 0 | N/A | 12 PIN | A_LAN<4> | 536871040 | 0 | N/A | 20 PIN | A_LAN<5> | 536871040 | 0 | N/A | 13 PIN | ROM_OE | 536871040 | 0 | N/A | 65 PIN | A_LAN<0> | 536871040 | 0 | N/A | 7 PIN | A_LAN<10> | 536871040 | 0 | N/A | 255 PIN | A_LAN<11> | 536871040 | 0 | N/A | 256 PIN | A_LAN<12> | 536871040 | 0 | N/A | 253 PIN | A_LAN<13> | 536871040 | 0 | N/A | 254 PIN | A_LAN<1> | 536871040 | 0 | N/A | 6 PIN | A_LAN<3> | 536871040 | 0 | N/A | 8 PIN | A_LAN<6> | 536871040 | 0 | N/A | 22 PIN | A_LAN<7> | 536871040 | 0 | N/A | 21 PIN | A_LAN<8> | 536871040 | 0 | N/A | 258 PIN | A_LAN<9> | 536871040 | 0 | N/A | 262 PIN | CP_RD | 536871040 | 0 | N/A | 132 PIN | CP_WE | 536871040 | 0 | N/A | 131 PIN | IDE_R | 536871040 | 0 | N/A | 46 PIN | IDE_W | 536871040 | 0 | N/A | 47 PIN | LAN_CS | 536871040 | 0 | N/A | 240 PIN | LAN_WRH | 536871040 | 0 | N/A | 237 PIN | LAN_WRL | 536871040 | 0 | N/A | 145 PIN | LAN_RD | 536871040 | 0 | N/A | 242 PIN | SLAVE | 536871040 | 0 | N/A | 193 PIN | DTACK | 536871040 | 0 | N/A | 160 PIN | OVR | 536871040 | 0 | N/A | 185 PIN | INT6_OUT | 536871040 | 0 | N/A | 127 PIN | INT2_OUT | 536871040 | 0 | N/A | 60 PIN | CFOUT | 536871040 | 0 | N/A | 191 PIN | CP_CS | 536871040 | 0 | N/A | 63 PIN | IDE_A<0> | 536871040 | 0 | N/A | 43 PIN | IDE_A<1> | 536871040 | 0 | N/A | 45 PIN | IDE_A<2> | 536871040 | 0 | N/A | 44 PIN | IDE_CS<0> | 536871040 | 0 | N/A | 39 PIN | IDE_CS<1> | 536871040 | 0 | N/A | 41 PIN | OWN | 536871040 | 0 | N/A | 195 PIN | MTACK | 536871040 | 0 | N/A | 174 PIN | LAN_CFG<4> | 536871040 | 0 | N/A | 199 PIN | LAN_CFG<3> | 536871040 | 0 | N/A | 24 PIN | LAN_CFG<2> | 536871040 | 0 | N/A | 251 PIN | LAN_CFG<1> | 536871040 | 0 | N/A | 23 PIN | ROM_B<1> | 536871040 | 0 | N/A | 129 PIN | ROM_B<0> | 536871040 | 0 | N/A | 61 PIN | A<8> | 536870976 | 0 | N/A | 106 | 5 | 15 | 0 | 15 | 4 | 13 | 12 | 15 | 3 | 15 | 17 PIN | A<18> | 536870976 | 0 | N/A | 171 | 12 | 8 | 11 | 4 | 0 | 4 | 3 | 12 | 0 | 12 | 9 | 8 | 4 | 4 | 2 | 8 | 2 | 8 | 10 | 8 | 12 | 12 | 1 | 12 | 8 PIN | A<19> | 536870976 | 0 | N/A | 169 | 10 | 4 | 0 | 4 | 4 | 11 | 0 | 11 | 15 | 8 | 2 | 8 | 4 | 8 | 6 | 8 | 17 | 11 | 1 | 11 | 14 PIN | A<20> | 536870976 | 0 | N/A | 167 | 9 | 4 | 0 | 4 | 3 | 12 | 17 | 12 | 6 | 8 | 15 | 8 | 6 | 8 | 17 | 12 | 5 | 12 | 16 PIN | A<21> | 536870976 | 0 | N/A | 163 | 8 | 4 | 0 | 11 | 17 | 11 | 13 | 4 | 4 | 2 | 10 | 8 | 6 | 11 | 12 | 11 | 15 PIN | A<22> | 536870976 | 0 | N/A | 162 | 9 | 4 | 0 | 13 | 4 | 12 | 15 | 12 | 4 | 4 | 1 | 2 | 15 | 2 | 14 | 12 | 3 | 12 | 14 PIN | A<23> | 536870976 | 0 | N/A | 161 | 9 | 4 | 0 | 12 | 12 | 14 | 12 | 14 | 15 | 4 | 2 | 2 | 9 | 8 | 7 | 12 | 13 | 14 | 11 PIN | A<9> | 536870976 | 0 | N/A | 108 | 6 | 14 | 0 | 14 | 9 | 13 | 15 | 0 | 11 | 14 | 1 | 14 | 10 PIN | A<10> | 536870976 | 0 | N/A | 112 | 6 | 12 | 0 | 12 | 9 | 2 | 12 | 0 | 14 | 12 | 1 | 12 | 8 PIN | A<11> | 536870976 | 0 | N/A | 114 | 6 | 11 | 0 | 11 | 15 | 2 | 11 | 0 | 13 | 11 | 1 | 11 | 13 PIN | A<12> | 536870976 | 0 | N/A | 115 | 6 | 12 | 17 | 12 | 6 | 13 | 8 | 0 | 7 | 12 | 5 | 12 | 16 PIN | A<13> | 536870976 | 0 | N/A | 123 | 9 | 8 | 11 | 11 | 17 | 11 | 13 | 8 | 3 | 0 | 9 | 8 | 10 | 8 | 12 | 11 | 11 | 11 | 16 PIN | A<14> | 536870976 | 0 | N/A | 125 | 8 | 8 | 11 | 12 | 15 | 12 | 4 | 8 | 7 | 8 | 10 | 8 | 12 | 12 | 3 | 12 | 14 PIN | A<15> | 536870976 | 0 | N/A | 139 | 5 | 13 | 9 | 12 | 12 | 14 | 12 | 12 | 11 | 14 | 13 PIN | A<16> | 536870976 | 0 | N/A | 175 | 11 | 8 | 11 | 4 | 0 | 8 | 0 | 15 | 0 | 15 | 4 | 8 | 5 | 4 | 2 | 8 | 10 | 8 | 12 | 15 | 3 | 15 | 17 PIN | A<17> | 536870976 | 0 | N/A | 172 | 12 | 8 | 11 | 4 | 0 | 8 | 0 | 14 | 0 | 14 | 9 | 8 | 5 | 4 | 3 | 8 | 2 | 8 | 10 | 8 | 12 | 14 | 1 | 14 | 10 PIN | DQ<10> | 536870976 | 0 | N/A | 234 | 5 | 15 | 5 | 8 | 16 | 15 | 8 | 15 | 14 | 4 | 13 PIN | DQ<11> | 536870976 | 0 | N/A | 207 | 5 | 15 | 2 | 10 | 2 | 10 | 14 | 10 | 6 | 4 | 14 PIN | DQ<1> | 536870976 | 0 | N/A | 216 | 5 | 8 | 13 | 15 | 7 | 15 | 6 | 15 | 13 | 1 | 14 PIN | DQ<4> | 536870976 | 0 | N/A | 225 | 6 | 15 | 1 | 10 | 4 | 10 | 12 | 10 | 5 | 0 | 5 | 0 | 6 PIN | DQ<8> | 536870976 | 0 | N/A | 231 | 6 | 8 | 9 | 15 | 10 | 15 | 16 | 15 | 12 | 1 | 16 | 1 | 17 PIN | DQ<9> | 536870976 | 0 | N/A | 209 | 5 | 8 | 13 | 15 | 7 | 15 | 6 | 15 | 13 | 4 | 11 PIN | D<0> | 536870976 | 0 | N/A | 4 | 5 | 9 | 2 | 15 | 0 | 15 | 3 | 9 | 3 | 15 | 17 PIN | D<10> | 536870976 | 0 | N/A | 74 | 13 | 3 | 15 | 1 | 6 | 0 | 17 | 0 | 8 | 9 | 15 | 12 | 0 | 12 | 8 | 2 | 15 | 0 | 9 | 0 | 16 | 1 | 5 | 3 | 14 | 12 | 1 PIN | D<11> | 536870976 | 0 | N/A | 77 | 15 | 7 | 15 | 1 | 3 | 7 | 13 | 7 | 10 | 11 | 9 | 11 | 0 | 11 | 14 | 2 | 15 | 1 | 4 | 2 | 17 | 7 | 9 | 7 | 14 | 7 | 16 | 11 | 8 | 11 | 17 PIN | D<12> | 536870976 | 0 | N/A | 78 | 13 | 3 | 14 | 3 | 8 | 7 | 12 | 7 | 8 | 7 | 1 | 12 | 17 | 12 | 5 | 2 | 17 | 3 | 7 | 3 | 13 | 7 | 7 | 7 | 11 | 12 | 16 PIN | D<13> | 536870976 | 0 | N/A | 80 | 13 | 3 | 12 | 3 | 6 | 0 | 15 | 0 | 0 | 11 | 7 | 11 | 16 | 11 | 12 | 2 | 14 | 0 | 14 | 0 | 17 | 3 | 5 | 3 | 11 | 11 | 6 PIN | D<14> | 536870976 | 0 | N/A | 81 | 12 | 3 | 10 | 2 | 5 | 7 | 11 | 7 | 6 | 7 | 2 | 12 | 15 | 12 | 3 | 3 | 4 | 3 | 9 | 7 | 5 | 7 | 10 | 12 | 14 PIN | D<15> | 536870976 | 0 | N/A | 89 | 14 | 3 | 9 | 3 | 2 | 0 | 12 | 0 | 3 | 11 | 4 | 12 | 12 | 14 | 11 | 14 | 15 | 0 | 13 | 0 | 4 | 2 | 17 | 3 | 3 | 3 | 8 | 12 | 11 PIN | D<1> | 536870976 | 0 | N/A | 30 | 5 | 9 | 1 | 14 | 0 | 14 | 8 | 9 | 0 | 14 | 17 PIN | D<2> | 536870976 | 0 | N/A | 71 | 4 | 12 | 9 | 9 | 6 | 12 | 1 | 12 | 8 PIN | D<3> | 536870976 | 0 | N/A | 28 | 3 | 9 | 4 | 11 | 14 | 11 | 1 PIN | D<4> | 536870976 | 0 | N/A | 38 | 4 | 12 | 6 | 12 | 16 | 9 | 17 | 12 | 5 PIN | D<5> | 536870976 | 0 | N/A | 37 | 4 | 9 | 7 | 11 | 16 | 11 | 12 | 9 | 8 PIN | D<6> | 536870976 | 0 | N/A | 26 | 4 | 12 | 4 | 12 | 14 | 9 | 12 | 12 | 3 PIN | D<7> | 536870976 | 0 | N/A | 29 | 4 | 9 | 10 | 12 | 11 | 14 | 12 | 14 | 11 PIN | D<8> | 536870976 | 0 | N/A | 32 | 13 | 3 | 17 | 1 | 12 | 7 | 14 | 7 | 5 | 1 | 0 | 7 | 15 | 15 | 4 | 2 | 16 | 1 | 11 | 3 | 0 | 7 | 4 | 15 | 3 | 15 | 17 PIN | D<9> | 536870976 | 0 | N/A | 73 | 15 | 3 | 16 | 1 | 8 | 0 | 10 | 0 | 1 | 11 | 11 | 11 | 10 | 14 | 9 | 2 | 16 | 0 | 2 | 0 | 11 | 1 | 7 | 2 | 15 | 3 | 15 | 14 | 8 | 14 | 17 PIN | DQ<0> | 536870976 | 0 | N/A | 217 | 5 | 8 | 9 | 15 | 10 | 15 | 16 | 15 | 12 | 3 | 1 PIN | DQ<12> | 536870976 | 0 | N/A | 235 | 6 | 15 | 1 | 10 | 4 | 10 | 12 | 10 | 5 | 4 | 16 | 4 | 17 PIN | DQ<13> | 536870976 | 0 | N/A | 204 | 6 | 14 | 16 | 10 | 9 | 10 | 8 | 10 | 3 | 6 | 2 | 6 | 1 PIN | DQ<14> | 536870976 | 0 | N/A | 236 | 6 | 14 | 14 | 10 | 10 | 10 | 7 | 10 | 1 | 6 | 4 | 6 | 5 PIN | DQ<15> | 536870976 | 0 | N/A | 202 | 6 | 14 | 13 | 12 | 7 | 15 | 11 | 15 | 15 | 6 | 11 | 6 | 10 PIN | DQ<2> | 536870976 | 0 | N/A | 220 | 5 | 15 | 5 | 8 | 16 | 15 | 8 | 15 | 14 | 4 | 9 PIN | DQ<3> | 536870976 | 0 | N/A | 219 | 6 | 15 | 2 | 10 | 2 | 10 | 14 | 10 | 6 | 1 | 11 | 1 | 10 PIN | DQ<5> | 536870976 | 0 | N/A | 221 | 5 | 14 | 16 | 10 | 9 | 10 | 8 | 10 | 3 | 0 | 4 PIN | DQ<6> | 536870976 | 0 | N/A | 227 | 5 | 1 | 9 | 10 | 10 | 10 | 7 | 10 | 1 | 14 | 15 PIN | DQ<7> | 536870976 | 0 | N/A | 226 | 5 | 1 | 13 | 12 | 7 | 15 | 11 | 15 | 15 | 14 | 14