MDF Database:  version 1.0
MDF_INFO | LAN_IDE_CP | XC95288XL-10-TQ144
MACROCELL | 8 | 10 | Z3_DATA<0>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<0>.PIN  | DQ<8>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 217 | 231 | 158 | 147
EQ | 7 | 
   A<8>.D = DQ_SWAP & DQ<8>.PIN
	# !DQ_SWAP & DQ<0>.PIN;
   A<8>.CLK = CLK_EXT;	// GCK
   A<8>.AP = LAN_SM_RST;
   A<8>.OE = RW & !FCS & LAN_ACCESS;
   A<8>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 5 | Z3_DATA<10>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<10>.PIN  | DQ<2>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 234 | 220 | 158 | 147
EQ | 7 | 
   A<18>.D = DQ_SWAP & DQ<2>.PIN
	# !DQ_SWAP & DQ<10>.PIN;
   A<18>.CLK = CLK_EXT;	// GCK
   A<18>.AP = LAN_SM_RST;
   A<18>.OE = RW & !FCS & LAN_ACCESS;
   A<18>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 2 | Z3_DATA<11>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<11>.PIN  | DQ<3>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 207 | 219 | 158 | 147
EQ | 7 | 
   A<19>.D = DQ_SWAP & DQ<3>.PIN
	# !DQ_SWAP & DQ<11>.PIN;
   A<19>.CLK = CLK_EXT;	// GCK
   A<19>.AP = LAN_SM_RST;
   A<19>.OE = RW & !FCS & LAN_ACCESS;
   A<19>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 1 | Z3_DATA<12>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<12>.PIN  | DQ<4>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 235 | 225 | 158 | 147
EQ | 7 | 
   A<20>.D = DQ_SWAP & DQ<4>.PIN
	# !DQ_SWAP & DQ<12>.PIN;
   A<20>.CLK = CLK_EXT;	// GCK
   A<20>.AP = LAN_SM_RST;
   A<20>.OE = RW & !FCS & LAN_ACCESS;
   A<20>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 16 | Z3_DATA<13>
ATTRIBUTES | 8685506 | 0
OUTPUTMC | 1 | 14 | 15
INPUTS | 10 | DS1  | DS0  | DQ_DATA<1>.EXP  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 14 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 148 | 170 | 158 | 147
EXPORTS | 1 | 14 | 15
IMPORTS | 1 | 14 | 17
EQ | 11 | 
   A<21>.D = ;Imported pterms FB15_18
	  DQ_SWAP & DQ<5>.PIN
	# !DQ_SWAP & DQ<13>.PIN;
   A<21>.CLK = CLK_EXT;	// GCK
   A<21>.AP = LAN_SM_RST;
   A<21>.OE = RW & !FCS & LAN_ACCESS;
   A<21>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
    Z3_DATA<13>.EXP  =  DS1 & DS0 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1
	# DS1 & DS0 & !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd1
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 14 | Z3_DATA<14>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<14>.PIN  | DQ<6>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 236 | 227 | 158 | 147
EQ | 7 | 
   A<22>.D = DQ_SWAP & DQ<6>.PIN
	# !DQ_SWAP & DQ<14>.PIN;
   A<22>.CLK = CLK_EXT;	// GCK
   A<22>.AP = LAN_SM_RST;
   A<22>.OE = RW & !FCS & LAN_ACCESS;
   A<22>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 13 | Z3_DATA<15>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<15>.PIN  | DQ<7>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 202 | 226 | 158 | 147
EQ | 7 | 
   A<23>.D = DQ_SWAP & DQ<7>.PIN
	# !DQ_SWAP & DQ<15>.PIN;
   A<23>.CLK = CLK_EXT;	// GCK
   A<23>.AP = LAN_SM_RST;
   A<23>.OE = RW & !FCS & LAN_ACCESS;
   A<23>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 8 | 13 | Z3_DATA<1>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<1>.PIN  | DQ<9>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 216 | 209 | 158 | 147
EQ | 7 | 
   A<9>.D = DQ_SWAP & DQ<9>.PIN
	# !DQ_SWAP & DQ<1>.PIN;
   A<9>.CLK = CLK_EXT;	// GCK
   A<9>.AP = LAN_SM_RST;
   A<9>.OE = RW & !FCS & LAN_ACCESS;
   A<9>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 8 | 16 | Z3_DATA<2>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<10>.PIN  | DQ<2>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 234 | 220 | 158 | 147
EQ | 7 | 
   A<10>.D = DQ_SWAP & DQ<10>.PIN
	# !DQ_SWAP & DQ<2>.PIN;
   A<10>.CLK = CLK_EXT;	// GCK
   A<10>.AP = LAN_SM_RST;
   A<10>.OE = RW & !FCS & LAN_ACCESS;
   A<10>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 2 | Z3_DATA<3>
ATTRIBUTES | 8685506 | 0
OUTPUTMC | 1 | 10 | 1
INPUTS | 11 | DQ_SWAP  | DQ<11>.PIN  | DQ<5>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1  | Z3_DATA<28>.EXP
INPUTMC | 7 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5 | 10 | 3
INPUTP | 4 | 207 | 221 | 158 | 147
EXPORTS | 1 | 10 | 1
IMPORTS | 1 | 10 | 3
EQ | 9 | 
   A<11>.D = DQ_SWAP & DQ<11>.PIN
;Imported pterms FB11_4
	# !DQ_SWAP & DQ<3>.PIN;
   A<11>.CLK = CLK_EXT;	// GCK
   A<11>.AP = LAN_SM_RST;
   A<11>.OE = RW & !FCS & LAN_ACCESS;
   A<11>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
    Z3_DATA<3>.EXP  =  DQ_SWAP & DQ<5>.PIN
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 4 | Z3_DATA<4>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<12>.PIN  | DQ<4>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 235 | 225 | 158 | 147
EQ | 7 | 
   A<12>.D = DQ_SWAP & DQ<12>.PIN
	# !DQ_SWAP & DQ<4>.PIN;
   A<12>.CLK = CLK_EXT;	// GCK
   A<12>.AP = LAN_SM_RST;
   A<12>.OE = RW & !FCS & LAN_ACCESS;
   A<12>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 9 | Z3_DATA<5>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<13>.PIN  | DQ<5>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 204 | 221 | 158 | 147
EQ | 7 | 
   A<13>.D = DQ_SWAP & DQ<13>.PIN
	# !DQ_SWAP & DQ<5>.PIN;
   A<13>.CLK = CLK_EXT;	// GCK
   A<13>.AP = LAN_SM_RST;
   A<13>.OE = RW & !FCS & LAN_ACCESS;
   A<13>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 10 | Z3_DATA<6>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<14>.PIN  | DQ<6>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 236 | 227 | 158 | 147
EQ | 7 | 
   A<14>.D = DQ_SWAP & DQ<14>.PIN
	# !DQ_SWAP & DQ<6>.PIN;
   A<14>.CLK = CLK_EXT;	// GCK
   A<14>.AP = LAN_SM_RST;
   A<14>.OE = RW & !FCS & LAN_ACCESS;
   A<14>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 7 | Z3_DATA<7>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<15>.PIN  | DQ<7>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 202 | 226 | 158 | 147
EQ | 7 | 
   A<15>.D = DQ_SWAP & DQ<15>.PIN
	# !DQ_SWAP & DQ<7>.PIN;
   A<15>.CLK = CLK_EXT;	// GCK
   A<15>.AP = LAN_SM_RST;
   A<15>.OE = RW & !FCS & LAN_ACCESS;
   A<15>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 10 | Z3_DATA<8>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<0>.PIN  | DQ<8>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 217 | 231 | 158 | 147
EQ | 7 | 
   A<16>.D = DQ_SWAP & DQ<0>.PIN
	# !DQ_SWAP & DQ<8>.PIN;
   A<16>.CLK = CLK_EXT;	// GCK
   A<16>.AP = LAN_SM_RST;
   A<16>.OE = RW & !FCS & LAN_ACCESS;
   A<16>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 7 | Z3_DATA<9>
ATTRIBUTES | 8685506 | 0
INPUTS | 10 | DQ_SWAP  | DQ<1>.PIN  | DQ<9>.PIN  | LAN_SM_RST  | RW  | FCS  | LAN_ACCESS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 11 | 15 | 14 | 3 | 7 | 6 | 11 | 5
INPUTP | 4 | 216 | 209 | 158 | 147
EQ | 7 | 
   A<17>.D = DQ_SWAP & DQ<1>.PIN
	# !DQ_SWAP & DQ<9>.PIN;
   A<17>.CLK = CLK_EXT;	// GCK
   A<17>.AP = LAN_SM_RST;
   A<17>.OE = RW & !FCS & LAN_ACCESS;
   A<17>.CE = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 13 | 12 | AUTO_CONFIG_Z2_DONE<0>
ATTRIBUTES | 8520560 | 0
OUTPUTMC | 55 | 13 | 12 | 8 | 15 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 4 | 5 | 8 | 11 | 8 | 9 | 0 | 1 | 6 | 13 | 3 | 13 | 0 | 14 | 13 | 0 | 13 | 10 | 0 | 0 | 0 | 2 | 0 | 7 | 0 | 9 | 0 | 11 | 0 | 13 | 1 | 5 | 1 | 7 | 3 | 1 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 3 | 16 | 6 | 0 | 6 | 6 | 6 | 11 | 13 | 17
INPUTS | 5 | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE_CYCLE<0>  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | AS
INPUTMC | 3 | 13 | 12 | 8 | 15 | 2 | 10
INPUTP | 2 | 263 | 152
EQ | 5 | 
   !AUTO_CONFIG_Z2_DONE<0>.D = !AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE_CYCLE<0>;
   AUTO_CONFIG_Z2_DONE<0>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   AUTO_CONFIG_Z2_DONE<0>.AR = !RESET;
   AUTO_CONFIG_Z2_DONE<0>.CE = AS;

MACROCELL | 13 | 11 | AUTO_CONFIG_Z2_DONE<1>
ATTRIBUTES | 8520560 | 0
OUTPUTMC | 41 | 13 | 11 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 4 | 5 | 8 | 9 | 0 | 1 | 3 | 16 | 3 | 13 | 0 | 14 | 13 | 0 | 13 | 10 | 0 | 0 | 0 | 2 | 0 | 7 | 0 | 9 | 0 | 11 | 0 | 13 | 1 | 5 | 1 | 7 | 3 | 1 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 13 | 17
INPUTS | 5 | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE_CYCLE<1>  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | AS
INPUTMC | 3 | 13 | 11 | 8 | 14 | 2 | 10
INPUTP | 2 | 263 | 152
EQ | 5 | 
   !AUTO_CONFIG_Z2_DONE<1>.D = !AUTO_CONFIG_Z2_DONE<1> & 
	!AUTO_CONFIG_Z2_DONE_CYCLE<1>;
   AUTO_CONFIG_Z2_DONE<1>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   AUTO_CONFIG_Z2_DONE<1>.AR = !RESET;
   AUTO_CONFIG_Z2_DONE<1>.CE = AS;

MACROCELL | 8 | 17 | AUTO_CONFIG_Z2_DONE<2>
ATTRIBUTES | 8520560 | 0
OUTPUTMC | 19 | 8 | 17 | 8 | 12 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 4 | 5 | 0 | 1 | 13 | 10 | 1 | 5 | 1 | 7 | 3 | 1 | 3 | 4 | 3 | 5 | 3 | 7
INPUTS | 5 | AUTO_CONFIG_Z2_DONE<2>  | AUTO_CONFIG_Z2_DONE_CYCLE<2>  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | AS
INPUTMC | 3 | 8 | 17 | 8 | 12 | 2 | 10
INPUTP | 2 | 263 | 152
EQ | 5 | 
   !AUTO_CONFIG_Z2_DONE<2>.D = !AUTO_CONFIG_Z2_DONE<2> & 
	!AUTO_CONFIG_Z2_DONE_CYCLE<2>;
   AUTO_CONFIG_Z2_DONE<2>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   AUTO_CONFIG_Z2_DONE<2>.AR = !RESET;
   AUTO_CONFIG_Z2_DONE<2>.CE = AS;

MACROCELL | 8 | 15 | AUTO_CONFIG_Z2_DONE_CYCLE<0>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 2 | 13 | 12 | 8 | 15
INPUTS | 14 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE_CYCLE<0>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET
INPUTMC | 4 | 13 | 12 | 8 | 15 | 4 | 5 | 2 | 10
INPUTP | 10 | 158 | 152 | 155 | 101 | 91 | 97 | 107 | 98 | 157 | 263
EQ | 8 | 
   AUTO_CONFIG_Z2_DONE_CYCLE<0>.T = !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE_CYCLE<0> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE_CYCLE<0> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6>;
   AUTO_CONFIG_Z2_DONE_CYCLE<0>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   AUTO_CONFIG_Z2_DONE_CYCLE<0>.AR = !RESET;

MACROCELL | 8 | 14 | AUTO_CONFIG_Z2_DONE_CYCLE<1>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 2 | 13 | 11 | 8 | 14
INPUTS | 15 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE_CYCLE<1>  | UDS  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET
INPUTMC | 5 | 13 | 12 | 13 | 11 | 8 | 14 | 4 | 5 | 2 | 10
INPUTP | 10 | 158 | 152 | 155 | 91 | 97 | 107 | 98 | 99 | 157 | 263
EQ | 8 | 
   AUTO_CONFIG_Z2_DONE_CYCLE<1>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE_CYCLE<1> & !UDS & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE_CYCLE<1> & !LDS & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   AUTO_CONFIG_Z2_DONE_CYCLE<1>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   AUTO_CONFIG_Z2_DONE_CYCLE<1>.AR = !RESET;

MACROCELL | 8 | 12 | AUTO_CONFIG_Z2_DONE_CYCLE<2>
ATTRIBUTES | 4326192 | 0
OUTPUTMC | 2 | 8 | 17 | 8 | 12
INPUTS | 16 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | AUTO_CONFIG_Z2_DONE_CYCLE<2>  | UDS  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET
INPUTMC | 6 | 13 | 12 | 13 | 11 | 8 | 17 | 8 | 12 | 4 | 5 | 2 | 10
INPUTP | 10 | 158 | 152 | 155 | 91 | 97 | 107 | 98 | 99 | 157 | 263
EQ | 10 | 
   AUTO_CONFIG_Z2_DONE_CYCLE<2>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & 
	!AUTO_CONFIG_Z2_DONE_CYCLE<2> & !UDS & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & 
	!AUTO_CONFIG_Z2_DONE_CYCLE<2> & !LDS & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   AUTO_CONFIG_Z2_DONE_CYCLE<2>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   AUTO_CONFIG_Z2_DONE_CYCLE<2>.AR = !RESET;

MACROCELL | 0 | 15 | CP_BASEADR<0>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 5 | 0 | 15 | 4 | 1 | 0 | 14 | 4 | 0 | 0 | 16
INPUTS | 19 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<8>.PIN  | CP_BASEADR<0>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | IDE_R_S  | IDE_A_1_OBUF$BUF0.EXP
INPUTMC | 7 | 13 | 12 | 13 | 11 | 0 | 15 | 4 | 5 | 2 | 10 | 13 | 6 | 0 | 14
INPUTP | 12 | 158 | 152 | 32 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
EXPORTS | 1 | 0 | 16
IMPORTS | 1 | 0 | 14
EQ | 16 | 
   CP_BASEADR<0>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<8>.PIN & CP_BASEADR<0> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<8>.PIN & CP_BASEADR<0> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB1_15
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<8>.PIN & !CP_BASEADR<0> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<8>.PIN & !CP_BASEADR<0> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   CP_BASEADR<0>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   CP_BASEADR<0>.AP = !RESET;
    CP_BASEADR<0>.EXP  =  !AS & !IDE_R_S

MACROCELL | 0 | 12 | CP_BASEADR<1>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 3 | 0 | 12 | 0 | 13 | 4 | 3
INPUTS | 18 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<9>.PIN  | CP_BASEADR<1>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | IDE_A_2_OBUF$BUF0.EXP
INPUTMC | 6 | 13 | 12 | 13 | 11 | 0 | 12 | 4 | 5 | 2 | 10 | 0 | 13
INPUTP | 12 | 158 | 152 | 73 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
IMPORTS | 1 | 0 | 13
EQ | 15 | 
   CP_BASEADR<1>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<9>.PIN & !CP_BASEADR<1> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<9>.PIN & CP_BASEADR<1> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<9>.PIN & CP_BASEADR<1> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB1_14
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<9>.PIN & !CP_BASEADR<1> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   CP_BASEADR<1>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   CP_BASEADR<1>.AP = !RESET;

MACROCELL | 3 | 12 | CP_BASEADR<2>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 4 | 3 | 12 | 4 | 0 | 3 | 11 | 3 | 13
INPUTS | 20 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<10>.PIN  | CP_BASEADR<2>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | Z3_ADR<4>  | CP_CS  | A_LAN_2_OBUF.EXP
INPUTMC | 8 | 13 | 12 | 13 | 11 | 3 | 12 | 4 | 5 | 2 | 10 | 6 | 0 | 4 | 1 | 3 | 11
INPUTP | 12 | 158 | 152 | 74 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
EXPORTS | 1 | 3 | 13
IMPORTS | 1 | 3 | 11
EQ | 16 | 
   CP_BASEADR<2>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<10>.PIN & CP_BASEADR<2> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<10>.PIN & CP_BASEADR<2> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB4_12
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !CP_BASEADR<2> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !CP_BASEADR<2> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   CP_BASEADR<2>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   CP_BASEADR<2>.AP = !RESET;
    CP_BASEADR<2>.EXP  =  RESET & !Z3_ADR<4> & CP_CS

MACROCELL | 3 | 10 | CP_BASEADR<3>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 3 | 3 | 10 | 4 | 0 | 3 | 9
INPUTS | 18 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<11>.PIN  | CP_BASEADR<3>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | IDE_BASEADR<2>.EXP
INPUTMC | 6 | 13 | 12 | 13 | 11 | 3 | 10 | 4 | 5 | 2 | 10 | 3 | 9
INPUTP | 12 | 158 | 152 | 77 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
IMPORTS | 1 | 3 | 9
EQ | 15 | 
   CP_BASEADR<3>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<11>.PIN & !CP_BASEADR<3> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<11>.PIN & CP_BASEADR<3> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<11>.PIN & CP_BASEADR<3> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB4_10
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<11>.PIN & !CP_BASEADR<3> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   CP_BASEADR<3>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   CP_BASEADR<3>.AP = !RESET;

MACROCELL | 0 | 10 | CP_BASEADR<4>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 3 | 0 | 10 | 0 | 11 | 4 | 2
INPUTS | 18 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<12>.PIN  | CP_BASEADR<4>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | IDE_A_0_OBUF$BUF0.EXP
INPUTMC | 6 | 13 | 12 | 13 | 11 | 0 | 10 | 4 | 5 | 2 | 10 | 0 | 11
INPUTP | 12 | 158 | 152 | 78 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
IMPORTS | 1 | 0 | 11
EQ | 15 | 
   CP_BASEADR<4>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<12>.PIN & !CP_BASEADR<4> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<12>.PIN & CP_BASEADR<4> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<12>.PIN & CP_BASEADR<4> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB1_12
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<12>.PIN & !CP_BASEADR<4> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   CP_BASEADR<4>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   CP_BASEADR<4>.AP = !RESET;

MACROCELL | 0 | 8 | CP_BASEADR<5>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 3 | 0 | 8 | 0 | 9 | 4 | 2
INPUTS | 18 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<13>.PIN  | CP_BASEADR<5>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | IDE_CS_1_OBUF.EXP
INPUTMC | 6 | 13 | 12 | 13 | 11 | 0 | 8 | 4 | 5 | 2 | 10 | 0 | 9
INPUTP | 12 | 158 | 152 | 80 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
IMPORTS | 1 | 0 | 9
EQ | 15 | 
   CP_BASEADR<5>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<13>.PIN & !CP_BASEADR<5> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<13>.PIN & CP_BASEADR<5> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<13>.PIN & CP_BASEADR<5> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB1_10
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<13>.PIN & !CP_BASEADR<5> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   CP_BASEADR<5>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   CP_BASEADR<5>.AP = !RESET;

MACROCELL | 0 | 6 | CP_BASEADR<6>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 4 | 0 | 6 | 0 | 7 | 4 | 3 | 0 | 5
INPUTS | 20 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<14>.PIN  | CP_BASEADR<6>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | FCS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | Z3_DATA<20>  | LAN_ACCESS  | IDE_CS_0_OBUF.EXP
INPUTMC | 8 | 13 | 12 | 13 | 11 | 0 | 6 | 4 | 5 | 2 | 10 | 10 | 8 | 11 | 15 | 0 | 7
INPUTP | 12 | 158 | 152 | 81 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 147 | 263
EXPORTS | 1 | 0 | 5
IMPORTS | 1 | 0 | 7
EQ | 17 | 
   CP_BASEADR<6>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<14>.PIN & CP_BASEADR<6> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB1_8
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<14>.PIN & !CP_BASEADR<6> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<14>.PIN & !CP_BASEADR<6> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<14>.PIN & CP_BASEADR<6> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   CP_BASEADR<6>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   CP_BASEADR<6>.AP = !RESET;
    CP_BASEADR<6>.EXP  =  RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<20> & !FCS & LAN_ACCESS

MACROCELL | 0 | 3 | CP_BASEADR<7>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 5 | 0 | 3 | 0 | 2 | 4 | 2 | 4 | 3 | 0 | 4
INPUTS | 20 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<15>.PIN  | CP_BASEADR<7>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | FCS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | Z3_DATA<21>  | LAN_ACCESS  | EXP25_.EXP
INPUTMC | 8 | 13 | 12 | 13 | 11 | 0 | 3 | 4 | 5 | 2 | 10 | 10 | 7 | 11 | 15 | 0 | 2
INPUTP | 12 | 158 | 152 | 89 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 147 | 263
EXPORTS | 1 | 0 | 4
IMPORTS | 1 | 0 | 2
EQ | 17 | 
   CP_BASEADR<7>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<15>.PIN & CP_BASEADR<7> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB1_3
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<15>.PIN & !CP_BASEADR<7> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<15>.PIN & !CP_BASEADR<7> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<15>.PIN & CP_BASEADR<7> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   CP_BASEADR<7>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   CP_BASEADR<7>.AP = !RESET;
    CP_BASEADR<7>.EXP  =  RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<21> & !FCS & LAN_ACCESS

MACROCELL | 1 | 6 | IDE_BASEADR<0>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 4 | 1 | 6 | 5 | 17 | 1 | 5 | 5 | 16
INPUTS | 19 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D<8>.PIN  | IDE_BASEADR<0>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | ROM_B_0_OBUF$BUF7.EXP
INPUTMC | 7 | 13 | 12 | 13 | 11 | 8 | 17 | 1 | 6 | 4 | 5 | 2 | 10 | 1 | 5
INPUTP | 12 | 158 | 152 | 32 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
IMPORTS | 1 | 1 | 5
EQ | 19 | 
   IDE_BASEADR<0>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<8>.PIN & 
	!IDE_BASEADR<0> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<8>.PIN & 
	IDE_BASEADR<0> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<8>.PIN & 
	IDE_BASEADR<0> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB2_6
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<8>.PIN & 
	!IDE_BASEADR<0> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   IDE_BASEADR<0>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   IDE_BASEADR<0>.AP = !RESET;

MACROCELL | 1 | 8 | IDE_BASEADR<1>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 3 | 1 | 8 | 5 | 16 | 1 | 7
INPUTS | 19 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D<9>.PIN  | IDE_BASEADR<1>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | ROM_B_0_OBUF$BUF5.EXP
INPUTMC | 7 | 13 | 12 | 13 | 11 | 8 | 17 | 1 | 8 | 4 | 5 | 2 | 10 | 1 | 7
INPUTP | 12 | 158 | 152 | 73 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
IMPORTS | 1 | 1 | 7
EQ | 19 | 
   IDE_BASEADR<1>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<9>.PIN & 
	!IDE_BASEADR<1> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<9>.PIN & 
	IDE_BASEADR<1> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<9>.PIN & 
	IDE_BASEADR<1> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB2_8
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<9>.PIN & 
	!IDE_BASEADR<1> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   IDE_BASEADR<1>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   IDE_BASEADR<1>.AP = !RESET;

MACROCELL | 3 | 9 | IDE_BASEADR<2>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 4 | 3 | 9 | 5 | 16 | 3 | 8 | 3 | 10
INPUTS | 21 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D<10>.PIN  | IDE_BASEADR<2>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | D<11>.PIN  | CP_BASEADR<3>  | IDE_BASEADR<3>.EXP
INPUTMC | 8 | 13 | 12 | 13 | 11 | 8 | 17 | 3 | 9 | 4 | 5 | 2 | 10 | 3 | 10 | 3 | 8
INPUTP | 13 | 158 | 152 | 74 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263 | 77
EXPORTS | 1 | 3 | 10
IMPORTS | 1 | 3 | 8
EQ | 22 | 
   IDE_BASEADR<2>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<10>.PIN & 
	IDE_BASEADR<2> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<10>.PIN & 
	IDE_BASEADR<2> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB4_9
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<10>.PIN & 
	!IDE_BASEADR<2> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<10>.PIN & 
	!IDE_BASEADR<2> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   IDE_BASEADR<2>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   IDE_BASEADR<2>.AP = !RESET;
    IDE_BASEADR<2>.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<11>.PIN & !CP_BASEADR<3> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 3 | 8 | IDE_BASEADR<3>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 4 | 3 | 8 | 5 | 1 | 3 | 7 | 3 | 9
INPUTS | 21 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D<11>.PIN  | IDE_BASEADR<3>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | D<10>.PIN  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | IDE_BASEADR<2>  | LDS  | A_LAN_3_OBUF.EXP
INPUTMC | 8 | 13 | 12 | 13 | 11 | 8 | 17 | 3 | 8 | 4 | 5 | 2 | 10 | 3 | 9 | 3 | 7
INPUTP | 13 | 158 | 152 | 77 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 74 | 263 | 157
EXPORTS | 1 | 3 | 9
IMPORTS | 1 | 3 | 7
EQ | 27 | 
   IDE_BASEADR<3>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<11>.PIN & 
	IDE_BASEADR<3> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB4_8
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<11>.PIN & 
	!IDE_BASEADR<3> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<11>.PIN & 
	!IDE_BASEADR<3> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<11>.PIN & 
	IDE_BASEADR<3> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   IDE_BASEADR<3>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   IDE_BASEADR<3>.AP = !RESET;
    IDE_BASEADR<3>.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<10>.PIN & 
	!IDE_BASEADR<2> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<10>.PIN & 
	!IDE_BASEADR<2> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 3 | 6 | IDE_BASEADR<4>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 4 | 3 | 6 | 5 | 0 | 3 | 5 | 3 | 7
INPUTS | 20 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D<12>.PIN  | IDE_BASEADR<4>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | CP_CS  | A_LAN_0_OBUF.EXP
INPUTMC | 8 | 13 | 12 | 13 | 11 | 8 | 17 | 3 | 6 | 4 | 5 | 2 | 10 | 4 | 1 | 3 | 5
INPUTP | 12 | 158 | 152 | 78 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
EXPORTS | 1 | 3 | 7
IMPORTS | 1 | 3 | 5
EQ | 20 | 
   IDE_BASEADR<4>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<12>.PIN & 
	IDE_BASEADR<4> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<12>.PIN & 
	IDE_BASEADR<4> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB4_6
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<12>.PIN & 
	!IDE_BASEADR<4> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<12>.PIN & 
	!IDE_BASEADR<4> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   IDE_BASEADR<4>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   IDE_BASEADR<4>.AP = !RESET;
    IDE_BASEADR<4>.EXP  =  RESET & A<3> & !CP_CS

MACROCELL | 3 | 3 | IDE_BASEADR<5>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 3 | 3 | 3 | 5 | 0 | 3 | 4
INPUTS | 19 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D<13>.PIN  | IDE_BASEADR<5>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | A_LAN_1_OBUF.EXP
INPUTMC | 7 | 13 | 12 | 13 | 11 | 8 | 17 | 3 | 3 | 4 | 5 | 2 | 10 | 3 | 4
INPUTP | 12 | 158 | 152 | 80 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
IMPORTS | 1 | 3 | 4
EQ | 19 | 
   IDE_BASEADR<5>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<13>.PIN & 
	!IDE_BASEADR<5> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<13>.PIN & 
	IDE_BASEADR<5> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<13>.PIN & 
	IDE_BASEADR<5> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB4_5
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<13>.PIN & 
	!IDE_BASEADR<5> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   IDE_BASEADR<5>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   IDE_BASEADR<5>.AP = !RESET;

MACROCELL | 3 | 17 | IDE_BASEADR<6>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 3 | 3 | 17 | 5 | 1 | 3 | 0
INPUTS | 19 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D<14>.PIN  | IDE_BASEADR<6>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | IDE_BASEADR<7>.EXP
INPUTMC | 7 | 13 | 12 | 13 | 11 | 8 | 17 | 3 | 17 | 4 | 5 | 2 | 10 | 3 | 0
INPUTP | 12 | 158 | 152 | 81 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
IMPORTS | 1 | 3 | 0
EQ | 19 | 
   IDE_BASEADR<6>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<14>.PIN & 
	!IDE_BASEADR<6> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<14>.PIN & 
	IDE_BASEADR<6> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<14>.PIN & 
	IDE_BASEADR<6> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB4_1
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<14>.PIN & 
	!IDE_BASEADR<6> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   IDE_BASEADR<6>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   IDE_BASEADR<6>.AP = !RESET;

MACROCELL | 3 | 0 | IDE_BASEADR<7>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 5 | 3 | 0 | 5 | 15 | 3 | 1 | 5 | 0 | 3 | 17
INPUTS | 21 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D<15>.PIN  | IDE_BASEADR<7>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | D<14>.PIN  | IDE_BASEADR<6>  | D_0_IOBUFE.EXP
INPUTMC | 8 | 13 | 12 | 13 | 11 | 8 | 17 | 3 | 0 | 4 | 5 | 2 | 10 | 3 | 17 | 3 | 1
INPUTP | 13 | 158 | 152 | 89 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263 | 81
EXPORTS | 1 | 3 | 17
IMPORTS | 1 | 3 | 1
EQ | 23 | 
   IDE_BASEADR<7>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<15>.PIN & 
	IDE_BASEADR<7> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<15>.PIN & 
	IDE_BASEADR<7> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
;Imported pterms FB4_2
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<15>.PIN & 
	!IDE_BASEADR<7> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<15>.PIN & 
	!IDE_BASEADR<7> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>;
   IDE_BASEADR<7>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   IDE_BASEADR<7>.AP = !RESET;
    IDE_BASEADR<7>.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<14>.PIN & 
	!IDE_BASEADR<6> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 6 | 17 | LAN_BASEADR<10>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 6 | 6 | 17 | 11 | 11 | 11 | 12 | 6 | 0 | 11 | 1 | 6 | 16
INPUTS | 19 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | D<10>.PIN  | LAN_BASEADR<10>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | D<11>.PIN  | LAN_BASEADR<11>  | Z3_ADR<4>.EXP
INPUTMC | 6 | 13 | 12 | 6 | 17 | 4 | 5 | 2 | 10 | 6 | 16 | 6 | 0
INPUTP | 13 | 158 | 152 | 74 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263 | 77
EXPORTS | 1 | 6 | 16
IMPORTS | 1 | 6 | 0
EQ | 18 | 
   LAN_BASEADR<10>.T = !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<10>.PIN & 
	LAN_BASEADR<10> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<10>.PIN & 
	LAN_BASEADR<10> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
;Imported pterms FB7_1
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<10>.PIN & 
	!LAN_BASEADR<10> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<10>.PIN & 
	!LAN_BASEADR<10> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>;
   LAN_BASEADR<10>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   LAN_BASEADR<10>.AP = !RESET;
    LAN_BASEADR<10>.EXP  =  !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<11>.PIN & 
	!LAN_BASEADR<11> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>

MACROCELL | 6 | 16 | LAN_BASEADR<11>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 4 | 6 | 16 | 11 | 0 | 11 | 13 | 6 | 17
INPUTS | 17 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | D<11>.PIN  | LAN_BASEADR<11>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | LAN_BASEADR<10>.EXP
INPUTMC | 5 | 13 | 12 | 6 | 16 | 4 | 5 | 2 | 10 | 6 | 17
INPUTP | 12 | 158 | 152 | 77 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
IMPORTS | 1 | 6 | 17
EQ | 15 | 
   LAN_BASEADR<11>.T = !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<11>.PIN & 
	!LAN_BASEADR<11> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<11>.PIN & 
	LAN_BASEADR<11> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<11>.PIN & 
	LAN_BASEADR<11> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
;Imported pterms FB7_18
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<11>.PIN & 
	!LAN_BASEADR<11> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>;
   LAN_BASEADR<11>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   LAN_BASEADR<11>.AP = !RESET;

MACROCELL | 6 | 15 | LAN_BASEADR<12>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 4 | 6 | 15 | 11 | 0 | 11 | 13 | 6 | 14
INPUTS | 17 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | D<12>.PIN  | LAN_BASEADR<12>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | LAN_BASEADR<13>.EXP
INPUTMC | 5 | 13 | 12 | 6 | 15 | 4 | 5 | 2 | 10 | 6 | 14
INPUTP | 12 | 158 | 152 | 78 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
IMPORTS | 1 | 6 | 14
EQ | 15 | 
   LAN_BASEADR<12>.T = !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<12>.PIN & 
	!LAN_BASEADR<12> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<12>.PIN & 
	LAN_BASEADR<12> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<12>.PIN & 
	LAN_BASEADR<12> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
;Imported pterms FB7_15
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<12>.PIN & 
	!LAN_BASEADR<12> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>;
   LAN_BASEADR<12>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   LAN_BASEADR<12>.AP = !RESET;

MACROCELL | 6 | 14 | LAN_BASEADR<13>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 6 | 6 | 14 | 11 | 15 | 11 | 12 | 6 | 13 | 11 | 0 | 6 | 15
INPUTS | 19 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | D<13>.PIN  | LAN_BASEADR<13>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | D<12>.PIN  | LAN_BASEADR<12>  | Z3_ADR<2>.EXP
INPUTMC | 6 | 13 | 12 | 6 | 14 | 4 | 5 | 2 | 10 | 6 | 15 | 6 | 13
INPUTP | 13 | 158 | 152 | 80 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263 | 78
EXPORTS | 1 | 6 | 15
IMPORTS | 1 | 6 | 13
EQ | 18 | 
   LAN_BASEADR<13>.T = !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<13>.PIN & 
	LAN_BASEADR<13> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<13>.PIN & 
	LAN_BASEADR<13> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
;Imported pterms FB7_14
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<13>.PIN & 
	!LAN_BASEADR<13> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<13>.PIN & 
	!LAN_BASEADR<13> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>;
   LAN_BASEADR<13>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   LAN_BASEADR<13>.AP = !RESET;
    LAN_BASEADR<13>.EXP  =  !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<12>.PIN & 
	!LAN_BASEADR<12> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>

MACROCELL | 6 | 10 | LAN_BASEADR<14>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 4 | 6 | 10 | 11 | 15 | 11 | 12 | 6 | 11
INPUTS | 17 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | D<14>.PIN  | LAN_BASEADR<14>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | D_15_IOBUFE.EXP
INPUTMC | 5 | 13 | 12 | 6 | 10 | 4 | 5 | 2 | 10 | 6 | 11
INPUTP | 12 | 158 | 152 | 81 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
IMPORTS | 1 | 6 | 11
EQ | 15 | 
   LAN_BASEADR<14>.T = !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<14>.PIN & 
	!LAN_BASEADR<14> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<14>.PIN & 
	LAN_BASEADR<14> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<14>.PIN & 
	LAN_BASEADR<14> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
;Imported pterms FB7_12
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<14>.PIN & 
	!LAN_BASEADR<14> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>;
   LAN_BASEADR<14>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   LAN_BASEADR<14>.AP = !RESET;

MACROCELL | 6 | 9 | LAN_BASEADR<15>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 4 | 6 | 9 | 11 | 1 | 11 | 11 | 6 | 8
INPUTS | 17 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | D<15>.PIN  | LAN_BASEADR<15>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | LAN_BASEADR<8>.EXP
INPUTMC | 5 | 13 | 12 | 6 | 9 | 4 | 5 | 2 | 10 | 6 | 8
INPUTP | 12 | 158 | 152 | 89 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
IMPORTS | 1 | 6 | 8
EQ | 15 | 
   LAN_BASEADR<15>.T = !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<15>.PIN & 
	!LAN_BASEADR<15> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<15>.PIN & 
	LAN_BASEADR<15> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<15>.PIN & 
	LAN_BASEADR<15> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
;Imported pterms FB7_9
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<15>.PIN & 
	!LAN_BASEADR<15> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>;
   LAN_BASEADR<15>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   LAN_BASEADR<15>.AP = !RESET;

MACROCELL | 6 | 8 | LAN_BASEADR<8>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 5 | 6 | 8 | 11 | 16 | 11 | 14 | 6 | 7 | 6 | 9
INPUTS | 19 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | D<8>.PIN  | LAN_BASEADR<8>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | D<15>.PIN  | LAN_BASEADR<15>  | LAN_BASEADR<9>.EXP
INPUTMC | 6 | 13 | 12 | 6 | 8 | 4 | 5 | 2 | 10 | 6 | 9 | 6 | 7
INPUTP | 13 | 158 | 152 | 32 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263 | 89
EXPORTS | 1 | 6 | 9
IMPORTS | 1 | 6 | 7
EQ | 18 | 
   LAN_BASEADR<8>.T = !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<8>.PIN & 
	LAN_BASEADR<8> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<8>.PIN & 
	LAN_BASEADR<8> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
;Imported pterms FB7_8
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<8>.PIN & 
	!LAN_BASEADR<8> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<8>.PIN & 
	!LAN_BASEADR<8> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>;
   LAN_BASEADR<8>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   LAN_BASEADR<8>.AP = !RESET;
    LAN_BASEADR<8>.EXP  =  !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<15>.PIN & 
	!LAN_BASEADR<15> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>

MACROCELL | 6 | 7 | LAN_BASEADR<9>
ATTRIBUTES | 4326304 | 0
OUTPUTMC | 6 | 6 | 7 | 11 | 16 | 11 | 14 | 6 | 6 | 11 | 13 | 6 | 8
INPUTS | 19 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | D<9>.PIN  | LAN_BASEADR<9>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | D<8>.PIN  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | LAN_BASEADR<8>  | LDS  | EXP42_.EXP
INPUTMC | 6 | 13 | 12 | 6 | 7 | 4 | 5 | 2 | 10 | 6 | 8 | 6 | 6
INPUTP | 13 | 158 | 152 | 73 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 32 | 263 | 157
EXPORTS | 1 | 6 | 8
IMPORTS | 1 | 6 | 6
EQ | 21 | 
   LAN_BASEADR<9>.T = !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<9>.PIN & 
	LAN_BASEADR<9> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
;Imported pterms FB7_7
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<9>.PIN & 
	!LAN_BASEADR<9> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<9>.PIN & 
	!LAN_BASEADR<9> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<9>.PIN & 
	LAN_BASEADR<9> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>;
   LAN_BASEADR<9>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   LAN_BASEADR<9>.AP = !RESET;
    LAN_BASEADR<9>.EXP  =  !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<8>.PIN & 
	!LAN_BASEADR<8> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<8>.PIN & 
	!LAN_BASEADR<8> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>

MACROCELL | 2 | 17 | LAN_IRQ_OUT
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 2 | 17 | 2 | 13
INPUTS | 4 | LAN_IRQ_OUT  | LAN_IRQ_D0  | LAN_INT  | RESET
INPUTMC | 2 | 2 | 17 | 8 | 2
INPUTP | 2 | 201 | 263
EQ | 4 | 
   LAN_IRQ_OUT.D = LAN_INT
	# LAN_IRQ_OUT & !LAN_IRQ_D0;
   LAN_IRQ_OUT.CLK = CLK_EXT;	// GCK
   LAN_IRQ_OUT.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 13 | Z3_DATA<16>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 2 | 3 | 2 | 15 | 14
INPUTS | 11 | DQ_SWAP  | DQ<0>.PIN  | DQ<8>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | UDS  | LDS  | A<18>.PIN
INPUTMC | 6 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5
INPUTP | 5 | 217 | 231 | 155 | 157 | 171
EXPORTS | 1 | 15 | 14
EQ | 8 | 
   Z3_DATA<16>.D = DQ_SWAP & DQ<8>.PIN
	# !DQ_SWAP & DQ<0>.PIN;
   Z3_DATA<16>.CLK = CLK_EXT;	// GCK
   Z3_DATA<16>.AP = LAN_SM_RST;
   Z3_DATA<16>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
    Z3_DATA<16>.EXP  =  UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<18>.PIN
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 12 | Z3_DATA<17>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 1 | 1 | 15
INPUTS | 8 | DQ_SWAP  | DQ<1>.PIN  | DQ<9>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5
INPUTP | 2 | 216 | 209
EQ | 6 | 
   Z3_DATA<17>.D = DQ_SWAP & DQ<9>.PIN
	# !DQ_SWAP & DQ<1>.PIN;
   Z3_DATA<17>.CLK = CLK_EXT;	// GCK
   Z3_DATA<17>.AP = LAN_SM_RST;
   Z3_DATA<17>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 11 | Z3_DATA<18>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 1 | 4 | 10
INPUTS | 8 | DQ_SWAP  | DQ<10>.PIN  | DQ<2>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5
INPUTP | 2 | 234 | 220
EQ | 6 | 
   Z3_DATA<18>.D = DQ_SWAP & DQ<10>.PIN
	# !DQ_SWAP & DQ<2>.PIN;
   Z3_DATA<18>.CLK = CLK_EXT;	// GCK
   Z3_DATA<18>.AP = LAN_SM_RST;
   Z3_DATA<18>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 12 | Z3_DATA<19>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 1 | 1 | 12
INPUTS | 8 | DQ_SWAP  | DQ<11>.PIN  | DQ<3>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5
INPUTP | 2 | 207 | 219
EQ | 6 | 
   Z3_DATA<19>.D = DQ_SWAP & DQ<11>.PIN
	# !DQ_SWAP & DQ<3>.PIN;
   Z3_DATA<19>.CLK = CLK_EXT;	// GCK
   Z3_DATA<19>.AP = LAN_SM_RST;
   Z3_DATA<19>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 8 | Z3_DATA<20>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 1 | 0 | 6
INPUTS | 8 | DQ_SWAP  | DQ<12>.PIN  | DQ<4>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5
INPUTP | 2 | 235 | 225
EQ | 6 | 
   Z3_DATA<20>.D = DQ_SWAP & DQ<12>.PIN
	# !DQ_SWAP & DQ<4>.PIN;
   Z3_DATA<20>.CLK = CLK_EXT;	// GCK
   Z3_DATA<20>.AP = LAN_SM_RST;
   Z3_DATA<20>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 7 | Z3_DATA<21>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 1 | 0 | 3
INPUTS | 8 | DQ_SWAP  | DQ<13>.PIN  | DQ<5>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5
INPUTP | 2 | 204 | 221
EQ | 6 | 
   Z3_DATA<21>.D = DQ_SWAP & DQ<13>.PIN
	# !DQ_SWAP & DQ<5>.PIN;
   Z3_DATA<21>.CLK = CLK_EXT;	// GCK
   Z3_DATA<21>.AP = LAN_SM_RST;
   Z3_DATA<21>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 6 | Z3_DATA<22>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 1 | 1 | 10
INPUTS | 8 | DQ_SWAP  | DQ<14>.PIN  | DQ<6>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5
INPUTP | 2 | 236 | 227
EQ | 6 | 
   Z3_DATA<22>.D = DQ_SWAP & DQ<14>.PIN
	# !DQ_SWAP & DQ<6>.PIN;
   Z3_DATA<22>.CLK = CLK_EXT;	// GCK
   Z3_DATA<22>.AP = LAN_SM_RST;
   Z3_DATA<22>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 3 | Z3_DATA<23>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 2 | 1 | 14 | 12 | 4
INPUTS | 13 | DQ_SWAP  | DQ<15>.PIN  | RW  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | UDS  | DS1  | A<23>.PIN  | LAN_INT_ENABLE  | Z3_DATA<31>.EXP
INPUTMC | 8 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5 | 12 | 4 | 12 | 2
INPUTP | 5 | 202 | 158 | 155 | 148 | 161
EXPORTS | 1 | 12 | 4
IMPORTS | 1 | 12 | 2
EQ | 13 | 
   Z3_DATA<23>.D = DQ_SWAP & DQ<15>.PIN
;Imported pterms FB13_3
	# !DQ_SWAP & DQ<7>.PIN;
   Z3_DATA<23>.CLK = CLK_EXT;	// GCK
   Z3_DATA<23>.AP = LAN_SM_RST;
   Z3_DATA<23>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
    Z3_DATA<23>.EXP  =  !RW & UDS & !DS1 & A<23>.PIN & !LAN_SM_FSM_FFd3 & 
	LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & 
	!LAN_INT_ENABLE & !LAN_SM_RST
	# !RW & UDS & !DS1 & !A<23>.PIN & !LAN_SM_FSM_FFd3 & 
	LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & 
	LAN_INT_ENABLE & !LAN_SM_RST
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 8 | Z3_DATA<24>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 1 | 1 | 17
INPUTS | 8 | DQ_SWAP  | DQ<0>.PIN  | DQ<8>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5
INPUTP | 2 | 217 | 231
EQ | 6 | 
   Z3_DATA<24>.D = DQ_SWAP & DQ<0>.PIN
	# !DQ_SWAP & DQ<8>.PIN;
   Z3_DATA<24>.CLK = CLK_EXT;	// GCK
   Z3_DATA<24>.AP = LAN_SM_RST;
   Z3_DATA<24>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 6 | Z3_DATA<25>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 1 | 4 | 12
INPUTS | 8 | DQ_SWAP  | DQ<1>.PIN  | DQ<9>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5
INPUTP | 2 | 216 | 209
EQ | 6 | 
   Z3_DATA<25>.D = DQ_SWAP & DQ<1>.PIN
	# !DQ_SWAP & DQ<9>.PIN;
   Z3_DATA<25>.CLK = CLK_EXT;	// GCK
   Z3_DATA<25>.AP = LAN_SM_RST;
   Z3_DATA<25>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 4 | Z3_DATA<26>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 1 | 4 | 14
INPUTS | 8 | DQ_SWAP  | DQ<10>.PIN  | DQ<2>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5
INPUTP | 2 | 234 | 220
EQ | 6 | 
   Z3_DATA<26>.D = DQ_SWAP & DQ<2>.PIN
	# !DQ_SWAP & DQ<10>.PIN;
   Z3_DATA<26>.CLK = CLK_EXT;	// GCK
   Z3_DATA<26>.AP = LAN_SM_RST;
   Z3_DATA<26>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 5 | Z3_DATA<27>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 1 | 4 | 15
INPUTS | 8 | DQ_SWAP  | DQ<11>.PIN  | DQ<3>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5
INPUTP | 2 | 207 | 219
EQ | 6 | 
   Z3_DATA<27>.D = DQ_SWAP & DQ<3>.PIN
	# !DQ_SWAP & DQ<11>.PIN;
   Z3_DATA<27>.CLK = CLK_EXT;	// GCK
   Z3_DATA<27>.AP = LAN_SM_RST;
   Z3_DATA<27>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 3 | Z3_DATA<28>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 2 | 4 | 17 | 10 | 2
INPUTS | 9 | DQ_SWAP  | DQ<12>.PIN  | DQ<4>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<3>.PIN
INPUTMC | 6 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5
INPUTP | 3 | 235 | 225 | 219
EXPORTS | 1 | 10 | 2
EQ | 7 | 
   Z3_DATA<28>.D = DQ_SWAP & DQ<4>.PIN
	# !DQ_SWAP & DQ<12>.PIN;
   Z3_DATA<28>.CLK = CLK_EXT;	// GCK
   Z3_DATA<28>.AP = LAN_SM_RST;
   Z3_DATA<28>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
    Z3_DATA<28>.EXP  =  !DQ_SWAP & DQ<3>.PIN
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 1 | Z3_DATA<29>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 2 | 6 | 1 | 10 | 0
INPUTS | 10 | DQ_SWAP  | DQ<13>.PIN  | DQ<6>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<14>.PIN  | Z3_DATA<3>.EXP
INPUTMC | 7 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5 | 10 | 2
INPUTP | 3 | 204 | 227 | 236
EXPORTS | 1 | 10 | 0
IMPORTS | 1 | 10 | 2
EQ | 9 | 
   Z3_DATA<29>.D = !DQ_SWAP & DQ<13>.PIN
;Imported pterms FB11_3
	# DQ_SWAP & DQ<5>.PIN;
   Z3_DATA<29>.CLK = CLK_EXT;	// GCK
   Z3_DATA<29>.AP = LAN_SM_RST;
   Z3_DATA<29>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
    Z3_DATA<29>.EXP  =  DQ_SWAP & DQ<6>.PIN
	# !DQ_SWAP & DQ<14>.PIN
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 0 | Z3_DATA<30>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 2 | 6 | 3 | 10 | 17
INPUTS | 12 | D<8>.PIN  | LDS  | DQ_SWAP  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | UDS  | A<16>.PIN  | A<8>.PIN  | Z3_DATA<29>.EXP
INPUTMC | 7 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5 | 10 | 1
INPUTP | 5 | 32 | 157 | 155 | 175 | 106
EXPORTS | 1 | 10 | 17
IMPORTS | 1 | 10 | 1
EQ | 13 | 
   Z3_DATA<30>.D = ;Imported pterms FB11_2
	  DQ_SWAP & DQ<6>.PIN
	# !DQ_SWAP & DQ<14>.PIN;
   Z3_DATA<30>.CLK = CLK_EXT;	// GCK
   Z3_DATA<30>.AP = LAN_SM_RST;
   Z3_DATA<30>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
    Z3_DATA<30>.EXP  =  D<8>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & A<16>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<8>.PIN
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 2 | Z3_DATA<31>
ATTRIBUTES | 8553408 | 0
OUTPUTMC | 2 | 6 | 12 | 12 | 3
INPUTS | 8 | DQ_SWAP  | DQ<15>.PIN  | DQ<7>.PIN  | LAN_SM_RST  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1
INPUTMC | 6 | 11 | 17 | 11 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5
INPUTP | 2 | 202 | 226
EXPORTS | 1 | 12 | 3
EQ | 7 | 
   Z3_DATA<31>.D = DQ_SWAP & DQ<7>.PIN
	# !DQ_SWAP & DQ<15>.PIN;
   Z3_DATA<31>.CLK = CLK_EXT;	// GCK
   Z3_DATA<31>.AP = LAN_SM_RST;
   Z3_DATA<31>.CE = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
    Z3_DATA<31>.EXP  =  !DQ_SWAP & DQ<7>.PIN
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 9 | 16 | DQ_10_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 9 | 17
INPUTS | 11 | RESET  | LAN_D_INIT<8>  | RW  | LDS  | FCS  | LAN_ACCESS  | DQ_DATA<4>  | DS1  | DS0  | EXP56_.EXP  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST
INPUTMC | 5 | 8 | 3 | 11 | 15 | 7 | 13 | 9 | 15 | 1 | 3
INPUTP | 6 | 263 | 158 | 157 | 147 | 148 | 170
EXPORTS | 1 | 9 | 17
IMPORTS | 1 | 9 | 15
EQ | 22 | 
   DQ<10> = !RESET & LAN_D_INIT<8>
;Imported pterms FB10_16
	# RW & RESET & D<10>.PIN
	# RESET & D<10>.PIN & FCS
	# RESET & D<10>.PIN & !LAN_ACCESS
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<10>
	# RESET & D<10>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB10_15
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<10>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<10>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<10>;
   DQ<10>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;
    DQ_10_IOBUFE.EXP  =  !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<4>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<4>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<4>

MACROCELL | 11 | 9 | DQ_11_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 11 | 10
INPUTS | 11 | RESET  | LAN_D_INIT<8>  | RW  | LDS  | FCS  | LAN_ACCESS  | DQ_DATA<9>  | DS1  | DS0  | EXP62_.EXP  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST
INPUTMC | 5 | 8 | 3 | 11 | 15 | 14 | 9 | 11 | 8 | 1 | 3
INPUTP | 6 | 263 | 158 | 157 | 147 | 148 | 170
EXPORTS | 1 | 11 | 10
IMPORTS | 1 | 11 | 8
EQ | 22 | 
   DQ<11> = !RESET & LAN_D_INIT<8>
;Imported pterms FB12_9
	# RW & RESET & D<11>.PIN
	# RESET & D<11>.PIN & FCS
	# RESET & D<11>.PIN & !LAN_ACCESS
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<11>
	# RESET & D<11>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB12_8
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<11>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<11>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<11>;
   DQ<11>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;
    DQ_11_IOBUFE.EXP  =  !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<9>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<9>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<9>

MACROCELL | 9 | 1 | DQ_1_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 9 | RESET  | LAN_D_INIT<1>  | LAN_ACCESS  | D<1>.PIN  | FCS  | RW  | DQ<4>_BUFR.EXP  | DQ_0_IOBUFE.EXP  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST
INPUTMC | 5 | 8 | 4 | 11 | 15 | 9 | 0 | 9 | 2 | 1 | 3
INPUTP | 4 | 263 | 30 | 147 | 158
IMPORTS | 2 | 9 | 0 | 9 | 2
EQ | 16 | 
   DQ<1> = !RESET & LAN_D_INIT<1>
	# RW & RESET & D<1>.PIN
	# RESET & FCS & D<1>.PIN
	# RESET & !LAN_ACCESS & D<1>.PIN
;Imported pterms FB10_1
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<1>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<1>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<1>
	# RESET & UDS & LDS & DS1 & DS0 & D<1>.PIN
;Imported pterms FB10_3
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<1>;
   DQ<1>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;

MACROCELL | 9 | 0 | DQ<4>_BUFR.MC
ATTRIBUTES | 133888 | 0
OUTPUTMC | 2 | 9 | 9 | 9 | 1
INPUTS | 12 | RESET  | LAN_D_INIT<1>  | RW  | UDS  | FCS  | LAN_ACCESS  | DQ_DATA<1>  | LDS  | DS1  | DS0  | D<1>.PIN  | EXP57_.EXP
INPUTMC | 4 | 8 | 4 | 11 | 15 | 14 | 17 | 9 | 17
INPUTP | 8 | 263 | 158 | 155 | 147 | 157 | 148 | 170 | 30
EXPORTS | 1 | 9 | 1
IMPORTS | 1 | 9 | 17
EQ | 22 | 
   DQ<4>_BUFR = !RESET & LAN_D_INIT<1>
;Imported pterms FB10_18
	# RW & RESET & D<4>.PIN
	# RESET & FCS & D<4>.PIN
	# RESET & !LAN_ACCESS & D<4>.PIN
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<4>
	# RESET & UDS & LDS & DS1 & DS0 & D<4>.PIN
;Imported pterms FB10_17
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<4>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<4>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<4>;
    DQ<4>_BUFR.EXP  =  !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<1>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<1>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<1>
	# RESET & UDS & LDS & DS1 & DS0 & D<1>.PIN

MACROCELL | 1 | 0 | DQ<8>_BUFR.MC
ATTRIBUTES | 133888 | 0
OUTPUTMC | 1 | 9 | 13
INPUTS | 11 | RESET  | LAN_D_INIT<8>  | D<8>.PIN  | LAN_ACCESS  | FCS  | RW  | UDS  | LDS  | DS1  | DS0  | A_LAN_4_OBUF.EXP
INPUTMC | 3 | 8 | 3 | 11 | 15 | 1 | 1
INPUTP | 8 | 263 | 32 | 147 | 158 | 155 | 157 | 148 | 170
IMPORTS | 1 | 1 | 1
EQ | 14 | 
   DQ<8>_BUFR = !RESET & LAN_D_INIT<8>
	# RW & RESET & D<8>.PIN
	# RESET & D<8>.PIN & FCS
	# RESET & D<8>.PIN & !LAN_ACCESS
	# RESET & D<8>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB2_2
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<8>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<8>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<8>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<8>;

MACROCELL | 11 | 11 | DQ_9_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 11 | 12
INPUTS | 8 | RESET  | LAN_D_INIT<1>  | D<10>.PIN  | LAN_BASEADR<10>  | D<15>.PIN  | LAN_BASEADR<15>  | EXP63_.EXP  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST
INPUTMC | 5 | 8 | 4 | 6 | 17 | 6 | 9 | 11 | 10 | 1 | 3
INPUTP | 3 | 263 | 74 | 89
EXPORTS | 1 | 11 | 12
IMPORTS | 1 | 11 | 10
EQ | 19 | 
   DQ<9> = !RESET & LAN_D_INIT<1>
;Imported pterms FB12_11
	# RW & RESET & D<9>.PIN
	# RESET & D<9>.PIN & FCS
	# RESET & D<9>.PIN & !LAN_ACCESS
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<9>
	# RESET & D<9>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB12_10
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<9>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<9>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<9>;
   DQ<9>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;
    DQ_9_IOBUFE.EXP  =  !D<10>.PIN & LAN_BASEADR<10>
	# D<15>.PIN & !LAN_BASEADR<15>
	# !D<15>.PIN & LAN_BASEADR<15>

MACROCELL | 3 | 1 | D_0_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 3 | 0
INPUTS | 20 | RW  | DQ<0>.PIN  | LAN_ACCESS  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D_8_IOBUFE/D_8_IOBUFE_TRST  | D<15>.PIN  | IDE_BASEADR<7>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | EXP30_.EXP
INPUTMC | 8 | 11 | 15 | 13 | 12 | 13 | 11 | 8 | 17 | 4 | 3 | 3 | 0 | 4 | 5 | 3 | 2
INPUTP | 12 | 158 | 217 | 152 | 89 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157
EXPORTS | 1 | 3 | 0
IMPORTS | 1 | 3 | 2
EQ | 16 | 
   D<0> = !RW & DQ<0>.PIN
	# !LAN_ACCESS & DQ<0>.PIN
;Imported pterms FB4_3
	# FCS & DQ<0>.PIN
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
	# RW & Z3_DATA<16> & !FCS & LAN_ACCESS;
   D<0>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;
    D_0_IOBUFE.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<15>.PIN & 
	!IDE_BASEADR<7> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<15>.PIN & 
	!IDE_BASEADR<7> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 4 | 13 | D_10_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 8 | RW  | DQ<2>.PIN  | LAN_ACCESS  | FCS  | AS  | AUTOCONFIG_Z2_ACCESS  | D_11_IOBUFE.EXP  | D_8_IOBUFE/D_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 4 | 5 | 4 | 14 | 4 | 3
INPUTP | 4 | 158 | 220 | 147 | 152
IMPORTS | 1 | 4 | 14
EQ | 8 | 
   D<10> = !RW & DQ<2>.PIN
	# FCS & DQ<2>.PIN
	# !LAN_ACCESS & DQ<2>.PIN
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
;Imported pterms FB5_15
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<26> & !FCS & LAN_ACCESS;
   D<10>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;

MACROCELL | 4 | 14 | D_11_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 4 | 13
INPUTS | 9 | RW  | DQ<3>.PIN  | LAN_ACCESS  | AS  | FCS  | AUTOCONFIG_Z2_ACCESS  | Z3_DATA<26>  | D_8_IOBUFE/D_8_IOBUFE_TRST  | EXP38_.EXP
INPUTMC | 5 | 11 | 15 | 4 | 5 | 15 | 4 | 4 | 3 | 4 | 15
INPUTP | 4 | 158 | 219 | 152 | 147
EXPORTS | 1 | 4 | 13
IMPORTS | 1 | 4 | 15
EQ | 10 | 
   D<11> = !RW & DQ<3>.PIN
	# !LAN_ACCESS & DQ<3>.PIN
;Imported pterms FB5_16
	# FCS & DQ<3>.PIN
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
	# RW & Z3_DATA<27> & !FCS & LAN_ACCESS;
   D<11>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;
    D_11_IOBUFE.EXP  =  RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<26> & !FCS & LAN_ACCESS

MACROCELL | 4 | 16 | D_12_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 8 | RW  | DQ<4>.PIN  | AUTOCONFIG_Z2_ACCESS  | LAN_ACCESS  | AS  | FCS  | IDE_ACCESS/IDE_ACCESS_RSTF__$INT.EXP  | D_8_IOBUFE/D_8_IOBUFE_TRST
INPUTMC | 4 | 4 | 5 | 11 | 15 | 4 | 17 | 4 | 3
INPUTP | 4 | 158 | 225 | 152 | 147
IMPORTS | 1 | 4 | 17
EQ | 12 | 
   D<12> = !RW & DQ<4>.PIN
	# AS & !LAN_ACCESS & DQ<4>.PIN
	# FCS & !AUTOCONFIG_Z2_ACCESS & DQ<4>.PIN
	# !AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & DQ<4>.PIN
;Imported pterms FB5_18
	# AS & FCS & DQ<4>.PIN
	# RW & Z3_DATA<28> & !FCS & LAN_ACCESS
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS & 
	D_Z2_OUT<0>
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & 
	D_Z2_OUT<0>;
   D<12>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;

MACROCELL | 6 | 2 | D_13_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 8 | RW  | DQ<5>.PIN  | AUTOCONFIG_Z2_ACCESS  | LAN_ACCESS  | AS  | FCS  | EXP41_.EXP  | D_8_IOBUFE/D_8_IOBUFE_TRST
INPUTMC | 4 | 4 | 5 | 11 | 15 | 6 | 1 | 4 | 3
INPUTP | 4 | 158 | 221 | 152 | 147
IMPORTS | 1 | 6 | 1
EQ | 12 | 
   D<13> = !RW & DQ<5>.PIN
	# AS & !LAN_ACCESS & DQ<5>.PIN
	# FCS & !AUTOCONFIG_Z2_ACCESS & DQ<5>.PIN
	# !AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & DQ<5>.PIN
;Imported pterms FB7_2
	# AS & FCS & DQ<5>.PIN
	# RW & Z3_DATA<29> & !FCS & LAN_ACCESS
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS & 
	D_Z2_OUT<1>
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & 
	D_Z2_OUT<1>;
   D<13>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;

MACROCELL | 6 | 4 | D_14_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 9 | RW  | DQ<6>.PIN  | AUTOCONFIG_Z2_ACCESS  | LAN_ACCESS  | AS  | FCS  | Z3_ADR<3>.EXP  | Z3_ADR_0.EXP  | D_8_IOBUFE/D_8_IOBUFE_TRST
INPUTMC | 5 | 4 | 5 | 11 | 15 | 6 | 3 | 6 | 5 | 4 | 3
INPUTP | 4 | 158 | 227 | 152 | 147
IMPORTS | 2 | 6 | 3 | 6 | 5
EQ | 13 | 
   D<14> = !RW & DQ<6>.PIN
	# AS & !LAN_ACCESS & DQ<6>.PIN
	# FCS & !AUTOCONFIG_Z2_ACCESS & DQ<6>.PIN
	# !AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & DQ<6>.PIN
;Imported pterms FB7_4
	# AS & FCS & DQ<6>.PIN
	# RW & Z3_DATA<30> & !FCS & LAN_ACCESS
;Imported pterms FB7_6
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS & 
	D_Z2_OUT<2>
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & 
	D_Z2_OUT<2>;
   D<14>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;

MACROCELL | 6 | 11 | D_15_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 6 | 10
INPUTS | 17 | RW  | DQ<7>.PIN  | AUTOCONFIG_Z2_ACCESS  | LAN_ACCESS  | AS  | AUTO_CONFIG_Z2_DONE<0>  | D<14>.PIN  | LAN_BASEADR<14>  | D_8_IOBUFE/D_8_IOBUFE_TRST  | LDS  | A<2>  | A<5>  | A<4>  | A<1>  | A<6>  | A<3>  | EXP43_.EXP
INPUTMC | 6 | 4 | 5 | 11 | 15 | 13 | 12 | 6 | 10 | 4 | 3 | 6 | 12
INPUTP | 11 | 158 | 226 | 152 | 81 | 157 | 101 | 91 | 97 | 107 | 98 | 99
EXPORTS | 1 | 6 | 10
IMPORTS | 1 | 6 | 12
EQ | 15 | 
   D<15> = !RW & DQ<7>.PIN
	# AS & !LAN_ACCESS & DQ<7>.PIN
	# !AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & DQ<7>.PIN
;Imported pterms FB7_13
	# AS & FCS & DQ<7>.PIN
	# FCS & !AUTOCONFIG_Z2_ACCESS & DQ<7>.PIN
	# RW & Z3_DATA<31> & !FCS & LAN_ACCESS
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS & 
	D_Z2_OUT<3>
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & 
	D_Z2_OUT<3>;
   D<15>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;
    D_15_IOBUFE.EXP  =  !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<14>.PIN & 
	!LAN_BASEADR<14> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>

MACROCELL | 1 | 14 | D_1_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 1 | 13
INPUTS | 9 | RW  | DQ<1>.PIN  | LAN_ACCESS  | AS  | FCS  | AUTOCONFIG_Z2_ACCESS  | Z3_DATA<23>  | D_8_IOBUFE/D_8_IOBUFE_TRST  | EXP28_.EXP
INPUTMC | 5 | 11 | 15 | 4 | 5 | 12 | 3 | 4 | 3 | 1 | 15
INPUTP | 4 | 158 | 216 | 152 | 147
EXPORTS | 1 | 1 | 13
IMPORTS | 1 | 1 | 15
EQ | 10 | 
   D<1> = !RW & DQ<1>.PIN
	# !LAN_ACCESS & DQ<1>.PIN
;Imported pterms FB2_16
	# FCS & DQ<1>.PIN
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
	# RW & Z3_DATA<17> & !FCS & LAN_ACCESS;
   D<1>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;
    D_1_IOBUFE.EXP  =  RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<23> & !FCS & LAN_ACCESS

MACROCELL | 4 | 9 | D_2_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 9 | RW  | DQ<2>.PIN  | LAN_ACCESS  | FCS  | AS  | AUTOCONFIG_Z2_ACCESS  | EXP35_.EXP  | D_8_IOBUFE/D_8_IOBUFE_TRST  | EXP36_.EXP
INPUTMC | 5 | 11 | 15 | 4 | 5 | 4 | 8 | 4 | 3 | 4 | 10
INPUTP | 4 | 158 | 220 | 147 | 152
IMPORTS | 2 | 4 | 8 | 4 | 10
EQ | 9 | 
   D<2> = !RW & DQ<2>.PIN
	# FCS & DQ<2>.PIN
	# !LAN_ACCESS & DQ<2>.PIN
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
;Imported pterms FB5_9
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
;Imported pterms FB5_11
	# RW & Z3_DATA<18> & !FCS & LAN_ACCESS;
   D<2>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;

MACROCELL | 1 | 11 | D_3_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 8 | RW  | DQ<3>.PIN  | LAN_ACCESS  | FCS  | AS  | AUTOCONFIG_Z2_ACCESS  | EXP27_.EXP  | D_8_IOBUFE/D_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 4 | 5 | 1 | 12 | 4 | 3
INPUTP | 4 | 158 | 219 | 147 | 152
IMPORTS | 1 | 1 | 12
EQ | 8 | 
   D<3> = !RW & DQ<3>.PIN
	# FCS & DQ<3>.PIN
	# !LAN_ACCESS & DQ<3>.PIN
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
;Imported pterms FB2_13
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<19> & !FCS & LAN_ACCESS;
   D<3>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;

MACROCELL | 0 | 5 | D_4_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 8 | RW  | DQ<4>.PIN  | LAN_ACCESS  | FCS  | AS  | AUTOCONFIG_Z2_ACCESS  | CP_BASEADR<6>.EXP  | D_8_IOBUFE/D_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 4 | 5 | 0 | 6 | 4 | 3
INPUTP | 4 | 158 | 225 | 147 | 152
IMPORTS | 1 | 0 | 6
EQ | 8 | 
   D<4> = !RW & DQ<4>.PIN
	# FCS & DQ<4>.PIN
	# !LAN_ACCESS & DQ<4>.PIN
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
;Imported pterms FB1_7
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<20> & !FCS & LAN_ACCESS;
   D<4>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;

MACROCELL | 0 | 4 | D_5_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 8 | RW  | DQ<5>.PIN  | LAN_ACCESS  | FCS  | AS  | AUTOCONFIG_Z2_ACCESS  | CP_BASEADR<7>.EXP  | D_8_IOBUFE/D_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 4 | 5 | 0 | 3 | 4 | 3
INPUTP | 4 | 158 | 221 | 147 | 152
IMPORTS | 1 | 0 | 3
EQ | 8 | 
   D<5> = !RW & DQ<5>.PIN
	# FCS & DQ<5>.PIN
	# !LAN_ACCESS & DQ<5>.PIN
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
;Imported pterms FB1_4
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<21> & !FCS & LAN_ACCESS;
   D<5>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;

MACROCELL | 1 | 9 | D_6_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 8 | RW  | DQ<6>.PIN  | LAN_ACCESS  | FCS  | AS  | AUTOCONFIG_Z2_ACCESS  | EXP26_.EXP  | D_8_IOBUFE/D_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 4 | 5 | 1 | 10 | 4 | 3
INPUTP | 4 | 158 | 227 | 147 | 152
IMPORTS | 1 | 1 | 10
EQ | 8 | 
   D<6> = !RW & DQ<6>.PIN
	# FCS & DQ<6>.PIN
	# !LAN_ACCESS & DQ<6>.PIN
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
;Imported pterms FB2_11
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<22> & !FCS & LAN_ACCESS;
   D<6>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;

MACROCELL | 1 | 13 | D_7_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 8 | RW  | DQ<7>.PIN  | LAN_ACCESS  | FCS  | AS  | AUTOCONFIG_Z2_ACCESS  | D_1_IOBUFE.EXP  | D_8_IOBUFE/D_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 4 | 5 | 1 | 14 | 4 | 3
INPUTP | 4 | 158 | 226 | 147 | 152
IMPORTS | 1 | 1 | 14
EQ | 8 | 
   D<7> = !RW & DQ<7>.PIN
	# FCS & DQ<7>.PIN
	# !LAN_ACCESS & DQ<7>.PIN
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
;Imported pterms FB2_15
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<23> & !FCS & LAN_ACCESS;
   D<7>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;

MACROCELL | 1 | 16 | D_8_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 8 | RW  | DQ<0>.PIN  | LAN_ACCESS  | FCS  | AS  | AUTOCONFIG_Z2_ACCESS  | EXP29_.EXP  | D_8_IOBUFE/D_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 4 | 5 | 1 | 17 | 4 | 3
INPUTP | 4 | 158 | 217 | 147 | 152
IMPORTS | 1 | 1 | 17
EQ | 8 | 
   D<8> = !RW & DQ<0>.PIN
	# FCS & DQ<0>.PIN
	# !LAN_ACCESS & DQ<0>.PIN
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
;Imported pterms FB2_18
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<24> & !FCS & LAN_ACCESS;
   D<8>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;

MACROCELL | 4 | 11 | D_9_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 8 | RW  | DQ<1>.PIN  | LAN_ACCESS  | FCS  | AS  | AUTOCONFIG_Z2_ACCESS  | EXP37_.EXP  | D_8_IOBUFE/D_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 4 | 5 | 4 | 12 | 4 | 3
INPUTP | 4 | 158 | 216 | 147 | 152
IMPORTS | 1 | 4 | 12
EQ | 8 | 
   D<9> = !RW & DQ<1>.PIN
	# FCS & DQ<1>.PIN
	# !LAN_ACCESS & DQ<1>.PIN
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
;Imported pterms FB5_13
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<25> & !FCS & LAN_ACCESS;
   D<9>.OE = D_8_IOBUFE/D_8_IOBUFE_TRST;

MACROCELL | 9 | 2 | DQ_0_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 9 | 1
INPUTS | 9 | RESET  | LAN_ACCESS  | D<0>.PIN  | FCS  | RW  | DS0  | DQ_DATA<1>  | EXP51_.EXP  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 14 | 17 | 9 | 3 | 1 | 3
INPUTP | 5 | 263 | 4 | 147 | 158 | 170
EXPORTS | 1 | 9 | 1
IMPORTS | 1 | 9 | 3
EQ | 16 | 
   DQ<0> = RW & RESET & D<0>.PIN
	# RESET & FCS & D<0>.PIN
	# RESET & !LAN_ACCESS & D<0>.PIN
;Imported pterms FB10_4
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<0>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<0>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<0>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<0>
	# RESET & UDS & LDS & DS1 & DS0 & D<0>.PIN;
   DQ<0>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;
    DQ_0_IOBUFE.EXP  =  !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<1>

MACROCELL | 7 | 1 | DQ_12_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 12 | RESET  | D<12>.PIN  | LAN_ACCESS  | FCS  | RW  | UDS  | LDS  | DS1  | DS0  | DQ_DATA<12>.EXP  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST  | DQ_14_IOBUFE.EXP
INPUTMC | 4 | 11 | 15 | 7 | 0 | 1 | 3 | 7 | 2
INPUTP | 8 | 263 | 78 | 147 | 158 | 155 | 157 | 148 | 170
IMPORTS | 2 | 7 | 0 | 7 | 2
EQ | 15 | 
   DQ<12> = RW & RESET & D<12>.PIN
	# RESET & D<12>.PIN & FCS
	# RESET & D<12>.PIN & !LAN_ACCESS
	# RESET & D<12>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB8_1
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<12>
;Imported pterms FB8_3
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<12>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<12>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<12>;
   DQ<12>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;

MACROCELL | 11 | 7 | DQ_13_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 11 | 8
INPUTS | 11 | RESET  | D<13>.PIN  | LAN_ACCESS  | RW  | LDS  | FCS  | DQ_DATA<11>  | DS1  | DS0  | EXP61_.EXP  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 12 | 15 | 11 | 6 | 1 | 3
INPUTP | 7 | 263 | 80 | 158 | 157 | 147 | 148 | 170
EXPORTS | 1 | 11 | 8
IMPORTS | 1 | 11 | 6
EQ | 21 | 
   DQ<13> = RESET & D<13>.PIN & !LAN_ACCESS
;Imported pterms FB12_7
	# RW & RESET & D<13>.PIN
	# RESET & D<13>.PIN & FCS
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<13>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<13>
	# RESET & D<13>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB12_6
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<13>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<13>;
   DQ<13>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;
    DQ_13_IOBUFE.EXP  =  !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<11>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<11>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<11>

MACROCELL | 7 | 2 | DQ_14_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 7 | 1
INPUTS | 11 | RESET  | D<14>.PIN  | LAN_ACCESS  | RW  | LDS  | FCS  | DQ_DATA<12>  | DS1  | DS0  | EXP44_.EXP  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 7 | 0 | 7 | 3 | 1 | 3
INPUTP | 7 | 263 | 81 | 158 | 157 | 147 | 148 | 170
EXPORTS | 1 | 7 | 1
IMPORTS | 1 | 7 | 3
EQ | 21 | 
   DQ<14> = RESET & D<14>.PIN & !LAN_ACCESS
;Imported pterms FB8_4
	# RW & RESET & D<14>.PIN
	# RESET & D<14>.PIN & FCS
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<14>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<14>
	# RESET & D<14>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB8_5
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<14>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<14>;
   DQ<14>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;
    DQ_14_IOBUFE.EXP  =  !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<12>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<12>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<12>

MACROCELL | 11 | 4 | DQ_15_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 11 | 5
INPUTS | 12 | RESET  | D<15>.PIN  | LAN_ACCESS  | FCS  | DS1  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DS0  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST  | EXP60_.EXP
INPUTMC | 7 | 11 | 15 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5 | 1 | 3 | 11 | 3
INPUTP | 5 | 263 | 89 | 147 | 148 | 170
EXPORTS | 1 | 11 | 5
IMPORTS | 1 | 11 | 3
EQ | 19 | 
   DQ<15> = RESET & D<15>.PIN & FCS
	# RESET & D<15>.PIN & !LAN_ACCESS
;Imported pterms FB12_4
	# RW & RESET & D<15>.PIN
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<15>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<15>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<15>
	# RESET & D<15>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB12_3
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<15>;
   DQ<15>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;
    DQ_15_IOBUFE.EXP  =  !DS1 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1
	# !DS0 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1

MACROCELL | 9 | 5 | DQ_2_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 9 | 4
INPUTS | 11 | RW  | RESET  | UDS  | FCS  | LAN_ACCESS  | DQ_DATA<3>  | LDS  | DS1  | DS0  | EXP52_.EXP  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 12 | 10 | 9 | 6 | 1 | 3
INPUTP | 7 | 158 | 263 | 155 | 147 | 157 | 148 | 170
EXPORTS | 1 | 9 | 4
IMPORTS | 1 | 9 | 6
EQ | 23 | 
   DQ<2> = ;Imported pterms FB10_7
	  RW & RESET & D<2>.PIN
	# RESET & FCS & D<2>.PIN
	# RESET & !LAN_ACCESS & D<2>.PIN
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<2>
	# RESET & UDS & LDS & DS1 & DS0 & D<2>.PIN
;Imported pterms FB10_8
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<2>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<2>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<2>;
   DQ<2>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;
    DQ_2_IOBUFE.EXP  =  !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<3>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<3>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<3>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<3>

MACROCELL | 9 | 4 | DQ_3_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 11 | RESET  | LAN_ACCESS  | D<3>.PIN  | FCS  | RW  | UDS  | LDS  | DS1  | DS0  | DQ_2_IOBUFE.EXP  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST
INPUTMC | 3 | 11 | 15 | 9 | 5 | 1 | 3
INPUTP | 8 | 263 | 28 | 147 | 158 | 155 | 157 | 148 | 170
IMPORTS | 1 | 9 | 5
EQ | 14 | 
   DQ<3> = RW & RESET & D<3>.PIN
	# RESET & FCS & D<3>.PIN
	# RESET & !LAN_ACCESS & D<3>.PIN
	# RESET & UDS & LDS & DS1 & DS0 & D<3>.PIN
;Imported pterms FB10_6
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<3>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<3>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<3>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<3>;
   DQ<3>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;

MACROCELL | 9 | 7 | DQ_5_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 9 | 6
INPUTS | 11 | RESET  | LAN_ACCESS  | D<5>.PIN  | RW  | LDS  | FCS  | DQ_DATA<2>  | DS1  | DS0  | EXP53_.EXP  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 15 | 16 | 9 | 8 | 1 | 3
INPUTP | 7 | 263 | 37 | 158 | 157 | 147 | 148 | 170
EXPORTS | 1 | 9 | 6
IMPORTS | 1 | 9 | 8
EQ | 21 | 
   DQ<5> = RESET & !LAN_ACCESS & D<5>.PIN
;Imported pterms FB10_9
	# RW & RESET & D<5>.PIN
	# RESET & FCS & D<5>.PIN
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<5>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<5>
	# RESET & UDS & LDS & DS1 & DS0 & D<5>.PIN
;Imported pterms FB10_10
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<5>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<5>;
   DQ<5>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;
    DQ_5_IOBUFE.EXP  =  !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<2>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<2>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<2>

MACROCELL | 9 | 11 | DQ_6_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 9 | 10
INPUTS | 11 | RW  | RESET  | UDS  | FCS  | LAN_ACCESS  | DQ_DATA<7>  | LDS  | DS1  | DS0  | EXP54_.EXP  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST
INPUTMC | 4 | 11 | 15 | 14 | 7 | 9 | 12 | 1 | 3
INPUTP | 7 | 158 | 263 | 155 | 147 | 157 | 148 | 170
EXPORTS | 1 | 9 | 10
IMPORTS | 1 | 9 | 12
EQ | 23 | 
   DQ<6> = ;Imported pterms FB10_13
	  RW & RESET & D<6>.PIN
	# RESET & FCS & D<6>.PIN
	# RESET & !LAN_ACCESS & D<6>.PIN
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<6>
	# RESET & UDS & LDS & DS1 & DS0 & D<6>.PIN
;Imported pterms FB10_14
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<6>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<6>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<6>;
   DQ<6>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;
    DQ_6_IOBUFE.EXP  =  !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<7>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<7>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<7>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<7>

MACROCELL | 9 | 10 | DQ_7_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 11 | RESET  | LAN_ACCESS  | D<7>.PIN  | FCS  | RW  | UDS  | LDS  | DS1  | DS0  | DQ_6_IOBUFE.EXP  | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST
INPUTMC | 3 | 11 | 15 | 9 | 11 | 1 | 3
INPUTP | 8 | 263 | 29 | 147 | 158 | 155 | 157 | 148 | 170
IMPORTS | 1 | 9 | 11
EQ | 14 | 
   DQ<7> = RW & RESET & D<7>.PIN
	# RESET & FCS & D<7>.PIN
	# RESET & !LAN_ACCESS & D<7>.PIN
	# RESET & UDS & LDS & DS1 & DS0 & D<7>.PIN
;Imported pterms FB10_12
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<7>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<7>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<7>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<7>;
   DQ<7>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;

MACROCELL | 14 | 3 | LAN_SM_FSM_FFd3
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 87 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 10 | 0 | 12 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5 | 10 | 17 | 15 | 15 | 12 | 15 | 7 | 0 | 12 | 17 | 7 | 11 | 12 | 11 | 14 | 11 | 15 | 14 | 12 | 9 | 7 | 13 | 12 | 6 | 7 | 8 | 14 | 7 | 10 | 15 | 14 | 9 | 12 | 4 | 14 | 12 | 14 | 15 | 7 | 10 | 12 | 16 | 14 | 6 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 12 | 7 | 14 | 7 | 15 | 7 | 16 | 7 | 17 | 10 | 13 | 10 | 14 | 10 | 16 | 11 | 4 | 12 | 0 | 12 | 1 | 12 | 5 | 12 | 8 | 12 | 10 | 12 | 12 | 12 | 13 | 12 | 14 | 14 | 0 | 14 | 1 | 14 | 2 | 14 | 5 | 14 | 8 | 14 | 10 | 15 | 0 | 15 | 16 | 15 | 17
INPUTS | 8 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1  | RW  | LAN_SM_FSM_FFd2  | LAN_SM_RST  | Z3_ADR<13>  | EXP79_.EXP
INPUTMC | 7 | 14 | 3 | 7 | 6 | 11 | 5 | 14 | 4 | 11 | 2 | 5 | 10 | 14 | 2
INPUTP | 1 | 158
EXPORTS | 1 | 14 | 4
IMPORTS | 1 | 14 | 2
EQ | 16 | 
   !LAN_SM_FSM_FFd3.D = !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd1
;Imported pterms FB15_3
	# LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
	# !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & Z3_ADR<13>
	# !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1;
   LAN_SM_FSM_FFd3.CLK = CLK_EXT;	// GCK
   LAN_SM_FSM_FFd3.AR = LAN_SM_RST;
    LAN_SM_FSM_FFd3.EXP  =  LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1
	# !RW & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2 & !Z3_ADR<13>
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 7 | 6 | LAN_SM_FSM_FFd4
ATTRIBUTES | 4358928 | 0
OUTPUTMC | 88 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 10 | 0 | 12 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5 | 10 | 17 | 15 | 15 | 12 | 15 | 7 | 0 | 12 | 17 | 7 | 11 | 12 | 11 | 14 | 17 | 15 | 16 | 12 | 10 | 7 | 13 | 12 | 6 | 7 | 8 | 14 | 7 | 10 | 15 | 14 | 9 | 12 | 4 | 14 | 12 | 14 | 15 | 7 | 10 | 12 | 16 | 14 | 6 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 12 | 7 | 14 | 7 | 15 | 7 | 16 | 7 | 17 | 10 | 13 | 10 | 14 | 10 | 16 | 11 | 4 | 12 | 0 | 12 | 1 | 12 | 5 | 12 | 8 | 12 | 9 | 12 | 12 | 12 | 13 | 12 | 14 | 14 | 0 | 14 | 1 | 14 | 2 | 14 | 5 | 14 | 8 | 14 | 10 | 14 | 11 | 15 | 0 | 15 | 14 | 15 | 17
INPUTS | 12 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | Z3_ADR<13>  | RW  | UDS  | LDS  | LAN_CS_RST  | RESET  | LAN_ACCESS  | LAN_SM_RST  | EXP45_.EXP
INPUTMC | 8 | 14 | 3 | 7 | 6 | 14 | 4 | 5 | 10 | 8 | 5 | 11 | 15 | 11 | 2 | 7 | 5
INPUTP | 4 | 158 | 155 | 157 | 263
EXPORTS | 1 | 7 | 7
IMPORTS | 1 | 7 | 5
EQ | 19 | 
   LAN_SM_FSM_FFd4.T = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2 & Z3_ADR<13>
	# !RW & UDS & LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2
;Imported pterms FB8_6
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
	# !DS1 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
	# !DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
	# RW & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2
	# RW & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2;
   LAN_SM_FSM_FFd4.CLK = CLK_EXT;	// GCK
   LAN_SM_FSM_FFd4.AR = LAN_SM_RST;
    LAN_SM_FSM_FFd4.EXP  =  Z3_ADR<13> & LAN_CS_RST
	# RESET & LAN_ACCESS & !Z3_ADR<13>
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 11 | 17 | DQ_SWAP
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 66 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 11 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 7 | 17 | 12 | 2 | 10 | 16 | 15 | 14 | 12 | 14 | 14 | 8 | 12 | 16 | 7 | 10 | 12 | 10 | 14 | 10 | 15 | 0 | 12 | 9 | 7 | 12 | 12 | 5 | 7 | 7 | 14 | 6 | 10 | 14 | 7 | 9 | 7 | 13 | 7 | 14 | 7 | 15 | 7 | 16 | 10 | 0 | 10 | 13 | 12 | 0 | 12 | 1 | 12 | 4 | 12 | 8 | 12 | 12 | 12 | 13 | 14 | 0 | 14 | 1 | 14 | 9 | 14 | 17 | 15 | 16 | 15 | 17
INPUTS | 7 | SHUT_UP_Z2<0>  | Z3  | A<14>.PIN  | EXP59_.EXP  | EXP67_.EXP  | FCS  | RESET
INPUTMC | 3 | 8 | 11 | 11 | 0 | 11 | 16
INPUTP | 4 | 151 | 125 | 147 | 263
IMPORTS | 2 | 11 | 0 | 11 | 16
EQ | 26 | 
   DQ_SWAP.D = !Z3
	# !A<14>.PIN
	# SHUT_UP_Z2<0>
;Imported pterms FB12_1
	# D<11>.PIN & !LAN_BASEADR<11>
	# !D<11>.PIN & LAN_BASEADR<11>
	# D<12>.PIN & !LAN_BASEADR<12>
	# !D<12>.PIN & LAN_BASEADR<12>
	# D<13>.PIN & !LAN_BASEADR<13>
;Imported pterms FB12_2
	# D<10>.PIN & !LAN_BASEADR<10>
	# !D<10>.PIN & LAN_BASEADR<10>
	# D<15>.PIN & !LAN_BASEADR<15>
	# !D<15>.PIN & LAN_BASEADR<15>
;Imported pterms FB12_17
	# !A<13>.PIN
	# D<8>.PIN & !LAN_BASEADR<8>
	# !D<8>.PIN & LAN_BASEADR<8>
	# D<9>.PIN & !LAN_BASEADR<9>
	# !D<9>.PIN & LAN_BASEADR<9>
;Imported pterms FB12_16
	# !D<13>.PIN & LAN_BASEADR<13>
	# D<14>.PIN & !LAN_BASEADR<14>
	# !D<14>.PIN & LAN_BASEADR<14>;
   DQ_SWAP.CLK = !FCS;
   DQ_SWAP.AP = !RESET;

MACROCELL | 14 | 4 | LAN_SM_FSM_FFd2
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 71 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 10 | 0 | 12 | 2 | 14 | 2 | 7 | 6 | 14 | 4 | 11 | 5 | 10 | 17 | 15 | 15 | 12 | 15 | 7 | 0 | 12 | 17 | 7 | 11 | 12 | 11 | 14 | 17 | 15 | 16 | 12 | 10 | 7 | 13 | 12 | 6 | 7 | 8 | 14 | 7 | 10 | 15 | 14 | 9 | 12 | 4 | 14 | 12 | 14 | 15 | 7 | 10 | 12 | 16 | 14 | 5 | 7 | 5 | 7 | 7 | 7 | 9 | 7 | 12 | 7 | 14 | 7 | 15 | 7 | 16 | 7 | 17 | 10 | 13 | 10 | 14 | 10 | 16 | 11 | 4 | 12 | 0 | 12 | 1 | 12 | 5 | 12 | 8 | 12 | 9 | 12 | 12 | 12 | 13 | 12 | 14 | 14 | 0 | 14 | 1 | 14 | 3 | 14 | 8 | 14 | 10 | 14 | 11 | 15 | 0 | 15 | 14 | 15 | 17
INPUTS | 8 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | UDS  | LDS  | LAN_SM_RST  | LAN_SM_FSM_FFd3.EXP
INPUTMC | 6 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5 | 11 | 2 | 14 | 3
INPUTP | 2 | 155 | 157
EXPORTS | 1 | 14 | 5
IMPORTS | 1 | 14 | 3
EQ | 13 | 
   LAN_SM_FSM_FFd2.D = LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4
	# LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2
;Imported pterms FB15_4
	# LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1
	# !RW & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2 & !Z3_ADR<13>;
   LAN_SM_FSM_FFd2.CLK = CLK_EXT;	// GCK
   LAN_SM_FSM_FFd2.AR = LAN_SM_RST;
    LAN_SM_FSM_FFd2.EXP  =  !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 11 | 5 | LAN_SM_FSM_FFd1
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 75 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 10 | 0 | 12 | 2 | 14 | 3 | 7 | 5 | 14 | 2 | 11 | 5 | 10 | 17 | 15 | 15 | 12 | 15 | 7 | 0 | 12 | 17 | 7 | 11 | 12 | 11 | 14 | 17 | 15 | 16 | 12 | 10 | 7 | 13 | 12 | 6 | 7 | 8 | 14 | 7 | 10 | 15 | 14 | 9 | 12 | 4 | 14 | 12 | 14 | 15 | 7 | 10 | 12 | 16 | 14 | 6 | 7 | 7 | 7 | 14 | 7 | 17 | 10 | 14 | 10 | 16 | 11 | 4 | 12 | 0 | 12 | 5 | 12 | 9 | 12 | 14 | 14 | 0 | 14 | 4 | 14 | 5 | 14 | 10 | 15 | 14 | 15 | 17 | 11 | 6
INPUTS | 13 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | RW  | RESET  | LAN_SM_RST  | DS1  | FCS  | LAN_ACCESS  | DQ_DATA<13>  | DS0  | DQ_15_IOBUFE.EXP
INPUTMC | 8 | 14 | 3 | 11 | 5 | 7 | 6 | 14 | 4 | 11 | 2 | 11 | 15 | 12 | 17 | 11 | 4
INPUTP | 5 | 158 | 263 | 148 | 147 | 170
EXPORTS | 1 | 11 | 6
IMPORTS | 1 | 11 | 4
EQ | 14 | 
   !LAN_SM_FSM_FFd1.D = !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
;Imported pterms FB12_5
	# !DS1 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1
	# !DS0 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1;
   LAN_SM_FSM_FFd1.CLK = CLK_EXT;	// GCK
   LAN_SM_FSM_FFd1.AR = LAN_SM_RST;
    LAN_SM_FSM_FFd1.EXP  =  !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<13>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<13>
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 4 | 5 | AUTOCONFIG_Z2_ACCESS
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 81 | 8 | 15 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 1 | 17 | 4 | 13 | 4 | 12 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 12 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 8 | 11 | 8 | 9 | 0 | 1 | 13 | 16 | 3 | 15 | 0 | 17 | 13 | 1 | 13 | 13 | 3 | 11 | 0 | 2 | 0 | 7 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 1 | 5 | 1 | 7 | 1 | 10 | 1 | 14 | 1 | 15 | 3 | 1 | 3 | 2 | 3 | 4 | 3 | 5 | 3 | 7 | 4 | 4 | 4 | 8 | 4 | 14 | 4 | 15 | 4 | 17 | 6 | 0 | 6 | 1 | 6 | 5 | 6 | 6 | 6 | 12 | 6 | 13 | 13 | 0 | 13 | 2
INPUTS | 14 | AUTO_CONFIG_Z2_DONE<0>  | A<23>.PIN  | A<22>.PIN  | A<21>.PIN  | A<19>.PIN  | CFIN  | A<17>.PIN  | A<16>.PIN  | A<20>.PIN  | A<18>.PIN  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | AS  | IDE_ACCESS/IDE_ACCESS_RSTF__$INT
INPUTMC | 4 | 13 | 12 | 13 | 11 | 8 | 17 | 4 | 17
INPUTP | 10 | 161 | 162 | 163 | 169 | 190 | 172 | 175 | 167 | 171 | 152
EQ | 11 | 
   AUTOCONFIG_Z2_ACCESS.D = !AUTO_CONFIG_Z2_DONE<0> & A<23>.PIN & A<22>.PIN & 
	A<21>.PIN & A<19>.PIN & !CFIN & !A<17>.PIN & !A<16>.PIN & 
	!A<20>.PIN & !A<18>.PIN
	# !AUTO_CONFIG_Z2_DONE<1> & A<23>.PIN & A<22>.PIN & 
	A<21>.PIN & A<19>.PIN & !CFIN & !A<17>.PIN & !A<16>.PIN & 
	!A<20>.PIN & !A<18>.PIN
	# !AUTO_CONFIG_Z2_DONE<2> & A<23>.PIN & A<22>.PIN & 
	A<21>.PIN & A<19>.PIN & !CFIN & !A<17>.PIN & !A<16>.PIN & 
	!A<20>.PIN & !A<18>.PIN;
   AUTOCONFIG_Z2_ACCESS.CLK = !AS;
   AUTOCONFIG_Z2_ACCESS.AR = !IDE_ACCESS/IDE_ACCESS_RSTF__$INT;

MACROCELL | 11 | 15 | LAN_ACCESS
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 90 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 9 | 15 | 11 | 8 | 9 | 1 | 7 | 4 | 1 | 0 | 11 | 10 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 7 | 9 | 9 | 9 | 10 | 5 | 17 | 11 | 2 | 7 | 6 | 13 | 13 | 13 | 2 | 4 | 1 | 1 | 3 | 3 | 2 | 0 | 3 | 0 | 6 | 1 | 1 | 1 | 4 | 1 | 10 | 1 | 12 | 1 | 15 | 1 | 17 | 4 | 4 | 4 | 10 | 4 | 12 | 4 | 15 | 4 | 17 | 6 | 1 | 6 | 3 | 6 | 5 | 6 | 12 | 7 | 0 | 7 | 3 | 9 | 0 | 9 | 5 | 9 | 6 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 11 | 3 | 11 | 5 | 11 | 6 | 11 | 9 | 11 | 16
INPUTS | 7 | D<13>.PIN  | LAN_BASEADR<13>  | D<14>.PIN  | LAN_BASEADR<14>  | EXP66_.EXP  | FCS  | RESET
INPUTMC | 3 | 6 | 14 | 6 | 10 | 11 | 14
INPUTP | 4 | 80 | 81 | 147 | 263
EXPORTS | 1 | 11 | 16
IMPORTS | 1 | 11 | 14
EQ | 27 | 
   !LAN_ACCESS.D = ;Imported pterms FB12_15
	  !Z3
	# SHUT_UP_Z2<0>
	# D<8>.PIN & !LAN_BASEADR<8>
	# !D<8>.PIN & LAN_BASEADR<8>
	# D<9>.PIN & !LAN_BASEADR<9>
;Imported pterms FB12_14
	# !D<9>.PIN & LAN_BASEADR<9>
	# D<11>.PIN & !LAN_BASEADR<11>
	# !D<11>.PIN & LAN_BASEADR<11>
	# D<12>.PIN & !LAN_BASEADR<12>
	# !D<12>.PIN & LAN_BASEADR<12>
;Imported pterms FB12_13
	# D<10>.PIN & !LAN_BASEADR<10>
	# D<13>.PIN & !LAN_BASEADR<13>
	# !D<13>.PIN & LAN_BASEADR<13>
	# D<14>.PIN & !LAN_BASEADR<14>
	# !D<14>.PIN & LAN_BASEADR<14>
;Imported pterms FB12_12
	# !D<10>.PIN & LAN_BASEADR<10>
	# D<15>.PIN & !LAN_BASEADR<15>
	# !D<15>.PIN & LAN_BASEADR<15>;
   LAN_ACCESS.CLK = !FCS;
   LAN_ACCESS.AR = !RESET;
    LAN_ACCESS.EXP  =  !D<13>.PIN & LAN_BASEADR<13>
	# D<14>.PIN & !LAN_BASEADR<14>
	# !D<14>.PIN & LAN_BASEADR<14>

MACROCELL | 8 | 1 | LAN_RST_SM_FSM_FFd1
ATTRIBUTES | 4358928 | 0
OUTPUTMC | 6 | 8 | 1 | 8 | 8 | 8 | 7 | 8 | 4 | 8 | 3 | 8 | 6
INPUTS | 4 | LAN_RST_SM_FSM_FFd1  | LAN_RST_SM_FSM_FFd2  | LAN_RST_SM_FSM_FFd3  | RESET
INPUTMC | 3 | 8 | 1 | 8 | 8 | 8 | 7
INPUTP | 1 | 263
EQ | 4 | 
   LAN_RST_SM_FSM_FFd1.T = !LAN_RST_SM_FSM_FFd1 & LAN_RST_SM_FSM_FFd2 & 
	!LAN_RST_SM_FSM_FFd3;
   LAN_RST_SM_FSM_FFd1.CLK = CLK_EXT;	// GCK
   LAN_RST_SM_FSM_FFd1.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 5 | 10 | Z3_ADR<13>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 4 | 14 | 2 | 7 | 6 | 14 | 3 | 14 | 12
INPUTS | 3 | A<15>.PIN  | FCS  | RESET
INPUTP | 3 | 139 | 147 | 263
EQ | 3 | 
   Z3_ADR<13>.D = A<15>.PIN;
   Z3_ADR<13>.CLK = !FCS;
   Z3_ADR<13>.AP = !RESET;

MACROCELL | 8 | 8 | LAN_RST_SM_FSM_FFd2
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 5 | 8 | 1 | 8 | 8 | 8 | 7 | 8 | 0 | 8 | 5
INPUTS | 4 | LAN_RST_SM_FSM_FFd1  | LAN_RST_SM_FSM_FFd3  | LAN_RST_SM_FSM_FFd2  | RESET
INPUTMC | 3 | 8 | 1 | 8 | 7 | 8 | 8
INPUTP | 1 | 263
EQ | 4 | 
   LAN_RST_SM_FSM_FFd2.D = !LAN_RST_SM_FSM_FFd1 & LAN_RST_SM_FSM_FFd3
	# LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3;
   LAN_RST_SM_FSM_FFd2.CLK = CLK_EXT;	// GCK
   LAN_RST_SM_FSM_FFd2.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 8 | 7 | LAN_RST_SM_FSM_FFd3
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 4 | 8 | 1 | 8 | 8 | 8 | 0 | 8 | 5
INPUTS | 3 | LAN_RST_SM_FSM_FFd1  | LAN_RST_SM_FSM_FFd2  | RESET
INPUTMC | 2 | 8 | 1 | 8 | 8
INPUTP | 1 | 263
EQ | 4 | 
   !LAN_RST_SM_FSM_FFd3.D = LAN_RST_SM_FSM_FFd1
	$ LAN_RST_SM_FSM_FFd2;
   LAN_RST_SM_FSM_FFd3.CLK = CLK_EXT;	// GCK
   LAN_RST_SM_FSM_FFd3.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 5 | 17 | IDE_ACCESS
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 5 | 13 | 7 | 13 | 6 | 13 | 5 | 13 | 4 | 13 | 13
INPUTS | 8 | LAN_ACCESS  | SHUT_UP_Z2<2>  | IDE_BASEADR<0>  | A<16>.PIN  | EXP39_.EXP  | EXP40_.EXP  | AS  | IDE_ACCESS/IDE_ACCESS_RSTF__$INT
INPUTMC | 6 | 11 | 15 | 0 | 1 | 1 | 6 | 5 | 0 | 5 | 16 | 4 | 17
INPUTP | 2 | 175 | 152
IMPORTS | 2 | 5 | 0 | 5 | 16
EQ | 24 | 
   !IDE_ACCESS.D = LAN_ACCESS
	# SHUT_UP_Z2<2>
	# !IDE_BASEADR<0> & A<16>.PIN
;Imported pterms FB6_1
	# IDE_BASEADR<4> & !A<20>.PIN
	# !IDE_BASEADR<4> & A<20>.PIN
	# IDE_BASEADR<5> & !A<21>.PIN
	# !IDE_BASEADR<5> & A<21>.PIN
	# !IDE_BASEADR<7> & A<23>.PIN
;Imported pterms FB6_2
	# IDE_BASEADR<3> & !A<19>.PIN
	# !IDE_BASEADR<3> & A<19>.PIN
	# IDE_BASEADR<6> & !A<22>.PIN
	# !IDE_BASEADR<6> & A<22>.PIN
;Imported pterms FB6_17
	# IDE_BASEADR<0> & !A<16>.PIN
	# IDE_BASEADR<1> & !A<17>.PIN
	# !IDE_BASEADR<1> & A<17>.PIN
	# IDE_BASEADR<2> & !A<18>.PIN
	# !IDE_BASEADR<2> & A<18>.PIN
;Imported pterms FB6_16
	# IDE_BASEADR<7> & !A<23>.PIN;
   IDE_ACCESS.CLK = !AS;
   IDE_ACCESS.AR = !IDE_ACCESS/IDE_ACCESS_RSTF__$INT;

MACROCELL | 8 | 4 | LAN_D_INIT<1>
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 3 | 9 | 1 | 9 | 0 | 11 | 11
INPUTS | 2 | LAN_RST_SM_FSM_FFd1  | RESET
INPUTMC | 1 | 8 | 1
INPUTP | 1 | 263
EQ | 3 | 
   LAN_D_INIT<1>.D = LAN_RST_SM_FSM_FFd1;
   LAN_D_INIT<1>.CLK = CLK_EXT;	// GCK
   LAN_D_INIT<1>.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 8 | 3 | LAN_D_INIT<8>
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 3 | 9 | 16 | 11 | 9 | 1 | 0
INPUTS | 2 | LAN_RST_SM_FSM_FFd1  | RESET
INPUTMC | 1 | 8 | 1
INPUTP | 1 | 263
EQ | 3 | 
   LAN_D_INIT<8>.D = !LAN_RST_SM_FSM_FFd1;
   LAN_D_INIT<8>.CLK = CLK_EXT;	// GCK
   LAN_D_INIT<8>.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 13 | 7 | IDE_ENABLE
ATTRIBUTES | 8520672 | 0
OUTPUTMC | 2 | 13 | 6 | 13 | 4
INPUTS | 5 | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET  | RW  | AS  | IDE_ACCESS
INPUTMC | 2 | 2 | 10 | 5 | 17
INPUTP | 3 | 263 | 158 | 152
EQ | 4 | 
   IDE_ENABLE.D = Gnd;
   IDE_ENABLE.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   IDE_ENABLE.AP = !RESET;
   IDE_ENABLE.CE = !RW & !AS & IDE_ACCESS;

MACROCELL | 10 | 17 | DQ_DATA<0>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 10 | 17 | 9 | 3
INPUTS | 8 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<0>  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd3  | Z3_DATA<30>.EXP  | CP_WE_OBUF.EXP  | LAN_SM_RST
INPUTMC | 8 | 7 | 6 | 14 | 4 | 10 | 17 | 11 | 5 | 14 | 3 | 10 | 0 | 10 | 16 | 11 | 2
IMPORTS | 2 | 10 | 0 | 10 | 16
EQ | 24 | 
   DQ_DATA<0>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<0>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<0>
	# LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<0>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<0>
;Imported pterms FB11_1
	# D<8>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & A<16>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<8>.PIN
;Imported pterms FB11_17
	# A<16>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<8>.PIN
	# D<8>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<0>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<0>.PIN;
   DQ_DATA<0>.CLK = CLK_EXT;	// GCK
   DQ_DATA<0>.AP = LAN_SM_RST;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 15 | DQ_DATA<10>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 9 | 15 | 15 | 15 | 9 | 14
INPUTS | 8 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<10>  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd3  | EXP84_.EXP  | DQ_DATA<2>.EXP  | LAN_SM_RST
INPUTMC | 8 | 7 | 6 | 14 | 4 | 15 | 15 | 11 | 5 | 14 | 3 | 15 | 14 | 15 | 16 | 11 | 2
IMPORTS | 2 | 15 | 14 | 15 | 16
EQ | 25 | 
   DQ_DATA<10>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<10>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<10>
	# LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<10>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<10>
;Imported pterms FB16_15
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<10>.PIN
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<18>.PIN
	# D<10>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<10>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<2>.PIN
;Imported pterms FB16_14
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<18>.PIN
;Imported pterms FB16_17
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<2>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<10>.PIN;
   DQ_DATA<10>.CLK = CLK_EXT;	// GCK
   DQ_DATA<10>.AP = LAN_SM_RST;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 15 | DQ_DATA<11>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 11 | 8 | 12 | 15 | 11 | 7
INPUTS | 8 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<11>  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd3  | EXP73_.EXP  | LAN_WRL_S.EXP  | LAN_SM_RST
INPUTMC | 8 | 7 | 6 | 14 | 4 | 12 | 15 | 11 | 5 | 14 | 3 | 12 | 14 | 12 | 16 | 11 | 2
IMPORTS | 2 | 12 | 14 | 12 | 16
EQ | 24 | 
   DQ_DATA<11>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<11>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<11>
	# LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<11>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<11>
;Imported pterms FB13_15
	# A<19>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<11>.PIN
	# D<11>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<11>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<3>.PIN
;Imported pterms FB13_17
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<3>.PIN
	# UDS & LDS & A<19>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<11>.PIN;
   DQ_DATA<11>.CLK = CLK_EXT;	// GCK
   DQ_DATA<11>.AP = LAN_SM_RST;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 7 | 0 | DQ_DATA<12>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 4 | 7 | 0 | 7 | 2 | 7 | 17 | 7 | 1
INPUTS | 12 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<12>  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd3  | RW  | RESET  | UDS  | FCS  | LAN_ACCESS  | EXP50_.EXP  | LAN_SM_RST
INPUTMC | 8 | 7 | 6 | 14 | 4 | 7 | 0 | 11 | 5 | 14 | 3 | 11 | 15 | 7 | 17 | 11 | 2
INPUTP | 4 | 158 | 263 | 155 | 147
EXPORTS | 1 | 7 | 1
IMPORTS | 1 | 7 | 17
EQ | 26 | 
   DQ_DATA<12>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<12>
	# LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<12>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<12>
;Imported pterms FB8_18
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<12>
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<12>.PIN
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<20>.PIN
	# D<12>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<12>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
;Imported pterms FB8_17
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<4>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<4>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<12>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<20>.PIN;
   DQ_DATA<12>.CLK = CLK_EXT;	// GCK
   DQ_DATA<12>.AP = LAN_SM_RST;
    DQ_DATA<12>.EXP  =  !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<12>
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 17 | DQ_DATA<13>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 5 | 11 | 6 | 12 | 17 | 11 | 5 | 12 | 0 | 12 | 16
INPUTS | 8 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<13>  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd3  | UDS  | EXP68_.EXP  | LAN_SM_RST
INPUTMC | 7 | 7 | 6 | 14 | 4 | 12 | 17 | 11 | 5 | 14 | 3 | 12 | 0 | 11 | 2
INPUTP | 1 | 155
EXPORTS | 1 | 12 | 16
IMPORTS | 1 | 12 | 0
EQ | 26 | 
   DQ_DATA<13>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<13>
	# LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<13>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<13>
;Imported pterms FB13_1
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<13>
	# A<21>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & A<13>.PIN & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# D<13>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<13>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
;Imported pterms FB13_2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<5>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<5>.PIN
	# UDS & LDS & A<21>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	A<13>.PIN & DQ_SWAP & !LAN_SM_FSM_FFd2;
   DQ_DATA<13>.CLK = CLK_EXT;	// GCK
   DQ_DATA<13>.AP = LAN_SM_RST;
    DQ_DATA<13>.EXP  =  !UDS & LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 7 | 11 | DQ_DATA<14>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 7 | 11 | 7 | 3 | 7 | 4
INPUTS | 8 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<14>  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd3  | LAN_WRH_S.EXP  | EXP46_.EXP  | LAN_SM_RST
INPUTMC | 8 | 7 | 6 | 14 | 4 | 7 | 11 | 11 | 5 | 14 | 3 | 7 | 10 | 7 | 12 | 11 | 2
IMPORTS | 2 | 7 | 10 | 7 | 12
EQ | 25 | 
   DQ_DATA<14>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<14>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<14>
	# LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<14>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<14>
;Imported pterms FB8_11
	# A<22>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & A<14>.PIN & 
	DQ_SWAP & LAN_SM_FSM_FFd1
;Imported pterms FB8_13
	# D<14>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<14>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<6>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<6>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	A<14>.PIN & DQ_SWAP & !LAN_SM_FSM_FFd2
;Imported pterms FB8_14
	# UDS & LDS & A<22>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2;
   DQ_DATA<14>.CLK = CLK_EXT;	// GCK
   DQ_DATA<14>.AP = LAN_SM_RST;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 11 | DQ_DATA<15>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 11 | 3 | 12 | 11 | 11 | 2
INPUTS | 8 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_DATA<15>  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd2  | DQ_DATA<3>.EXP  | EXP72_.EXP  | LAN_SM_RST
INPUTMC | 8 | 14 | 3 | 7 | 6 | 12 | 11 | 11 | 5 | 14 | 4 | 12 | 10 | 12 | 12 | 11 | 2
IMPORTS | 2 | 12 | 10 | 12 | 12
EQ | 25 | 
   DQ_DATA<15>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd2 & DQ_DATA<15>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_DATA<15>
	# !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1 & DQ_DATA<15>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<15>
;Imported pterms FB13_11
	# A<23>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<15>.PIN
;Imported pterms FB13_13
	# D<15>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<15>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<7>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<7>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<15>.PIN
;Imported pterms FB13_14
	# UDS & LDS & A<23>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2;
   DQ_DATA<15>.CLK = CLK_EXT;	// GCK
   DQ_DATA<15>.AP = LAN_SM_RST;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 17 | DQ_DATA<1>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 5 | 9 | 0 | 14 | 17 | 9 | 2 | 14 | 0 | 14 | 16
INPUTS | 9 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<1>  | LAN_SM_FSM_FFd1  | DQ_SWAP  | DQ<5>.PIN  | DQ<13>.PIN  | EXP77_.EXP  | LAN_SM_RST
INPUTMC | 7 | 7 | 6 | 14 | 4 | 14 | 17 | 11 | 5 | 11 | 17 | 14 | 0 | 11 | 2
INPUTP | 2 | 221 | 204
EXPORTS | 1 | 14 | 16
IMPORTS | 1 | 14 | 0
EQ | 26 | 
   DQ_DATA<1>.D = LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<1>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<1>
;Imported pterms FB15_1
	# LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<1>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<1>
	# A<17>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<9>.PIN
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<1>.PIN
;Imported pterms FB15_2
	# D<9>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<9>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<1>.PIN
	# UDS & LDS & A<17>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<9>.PIN;
   DQ_DATA<1>.CLK = CLK_EXT;	// GCK
   DQ_DATA<1>.AP = LAN_SM_RST;
    DQ_DATA<1>.EXP  =  DQ_SWAP & DQ<5>.PIN
	# !DQ_SWAP & DQ<13>.PIN
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 16 | DQ_DATA<2>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 5 | 15 | 16 | 9 | 6 | 9 | 7 | 15 | 17 | 15 | 15
INPUTS | 12 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<2>  | LAN_SM_FSM_FFd1  | LDS  | LAN_SM_FSM_FFd3  | DQ_SWAP  | D<2>.PIN  | UDS  | A<10>.PIN  | EXP85_.EXP  | LAN_SM_RST
INPUTMC | 8 | 7 | 6 | 14 | 4 | 15 | 16 | 11 | 5 | 14 | 3 | 11 | 17 | 15 | 17 | 11 | 2
INPUTP | 4 | 157 | 71 | 155 | 112
EXPORTS | 1 | 15 | 15
IMPORTS | 1 | 15 | 17
EQ | 28 | 
   DQ_DATA<2>.D = LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<2>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<2>
;Imported pterms FB16_18
	# LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<2>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<2>
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<18>.PIN
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<10>.PIN
	# D<10>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
;Imported pterms FB16_1
	# D<10>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<2>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<2>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<18>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<10>.PIN;
   DQ_DATA<2>.CLK = CLK_EXT;	// GCK
   DQ_DATA<2>.AP = LAN_SM_RST;
    DQ_DATA<2>.EXP  =  !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<2>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<10>.PIN
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 10 | DQ_DATA<3>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 4 | 12 | 10 | 9 | 5 | 12 | 9 | 12 | 11
INPUTS | 10 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<3>  | LAN_SM_FSM_FFd1  | A<23>.PIN  | LAN_SM_FSM_FFd3  | DQ_SWAP  | A<15>.PIN  | EXP71_.EXP  | LAN_SM_RST
INPUTMC | 8 | 7 | 6 | 14 | 4 | 12 | 10 | 11 | 5 | 14 | 3 | 11 | 17 | 12 | 9 | 11 | 2
INPUTP | 2 | 161 | 139
EXPORTS | 1 | 12 | 11
IMPORTS | 1 | 12 | 9
EQ | 28 | 
   DQ_DATA<3>.D = LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<3>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<3>
;Imported pterms FB13_10
	# LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<3>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<3>
	# A<19>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<11>.PIN
	# D<11>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
;Imported pterms FB13_9
	# D<11>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<3>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<3>.PIN
	# UDS & LDS & A<19>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<11>.PIN;
   DQ_DATA<3>.CLK = CLK_EXT;	// GCK
   DQ_DATA<3>.AP = LAN_SM_RST;
    DQ_DATA<3>.EXP  =  A<23>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<15>.PIN
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 7 | 13 | DQ_DATA<4>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 5 | 7 | 14 | 7 | 13 | 9 | 16 | 9 | 17 | 7 | 12
INPUTS | 11 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<4>  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd3  | UDS  | LDS  | A<22>.PIN  | DQ_SWAP  | EXP47_.EXP  | LAN_SM_RST
INPUTMC | 8 | 7 | 6 | 14 | 4 | 7 | 13 | 11 | 5 | 14 | 3 | 11 | 17 | 7 | 14 | 11 | 2
INPUTP | 3 | 155 | 157 | 162
EXPORTS | 1 | 7 | 12
IMPORTS | 1 | 7 | 14
EQ | 26 | 
   DQ_DATA<4>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<4>
	# LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<4>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<4>
;Imported pterms FB8_15
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<4>
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<20>.PIN
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<12>.PIN
	# D<12>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<12>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
;Imported pterms FB8_16
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<4>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<4>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<20>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<12>.PIN;
   DQ_DATA<4>.CLK = CLK_EXT;	// GCK
   DQ_DATA<4>.AP = LAN_SM_RST;
    DQ_DATA<4>.EXP  =  UDS & LDS & A<22>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 6 | DQ_DATA<5>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 12 | 6 | 9 | 8 | 9 | 9
INPUTS | 7 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<5>  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd3  | EXP69_.EXP  | LAN_SM_RST
INPUTMC | 7 | 7 | 6 | 14 | 4 | 12 | 6 | 11 | 5 | 14 | 3 | 12 | 5 | 11 | 2
IMPORTS | 1 | 12 | 5
EQ | 24 | 
   DQ_DATA<5>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<5>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<5>
	# LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<5>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<5>
;Imported pterms FB13_6
	# A<21>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & A<13>.PIN & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# D<13>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<13>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<5>.PIN
;Imported pterms FB13_5
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<5>.PIN
	# UDS & LDS & A<21>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	A<13>.PIN & !DQ_SWAP & !LAN_SM_FSM_FFd2;
   DQ_DATA<5>.CLK = CLK_EXT;	// GCK
   DQ_DATA<5>.AP = LAN_SM_RST;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 7 | 8 | DQ_DATA<6>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 7 | 8 | 9 | 12 | 9 | 13
INPUTS | 8 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<6>  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd3  | LAN_CS_OBUF.EXP  | LAN_RD_OBUF.EXP  | LAN_SM_RST
INPUTMC | 8 | 7 | 6 | 14 | 4 | 7 | 8 | 11 | 5 | 14 | 3 | 7 | 7 | 7 | 9 | 11 | 2
IMPORTS | 2 | 7 | 7 | 7 | 9
EQ | 24 | 
   DQ_DATA<6>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<6>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<6>
	# LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<6>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<6>
;Imported pterms FB8_8
	# A<22>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & A<14>.PIN & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# D<14>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<14>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
;Imported pterms FB8_10
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<6>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<6>.PIN
	# UDS & LDS & A<22>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	A<14>.PIN & !DQ_SWAP & !LAN_SM_FSM_FFd2;
   DQ_DATA<6>.CLK = CLK_EXT;	// GCK
   DQ_DATA<6>.AP = LAN_SM_RST;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 7 | DQ_DATA<7>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 14 | 7 | 9 | 11
INPUTS | 8 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<7>  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd3  | Z3_A_LOW.EXP  | EXP81_.EXP  | LAN_SM_RST
INPUTMC | 8 | 7 | 6 | 14 | 4 | 14 | 7 | 11 | 5 | 14 | 3 | 14 | 6 | 14 | 8 | 11 | 2
IMPORTS | 2 | 14 | 6 | 14 | 8
EQ | 25 | 
   DQ_DATA<7>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<7>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<7>
	# LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<7>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<7>
;Imported pterms FB15_7
	# A<23>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<15>.PIN
;Imported pterms FB15_9
	# D<15>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<15>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<7>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<7>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<15>.PIN
;Imported pterms FB15_10
	# UDS & LDS & A<23>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2;
   DQ_DATA<7>.CLK = CLK_EXT;	// GCK
   DQ_DATA<7>.AP = LAN_SM_RST;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 15 | DQ_DATA<8>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 4 | 10 | 15 | 1 | 1 | 10 | 14 | 10 | 16
INPUTS | 10 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<8>  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd3  | AS  | CP_WE_S  | CP_WE_QUIRK  | EXP58_.EXP  | LAN_SM_RST
INPUTMC | 9 | 7 | 6 | 14 | 4 | 10 | 15 | 11 | 5 | 14 | 3 | 13 | 8 | 2 | 11 | 10 | 14 | 11 | 2
INPUTP | 1 | 152
EXPORTS | 1 | 10 | 16
IMPORTS | 1 | 10 | 14
EQ | 25 | 
   DQ_DATA<8>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<8>
	# LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<8>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<8>
;Imported pterms FB11_15
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<8>
	# A<16>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<8>.PIN
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<0>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<0>.PIN
;Imported pterms FB11_14
	# D<8>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<8>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & A<16>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<8>.PIN;
   DQ_DATA<8>.CLK = CLK_EXT;	// GCK
   DQ_DATA<8>.AP = LAN_SM_RST;
    DQ_DATA<8>.EXP  =  !AS & !CP_WE_S & CP_WE_QUIRK
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 9 | DQ_DATA<9>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 5 | 11 | 10 | 14 | 9 | 11 | 9 | 14 | 10 | 14 | 8
INPUTS | 11 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | DQ_DATA<9>  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd3  | UDS  | LDS  | A<23>.PIN  | DQ_SWAP  | EXP82_.EXP  | LAN_SM_RST
INPUTMC | 8 | 7 | 6 | 14 | 4 | 14 | 9 | 11 | 5 | 14 | 3 | 11 | 17 | 14 | 10 | 11 | 2
INPUTP | 3 | 155 | 157 | 161
EXPORTS | 1 | 14 | 8
IMPORTS | 1 | 14 | 10
EQ | 26 | 
   DQ_DATA<9>.D = LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<9>
	# LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & DQ_DATA<9>
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & DQ_DATA<9>
;Imported pterms FB15_11
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<9>
	# A<17>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<9>.PIN
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<1>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<1>.PIN
;Imported pterms FB15_12
	# D<9>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<9>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & A<17>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<9>.PIN;
   DQ_DATA<9>.CLK = CLK_EXT;	// GCK
   DQ_DATA<9>.AP = LAN_SM_RST;
    DQ_DATA<9>.EXP  =  UDS & LDS & A<23>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 8 | 0 | LAN_WR_RST
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 2 | 7 | 4 | 12 | 13
INPUTS | 3 | LAN_RST_SM_FSM_FFd2  | LAN_RST_SM_FSM_FFd3  | RESET
INPUTMC | 2 | 8 | 8 | 8 | 7
INPUTP | 1 | 263
EQ | 3 | 
   LAN_WR_RST.D = LAN_RST_SM_FSM_FFd2 & LAN_RST_SM_FSM_FFd3;
   LAN_WR_RST.CLK = CLK_EXT;	// GCK
   LAN_WR_RST.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 8 | 11 | SHUT_UP_Z2<0>
ATTRIBUTES | 4326308 | 0
OUTPUTMC | 3 | 11 | 17 | 11 | 14 | 8 | 11
INPUTS | 15 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | SHUT_UP_Z2<0>  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET
INPUTMC | 4 | 13 | 12 | 4 | 5 | 8 | 11 | 2 | 10
INPUTP | 11 | 158 | 152 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
EQ | 8 | 
   SHUT_UP_Z2<0>.T = !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !UDS & A<2> & 
	!A<5> & !A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & 
	SHUT_UP_Z2<0> & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !LDS & A<2> & 
	!A<5> & !A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & 
	SHUT_UP_Z2<0> & A<6> & !A<3>;
   SHUT_UP_Z2<0>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   SHUT_UP_Z2<0>.AP = !RESET;

MACROCELL | 8 | 9 | SHUT_UP_Z2<1>
ATTRIBUTES | 4326308 | 0
OUTPUTMC | 2 | 8 | 9 | 4 | 1
INPUTS | 16 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | SHUT_UP_Z2<1>  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET
INPUTMC | 5 | 13 | 12 | 13 | 11 | 4 | 5 | 8 | 9 | 2 | 10
INPUTP | 11 | 158 | 152 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
EQ | 8 | 
   SHUT_UP_Z2<1>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<1> & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<1> & A<6> & A<3>;
   SHUT_UP_Z2<1>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   SHUT_UP_Z2<1>.AP = !RESET;

MACROCELL | 0 | 1 | SHUT_UP_Z2<2>
ATTRIBUTES | 4326308 | 0
OUTPUTMC | 3 | 5 | 17 | 0 | 1 | 0 | 0
INPUTS | 17 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | SHUT_UP_Z2<2>  | A<6>  | A<3>  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET
INPUTMC | 6 | 13 | 12 | 13 | 11 | 8 | 17 | 4 | 5 | 0 | 1 | 2 | 10
INPUTP | 11 | 158 | 152 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157 | 263
EXPORTS | 1 | 0 | 0
EQ | 12 | 
   SHUT_UP_Z2<2>.T = !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<2> & 
	A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & SHUT_UP_Z2<2> & 
	A<6> & A<3>;
   SHUT_UP_Z2<2>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   SHUT_UP_Z2<2>.AP = !RESET;
    SHUT_UP_Z2<2>.EXP  =  !AUTO_CONFIG_Z2_DONE<0> & A<2> & !A<5> & !A<4> & 
	A<1>

MACROCELL | 13 | 16 | D_Z2_OUT<0>
ATTRIBUTES | 8520612 | 0
OUTPUTMC | 1 | 4 | 17
INPUTS | 7 | AUTOCONFIG_Z2_ACCESS  | A<6>  | AS  | EXP75_.EXP  | EXP76_.EXP  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET
INPUTMC | 4 | 4 | 5 | 13 | 15 | 13 | 17 | 2 | 10
INPUTP | 3 | 98 | 152 | 263
IMPORTS | 2 | 13 | 15 | 13 | 17
EQ | 18 | 
   D_Z2_OUT<0>.D = AS
	# !AUTOCONFIG_Z2_ACCESS
	# A<6>
;Imported pterms FB14_16
	# UDS & LDS
	# !A<2> & A<5>
	# A<5> & A<4>
	# A<2> & !A<1> & A<3>
	# !A<2> & !A<4> & A<1>
;Imported pterms FB14_18
	# !A<2> & A<4> & !A<3>
	# A<4> & A<1> & !A<3>
	# AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & 
	!A<5> & !A<3>
	# AUTO_CONFIG_Z2_DONE<0> & !A<5> & !A<4> & A<1>
	# A<2> & !A<5> & !A<4> & A<3>;
   D_Z2_OUT<0>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   D_Z2_OUT<0>.AP = !RESET;

MACROCELL | 3 | 15 | D_Z2_OUT<1>
ATTRIBUTES | 8520612 | 0
OUTPUTMC | 1 | 6 | 1
INPUTS | 7 | A<6>  | AS  | AUTOCONFIG_Z2_ACCESS  | EXP31_.EXP  | EXP32_.EXP  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET
INPUTMC | 4 | 4 | 5 | 3 | 14 | 3 | 16 | 2 | 10
INPUTP | 3 | 98 | 152 | 263
IMPORTS | 2 | 3 | 14 | 3 | 16
EQ | 25 | 
   D_Z2_OUT<1>.D = AS
	# !AUTOCONFIG_Z2_ACCESS
	# A<6>
;Imported pterms FB4_15
	# UDS & LDS
	# !A<2> & A<5>
	# A<5> & A<4>
	# A<5> & A<1>
	# !A<4> & !A<1> & A<3>
;Imported pterms FB4_14
	# !A<2> & A<4> & !A<1> & !A<3>
	# AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & 
	!A<2> & A<4> & A<1>
	# AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & 
	A<2> & !A<4> & A<1>
	# AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & 
	A<2> & !A<5> & !A<4> & !A<1>
;Imported pterms FB4_17
	# A<2> & !A<4> & A<3>
	# !AUTO_CONFIG_Z2_DONE<0> & A<4> & !A<1> & !A<3>
	# !AUTO_CONFIG_Z2_DONE<1> & A<4> & !A<1> & !A<3>
	# A<2> & A<4> & A<1> & !A<3>
	# !A<2> & A<4> & A<1> & A<3>;
   D_Z2_OUT<1>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   D_Z2_OUT<1>.AP = !RESET;

MACROCELL | 0 | 17 | D_Z2_OUT<2>
ATTRIBUTES | 8520612 | 0
OUTPUTMC | 1 | 6 | 5
INPUTS | 7 | AUTOCONFIG_Z2_ACCESS  | A<6>  | AS  | EXP24_.EXP  | IDE_R_OBUF.EXP  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET
INPUTMC | 4 | 4 | 5 | 0 | 0 | 0 | 16 | 2 | 10
INPUTP | 3 | 98 | 152 | 263
IMPORTS | 2 | 0 | 0 | 0 | 16
EQ | 21 | 
   D_Z2_OUT<2>.D = AS
	# !AUTOCONFIG_Z2_ACCESS
	# A<6>
;Imported pterms FB1_1
	# UDS & LDS
	# A<5> & !A<1>
	# AUTO_CONFIG_Z2_DONE<0> & !A<2> & !A<1>
	# A<4> & !A<1> & !A<3>
	# AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & 
	!A<4> & !A<1>
;Imported pterms FB1_2
	# !AUTO_CONFIG_Z2_DONE<0> & A<2> & !A<5> & !A<4> & 
	A<1>
;Imported pterms FB1_17
	# !A<2> & A<5>
	# !A<2> & A<4>
	# A<5> & A<4>
	# !A<4> & A<3>
	# A<1> & A<3>;
   D_Z2_OUT<2>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   D_Z2_OUT<2>.AP = !RESET;

MACROCELL | 13 | 1 | D_Z2_OUT<3>
ATTRIBUTES | 8520612 | 0
OUTPUTMC | 1 | 6 | 12
INPUTS | 14 | AS  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | LDS  | A<3>  | EXP74_.EXP  | ROM_B_0_OBUF$BUF2.EXP  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET
INPUTMC | 4 | 4 | 5 | 13 | 0 | 13 | 2 | 2 | 10
INPUTP | 10 | 152 | 155 | 101 | 91 | 97 | 107 | 98 | 157 | 99 | 263
IMPORTS | 2 | 13 | 0 | 13 | 2
EQ | 28 | 
   !D_Z2_OUT<3>.D = !AS & !UDS & A<2> & !A<5> & A<4> & A<1> & 
	AUTOCONFIG_Z2_ACCESS & !A<6>
	# !AS & !UDS & !A<2> & !A<5> & A<1> & 
	AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
	# !AS & !LDS & A<2> & !A<5> & A<4> & A<1> & 
	AUTOCONFIG_Z2_ACCESS & !A<6>
;Imported pterms FB14_1
	# !AS & !AUTO_CONFIG_Z2_DONE<0> & !UDS & !A<5> & 
	A<1> & AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
	# !AS & !AUTO_CONFIG_Z2_DONE<0> & !LDS & !A<5> & 
	A<1> & AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
	# !AS & !AUTO_CONFIG_Z2_DONE<1> & !UDS & !A<5> & 
	A<1> & AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
	# !AS & !AUTO_CONFIG_Z2_DONE<1> & !LDS & !A<5> & 
	A<1> & AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
	# !AS & !LDS & !A<2> & !A<5> & A<1> & 
	AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
;Imported pterms FB14_3
	# !AS & !UDS & A<2> & A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
	# !AS & !UDS & !A<2> & !A<5> & A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & !A<6> & A<3>
	# !AS & !LDS & A<2> & A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
	# !AS & !LDS & !A<2> & !A<5> & A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & !A<6> & A<3>;
   D_Z2_OUT<3>.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   D_Z2_OUT<3>.AP = !RESET;

MACROCELL | 13 | 6 | IDE_R_S
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 0 | 15
INPUTS | 6 | RW  | AS  | IDE_ACCESS  | IDE_ENABLE  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET
INPUTMC | 3 | 5 | 17 | 13 | 7 | 2 | 10
INPUTP | 3 | 158 | 152 | 263
EQ | 3 | 
   !IDE_R_S.D = RW & !AS & IDE_ACCESS & !IDE_ENABLE;
   IDE_R_S.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   IDE_R_S.AP = !RESET;

MACROCELL | 13 | 5 | IDE_W_S
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 2 | 1
INPUTS | 5 | RW  | AS  | IDE_ACCESS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET
INPUTMC | 2 | 5 | 17 | 2 | 10
INPUTP | 3 | 158 | 152 | 263
EQ | 3 | 
   !IDE_W_S.D = !RW & !AS & IDE_ACCESS;
   IDE_W_S.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   IDE_W_S.AP = !RESET;

MACROCELL | 5 | 15 | INT_VECTOR_CYCLE
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 2 | 11 | 2 | 5 | 16
INPUTS | 5 | MTCR  | FCS  | RESET  | IDE_BASEADR<7>  | A<23>.PIN
INPUTMC | 1 | 3 | 0
INPUTP | 4 | 186 | 147 | 263 | 161
EXPORTS | 1 | 5 | 16
EQ | 4 | 
   INT_VECTOR_CYCLE.D = !MTCR;
   INT_VECTOR_CYCLE.CLK = !FCS;
   INT_VECTOR_CYCLE.AR = !RESET;
    INT_VECTOR_CYCLE.EXP  =  IDE_BASEADR<7> & !A<23>.PIN

MACROCELL | 13 | 4 | ROM_OE_S
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 4 | 4
INPUTS | 6 | RW  | AS  | IDE_ACCESS  | IDE_ENABLE  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF  | RESET
INPUTMC | 3 | 5 | 17 | 13 | 7 | 2 | 10
INPUTP | 3 | 158 | 152 | 263
EQ | 3 | 
   !ROM_OE_S.D = RW & !AS & IDE_ACCESS & IDE_ENABLE;
   ROM_OE_S.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;
   ROM_OE_S.AP = !RESET;

MACROCELL | 5 | 14 | Z3_ADR<10>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 5 | 7
INPUTS | 3 | A<12>.PIN  | FCS  | RESET
INPUTP | 3 | 115 | 147 | 263
EQ | 3 | 
   Z3_ADR<10>.D = A<12>.PIN;
   Z3_ADR<10>.CLK = !FCS;
   Z3_ADR<10>.AP = !RESET;

MACROCELL | 5 | 12 | Z3_ADR<11>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 5 | 2
INPUTS | 3 | A<13>.PIN  | FCS  | RESET
INPUTP | 3 | 123 | 147 | 263
EQ | 3 | 
   Z3_ADR<11>.D = A<13>.PIN;
   Z3_ADR<11>.CLK = !FCS;
   Z3_ADR<11>.AP = !RESET;

MACROCELL | 5 | 11 | Z3_ADR<12>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 5 | 4
INPUTS | 3 | A<14>.PIN  | FCS  | RESET
INPUTP | 3 | 125 | 147 | 263
EQ | 3 | 
   Z3_ADR<12>.D = A<14>.PIN;
   Z3_ADR<12>.CLK = !FCS;
   Z3_ADR<12>.AP = !RESET;

MACROCELL | 6 | 13 | Z3_ADR<2>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 2 | 3 | 7 | 6 | 14
INPUTS | 16 | A<4>  | FCS  | RESET  | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | D<13>.PIN  | LAN_BASEADR<13>  | UDS  | A<2>  | A<5>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS
INPUTMC | 3 | 13 | 12 | 6 | 14 | 4 | 5
INPUTP | 13 | 97 | 147 | 263 | 158 | 152 | 80 | 155 | 101 | 91 | 107 | 98 | 99 | 157
EXPORTS | 1 | 6 | 14
EQ | 9 | 
   Z3_ADR<2>.D = A<4>;
   Z3_ADR<2>.CLK = !FCS;
   Z3_ADR<2>.AP = !RESET;
    Z3_ADR<2>.EXP  =  !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<13>.PIN & 
	!LAN_BASEADR<13> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<13>.PIN & 
	!LAN_BASEADR<13> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>

MACROCELL | 6 | 3 | Z3_ADR<3>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 2 | 1 | 2 | 6 | 4
INPUTS | 8 | A<5>  | FCS  | RESET  | AS  | DQ<6>.PIN  | RW  | Z3_DATA<30>  | LAN_ACCESS
INPUTMC | 2 | 10 | 0 | 11 | 15
INPUTP | 6 | 91 | 147 | 263 | 152 | 227 | 158
EXPORTS | 1 | 6 | 4
EQ | 5 | 
   Z3_ADR<3>.D = A<5>;
   Z3_ADR<3>.CLK = !FCS;
   Z3_ADR<3>.AP = !RESET;
    Z3_ADR<3>.EXP  =  AS & FCS & DQ<6>.PIN
	# RW & Z3_DATA<30> & !FCS & LAN_ACCESS

MACROCELL | 6 | 0 | Z3_ADR<4>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 2 | 3 | 12 | 6 | 17
INPUTS | 16 | A<6>  | FCS  | RESET  | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | D<10>.PIN  | LAN_BASEADR<10>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<3>  | LDS
INPUTMC | 3 | 13 | 12 | 6 | 17 | 4 | 5
INPUTP | 13 | 98 | 147 | 263 | 158 | 152 | 74 | 155 | 101 | 91 | 97 | 107 | 99 | 157
EXPORTS | 1 | 6 | 17
EQ | 9 | 
   Z3_ADR<4>.D = A<6>;
   Z3_ADR<4>.CLK = !FCS;
   Z3_ADR<4>.AP = !RESET;
    Z3_ADR<4>.EXP  =  !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<10>.PIN & 
	!LAN_BASEADR<10> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<10>.PIN & 
	!LAN_BASEADR<10> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>

MACROCELL | 5 | 8 | Z3_ADR<5>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 1 | 4
INPUTS | 3 | A<7>  | FCS  | RESET
INPUTP | 3 | 100 | 147 | 263
EQ | 3 | 
   Z3_ADR<5>.D = A<7>;
   Z3_ADR<5>.CLK = !FCS;
   Z3_ADR<5>.AP = !RESET;

MACROCELL | 5 | 6 | Z3_ADR<6>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 1 | 2
INPUTS | 3 | A<8>.PIN  | FCS  | RESET
INPUTP | 3 | 106 | 147 | 263
EQ | 3 | 
   Z3_ADR<6>.D = A<8>.PIN;
   Z3_ADR<6>.CLK = !FCS;
   Z3_ADR<6>.AP = !RESET;

MACROCELL | 2 | 16 | Z3_ADR<7>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 5 | 9
INPUTS | 3 | A<9>.PIN  | FCS  | RESET
INPUTP | 3 | 108 | 147 | 263
EQ | 3 | 
   Z3_ADR<7>.D = A<9>.PIN;
   Z3_ADR<7>.CLK = !FCS;
   Z3_ADR<7>.AP = !RESET;

MACROCELL | 2 | 15 | Z3_ADR<8>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 5 | 13
INPUTS | 3 | A<10>.PIN  | FCS  | RESET
INPUTP | 3 | 112 | 147 | 263
EQ | 3 | 
   Z3_ADR<8>.D = A<10>.PIN;
   Z3_ADR<8>.CLK = !FCS;
   Z3_ADR<8>.AP = !RESET;

MACROCELL | 2 | 12 | Z3_ADR<9>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 5 | 5
INPUTS | 3 | A<11>.PIN  | FCS  | RESET
INPUTP | 3 | 114 | 147 | 263
EQ | 3 | 
   Z3_ADR<9>.D = A<11>.PIN;
   Z3_ADR<9>.CLK = !FCS;
   Z3_ADR<9>.AP = !RESET;

MACROCELL | 6 | 5 | Z3_ADR_0
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 2 | 3 | 4 | 6 | 4
INPUTS | 8 | A<2>  | FCS  | RESET  | RW  | AS  | AUTOCONFIG_Z2_ACCESS  | D_Z2_OUT<2>  | LAN_ACCESS
INPUTMC | 3 | 4 | 5 | 0 | 17 | 11 | 15
INPUTP | 5 | 101 | 147 | 263 | 158 | 152
EXPORTS | 1 | 6 | 4
EQ | 7 | 
   Z3_ADR_0.D = A<2>;
   Z3_ADR_0.CLK = !FCS;
   Z3_ADR_0.AP = !RESET;
    Z3_ADR_0.EXP  =  RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS & 
	D_Z2_OUT<2>
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & 
	D_Z2_OUT<2>

MACROCELL | 13 | 3 | Z3_ADR_1
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 3 | 11
INPUTS | 3 | A<3>  | FCS  | RESET
INPUTP | 3 | 99 | 147 | 263
EQ | 3 | 
   Z3_ADR_1.D = A<3>;
   Z3_ADR_1.CLK = !FCS;
   Z3_ADR_1.AP = !RESET;

MACROCELL | 8 | 6 | LAN_A_INIT<6>
ATTRIBUTES | 8553348 | 0
OUTPUTMC | 1 | 1 | 4
INPUTS | 2 | LAN_RST_SM_FSM_FFd1  | RESET
INPUTMC | 1 | 8 | 1
INPUTP | 1 | 263
EQ | 3 | 
   LAN_A_INIT<6>.D = !LAN_RST_SM_FSM_FFd1;
   LAN_A_INIT<6>.CLK = CLK_EXT;	// GCK
   LAN_A_INIT<6>.AP = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 8 | 5 | LAN_CS_RST
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 2 | 7 | 7 | 7 | 6
INPUTS | 3 | LAN_RST_SM_FSM_FFd2  | LAN_RST_SM_FSM_FFd3  | RESET
INPUTMC | 2 | 8 | 8 | 8 | 7
INPUTP | 1 | 263
EQ | 3 | 
   !LAN_CS_RST.D = !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd3;
   LAN_CS_RST.CLK = CLK_EXT;	// GCK
   LAN_CS_RST.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 4 | LAN_INT_ENABLE
ATTRIBUTES | 4358912 | 0
OUTPUTMC | 4 | 12 | 4 | 2 | 13 | 12 | 3 | 12 | 5
INPUTS | 15 | RW  | D<15>.PIN  | UDS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | LAN_INT_ENABLE  | LAN_SM_RST  | LDS  | DQ_SWAP  | D<5>.PIN  | A<21>.PIN  | A<13>.PIN  | Z3_DATA<23>.EXP
INPUTMC | 8 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5 | 12 | 4 | 11 | 2 | 11 | 17 | 12 | 3
INPUTP | 7 | 158 | 89 | 155 | 157 | 37 | 163 | 123
EXPORTS | 1 | 12 | 5
IMPORTS | 1 | 12 | 3
EQ | 20 | 
   LAN_INT_ENABLE.T = !RW & D<15>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & 
	!LAN_INT_ENABLE & !LAN_SM_RST
	# !RW & !D<15>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & 
	LAN_INT_ENABLE & !LAN_SM_RST
;Imported pterms FB13_4
	# !RW & UDS & !DS1 & A<23>.PIN & !LAN_SM_FSM_FFd3 & 
	LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & 
	!LAN_INT_ENABLE & !LAN_SM_RST
	# !RW & UDS & !DS1 & !A<23>.PIN & !LAN_SM_FSM_FFd3 & 
	LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & 
	LAN_INT_ENABLE & !LAN_SM_RST;
   LAN_INT_ENABLE.CLK = CLK_EXT;	// GCK
    LAN_INT_ENABLE.EXP  =  !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<5>.PIN
	# UDS & LDS & A<21>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	A<13>.PIN & !DQ_SWAP & !LAN_SM_FSM_FFd2
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 8 | 2 | LAN_IRQ_D0
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 1 | 2 | 17
INPUTS | 2 | LAN_INT  | RESET
INPUTP | 2 | 201 | 263
EQ | 3 | 
   LAN_IRQ_D0.D = LAN_INT;
   LAN_IRQ_D0.CLK = CLK_EXT;	// GCK
   LAN_IRQ_D0.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 12 | LAN_RD_S
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 1 | 7 | 9
INPUTS | 7 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd4  | RW  | Z3_ADR<13>  | LAN_SM_RST
INPUTMC | 6 | 14 | 3 | 14 | 4 | 11 | 5 | 7 | 6 | 5 | 10 | 11 | 2
INPUTP | 1 | 158
EQ | 10 | 
   LAN_RD_S.D = LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2
	# LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
	# !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1
	# RW & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2 & !Z3_ADR<13>;
   LAN_RD_S.CLK = CLK_EXT;	// GCK
   LAN_RD_S.AR = LAN_SM_RST;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 15 | LAN_READY
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 1 | 14 | 11
INPUTS | 6 | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | Z3_DATA<13>.EXP  | LAN_SM_RST
INPUTMC | 6 | 14 | 4 | 11 | 5 | 7 | 6 | 14 | 3 | 14 | 16 | 11 | 2
IMPORTS | 1 | 14 | 16
EQ | 12 | 
   LAN_READY.D = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd1
	# !LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2
;Imported pterms FB15_17
	# DS1 & DS0 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1
	# DS1 & DS0 & !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd1;
   LAN_READY.CLK = CLK_EXT;	// GCK
   LAN_READY.AR = LAN_SM_RST;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 7 | 10 | LAN_WRH_S
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 2 | 7 | 4 | 7 | 11
INPUTS | 10 | DS0  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | LDS  | LAN_SM_RST  | A<22>.PIN  | DQ_SWAP  | A<14>.PIN
INPUTMC | 6 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5 | 11 | 2 | 11 | 17
INPUTP | 4 | 170 | 157 | 162 | 125
EXPORTS | 1 | 7 | 11
EQ | 10 | 
   LAN_WRH_S.D = !LDS & LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1
	# !DS0 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
   LAN_WRH_S.CLK = CLK_EXT;	// GCK
   LAN_WRH_S.AR = LAN_SM_RST;
    LAN_WRH_S.EXP  =  A<22>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & A<14>.PIN & 
	DQ_SWAP & LAN_SM_FSM_FFd1
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 16 | LAN_WRL_S
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 2 | 12 | 13 | 12 | 15
INPUTS | 13 | DS1  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | LDS  | LAN_SM_RST  | DQ_SWAP  | D<3>.PIN  | UDS  | A<19>.PIN  | A<11>.PIN  | DQ_DATA<13>.EXP
INPUTMC | 7 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5 | 11 | 2 | 11 | 17 | 12 | 17
INPUTP | 6 | 148 | 157 | 28 | 155 | 169 | 114
EXPORTS | 1 | 12 | 15
IMPORTS | 1 | 12 | 17
EQ | 13 | 
   LAN_WRL_S.D = !DS1 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1
;Imported pterms FB13_18
	# !UDS & LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1;
   LAN_WRL_S.CLK = CLK_EXT;	// GCK
   LAN_WRL_S.AR = LAN_SM_RST;
    LAN_WRL_S.EXP  =  !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<3>.PIN
	# UDS & LDS & A<19>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<11>.PIN
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 6 | Z3_A_LOW
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 2 | 3 | 5 | 14 | 7
INPUTS | 10 | DS1  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1  | DS0  | A<23>.PIN  | DQ_SWAP  | A<15>.PIN  | LAN_SM_RST  | EXP80_.EXP
INPUTMC | 6 | 14 | 3 | 7 | 6 | 11 | 5 | 11 | 17 | 11 | 2 | 14 | 5
INPUTP | 4 | 148 | 170 | 161 | 139
EXPORTS | 1 | 14 | 7
IMPORTS | 1 | 14 | 5
EQ | 26 | 
   Z3_A_LOW.D = !DS1 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1
	# !DS0 & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd1
;Imported pterms FB15_6
	# !DS1 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
	# !DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1
;Imported pterms FB15_5
	# !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2;
   Z3_A_LOW.CLK = CLK_EXT;	// GCK
   Z3_A_LOW.AR = LAN_SM_RST;
    Z3_A_LOW.EXP  =  A<23>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<15>.PIN
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 3 | 11 | A_LAN_2_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 3 | 12
INPUTS | 18 | RESET  | A<2>  | CP_CS  | Z3_ADR_1  | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<10>.PIN  | CP_BASEADR<2>  | UDS  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS
INPUTMC | 6 | 4 | 1 | 13 | 3 | 13 | 12 | 13 | 11 | 3 | 12 | 4 | 5
INPUTP | 12 | 263 | 101 | 158 | 152 | 74 | 155 | 91 | 97 | 107 | 98 | 99 | 157
EXPORTS | 1 | 3 | 12
EQ | 8 | 
   !A_LAN<2> = RESET & !A<2> & !CP_CS
	# RESET & !Z3_ADR_1 & CP_CS;
    A_LAN_2_OBUF.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !CP_BASEADR<2> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<10>.PIN & !CP_BASEADR<2> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 1 | 1 | A_LAN_4_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 1 | 0
INPUTS | 12 | RESET  | A<4>  | CP_CS  | RW  | UDS  | FCS  | LAN_ACCESS  | DQ_DATA<8>  | LDS  | DS1  | DS0  | A_LAN_7_OBUF.EXP
INPUTMC | 4 | 4 | 1 | 11 | 15 | 10 | 15 | 1 | 2
INPUTP | 8 | 263 | 97 | 158 | 155 | 147 | 157 | 148 | 170
EXPORTS | 1 | 1 | 0
IMPORTS | 1 | 1 | 2
EQ | 11 | 
   !A_LAN<4> = RESET & !A<4> & !CP_CS
;Imported pterms FB2_3
	# RESET & !Z3_ADR<3> & CP_CS;
    A_LAN_4_OBUF.EXP  =  !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<8>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<8>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<8>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<8>

MACROCELL | 3 | 13 | A_LAN_5_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 3 | 14
INPUTS | 10 | RESET  | A<5>  | CP_CS  | A<2>  | A<4>  | A<1>  | A<3>  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | CP_BASEADR<2>.EXP
INPUTMC | 4 | 4 | 1 | 13 | 12 | 13 | 11 | 3 | 12
INPUTP | 6 | 263 | 91 | 101 | 97 | 107 | 99
EXPORTS | 1 | 3 | 14
IMPORTS | 1 | 3 | 12
EQ | 10 | 
   !A_LAN<5> = RESET & !A<5> & !CP_CS
;Imported pterms FB4_13
	# RESET & !Z3_ADR<4> & CP_CS;
    A_LAN_5_OBUF.EXP  =  !A<2> & A<4> & !A<1> & !A<3>
	# AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & 
	!A<2> & A<4> & A<1>
	# AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & 
	A<2> & !A<4> & A<1>
	# AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & 
	A<2> & !A<5> & !A<4> & !A<1>

MACROCELL | 4 | 4 | ROM_OE_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 4 | 3
INPUTS | 8 | AS  | ROM_OE_S  | AUTOBOOT_OFF  | RW  | AUTOCONFIG_Z2_ACCESS  | CP_CS  | FCS  | LAN_ACCESS
INPUTMC | 4 | 13 | 4 | 4 | 5 | 4 | 1 | 11 | 15
INPUTP | 4 | 152 | 142 | 158 | 147
EXPORTS | 1 | 4 | 3
EQ | 4 | 
   !ROM_OE = !AS & !ROM_OE_S & !AUTOBOOT_OFF;
    ROM_OE_OBUF.EXP  =  RW & !AS & AUTOCONFIG_Z2_ACCESS
	# RW & !AS & !CP_CS
	# RW & !FCS & LAN_ACCESS

MACROCELL | 11 | 2 | LAN_SM_RST
ATTRIBUTES | 8553216 | 0
OUTPUTMC | 59 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 10 | 0 | 12 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5 | 10 | 17 | 15 | 15 | 12 | 15 | 7 | 0 | 12 | 17 | 7 | 11 | 12 | 11 | 14 | 17 | 15 | 16 | 12 | 10 | 7 | 13 | 12 | 6 | 7 | 8 | 14 | 7 | 10 | 15 | 14 | 9 | 12 | 4 | 14 | 12 | 14 | 15 | 7 | 10 | 12 | 16 | 14 | 6 | 11 | 3
INPUTS | 10 | RESET  | UDS  | FCS  | LAN_ACCESS  | INT_VECTOR_CYCLE  | DS1  | DS0  | LDS  | RW  | DQ_DATA<15>
INPUTMC | 3 | 11 | 15 | 5 | 15 | 12 | 11
INPUTP | 7 | 263 | 155 | 147 | 148 | 170 | 157 | 158
EXPORTS | 1 | 11 | 3
EQ | 11 | 
   !LAN_SM_RST.D = RESET & !UDS & !FCS & LAN_ACCESS & 
	!INT_VECTOR_CYCLE
	# RESET & !LDS & !FCS & LAN_ACCESS & 
	!INT_VECTOR_CYCLE
	# RESET & !DS1 & !FCS & LAN_ACCESS & 
	!INT_VECTOR_CYCLE
	# RESET & !DS0 & !FCS & LAN_ACCESS & 
	!INT_VECTOR_CYCLE;
   !LAN_SM_RST.CLK = CLK_EXT;	// GCK
    LAN_SM_RST.EXP  =  !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<15>
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 13 | 8 | CP_WE_S
ATTRIBUTES | 8520480 | 0
OUTPUTMC | 2 | 2 | 11 | 10 | 15
INPUTS | 5 | RW  | UDS  | CP_CS  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF
INPUTMC | 2 | 4 | 1 | 2 | 10
INPUTP | 3 | 158 | 155 | 157
EQ | 3 | 
   !CP_WE_S.D = !RW & !UDS & !CP_CS
	# !RW & !LDS & !CP_CS;
   CP_WE_S.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;

MACROCELL | 13 | 9 | CP_RD_S
ATTRIBUTES | 8520480 | 0
OUTPUTMC | 1 | 12 | 1
INPUTS | 5 | RW  | UDS  | CP_CS  | LDS  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF
INPUTMC | 2 | 4 | 1 | 2 | 10
INPUTP | 3 | 158 | 155 | 157
EQ | 3 | 
   !CP_RD_S.D = RW & !UDS & !CP_CS
	# RW & !LDS & !CP_CS;
   CP_RD_S.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;

MACROCELL | 2 | 11 | CP_WE_QUIRK
ATTRIBUTES | 8520480 | 0
OUTPUTMC | 1 | 10 | 15
INPUTS | 2 | CP_WE_S  | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF
INPUTMC | 2 | 13 | 8 | 2 | 10
EQ | 2 | 
   CP_WE_QUIRK.D = CP_WE_S;
   CP_WE_QUIRK.CLK = SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF;

MACROCELL | 2 | 9 | LAN_A_INIT<3>
ATTRIBUTES | 8553348 | 0
OUTPUTMC | 1 | 3 | 7
INPUTS | 1 | RESET
INPUTP | 1 | 263
EQ | 3 | 
   LAN_A_INIT<3>.D = Gnd;
   LAN_A_INIT<3>.CLK = CLK_EXT;	// GCK
   LAN_A_INIT<3>.AP = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 3 | 5 | A_LAN_0_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 3 | 6
INPUTS | 18 | RESET  | Z3_A_LOW  | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D<12>.PIN  | IDE_BASEADR<4>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS
INPUTMC | 6 | 14 | 6 | 13 | 12 | 13 | 11 | 8 | 17 | 3 | 6 | 4 | 5
INPUTP | 12 | 263 | 158 | 152 | 78 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157
EXPORTS | 1 | 3 | 6
EQ | 9 | 
   !A_LAN<0> = RESET & !Z3_A_LOW;
    A_LAN_0_OBUF.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<12>.PIN & 
	!IDE_BASEADR<4> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<12>.PIN & 
	!IDE_BASEADR<4> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 5 | 5 | A_LAN_10_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<9>
INPUTMC | 1 | 2 | 12
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<10> = RESET & !Z3_ADR<9>;

MACROCELL | 5 | 7 | A_LAN_11_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<10>
INPUTMC | 1 | 5 | 14
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<11> = RESET & !Z3_ADR<10>;

MACROCELL | 5 | 2 | A_LAN_12_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<11>
INPUTMC | 1 | 5 | 12
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<12> = RESET & !Z3_ADR<11>;

MACROCELL | 5 | 4 | A_LAN_13_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<12>
INPUTMC | 1 | 5 | 11
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<13> = RESET & !Z3_ADR<12>;

MACROCELL | 3 | 4 | A_LAN_1_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 3 | 3
INPUTS | 17 | RESET  | Z3_ADR_0  | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D<13>.PIN  | IDE_BASEADR<5>  | LDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>
INPUTMC | 6 | 6 | 5 | 13 | 12 | 13 | 11 | 8 | 17 | 3 | 3 | 4 | 5
INPUTP | 11 | 263 | 158 | 152 | 80 | 157 | 101 | 91 | 97 | 107 | 98 | 99
EXPORTS | 1 | 3 | 3
EQ | 5 | 
   !A_LAN<1> = RESET & !Z3_ADR_0;
    A_LAN_1_OBUF.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<13>.PIN & 
	!IDE_BASEADR<5> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 3 | 7 | A_LAN_3_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 3 | 8
INPUTS | 21 | RESET  | LAN_A_INIT<3>  | Z3_ADR<2>  | CP_CS  | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D<11>.PIN  | IDE_BASEADR<3>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | IDE_BASEADR<4>.EXP
INPUTMC | 9 | 2 | 9 | 6 | 13 | 4 | 1 | 13 | 12 | 13 | 11 | 8 | 17 | 3 | 8 | 4 | 5 | 3 | 6
INPUTP | 12 | 263 | 158 | 152 | 77 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157
EXPORTS | 1 | 3 | 8
IMPORTS | 1 | 3 | 6
EQ | 16 | 
   A_LAN<3> = !RESET & LAN_A_INIT<3>
	# RESET & Z3_ADR<2> & CP_CS
;Imported pterms FB4_7
	# RESET & A<3> & !CP_CS;
    A_LAN_3_OBUF.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<11>.PIN & 
	!IDE_BASEADR<3> & !UDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<11>.PIN & 
	!IDE_BASEADR<3> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & !D<11>.PIN & 
	IDE_BASEADR<3> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 1 | 4 | A_LAN_6_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 1 | 3
INPUTS | 7 | RESET  | LAN_A_INIT<6>  | Z3_ADR<5>  | RW  | DS0  | FCS  | LAN_ACCESS
INPUTMC | 3 | 8 | 6 | 5 | 8 | 11 | 15
INPUTP | 4 | 263 | 158 | 170 | 147
EXPORTS | 1 | 1 | 3
EQ | 3 | 
   A_LAN<6> = RESET & Z3_ADR<5>
	# !RESET & LAN_A_INIT<6>;
    A_LAN_6_OBUF.EXP  =  !RW & !DS0 & !FCS & LAN_ACCESS

MACROCELL | 1 | 2 | A_LAN_7_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 1 | 1
INPUTS | 4 | RESET  | Z3_ADR<6>  | Z3_ADR<3>  | CP_CS
INPUTMC | 3 | 5 | 6 | 6 | 3 | 4 | 1
INPUTP | 1 | 263
EXPORTS | 1 | 1 | 1
EQ | 2 | 
   !A_LAN<7> = RESET & !Z3_ADR<6>;
    A_LAN_7_OBUF.EXP  =  RESET & !Z3_ADR<3> & CP_CS

MACROCELL | 5 | 9 | A_LAN_8_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<7>
INPUTMC | 1 | 2 | 16
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<8> = RESET & !Z3_ADR<7>;

MACROCELL | 5 | 13 | A_LAN_9_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<8>
INPUTMC | 1 | 2 | 15
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<9> = RESET & !Z3_ADR<8>;

MACROCELL | 12 | 1 | CP_RD_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 12 | 0
INPUTS | 11 | AS  | CP_RD_S  | UDS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd2  | D<5>.PIN  | LDS  | A<21>.PIN  | A<13>.PIN
INPUTMC | 5 | 13 | 9 | 14 | 3 | 7 | 6 | 11 | 17 | 14 | 4
INPUTP | 6 | 152 | 155 | 37 | 157 | 163 | 123
EXPORTS | 1 | 12 | 0
EQ | 9 | 
   !CP_RD = !AS & !CP_RD_S;
    CP_RD_OBUF.EXP  =  !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<5>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<5>.PIN
	# UDS & LDS & A<21>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	A<13>.PIN & DQ_SWAP & !LAN_SM_FSM_FFd2

MACROCELL | 10 | 16 | CP_WE_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 10 | 17
INPUTS | 12 | A<16>.PIN  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd1  | A<8>.PIN  | D<8>.PIN  | UDS  | LAN_SM_FSM_FFd2  | D<0>.PIN  | LDS  | DQ_DATA<8>.EXP
INPUTMC | 6 | 14 | 3 | 7 | 6 | 11 | 17 | 11 | 5 | 14 | 4 | 10 | 15
INPUTP | 6 | 175 | 106 | 32 | 155 | 4 | 157
EXPORTS | 1 | 10 | 17
IMPORTS | 1 | 10 | 15
EQ | 12 | 
   !CP_WE = ;Imported pterms FB11_16
	  !AS & !CP_WE_S & CP_WE_QUIRK;
    CP_WE_OBUF.EXP  =  A<16>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<8>.PIN
	# D<8>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<0>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<0>.PIN

MACROCELL | 0 | 16 | IDE_R_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 0 | 17
INPUTS | 6 | A<2>  | A<5>  | A<4>  | A<3>  | A<1>  | CP_BASEADR<0>.EXP
INPUTMC | 1 | 0 | 15
INPUTP | 5 | 101 | 91 | 97 | 99 | 107
EXPORTS | 1 | 0 | 17
IMPORTS | 1 | 0 | 15
EQ | 7 | 
   !IDE_R = ;Imported pterms FB1_16
	  !AS & !IDE_R_S;
    IDE_R_OBUF.EXP  =  !A<2> & A<5>
	# !A<2> & A<4>
	# A<5> & A<4>
	# !A<4> & A<3>
	# A<1> & A<3>

MACROCELL | 2 | 1 | IDE_W_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | AS  | IDE_W_S
INPUTMC | 1 | 13 | 5
INPUTP | 1 | 152
EQ | 1 | 
   !IDE_W = !AS & !IDE_W_S;

MACROCELL | 7 | 7 | LAN_CS_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 7 | 8
INPUTS | 13 | RESET  | LAN_CS_RST  | A<22>.PIN  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd1  | A<14>.PIN  | D<14>.PIN  | UDS  | LAN_SM_FSM_FFd2  | LDS  | LAN_SM_FSM_FFd4.EXP
INPUTMC | 7 | 8 | 5 | 14 | 3 | 7 | 6 | 11 | 17 | 11 | 5 | 14 | 4 | 7 | 6
INPUTP | 6 | 263 | 162 | 125 | 81 | 155 | 157
EXPORTS | 1 | 7 | 8
IMPORTS | 1 | 7 | 6
EQ | 12 | 
   LAN_CS = !RESET & LAN_CS_RST
;Imported pterms FB8_7
	# Z3_ADR<13> & LAN_CS_RST
	# RESET & LAN_ACCESS & !Z3_ADR<13>;
    LAN_CS_OBUF.EXP  =  A<22>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & A<14>.PIN & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# D<14>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<14>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2

MACROCELL | 7 | 4 | LAN_WRH_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 7 | 3
INPUTS | 9 | RESET  | LAN_WR_RST  | FCS  | LAN_WRH_S  | RW  | DS1  | LAN_ACCESS  | DQ_DATA<14>  | DS0
INPUTMC | 4 | 8 | 0 | 7 | 10 | 11 | 15 | 7 | 11
INPUTP | 5 | 263 | 147 | 158 | 148 | 170
EXPORTS | 1 | 7 | 3
EQ | 7 | 
   LAN_WRH = !RESET & LAN_WR_RST
	# FCS & LAN_WR_RST
	# RESET & !FCS & LAN_WRH_S;
    LAN_WRH_OBUF.EXP  =  !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<14>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<14>

MACROCELL | 12 | 13 | LAN_WRL_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 12 | 12
INPUTS | 11 | RESET  | LAN_WR_RST  | FCS  | LAN_WRL_S  | UDS  | LDS  | A<23>.PIN  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd2
INPUTMC | 6 | 8 | 0 | 12 | 16 | 14 | 3 | 7 | 6 | 11 | 17 | 14 | 4
INPUTP | 5 | 263 | 147 | 155 | 157 | 161
EXPORTS | 1 | 12 | 12
EQ | 5 | 
   LAN_WRL = !RESET & LAN_WR_RST
	# FCS & LAN_WR_RST
	# RESET & !FCS & LAN_WRL_S;
    LAN_WRL_OBUF.EXP  =  UDS & LDS & A<23>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2

MACROCELL | 7 | 9 | LAN_RD_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 7 | 8
INPUTS | 12 | RESET  | FCS  | LAN_RD_S  | UDS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd2  | D<6>.PIN  | LDS  | A<22>.PIN  | A<14>.PIN
INPUTMC | 5 | 14 | 12 | 14 | 3 | 7 | 6 | 11 | 17 | 14 | 4
INPUTP | 7 | 263 | 147 | 155 | 26 | 157 | 162 | 125
EXPORTS | 1 | 7 | 8
EQ | 9 | 
   LAN_RD = RESET & !FCS & LAN_RD_S;
    LAN_RD_OBUF.EXP  =  !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<6>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<6>.PIN
	# UDS & LDS & A<22>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	A<14>.PIN & !DQ_SWAP & !LAN_SM_FSM_FFd2

MACROCELL | 13 | 13 | SLAVE_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 6 | AS  | LAN_ACCESS  | FCS  | AUTOCONFIG_Z2_ACCESS  | IDE_ACCESS  | CP_CS
INPUTMC | 4 | 11 | 15 | 4 | 5 | 5 | 17 | 4 | 1
INPUTP | 2 | 152 | 147
EQ | 5 | 
   SLAVE = AS & FCS
	# AS & !LAN_ACCESS
	# FCS & !AUTOCONFIG_Z2_ACCESS & !IDE_ACCESS & CP_CS
	# !AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & !IDE_ACCESS & 
	CP_CS;

MACROCELL | 14 | 11 | ROM_B_0_OBUF$BUF10
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 14 | 10
INPUTS | 11 | FCS  | LAN_READY  | D<9>.PIN  | UDS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd2  | LDS  | A<17>.PIN  | A<9>.PIN
INPUTMC | 5 | 14 | 15 | 14 | 3 | 7 | 6 | 11 | 17 | 14 | 4
INPUTP | 6 | 147 | 73 | 155 | 157 | 172 | 108
EXPORTS | 1 | 14 | 10
EQ | 10 | 
   DTACK = Gnd;
   DTACK.OE = !FCS & LAN_READY;
    ROM_B_0_OBUF$BUF10.EXP  =  D<9>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<9>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & A<17>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<9>.PIN

MACROCELL | 13 | 2 | ROM_B_0_OBUF$BUF2
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 13 | 1
INPUTS | 12 | FCS  | LAN_ACCESS  | AS  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS
INPUTMC | 2 | 11 | 15 | 4 | 5
INPUTP | 10 | 147 | 152 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157
EXPORTS | 1 | 13 | 1
EQ | 10 | 
   OVR = Gnd;
   OVR.OE = !FCS & LAN_ACCESS;
    ROM_B_0_OBUF$BUF2.EXP  =  !AS & !UDS & A<2> & A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
	# !AS & !UDS & !A<2> & !A<5> & A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & !A<6> & A<3>
	# !AS & !LDS & A<2> & A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
	# !AS & !LDS & !A<2> & !A<5> & A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & !A<6> & A<3>

MACROCELL | 10 | 11 | ROM_B_0_OBUF$BUF8
ATTRIBUTES | 265986 | 0
INPUTS | 1 | CP_IRQ
INPUTP | 1 | 59
EQ | 2 | 
   INT6_OUT = Gnd;
   INT6_OUT.OE = !CP_IRQ;

MACROCELL | 2 | 13 | ROM_B_0_OBUF$BUF9
ATTRIBUTES | 265986 | 0
INPUTS | 2 | LAN_IRQ_OUT  | LAN_INT_ENABLE
INPUTMC | 2 | 2 | 17 | 12 | 4
EQ | 2 | 
   INT2_OUT = Gnd;
   INT2_OUT.OE = !LAN_IRQ_OUT & LAN_INT_ENABLE;

MACROCELL | 13 | 10 | CFOUT_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 3 | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>
INPUTMC | 3 | 13 | 12 | 13 | 11 | 8 | 17
EQ | 2 | 
   !CFOUT = AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & 
	AUTO_CONFIG_Z2_DONE<2>;

MACROCELL | 4 | 1 | CP_CS_OBUF
ATTRIBUTES | 8782758 | 0
OUTPUTMC | 12 | 3 | 11 | 1 | 1 | 3 | 13 | 13 | 8 | 13 | 9 | 3 | 7 | 13 | 13 | 1 | 3 | 3 | 12 | 1 | 2 | 3 | 6 | 4 | 4
INPUTS | 8 | LAN_ACCESS  | SHUT_UP_Z2<1>  | CP_BASEADR<0>  | A<16>.PIN  | EXP33_.EXP  | EXP34_.EXP  | AS  | IDE_ACCESS/IDE_ACCESS_RSTF__$INT
INPUTMC | 6 | 11 | 15 | 8 | 9 | 0 | 15 | 4 | 0 | 4 | 2 | 4 | 17
INPUTP | 2 | 175 | 152
IMPORTS | 2 | 4 | 0 | 4 | 2
EQ | 23 | 
   CP_CS.D = LAN_ACCESS
	# SHUT_UP_Z2<1>
	# !CP_BASEADR<0> & A<16>.PIN
;Imported pterms FB5_1
	# CP_BASEADR<0> & !A<16>.PIN
	# CP_BASEADR<2> & !A<18>.PIN
	# !CP_BASEADR<2> & A<18>.PIN
	# CP_BASEADR<3> & !A<19>.PIN
	# !CP_BASEADR<3> & A<19>.PIN
;Imported pterms FB5_3
	# CP_BASEADR<4> & !A<20>.PIN
	# !CP_BASEADR<4> & A<20>.PIN
	# CP_BASEADR<5> & !A<21>.PIN
	# !CP_BASEADR<5> & A<21>.PIN
	# !CP_BASEADR<7> & A<23>.PIN
;Imported pterms FB5_4
	# CP_BASEADR<1> & !A<17>.PIN
	# !CP_BASEADR<1> & A<17>.PIN
	# CP_BASEADR<6> & !A<22>.PIN
	# !CP_BASEADR<6> & A<22>.PIN
	# CP_BASEADR<7> & !A<23>.PIN;
   CP_CS.CLK = !AS;
   CP_CS.AP = !IDE_ACCESS/IDE_ACCESS_RSTF__$INT;

MACROCELL | 0 | 11 | IDE_A_0_OBUF$BUF0
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 0 | 10
INPUTS | 15 | A<9>.PIN  | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<12>.PIN  | CP_BASEADR<4>  | LDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>
INPUTMC | 4 | 13 | 12 | 13 | 11 | 0 | 10 | 4 | 5
INPUTP | 11 | 108 | 158 | 152 | 78 | 157 | 101 | 91 | 97 | 107 | 98 | 99
EXPORTS | 1 | 0 | 10
EQ | 4 | 
   IDE_A<0> = A<9>.PIN;
    IDE_A_0_OBUF$BUF0.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<12>.PIN & !CP_BASEADR<4> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 0 | 14 | IDE_A_1_OBUF$BUF0
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 0 | 15
INPUTS | 16 | A<10>.PIN  | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<8>.PIN  | CP_BASEADR<0>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS
INPUTMC | 4 | 13 | 12 | 13 | 11 | 0 | 15 | 4 | 5
INPUTP | 12 | 112 | 158 | 152 | 32 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157
EXPORTS | 1 | 0 | 15
EQ | 7 | 
   IDE_A<1> = A<10>.PIN;
    IDE_A_1_OBUF$BUF0.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<8>.PIN & !CP_BASEADR<0> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<8>.PIN & !CP_BASEADR<0> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 0 | 13 | IDE_A_2_OBUF$BUF0
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 0 | 12
INPUTS | 15 | A<11>.PIN  | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<9>.PIN  | CP_BASEADR<1>  | LDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>
INPUTMC | 4 | 13 | 12 | 13 | 11 | 0 | 12 | 4 | 5
INPUTP | 11 | 114 | 158 | 152 | 73 | 157 | 101 | 91 | 97 | 107 | 98 | 99
EXPORTS | 1 | 0 | 12
EQ | 4 | 
   IDE_A<2> = A<11>.PIN;
    IDE_A_2_OBUF$BUF0.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<9>.PIN & !CP_BASEADR<1> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 0 | 7 | IDE_CS_0_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 0 | 6
INPUTS | 16 | A<12>.PIN  | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<14>.PIN  | CP_BASEADR<6>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS
INPUTMC | 4 | 13 | 12 | 13 | 11 | 0 | 6 | 4 | 5
INPUTP | 12 | 115 | 158 | 152 | 81 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157
EXPORTS | 1 | 0 | 6
EQ | 10 | 
   IDE_CS<0> = !A<12>.PIN;
    IDE_CS_0_OBUF.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<14>.PIN & !CP_BASEADR<6> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<14>.PIN & !CP_BASEADR<6> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<14>.PIN & CP_BASEADR<6> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 0 | 9 | IDE_CS_1_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 0 | 8
INPUTS | 15 | A<13>.PIN  | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<13>.PIN  | CP_BASEADR<5>  | LDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>
INPUTMC | 4 | 13 | 12 | 13 | 11 | 0 | 8 | 4 | 5
INPUTP | 11 | 123 | 158 | 152 | 80 | 157 | 101 | 91 | 97 | 107 | 98 | 99
EXPORTS | 1 | 0 | 8
EQ | 4 | 
   IDE_CS<1> = !A<13>.PIN;
    IDE_CS_1_OBUF.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<13>.PIN & !CP_BASEADR<5> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 13 | 14 | ROM_B_0_OBUF$BUF1
ATTRIBUTES | 265986 | 0
INPUTS | 0
EQ | 2 | 
   OWN = Gnd;
   OWN.OE = Gnd;

MACROCELL | 15 | 9 | ROM_B_0_OBUF$BUF3
ATTRIBUTES | 265986 | 0
INPUTS | 0
EQ | 2 | 
   MTACK = Gnd;
   MTACK.OE = Gnd;

MACROCELL | 11 | 1 | ROM_B_0_OBUF$BUF4
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 11 | 0
INPUTS | 4 | D<10>.PIN  | LAN_BASEADR<10>  | D<15>.PIN  | LAN_BASEADR<15>
INPUTMC | 2 | 6 | 17 | 6 | 9
INPUTP | 2 | 74 | 89
EXPORTS | 1 | 11 | 0
EQ | 6 | 
   LAN_CFG<4> = Gnd;
   LAN_CFG<4>.OE = Gnd;
    ROM_B_0_OBUF$BUF4.EXP  =  D<10>.PIN & !LAN_BASEADR<10>
	# !D<10>.PIN & LAN_BASEADR<10>
	# D<15>.PIN & !LAN_BASEADR<15>
	# !D<15>.PIN & LAN_BASEADR<15>

MACROCELL | 1 | 7 | ROM_B_0_OBUF$BUF5
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 1 | 8
INPUTS | 15 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D<9>.PIN  | IDE_BASEADR<1>  | LDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>
INPUTMC | 5 | 13 | 12 | 13 | 11 | 8 | 17 | 1 | 8 | 4 | 5
INPUTP | 10 | 158 | 152 | 73 | 157 | 101 | 91 | 97 | 107 | 98 | 99
EXPORTS | 1 | 1 | 8
EQ | 6 | 
   LAN_CFG<3> = Gnd;
   LAN_CFG<3>.OE = Gnd;
    ROM_B_0_OBUF$BUF5.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<9>.PIN & 
	!IDE_BASEADR<1> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 5 | 1 | ROM_B_0_OBUF$BUF6
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 5 | 0
INPUTS | 4 | IDE_BASEADR<3>  | A<19>.PIN  | IDE_BASEADR<6>  | A<22>.PIN
INPUTMC | 2 | 3 | 8 | 3 | 17
INPUTP | 2 | 169 | 162
EXPORTS | 1 | 5 | 0
EQ | 6 | 
   LAN_CFG<2> = Gnd;
   LAN_CFG<2>.OE = Gnd;
    ROM_B_0_OBUF$BUF6.EXP  =  IDE_BASEADR<3> & !A<19>.PIN
	# !IDE_BASEADR<3> & A<19>.PIN
	# IDE_BASEADR<6> & !A<22>.PIN
	# !IDE_BASEADR<6> & A<22>.PIN

MACROCELL | 1 | 5 | ROM_B_0_OBUF$BUF7
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 1 | 6
INPUTS | 15 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | AUTO_CONFIG_Z2_DONE<2>  | D<8>.PIN  | IDE_BASEADR<0>  | LDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>
INPUTMC | 5 | 13 | 12 | 13 | 11 | 8 | 17 | 1 | 6 | 4 | 5
INPUTP | 10 | 158 | 152 | 32 | 157 | 101 | 91 | 97 | 107 | 98 | 99
EXPORTS | 1 | 1 | 6
EQ | 6 | 
   LAN_CFG<1> = Gnd;
   LAN_CFG<1>.OE = Gnd;
    ROM_B_0_OBUF$BUF7.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	AUTO_CONFIG_Z2_DONE<1> & !AUTO_CONFIG_Z2_DONE<2> & D<8>.PIN & 
	!IDE_BASEADR<0> & !LDS & !A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 10 | 13 | ROM_B_0_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 10 | 14
INPUTS | 9 | D<8>.PIN  | UDS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd2  | LDS  | A<16>.PIN  | A<8>.PIN
INPUTMC | 4 | 14 | 3 | 7 | 6 | 11 | 17 | 14 | 4
INPUTP | 5 | 32 | 155 | 157 | 175 | 106
EXPORTS | 1 | 10 | 14
EQ | 9 | 
   ROM_B<1> = Gnd;
    ROM_B_0_OBUF.EXP  =  D<8>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<8>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & A<16>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<8>.PIN

MACROCELL | 2 | 14 | ROM_B_0_OBUF$BUF0
ATTRIBUTES | 264962 | 0
INPUTS | 0
EQ | 1 | 
   ROM_B<0> = Gnd;

MACROCELL | 2 | 10 | SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF
ATTRIBUTES | 133888 | 0
OUTPUTMC | 44 | 13 | 12 | 13 | 11 | 8 | 17 | 8 | 15 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 13 | 7 | 8 | 11 | 8 | 9 | 0 | 1 | 13 | 16 | 3 | 15 | 0 | 17 | 13 | 1 | 13 | 6 | 13 | 5 | 13 | 4 | 13 | 8 | 13 | 9 | 2 | 11
INPUTS | 2 | C1  | C3
INPUTP | 2 | 188 | 187
EQ | 2 | 
   SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF = C1
	$ C3;

MACROCELL | 1 | 3 | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST
ATTRIBUTES | 133888 | 0
OUTPUTMC | 16 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 9 | 9 | 13 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 5 | 9 | 4 | 9 | 7 | 9 | 11 | 9 | 10
INPUTS | 10 | RESET  | RW  | AS  | CP_CS  | UDS  | FCS  | LAN_ACCESS  | LDS  | DS1  | A_LAN_6_OBUF.EXP
INPUTMC | 3 | 4 | 1 | 11 | 15 | 1 | 4
INPUTP | 7 | 263 | 158 | 152 | 155 | 147 | 157 | 148
IMPORTS | 1 | 1 | 4
EQ | 7 | 
   DQ_8_IOBUFE/DQ_8_IOBUFE_TRST = !RESET
	# !RW & !AS & !CP_CS
	# !RW & !UDS & !FCS & LAN_ACCESS
	# !RW & !LDS & !FCS & LAN_ACCESS
	# !RW & !DS1 & !FCS & LAN_ACCESS
;Imported pterms FB2_5
	# !RW & !DS0 & !FCS & LAN_ACCESS;

MACROCELL | 4 | 3 | D_8_IOBUFE/D_8_IOBUFE_TRST
ATTRIBUTES | 133888 | 0
OUTPUTMC | 17 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 4 | 2
INPUTS | 7 | CP_BASEADR<1>  | A<17>.PIN  | CP_BASEADR<6>  | A<22>.PIN  | CP_BASEADR<7>  | A<23>.PIN  | ROM_OE_OBUF.EXP
INPUTMC | 4 | 0 | 12 | 0 | 6 | 0 | 3 | 4 | 4
INPUTP | 3 | 172 | 162 | 161
EXPORTS | 1 | 4 | 2
IMPORTS | 1 | 4 | 4
EQ | 9 | 
   D_8_IOBUFE/D_8_IOBUFE_TRST = ;Imported pterms FB5_5
	  RW & !AS & AUTOCONFIG_Z2_ACCESS
	# RW & !AS & !CP_CS
	# RW & !FCS & LAN_ACCESS;
    D_8_IOBUFE/D_8_IOBUFE_TRST.EXP  =  CP_BASEADR<1> & !A<17>.PIN
	# !CP_BASEADR<1> & A<17>.PIN
	# CP_BASEADR<6> & !A<22>.PIN
	# !CP_BASEADR<6> & A<22>.PIN
	# CP_BASEADR<7> & !A<23>.PIN

MACROCELL | 4 | 17 | IDE_ACCESS/IDE_ACCESS_RSTF__$INT
ATTRIBUTES | 133888 | 0
OUTPUTMC | 4 | 4 | 5 | 5 | 17 | 4 | 1 | 4 | 16
INPUTS | 9 | RESET  | FCS  | AS  | DQ<4>.PIN  | RW  | Z3_DATA<28>  | LAN_ACCESS  | AUTOCONFIG_Z2_ACCESS  | D_Z2_OUT<0>
INPUTMC | 4 | 10 | 3 | 11 | 15 | 4 | 5 | 13 | 16
INPUTP | 5 | 263 | 147 | 152 | 225 | 158
EXPORTS | 1 | 4 | 16
EQ | 7 | 
   IDE_ACCESS/IDE_ACCESS_RSTF__$INT = RESET & !FCS;
    IDE_ACCESS/IDE_ACCESS_RSTF__$INT.EXP  =  AS & FCS & DQ<4>.PIN
	# RW & Z3_DATA<28> & !FCS & LAN_ACCESS
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS & 
	D_Z2_OUT<0>
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & 
	D_Z2_OUT<0>

MACROCELL | 9 | 13 | _18_
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 9 | 12
INPUTS | 10 | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST  | DQ<8>_BUFR  | RW  | RESET  | LDS  | FCS  | LAN_ACCESS  | DQ_DATA<6>  | DS1  | DS0
INPUTMC | 4 | 1 | 3 | 1 | 0 | 11 | 15 | 7 | 8
INPUTP | 6 | 158 | 263 | 157 | 147 | 148 | 170
EXPORTS | 1 | 9 | 12
EQ | 8 | 
   DQ<8> = DQ<8>_BUFR;
   DQ<8>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;
    _18_.EXP  =  !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<6>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<6>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<6>

MACROCELL | 9 | 9 | _19_
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 9 | 8
INPUTS | 9 | DQ_8_IOBUFE/DQ_8_IOBUFE_TRST  | DQ<4>_BUFR  | RW  | RESET  | DS1  | FCS  | LAN_ACCESS  | DQ_DATA<5>  | DS0
INPUTMC | 4 | 1 | 3 | 9 | 0 | 11 | 15 | 12 | 6
INPUTP | 5 | 158 | 263 | 148 | 147 | 170
EXPORTS | 1 | 9 | 8
EQ | 6 | 
   DQ<4> = DQ<4>_BUFR;
   DQ<4>.OE = DQ_8_IOBUFE/DQ_8_IOBUFE_TRST;
    _19_.EXP  =  !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<5>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<5>

MACROCELL | 0 | 0 | EXP24_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 17
INPUTS | 10 | UDS  | LDS  | A<5>  | A<1>  | AUTO_CONFIG_Z2_DONE<0>  | A<2>  | A<4>  | A<3>  | AUTO_CONFIG_Z2_DONE<1>  | SHUT_UP_Z2<2>.EXP
INPUTMC | 3 | 13 | 12 | 13 | 11 | 0 | 1
INPUTP | 7 | 155 | 157 | 91 | 107 | 101 | 97 | 99
EXPORTS | 1 | 0 | 17
IMPORTS | 1 | 0 | 1
EQ | 9 | 
       EXP24_.EXP  =  UDS & LDS
	# A<5> & !A<1>
	# AUTO_CONFIG_Z2_DONE<0> & !A<2> & !A<1>
	# A<4> & !A<1> & !A<3>
	# AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & 
	!A<4> & !A<1>
;Imported pterms FB1_2
	# !AUTO_CONFIG_Z2_DONE<0> & A<2> & !A<5> & !A<4> & 
	A<1>

MACROCELL | 0 | 2 | EXP25_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 0 | 3
INPUTS | 15 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | D<15>.PIN  | CP_BASEADR<7>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS
INPUTMC | 4 | 13 | 12 | 13 | 11 | 0 | 3 | 4 | 5
INPUTP | 11 | 158 | 152 | 89 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157
EXPORTS | 1 | 0 | 3
EQ | 9 | 
       EXP25_.EXP  =  !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<15>.PIN & !CP_BASEADR<7> & !UDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & D<15>.PIN & !CP_BASEADR<7> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>
	# !RW & !AS & AUTO_CONFIG_Z2_DONE<0> & 
	!AUTO_CONFIG_Z2_DONE<1> & !D<15>.PIN & CP_BASEADR<7> & !LDS & !A<2> & !A<5> & 
	!A<4> & !A<1> & AUTOCONFIG_Z2_ACCESS & A<6> & A<3>

MACROCELL | 1 | 10 | EXP26_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 9
INPUTS | 6 | RW  | AS  | FCS  | AUTOCONFIG_Z2_ACCESS  | Z3_DATA<22>  | LAN_ACCESS
INPUTMC | 3 | 4 | 5 | 10 | 6 | 11 | 15
INPUTP | 3 | 158 | 152 | 147
EXPORTS | 1 | 1 | 9
EQ | 2 | 
       EXP26_.EXP  =  RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<22> & !FCS & LAN_ACCESS

MACROCELL | 1 | 12 | EXP27_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 11
INPUTS | 6 | RW  | AS  | FCS  | AUTOCONFIG_Z2_ACCESS  | Z3_DATA<19>  | LAN_ACCESS
INPUTMC | 3 | 4 | 5 | 10 | 12 | 11 | 15
INPUTP | 3 | 158 | 152 | 147
EXPORTS | 1 | 1 | 11
EQ | 2 | 
       EXP27_.EXP  =  RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<19> & !FCS & LAN_ACCESS

MACROCELL | 1 | 15 | EXP28_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 14
INPUTS | 7 | FCS  | DQ<1>.PIN  | RW  | AS  | AUTOCONFIG_Z2_ACCESS  | LAN_ACCESS  | Z3_DATA<17>
INPUTMC | 3 | 4 | 5 | 11 | 15 | 15 | 12
INPUTP | 4 | 147 | 216 | 158 | 152
EXPORTS | 1 | 1 | 14
EQ | 4 | 
       EXP28_.EXP  =  FCS & DQ<1>.PIN
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
	# RW & Z3_DATA<17> & !FCS & LAN_ACCESS

MACROCELL | 1 | 17 | EXP29_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 1 | 16
INPUTS | 6 | RW  | AS  | FCS  | AUTOCONFIG_Z2_ACCESS  | Z3_DATA<24>  | LAN_ACCESS
INPUTMC | 3 | 4 | 5 | 15 | 8 | 11 | 15
INPUTP | 3 | 158 | 152 | 147
EXPORTS | 1 | 1 | 16
EQ | 2 | 
       EXP29_.EXP  =  RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<24> & !FCS & LAN_ACCESS

MACROCELL | 3 | 2 | EXP30_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 1
INPUTS | 7 | FCS  | DQ<0>.PIN  | RW  | AS  | AUTOCONFIG_Z2_ACCESS  | LAN_ACCESS  | Z3_DATA<16>
INPUTMC | 3 | 4 | 5 | 11 | 15 | 15 | 13
INPUTP | 4 | 147 | 217 | 158 | 152
EXPORTS | 1 | 3 | 1
EQ | 4 | 
       EXP30_.EXP  =  FCS & DQ<0>.PIN
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
	# RW & Z3_DATA<16> & !FCS & LAN_ACCESS

MACROCELL | 3 | 14 | EXP31_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 15
INPUTS | 8 | UDS  | LDS  | A<2>  | A<5>  | A<4>  | A<1>  | A<3>  | A_LAN_5_OBUF.EXP
INPUTMC | 1 | 3 | 13
INPUTP | 7 | 155 | 157 | 101 | 91 | 97 | 107 | 99
EXPORTS | 1 | 3 | 15
IMPORTS | 1 | 3 | 13
EQ | 13 | 
       EXP31_.EXP  =  UDS & LDS
	# !A<2> & A<5>
	# A<5> & A<4>
	# A<5> & A<1>
	# !A<4> & !A<1> & A<3>
;Imported pterms FB4_14
	# !A<2> & A<4> & !A<1> & !A<3>
	# AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & 
	!A<2> & A<4> & A<1>
	# AUTO_CONFIG_Z2_DONE<0> & !AUTO_CONFIG_Z2_DONE<1> & 
	A<2> & !A<4> & A<1>
	# AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & 
	A<2> & !A<5> & !A<4> & !A<1>

MACROCELL | 3 | 16 | EXP32_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 3 | 15
INPUTS | 6 | A<2>  | A<4>  | A<3>  | AUTO_CONFIG_Z2_DONE<0>  | A<1>  | AUTO_CONFIG_Z2_DONE<1>
INPUTMC | 2 | 13 | 12 | 13 | 11
INPUTP | 4 | 101 | 97 | 99 | 107
EXPORTS | 1 | 3 | 15
EQ | 5 | 
       EXP32_.EXP  =  A<2> & !A<4> & A<3>
	# !AUTO_CONFIG_Z2_DONE<0> & A<4> & !A<1> & !A<3>
	# !AUTO_CONFIG_Z2_DONE<1> & A<4> & !A<1> & !A<3>
	# A<2> & A<4> & A<1> & !A<3>
	# !A<2> & A<4> & A<1> & A<3>

MACROCELL | 4 | 0 | EXP33_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 4 | 1
INPUTS | 6 | CP_BASEADR<0>  | A<16>.PIN  | CP_BASEADR<2>  | A<18>.PIN  | CP_BASEADR<3>  | A<19>.PIN
INPUTMC | 3 | 0 | 15 | 3 | 12 | 3 | 10
INPUTP | 3 | 175 | 171 | 169
EXPORTS | 1 | 4 | 1
EQ | 5 | 
       EXP33_.EXP  =  CP_BASEADR<0> & !A<16>.PIN
	# CP_BASEADR<2> & !A<18>.PIN
	# !CP_BASEADR<2> & A<18>.PIN
	# CP_BASEADR<3> & !A<19>.PIN
	# !CP_BASEADR<3> & A<19>.PIN

MACROCELL | 4 | 2 | EXP34_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 4 | 1
INPUTS | 7 | CP_BASEADR<4>  | A<20>.PIN  | CP_BASEADR<5>  | A<21>.PIN  | CP_BASEADR<7>  | A<23>.PIN  | D_8_IOBUFE/D_8_IOBUFE_TRST.EXP
INPUTMC | 4 | 0 | 10 | 0 | 8 | 0 | 3 | 4 | 3
INPUTP | 3 | 167 | 163 | 161
EXPORTS | 1 | 4 | 1
IMPORTS | 1 | 4 | 3
EQ | 11 | 
       EXP34_.EXP  =  CP_BASEADR<4> & !A<20>.PIN
	# !CP_BASEADR<4> & A<20>.PIN
	# CP_BASEADR<5> & !A<21>.PIN
	# !CP_BASEADR<5> & A<21>.PIN
	# !CP_BASEADR<7> & A<23>.PIN
;Imported pterms FB5_4
	# CP_BASEADR<1> & !A<17>.PIN
	# !CP_BASEADR<1> & A<17>.PIN
	# CP_BASEADR<6> & !A<22>.PIN
	# !CP_BASEADR<6> & A<22>.PIN
	# CP_BASEADR<7> & !A<23>.PIN

MACROCELL | 4 | 8 | EXP35_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 4 | 9
INPUTS | 4 | RW  | AS  | FCS  | AUTOCONFIG_Z2_ACCESS
INPUTMC | 1 | 4 | 5
INPUTP | 3 | 158 | 152 | 147
EXPORTS | 1 | 4 | 9
EQ | 1 | 
       EXP35_.EXP  =  RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS

MACROCELL | 4 | 10 | EXP36_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 4 | 9
INPUTS | 4 | RW  | Z3_DATA<18>  | FCS  | LAN_ACCESS
INPUTMC | 2 | 15 | 11 | 11 | 15
INPUTP | 2 | 158 | 147
EXPORTS | 1 | 4 | 9
EQ | 1 | 
       EXP36_.EXP  =  RW & Z3_DATA<18> & !FCS & LAN_ACCESS

MACROCELL | 4 | 12 | EXP37_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 4 | 11
INPUTS | 6 | RW  | AS  | FCS  | AUTOCONFIG_Z2_ACCESS  | Z3_DATA<25>  | LAN_ACCESS
INPUTMC | 3 | 4 | 5 | 15 | 6 | 11 | 15
INPUTP | 3 | 158 | 152 | 147
EXPORTS | 1 | 4 | 11
EQ | 2 | 
       EXP37_.EXP  =  RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & Z3_DATA<25> & !FCS & LAN_ACCESS

MACROCELL | 4 | 15 | EXP38_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 4 | 14
INPUTS | 7 | FCS  | DQ<3>.PIN  | RW  | AS  | AUTOCONFIG_Z2_ACCESS  | LAN_ACCESS  | Z3_DATA<27>
INPUTMC | 3 | 4 | 5 | 11 | 15 | 10 | 5
INPUTP | 4 | 147 | 219 | 158 | 152
EXPORTS | 1 | 4 | 14
EQ | 4 | 
       EXP38_.EXP  =  FCS & DQ<3>.PIN
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS
	# RW & Z3_DATA<27> & !FCS & LAN_ACCESS

MACROCELL | 5 | 0 | EXP39_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 5 | 17
INPUTS | 7 | IDE_BASEADR<4>  | A<20>.PIN  | IDE_BASEADR<5>  | A<21>.PIN  | IDE_BASEADR<7>  | A<23>.PIN  | ROM_B_0_OBUF$BUF6.EXP
INPUTMC | 4 | 3 | 6 | 3 | 3 | 3 | 0 | 5 | 1
INPUTP | 3 | 167 | 163 | 161
EXPORTS | 1 | 5 | 17
IMPORTS | 1 | 5 | 1
EQ | 10 | 
       EXP39_.EXP  =  IDE_BASEADR<4> & !A<20>.PIN
	# !IDE_BASEADR<4> & A<20>.PIN
	# IDE_BASEADR<5> & !A<21>.PIN
	# !IDE_BASEADR<5> & A<21>.PIN
	# !IDE_BASEADR<7> & A<23>.PIN
;Imported pterms FB6_2
	# IDE_BASEADR<3> & !A<19>.PIN
	# !IDE_BASEADR<3> & A<19>.PIN
	# IDE_BASEADR<6> & !A<22>.PIN
	# !IDE_BASEADR<6> & A<22>.PIN

MACROCELL | 5 | 16 | EXP40_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 5 | 17
INPUTS | 7 | IDE_BASEADR<0>  | A<16>.PIN  | IDE_BASEADR<1>  | A<17>.PIN  | IDE_BASEADR<2>  | A<18>.PIN  | INT_VECTOR_CYCLE.EXP
INPUTMC | 4 | 1 | 6 | 1 | 8 | 3 | 9 | 5 | 15
INPUTP | 3 | 175 | 172 | 171
EXPORTS | 1 | 5 | 17
IMPORTS | 1 | 5 | 15
EQ | 7 | 
       EXP40_.EXP  =  IDE_BASEADR<0> & !A<16>.PIN
	# IDE_BASEADR<1> & !A<17>.PIN
	# !IDE_BASEADR<1> & A<17>.PIN
	# IDE_BASEADR<2> & !A<18>.PIN
	# !IDE_BASEADR<2> & A<18>.PIN
;Imported pterms FB6_16
	# IDE_BASEADR<7> & !A<23>.PIN

MACROCELL | 6 | 1 | EXP41_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 6 | 2
INPUTS | 8 | AS  | FCS  | DQ<5>.PIN  | RW  | Z3_DATA<29>  | LAN_ACCESS  | AUTOCONFIG_Z2_ACCESS  | D_Z2_OUT<1>
INPUTMC | 4 | 10 | 1 | 11 | 15 | 4 | 5 | 3 | 15
INPUTP | 4 | 152 | 147 | 221 | 158
EXPORTS | 1 | 6 | 2
EQ | 6 | 
       EXP41_.EXP  =  AS & FCS & DQ<5>.PIN
	# RW & Z3_DATA<29> & !FCS & LAN_ACCESS
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS & 
	D_Z2_OUT<1>
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & 
	D_Z2_OUT<1>

MACROCELL | 6 | 6 | EXP42_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 6 | 7
INPUTS | 14 | RW  | AS  | AUTO_CONFIG_Z2_DONE<0>  | D<9>.PIN  | LAN_BASEADR<9>  | UDS  | A<2>  | A<5>  | A<4>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS
INPUTMC | 3 | 13 | 12 | 6 | 7 | 4 | 5
INPUTP | 11 | 158 | 152 | 73 | 155 | 101 | 91 | 97 | 107 | 98 | 99 | 157
EXPORTS | 1 | 6 | 7
EQ | 9 | 
       EXP42_.EXP  =  !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<9>.PIN & 
	!LAN_BASEADR<9> & !UDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & D<9>.PIN & 
	!LAN_BASEADR<9> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>
	# !RW & !AS & !AUTO_CONFIG_Z2_DONE<0> & !D<9>.PIN & 
	LAN_BASEADR<9> & !LDS & A<2> & !A<5> & !A<4> & !A<1> & 
	AUTOCONFIG_Z2_ACCESS & A<6> & !A<3>

MACROCELL | 6 | 12 | EXP43_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 6 | 11
INPUTS | 8 | AS  | FCS  | DQ<7>.PIN  | AUTOCONFIG_Z2_ACCESS  | RW  | Z3_DATA<31>  | LAN_ACCESS  | D_Z2_OUT<3>
INPUTMC | 4 | 4 | 5 | 12 | 2 | 11 | 15 | 13 | 1
INPUTP | 4 | 152 | 147 | 226 | 158
EXPORTS | 1 | 6 | 11
EQ | 7 | 
       EXP43_.EXP  =  AS & FCS & DQ<7>.PIN
	# FCS & !AUTOCONFIG_Z2_ACCESS & DQ<7>.PIN
	# RW & Z3_DATA<31> & !FCS & LAN_ACCESS
	# RW & !AS & FCS & AUTOCONFIG_Z2_ACCESS & 
	D_Z2_OUT<3>
	# RW & !AS & AUTOCONFIG_Z2_ACCESS & !LAN_ACCESS & 
	D_Z2_OUT<3>

MACROCELL | 7 | 3 | EXP44_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 7 | 2
INPUTS | 11 | RW  | RESET  | D<14>.PIN  | FCS  | UDS  | LAN_ACCESS  | DQ_DATA<14>  | LDS  | DS1  | DS0  | LAN_WRH_OBUF.EXP
INPUTMC | 3 | 11 | 15 | 7 | 11 | 7 | 4
INPUTP | 8 | 158 | 263 | 81 | 147 | 155 | 157 | 148 | 170
EXPORTS | 1 | 7 | 2
IMPORTS | 1 | 7 | 4
EQ | 12 | 
       EXP44_.EXP  =  RW & RESET & D<14>.PIN
	# RESET & D<14>.PIN & FCS
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<14>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<14>
	# RESET & D<14>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB8_5
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<14>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<14>

MACROCELL | 7 | 5 | EXP45_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 7 | 6
INPUTS | 9 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DS1  | LAN_SM_FSM_FFd4  | DS0  | RW  | UDS  | LDS
INPUTMC | 4 | 14 | 3 | 14 | 4 | 11 | 5 | 7 | 6
INPUTP | 5 | 148 | 170 | 158 | 155 | 157
EXPORTS | 1 | 7 | 6
EQ | 10 | 
       EXP45_.EXP  =  LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
	# !DS1 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
	# !DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
	# RW & !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2
	# RW & !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2

MACROCELL | 7 | 12 | EXP46_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 7 | 11
INPUTS | 10 | D<14>.PIN  | UDS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd2  | LDS  | D<6>.PIN  | A<14>.PIN  | DQ_DATA<4>.EXP
INPUTMC | 5 | 14 | 3 | 7 | 6 | 11 | 17 | 14 | 4 | 7 | 13
INPUTP | 5 | 81 | 155 | 157 | 26 | 125
EXPORTS | 1 | 7 | 11
IMPORTS | 1 | 7 | 13
EQ | 13 | 
       EXP46_.EXP  =  D<14>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<14>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<6>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<6>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	A<14>.PIN & DQ_SWAP & !LAN_SM_FSM_FFd2
;Imported pterms FB8_14
	# UDS & LDS & A<22>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2

MACROCELL | 7 | 14 | EXP47_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 7 | 13
INPUTS | 12 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ_DATA<4>  | LAN_SM_FSM_FFd4  | DQ_SWAP  | A<20>.PIN  | A<12>.PIN  | D<12>.PIN  | UDS  | LAN_SM_FSM_FFd2  | LDS  | EXP48_.EXP
INPUTMC | 7 | 14 | 3 | 11 | 5 | 7 | 13 | 7 | 6 | 11 | 17 | 14 | 4 | 7 | 15
INPUTP | 5 | 167 | 115 | 78 | 155 | 157
EXPORTS | 1 | 7 | 13
IMPORTS | 1 | 7 | 15
EQ | 18 | 
       EXP47_.EXP  =  !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<4>
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<20>.PIN
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<12>.PIN
	# D<12>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<12>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
;Imported pterms FB8_16
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<4>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<4>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<20>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<12>.PIN

MACROCELL | 7 | 15 | EXP48_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 7 | 14
INPUTS | 9 | UDS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd2  | D<4>.PIN  | LDS  | A<20>.PIN  | A<12>.PIN
INPUTMC | 4 | 14 | 3 | 7 | 6 | 11 | 17 | 14 | 4
INPUTP | 5 | 155 | 38 | 157 | 167 | 115
EXPORTS | 1 | 7 | 14
EQ | 8 | 
       EXP48_.EXP  =  !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<4>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<4>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<20>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<12>.PIN

MACROCELL | 7 | 16 | EXP49_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 7 | 17
INPUTS | 9 | UDS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd2  | D<4>.PIN  | LDS  | A<12>.PIN  | A<20>.PIN
INPUTMC | 4 | 14 | 3 | 7 | 6 | 11 | 17 | 14 | 4
INPUTP | 5 | 155 | 38 | 157 | 115 | 167
EXPORTS | 1 | 7 | 17
EQ | 8 | 
       EXP49_.EXP  =  !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<4>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<4>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<12>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<20>.PIN

MACROCELL | 7 | 17 | EXP50_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 7 | 0
INPUTS | 12 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ_DATA<12>  | LAN_SM_FSM_FFd4  | DQ_SWAP  | A<12>.PIN  | A<20>.PIN  | D<12>.PIN  | UDS  | LAN_SM_FSM_FFd2  | LDS  | EXP49_.EXP
INPUTMC | 7 | 14 | 3 | 11 | 5 | 7 | 0 | 7 | 6 | 11 | 17 | 14 | 4 | 7 | 16
INPUTP | 5 | 115 | 167 | 78 | 155 | 157
EXPORTS | 1 | 7 | 0
IMPORTS | 1 | 7 | 16
EQ | 18 | 
       EXP50_.EXP  =  !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<12>
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<12>.PIN
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<20>.PIN
	# D<12>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<12>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
;Imported pterms FB8_17
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<4>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<4>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<12>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<20>.PIN

MACROCELL | 9 | 3 | EXP51_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 9 | 2
INPUTS | 10 | RW  | RESET  | UDS  | FCS  | LAN_ACCESS  | DQ_DATA<0>  | LDS  | DS1  | DS0  | D<0>.PIN
INPUTMC | 2 | 11 | 15 | 10 | 17
INPUTP | 8 | 158 | 263 | 155 | 147 | 157 | 148 | 170 | 4
EXPORTS | 1 | 9 | 2
EQ | 9 | 
       EXP51_.EXP  =  !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<0>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<0>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<0>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<0>
	# RESET & UDS & LDS & DS1 & DS0 & D<0>.PIN

MACROCELL | 9 | 6 | EXP52_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 9 | 5
INPUTS | 11 | RW  | RESET  | D<2>.PIN  | FCS  | LAN_ACCESS  | UDS  | DQ_DATA<2>  | LDS  | DS1  | DS0  | DQ_5_IOBUFE.EXP
INPUTMC | 3 | 11 | 15 | 15 | 16 | 9 | 7
INPUTP | 8 | 158 | 263 | 71 | 147 | 155 | 157 | 148 | 170
EXPORTS | 1 | 9 | 5
IMPORTS | 1 | 9 | 7
EQ | 13 | 
       EXP52_.EXP  =  RW & RESET & D<2>.PIN
	# RESET & FCS & D<2>.PIN
	# RESET & !LAN_ACCESS & D<2>.PIN
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<2>
	# RESET & UDS & LDS & DS1 & DS0 & D<2>.PIN
;Imported pterms FB10_8
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<2>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<2>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<2>

MACROCELL | 9 | 8 | EXP53_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 9 | 7
INPUTS | 11 | RW  | RESET  | D<5>.PIN  | FCS  | UDS  | LAN_ACCESS  | DQ_DATA<5>  | LDS  | DS1  | DS0  | _19_.EXP
INPUTMC | 3 | 11 | 15 | 12 | 6 | 9 | 9
INPUTP | 8 | 158 | 263 | 37 | 147 | 155 | 157 | 148 | 170
EXPORTS | 1 | 9 | 7
IMPORTS | 1 | 9 | 9
EQ | 12 | 
       EXP53_.EXP  =  RW & RESET & D<5>.PIN
	# RESET & FCS & D<5>.PIN
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<5>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<5>
	# RESET & UDS & LDS & DS1 & DS0 & D<5>.PIN
;Imported pterms FB10_10
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<5>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<5>

MACROCELL | 9 | 12 | EXP54_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 9 | 11
INPUTS | 11 | RW  | RESET  | D<6>.PIN  | FCS  | LAN_ACCESS  | UDS  | DQ_DATA<6>  | LDS  | DS1  | DS0  | _18_.EXP
INPUTMC | 3 | 11 | 15 | 7 | 8 | 9 | 13
INPUTP | 8 | 158 | 263 | 26 | 147 | 155 | 157 | 148 | 170
EXPORTS | 1 | 9 | 11
IMPORTS | 1 | 9 | 13
EQ | 13 | 
       EXP54_.EXP  =  RW & RESET & D<6>.PIN
	# RESET & FCS & D<6>.PIN
	# RESET & !LAN_ACCESS & D<6>.PIN
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<6>
	# RESET & UDS & LDS & DS1 & DS0 & D<6>.PIN
;Imported pterms FB10_14
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<6>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<6>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<6>

MACROCELL | 9 | 14 | EXP55_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 9 | 15
INPUTS | 8 | RW  | RESET  | LDS  | FCS  | LAN_ACCESS  | DQ_DATA<10>  | DS1  | DS0
INPUTMC | 2 | 11 | 15 | 15 | 15
INPUTP | 6 | 158 | 263 | 157 | 147 | 148 | 170
EXPORTS | 1 | 9 | 15
EQ | 6 | 
       EXP55_.EXP  =  !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<10>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<10>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<10>

MACROCELL | 9 | 15 | EXP56_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 9 | 16
INPUTS | 11 | RW  | RESET  | D<10>.PIN  | FCS  | LAN_ACCESS  | UDS  | DQ_DATA<10>  | LDS  | DS1  | DS0  | EXP55_.EXP
INPUTMC | 3 | 11 | 15 | 15 | 15 | 9 | 14
INPUTP | 8 | 158 | 263 | 74 | 147 | 155 | 157 | 148 | 170
EXPORTS | 1 | 9 | 16
IMPORTS | 1 | 9 | 14
EQ | 13 | 
       EXP56_.EXP  =  RW & RESET & D<10>.PIN
	# RESET & D<10>.PIN & FCS
	# RESET & D<10>.PIN & !LAN_ACCESS
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<10>
	# RESET & D<10>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB10_15
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<10>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<10>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<10>

MACROCELL | 9 | 17 | EXP57_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 9 | 0
INPUTS | 11 | RW  | RESET  | D<4>.PIN  | FCS  | LAN_ACCESS  | UDS  | DQ_DATA<4>  | LDS  | DS1  | DS0  | DQ_10_IOBUFE.EXP
INPUTMC | 3 | 11 | 15 | 7 | 13 | 9 | 16
INPUTP | 8 | 158 | 263 | 38 | 147 | 155 | 157 | 148 | 170
EXPORTS | 1 | 9 | 0
IMPORTS | 1 | 9 | 16
EQ | 13 | 
       EXP57_.EXP  =  RW & RESET & D<4>.PIN
	# RESET & FCS & D<4>.PIN
	# RESET & !LAN_ACCESS & D<4>.PIN
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<4>
	# RESET & UDS & LDS & DS1 & DS0 & D<4>.PIN
;Imported pterms FB10_17
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<4>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<4>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<4>

MACROCELL | 10 | 14 | EXP58_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 10 | 15
INPUTS | 12 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ_DATA<8>  | A<16>.PIN  | LAN_SM_FSM_FFd4  | DQ_SWAP  | A<8>.PIN  | UDS  | LAN_SM_FSM_FFd2  | D<0>.PIN  | LDS  | ROM_B_0_OBUF.EXP
INPUTMC | 7 | 14 | 3 | 11 | 5 | 10 | 15 | 7 | 6 | 11 | 17 | 14 | 4 | 10 | 13
INPUTP | 5 | 175 | 106 | 155 | 4 | 157
EXPORTS | 1 | 10 | 15
IMPORTS | 1 | 10 | 13
EQ | 18 | 
       EXP58_.EXP  =  !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<8>
	# A<16>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<8>.PIN
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<0>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<0>.PIN
;Imported pterms FB11_14
	# D<8>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<8>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & A<16>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<8>.PIN

MACROCELL | 11 | 0 | EXP59_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 11 | 17
INPUTS | 7 | D<11>.PIN  | LAN_BASEADR<11>  | D<12>.PIN  | LAN_BASEADR<12>  | D<13>.PIN  | LAN_BASEADR<13>  | ROM_B_0_OBUF$BUF4.EXP
INPUTMC | 4 | 6 | 16 | 6 | 15 | 6 | 14 | 11 | 1
INPUTP | 3 | 77 | 78 | 80
EXPORTS | 1 | 11 | 17
IMPORTS | 1 | 11 | 1
EQ | 10 | 
       EXP59_.EXP  =  D<11>.PIN & !LAN_BASEADR<11>
	# !D<11>.PIN & LAN_BASEADR<11>
	# D<12>.PIN & !LAN_BASEADR<12>
	# !D<12>.PIN & LAN_BASEADR<12>
	# D<13>.PIN & !LAN_BASEADR<13>
;Imported pterms FB12_2
	# D<10>.PIN & !LAN_BASEADR<10>
	# !D<10>.PIN & LAN_BASEADR<10>
	# D<15>.PIN & !LAN_BASEADR<15>
	# !D<15>.PIN & LAN_BASEADR<15>

MACROCELL | 11 | 3 | EXP60_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 11 | 4
INPUTS | 11 | RW  | RESET  | D<15>.PIN  | UDS  | FCS  | LAN_ACCESS  | DQ_DATA<15>  | LDS  | DS1  | DS0  | LAN_SM_RST.EXP
INPUTMC | 3 | 11 | 15 | 12 | 11 | 11 | 2
INPUTP | 8 | 158 | 263 | 89 | 155 | 147 | 157 | 148 | 170
EXPORTS | 1 | 11 | 4
IMPORTS | 1 | 11 | 2
EQ | 11 | 
       EXP60_.EXP  =  RW & RESET & D<15>.PIN
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<15>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<15>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<15>
	# RESET & D<15>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB12_3
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<15>

MACROCELL | 11 | 6 | EXP61_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 11 | 7
INPUTS | 11 | RW  | RESET  | D<13>.PIN  | FCS  | UDS  | LAN_ACCESS  | DQ_DATA<13>  | LDS  | DS1  | DS0  | LAN_SM_FSM_FFd1.EXP
INPUTMC | 3 | 11 | 15 | 12 | 17 | 11 | 5
INPUTP | 8 | 158 | 263 | 80 | 147 | 155 | 157 | 148 | 170
EXPORTS | 1 | 11 | 7
IMPORTS | 1 | 11 | 5
EQ | 12 | 
       EXP61_.EXP  =  RW & RESET & D<13>.PIN
	# RESET & D<13>.PIN & FCS
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<13>
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<13>
	# RESET & D<13>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB12_6
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<13>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<13>

MACROCELL | 11 | 8 | EXP62_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 11 | 9
INPUTS | 11 | RW  | RESET  | D<11>.PIN  | FCS  | LAN_ACCESS  | UDS  | DQ_DATA<11>  | LDS  | DS1  | DS0  | DQ_13_IOBUFE.EXP
INPUTMC | 3 | 11 | 15 | 12 | 15 | 11 | 7
INPUTP | 8 | 158 | 263 | 77 | 147 | 155 | 157 | 148 | 170
EXPORTS | 1 | 11 | 9
IMPORTS | 1 | 11 | 7
EQ | 13 | 
       EXP62_.EXP  =  RW & RESET & D<11>.PIN
	# RESET & D<11>.PIN & FCS
	# RESET & D<11>.PIN & !LAN_ACCESS
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<11>
	# RESET & D<11>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB12_8
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<11>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<11>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<11>

MACROCELL | 11 | 10 | EXP63_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 11 | 11
INPUTS | 11 | RW  | RESET  | D<9>.PIN  | FCS  | LAN_ACCESS  | UDS  | DQ_DATA<9>  | LDS  | DS1  | DS0  | DQ_11_IOBUFE.EXP
INPUTMC | 3 | 11 | 15 | 14 | 9 | 11 | 9
INPUTP | 8 | 158 | 263 | 73 | 147 | 155 | 157 | 148 | 170
EXPORTS | 1 | 11 | 11
IMPORTS | 1 | 11 | 9
EQ | 13 | 
       EXP63_.EXP  =  RW & RESET & D<9>.PIN
	# RESET & D<9>.PIN & FCS
	# RESET & D<9>.PIN & !LAN_ACCESS
	# !RW & RESET & !UDS & !FCS & LAN_ACCESS & 
	DQ_DATA<9>
	# RESET & D<9>.PIN & UDS & LDS & DS1 & DS0
;Imported pterms FB12_10
	# !RW & RESET & !LDS & !FCS & LAN_ACCESS & 
	DQ_DATA<9>
	# !RW & RESET & !DS1 & !FCS & LAN_ACCESS & 
	DQ_DATA<9>
	# !RW & RESET & !DS0 & !FCS & LAN_ACCESS & 
	DQ_DATA<9>

MACROCELL | 11 | 12 | EXP64_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 11 | 13
INPUTS | 7 | D<10>.PIN  | LAN_BASEADR<10>  | D<13>.PIN  | LAN_BASEADR<13>  | D<14>.PIN  | LAN_BASEADR<14>  | DQ_9_IOBUFE.EXP
INPUTMC | 4 | 6 | 17 | 6 | 14 | 6 | 10 | 11 | 11
INPUTP | 3 | 74 | 80 | 81
EXPORTS | 1 | 11 | 13
IMPORTS | 1 | 11 | 11
EQ | 9 | 
       EXP64_.EXP  =  D<10>.PIN & !LAN_BASEADR<10>
	# D<13>.PIN & !LAN_BASEADR<13>
	# !D<13>.PIN & LAN_BASEADR<13>
	# D<14>.PIN & !LAN_BASEADR<14>
	# !D<14>.PIN & LAN_BASEADR<14>
;Imported pterms FB12_12
	# !D<10>.PIN & LAN_BASEADR<10>
	# D<15>.PIN & !LAN_BASEADR<15>
	# !D<15>.PIN & LAN_BASEADR<15>

MACROCELL | 11 | 13 | EXP65_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 11 | 14
INPUTS | 7 | D<9>.PIN  | LAN_BASEADR<9>  | D<11>.PIN  | LAN_BASEADR<11>  | D<12>.PIN  | LAN_BASEADR<12>  | EXP64_.EXP
INPUTMC | 4 | 6 | 7 | 6 | 16 | 6 | 15 | 11 | 12
INPUTP | 3 | 73 | 77 | 78
EXPORTS | 1 | 11 | 14
IMPORTS | 1 | 11 | 12
EQ | 15 | 
       EXP65_.EXP  =  !D<9>.PIN & LAN_BASEADR<9>
	# D<11>.PIN & !LAN_BASEADR<11>
	# !D<11>.PIN & LAN_BASEADR<11>
	# D<12>.PIN & !LAN_BASEADR<12>
	# !D<12>.PIN & LAN_BASEADR<12>
;Imported pterms FB12_13
	# D<10>.PIN & !LAN_BASEADR<10>
	# D<13>.PIN & !LAN_BASEADR<13>
	# !D<13>.PIN & LAN_BASEADR<13>
	# D<14>.PIN & !LAN_BASEADR<14>
	# !D<14>.PIN & LAN_BASEADR<14>
;Imported pterms FB12_12
	# !D<10>.PIN & LAN_BASEADR<10>
	# D<15>.PIN & !LAN_BASEADR<15>
	# !D<15>.PIN & LAN_BASEADR<15>

MACROCELL | 11 | 14 | EXP66_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 11 | 15
INPUTS | 7 | Z3  | SHUT_UP_Z2<0>  | D<8>.PIN  | LAN_BASEADR<8>  | D<9>.PIN  | LAN_BASEADR<9>  | EXP65_.EXP
INPUTMC | 4 | 8 | 11 | 6 | 8 | 6 | 7 | 11 | 13
INPUTP | 3 | 151 | 32 | 73
EXPORTS | 1 | 11 | 15
IMPORTS | 1 | 11 | 13
EQ | 21 | 
       EXP66_.EXP  =  !Z3
	# SHUT_UP_Z2<0>
	# D<8>.PIN & !LAN_BASEADR<8>
	# !D<8>.PIN & LAN_BASEADR<8>
	# D<9>.PIN & !LAN_BASEADR<9>
;Imported pterms FB12_14
	# !D<9>.PIN & LAN_BASEADR<9>
	# D<11>.PIN & !LAN_BASEADR<11>
	# !D<11>.PIN & LAN_BASEADR<11>
	# D<12>.PIN & !LAN_BASEADR<12>
	# !D<12>.PIN & LAN_BASEADR<12>
;Imported pterms FB12_13
	# D<10>.PIN & !LAN_BASEADR<10>
	# D<13>.PIN & !LAN_BASEADR<13>
	# !D<13>.PIN & LAN_BASEADR<13>
	# D<14>.PIN & !LAN_BASEADR<14>
	# !D<14>.PIN & LAN_BASEADR<14>
;Imported pterms FB12_12
	# !D<10>.PIN & LAN_BASEADR<10>
	# D<15>.PIN & !LAN_BASEADR<15>
	# !D<15>.PIN & LAN_BASEADR<15>

MACROCELL | 11 | 16 | EXP67_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 11 | 17
INPUTS | 6 | A<13>.PIN  | D<8>.PIN  | LAN_BASEADR<8>  | D<9>.PIN  | LAN_BASEADR<9>  | LAN_ACCESS.EXP
INPUTMC | 3 | 6 | 8 | 6 | 7 | 11 | 15
INPUTP | 3 | 123 | 32 | 73
EXPORTS | 1 | 11 | 17
IMPORTS | 1 | 11 | 15
EQ | 9 | 
       EXP67_.EXP  =  !A<13>.PIN
	# D<8>.PIN & !LAN_BASEADR<8>
	# !D<8>.PIN & LAN_BASEADR<8>
	# D<9>.PIN & !LAN_BASEADR<9>
	# !D<9>.PIN & LAN_BASEADR<9>
;Imported pterms FB12_16
	# !D<13>.PIN & LAN_BASEADR<13>
	# D<14>.PIN & !LAN_BASEADR<14>
	# !D<14>.PIN & LAN_BASEADR<14>

MACROCELL | 12 | 0 | EXP68_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 12 | 17
INPUTS | 12 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ_DATA<13>  | A<21>.PIN  | LAN_SM_FSM_FFd4  | DQ_SWAP  | A<13>.PIN  | D<13>.PIN  | UDS  | LAN_SM_FSM_FFd2  | LDS  | CP_RD_OBUF.EXP
INPUTMC | 7 | 14 | 3 | 11 | 5 | 12 | 17 | 7 | 6 | 11 | 17 | 14 | 4 | 12 | 1
INPUTP | 5 | 163 | 123 | 80 | 155 | 157
EXPORTS | 1 | 12 | 17
IMPORTS | 1 | 12 | 1
EQ | 18 | 
       EXP68_.EXP  =  !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<13>
	# A<21>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & A<13>.PIN & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# D<13>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<13>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
;Imported pterms FB13_2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<5>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<5>.PIN
	# UDS & LDS & A<21>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	A<13>.PIN & DQ_SWAP & !LAN_SM_FSM_FFd2

MACROCELL | 12 | 5 | EXP69_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 12 | 6
INPUTS | 12 | A<21>.PIN  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd1  | A<13>.PIN  | D<13>.PIN  | UDS  | LAN_SM_FSM_FFd2  | LDS  | D<5>.PIN  | LAN_INT_ENABLE.EXP
INPUTMC | 6 | 14 | 3 | 7 | 6 | 11 | 17 | 11 | 5 | 14 | 4 | 12 | 4
INPUTP | 6 | 163 | 123 | 80 | 155 | 157 | 37
EXPORTS | 1 | 12 | 6
IMPORTS | 1 | 12 | 4
EQ | 17 | 
       EXP69_.EXP  =  A<21>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & A<13>.PIN & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# D<13>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<13>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<5>.PIN
;Imported pterms FB13_5
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<5>.PIN
	# UDS & LDS & A<21>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	A<13>.PIN & !DQ_SWAP & !LAN_SM_FSM_FFd2

MACROCELL | 12 | 8 | EXP70_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 12 | 9
INPUTS | 10 | D<11>.PIN  | LDS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd2  | UDS  | D<3>.PIN  | A<19>.PIN  | A<11>.PIN
INPUTMC | 4 | 14 | 3 | 7 | 6 | 11 | 17 | 14 | 4
INPUTP | 6 | 77 | 157 | 155 | 28 | 169 | 114
EXPORTS | 1 | 12 | 9
EQ | 10 | 
       EXP70_.EXP  =  D<11>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<3>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<3>.PIN
	# UDS & LDS & A<19>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<11>.PIN

MACROCELL | 12 | 9 | EXP71_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 12 | 10
INPUTS | 11 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_DATA<3>  | LAN_SM_FSM_FFd1  | A<19>.PIN  | DQ_SWAP  | A<11>.PIN  | D<11>.PIN  | UDS  | LAN_SM_FSM_FFd2  | EXP70_.EXP
INPUTMC | 7 | 14 | 3 | 7 | 6 | 12 | 10 | 11 | 5 | 11 | 17 | 14 | 4 | 12 | 8
INPUTP | 4 | 169 | 114 | 77 | 155
EXPORTS | 1 | 12 | 10
IMPORTS | 1 | 12 | 8
EQ | 19 | 
       EXP71_.EXP  =  LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<3>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<3>
	# A<19>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<11>.PIN
	# D<11>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
;Imported pterms FB13_9
	# D<11>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<3>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<3>.PIN
	# UDS & LDS & A<19>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<11>.PIN

MACROCELL | 12 | 12 | EXP72_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 12 | 11
INPUTS | 10 | D<15>.PIN  | UDS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd2  | LDS  | D<7>.PIN  | A<15>.PIN  | LAN_WRL_OBUF.EXP
INPUTMC | 5 | 14 | 3 | 7 | 6 | 11 | 17 | 14 | 4 | 12 | 13
INPUTP | 5 | 89 | 155 | 157 | 29 | 139
EXPORTS | 1 | 12 | 11
IMPORTS | 1 | 12 | 13
EQ | 13 | 
       EXP72_.EXP  =  D<15>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<15>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<7>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<7>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<15>.PIN
;Imported pterms FB13_14
	# UDS & LDS & A<23>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2

MACROCELL | 12 | 14 | EXP73_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 12 | 15
INPUTS | 11 | A<19>.PIN  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd1  | A<11>.PIN  | D<11>.PIN  | UDS  | LAN_SM_FSM_FFd2  | LDS  | D<3>.PIN
INPUTMC | 5 | 14 | 3 | 7 | 6 | 11 | 17 | 11 | 5 | 14 | 4
INPUTP | 6 | 169 | 114 | 77 | 155 | 157 | 28
EXPORTS | 1 | 12 | 15
EQ | 10 | 
       EXP73_.EXP  =  A<19>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<11>.PIN
	# D<11>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<11>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<3>.PIN

MACROCELL | 13 | 0 | EXP74_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 13 | 1
INPUTS | 11 | AS  | AUTO_CONFIG_Z2_DONE<0>  | UDS  | A<5>  | A<1>  | AUTOCONFIG_Z2_ACCESS  | A<6>  | A<3>  | LDS  | AUTO_CONFIG_Z2_DONE<1>  | A<2>
INPUTMC | 3 | 13 | 12 | 4 | 5 | 13 | 11
INPUTP | 8 | 152 | 155 | 91 | 107 | 98 | 99 | 157 | 101
EXPORTS | 1 | 13 | 1
EQ | 10 | 
       EXP74_.EXP  =  !AS & !AUTO_CONFIG_Z2_DONE<0> & !UDS & !A<5> & 
	A<1> & AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
	# !AS & !AUTO_CONFIG_Z2_DONE<0> & !LDS & !A<5> & 
	A<1> & AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
	# !AS & !AUTO_CONFIG_Z2_DONE<1> & !UDS & !A<5> & 
	A<1> & AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
	# !AS & !AUTO_CONFIG_Z2_DONE<1> & !LDS & !A<5> & 
	A<1> & AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>
	# !AS & !LDS & !A<2> & !A<5> & A<1> & 
	AUTOCONFIG_Z2_ACCESS & !A<6> & !A<3>

MACROCELL | 13 | 15 | EXP75_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 13 | 16
INPUTS | 7 | UDS  | LDS  | A<2>  | A<5>  | A<4>  | A<1>  | A<3>
INPUTP | 7 | 155 | 157 | 101 | 91 | 97 | 107 | 99
EXPORTS | 1 | 13 | 16
EQ | 5 | 
       EXP75_.EXP  =  UDS & LDS
	# !A<2> & A<5>
	# A<5> & A<4>
	# A<2> & !A<1> & A<3>
	# !A<2> & !A<4> & A<1>

MACROCELL | 13 | 17 | EXP76_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 13 | 16
INPUTS | 7 | A<2>  | A<4>  | A<3>  | A<1>  | AUTO_CONFIG_Z2_DONE<0>  | AUTO_CONFIG_Z2_DONE<1>  | A<5>
INPUTMC | 2 | 13 | 12 | 13 | 11
INPUTP | 5 | 101 | 97 | 99 | 107 | 91
EXPORTS | 1 | 13 | 16
EQ | 6 | 
       EXP76_.EXP  =  !A<2> & A<4> & !A<3>
	# A<4> & A<1> & !A<3>
	# AUTO_CONFIG_Z2_DONE<0> & AUTO_CONFIG_Z2_DONE<1> & 
	!A<5> & !A<3>
	# AUTO_CONFIG_Z2_DONE<0> & !A<5> & !A<4> & A<1>
	# A<2> & !A<5> & !A<4> & A<3>

MACROCELL | 14 | 0 | EXP77_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 14 | 17
INPUTS | 11 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_DATA<1>  | LAN_SM_FSM_FFd1  | A<17>.PIN  | DQ_SWAP  | A<9>.PIN  | UDS  | LAN_SM_FSM_FFd2  | D<1>.PIN  | EXP78_.EXP
INPUTMC | 7 | 14 | 3 | 7 | 6 | 14 | 17 | 11 | 5 | 11 | 17 | 14 | 4 | 14 | 1
INPUTP | 4 | 172 | 108 | 155 | 30
EXPORTS | 1 | 14 | 17
IMPORTS | 1 | 14 | 1
EQ | 19 | 
       EXP77_.EXP  =  LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<1>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<1>
	# A<17>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<9>.PIN
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<1>.PIN
;Imported pterms FB15_2
	# D<9>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<9>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<1>.PIN
	# UDS & LDS & A<17>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<9>.PIN

MACROCELL | 14 | 1 | EXP78_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 14 | 0
INPUTS | 10 | D<9>.PIN  | UDS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd2  | LDS  | D<1>.PIN  | A<17>.PIN  | A<9>.PIN
INPUTMC | 4 | 14 | 3 | 7 | 6 | 11 | 17 | 14 | 4
INPUTP | 6 | 73 | 155 | 157 | 30 | 172 | 108
EXPORTS | 1 | 14 | 0
EQ | 10 | 
       EXP78_.EXP  =  D<9>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<9>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<1>.PIN
	# UDS & LDS & A<17>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<9>.PIN

MACROCELL | 14 | 2 | EXP79_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 14 | 3
INPUTS | 5 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd2  | Z3_ADR<13>
INPUTMC | 5 | 14 | 3 | 7 | 6 | 11 | 5 | 14 | 4 | 5 | 10
EXPORTS | 1 | 14 | 3
EQ | 7 | 
       EXP79_.EXP  =  LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
	# !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1 & Z3_ADR<13>
	# !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1

MACROCELL | 14 | 5 | EXP80_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 14 | 6
INPUTS | 7 | DS1  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DS0  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd2.EXP
INPUTMC | 5 | 7 | 6 | 14 | 4 | 11 | 5 | 14 | 3 | 14 | 4
INPUTP | 2 | 148 | 170
EXPORTS | 1 | 14 | 6
IMPORTS | 1 | 14 | 4
EQ | 15 | 
       EXP80_.EXP  =  !DS1 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
	# !DS0 & LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1
;Imported pterms FB15_5
	# !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd1
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd2

MACROCELL | 14 | 8 | EXP81_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 14 | 7
INPUTS | 10 | D<15>.PIN  | UDS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd2  | LDS  | D<7>.PIN  | A<15>.PIN  | DQ_DATA<9>.EXP
INPUTMC | 5 | 14 | 3 | 7 | 6 | 11 | 17 | 14 | 4 | 14 | 9
INPUTP | 5 | 89 | 155 | 157 | 29 | 139
EXPORTS | 1 | 14 | 7
IMPORTS | 1 | 14 | 9
EQ | 13 | 
       EXP81_.EXP  =  D<15>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<15>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<7>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<7>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<15>.PIN
;Imported pterms FB15_10
	# UDS & LDS & A<23>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2

MACROCELL | 14 | 10 | EXP82_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 14 | 9
INPUTS | 12 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ_DATA<9>  | A<17>.PIN  | LAN_SM_FSM_FFd4  | DQ_SWAP  | A<9>.PIN  | UDS  | LAN_SM_FSM_FFd2  | D<1>.PIN  | LDS  | ROM_B_0_OBUF$BUF10.EXP
INPUTMC | 7 | 14 | 3 | 11 | 5 | 14 | 9 | 7 | 6 | 11 | 17 | 14 | 4 | 14 | 11
INPUTP | 5 | 172 | 108 | 155 | 30 | 157
EXPORTS | 1 | 14 | 9
IMPORTS | 1 | 14 | 11
EQ | 18 | 
       EXP82_.EXP  =  !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<9>
	# A<17>.PIN & LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<9>.PIN
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<1>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<1>.PIN
;Imported pterms FB15_12
	# D<9>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<9>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & A<17>.PIN & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<9>.PIN

MACROCELL | 15 | 0 | EXP83_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 15 | 17
INPUTS | 10 | D<10>.PIN  | LDS  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd2  | UDS  | D<2>.PIN  | A<18>.PIN  | A<10>.PIN
INPUTMC | 4 | 14 | 3 | 7 | 6 | 11 | 17 | 14 | 4
INPUTP | 6 | 74 | 157 | 155 | 71 | 171 | 112
EXPORTS | 1 | 15 | 17
EQ | 10 | 
       EXP83_.EXP  =  D<10>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<2>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<2>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<18>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<10>.PIN

MACROCELL | 15 | 14 | EXP84_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 15 | 15
INPUTS | 12 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_SWAP  | LAN_SM_FSM_FFd1  | A<10>.PIN  | A<18>.PIN  | D<10>.PIN  | UDS  | LAN_SM_FSM_FFd2  | LDS  | D<2>.PIN  | Z3_DATA<16>.EXP
INPUTMC | 6 | 14 | 3 | 7 | 6 | 11 | 17 | 11 | 5 | 14 | 4 | 15 | 13
INPUTP | 6 | 112 | 171 | 74 | 155 | 157 | 71
EXPORTS | 1 | 15 | 15
IMPORTS | 1 | 15 | 13
EQ | 13 | 
       EXP84_.EXP  =  LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<10>.PIN
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<18>.PIN
	# D<10>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# D<10>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & !DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & D<2>.PIN
;Imported pterms FB16_14
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<18>.PIN

MACROCELL | 15 | 17 | EXP85_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 15 | 16
INPUTS | 11 | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | DQ_DATA<2>  | LAN_SM_FSM_FFd1  | DQ_SWAP  | A<18>.PIN  | A<10>.PIN  | D<10>.PIN  | UDS  | LAN_SM_FSM_FFd2  | EXP83_.EXP
INPUTMC | 7 | 14 | 3 | 7 | 6 | 15 | 16 | 11 | 5 | 11 | 17 | 14 | 4 | 15 | 0
INPUTP | 4 | 171 | 112 | 74 | 155
EXPORTS | 1 | 15 | 16
IMPORTS | 1 | 15 | 0
EQ | 19 | 
       EXP85_.EXP  =  LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & DQ_DATA<2>
	# !LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd1 & DQ_DATA<2>
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<18>.PIN
	# LAN_SM_FSM_FFd3 & LAN_SM_FSM_FFd4 & !DQ_SWAP & 
	LAN_SM_FSM_FFd1 & A<10>.PIN
	# D<10>.PIN & !UDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
;Imported pterms FB16_1
	# D<10>.PIN & !LDS & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd4 & DQ_SWAP & !LAN_SM_FSM_FFd2
	# !UDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<2>.PIN
	# !LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & D<2>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	DQ_SWAP & !LAN_SM_FSM_FFd2 & A<18>.PIN
	# UDS & LDS & !LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd4 & 
	!DQ_SWAP & !LAN_SM_FSM_FFd2 & A<10>.PIN

PIN | Z3 | 64 | 0 | N/A | 151 | 2 | 11 | 17 | 11 | 14
PIN | CLK_EXT | 4096 | 0 | N/A | 57 | 70 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 2 | 17 | 15 | 13 | 15 | 12 | 15 | 11 | 10 | 12 | 10 | 8 | 10 | 7 | 10 | 6 | 12 | 3 | 15 | 8 | 15 | 6 | 15 | 4 | 10 | 5 | 10 | 3 | 10 | 1 | 10 | 0 | 12 | 2 | 14 | 3 | 7 | 6 | 14 | 4 | 11 | 5 | 8 | 1 | 8 | 8 | 8 | 7 | 8 | 4 | 8 | 3 | 10 | 17 | 15 | 15 | 12 | 15 | 7 | 0 | 12 | 17 | 7 | 11 | 12 | 11 | 14 | 17 | 15 | 16 | 12 | 10 | 7 | 13 | 12 | 6 | 7 | 8 | 14 | 7 | 10 | 15 | 14 | 9 | 8 | 0 | 8 | 6 | 8 | 5 | 12 | 4 | 8 | 2 | 14 | 12 | 14 | 15 | 7 | 10 | 12 | 16 | 14 | 6 | 2 | 9 | 11 | 2
PIN | FCS | 64 | 0 | N/A | 147 | 103 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 9 | 15 | 11 | 8 | 9 | 1 | 7 | 3 | 1 | 0 | 11 | 10 | 1 | 17 | 4 | 13 | 4 | 12 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 1 | 1 | 12 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 6 | 7 | 0 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 9 | 9 | 10 | 11 | 17 | 11 | 15 | 5 | 10 | 5 | 15 | 5 | 14 | 5 | 12 | 5 | 11 | 6 | 13 | 6 | 3 | 6 | 0 | 5 | 8 | 5 | 6 | 2 | 16 | 2 | 15 | 2 | 12 | 6 | 5 | 13 | 3 | 11 | 2 | 7 | 4 | 12 | 13 | 7 | 9 | 13 | 13 | 14 | 11 | 13 | 2 | 1 | 3 | 3 | 2 | 4 | 17 | 0 | 3 | 0 | 6 | 1 | 1 | 1 | 4 | 1 | 10 | 1 | 14 | 1 | 15 | 4 | 4 | 4 | 8 | 4 | 10 | 4 | 14 | 4 | 15 | 6 | 12 | 7 | 2 | 9 | 0 | 9 | 5 | 9 | 7 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 11 | 3 | 11 | 5 | 11 | 7 | 11 | 9
PIN | RW | 64 | 0 | N/A | 158 | 139 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 8 | 15 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 9 | 15 | 11 | 8 | 9 | 1 | 7 | 5 | 1 | 0 | 11 | 10 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 6 | 7 | 0 | 11 | 3 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 9 | 9 | 10 | 7 | 6 | 14 | 3 | 13 | 7 | 8 | 11 | 8 | 9 | 0 | 1 | 13 | 6 | 13 | 5 | 13 | 4 | 12 | 4 | 14 | 12 | 13 | 8 | 13 | 9 | 1 | 3 | 3 | 11 | 0 | 2 | 0 | 7 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 1 | 1 | 1 | 4 | 1 | 5 | 1 | 7 | 1 | 10 | 1 | 12 | 1 | 15 | 1 | 17 | 3 | 2 | 3 | 4 | 3 | 5 | 3 | 7 | 4 | 4 | 4 | 8 | 4 | 10 | 4 | 12 | 4 | 15 | 4 | 17 | 6 | 0 | 6 | 1 | 6 | 3 | 6 | 5 | 6 | 6 | 6 | 12 | 6 | 13 | 7 | 2 | 7 | 3 | 7 | 4 | 9 | 0 | 9 | 5 | 9 | 7 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 11 | 2 | 11 | 5 | 11 | 7 | 11 | 9 | 12 | 3
PIN | AS | 64 | 0 | N/A | 152 | 96 | 13 | 12 | 13 | 11 | 8 | 17 | 8 | 15 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 1 | 17 | 4 | 13 | 4 | 12 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 12 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 4 | 5 | 5 | 17 | 13 | 7 | 8 | 11 | 8 | 9 | 0 | 1 | 13 | 16 | 3 | 15 | 0 | 17 | 13 | 1 | 13 | 6 | 13 | 5 | 13 | 4 | 4 | 4 | 12 | 1 | 10 | 15 | 0 | 14 | 2 | 1 | 13 | 13 | 4 | 1 | 1 | 3 | 3 | 11 | 0 | 2 | 0 | 7 | 0 | 9 | 0 | 11 | 0 | 13 | 1 | 5 | 1 | 7 | 1 | 10 | 1 | 14 | 1 | 15 | 3 | 1 | 3 | 2 | 3 | 4 | 3 | 5 | 3 | 7 | 4 | 8 | 4 | 14 | 4 | 15 | 4 | 17 | 6 | 0 | 6 | 1 | 6 | 3 | 6 | 5 | 6 | 6 | 6 | 12 | 6 | 13 | 13 | 0 | 13 | 2
PIN | RESET | 64 | 0 | N/A | 263 | 123 | 13 | 12 | 13 | 11 | 8 | 17 | 8 | 15 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 2 | 17 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 0 | 1 | 0 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 3 | 9 | 4 | 9 | 7 | 9 | 9 | 9 | 10 | 11 | 17 | 11 | 15 | 8 | 1 | 5 | 10 | 8 | 8 | 8 | 7 | 8 | 4 | 8 | 3 | 13 | 7 | 8 | 0 | 8 | 11 | 8 | 9 | 0 | 1 | 13 | 16 | 3 | 15 | 0 | 17 | 13 | 1 | 13 | 6 | 13 | 5 | 5 | 15 | 13 | 4 | 5 | 14 | 5 | 12 | 5 | 11 | 6 | 13 | 6 | 3 | 6 | 0 | 5 | 8 | 5 | 6 | 2 | 16 | 2 | 15 | 2 | 12 | 6 | 5 | 13 | 3 | 8 | 6 | 8 | 5 | 8 | 2 | 3 | 11 | 1 | 1 | 3 | 13 | 11 | 2 | 2 | 9 | 3 | 5 | 5 | 5 | 5 | 7 | 5 | 2 | 5 | 4 | 3 | 4 | 3 | 7 | 1 | 4 | 1 | 2 | 5 | 9 | 5 | 13 | 7 | 7 | 7 | 4 | 12 | 13 | 7 | 9 | 1 | 3 | 4 | 17 | 7 | 0 | 7 | 3 | 7 | 6 | 9 | 5 | 9 | 6 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 15 | 9 | 17 | 11 | 3 | 11 | 5 | 11 | 6 | 11 | 8 | 11 | 10
PIN | A<2> | 64 | 0 | N/A | 101 | 56 | 8 | 15 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 8 | 11 | 8 | 9 | 0 | 1 | 13 | 15 | 3 | 14 | 0 | 16 | 13 | 1 | 6 | 5 | 3 | 11 | 0 | 0 | 0 | 2 | 0 | 7 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 1 | 5 | 1 | 7 | 3 | 1 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 13 | 3 | 16 | 6 | 0 | 6 | 6 | 6 | 11 | 6 | 13 | 13 | 0 | 13 | 2 | 13 | 17
PIN | A<4> | 64 | 0 | N/A | 97 | 57 | 8 | 15 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 8 | 11 | 8 | 9 | 0 | 1 | 13 | 15 | 3 | 14 | 0 | 16 | 13 | 1 | 6 | 13 | 1 | 1 | 0 | 0 | 0 | 2 | 0 | 7 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 1 | 5 | 1 | 7 | 3 | 1 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 3 | 13 | 3 | 16 | 6 | 0 | 6 | 6 | 6 | 11 | 13 | 2 | 13 | 17
PIN | A<1> | 64 | 0 | N/A | 107 | 57 | 8 | 15 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 8 | 11 | 8 | 9 | 0 | 1 | 13 | 15 | 3 | 14 | 0 | 16 | 13 | 1 | 0 | 0 | 0 | 2 | 0 | 7 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 1 | 5 | 1 | 7 | 3 | 1 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 3 | 13 | 3 | 16 | 6 | 0 | 6 | 6 | 6 | 11 | 6 | 13 | 13 | 0 | 13 | 2 | 13 | 17
PIN | A<5> | 64 | 0 | N/A | 91 | 57 | 8 | 15 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 8 | 11 | 8 | 9 | 0 | 1 | 13 | 15 | 3 | 14 | 0 | 16 | 13 | 1 | 6 | 3 | 3 | 13 | 0 | 0 | 0 | 2 | 0 | 7 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 1 | 5 | 1 | 7 | 3 | 1 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 6 | 0 | 6 | 6 | 6 | 11 | 6 | 13 | 13 | 0 | 13 | 2 | 13 | 17
PIN | A<6> | 64 | 0 | N/A | 98 | 53 | 8 | 15 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 8 | 11 | 8 | 9 | 0 | 1 | 13 | 16 | 3 | 15 | 0 | 17 | 13 | 1 | 6 | 0 | 0 | 2 | 0 | 7 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 1 | 5 | 1 | 7 | 3 | 1 | 3 | 4 | 3 | 5 | 3 | 7 | 3 | 11 | 6 | 6 | 6 | 11 | 6 | 13 | 13 | 0 | 13 | 2
PIN | UDS | 64 | 0 | N/A | 155 | 108 | 8 | 15 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 9 | 15 | 11 | 8 | 9 | 0 | 7 | 17 | 1 | 0 | 11 | 10 | 7 | 16 | 7 | 1 | 11 | 6 | 7 | 0 | 11 | 3 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 8 | 9 | 10 | 7 | 6 | 10 | 16 | 15 | 14 | 12 | 14 | 6 | 13 | 12 | 16 | 7 | 9 | 12 | 8 | 14 | 11 | 15 | 13 | 12 | 9 | 7 | 12 | 12 | 5 | 7 | 7 | 14 | 1 | 10 | 14 | 14 | 8 | 8 | 11 | 8 | 9 | 0 | 1 | 13 | 15 | 3 | 14 | 0 | 14 | 13 | 1 | 12 | 4 | 12 | 13 | 14 | 4 | 11 | 2 | 13 | 8 | 13 | 9 | 1 | 3 | 0 | 0 | 0 | 2 | 0 | 7 | 1 | 1 | 3 | 1 | 3 | 5 | 3 | 7 | 3 | 11 | 6 | 0 | 6 | 6 | 7 | 3 | 7 | 5 | 7 | 13 | 7 | 14 | 7 | 15 | 9 | 5 | 9 | 11 | 9 | 12 | 9 | 17 | 10 | 0 | 10 | 13 | 12 | 0 | 12 | 1 | 12 | 3 | 12 | 12 | 12 | 17 | 13 | 0 | 13 | 2 | 14 | 0 | 14 | 9 | 14 | 10 | 15 | 0 | 15 | 16 | 15 | 17
PIN | LDS | 64 | 0 | N/A | 157 | 115 | 8 | 15 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 0 | 0 | 2 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 7 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 6 | 9 | 15 | 11 | 8 | 9 | 0 | 7 | 17 | 1 | 0 | 11 | 10 | 7 | 16 | 7 | 1 | 11 | 6 | 6 | 11 | 11 | 3 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 8 | 9 | 10 | 7 | 6 | 10 | 16 | 15 | 14 | 12 | 14 | 6 | 13 | 12 | 16 | 7 | 9 | 12 | 4 | 14 | 11 | 15 | 13 | 12 | 8 | 7 | 12 | 12 | 5 | 7 | 7 | 14 | 1 | 10 | 14 | 14 | 8 | 8 | 11 | 8 | 9 | 0 | 1 | 13 | 15 | 3 | 14 | 0 | 14 | 13 | 1 | 7 | 10 | 14 | 4 | 11 | 2 | 13 | 8 | 13 | 9 | 1 | 3 | 0 | 7 | 0 | 9 | 0 | 11 | 0 | 13 | 1 | 1 | 1 | 5 | 1 | 7 | 3 | 1 | 3 | 4 | 3 | 5 | 3 | 8 | 3 | 11 | 6 | 0 | 6 | 7 | 7 | 2 | 7 | 3 | 7 | 5 | 7 | 13 | 7 | 14 | 7 | 15 | 9 | 5 | 9 | 7 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 10 | 0 | 10 | 13 | 11 | 7 | 11 | 9 | 12 | 0 | 12 | 1 | 12 | 12 | 12 | 13 | 13 | 0 | 13 | 2 | 14 | 9 | 14 | 10 | 15 | 0 | 15 | 16
PIN | A<3> | 64 | 0 | N/A | 99 | 57 | 8 | 14 | 8 | 12 | 0 | 15 | 0 | 12 | 3 | 12 | 3 | 10 | 0 | 10 | 0 | 8 | 0 | 6 | 0 | 3 | 1 | 6 | 1 | 8 | 3 | 9 | 3 | 8 | 3 | 6 | 3 | 3 | 3 | 17 | 3 | 0 | 6 | 17 | 6 | 16 | 6 | 15 | 6 | 14 | 6 | 10 | 6 | 9 | 6 | 8 | 6 | 7 | 8 | 11 | 8 | 9 | 0 | 1 | 13 | 15 | 3 | 14 | 0 | 16 | 13 | 1 | 13 | 3 | 3 | 5 | 0 | 0 | 0 | 2 | 0 | 7 | 0 | 9 | 0 | 11 | 0 | 13 | 0 | 14 | 1 | 5 | 1 | 7 | 3 | 1 | 3 | 4 | 3 | 7 | 3 | 11 | 3 | 13 | 3 | 16 | 6 | 0 | 6 | 6 | 6 | 11 | 6 | 13 | 13 | 0 | 13 | 2 | 13 | 17
PIN | LAN_INT | 64 | 0 | N/A | 201 | 2 | 2 | 17 | 8 | 2
PIN | DS1 | 64 | 0 | N/A | 148 | 38 | 9 | 15 | 11 | 8 | 9 | 0 | 7 | 4 | 1 | 0 | 11 | 10 | 7 | 3 | 7 | 1 | 11 | 6 | 1 | 1 | 11 | 3 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 9 | 9 | 10 | 7 | 5 | 11 | 4 | 12 | 3 | 14 | 5 | 12 | 16 | 14 | 6 | 11 | 2 | 1 | 3 | 7 | 2 | 9 | 5 | 9 | 7 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 11 | 5 | 11 | 7 | 11 | 9 | 14 | 16
PIN | DS0 | 64 | 0 | N/A | 170 | 38 | 9 | 15 | 11 | 8 | 9 | 0 | 7 | 4 | 1 | 0 | 11 | 10 | 7 | 3 | 7 | 1 | 11 | 6 | 1 | 4 | 11 | 3 | 9 | 3 | 9 | 4 | 9 | 6 | 9 | 9 | 9 | 10 | 7 | 5 | 11 | 4 | 14 | 5 | 7 | 10 | 14 | 6 | 11 | 2 | 1 | 1 | 7 | 2 | 9 | 2 | 9 | 5 | 9 | 7 | 9 | 8 | 9 | 11 | 9 | 12 | 9 | 13 | 9 | 14 | 9 | 16 | 9 | 17 | 11 | 5 | 11 | 7 | 11 | 9 | 14 | 16
PIN | CFIN | 64 | 0 | N/A | 190 | 1 | 4 | 5
PIN | MTCR | 64 | 0 | N/A | 186 | 1 | 5 | 15
PIN | A<7> | 64 | 0 | N/A | 100 | 1 | 5 | 8
PIN | AUTOBOOT_OFF | 64 | 0 | N/A | 142 | 1 | 4 | 4
PIN | C1 | 64 | 0 | N/A | 188 | 1 | 2 | 10
PIN | C3 | 64 | 0 | N/A | 187 | 1 | 2 | 10
PIN | CP_IRQ | 64 | 0 | N/A | 59 | 1 | 10 | 11
PIN | A_LAN<2> | 536871040 | 0 | N/A | 12
PIN | A_LAN<4> | 536871040 | 0 | N/A | 20
PIN | A_LAN<5> | 536871040 | 0 | N/A | 13
PIN | ROM_OE | 536871040 | 0 | N/A | 65
PIN | A_LAN<0> | 536871040 | 0 | N/A | 7
PIN | A_LAN<10> | 536871040 | 0 | N/A | 255
PIN | A_LAN<11> | 536871040 | 0 | N/A | 256
PIN | A_LAN<12> | 536871040 | 0 | N/A | 253
PIN | A_LAN<13> | 536871040 | 0 | N/A | 254
PIN | A_LAN<1> | 536871040 | 0 | N/A | 6
PIN | A_LAN<3> | 536871040 | 0 | N/A | 8
PIN | A_LAN<6> | 536871040 | 0 | N/A | 22
PIN | A_LAN<7> | 536871040 | 0 | N/A | 21
PIN | A_LAN<8> | 536871040 | 0 | N/A | 258
PIN | A_LAN<9> | 536871040 | 0 | N/A | 262
PIN | CP_RD | 536871040 | 0 | N/A | 132
PIN | CP_WE | 536871040 | 0 | N/A | 131
PIN | IDE_R | 536871040 | 0 | N/A | 46
PIN | IDE_W | 536871040 | 0 | N/A | 47
PIN | LAN_CS | 536871040 | 0 | N/A | 240
PIN | LAN_WRH | 536871040 | 0 | N/A | 237
PIN | LAN_WRL | 536871040 | 0 | N/A | 145
PIN | LAN_RD | 536871040 | 0 | N/A | 242
PIN | SLAVE | 536871040 | 0 | N/A | 193
PIN | DTACK | 536871040 | 0 | N/A | 160
PIN | OVR | 536871040 | 0 | N/A | 185
PIN | INT6_OUT | 536871040 | 0 | N/A | 127
PIN | INT2_OUT | 536871040 | 0 | N/A | 60
PIN | CFOUT | 536871040 | 0 | N/A | 191
PIN | CP_CS | 536871040 | 0 | N/A | 63
PIN | IDE_A<0> | 536871040 | 0 | N/A | 43
PIN | IDE_A<1> | 536871040 | 0 | N/A | 45
PIN | IDE_A<2> | 536871040 | 0 | N/A | 44
PIN | IDE_CS<0> | 536871040 | 0 | N/A | 39
PIN | IDE_CS<1> | 536871040 | 0 | N/A | 41
PIN | OWN | 536871040 | 0 | N/A | 195
PIN | MTACK | 536871040 | 0 | N/A | 174
PIN | LAN_CFG<4> | 536871040 | 0 | N/A | 199
PIN | LAN_CFG<3> | 536871040 | 0 | N/A | 24
PIN | LAN_CFG<2> | 536871040 | 0 | N/A | 251
PIN | LAN_CFG<1> | 536871040 | 0 | N/A | 23
PIN | ROM_B<1> | 536871040 | 0 | N/A | 129
PIN | ROM_B<0> | 536871040 | 0 | N/A | 61
PIN | A<8> | 536870976 | 0 | N/A | 106 | 5 | 10 | 16 | 10 | 14 | 5 | 6 | 10 | 0 | 10 | 13
PIN | A<18> | 536870976 | 0 | N/A | 171 | 7 | 4 | 5 | 5 | 16 | 15 | 14 | 15 | 13 | 4 | 0 | 15 | 0 | 15 | 17
PIN | A<19> | 536870976 | 0 | N/A | 169 | 7 | 4 | 5 | 5 | 1 | 12 | 14 | 12 | 9 | 4 | 0 | 12 | 8 | 12 | 16
PIN | A<20> | 536870976 | 0 | N/A | 167 | 7 | 4 | 5 | 5 | 0 | 4 | 2 | 7 | 14 | 7 | 15 | 7 | 16 | 7 | 17
PIN | A<21> | 536870976 | 0 | N/A | 163 | 7 | 4 | 5 | 5 | 0 | 12 | 4 | 12 | 5 | 4 | 2 | 12 | 0 | 12 | 1
PIN | A<22> | 536870976 | 0 | N/A | 162 | 7 | 4 | 5 | 5 | 1 | 7 | 10 | 7 | 7 | 4 | 3 | 7 | 9 | 7 | 13
PIN | A<23> | 536870976 | 0 | N/A | 161 | 10 | 4 | 5 | 5 | 15 | 12 | 10 | 14 | 6 | 12 | 3 | 4 | 2 | 4 | 3 | 5 | 0 | 12 | 13 | 14 | 9
PIN | A<9> | 536870976 | 0 | N/A | 108 | 6 | 14 | 11 | 14 | 1 | 2 | 16 | 0 | 11 | 14 | 0 | 14 | 10
PIN | A<10> | 536870976 | 0 | N/A | 112 | 6 | 15 | 14 | 15 | 0 | 2 | 15 | 0 | 14 | 15 | 16 | 15 | 17
PIN | A<11> | 536870976 | 0 | N/A | 114 | 6 | 12 | 14 | 12 | 9 | 2 | 12 | 0 | 13 | 12 | 8 | 12 | 16
PIN | A<12> | 536870976 | 0 | N/A | 115 | 6 | 0 | 7 | 5 | 14 | 7 | 14 | 7 | 15 | 7 | 16 | 7 | 17
PIN | A<13> | 536870976 | 0 | N/A | 123 | 7 | 11 | 16 | 12 | 4 | 12 | 5 | 5 | 12 | 0 | 9 | 12 | 0 | 12 | 1
PIN | A<14> | 536870976 | 0 | N/A | 125 | 6 | 11 | 17 | 7 | 10 | 7 | 7 | 5 | 11 | 7 | 9 | 7 | 12
PIN | A<15> | 536870976 | 0 | N/A | 139 | 5 | 5 | 10 | 12 | 10 | 14 | 6 | 12 | 12 | 14 | 8
PIN | A<16> | 536870976 | 0 | N/A | 175 | 9 | 4 | 5 | 5 | 17 | 10 | 16 | 10 | 14 | 4 | 1 | 4 | 0 | 5 | 16 | 10 | 0 | 10 | 13
PIN | A<17> | 536870976 | 0 | N/A | 172 | 7 | 4 | 5 | 5 | 16 | 14 | 11 | 14 | 1 | 4 | 3 | 14 | 0 | 14 | 10
PIN | DQ<10> | 536870976 | 0 | N/A | 234 | 4 | 15 | 5 | 8 | 16 | 15 | 11 | 15 | 4
PIN | DQ<11> | 536870976 | 0 | N/A | 207 | 4 | 15 | 2 | 10 | 2 | 10 | 12 | 10 | 5
PIN | DQ<1> | 536870976 | 0 | N/A | 216 | 7 | 8 | 13 | 15 | 7 | 15 | 12 | 15 | 6 | 1 | 14 | 4 | 11 | 1 | 15
PIN | DQ<4> | 536870976 | 0 | N/A | 225 | 7 | 15 | 1 | 10 | 4 | 10 | 8 | 10 | 3 | 4 | 16 | 0 | 5 | 4 | 17
PIN | DQ<8> | 536870976 | 0 | N/A | 231 | 4 | 8 | 10 | 15 | 10 | 15 | 13 | 15 | 8
PIN | DQ<9> | 536870976 | 0 | N/A | 209 | 4 | 8 | 13 | 15 | 7 | 15 | 12 | 15 | 6
PIN | D<0> | 536870976 | 0 | N/A | 4 | 4 | 9 | 2 | 10 | 16 | 10 | 14 | 9 | 3
PIN | D<10> | 536870976 | 0 | N/A | 74 | 13 | 3 | 12 | 3 | 9 | 6 | 17 | 9 | 15 | 11 | 11 | 11 | 12 | 15 | 14 | 15 | 0 | 3 | 8 | 3 | 11 | 6 | 0 | 11 | 1 | 15 | 17
PIN | D<11> | 536870976 | 0 | N/A | 77 | 12 | 3 | 10 | 3 | 8 | 6 | 16 | 11 | 8 | 11 | 0 | 11 | 13 | 12 | 14 | 12 | 9 | 3 | 7 | 3 | 9 | 6 | 17 | 12 | 8
PIN | D<12> | 536870976 | 0 | N/A | 78 | 11 | 0 | 10 | 3 | 6 | 6 | 15 | 7 | 1 | 11 | 0 | 11 | 13 | 6 | 14 | 3 | 5 | 0 | 11 | 7 | 14 | 7 | 17
PIN | D<13> | 536870976 | 0 | N/A | 80 | 13 | 0 | 8 | 3 | 3 | 6 | 14 | 11 | 7 | 11 | 15 | 11 | 12 | 12 | 0 | 12 | 5 | 0 | 9 | 3 | 4 | 6 | 13 | 11 | 0 | 11 | 6
PIN | D<14> | 536870976 | 0 | N/A | 81 | 12 | 0 | 6 | 3 | 17 | 6 | 10 | 7 | 2 | 11 | 15 | 11 | 12 | 7 | 3 | 7 | 7 | 0 | 7 | 3 | 0 | 6 | 11 | 7 | 12
PIN | D<15> | 536870976 | 0 | N/A | 89 | 13 | 0 | 3 | 3 | 0 | 6 | 9 | 11 | 4 | 11 | 3 | 11 | 11 | 11 | 1 | 12 | 12 | 12 | 4 | 0 | 2 | 3 | 1 | 6 | 8 | 14 | 8
PIN | D<1> | 536870976 | 0 | N/A | 30 | 5 | 9 | 1 | 14 | 10 | 14 | 1 | 9 | 0 | 14 | 0
PIN | D<2> | 536870976 | 0 | N/A | 71 | 4 | 15 | 0 | 15 | 14 | 9 | 6 | 15 | 16
PIN | D<3> | 536870976 | 0 | N/A | 28 | 4 | 9 | 4 | 12 | 14 | 12 | 8 | 12 | 16
PIN | D<4> | 536870976 | 0 | N/A | 38 | 3 | 7 | 16 | 7 | 15 | 9 | 17
PIN | D<5> | 536870976 | 0 | N/A | 37 | 5 | 9 | 7 | 12 | 4 | 12 | 5 | 9 | 8 | 12 | 1
PIN | D<6> | 536870976 | 0 | N/A | 26 | 3 | 7 | 12 | 7 | 9 | 9 | 12
PIN | D<7> | 536870976 | 0 | N/A | 29 | 3 | 9 | 10 | 12 | 12 | 14 | 8
PIN | D<8> | 536870976 | 0 | N/A | 32 | 12 | 0 | 15 | 1 | 6 | 6 | 8 | 1 | 0 | 11 | 16 | 11 | 14 | 10 | 16 | 10 | 13 | 0 | 14 | 1 | 5 | 6 | 7 | 10 | 0
PIN | D<9> | 536870976 | 0 | N/A | 73 | 12 | 0 | 12 | 1 | 8 | 6 | 7 | 11 | 10 | 11 | 16 | 11 | 14 | 14 | 11 | 14 | 1 | 0 | 13 | 1 | 7 | 6 | 6 | 11 | 13
PIN | DQ<0> | 536870976 | 0 | N/A | 217 | 7 | 8 | 10 | 15 | 10 | 15 | 13 | 15 | 8 | 3 | 1 | 1 | 16 | 3 | 2
PIN | DQ<12> | 536870976 | 0 | N/A | 235 | 4 | 15 | 1 | 10 | 4 | 10 | 8 | 10 | 3
PIN | DQ<13> | 536870976 | 0 | N/A | 204 | 4 | 10 | 1 | 10 | 9 | 10 | 7 | 14 | 17
PIN | DQ<14> | 536870976 | 0 | N/A | 236 | 4 | 14 | 14 | 10 | 10 | 10 | 6 | 10 | 1
PIN | DQ<15> | 536870976 | 0 | N/A | 202 | 4 | 14 | 13 | 12 | 7 | 12 | 3 | 12 | 2
PIN | DQ<2> | 536870976 | 0 | N/A | 220 | 6 | 15 | 5 | 8 | 16 | 15 | 11 | 15 | 4 | 4 | 13 | 4 | 9
PIN | DQ<3> | 536870976 | 0 | N/A | 219 | 7 | 15 | 2 | 4 | 15 | 10 | 12 | 10 | 5 | 4 | 14 | 1 | 11 | 10 | 3
PIN | DQ<5> | 536870976 | 0 | N/A | 221 | 7 | 10 | 2 | 10 | 9 | 10 | 7 | 6 | 1 | 6 | 2 | 0 | 4 | 14 | 17
PIN | DQ<6> | 536870976 | 0 | N/A | 227 | 7 | 14 | 14 | 10 | 10 | 10 | 6 | 6 | 3 | 6 | 4 | 1 | 9 | 10 | 1
PIN | DQ<7> | 536870976 | 0 | N/A | 226 | 6 | 14 | 13 | 12 | 7 | 6 | 12 | 12 | 2 | 6 | 11 | 1 | 13