MDF Database:  version 1.0
MDF_INFO | LAN_IDE_CP | XC95288XL-10-TQ144
MACROCELL | 8 | 10 | Z3_DATA<0>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 8 | 10 | 9 | 2
INPUTS | 16 | A<8>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<0>.PIN  | DQ<8>.PIN  | EXP28_.EXP  | lan_adr  | EXP29_.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 12 | 8 | 10 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 8 | 9 | 6 | 6 | 8 | 11 | 0 | 8 | 9 | 0
INPUTP | 4 | 217 | 231 | 147 | 158
IMPORTS | 2 | 8 | 9 | 8 | 11
EQ | 14 | 
   A<8>.D = A<8> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<8>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<0>.PIN
;Imported pterms FB9_10
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	A<8>.PIN & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
;Imported pterms FB9_12
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<16>.PIN & !$OpTx$FX_DC$25;
   A<8>.CLK = CLK_EXT;	// GCK
   A<8>.AP = !lan_rdy/lan_rdy_RSTF;
   A<8>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 5 | Z3_DATA<10>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 15 | 5 | 9 | 16
INPUTS | 16 | A<18>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<10>.PIN  | DQ<2>.PIN  | lan_adr  | EXP39_.EXP  | EXP40_.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 12 | 15 | 5 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 15 | 4 | 15 | 6 | 0 | 8 | 9 | 0
INPUTP | 4 | 234 | 220 | 147 | 158
IMPORTS | 2 | 15 | 4 | 15 | 6
EQ | 14 | 
   A<18>.D = A<18> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<2>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<10>.PIN
;Imported pterms FB16_5
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<18>.PIN & !$OpTx$FX_DC$25
;Imported pterms FB16_7
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<10>.PIN & !$OpTx$FX_DC$25;
   A<18>.CLK = CLK_EXT;	// GCK
   A<18>.AP = !lan_rdy/lan_rdy_RSTF;
   A<18>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 2 | Z3_DATA<11>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 15 | 2 | 11 | 9
INPUTS | 15 | A<19>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<11>.PIN  | DQ<3>.PIN  | lan_adr  | EXP38_.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 11 | 15 | 2 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 15 | 3 | 0 | 8 | 9 | 0
INPUTP | 4 | 207 | 219 | 147 | 158
IMPORTS | 1 | 15 | 3
EQ | 13 | 
   A<19>.D = A<19> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<3>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<11>.PIN
;Imported pterms FB16_4
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<11>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<19>.PIN & !$OpTx$FX_DC$25;
   A<19>.CLK = CLK_EXT;	// GCK
   A<19>.AP = !lan_rdy/lan_rdy_RSTF;
   A<19>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 1 | Z3_DATA<12>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 15 | 1 | 7 | 1
INPUTS | 15 | A<20>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<12>.PIN  | DQ<4>.PIN  | lan_adr  | EXP37_.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 11 | 15 | 1 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 15 | 0 | 0 | 8 | 9 | 0
INPUTP | 4 | 235 | 225 | 147 | 158
IMPORTS | 1 | 15 | 0
EQ | 13 | 
   A<20>.D = A<20> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<4>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<12>.PIN
;Imported pterms FB16_1
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<12>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<20>.PIN & !$OpTx$FX_DC$25;
   A<20>.CLK = CLK_EXT;	// GCK
   A<20>.AP = !lan_rdy/lan_rdy_RSTF;
   A<20>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 16 | Z3_DATA<13>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 14 | 16 | 11 | 7
INPUTS | 15 | A<21>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<13>.PIN  | DQ<5>.PIN  | lan_adr  | Z3_DATA<21>.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 11 | 14 | 16 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 14 | 17 | 0 | 8 | 9 | 0
INPUTP | 4 | 204 | 221 | 147 | 158
IMPORTS | 1 | 14 | 17
EQ | 13 | 
   A<21>.D = A<21> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<5>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<13>.PIN
;Imported pterms FB15_18
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<13>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<21>.PIN & !$OpTx$FX_DC$25;
   A<21>.CLK = CLK_EXT;	// GCK
   A<21>.AP = !lan_rdy/lan_rdy_RSTF;
   A<21>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 14 | Z3_DATA<14>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 14 | 14 | 7 | 2
INPUTS | 15 | A<22>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<14>.PIN  | DQ<6>.PIN  | lan_adr  | EXP36_.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 11 | 14 | 14 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 14 | 15 | 0 | 8 | 9 | 0
INPUTP | 4 | 236 | 227 | 147 | 158
IMPORTS | 1 | 14 | 15
EQ | 13 | 
   A<22>.D = A<22> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<6>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<14>.PIN
;Imported pterms FB15_16
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<14>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<22>.PIN & !$OpTx$FX_DC$25;
   A<22>.CLK = CLK_EXT;	// GCK
   A<22>.AP = !lan_rdy/lan_rdy_RSTF;
   A<22>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 13 | Z3_DATA<15>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 14 | 13 | 11 | 4
INPUTS | 15 | A<23>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<15>.PIN  | DQ<7>.PIN  | lan_adr  | EXP35_.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 11 | 14 | 13 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 14 | 12 | 0 | 8 | 9 | 0
INPUTP | 4 | 202 | 226 | 147 | 158
IMPORTS | 1 | 14 | 12
EQ | 13 | 
   A<23>.D = A<23> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<7>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<15>.PIN
;Imported pterms FB15_13
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & A<15>.PIN & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<23>.PIN & !$OpTx$FX_DC$25;
   A<23>.CLK = CLK_EXT;	// GCK
   A<23>.AP = !lan_rdy/lan_rdy_RSTF;
   A<23>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 8 | 13 | Z3_DATA<1>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 3 | 8 | 13 | 9 | 1 | 8 | 14
INPUTS | 16 | A<9>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<1>.PIN  | D<0>.PIN  | lan_adr  | Z3_ADR<13>  | EXP30_.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 12 | 8 | 13 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 14 | 2 | 8 | 12 | 0 | 8 | 9 | 0
INPUTP | 4 | 216 | 4 | 147 | 158
EXPORTS | 1 | 8 | 14
IMPORTS | 1 | 8 | 12
EQ | 15 | 
   A<9>.D = A<9> & !$OpTx$FX_DC$326
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<1>.PIN
;Imported pterms FB9_13
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<9>.PIN
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<17>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<9>.PIN & !$OpTx$FX_DC$25;
   A<9>.CLK = CLK_EXT;	// GCK
   A<9>.AP = !lan_rdy/lan_rdy_RSTF;
   A<9>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
    Z3_DATA<1>.EXP  =  D<0>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 8 | 16 | Z3_DATA<2>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 3 | 8 | 16 | 9 | 5 | 8 | 15
INPUTS | 16 | A<10>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<2>.PIN  | D<9>.PIN  | lan_adr  | Z3_ADR<13>  | Z3_DATA<16>.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 12 | 8 | 16 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 14 | 2 | 8 | 17 | 0 | 8 | 9 | 0
INPUTP | 4 | 220 | 73 | 147 | 158
EXPORTS | 1 | 8 | 15
IMPORTS | 1 | 8 | 17
EQ | 15 | 
   A<10>.D = A<10> & !$OpTx$FX_DC$326
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<2>.PIN
;Imported pterms FB9_18
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<10>.PIN
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<18>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<10>.PIN & !$OpTx$FX_DC$25;
   A<10>.CLK = CLK_EXT;	// GCK
   A<10>.AP = !lan_rdy/lan_rdy_RSTF;
   A<10>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
    Z3_DATA<2>.EXP  =  D<9>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 2 | Z3_DATA<3>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 10 | 2 | 9 | 4
INPUTS | 16 | A<11>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<3>.PIN  | DQ<11>.PIN  | lan_adr  | BUF_LAN_RD_S.EXP  | Z3_ADR<9>.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 12 | 10 | 2 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 10 | 1 | 10 | 3 | 0 | 8 | 9 | 0
INPUTP | 4 | 219 | 207 | 147 | 158
IMPORTS | 2 | 10 | 1 | 10 | 3
EQ | 14 | 
   A<11>.D = A<11> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<11>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<3>.PIN
;Imported pterms FB11_2
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<11>.PIN & !$OpTx$FX_DC$25
;Imported pterms FB11_4
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<19>.PIN & !$OpTx$FX_DC$25;
   A<11>.CLK = CLK_EXT;	// GCK
   A<11>.AP = !lan_rdy/lan_rdy_RSTF;
   A<11>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 4 | Z3_DATA<4>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 10 | 4 | 9 | 9
INPUTS | 15 | A<12>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<4>.PIN  | DQ<12>.PIN  | lan_adr  | Z3_ADR<12>.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 11 | 10 | 4 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 10 | 5 | 0 | 8 | 9 | 0
INPUTP | 4 | 225 | 235 | 147 | 158
IMPORTS | 1 | 10 | 5
EQ | 13 | 
   A<12>.D = A<12> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<12>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<4>.PIN
;Imported pterms FB11_6
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<20>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<12>.PIN & !$OpTx$FX_DC$25;
   A<12>.CLK = CLK_EXT;	// GCK
   A<12>.AP = !lan_rdy/lan_rdy_RSTF;
   A<12>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 9 | Z3_DATA<5>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 10 | 9 | 9 | 7
INPUTS | 15 | A<13>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<5>.PIN  | DQ<13>.PIN  | lan_adr  | $OpTx$FX_DC$326.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 11 | 10 | 9 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 10 | 8 | 0 | 8 | 9 | 0
INPUTP | 4 | 221 | 204 | 147 | 158
IMPORTS | 1 | 10 | 8
EQ | 13 | 
   A<13>.D = A<13> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<13>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<5>.PIN
;Imported pterms FB11_9
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<21>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<13>.PIN & !$OpTx$FX_DC$25;
   A<13>.CLK = CLK_EXT;	// GCK
   A<13>.AP = !lan_rdy/lan_rdy_RSTF;
   A<13>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 10 | Z3_DATA<6>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 10 | 10 | 9 | 11
INPUTS | 15 | A<14>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<6>.PIN  | DQ<14>.PIN  | lan_adr  | ROM_B_0_OBUF$BUF1.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 11 | 10 | 10 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 10 | 11 | 0 | 8 | 9 | 0
INPUTP | 4 | 227 | 236 | 147 | 158
IMPORTS | 1 | 10 | 11
EQ | 13 | 
   A<14>.D = A<14> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<14>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<6>.PIN
;Imported pterms FB11_12
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<22>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<14>.PIN & !$OpTx$FX_DC$25;
   A<14>.CLK = CLK_EXT;	// GCK
   A<14>.AP = !lan_rdy/lan_rdy_RSTF;
   A<14>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 7 | Z3_DATA<7>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 12 | 7 | 9 | 10
INPUTS | 16 | A<15>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<7>.PIN  | DQ<15>.PIN  | lan_adr  | EXP32_.EXP  | EXP33_.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 12 | 12 | 7 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 12 | 6 | 12 | 8 | 0 | 8 | 9 | 0
INPUTP | 4 | 226 | 202 | 147 | 158
IMPORTS | 2 | 12 | 6 | 12 | 8
EQ | 14 | 
   A<15>.D = A<15> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<15>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<7>.PIN
;Imported pterms FB13_7
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & A<15>.PIN & !Z3_ADR<13> & !$OpTx$FX_DC$25
;Imported pterms FB13_9
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<23>.PIN & !$OpTx$FX_DC$25;
   A<15>.CLK = CLK_EXT;	// GCK
   A<15>.AP = !lan_rdy/lan_rdy_RSTF;
   A<15>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 10 | Z3_DATA<8>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 15 | 10 | 9 | 13
INPUTS | 16 | A<16>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<8>.PIN  | DQ<0>.PIN  | lan_adr  | N0$BUF1.EXP  | EXP42_.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 12 | 15 | 10 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 15 | 9 | 15 | 11 | 0 | 8 | 9 | 0
INPUTP | 4 | 231 | 217 | 147 | 158
IMPORTS | 2 | 15 | 9 | 15 | 11
EQ | 14 | 
   A<16>.D = A<16> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<0>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<8>.PIN
;Imported pterms FB16_10
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<16>.PIN & !$OpTx$FX_DC$25
;Imported pterms FB16_12
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	A<8>.PIN & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   A<16>.CLK = CLK_EXT;	// GCK
   A<16>.AP = !lan_rdy/lan_rdy_RSTF;
   A<16>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 15 | 7 | Z3_DATA<9>
ATTRIBUTES | 8816514 | 0
OUTPUTMC | 2 | 15 | 7 | 11 | 11
INPUTS | 15 | A<17>  | $OpTx$FX_DC$326  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<9>.PIN  | DQ<1>.PIN  | lan_adr  | EXP41_.EXP  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF  | FCS  | RW
INPUTMC | 11 | 15 | 7 | 10 | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 15 | 8 | 0 | 8 | 9 | 0
INPUTP | 4 | 209 | 216 | 147 | 158
IMPORTS | 1 | 15 | 8
EQ | 13 | 
   A<17>.D = A<17> & !$OpTx$FX_DC$326
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<1>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<9>.PIN
;Imported pterms FB16_9
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<9>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<17>.PIN & !$OpTx$FX_DC$25;
   A<17>.CLK = CLK_EXT;	// GCK
   A<17>.AP = !lan_rdy/lan_rdy_RSTF;
   A<17>.OE = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 4 | 8 | LAN_INT_ENABLE
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 3 | 4 | 8 | 4 | 17 | 2 | 13
INPUTS | 4 | LAN_INT_ENABLE  | $OpTx$FX_DC$66  | D<15>.PIN  | RESET
INPUTMC | 2 | 4 | 8 | 9 | 6
INPUTP | 2 | 89 | 263
EQ | 4 | 
   LAN_INT_ENABLE.D = D<15>.PIN & $OpTx$FX_DC$66
	# LAN_INT_ENABLE & !$OpTx$FX_DC$66;
   LAN_INT_ENABLE.CLK = CLK_EXT;	// GCK
   LAN_INT_ENABLE.AR = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 1 | 6 | AUTO_CONFIG_DONE_CYCLE
ATTRIBUTES | 4358928 | 0
OUTPUTMC | 2 | 1 | 6 | 13 | 10
INPUTS | 12 | AUTO_CONFIG_DONE_CYCLE  | FCS  | Z3_ADR<2>  | Z3_ADR_1  | Z3_ADR<6>  | autoconfig  | RW  | Z3_ADR<3>  | Z3_ADR<4>  | Z3_ADR<5>  | $OpTx$FX_DC$25  | RESET
INPUTMC | 9 | 1 | 6 | 14 | 3 | 0 | 12 | 6 | 9 | 6 | 7 | 6 | 13 | 6 | 12 | 6 | 10 | 0 | 8
INPUTP | 3 | 147 | 158 | 263
EQ | 5 | 
   AUTO_CONFIG_DONE_CYCLE.T = !AUTO_CONFIG_DONE_CYCLE & !FCS & !Z3_ADR<2> & 
	Z3_ADR_1 & !Z3_ADR<6> & autoconfig & !RW & !Z3_ADR<3> & 
	Z3_ADR<4> & !Z3_ADR<5> & !$OpTx$FX_DC$25;
   AUTO_CONFIG_DONE_CYCLE.CLK = CLK_EXT;	// GCK
   AUTO_CONFIG_DONE_CYCLE.AR = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 5 | 16 | LAN_BASEADR<0>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 5 | 16 | 2 | 1 | 5 | 17
INPUTS | 11 | D<0>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<0>  | RESET  | D<1>.PIN  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25
INPUTMC | 8 | 1 | 0 | 5 | 16 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 3 | 4 | 263 | 30
EXPORTS | 1 | 5 | 17
EQ | 6 | 
   LAN_BASEADR<0>.D = D<0>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<0> & !$OpTx$FX_DC$42;
   LAN_BASEADR<0>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<0>.AP = !RESET;
    LAN_BASEADR<0>.EXP  =  D<1>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 4 | 15 | LAN_BASEADR<10>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 4 | 15 | 2 | 15
INPUTS | 4 | D<10>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<10>  | RESET
INPUTMC | 2 | 1 | 0 | 4 | 15
INPUTP | 2 | 74 | 263
EQ | 4 | 
   LAN_BASEADR<10>.D = D<10>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<10> & !$OpTx$FX_DC$42;
   LAN_BASEADR<10>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<10>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 3 | 17 | LAN_BASEADR<11>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 3 | 17 | 2 | 16 | 2 | 15
INPUTS | 4 | D<11>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<11>  | RESET
INPUTMC | 2 | 1 | 0 | 3 | 17
INPUTP | 2 | 77 | 263
EQ | 4 | 
   LAN_BASEADR<11>.D = D<11>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<11> & !$OpTx$FX_DC$42;
   LAN_BASEADR<11>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<11>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 3 | 16 | LAN_BASEADR<12>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 3 | 16 | 2 | 14 | 2 | 17
INPUTS | 4 | D<12>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<12>  | RESET
INPUTMC | 2 | 1 | 0 | 3 | 16
INPUTP | 2 | 78 | 263
EQ | 4 | 
   LAN_BASEADR<12>.D = D<12>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<12> & !$OpTx$FX_DC$42;
   LAN_BASEADR<12>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<12>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 3 | 15 | LAN_BASEADR<13>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 3 | 15 | 2 | 17
INPUTS | 4 | D<13>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<13>  | RESET
INPUTMC | 2 | 1 | 0 | 3 | 15
INPUTP | 2 | 80 | 263
EQ | 4 | 
   LAN_BASEADR<13>.D = D<13>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<13> & !$OpTx$FX_DC$42;
   LAN_BASEADR<13>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<13>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 4 | 12 | LAN_BASEADR<14>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 4 | 12 | 2 | 17
INPUTS | 4 | D<14>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<14>  | RESET
INPUTMC | 2 | 1 | 0 | 4 | 12
INPUTP | 2 | 81 | 263
EQ | 4 | 
   LAN_BASEADR<14>.D = D<14>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<14> & !$OpTx$FX_DC$42;
   LAN_BASEADR<14>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<14>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 4 | 10 | LAN_BASEADR<15>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 4 | 10 | 2 | 15
INPUTS | 4 | D<15>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<15>  | RESET
INPUTMC | 2 | 1 | 0 | 4 | 10
INPUTP | 2 | 89 | 263
EQ | 4 | 
   LAN_BASEADR<15>.D = D<15>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<15> & !$OpTx$FX_DC$42;
   LAN_BASEADR<15>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<15>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 5 | 15 | LAN_BASEADR<1>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 5 | 15 | 2 | 13 | 2 | 1
INPUTS | 4 | D<1>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<1>  | RESET
INPUTMC | 2 | 1 | 0 | 5 | 15
INPUTP | 2 | 30 | 263
EQ | 4 | 
   LAN_BASEADR<1>.D = D<1>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<1> & !$OpTx$FX_DC$42;
   LAN_BASEADR<1>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<1>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 3 | 14 | LAN_BASEADR<2>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 3 | 14 | 2 | 13
INPUTS | 4 | D<2>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<2>  | RESET
INPUTMC | 2 | 1 | 0 | 3 | 14
INPUTP | 2 | 71 | 263
EQ | 4 | 
   LAN_BASEADR<2>.D = D<2>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<2> & !$OpTx$FX_DC$42;
   LAN_BASEADR<2>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<2>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 3 | 12 | LAN_BASEADR<3>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 3 | 12 | 2 | 13 | 2 | 0
INPUTS | 4 | D<3>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<3>  | RESET
INPUTMC | 2 | 1 | 0 | 3 | 12
INPUTP | 2 | 28 | 263
EQ | 4 | 
   LAN_BASEADR<3>.D = D<3>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<3> & !$OpTx$FX_DC$42;
   LAN_BASEADR<3>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<3>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 3 | 10 | LAN_BASEADR<4>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 3 | 10 | 2 | 0
INPUTS | 4 | D<4>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<4>  | RESET
INPUTMC | 2 | 1 | 0 | 3 | 10
INPUTP | 2 | 38 | 263
EQ | 4 | 
   LAN_BASEADR<4>.D = D<4>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<4> & !$OpTx$FX_DC$42;
   LAN_BASEADR<4>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<4>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 5 | 14 | LAN_BASEADR<5>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 5 | 14 | 2 | 0
INPUTS | 4 | D<5>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<5>  | RESET
INPUTMC | 2 | 1 | 0 | 5 | 14
INPUTP | 2 | 37 | 263
EQ | 4 | 
   LAN_BASEADR<5>.D = D<5>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<5> & !$OpTx$FX_DC$42;
   LAN_BASEADR<5>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<5>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 6 | 16 | LAN_BASEADR<6>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 6 | 16 | 2 | 14
INPUTS | 4 | D<6>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<6>  | RESET
INPUTMC | 2 | 1 | 0 | 6 | 16
INPUTP | 2 | 26 | 263
EQ | 4 | 
   LAN_BASEADR<6>.D = D<6>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<6> & !$OpTx$FX_DC$42;
   LAN_BASEADR<6>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<6>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 6 | 15 | LAN_BASEADR<7>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 6 | 15 | 2 | 14
INPUTS | 4 | D<7>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<7>  | RESET
INPUTMC | 2 | 1 | 0 | 6 | 15
INPUTP | 2 | 29 | 263
EQ | 4 | 
   LAN_BASEADR<7>.D = D<7>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<7> & !$OpTx$FX_DC$42;
   LAN_BASEADR<7>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<7>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 6 | 14 | LAN_BASEADR<8>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 6 | 14 | 2 | 16
INPUTS | 4 | D<8>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<8>  | RESET
INPUTMC | 2 | 1 | 0 | 6 | 14
INPUTP | 2 | 32 | 263
EQ | 4 | 
   LAN_BASEADR<8>.D = D<8>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<8> & !$OpTx$FX_DC$42;
   LAN_BASEADR<8>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<8>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 5 | 12 | LAN_BASEADR<9>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 5 | 12 | 2 | 16
INPUTS | 4 | D<9>.PIN  | $OpTx$FX_DC$42  | LAN_BASEADR<9>  | RESET
INPUTMC | 2 | 1 | 0 | 5 | 12
INPUTP | 2 | 73 | 263
EQ | 4 | 
   LAN_BASEADR<9>.D = D<9>.PIN & $OpTx$FX_DC$42
	# LAN_BASEADR<9> & !$OpTx$FX_DC$42;
   LAN_BASEADR<9>.CLK = CLK_EXT;	// GCK
   LAN_BASEADR<9>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 4 | 17 | LAN_IRQ_OUT
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 2 | 4 | 17 | 2 | 13
INPUTS | 7 | LAN_INT  | LAN_IRQ_D0  | LAN_INT_ENABLE  | D<14>.PIN  | $OpTx$FX_DC$66  | LAN_IRQ_OUT  | RESET
INPUTMC | 4 | 4 | 3 | 4 | 8 | 9 | 6 | 4 | 17
INPUTP | 3 | 201 | 81 | 263
EQ | 7 | 
   !LAN_IRQ_OUT.D = !LAN_INT & LAN_IRQ_D0
	# LAN_INT_ENABLE & !D<14>.PIN & !LAN_INT & 
	$OpTx$FX_DC$66
	# LAN_INT_ENABLE & !LAN_IRQ_OUT & !LAN_INT & 
	!$OpTx$FX_DC$66;
   LAN_IRQ_OUT.CLK = CLK_EXT;	// GCK
   LAN_IRQ_OUT.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 9 | 16 | DQ_10_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 11 | A<18>  | $OpTx$FX_DC$61  | RESET  | LAN_D_INIT<10>  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<26>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_14_IOBUFE/DQ_14_IOBUFE_TRST
INPUTMC | 9 | 15 | 5 | 9 | 14 | 6 | 3 | 6 | 6 | 10 | 15 | 7 | 15 | 9 | 0 | 0 | 8 | 9 | 8
INPUTP | 2 | 263 | 158
EQ | 5 | 
   DQ<10> = A<18> & !$OpTx$FX_DC$61
	# !RESET & LAN_D_INIT<10>
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<26> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<10>.OE = DQ_14_IOBUFE/DQ_14_IOBUFE_TRST;

MACROCELL | 11 | 9 | DQ_11_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 11 | A<19>  | $OpTx$FX_DC$61  | RESET  | LAN_D_INIT<10>  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<27>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_11_IOBUFE/DQ_11_IOBUFE_TRST
INPUTMC | 9 | 15 | 2 | 9 | 14 | 6 | 3 | 6 | 6 | 10 | 15 | 7 | 0 | 9 | 0 | 0 | 8 | 9 | 12
INPUTP | 2 | 263 | 158
EQ | 5 | 
   DQ<11> = A<19> & !$OpTx$FX_DC$61
	# !RESET & LAN_D_INIT<10>
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<27> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<11>.OE = DQ_11_IOBUFE/DQ_11_IOBUFE_TRST;

MACROCELL | 9 | 1 | DQ_1_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 11 | A<9>  | $OpTx$FX_DC$61  | RESET  | LAN_D_INIT<1>  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<17>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_14_IOBUFE/DQ_14_IOBUFE_TRST
INPUTMC | 9 | 8 | 13 | 9 | 14 | 6 | 1 | 6 | 6 | 10 | 15 | 8 | 15 | 9 | 0 | 0 | 8 | 9 | 8
INPUTP | 2 | 263 | 158
EQ | 5 | 
   DQ<1> = A<9> & !$OpTx$FX_DC$61
	# !RESET & LAN_D_INIT<1>
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<17> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<1>.OE = DQ_14_IOBUFE/DQ_14_IOBUFE_TRST;

MACROCELL | 9 | 9 | DQ_4_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 11 | A<12>  | $OpTx$FX_DC$61  | RESET  | LAN_D_INIT<1>  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<20>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_14_IOBUFE/DQ_14_IOBUFE_TRST
INPUTMC | 9 | 10 | 4 | 9 | 14 | 6 | 1 | 6 | 6 | 10 | 15 | 12 | 17 | 9 | 0 | 0 | 8 | 9 | 8
INPUTP | 2 | 263 | 158
EQ | 5 | 
   DQ<4> = A<12> & !$OpTx$FX_DC$61
	# !RESET & LAN_D_INIT<1>
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<20> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<4>.OE = DQ_14_IOBUFE/DQ_14_IOBUFE_TRST;

MACROCELL | 11 | 11 | DQ_9_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 11 | A<17>  | $OpTx$FX_DC$61  | RESET  | LAN_D_INIT<9>  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<25>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_14_IOBUFE/DQ_14_IOBUFE_TRST
INPUTMC | 9 | 15 | 7 | 9 | 14 | 11 | 13 | 6 | 6 | 10 | 15 | 5 | 17 | 9 | 0 | 0 | 8 | 9 | 8
INPUTP | 2 | 263 | 158
EQ | 5 | 
   DQ<9> = A<17> & !$OpTx$FX_DC$61
	# !RESET & LAN_D_INIT<9>
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<25> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<9>.OE = DQ_14_IOBUFE/DQ_14_IOBUFE_TRST;

MACROCELL | 3 | 1 | D_0_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 5 | Z3_DATA<16>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 4 | 8 | 17 | 9 | 3 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 2 | 
   !D<0> = !Z3_DATA<16> & Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<0>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 4 | 13 | D_10_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | Dout1<2>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | Z3_DATA<26>  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 5 | 1 | 8 | 9 | 3 | 7 | 15 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 3 | 
   D<10> = Z3_DATA<26> & Z3_DATA<7>/Z3_DATA<7>_TRST
	# Dout1<2> & !Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<10>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 4 | 14 | D_11_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | Dout1<3>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | Z3_DATA<27>  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 5 | 4 | 6 | 9 | 3 | 7 | 0 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 3 | 
   D<11> = Z3_DATA<27> & Z3_DATA<7>/Z3_DATA<7>_TRST
	# Dout1<3> & !Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<11>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 4 | 16 | D_12_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | Dout1<4>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | Z3_DATA<28>  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 5 | 1 | 15 | 9 | 3 | 12 | 15 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 3 | 
   D<12> = Z3_DATA<28> & Z3_DATA<7>/Z3_DATA<7>_TRST
	# Dout1<4> & !Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<12>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 6 | 2 | D_13_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | Dout1<5>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | Z3_DATA<29>  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 5 | 1 | 12 | 9 | 3 | 14 | 1 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 3 | 
   D<13> = Z3_DATA<29> & Z3_DATA<7>/Z3_DATA<7>_TRST
	# Dout1<5> & !Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<13>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 6 | 4 | D_14_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | Dout1<6>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | Z3_DATA<30>  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 5 | 1 | 10 | 9 | 3 | 12 | 14 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 3 | 
   D<14> = Z3_DATA<30> & Z3_DATA<7>/Z3_DATA<7>_TRST
	# Dout1<6> & !Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<14>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 6 | 11 | D_15_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | Dout1<7>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | Z3_DATA<31>  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 5 | 4 | 5 | 9 | 3 | 11 | 16 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 3 | 
   D<15> = Z3_DATA<31> & Z3_DATA<7>/Z3_DATA<7>_TRST
	# Dout1<7> & !Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<15>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 1 | 14 | D_1_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 5 | Z3_DATA<17>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 4 | 8 | 15 | 9 | 3 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 2 | 
   !D<1> = !Z3_DATA<17> & Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<1>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 4 | 9 | D_2_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 5 | Z3_DATA<18>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 4 | 7 | 17 | 9 | 3 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 2 | 
   !D<2> = !Z3_DATA<18> & Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<2>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 1 | 11 | D_3_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 5 | Z3_DATA<19>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 4 | 7 | 16 | 9 | 3 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 2 | 
   !D<3> = !Z3_DATA<19> & Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<3>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 0 | 5 | D_4_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 5 | Z3_DATA<20>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 4 | 12 | 17 | 9 | 3 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 2 | 
   !D<4> = !Z3_DATA<20> & Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<4>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 0 | 4 | D_5_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 5 | Z3_DATA<21>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 4 | 14 | 17 | 9 | 3 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 2 | 
   !D<5> = !Z3_DATA<21> & Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<5>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 1 | 9 | D_6_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 5 | Z3_DATA<22>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 4 | 12 | 16 | 9 | 3 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 2 | 
   !D<6> = !Z3_DATA<22> & Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<6>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 1 | 13 | D_7_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 5 | Z3_DATA<23>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 4 | 11 | 17 | 9 | 3 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 2 | 
   !D<7> = !Z3_DATA<23> & Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<7>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 1 | 16 | D_8_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | Dout1<0>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | Z3_DATA<24>  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 5 | 4 | 7 | 9 | 3 | 8 | 14 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 3 | 
   D<8> = Z3_DATA<24> & Z3_DATA<7>/Z3_DATA<7>_TRST
	# Dout1<0> & !Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<8>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 4 | 11 | D_9_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 6 | Dout1<1>  | Z3_DATA<7>/Z3_DATA<7>_TRST  | Z3_DATA<25>  | RW  | SLAVE  | $OpTx$FX_DC$25
INPUTMC | 5 | 1 | 17 | 9 | 3 | 5 | 17 | 13 | 13 | 0 | 8
INPUTP | 1 | 158
EQ | 3 | 
   D<9> = Z3_DATA<25> & Z3_DATA<7>/Z3_DATA<7>_TRST
	# Dout1<1> & !Z3_DATA<7>/Z3_DATA<7>_TRST;
   D<9>.OE = RW & !SLAVE & !$OpTx$FX_DC$25;

MACROCELL | 9 | 2 | DQ_0_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 10 | A<8>  | $OpTx$FX_DC$49  | RESET  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<16>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_14_IOBUFE/DQ_14_IOBUFE_TRST
INPUTMC | 8 | 8 | 10 | 9 | 15 | 6 | 6 | 10 | 15 | 8 | 17 | 9 | 0 | 0 | 8 | 9 | 8
INPUTP | 2 | 263 | 158
EQ | 4 | 
   DQ<0> = A<8> & !$OpTx$FX_DC$49
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<16> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<0>.OE = DQ_14_IOBUFE/DQ_14_IOBUFE_TRST;

MACROCELL | 7 | 1 | DQ_12_IOBUFE
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 7 | 0
INPUTS | 16 | A<20>  | $OpTx$FX_DC$49  | RESET  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<28>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_14_IOBUFE/DQ_14_IOBUFE_TRST  | D<11>.PIN  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | Z3_ADR<13>  | D<3>.PIN
INPUTMC | 12 | 15 | 1 | 9 | 15 | 6 | 6 | 10 | 15 | 12 | 15 | 9 | 0 | 0 | 8 | 9 | 8 | 6 | 17 | 12 | 0 | 10 | 7 | 14 | 2
INPUTP | 4 | 263 | 158 | 77 | 28
EXPORTS | 1 | 7 | 0
EQ | 8 | 
   DQ<12> = A<20> & !$OpTx$FX_DC$49
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<28> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<12>.OE = DQ_14_IOBUFE/DQ_14_IOBUFE_TRST;
    DQ_12_IOBUFE.EXP  =  D<11>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# D<3>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25

MACROCELL | 11 | 7 | DQ_13_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 10 | A<21>  | $OpTx$FX_DC$49  | RESET  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<29>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_11_IOBUFE/DQ_11_IOBUFE_TRST
INPUTMC | 8 | 14 | 16 | 9 | 15 | 6 | 6 | 10 | 15 | 14 | 1 | 9 | 0 | 0 | 8 | 9 | 12
INPUTP | 2 | 263 | 158
EQ | 4 | 
   DQ<13> = A<21> & !$OpTx$FX_DC$49
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<29> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<13>.OE = DQ_11_IOBUFE/DQ_11_IOBUFE_TRST;

MACROCELL | 7 | 2 | DQ_14_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 10 | A<22>  | $OpTx$FX_DC$49  | RESET  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<30>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_14_IOBUFE/DQ_14_IOBUFE_TRST
INPUTMC | 8 | 14 | 14 | 9 | 15 | 6 | 6 | 10 | 15 | 12 | 14 | 9 | 0 | 0 | 8 | 9 | 8
INPUTP | 2 | 263 | 158
EQ | 4 | 
   DQ<14> = A<22> & !$OpTx$FX_DC$49
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<30> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<14>.OE = DQ_14_IOBUFE/DQ_14_IOBUFE_TRST;

MACROCELL | 11 | 4 | DQ_15_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 10 | A<23>  | $OpTx$FX_DC$49  | RESET  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<31>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_14_IOBUFE/DQ_14_IOBUFE_TRST
INPUTMC | 8 | 14 | 13 | 9 | 15 | 6 | 6 | 10 | 15 | 11 | 16 | 9 | 0 | 0 | 8 | 9 | 8
INPUTP | 2 | 263 | 158
EQ | 4 | 
   DQ<15> = A<23> & !$OpTx$FX_DC$49
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<31> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<15>.OE = DQ_14_IOBUFE/DQ_14_IOBUFE_TRST;

MACROCELL | 9 | 5 | DQ_2_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 10 | A<10>  | $OpTx$FX_DC$49  | RESET  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<18>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_11_IOBUFE/DQ_11_IOBUFE_TRST
INPUTMC | 8 | 8 | 16 | 9 | 15 | 6 | 6 | 10 | 15 | 7 | 17 | 9 | 0 | 0 | 8 | 9 | 12
INPUTP | 2 | 263 | 158
EQ | 4 | 
   DQ<2> = A<10> & !$OpTx$FX_DC$49
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<18> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<2>.OE = DQ_11_IOBUFE/DQ_11_IOBUFE_TRST;

MACROCELL | 9 | 4 | DQ_3_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 10 | A<11>  | $OpTx$FX_DC$49  | RESET  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<19>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_14_IOBUFE/DQ_14_IOBUFE_TRST
INPUTMC | 8 | 10 | 2 | 9 | 15 | 6 | 6 | 10 | 15 | 7 | 16 | 9 | 0 | 0 | 8 | 9 | 8
INPUTP | 2 | 263 | 158
EQ | 4 | 
   DQ<3> = A<11> & !$OpTx$FX_DC$49
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<19> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<3>.OE = DQ_14_IOBUFE/DQ_14_IOBUFE_TRST;

MACROCELL | 9 | 7 | DQ_5_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 10 | A<13>  | $OpTx$FX_DC$49  | RESET  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<21>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_14_IOBUFE/DQ_14_IOBUFE_TRST
INPUTMC | 8 | 10 | 9 | 9 | 15 | 6 | 6 | 10 | 15 | 14 | 17 | 9 | 0 | 0 | 8 | 9 | 8
INPUTP | 2 | 263 | 158
EQ | 4 | 
   DQ<5> = A<13> & !$OpTx$FX_DC$49
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<21> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<5>.OE = DQ_14_IOBUFE/DQ_14_IOBUFE_TRST;

MACROCELL | 9 | 11 | DQ_6_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 10 | A<14>  | $OpTx$FX_DC$49  | RESET  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<22>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_14_IOBUFE/DQ_14_IOBUFE_TRST
INPUTMC | 8 | 10 | 10 | 9 | 15 | 6 | 6 | 10 | 15 | 12 | 16 | 9 | 0 | 0 | 8 | 9 | 8
INPUTP | 2 | 263 | 158
EQ | 4 | 
   DQ<6> = A<14> & !$OpTx$FX_DC$49
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<22> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<6>.OE = DQ_14_IOBUFE/DQ_14_IOBUFE_TRST;

MACROCELL | 9 | 10 | DQ_7_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 10 | A<15>  | $OpTx$FX_DC$49  | RESET  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<23>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_14_IOBUFE/DQ_14_IOBUFE_TRST
INPUTMC | 8 | 12 | 7 | 9 | 15 | 6 | 6 | 10 | 15 | 11 | 17 | 9 | 0 | 0 | 8 | 9 | 8
INPUTP | 2 | 263 | 158
EQ | 4 | 
   DQ<7> = A<15> & !$OpTx$FX_DC$49
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<23> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<7>.OE = DQ_14_IOBUFE/DQ_14_IOBUFE_TRST;

MACROCELL | 9 | 13 | DQ_8_IOBUFE
ATTRIBUTES | 265986 | 0
INPUTS | 10 | A<16>  | $OpTx$FX_DC$49  | RESET  | lan_adr  | RW  | Z3_A_LOW  | Z3_DATA<24>  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25  | DQ_11_IOBUFE/DQ_11_IOBUFE_TRST
INPUTMC | 8 | 15 | 10 | 9 | 15 | 6 | 6 | 10 | 15 | 8 | 14 | 9 | 0 | 0 | 8 | 9 | 12
INPUTP | 2 | 263 | 158
EQ | 4 | 
   DQ<8> = A<16> & !$OpTx$FX_DC$49
	# RESET & lan_adr & !RW & !Z3_A_LOW & Z3_DATA<24> & 
	lan_rdy/lan_rdy_RSTF & !$OpTx$FX_DC$25;
   DQ<8>.OE = DQ_11_IOBUFE/DQ_11_IOBUFE_TRST;

MACROCELL | 6 | 17 | lan_adr_sw
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 61 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 8 | 12 | 8 | 15 | 7 | 17 | 7 | 16 | 12 | 17 | 14 | 17 | 12 | 16 | 11 | 17 | 8 | 14 | 5 | 17 | 7 | 15 | 7 | 0 | 12 | 15 | 14 | 1 | 12 | 14 | 11 | 16 | 5 | 16 | 7 | 1 | 7 | 14 | 8 | 0 | 8 | 9 | 8 | 11 | 8 | 17 | 10 | 1 | 10 | 3 | 10 | 5 | 10 | 8 | 10 | 11 | 11 | 0 | 11 | 15 | 12 | 0 | 12 | 6 | 12 | 8 | 12 | 13 | 14 | 0 | 14 | 2 | 14 | 12 | 14 | 15 | 15 | 0 | 15 | 3 | 15 | 4 | 15 | 6 | 15 | 8 | 15 | 9 | 15 | 11
INPUTS | 8 | Z3  | SHUT_UP  | A<14>.PIN  | Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000/Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000_D2  | BUF_autoconfig  | A<13>.PIN  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 4 | 1 | 3 | 2 | 16 | 0 | 6 | 6 | 0
INPUTP | 4 | 151 | 125 | 123 | 147
EQ | 6 | 
   lan_adr_sw.D = Z3 & !SHUT_UP & !A<13>.PIN & 
	!Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000/Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000_D2 & !BUF_autoconfig
	# Z3 & !SHUT_UP & !A<14>.PIN & 
	!Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000/Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000_D2 & !BUF_autoconfig;
   lan_adr_sw.CLK = !FCS;
   lan_adr_sw.AR = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 12 | 0 | LAN_SM_FSM_FFd4
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 69 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 10 | 7 | 10 | 0 | 10 | 15 | 8 | 12 | 8 | 15 | 7 | 17 | 7 | 16 | 12 | 17 | 14 | 17 | 12 | 16 | 11 | 17 | 8 | 14 | 5 | 17 | 7 | 15 | 7 | 0 | 12 | 15 | 14 | 1 | 12 | 14 | 11 | 16 | 10 | 12 | 10 | 8 | 10 | 17 | 10 | 14 | 10 | 1 | 14 | 4 | 5 | 16 | 7 | 1 | 7 | 14 | 8 | 0 | 8 | 9 | 8 | 11 | 8 | 17 | 10 | 3 | 10 | 5 | 10 | 11 | 10 | 16 | 11 | 0 | 11 | 15 | 12 | 0 | 12 | 6 | 12 | 8 | 12 | 13 | 14 | 0 | 14 | 2 | 14 | 12 | 14 | 15 | 15 | 0 | 15 | 3 | 15 | 4 | 15 | 6 | 15 | 8 | 15 | 9 | 15 | 11
INPUTS | 10 | BUF_LAN_SM_FSM_FFd4__$INT  | lan_rdy/lan_rdy_RSTF  | D<12>.PIN  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | D<4>.PIN
INPUTMC | 8 | 10 | 17 | 9 | 0 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 2 | 78 | 38
EXPORTS | 1 | 12 | 17
EQ | 7 | 
   !LAN_SM_FSM_FFd4.D = BUF_LAN_SM_FSM_FFd4__$INT;
   LAN_SM_FSM_FFd4.CLK = CLK_EXT;	// GCK
   LAN_SM_FSM_FFd4.AR = !lan_rdy/lan_rdy_RSTF;
    LAN_SM_FSM_FFd4.EXP  =  D<12>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# D<4>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 10 | LAN_SM_FSM_FFd2
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 45 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 10 | 7 | 10 | 15 | 8 | 12 | 8 | 15 | 7 | 17 | 7 | 16 | 12 | 17 | 14 | 17 | 12 | 16 | 11 | 17 | 8 | 14 | 5 | 17 | 7 | 15 | 7 | 0 | 12 | 15 | 14 | 1 | 12 | 14 | 11 | 16 | 11 | 15 | 5 | 11 | 10 | 12 | 10 | 8 | 10 | 17 | 10 | 14 | 10 | 1 | 8 | 0 | 8 | 17 | 10 | 16 | 14 | 0
INPUTS | 2 | BUF_LAN_SM_FSM_FFd2  | lan_rdy/lan_rdy_RSTF
INPUTMC | 2 | 10 | 14 | 9 | 0
EQ | 3 | 
   LAN_SM_FSM_FFd2.D = BUF_LAN_SM_FSM_FFd2;
   LAN_SM_FSM_FFd2.CLK = CLK_EXT;	// GCK
   LAN_SM_FSM_FFd2.AR = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 3 | Z3_ADR<2>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 10 | 1 | 6 | 1 | 3 | 4 | 7 | 1 | 17 | 1 | 8 | 1 | 15 | 1 | 12 | 1 | 10 | 3 | 7 | 1 | 0
INPUTS | 3 | A<4>  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 1 | 6 | 0
INPUTP | 2 | 97 | 147
EQ | 3 | 
   Z3_ADR<2>.D = A<4>;
   Z3_ADR<2>.CLK = !FCS;
   Z3_ADR<2>.AP = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 10 | 7 | LAN_SM_FSM_FFd3
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 68 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 10 | 7 | 10 | 0 | 10 | 15 | 8 | 12 | 8 | 15 | 7 | 17 | 7 | 16 | 12 | 14 | 14 | 15 | 12 | 16 | 11 | 17 | 8 | 14 | 5 | 17 | 7 | 14 | 5 | 16 | 12 | 15 | 14 | 1 | 12 | 13 | 11 | 16 | 10 | 12 | 10 | 8 | 10 | 17 | 10 | 14 | 10 | 1 | 14 | 4 | 7 | 0 | 7 | 1 | 7 | 15 | 8 | 0 | 8 | 9 | 8 | 11 | 8 | 17 | 10 | 3 | 10 | 5 | 10 | 11 | 11 | 0 | 11 | 15 | 12 | 0 | 12 | 6 | 12 | 8 | 12 | 17 | 14 | 0 | 14 | 2 | 14 | 12 | 14 | 17 | 15 | 0 | 15 | 3 | 15 | 4 | 15 | 6 | 15 | 8 | 15 | 9 | 15 | 11
INPUTS | 6 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | $OpTx$FX_DC$23  | LAN_SM_FSM_FFd1  | lan_rdy/lan_rdy_RSTF
INPUTMC | 6 | 12 | 0 | 12 | 10 | 10 | 7 | 5 | 10 | 10 | 0 | 9 | 0
EQ | 6 | 
   !LAN_SM_FSM_FFd3.D = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !$OpTx$FX_DC$23
	# !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1;
   LAN_SM_FSM_FFd3.CLK = CLK_EXT;	// GCK
   LAN_SM_FSM_FFd3.AR = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 0 | 15 | Z3_ADR_0
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 9 | 1 | 3 | 4 | 7 | 1 | 17 | 1 | 8 | 1 | 15 | 1 | 12 | 1 | 10 | 3 | 4 | 1 | 0
INPUTS | 3 | A<2>  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 1 | 6 | 0
INPUTP | 2 | 101 | 147
EQ | 3 | 
   Z3_ADR_0.D = A<2>;
   Z3_ADR_0.CLK = !FCS;
   Z3_ADR_0.AP = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 0 | 12 | Z3_ADR_1
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 12 | 1 | 6 | 1 | 3 | 4 | 7 | 1 | 17 | 1 | 8 | 4 | 6 | 1 | 15 | 1 | 12 | 1 | 10 | 4 | 5 | 3 | 11 | 1 | 0
INPUTS | 3 | A<3>  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 1 | 6 | 0
INPUTP | 2 | 99 | 147
EQ | 3 | 
   Z3_ADR_1.D = A<3>;
   Z3_ADR_1.CLK = !FCS;
   Z3_ADR_1.AP = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 10 | 0 | LAN_SM_FSM_FFd1
ATTRIBUTES | 4358928 | 0
OUTPUTMC | 46 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 10 | 7 | 10 | 0 | 10 | 15 | 8 | 12 | 8 | 15 | 7 | 17 | 7 | 16 | 12 | 17 | 14 | 17 | 12 | 16 | 11 | 17 | 8 | 14 | 5 | 17 | 7 | 15 | 7 | 0 | 12 | 15 | 14 | 1 | 12 | 14 | 11 | 16 | 11 | 15 | 5 | 11 | 10 | 12 | 10 | 8 | 10 | 17 | 12 | 12 | 10 | 1 | 8 | 0 | 8 | 17 | 10 | 16 | 14 | 0
INPUTS | 8 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | lan_adr  | RW  | Z3_ADR<13>  | $OpTx$FX_DC$25  | lan_rdy/lan_rdy_RSTF
INPUTMC | 7 | 12 | 0 | 10 | 7 | 10 | 0 | 6 | 6 | 14 | 2 | 0 | 8 | 9 | 0
INPUTP | 1 | 158
EQ | 4 | 
   LAN_SM_FSM_FFd1.T = !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd1 & lan_adr & !RW & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   LAN_SM_FSM_FFd1.CLK = CLK_EXT;	// GCK
   LAN_SM_FSM_FFd1.AR = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 3 | 3 | LAN_RST_SM_FSM_FFd3
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 4 | 3 | 6 | 3 | 8 | 3 | 2 | 3 | 0
INPUTS | 4 | LAN_RST_SM_FSM_FFd1  | BUF_LAN_D_INIT<1>__$INT  | LAN_RST_SM_FSM_FFd2  | RESET
INPUTMC | 3 | 3 | 8 | 3 | 0 | 3 | 6
INPUTP | 1 | 263
EQ | 5 | 
   LAN_RST_SM_FSM_FFd3.D = LAN_RST_SM_FSM_FFd1 & !BUF_LAN_D_INIT<1>__$INT
	# !LAN_RST_SM_FSM_FFd2 & !LAN_RST_SM_FSM_FFd1 & 
	BUF_LAN_D_INIT<1>__$INT;
   LAN_RST_SM_FSM_FFd3.CLK = CLK_EXT;	// GCK
   LAN_RST_SM_FSM_FFd3.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 6 | 9 | Z3_ADR<6>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 8 | 1 | 6 | 1 | 3 | 1 | 15 | 1 | 12 | 1 | 10 | 4 | 5 | 1 | 2 | 1 | 0
INPUTS | 3 | A<8>.PIN  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 1 | 6 | 0
INPUTP | 2 | 106 | 147
EQ | 3 | 
   Z3_ADR<6>.D = A<8>.PIN;
   Z3_ADR<6>.CLK = !FCS;
   Z3_ADR<6>.AP = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 3 | 6 | LAN_RST_SM_FSM_FFd2
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 5 | 3 | 3 | 3 | 6 | 3 | 8 | 3 | 2 | 3 | 0
INPUTS | 4 | BUF_LAN_D_INIT<1>__$INT  | LAN_RST_SM_FSM_FFd3  | LAN_RST_SM_FSM_FFd2  | RESET
INPUTMC | 3 | 3 | 0 | 3 | 3 | 3 | 6
INPUTP | 1 | 263
EQ | 4 | 
   LAN_RST_SM_FSM_FFd2.D = BUF_LAN_D_INIT<1>__$INT
	# LAN_RST_SM_FSM_FFd3 & !LAN_RST_SM_FSM_FFd2;
   LAN_RST_SM_FSM_FFd2.CLK = CLK_EXT;	// GCK
   LAN_RST_SM_FSM_FFd2.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 6 | 7 | autoconfig
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 13 | 1 | 6 | 1 | 3 | 4 | 7 | 1 | 17 | 1 | 8 | 4 | 6 | 1 | 15 | 1 | 12 | 1 | 10 | 4 | 5 | 13 | 13 | 1 | 0 | 0 | 10
INPUTS | 3 | BUF_autoconfig  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 2 | 0 | 6 | 6 | 0
INPUTP | 1 | 147
EQ | 3 | 
   autoconfig.D = BUF_autoconfig;
   autoconfig.CLK = !FCS;
   autoconfig.AR = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 6 | 6 | lan_adr
ATTRIBUTES | 8520496 | 0
OUTPUTMC | 88 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 9 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 5 | 9 | 4 | 9 | 7 | 9 | 11 | 9 | 10 | 9 | 13 | 10 | 0 | 10 | 15 | 8 | 12 | 8 | 15 | 7 | 17 | 7 | 16 | 12 | 14 | 14 | 15 | 12 | 16 | 11 | 17 | 8 | 14 | 5 | 17 | 7 | 14 | 5 | 16 | 12 | 15 | 14 | 1 | 12 | 13 | 11 | 16 | 7 | 7 | 13 | 13 | 10 | 8 | 9 | 6 | 9 | 8 | 9 | 14 | 9 | 12 | 9 | 3 | 9 | 15 | 10 | 17 | 10 | 14 | 7 | 0 | 7 | 15 | 8 | 0 | 8 | 9 | 8 | 11 | 8 | 17 | 10 | 1 | 10 | 3 | 10 | 5 | 10 | 11 | 11 | 0 | 11 | 15 | 12 | 0 | 12 | 6 | 12 | 8 | 12 | 17 | 14 | 0 | 14 | 2 | 14 | 12 | 14 | 17 | 15 | 0 | 15 | 3 | 15 | 4 | 15 | 6 | 15 | 8 | 15 | 9 | 15 | 11
INPUTS | 6 | Z3  | SHUT_UP  | Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000/Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000_D2  | BUF_autoconfig  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 4 | 1 | 3 | 2 | 16 | 0 | 6 | 6 | 0
INPUTP | 2 | 151 | 147
EQ | 4 | 
   lan_adr.D = Z3 & !SHUT_UP & 
	!Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000/Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000_D2 & !BUF_autoconfig;
   lan_adr.CLK = !FCS;
   lan_adr.AR = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 3 | 8 | LAN_RST_SM_FSM_FFd1
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 5 | 3 | 3 | 3 | 8 | 3 | 2 | 3 | 9 | 3 | 0
INPUTS | 4 | LAN_RST_SM_FSM_FFd3  | LAN_RST_SM_FSM_FFd2  | LAN_RST_SM_FSM_FFd1  | RESET
INPUTMC | 3 | 3 | 3 | 3 | 6 | 3 | 8
INPUTP | 1 | 263
EQ | 4 | 
   LAN_RST_SM_FSM_FFd1.D = !LAN_RST_SM_FSM_FFd3
	# !LAN_RST_SM_FSM_FFd2 & LAN_RST_SM_FSM_FFd1;
   LAN_RST_SM_FSM_FFd1.CLK = CLK_EXT;	// GCK
   LAN_RST_SM_FSM_FFd1.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 2 | Z3_ADR<13>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 52 | 8 | 9 | 15 | 4 | 14 | 17 | 15 | 0 | 14 | 15 | 14 | 2 | 14 | 12 | 8 | 12 | 8 | 13 | 10 | 1 | 10 | 3 | 10 | 5 | 8 | 17 | 12 | 6 | 15 | 9 | 15 | 6 | 10 | 0 | 10 | 15 | 8 | 16 | 8 | 15 | 7 | 17 | 7 | 16 | 12 | 14 | 14 | 0 | 12 | 16 | 11 | 17 | 8 | 14 | 5 | 17 | 7 | 14 | 5 | 16 | 12 | 15 | 14 | 1 | 12 | 13 | 11 | 16 | 10 | 8 | 9 | 6 | 10 | 17 | 10 | 14 | 7 | 0 | 7 | 1 | 7 | 15 | 8 | 0 | 8 | 11 | 10 | 11 | 11 | 0 | 11 | 15 | 12 | 0 | 12 | 8 | 12 | 17 | 15 | 3 | 15 | 8 | 15 | 11
INPUTS | 10 | A<15>.PIN  | FCS  | lan_adr_sw/lan_adr_sw_RSTF  | D<5>.PIN  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25
INPUTMC | 7 | 6 | 0 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 3 | 139 | 147 | 37
EXPORTS | 1 | 14 | 1
EQ | 5 | 
   Z3_ADR<13>.D = A<15>.PIN;
   Z3_ADR<13>.CLK = !FCS;
   Z3_ADR<13>.AP = !lan_adr_sw/lan_adr_sw_RSTF;
    Z3_ADR<13>.EXP  =  D<5>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25

MACROCELL | 6 | 13 | Z3_ADR<3>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 12 | 1 | 6 | 1 | 3 | 4 | 7 | 1 | 17 | 1 | 8 | 4 | 6 | 1 | 15 | 1 | 12 | 1 | 10 | 4 | 5 | 1 | 1 | 1 | 0
INPUTS | 3 | A<5>  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 1 | 6 | 0
INPUTP | 2 | 91 | 147
EQ | 3 | 
   Z3_ADR<3>.D = A<5>;
   Z3_ADR<3>.CLK = !FCS;
   Z3_ADR<3>.AP = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 6 | 12 | Z3_ADR<4>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 12 | 1 | 6 | 1 | 3 | 4 | 7 | 1 | 17 | 1 | 8 | 4 | 6 | 1 | 15 | 1 | 12 | 1 | 10 | 4 | 5 | 3 | 13 | 1 | 0
INPUTS | 3 | A<6>  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 1 | 6 | 0
INPUTP | 2 | 98 | 147
EQ | 3 | 
   Z3_ADR<4>.D = A<6>;
   Z3_ADR<4>.CLK = !FCS;
   Z3_ADR<4>.AP = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 6 | 10 | Z3_ADR<5>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 12 | 1 | 6 | 1 | 3 | 4 | 7 | 1 | 17 | 1 | 8 | 4 | 6 | 1 | 15 | 1 | 12 | 1 | 10 | 4 | 5 | 1 | 4 | 1 | 0
INPUTS | 3 | A<7>  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 1 | 6 | 0
INPUTP | 2 | 100 | 147
EQ | 3 | 
   Z3_ADR<5>.D = A<7>;
   Z3_ADR<5>.CLK = !FCS;
   Z3_ADR<5>.AP = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 10 | 15 | Z3_A_LOW
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 19 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 9 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 5 | 9 | 4 | 9 | 7 | 9 | 11 | 9 | 10 | 9 | 13 | 3 | 5 | 9 | 14 | 9 | 15
INPUTS | 9 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | $OpTx$FX_DC$23  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$24  | lan_rdy/lan_rdy_RSTF
INPUTMC | 9 | 12 | 0 | 12 | 10 | 5 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 14 | 2 | 5 | 8 | 9 | 0
EQ | 9 | 
   Z3_A_LOW.D = LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2
	# !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!$OpTx$FX_DC$23
	# !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & 
	LAN_SM_FSM_FFd1
	# !LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & lan_adr & 
	!Z3_ADR<13> & !$OpTx$FX_DC$23 & $OpTx$FX_DC$24;
   Z3_A_LOW.CLK = CLK_EXT;	// GCK
   Z3_A_LOW.AR = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 8 | 17 | Z3_DATA<16>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 4 | 3 | 1 | 9 | 2 | 8 | 17 | 8 | 16
INPUTS | 15 | Z3_DATA<16>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<10>.PIN  | lan_adr  | Z3_ADR<13>  | A<18>.PIN  | $OpTx$FX_DC$25  | A<10>.PIN  | EXP27_.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 8 | 17 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 14 | 2 | 0 | 8 | 8 | 0 | 9 | 0
INPUTP | 3 | 234 | 171 | 112
EXPORTS | 1 | 8 | 16
IMPORTS | 1 | 8 | 0
EQ | 18 | 
   Z3_DATA<16>.D = Z3_DATA<16> & !$OpTx$FX_DC$325
;Imported pterms FB9_1
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<8>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<0>.PIN
	# D<0>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# D<8>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<16>.CLK = CLK_EXT;	// GCK
   Z3_DATA<16>.AP = !lan_rdy/lan_rdy_RSTF;
    Z3_DATA<16>.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<10>.PIN
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<18>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<10>.PIN & !$OpTx$FX_DC$25
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 8 | 15 | Z3_DATA<17>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 9 | 1 | 1 | 14 | 8 | 15
INPUTS | 15 | Z3_DATA<17>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<1>.PIN  | DQ<9>.PIN  | D<1>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | Z3_DATA<2>.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 8 | 15 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 8 | 16 | 9 | 0
INPUTP | 3 | 216 | 209 | 30
IMPORTS | 1 | 8 | 16
EQ | 12 | 
   Z3_DATA<17>.D = Z3_DATA<17> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<9>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<1>.PIN
	# D<1>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
;Imported pterms FB9_17
	# D<9>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<17>.CLK = CLK_EXT;	// GCK
   Z3_DATA<17>.AP = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 7 | 17 | Z3_DATA<18>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 4 | 9 | 9 | 5 | 7 | 17
INPUTS | 15 | Z3_DATA<18>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<2>.PIN  | DQ<10>.PIN  | D<2>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | Z3_DATA<27>.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 7 | 17 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 7 | 0 | 9 | 0
INPUTP | 3 | 220 | 234 | 71
IMPORTS | 1 | 7 | 0
EQ | 12 | 
   Z3_DATA<18>.D = Z3_DATA<18> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<10>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<2>.PIN
	# D<2>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
;Imported pterms FB8_1
	# D<10>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<18>.CLK = CLK_EXT;	// GCK
   Z3_DATA<18>.AP = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 7 | 16 | Z3_DATA<19>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 1 | 11 | 9 | 4 | 7 | 16
INPUTS | 15 | Z3_DATA<19>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<3>.PIN  | DQ<11>.PIN  | D<3>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | Z3_DATA<26>.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 7 | 16 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 7 | 15 | 9 | 0
INPUTP | 3 | 219 | 207 | 28
IMPORTS | 1 | 7 | 15
EQ | 12 | 
   Z3_DATA<19>.D = Z3_DATA<19> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<11>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<3>.PIN
	# D<3>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
;Imported pterms FB8_16
	# D<11>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<19>.CLK = CLK_EXT;	// GCK
   Z3_DATA<19>.AP = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 17 | Z3_DATA<20>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 4 | 9 | 9 | 0 | 5 | 12 | 17 | 12 | 16
INPUTS | 15 | Z3_DATA<20>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<4>.PIN  | DQ<12>.PIN  | D<14>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | LAN_SM_FSM_FFd4.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 12 | 17 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 12 | 0 | 9 | 0
INPUTP | 3 | 225 | 235 | 81
EXPORTS | 1 | 12 | 16
IMPORTS | 1 | 12 | 0
EQ | 14 | 
   Z3_DATA<20>.D = Z3_DATA<20> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<12>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<4>.PIN
;Imported pterms FB13_1
	# D<12>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# D<4>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<20>.CLK = CLK_EXT;	// GCK
   Z3_DATA<20>.AP = !lan_rdy/lan_rdy_RSTF;
    Z3_DATA<20>.EXP  =  D<14>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 17 | Z3_DATA<21>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 4 | 0 | 4 | 9 | 7 | 14 | 17 | 14 | 16
INPUTS | 15 | Z3_DATA<21>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<5>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | A<13>.PIN  | $OpTx$FX_DC$25  | A<21>.PIN  | EXP34_.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 14 | 17 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 14 | 0 | 9 | 0
INPUTP | 3 | 221 | 123 | 163
EXPORTS | 1 | 14 | 16
IMPORTS | 1 | 14 | 0
EQ | 16 | 
   Z3_DATA<21>.D = Z3_DATA<21> & !$OpTx$FX_DC$325
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<5>.PIN
;Imported pterms FB15_1
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<13>.PIN
	# D<13>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# D<5>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<21>.CLK = CLK_EXT;	// GCK
   Z3_DATA<21>.AP = !lan_rdy/lan_rdy_RSTF;
    Z3_DATA<21>.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<13>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<21>.PIN & !$OpTx$FX_DC$25
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 16 | Z3_DATA<22>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 1 | 9 | 9 | 11 | 12 | 16
INPUTS | 15 | Z3_DATA<22>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<6>.PIN  | DQ<14>.PIN  | D<6>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | Z3_DATA<20>.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 12 | 16 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 12 | 17 | 9 | 0
INPUTP | 3 | 227 | 236 | 26
IMPORTS | 1 | 12 | 17
EQ | 12 | 
   Z3_DATA<22>.D = Z3_DATA<22> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<14>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<6>.PIN
	# D<6>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
;Imported pterms FB13_18
	# D<14>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<22>.CLK = CLK_EXT;	// GCK
   Z3_DATA<22>.AP = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 11 | 17 | Z3_DATA<23>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 1 | 13 | 9 | 10 | 11 | 17
INPUTS | 15 | Z3_DATA<23>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<7>.PIN  | DQ<15>.PIN  | D<7>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | EXP31_.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 11 | 17 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 11 | 0 | 9 | 0
INPUTP | 3 | 226 | 202 | 29
IMPORTS | 1 | 11 | 0
EQ | 12 | 
   Z3_DATA<23>.D = Z3_DATA<23> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<15>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<7>.PIN
	# D<7>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
;Imported pterms FB12_1
	# D<15>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<23>.CLK = CLK_EXT;	// GCK
   Z3_DATA<23>.AP = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 8 | 14 | Z3_DATA<24>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 1 | 16 | 9 | 13 | 8 | 14
INPUTS | 15 | Z3_DATA<24>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<8>.PIN  | DQ<0>.PIN  | D<8>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | Z3_DATA<1>.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 8 | 14 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 8 | 13 | 9 | 0
INPUTP | 3 | 231 | 217 | 32
IMPORTS | 1 | 8 | 13
EQ | 12 | 
   Z3_DATA<24>.D = Z3_DATA<24> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<0>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<8>.PIN
	# D<8>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
;Imported pterms FB9_14
	# D<0>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<24>.CLK = CLK_EXT;	// GCK
   Z3_DATA<24>.AP = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 5 | 17 | Z3_DATA<25>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 11 | 11 | 4 | 11 | 5 | 17
INPUTS | 15 | Z3_DATA<25>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<9>.PIN  | DQ<1>.PIN  | D<9>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | LAN_BASEADR<0>.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 5 | 17 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 5 | 16 | 9 | 0
INPUTP | 3 | 209 | 216 | 73
IMPORTS | 1 | 5 | 16
EQ | 12 | 
   Z3_DATA<25>.D = Z3_DATA<25> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<1>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<9>.PIN
	# D<9>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
;Imported pterms FB6_17
	# D<1>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<25>.CLK = CLK_EXT;	// GCK
   Z3_DATA<25>.AP = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 7 | 15 | Z3_DATA<26>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 4 | 9 | 16 | 4 | 13 | 7 | 15 | 7 | 16
INPUTS | 15 | Z3_DATA<26>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<10>.PIN  | DQ<2>.PIN  | D<11>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | EXP26_.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 7 | 15 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 7 | 14 | 9 | 0
INPUTP | 3 | 234 | 220 | 77
EXPORTS | 1 | 7 | 16
IMPORTS | 1 | 7 | 14
EQ | 14 | 
   Z3_DATA<26>.D = Z3_DATA<26> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<2>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<10>.PIN
;Imported pterms FB8_15
	# D<10>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# D<2>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<26>.CLK = CLK_EXT;	// GCK
   Z3_DATA<26>.AP = !lan_rdy/lan_rdy_RSTF;
    Z3_DATA<26>.EXP  =  D<11>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 7 | 0 | Z3_DATA<27>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 4 | 11 | 9 | 4 | 14 | 7 | 0 | 7 | 17
INPUTS | 15 | Z3_DATA<27>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<11>.PIN  | DQ<3>.PIN  | D<10>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | DQ_12_IOBUFE.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 7 | 0 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 7 | 1 | 9 | 0
INPUTP | 3 | 207 | 219 | 74
EXPORTS | 1 | 7 | 17
IMPORTS | 1 | 7 | 1
EQ | 14 | 
   Z3_DATA<27>.D = Z3_DATA<27> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<3>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<11>.PIN
;Imported pterms FB8_2
	# D<11>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# D<3>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<27>.CLK = CLK_EXT;	// GCK
   Z3_DATA<27>.AP = !lan_rdy/lan_rdy_RSTF;
    Z3_DATA<27>.EXP  =  D<10>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 15 | Z3_DATA<28>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 4 | 16 | 7 | 1 | 12 | 15
INPUTS | 15 | Z3_DATA<28>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<12>.PIN  | DQ<4>.PIN  | D<12>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | Z3_DATA<30>.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 12 | 15 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 12 | 14 | 9 | 0
INPUTP | 3 | 235 | 225 | 78
IMPORTS | 1 | 12 | 14
EQ | 12 | 
   Z3_DATA<28>.D = Z3_DATA<28> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<4>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<12>.PIN
	# D<12>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
;Imported pterms FB13_15
	# D<4>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<28>.CLK = CLK_EXT;	// GCK
   Z3_DATA<28>.AP = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 14 | 1 | Z3_DATA<29>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 6 | 2 | 11 | 7 | 14 | 1
INPUTS | 15 | Z3_DATA<29>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<13>.PIN  | DQ<5>.PIN  | D<13>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | Z3_ADR<13>.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 14 | 1 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 14 | 2 | 9 | 0
INPUTP | 3 | 204 | 221 | 80
IMPORTS | 1 | 14 | 2
EQ | 12 | 
   Z3_DATA<29>.D = Z3_DATA<29> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<5>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<13>.PIN
	# D<13>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
;Imported pterms FB15_3
	# D<5>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<29>.CLK = CLK_EXT;	// GCK
   Z3_DATA<29>.AP = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 14 | Z3_DATA<30>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 4 | 6 | 4 | 7 | 2 | 12 | 14 | 12 | 15
INPUTS | 15 | Z3_DATA<30>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<14>.PIN  | DQ<6>.PIN  | D<4>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | LAN_WRL_OBUF.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 12 | 14 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 12 | 13 | 9 | 0
INPUTP | 3 | 236 | 227 | 38
EXPORTS | 1 | 12 | 15
IMPORTS | 1 | 12 | 13
EQ | 14 | 
   Z3_DATA<30>.D = Z3_DATA<30> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<6>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<14>.PIN
;Imported pterms FB13_14
	# D<14>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# D<6>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<30>.CLK = CLK_EXT;	// GCK
   Z3_DATA<30>.AP = !lan_rdy/lan_rdy_RSTF;
    Z3_DATA<30>.EXP  =  D<4>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 11 | 16 | Z3_DATA<31>
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 3 | 6 | 11 | 11 | 4 | 11 | 16
INPUTS | 15 | Z3_DATA<31>  | $OpTx$FX_DC$325  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<15>.PIN  | DQ<7>.PIN  | D<15>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | LAN_WRH_S.EXP  | lan_rdy/lan_rdy_RSTF
INPUTMC | 12 | 11 | 16 | 12 | 12 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8 | 11 | 15 | 9 | 0
INPUTP | 3 | 202 | 226 | 89
IMPORTS | 1 | 11 | 15
EQ | 12 | 
   Z3_DATA<31>.D = Z3_DATA<31> & !$OpTx$FX_DC$325
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<7>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<15>.PIN
	# D<15>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
;Imported pterms FB12_16
	# D<7>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25;
   Z3_DATA<31>.CLK = CLK_EXT;	// GCK
   Z3_DATA<31>.AP = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 6 | 3 | LAN_D_INIT<10>
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 2 | 9 | 16 | 11 | 9
INPUTS | 2 | BUF_LAN_D_INIT<1>__$INT  | RESET
INPUTMC | 1 | 3 | 0
INPUTP | 1 | 263
EQ | 3 | 
   !LAN_D_INIT<10>.D = BUF_LAN_D_INIT<1>__$INT;
   LAN_D_INIT<10>.CLK = CLK_EXT;	// GCK
   LAN_D_INIT<10>.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 6 | 1 | LAN_D_INIT<1>
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 2 | 9 | 1 | 9 | 9
INPUTS | 2 | BUF_LAN_D_INIT<1>__$INT  | RESET
INPUTMC | 1 | 3 | 0
INPUTP | 1 | 263
EQ | 3 | 
   LAN_D_INIT<1>.D = BUF_LAN_D_INIT<1>__$INT;
   LAN_D_INIT<1>.CLK = CLK_EXT;	// GCK
   LAN_D_INIT<1>.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 4 | 3 | LAN_IRQ_D0
ATTRIBUTES | 8553344 | 0
OUTPUTMC | 1 | 4 | 17
INPUTS | 2 | LAN_INT  | RESET
INPUTP | 2 | 201 | 263
EQ | 3 | 
   LAN_IRQ_D0.D = LAN_INT;
   LAN_IRQ_D0.CLK = CLK_EXT;	// GCK
   LAN_IRQ_D0.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 3 | 2 | LAN_WR_RST
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 2 | 7 | 4 | 12 | 13
INPUTS | 4 | LAN_RST_SM_FSM_FFd3  | LAN_RST_SM_FSM_FFd2  | LAN_RST_SM_FSM_FFd1  | RESET
INPUTMC | 3 | 3 | 3 | 3 | 6 | 3 | 8
INPUTP | 1 | 263
EQ | 6 | 
   LAN_WR_RST.D = LAN_RST_SM_FSM_FFd3 & LAN_RST_SM_FSM_FFd2 & 
	!LAN_RST_SM_FSM_FFd1
	# LAN_RST_SM_FSM_FFd3 & !LAN_RST_SM_FSM_FFd2 & 
	LAN_RST_SM_FSM_FFd1;
   LAN_WR_RST.CLK = CLK_EXT;	// GCK
   LAN_WR_RST.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 1 | 3 | SHUT_UP
ATTRIBUTES | 4359040 | 0
OUTPUTMC | 3 | 6 | 17 | 6 | 6 | 1 | 3
INPUTS | 13 | FCS  | Z3_ADR<2>  | Z3_ADR_0  | Z3_ADR_1  | Z3_ADR<6>  | autoconfig  | RW  | Z3_ADR<3>  | Z3_ADR<4>  | Z3_ADR<5>  | SHUT_UP  | $OpTx$FX_DC$25  | RESET
INPUTMC | 10 | 14 | 3 | 0 | 15 | 0 | 12 | 6 | 9 | 6 | 7 | 6 | 13 | 6 | 12 | 6 | 10 | 1 | 3 | 0 | 8
INPUTP | 3 | 147 | 158 | 263
EQ | 5 | 
   SHUT_UP.T = !FCS & !Z3_ADR<2> & !Z3_ADR_0 & Z3_ADR_1 & 
	!Z3_ADR<6> & autoconfig & !RW & !Z3_ADR<3> & Z3_ADR<4> & 
	!Z3_ADR<5> & SHUT_UP & !$OpTx$FX_DC$25;
   SHUT_UP.CLK = CLK_EXT;	// GCK
   SHUT_UP.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 9 | 17 | Z3_ADR<10>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 5 | 7
INPUTS | 3 | A<12>.PIN  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 1 | 6 | 0
INPUTP | 2 | 115 | 147
EQ | 3 | 
   Z3_ADR<10>.D = A<12>.PIN;
   Z3_ADR<10>.CLK = !FCS;
   Z3_ADR<10>.AP = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 10 | 6 | Z3_ADR<11>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 5 | 2
INPUTS | 3 | A<13>.PIN  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 1 | 6 | 0
INPUTP | 2 | 123 | 147
EQ | 3 | 
   Z3_ADR<11>.D = A<13>.PIN;
   Z3_ADR<11>.CLK = !FCS;
   Z3_ADR<11>.AP = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 10 | 5 | Z3_ADR<12>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 2 | 5 | 4 | 10 | 4
INPUTS | 11 | A<14>.PIN  | FCS  | lan_adr_sw/lan_adr_sw_RSTF  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | A<20>.PIN  | $OpTx$FX_DC$25  | A<12>.PIN
INPUTMC | 7 | 6 | 0 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 4 | 125 | 147 | 167 | 115
EXPORTS | 1 | 10 | 4
EQ | 7 | 
   Z3_ADR<12>.D = A<14>.PIN;
   Z3_ADR<12>.CLK = !FCS;
   Z3_ADR<12>.AP = !lan_adr_sw/lan_adr_sw_RSTF;
    Z3_ADR<12>.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<20>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<12>.PIN & !$OpTx$FX_DC$25

MACROCELL | 6 | 8 | Z3_ADR<7>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 5 | 9
INPUTS | 3 | A<9>.PIN  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 1 | 6 | 0
INPUTP | 2 | 108 | 147
EQ | 3 | 
   Z3_ADR<7>.D = A<9>.PIN;
   Z3_ADR<7>.CLK = !FCS;
   Z3_ADR<7>.AP = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 0 | 17 | Z3_ADR<8>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 1 | 5 | 13
INPUTS | 3 | A<10>.PIN  | FCS  | lan_adr_sw/lan_adr_sw_RSTF
INPUTMC | 1 | 6 | 0
INPUTP | 2 | 112 | 147
EQ | 3 | 
   Z3_ADR<8>.D = A<10>.PIN;
   Z3_ADR<8>.CLK = !FCS;
   Z3_ADR<8>.AP = !lan_adr_sw/lan_adr_sw_RSTF;

MACROCELL | 10 | 3 | Z3_ADR<9>
ATTRIBUTES | 8520608 | 0
OUTPUTMC | 2 | 5 | 5 | 10 | 2
INPUTS | 10 | A<11>.PIN  | FCS  | lan_adr_sw/lan_adr_sw_RSTF  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | A<19>.PIN  | $OpTx$FX_DC$25
INPUTMC | 7 | 6 | 0 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 3 | 114 | 147 | 169
EXPORTS | 1 | 10 | 2
EQ | 5 | 
   Z3_ADR<9>.D = A<11>.PIN;
   Z3_ADR<9>.CLK = !FCS;
   Z3_ADR<9>.AP = !lan_adr_sw/lan_adr_sw_RSTF;
    Z3_ADR<9>.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<19>.PIN & !$OpTx$FX_DC$25

MACROCELL | 4 | 7 | Dout1<0>
ATTRIBUTES | 8553348 | 0
OUTPUTMC | 1 | 1 | 16
INPUTS | 10 | FCS  | Z3_ADR<2>  | Z3_ADR_0  | Z3_ADR_1  | autoconfig  | Z3_ADR<3>  | Z3_ADR<4>  | Z3_ADR<5>  | $OpTx$FX_DC$25  | RESET
INPUTMC | 8 | 14 | 3 | 0 | 15 | 0 | 12 | 6 | 7 | 6 | 13 | 6 | 12 | 6 | 10 | 0 | 8
INPUTP | 2 | 147 | 263
EQ | 5 | 
   !Dout1<0>.D = !FCS & !Z3_ADR<2> & Z3_ADR_0 & !Z3_ADR_1 & 
	autoconfig & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & 
	!$OpTx$FX_DC$25;
   Dout1<0>.CLK = CLK_EXT;	// GCK
   Dout1<0>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 1 | 17 | Dout1<1>
ATTRIBUTES | 8553348 | 0
OUTPUTMC | 1 | 4 | 11
INPUTS | 10 | FCS  | Z3_ADR<2>  | Z3_ADR_0  | autoconfig  | Z3_ADR<3>  | Z3_ADR<4>  | Z3_ADR<5>  | $OpTx$FX_DC$25  | Z3_ADR_1  | RESET
INPUTMC | 8 | 14 | 3 | 0 | 15 | 6 | 7 | 6 | 13 | 6 | 12 | 6 | 10 | 0 | 8 | 0 | 12
INPUTP | 2 | 147 | 263
EQ | 8 | 
   !Dout1<1>.D = !FCS & !Z3_ADR<2> & !Z3_ADR_0 & autoconfig & 
	!Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & !$OpTx$FX_DC$25
	# !FCS & !Z3_ADR<2> & !Z3_ADR_1 & autoconfig & 
	!Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & !$OpTx$FX_DC$25
	# !FCS & !Z3_ADR_0 & !Z3_ADR_1 & autoconfig & 
	!Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & !$OpTx$FX_DC$25;
   Dout1<1>.CLK = CLK_EXT;	// GCK
   Dout1<1>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 1 | 8 | Dout1<2>
ATTRIBUTES | 8553348 | 0
OUTPUTMC | 1 | 4 | 13
INPUTS | 10 | FCS  | Z3_ADR<2>  | Z3_ADR_0  | Z3_ADR_1  | autoconfig  | Z3_ADR<3>  | Z3_ADR<4>  | Z3_ADR<5>  | $OpTx$FX_DC$25  | RESET
INPUTMC | 8 | 14 | 3 | 0 | 15 | 0 | 12 | 6 | 7 | 6 | 13 | 6 | 12 | 6 | 10 | 0 | 8
INPUTP | 2 | 147 | 263
EQ | 8 | 
   !Dout1<2>.D = !FCS & Z3_ADR<2> & Z3_ADR_0 & !Z3_ADR_1 & 
	autoconfig & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & 
	!$OpTx$FX_DC$25
	# !FCS & !Z3_ADR<2> & !Z3_ADR_0 & !Z3_ADR_1 & 
	autoconfig & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & 
	!$OpTx$FX_DC$25;
   Dout1<2>.CLK = CLK_EXT;	// GCK
   Dout1<2>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 4 | 6 | Dout1<3>
ATTRIBUTES | 8553348 | 0
OUTPUTMC | 1 | 4 | 14
INPUTS | 8 | FCS  | Z3_ADR_1  | autoconfig  | Z3_ADR<3>  | Z3_ADR<4>  | Z3_ADR<5>  | $OpTx$FX_DC$25  | RESET
INPUTMC | 6 | 0 | 12 | 6 | 7 | 6 | 13 | 6 | 12 | 6 | 10 | 0 | 8
INPUTP | 2 | 147 | 263
EQ | 4 | 
   !Dout1<3>.D = !FCS & !Z3_ADR_1 & autoconfig & !Z3_ADR<3> & 
	!Z3_ADR<4> & !Z3_ADR<5> & !$OpTx$FX_DC$25;
   Dout1<3>.CLK = CLK_EXT;	// GCK
   Dout1<3>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 1 | 15 | Dout1<4>
ATTRIBUTES | 8553348 | 0
OUTPUTMC | 1 | 4 | 16
INPUTS | 11 | FCS  | Z3_ADR<2>  | Z3_ADR_0  | Z3_ADR<6>  | autoconfig  | Z3_ADR<3>  | Z3_ADR<4>  | Z3_ADR<5>  | $OpTx$FX_DC$25  | Z3_ADR_1  | RESET
INPUTMC | 9 | 14 | 3 | 0 | 15 | 6 | 9 | 6 | 7 | 6 | 13 | 6 | 12 | 6 | 10 | 0 | 8 | 0 | 12
INPUTP | 2 | 147 | 263
EQ | 11 | 
   !Dout1<4>.D = !FCS & !Z3_ADR<2> & Z3_ADR_0 & !Z3_ADR_1 & 
	autoconfig & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & 
	!$OpTx$FX_DC$25
	# !FCS & !Z3_ADR<2> & !Z3_ADR_0 & !Z3_ADR<6> & 
	autoconfig & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & 
	!$OpTx$FX_DC$25
	# !FCS & Z3_ADR_0 & !Z3_ADR_1 & !Z3_ADR<6> & 
	autoconfig & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & 
	!$OpTx$FX_DC$25;
   Dout1<4>.CLK = CLK_EXT;	// GCK
   Dout1<4>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 1 | 12 | Dout1<5>
ATTRIBUTES | 8553348 | 0
OUTPUTMC | 1 | 6 | 2
INPUTS | 11 | FCS  | Z3_ADR<2>  | Z3_ADR_1  | autoconfig  | Z3_ADR<3>  | Z3_ADR<4>  | Z3_ADR<5>  | $OpTx$FX_DC$25  | Z3_ADR_0  | Z3_ADR<6>  | RESET
INPUTMC | 9 | 14 | 3 | 0 | 12 | 6 | 7 | 6 | 13 | 6 | 12 | 6 | 10 | 0 | 8 | 0 | 15 | 6 | 9
INPUTP | 2 | 147 | 263
EQ | 10 | 
   !Dout1<5>.D = !FCS & !Z3_ADR<2> & !Z3_ADR_1 & autoconfig & 
	!Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & !$OpTx$FX_DC$25
	# !FCS & !Z3_ADR<2> & !Z3_ADR_0 & Z3_ADR<6> & 
	autoconfig & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & 
	!$OpTx$FX_DC$25
	# !FCS & !Z3_ADR_0 & !Z3_ADR_1 & Z3_ADR<6> & 
	autoconfig & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & 
	!$OpTx$FX_DC$25;
   Dout1<5>.CLK = CLK_EXT;	// GCK
   Dout1<5>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 1 | 10 | Dout1<6>
ATTRIBUTES | 8553348 | 0
OUTPUTMC | 1 | 6 | 4
INPUTS | 11 | FCS  | Z3_ADR<2>  | Z3_ADR_0  | Z3_ADR_1  | autoconfig  | Z3_ADR<3>  | Z3_ADR<4>  | Z3_ADR<5>  | $OpTx$FX_DC$25  | Z3_ADR<6>  | RESET
INPUTMC | 9 | 14 | 3 | 0 | 15 | 0 | 12 | 6 | 7 | 6 | 13 | 6 | 12 | 6 | 10 | 0 | 8 | 6 | 9
INPUTP | 2 | 147 | 263
EQ | 11 | 
   !Dout1<6>.D = !FCS & !Z3_ADR<2> & !Z3_ADR_0 & !Z3_ADR_1 & 
	autoconfig & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & 
	!$OpTx$FX_DC$25
	# !FCS & !Z3_ADR<2> & !Z3_ADR_1 & !Z3_ADR<6> & 
	autoconfig & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & 
	!$OpTx$FX_DC$25
	# !FCS & Z3_ADR<2> & Z3_ADR_0 & !Z3_ADR_1 & 
	Z3_ADR<6> & autoconfig & !Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & 
	!$OpTx$FX_DC$25;
   Dout1<6>.CLK = CLK_EXT;	// GCK
   Dout1<6>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 4 | 5 | Dout1<7>
ATTRIBUTES | 8553348 | 0
OUTPUTMC | 1 | 6 | 11
INPUTS | 9 | FCS  | Z3_ADR_1  | Z3_ADR<6>  | autoconfig  | Z3_ADR<3>  | Z3_ADR<4>  | Z3_ADR<5>  | $OpTx$FX_DC$25  | RESET
INPUTMC | 7 | 0 | 12 | 6 | 9 | 6 | 7 | 6 | 13 | 6 | 12 | 6 | 10 | 0 | 8
INPUTP | 2 | 147 | 263
EQ | 4 | 
   !Dout1<7>.D = !FCS & !Z3_ADR_1 & Z3_ADR<6> & autoconfig & 
	!Z3_ADR<3> & !Z3_ADR<4> & !Z3_ADR<5> & !$OpTx$FX_DC$25;
   Dout1<7>.CLK = CLK_EXT;	// GCK
   Dout1<7>.AP = !RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 6 | 5 | LAN_A_INIT<6>
ATTRIBUTES | 8553348 | 0
OUTPUTMC | 1 | 1 | 4
INPUTS | 2 | BUF_LAN_D_INIT<1>__$INT  | RESET
INPUTMC | 1 | 3 | 0
INPUTP | 1 | 263
EQ | 3 | 
   !LAN_A_INIT<6>.D = BUF_LAN_D_INIT<1>__$INT;
   LAN_A_INIT<6>.CLK = CLK_EXT;	// GCK
   LAN_A_INIT<6>.AP = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 3 | 9 | LAN_CS_RST
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 1 | 7 | 7
INPUTS | 3 | LAN_RST_SM_FSM_FFd1  | BUF_LAN_D_INIT<1>__$INT  | RESET
INPUTMC | 2 | 3 | 8 | 3 | 0
INPUTP | 1 | 263
EQ | 4 | 
   LAN_CS_RST.D = LAN_RST_SM_FSM_FFd1
	$ BUF_LAN_D_INIT<1>__$INT;
   LAN_CS_RST.CLK = CLK_EXT;	// GCK
   LAN_CS_RST.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 12 | 11 | LAN_RD_S
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 1 | 7 | 9
INPUTS | 2 | BUF_LAN_RD_S  | lan_rdy/lan_rdy_RSTF
INPUTMC | 2 | 10 | 1 | 9 | 0
EQ | 3 | 
   LAN_RD_S.D = BUF_LAN_RD_S;
   LAN_RD_S.CLK = CLK_EXT;	// GCK
   LAN_RD_S.AR = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 11 | 15 | LAN_WRH_S
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 2 | 7 | 4 | 11 | 16
INPUTS | 13 | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DS0  | $OpTx$FX_DC$268  | LDS  | lan_rdy/lan_rdy_RSTF  | D<7>.PIN  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25
INPUTMC | 10 | 12 | 10 | 10 | 0 | 14 | 4 | 9 | 0 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 3 | 170 | 157 | 29
EXPORTS | 1 | 11 | 16
EQ | 8 | 
   LAN_WRH_S.D = LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1 & !LDS & 
	!$OpTx$FX_DC$268
	# !LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1 & !DS0 & 
	!$OpTx$FX_DC$268;
   LAN_WRH_S.CLK = CLK_EXT;	// GCK
   LAN_WRH_S.AR = !lan_rdy/lan_rdy_RSTF;
    LAN_WRH_S.EXP  =  D<7>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 5 | 11 | LAN_WRL_S
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 1 | 12 | 13
INPUTS | 6 | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DS1  | $OpTx$FX_DC$268  | UDS  | lan_rdy/lan_rdy_RSTF
INPUTMC | 4 | 12 | 10 | 10 | 0 | 14 | 4 | 9 | 0
INPUTP | 2 | 148 | 155
EQ | 6 | 
   LAN_WRL_S.D = LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1 & !UDS & 
	!$OpTx$FX_DC$268
	# !LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd1 & !DS1 & 
	!$OpTx$FX_DC$268;
   LAN_WRL_S.CLK = CLK_EXT;	// GCK
   LAN_WRL_S.AR = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 10 | 12 | lan_rdy
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 1 | 0 | 10
INPUTS | 6 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | $OpTx$FX_DC$23  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd3  | lan_rdy/lan_rdy_RSTF
INPUTMC | 6 | 12 | 0 | 12 | 10 | 5 | 10 | 10 | 0 | 10 | 7 | 9 | 0
EQ | 8 | 
   lan_rdy.D = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	$OpTx$FX_DC$23
	# !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3
	# !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd1;
   lan_rdy.CLK = CLK_EXT;	// GCK
   lan_rdy.AR = !lan_rdy/lan_rdy_RSTF;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 11 | 14 | LAN_A_INIT<3>
ATTRIBUTES | 8553348 | 0
OUTPUTMC | 1 | 3 | 7
INPUTS | 1 | RESET
INPUTP | 1 | 263
EQ | 3 | 
   LAN_A_INIT<3>.D = Gnd;
   LAN_A_INIT<3>.CLK = CLK_EXT;	// GCK
   LAN_A_INIT<3>.AP = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 11 | 13 | LAN_D_INIT<9>
ATTRIBUTES | 8553232 | 0
OUTPUTMC | 1 | 11 | 11
INPUTS | 1 | RESET
INPUTP | 1 | 263
EQ | 3 | 
   LAN_D_INIT<9>.D = Vcc;
   LAN_D_INIT<9>.CLK = CLK_EXT;	// GCK
   LAN_D_INIT<9>.AR = RESET;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 3 | 5 | A_LAN_0_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_A_LOW
INPUTMC | 1 | 10 | 15
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<0> = RESET & !Z3_A_LOW;

MACROCELL | 5 | 5 | A_LAN_10_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<9>
INPUTMC | 1 | 10 | 3
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<10> = RESET & !Z3_ADR<9>;

MACROCELL | 5 | 7 | A_LAN_11_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<10>
INPUTMC | 1 | 9 | 17
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<11> = RESET & !Z3_ADR<10>;

MACROCELL | 5 | 2 | A_LAN_12_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<11>
INPUTMC | 1 | 10 | 6
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<12> = RESET & !Z3_ADR<11>;

MACROCELL | 5 | 4 | A_LAN_13_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<12>
INPUTMC | 1 | 10 | 5
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<13> = RESET & !Z3_ADR<12>;

MACROCELL | 3 | 4 | A_LAN_1_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR_0
INPUTMC | 1 | 0 | 15
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<1> = RESET & !Z3_ADR_0;

MACROCELL | 3 | 11 | A_LAN_2_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR_1
INPUTMC | 1 | 0 | 12
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<2> = RESET & !Z3_ADR_1;

MACROCELL | 3 | 7 | A_LAN_3_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 3 | RESET  | Z3_ADR<2>  | LAN_A_INIT<3>
INPUTMC | 2 | 14 | 3 | 11 | 14
INPUTP | 1 | 263
EQ | 2 | 
   A_LAN<3> = RESET & Z3_ADR<2>
	# !RESET & LAN_A_INIT<3>;

MACROCELL | 1 | 1 | A_LAN_4_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<3>
INPUTMC | 1 | 6 | 13
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<4> = RESET & !Z3_ADR<3>;

MACROCELL | 3 | 13 | A_LAN_5_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<4>
INPUTMC | 1 | 6 | 12
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<5> = RESET & !Z3_ADR<4>;

MACROCELL | 1 | 4 | A_LAN_6_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 3 | RESET  | LAN_A_INIT<6>  | Z3_ADR<5>
INPUTMC | 2 | 6 | 5 | 6 | 10
INPUTP | 1 | 263
EQ | 2 | 
   A_LAN<6> = RESET & Z3_ADR<5>
	# !RESET & LAN_A_INIT<6>;

MACROCELL | 1 | 2 | A_LAN_7_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<6>
INPUTMC | 1 | 6 | 9
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<7> = RESET & !Z3_ADR<6>;

MACROCELL | 5 | 9 | A_LAN_8_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<7>
INPUTMC | 1 | 6 | 8
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<8> = RESET & !Z3_ADR<7>;

MACROCELL | 5 | 13 | A_LAN_9_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | RESET  | Z3_ADR<8>
INPUTMC | 1 | 0 | 17
INPUTP | 1 | 263
EQ | 1 | 
   !A_LAN<9> = RESET & !Z3_ADR<8>;

MACROCELL | 7 | 7 | LAN_CS_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 3 | RESET  | LAN_CS_RST  | lan_adr
INPUTMC | 2 | 3 | 9 | 6 | 6
INPUTP | 1 | 263
EQ | 2 | 
   LAN_CS = RESET & lan_adr
	# !RESET & LAN_CS_RST;

MACROCELL | 7 | 4 | LAN_WRH_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 3 | LAN_WRH_S  | lan_rdy/lan_rdy_RSTF  | LAN_WR_RST
INPUTMC | 3 | 11 | 15 | 9 | 0 | 3 | 2
EQ | 2 | 
   LAN_WRH = LAN_WR_RST & !lan_rdy/lan_rdy_RSTF
	# LAN_WRH_S & lan_rdy/lan_rdy_RSTF;

MACROCELL | 12 | 13 | LAN_WRL_OBUF
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 12 | 14
INPUTS | 11 | LAN_WRL_S  | lan_rdy/lan_rdy_RSTF  | LAN_WR_RST  | D<14>.PIN  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | D<6>.PIN
INPUTMC | 9 | 5 | 11 | 9 | 0 | 3 | 2 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 2 | 81 | 26
EXPORTS | 1 | 12 | 14
EQ | 6 | 
   LAN_WRL = LAN_WR_RST & !lan_rdy/lan_rdy_RSTF
	# LAN_WRL_S & lan_rdy/lan_rdy_RSTF;
    LAN_WRL_OBUF.EXP  =  D<14>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# D<6>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25

MACROCELL | 7 | 9 | LAN_RD_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 2 | LAN_RD_S  | lan_rdy/lan_rdy_RSTF
INPUTMC | 2 | 12 | 11 | 9 | 0
EQ | 1 | 
   LAN_RD = LAN_RD_S & lan_rdy/lan_rdy_RSTF;

MACROCELL | 2 | 13 | N0$BUF6
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 2 | 14
INPUTS | 8 | LAN_INT_ENABLE  | LAN_IRQ_OUT  | LAN_BASEADR<1>  | A<17>.PIN  | LAN_BASEADR<2>  | A<18>.PIN  | LAN_BASEADR<3>  | A<19>.PIN
INPUTMC | 5 | 4 | 8 | 4 | 17 | 5 | 15 | 3 | 14 | 3 | 12
INPUTP | 3 | 172 | 171 | 169
EXPORTS | 1 | 2 | 14
EQ | 6 | 
   INT_OUT = Gnd;
   INT_OUT.OE = LAN_INT_ENABLE & !LAN_IRQ_OUT;
    N0$BUF6.EXP  =  LAN_BASEADR<1> & !A<17>.PIN
	# LAN_BASEADR<2> & !A<18>.PIN
	# !LAN_BASEADR<2> & A<18>.PIN
	# !LAN_BASEADR<3> & A<19>.PIN

MACROCELL | 14 | 11 | N0$BUF7
ATTRIBUTES | 265986 | 0
INPUTS | 1 | N0$BUF7/N0$BUF7_TRST
INPUTMC | 1 | 0 | 10
EQ | 2 | 
   DTACK = Gnd;
   DTACK.OE = N0$BUF7/N0$BUF7_TRST;

MACROCELL | 13 | 10 | CFOUT_OBUF
ATTRIBUTES | 8815558 | 0
OUTPUTMC | 1 | 0 | 6
INPUTS | 4 | AUTO_CONFIG_DONE_CYCLE  | AUTOBOOT_OFF  | RESET  | FCS
INPUTMC | 1 | 1 | 6
INPUTP | 3 | 142 | 263 | 147
EQ | 4 | 
   CFOUT.D = !AUTO_CONFIG_DONE_CYCLE & AUTOBOOT_OFF;
   CFOUT.CLK = CLK_EXT;	// GCK
   CFOUT.AP = !RESET;
   CFOUT.CE = FCS;
GLOBALS | 1 | 2 | CLK_EXT

MACROCELL | 13 | 13 | SLAVE_OBUF
ATTRIBUTES | 396034 | 0
OUTPUTMC | 16 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11
INPUTS | 3 | FCS  | autoconfig  | lan_adr
INPUTMC | 2 | 6 | 7 | 6 | 6
INPUTP | 1 | 147
EQ | 2 | 
   SLAVE = FCS
	# !autoconfig & !lan_adr;

MACROCELL | 13 | 14 | N0
ATTRIBUTES | 265986 | 0
INPUTS | 0
EQ | 2 | 
   OWN = Gnd;
   OWN.OE = Gnd;

MACROCELL | 13 | 2 | N0$BUF0
ATTRIBUTES | 265986 | 0
INPUTS | 0
EQ | 2 | 
   OVR = Gnd;
   OVR.OE = Gnd;

MACROCELL | 15 | 9 | N0$BUF1
ATTRIBUTES | 265986 | 0
OUTPUTMC | 1 | 15 | 10
INPUTS | 7 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | A<16>.PIN  | $OpTx$FX_DC$25
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 1 | 175
EXPORTS | 1 | 15 | 10
EQ | 4 | 
   MTACK = Gnd;
   MTACK.OE = Gnd;
    N0$BUF1.EXP  =  !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<16>.PIN & !$OpTx$FX_DC$25

MACROCELL | 11 | 1 | N0$BUF2
ATTRIBUTES | 265986 | 0
INPUTS | 0
EQ | 2 | 
   LAN_CFG<4> = Gnd;
   LAN_CFG<4>.OE = Gnd;

MACROCELL | 1 | 7 | N0$BUF3
ATTRIBUTES | 265986 | 0
INPUTS | 0
EQ | 2 | 
   LAN_CFG<3> = Gnd;
   LAN_CFG<3>.OE = Gnd;

MACROCELL | 5 | 1 | N0$BUF4
ATTRIBUTES | 265986 | 0
INPUTS | 0
EQ | 2 | 
   LAN_CFG<2> = Gnd;
   LAN_CFG<2>.OE = Gnd;

MACROCELL | 1 | 5 | N0$BUF5
ATTRIBUTES | 265986 | 0
INPUTS | 0
EQ | 2 | 
   LAN_CFG<1> = Gnd;
   LAN_CFG<1>.OE = Gnd;

MACROCELL | 4 | 4 | ROM_B_0_OBUF
ATTRIBUTES | 264962 | 0
INPUTS | 0
EQ | 1 | 
   ROM_OE = Vcc;

MACROCELL | 10 | 13 | ROM_B_0_OBUF$BUF0
ATTRIBUTES | 264962 | 0
INPUTS | 0
EQ | 1 | 
   ROM_B<1> = Vcc;

MACROCELL | 10 | 11 | ROM_B_0_OBUF$BUF1
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 10 | 10
INPUTS | 8 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | A<22>.PIN  | $OpTx$FX_DC$25  | A<14>.PIN
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 2 | 162 | 125
EXPORTS | 1 | 10 | 10
EQ | 5 | 
   ROM_B<0> = Vcc;
    ROM_B_0_OBUF$BUF1.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<22>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<14>.PIN & !$OpTx$FX_DC$25

MACROCELL | 12 | 1 | ROM_B_0_OBUF$BUF10
ATTRIBUTES | 264962 | 0
INPUTS | 0
EQ | 1 | 
   CP_RD = Vcc;

MACROCELL | 4 | 1 | ROM_B_0_OBUF$BUF11
ATTRIBUTES | 264962 | 0
INPUTS | 0
EQ | 1 | 
   CP_CS = Vcc;

MACROCELL | 2 | 1 | ROM_B_0_OBUF$BUF2
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 2 | 0
INPUTS | 4 | LAN_BASEADR<0>  | A<16>.PIN  | LAN_BASEADR<1>  | A<17>.PIN
INPUTMC | 2 | 5 | 16 | 5 | 15
INPUTP | 2 | 175 | 172
EXPORTS | 1 | 2 | 0
EQ | 4 | 
   IDE_W = Vcc;
    ROM_B_0_OBUF$BUF2.EXP  =  LAN_BASEADR<0> & !A<16>.PIN
	# !LAN_BASEADR<0> & A<16>.PIN
	# !LAN_BASEADR<1> & A<17>.PIN

MACROCELL | 0 | 16 | ROM_B_0_OBUF$BUF3
ATTRIBUTES | 264962 | 0
INPUTS | 0
EQ | 1 | 
   IDE_R = Vcc;

MACROCELL | 0 | 9 | ROM_B_0_OBUF$BUF4
ATTRIBUTES | 264962 | 0
INPUTS | 0
EQ | 1 | 
   IDE_CS<1> = Vcc;

MACROCELL | 0 | 7 | ROM_B_0_OBUF$BUF5
ATTRIBUTES | 264962 | 0
INPUTS | 0
EQ | 1 | 
   IDE_CS<0> = Vcc;

MACROCELL | 0 | 13 | ROM_B_0_OBUF$BUF6
ATTRIBUTES | 264962 | 0
INPUTS | 0
EQ | 1 | 
   IDE_A<2> = Vcc;

MACROCELL | 0 | 14 | ROM_B_0_OBUF$BUF7
ATTRIBUTES | 264962 | 0
INPUTS | 0
EQ | 1 | 
   IDE_A<1> = Vcc;

MACROCELL | 0 | 11 | ROM_B_0_OBUF$BUF8
ATTRIBUTES | 264962 | 0
INPUTS | 0
EQ | 1 | 
   IDE_A<0> = Vcc;

MACROCELL | 10 | 16 | ROM_B_0_OBUF$BUF9
ATTRIBUTES | 264962 | 0
OUTPUTMC | 1 | 10 | 17
INPUTS | 5 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | $OpTx$FX_DC$23  | $OpTx$FX_DC$24
INPUTMC | 5 | 12 | 0 | 12 | 10 | 10 | 0 | 5 | 10 | 5 | 8
EXPORTS | 1 | 10 | 17
EQ | 3 | 
   CP_WE = Vcc;
    ROM_B_0_OBUF$BUF9.EXP  =  !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & $OpTx$FX_DC$23 & $OpTx$FX_DC$24

MACROCELL | 9 | 0 | lan_rdy/lan_rdy_RSTF
ATTRIBUTES | 133888 | 0
OUTPUTMC | 62 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 9 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 5 | 9 | 4 | 9 | 7 | 9 | 11 | 9 | 10 | 9 | 13 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 10 | 15 | 8 | 17 | 8 | 15 | 7 | 17 | 7 | 16 | 12 | 17 | 14 | 17 | 12 | 16 | 11 | 17 | 8 | 14 | 5 | 17 | 7 | 15 | 7 | 0 | 12 | 15 | 14 | 1 | 12 | 14 | 11 | 16 | 12 | 11 | 11 | 15 | 5 | 11 | 10 | 12 | 7 | 4 | 12 | 13 | 7 | 9 | 9 | 8 | 9 | 12
INPUTS | 2 | RESET  | FCS
INPUTP | 2 | 263 | 147
EQ | 1 | 
   lan_rdy/lan_rdy_RSTF = RESET & !FCS;

MACROCELL | 0 | 8 | $OpTx$FX_DC$25
ATTRIBUTES | 133888 | 0
OUTPUTMC | 110 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 1 | 6 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 9 | 11 | 11 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 5 | 9 | 4 | 9 | 7 | 9 | 11 | 9 | 10 | 9 | 13 | 10 | 0 | 8 | 12 | 8 | 15 | 7 | 17 | 7 | 16 | 12 | 14 | 14 | 15 | 12 | 16 | 11 | 17 | 8 | 14 | 5 | 17 | 7 | 14 | 5 | 16 | 12 | 15 | 14 | 1 | 12 | 13 | 11 | 16 | 1 | 3 | 4 | 7 | 1 | 17 | 1 | 8 | 4 | 6 | 1 | 15 | 1 | 12 | 1 | 10 | 4 | 5 | 9 | 6 | 1 | 0 | 9 | 8 | 9 | 14 | 9 | 12 | 9 | 3 | 9 | 15 | 7 | 0 | 7 | 15 | 8 | 0 | 8 | 9 | 8 | 11 | 8 | 17 | 10 | 1 | 10 | 3 | 10 | 5 | 10 | 8 | 10 | 11 | 11 | 0 | 11 | 15 | 12 | 0 | 12 | 6 | 12 | 8 | 12 | 17 | 14 | 0 | 14 | 2 | 14 | 12 | 14 | 17 | 15 | 0 | 15 | 3 | 15 | 4 | 15 | 6 | 15 | 8 | 15 | 9 | 15 | 11
INPUTS | 2 | $OpTx$FX_DC$23  | $OpTx$FX_DC$24
INPUTMC | 2 | 5 | 10 | 5 | 8
EQ | 1 | 
   $OpTx$FX_DC$25 = $OpTx$FX_DC$23 & $OpTx$FX_DC$24;

MACROCELL | 5 | 10 | $OpTx$FX_DC$23
ATTRIBUTES | 133888 | 0
OUTPUTMC | 8 | 10 | 7 | 10 | 15 | 10 | 12 | 0 | 8 | 10 | 8 | 10 | 17 | 10 | 14 | 10 | 16
INPUTS | 2 | DS0  | DS1
INPUTP | 2 | 170 | 148
EQ | 1 | 
   $OpTx$FX_DC$23 = DS0 & DS1;

MACROCELL | 5 | 8 | $OpTx$FX_DC$24
ATTRIBUTES | 133888 | 0
OUTPUTMC | 5 | 10 | 15 | 0 | 8 | 10 | 8 | 10 | 16 | 10 | 14
INPUTS | 2 | UDS  | LDS
INPUTP | 2 | 155 | 157
EQ | 1 | 
   $OpTx$FX_DC$24 = UDS & LDS;

MACROCELL | 10 | 8 | $OpTx$FX_DC$326
ATTRIBUTES | 133888 | 0
OUTPUTMC | 16 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7
INPUTS | 12 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$24  | $OpTx$FX_DC$23  | LAN_SM_FSM_FFd3  | lan_adr_sw  | A<21>.PIN  | $OpTx$FX_DC$25  | A<13>.PIN
INPUTMC | 10 | 12 | 0 | 12 | 10 | 10 | 0 | 6 | 6 | 14 | 2 | 5 | 8 | 5 | 10 | 10 | 7 | 6 | 17 | 0 | 8
INPUTP | 2 | 163 | 123
EXPORTS | 1 | 10 | 9
EQ | 10 | 
   $OpTx$FX_DC$326 = !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1
	# !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$23
	# !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$24;
    $OpTx$FX_DC$326.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<21>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<13>.PIN & !$OpTx$FX_DC$25

MACROCELL | 9 | 6 | $OpTx$FX_DC$66
ATTRIBUTES | 133888 | 0
OUTPUTMC | 2 | 4 | 8 | 4 | 17
INPUTS | 4 | lan_adr  | RW  | Z3_ADR<13>  | $OpTx$FX_DC$25
INPUTMC | 3 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 1 | 158
EQ | 1 | 
   $OpTx$FX_DC$66 = lan_adr & !RW & Z3_ADR<13> & !$OpTx$FX_DC$25;

MACROCELL | 1 | 0 | $OpTx$FX_DC$42
ATTRIBUTES | 133888 | 0
OUTPUTMC | 16 | 5 | 16 | 4 | 15 | 3 | 17 | 3 | 16 | 3 | 15 | 4 | 12 | 4 | 10 | 5 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 5 | 14 | 6 | 16 | 6 | 15 | 6 | 14 | 5 | 12
INPUTS | 11 | FCS  | Z3_ADR<2>  | Z3_ADR_0  | Z3_ADR_1  | Z3_ADR<6>  | autoconfig  | RW  | Z3_ADR<3>  | Z3_ADR<4>  | Z3_ADR<5>  | $OpTx$FX_DC$25
INPUTMC | 9 | 14 | 3 | 0 | 15 | 0 | 12 | 6 | 9 | 6 | 7 | 6 | 13 | 6 | 12 | 6 | 10 | 0 | 8
INPUTP | 2 | 147 | 158
EQ | 3 | 
   $OpTx$FX_DC$42 = !FCS & !Z3_ADR<2> & !Z3_ADR_0 & Z3_ADR_1 & 
	!Z3_ADR<6> & autoconfig & !RW & !Z3_ADR<3> & Z3_ADR<4> & 
	!Z3_ADR<5> & !$OpTx$FX_DC$25;

MACROCELL | 9 | 8 | DQ_14_IOBUFE/DQ_14_IOBUFE_TRST
ATTRIBUTES | 133888 | 0
OUTPUTMC | 12 | 9 | 16 | 9 | 1 | 9 | 9 | 11 | 11 | 9 | 2 | 7 | 1 | 7 | 2 | 11 | 4 | 9 | 4 | 9 | 7 | 9 | 11 | 9 | 10
INPUTS | 5 | RESET  | lan_adr  | RW  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25
INPUTMC | 3 | 6 | 6 | 9 | 0 | 0 | 8
INPUTP | 2 | 263 | 158
EQ | 3 | 
   DQ_14_IOBUFE/DQ_14_IOBUFE_TRST = !RESET
	# lan_adr & !RW & lan_rdy/lan_rdy_RSTF & 
	!$OpTx$FX_DC$25;

MACROCELL | 9 | 14 | $OpTx$FX_DC$61
ATTRIBUTES | 133888 | 0
OUTPUTMC | 5 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 9 | 11 | 11
INPUTS | 6 | RESET  | FCS  | lan_adr  | RW  | Z3_A_LOW  | $OpTx$FX_DC$25
INPUTMC | 3 | 6 | 6 | 10 | 15 | 0 | 8
INPUTP | 3 | 263 | 147 | 158
EQ | 2 | 
   $OpTx$FX_DC$61 = !RESET
	# !FCS & lan_adr & !RW & !Z3_A_LOW & !$OpTx$FX_DC$25;

MACROCELL | 9 | 12 | DQ_11_IOBUFE/DQ_11_IOBUFE_TRST
ATTRIBUTES | 133888 | 0
OUTPUTMC | 4 | 11 | 9 | 11 | 7 | 9 | 5 | 9 | 13
INPUTS | 5 | RESET  | lan_adr  | RW  | lan_rdy/lan_rdy_RSTF  | $OpTx$FX_DC$25
INPUTMC | 3 | 6 | 6 | 9 | 0 | 0 | 8
INPUTP | 2 | 263 | 158
EQ | 3 | 
   DQ_11_IOBUFE/DQ_11_IOBUFE_TRST = !RESET
	# lan_adr & !RW & lan_rdy/lan_rdy_RSTF & 
	!$OpTx$FX_DC$25;

MACROCELL | 9 | 3 | Z3_DATA<7>/Z3_DATA<7>_TRST
ATTRIBUTES | 133888 | 0
OUTPUTMC | 16 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11
INPUTS | 4 | FCS  | lan_adr  | RW  | $OpTx$FX_DC$25
INPUTMC | 2 | 6 | 6 | 0 | 8
INPUTP | 2 | 147 | 158
EQ | 1 | 
   Z3_DATA<7>/Z3_DATA<7>_TRST = !FCS & lan_adr & RW & !$OpTx$FX_DC$25;

MACROCELL | 9 | 15 | $OpTx$FX_DC$49
ATTRIBUTES | 133888 | 0
OUTPUTMC | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 5 | 9 | 4 | 9 | 7 | 9 | 11 | 9 | 10 | 9 | 13
INPUTS | 6 | RESET  | FCS  | lan_adr  | RW  | Z3_A_LOW  | $OpTx$FX_DC$25
INPUTMC | 3 | 6 | 6 | 10 | 15 | 0 | 8
INPUTP | 3 | 263 | 147 | 158
EQ | 2 | 
   $OpTx$FX_DC$49 = !RESET
	# !FCS & lan_adr & !RW & !Z3_A_LOW & !$OpTx$FX_DC$25;

MACROCELL | 6 | 0 | lan_adr_sw/lan_adr_sw_RSTF
ATTRIBUTES | 133888 | 0
OUTPUTMC | 17 | 6 | 17 | 14 | 3 | 0 | 15 | 0 | 12 | 6 | 9 | 6 | 7 | 6 | 6 | 14 | 2 | 6 | 13 | 6 | 12 | 6 | 10 | 9 | 17 | 10 | 6 | 10 | 5 | 6 | 8 | 0 | 17 | 10 | 3
INPUTS | 2 | RESET  | BERR
INPUTP | 2 | 263 | 176
EQ | 1 | 
   lan_adr_sw/lan_adr_sw_RSTF = RESET & BERR;

MACROCELL | 2 | 16 | Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000/Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000_D2
ATTRIBUTES | 133888 | 0
OUTPUTMC | 2 | 6 | 17 | 6 | 6
INPUTS | 8 | D<9>.PIN  | LAN_BASEADR<9>  | D<8>.PIN  | LAN_BASEADR<8>  | D<11>.PIN  | LAN_BASEADR<11>  | EXP24_.EXP  | EXP25_.EXP
INPUTMC | 5 | 5 | 12 | 6 | 14 | 3 | 17 | 2 | 15 | 2 | 17
INPUTP | 3 | 73 | 32 | 77
IMPORTS | 2 | 2 | 15 | 2 | 17
EQ | 38 | 
   Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000/Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000_D2 = !D<11>.PIN & LAN_BASEADR<11>
	# D<8>.PIN & !LAN_BASEADR<8>
	# !D<8>.PIN & LAN_BASEADR<8>
	# D<9>.PIN & !LAN_BASEADR<9>
	# !D<9>.PIN & LAN_BASEADR<9>
;Imported pterms FB3_16
	# D<15>.PIN & !LAN_BASEADR<15>
	# !D<15>.PIN & LAN_BASEADR<15>
	# D<10>.PIN & !LAN_BASEADR<10>
	# !D<10>.PIN & LAN_BASEADR<10>
	# D<11>.PIN & !LAN_BASEADR<11>
;Imported pterms FB3_15
	# D<12>.PIN & !LAN_BASEADR<12>
	# LAN_BASEADR<6> & !A<22>.PIN
	# !LAN_BASEADR<6> & A<22>.PIN
	# LAN_BASEADR<7> & !A<23>.PIN
	# !LAN_BASEADR<7> & A<23>.PIN
;Imported pterms FB3_14
	# LAN_BASEADR<1> & !A<17>.PIN
	# LAN_BASEADR<2> & !A<18>.PIN
	# !LAN_BASEADR<2> & A<18>.PIN
	# !LAN_BASEADR<3> & A<19>.PIN
;Imported pterms FB3_18
	# !D<12>.PIN & LAN_BASEADR<12>
	# D<13>.PIN & !LAN_BASEADR<13>
	# !D<13>.PIN & LAN_BASEADR<13>
	# D<14>.PIN & !LAN_BASEADR<14>
	# !D<14>.PIN & LAN_BASEADR<14>
;Imported pterms FB3_1
	# LAN_BASEADR<3> & !A<19>.PIN
	# LAN_BASEADR<4> & !A<20>.PIN
	# !LAN_BASEADR<4> & A<20>.PIN
	# LAN_BASEADR<5> & !A<21>.PIN
	# !LAN_BASEADR<5> & A<21>.PIN
;Imported pterms FB3_2
	# LAN_BASEADR<0> & !A<16>.PIN
	# !LAN_BASEADR<0> & A<16>.PIN
	# !LAN_BASEADR<1> & A<17>.PIN;

MACROCELL | 0 | 6 | BUF_autoconfig
ATTRIBUTES | 133888 | 0
OUTPUTMC | 3 | 6 | 17 | 6 | 7 | 6 | 6
INPUTS | 19 | D<15>.PIN  | D<10>.PIN  | D<11>.PIN  | D<12>.PIN  | D<13>.PIN  | D<14>.PIN  | D<8>.PIN  | D<9>.PIN  | Z3  | A<18>.PIN  | A<17>.PIN  | A<16>.PIN  | A<22>.PIN  | A<21>.PIN  | A<19>.PIN  | A<20>.PIN  | A<23>.PIN  | CFIN  | CFOUT
INPUTMC | 1 | 13 | 10
INPUTP | 18 | 89 | 74 | 77 | 78 | 80 | 81 | 32 | 73 | 151 | 171 | 172 | 175 | 162 | 163 | 169 | 167 | 161 | 190
EQ | 4 | 
   BUF_autoconfig = D<15>.PIN & D<10>.PIN & D<11>.PIN & D<12>.PIN & 
	D<13>.PIN & D<14>.PIN & D<8>.PIN & D<9>.PIN & Z3 & 
	!A<18>.PIN & !A<17>.PIN & !A<16>.PIN & !A<22>.PIN & !A<21>.PIN & 
	!A<19>.PIN & !A<20>.PIN & !A<23>.PIN & !CFIN & CFOUT;

MACROCELL | 10 | 17 | BUF_LAN_SM_FSM_FFd4__$INT
ATTRIBUTES | 133888 | 0
OUTPUTMC | 2 | 12 | 0 | 12 | 12
INPUTS | 8 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd2  | $OpTx$FX_DC$23  | LAN_SM_FSM_FFd1  | Z3_ADR<13>  | lan_adr  | ROM_B_0_OBUF$BUF9.EXP
INPUTMC | 8 | 12 | 0 | 10 | 7 | 12 | 10 | 5 | 10 | 10 | 0 | 14 | 2 | 6 | 6 | 10 | 16
IMPORTS | 1 | 10 | 16
EQ | 10 | 
   BUF_LAN_SM_FSM_FFd4__$INT = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd3
	# !LAN_SM_FSM_FFd2 & LAN_SM_FSM_FFd3
	# LAN_SM_FSM_FFd3 & $OpTx$FX_DC$23
	# !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & !lan_adr
	# !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & Z3_ADR<13>
;Imported pterms FB11_17
	# !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & $OpTx$FX_DC$23 & $OpTx$FX_DC$24;

MACROCELL | 10 | 14 | BUF_LAN_SM_FSM_FFd2
ATTRIBUTES | 133888 | 0
OUTPUTMC | 2 | 12 | 10 | 12 | 12
INPUTS | 7 | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd4  | $OpTx$FX_DC$23  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$24
INPUTMC | 7 | 12 | 10 | 10 | 7 | 12 | 0 | 5 | 10 | 6 | 6 | 14 | 2 | 5 | 8
EQ | 5 | 
   BUF_LAN_SM_FSM_FFd2 = LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3
	# LAN_SM_FSM_FFd2 & $OpTx$FX_DC$23
	# !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & lan_adr & 
	!Z3_ADR<13> & !$OpTx$FX_DC$24;

MACROCELL | 3 | 0 | BUF_LAN_D_INIT<1>__$INT
ATTRIBUTES | 133888 | 0
OUTPUTMC | 6 | 3 | 3 | 3 | 6 | 6 | 3 | 6 | 1 | 6 | 5 | 3 | 9
INPUTS | 3 | LAN_RST_SM_FSM_FFd3  | LAN_RST_SM_FSM_FFd2  | LAN_RST_SM_FSM_FFd1
INPUTMC | 3 | 3 | 3 | 3 | 6 | 3 | 8
EQ | 2 | 
   BUF_LAN_D_INIT<1>__$INT = LAN_RST_SM_FSM_FFd3 & !LAN_RST_SM_FSM_FFd1
	# !LAN_RST_SM_FSM_FFd3 & LAN_RST_SM_FSM_FFd2;

MACROCELL | 12 | 12 | $OpTx$FX_DC$325
ATTRIBUTES | 133888 | 0
OUTPUTMC | 16 | 8 | 17 | 8 | 15 | 7 | 17 | 7 | 16 | 12 | 17 | 14 | 17 | 12 | 16 | 11 | 17 | 8 | 14 | 5 | 17 | 7 | 15 | 7 | 0 | 12 | 15 | 14 | 1 | 12 | 14 | 11 | 16
INPUTS | 4 | LAN_SM_FSM_FFd1  | BUF_LAN_SM_FSM_FFd2  | BUF_LAN_RD_S  | BUF_LAN_SM_FSM_FFd4__$INT
INPUTMC | 4 | 10 | 0 | 10 | 14 | 10 | 1 | 10 | 17
EQ | 4 | 
   $OpTx$FX_DC$325 = !LAN_SM_FSM_FFd1 & !BUF_LAN_SM_FSM_FFd4__$INT & 
	!BUF_LAN_RD_S
	# !LAN_SM_FSM_FFd1 & BUF_LAN_SM_FSM_FFd2 & 
	!BUF_LAN_RD_S;

MACROCELL | 10 | 1 | BUF_LAN_RD_S
ATTRIBUTES | 133888 | 0
OUTPUTMC | 3 | 12 | 11 | 12 | 12 | 10 | 2
INPUTS | 9 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd1  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | lan_adr_sw  | lan_adr  | Z3_ADR<13>  | A<11>.PIN  | $OpTx$FX_DC$25
INPUTMC | 8 | 12 | 0 | 10 | 0 | 12 | 10 | 10 | 7 | 6 | 17 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 1 | 114
EXPORTS | 1 | 10 | 2
EQ | 5 | 
   BUF_LAN_RD_S = LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd1
	# LAN_SM_FSM_FFd2 & !LAN_SM_FSM_FFd3 & 
	!LAN_SM_FSM_FFd1;
    BUF_LAN_RD_S.EXP  =  !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<11>.PIN & !$OpTx$FX_DC$25

MACROCELL | 14 | 4 | $OpTx$FX_DC$268
ATTRIBUTES | 133888 | 0
OUTPUTMC | 2 | 11 | 15 | 5 | 11
INPUTS | 2 | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3
INPUTMC | 2 | 12 | 0 | 10 | 7
EQ | 1 | 
   $OpTx$FX_DC$268 = !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd3;

MACROCELL | 0 | 10 | N0$BUF7/N0$BUF7_TRST
ATTRIBUTES | 133888 | 0
OUTPUTMC | 1 | 14 | 11
INPUTS | 3 | FCS  | lan_rdy  | autoconfig
INPUTMC | 2 | 10 | 12 | 6 | 7
INPUTP | 1 | 147
EQ | 2 | 
   N0$BUF7/N0$BUF7_TRST = !FCS & autoconfig
	# !FCS & lan_rdy;

MACROCELL | 2 | 0 | EXP22_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 2 | 17
INPUTS | 7 | LAN_BASEADR<3>  | A<19>.PIN  | LAN_BASEADR<4>  | A<20>.PIN  | LAN_BASEADR<5>  | A<21>.PIN  | ROM_B_0_OBUF$BUF2.EXP
INPUTMC | 4 | 3 | 12 | 3 | 10 | 5 | 14 | 2 | 1
INPUTP | 3 | 169 | 167 | 163
EXPORTS | 1 | 2 | 17
IMPORTS | 1 | 2 | 1
EQ | 9 | 
       EXP22_.EXP  =  LAN_BASEADR<3> & !A<19>.PIN
	# LAN_BASEADR<4> & !A<20>.PIN
	# !LAN_BASEADR<4> & A<20>.PIN
	# LAN_BASEADR<5> & !A<21>.PIN
	# !LAN_BASEADR<5> & A<21>.PIN
;Imported pterms FB3_2
	# LAN_BASEADR<0> & !A<16>.PIN
	# !LAN_BASEADR<0> & A<16>.PIN
	# !LAN_BASEADR<1> & A<17>.PIN

MACROCELL | 2 | 14 | EXP23_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 2 | 15
INPUTS | 7 | D<12>.PIN  | LAN_BASEADR<12>  | LAN_BASEADR<6>  | A<22>.PIN  | LAN_BASEADR<7>  | A<23>.PIN  | N0$BUF6.EXP
INPUTMC | 4 | 3 | 16 | 6 | 16 | 6 | 15 | 2 | 13
INPUTP | 3 | 78 | 162 | 161
EXPORTS | 1 | 2 | 15
IMPORTS | 1 | 2 | 13
EQ | 10 | 
       EXP23_.EXP  =  D<12>.PIN & !LAN_BASEADR<12>
	# LAN_BASEADR<6> & !A<22>.PIN
	# !LAN_BASEADR<6> & A<22>.PIN
	# LAN_BASEADR<7> & !A<23>.PIN
	# !LAN_BASEADR<7> & A<23>.PIN
;Imported pterms FB3_14
	# LAN_BASEADR<1> & !A<17>.PIN
	# LAN_BASEADR<2> & !A<18>.PIN
	# !LAN_BASEADR<2> & A<18>.PIN
	# !LAN_BASEADR<3> & A<19>.PIN

MACROCELL | 2 | 15 | EXP24_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 2 | 16
INPUTS | 7 | D<15>.PIN  | LAN_BASEADR<15>  | D<10>.PIN  | LAN_BASEADR<10>  | D<11>.PIN  | LAN_BASEADR<11>  | EXP23_.EXP
INPUTMC | 4 | 4 | 10 | 4 | 15 | 3 | 17 | 2 | 14
INPUTP | 3 | 89 | 74 | 77
EXPORTS | 1 | 2 | 16
IMPORTS | 1 | 2 | 14
EQ | 16 | 
       EXP24_.EXP  =  D<15>.PIN & !LAN_BASEADR<15>
	# !D<15>.PIN & LAN_BASEADR<15>
	# D<10>.PIN & !LAN_BASEADR<10>
	# !D<10>.PIN & LAN_BASEADR<10>
	# D<11>.PIN & !LAN_BASEADR<11>
;Imported pterms FB3_15
	# D<12>.PIN & !LAN_BASEADR<12>
	# LAN_BASEADR<6> & !A<22>.PIN
	# !LAN_BASEADR<6> & A<22>.PIN
	# LAN_BASEADR<7> & !A<23>.PIN
	# !LAN_BASEADR<7> & A<23>.PIN
;Imported pterms FB3_14
	# LAN_BASEADR<1> & !A<17>.PIN
	# LAN_BASEADR<2> & !A<18>.PIN
	# !LAN_BASEADR<2> & A<18>.PIN
	# !LAN_BASEADR<3> & A<19>.PIN

MACROCELL | 2 | 17 | EXP25_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 2 | 16
INPUTS | 7 | D<12>.PIN  | LAN_BASEADR<12>  | D<13>.PIN  | LAN_BASEADR<13>  | D<14>.PIN  | LAN_BASEADR<14>  | EXP22_.EXP
INPUTMC | 4 | 3 | 16 | 3 | 15 | 4 | 12 | 2 | 0
INPUTP | 3 | 78 | 80 | 81
EXPORTS | 1 | 2 | 16
IMPORTS | 1 | 2 | 0
EQ | 15 | 
       EXP25_.EXP  =  !D<12>.PIN & LAN_BASEADR<12>
	# D<13>.PIN & !LAN_BASEADR<13>
	# !D<13>.PIN & LAN_BASEADR<13>
	# D<14>.PIN & !LAN_BASEADR<14>
	# !D<14>.PIN & LAN_BASEADR<14>
;Imported pterms FB3_1
	# LAN_BASEADR<3> & !A<19>.PIN
	# LAN_BASEADR<4> & !A<20>.PIN
	# !LAN_BASEADR<4> & A<20>.PIN
	# LAN_BASEADR<5> & !A<21>.PIN
	# !LAN_BASEADR<5> & A<21>.PIN
;Imported pterms FB3_2
	# LAN_BASEADR<0> & !A<16>.PIN
	# !LAN_BASEADR<0> & A<16>.PIN
	# !LAN_BASEADR<1> & A<17>.PIN

MACROCELL | 7 | 14 | EXP26_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 7 | 15
INPUTS | 8 | D<10>.PIN  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | D<2>.PIN
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 2 | 74 | 71
EXPORTS | 1 | 7 | 15
EQ | 4 | 
       EXP26_.EXP  =  D<10>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# D<2>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25

MACROCELL | 8 | 0 | EXP27_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 8 | 17
INPUTS | 12 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<8>.PIN  | DQ<0>.PIN  | D<0>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | D<8>.PIN
INPUTMC | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 4 | 231 | 217 | 4 | 32
EXPORTS | 1 | 8 | 17
EQ | 8 | 
       EXP27_.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<8>.PIN
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<0>.PIN
	# D<0>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# D<8>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25

MACROCELL | 8 | 9 | EXP28_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 8 | 10
INPUTS | 7 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | A<8>.PIN  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 1 | 106
EXPORTS | 1 | 8 | 10
EQ | 2 | 
       EXP28_.EXP  =  !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	A<8>.PIN & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25

MACROCELL | 8 | 11 | EXP29_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 8 | 10
INPUTS | 7 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | A<16>.PIN  | $OpTx$FX_DC$25
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 1 | 175
EXPORTS | 1 | 8 | 10
EQ | 2 | 
       EXP29_.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<16>.PIN & !$OpTx$FX_DC$25

MACROCELL | 8 | 12 | EXP30_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 8 | 13
INPUTS | 11 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd3  | LAN_SM_FSM_FFd1  | DQ<9>.PIN  | lan_adr  | Z3_ADR<13>  | A<17>.PIN  | $OpTx$FX_DC$25  | A<9>.PIN
INPUTMC | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 3 | 209 | 172 | 108
EXPORTS | 1 | 8 | 13
EQ | 6 | 
       EXP30_.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd2 & 
	LAN_SM_FSM_FFd3 & !LAN_SM_FSM_FFd1 & DQ<9>.PIN
	# lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<17>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<9>.PIN & !$OpTx$FX_DC$25

MACROCELL | 11 | 0 | EXP31_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 11 | 17
INPUTS | 7 | D<15>.PIN  | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 1 | 89
EXPORTS | 1 | 11 | 17
EQ | 2 | 
       EXP31_.EXP  =  D<15>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25

MACROCELL | 12 | 6 | EXP32_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 12 | 7
INPUTS | 7 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | A<15>.PIN  | Z3_ADR<13>  | $OpTx$FX_DC$25
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 1 | 139
EXPORTS | 1 | 12 | 7
EQ | 2 | 
       EXP32_.EXP  =  !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & A<15>.PIN & !Z3_ADR<13> & !$OpTx$FX_DC$25

MACROCELL | 12 | 8 | EXP33_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 12 | 7
INPUTS | 7 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | A<23>.PIN  | $OpTx$FX_DC$25
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 1 | 161
EXPORTS | 1 | 12 | 7
EQ | 2 | 
       EXP33_.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<23>.PIN & !$OpTx$FX_DC$25

MACROCELL | 14 | 0 | EXP34_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 14 | 17
INPUTS | 11 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd2  | LAN_SM_FSM_FFd1  | DQ<13>.PIN  | D<13>.PIN  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25  | D<5>.PIN
INPUTMC | 8 | 6 | 17 | 12 | 0 | 12 | 10 | 10 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 3 | 204 | 80 | 37
EXPORTS | 1 | 14 | 17
EQ | 6 | 
       EXP34_.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & LAN_SM_FSM_FFd2 & 
	!LAN_SM_FSM_FFd1 & DQ<13>.PIN
	# D<13>.PIN & lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# D<5>.PIN & !lan_adr_sw & !LAN_SM_FSM_FFd4 & 
	!LAN_SM_FSM_FFd3 & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25

MACROCELL | 14 | 12 | EXP35_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 14 | 13
INPUTS | 8 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | A<15>.PIN  | Z3_ADR<13>  | $OpTx$FX_DC$25  | A<23>.PIN
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 2 | 139 | 161
EXPORTS | 1 | 14 | 13
EQ | 4 | 
       EXP35_.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & A<15>.PIN & !Z3_ADR<13> & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<23>.PIN & !$OpTx$FX_DC$25

MACROCELL | 14 | 15 | EXP36_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 14 | 14
INPUTS | 8 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | A<14>.PIN  | $OpTx$FX_DC$25  | A<22>.PIN
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 2 | 125 | 162
EXPORTS | 1 | 14 | 14
EQ | 4 | 
       EXP36_.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<14>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<22>.PIN & !$OpTx$FX_DC$25

MACROCELL | 15 | 0 | EXP37_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 15 | 1
INPUTS | 8 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | A<12>.PIN  | $OpTx$FX_DC$25  | A<20>.PIN
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 2 | 115 | 167
EXPORTS | 1 | 15 | 1
EQ | 4 | 
       EXP37_.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<12>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<20>.PIN & !$OpTx$FX_DC$25

MACROCELL | 15 | 3 | EXP38_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 15 | 2
INPUTS | 8 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | A<11>.PIN  | $OpTx$FX_DC$25  | A<19>.PIN
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 2 | 114 | 169
EXPORTS | 1 | 15 | 2
EQ | 4 | 
       EXP38_.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<11>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<19>.PIN & !$OpTx$FX_DC$25

MACROCELL | 15 | 4 | EXP39_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 15 | 5
INPUTS | 7 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | A<18>.PIN  | $OpTx$FX_DC$25
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 1 | 171
EXPORTS | 1 | 15 | 5
EQ | 2 | 
       EXP39_.EXP  =  !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<18>.PIN & !$OpTx$FX_DC$25

MACROCELL | 15 | 6 | EXP40_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 15 | 5
INPUTS | 7 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | A<10>.PIN  | $OpTx$FX_DC$25
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 1 | 112
EXPORTS | 1 | 15 | 5
EQ | 2 | 
       EXP40_.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<10>.PIN & !$OpTx$FX_DC$25

MACROCELL | 15 | 8 | EXP41_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 15 | 7
INPUTS | 8 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | lan_adr  | Z3_ADR<13>  | A<9>.PIN  | $OpTx$FX_DC$25  | A<17>.PIN
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 2 | 108 | 172
EXPORTS | 1 | 15 | 7
EQ | 4 | 
       EXP41_.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<9>.PIN & !$OpTx$FX_DC$25
	# !lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	lan_adr & !Z3_ADR<13> & A<17>.PIN & !$OpTx$FX_DC$25

MACROCELL | 15 | 11 | EXP42_
ATTRIBUTES | 2048 | 0
OUTPUTMC | 1 | 15 | 10
INPUTS | 7 | lan_adr_sw  | LAN_SM_FSM_FFd4  | LAN_SM_FSM_FFd3  | A<8>.PIN  | lan_adr  | Z3_ADR<13>  | $OpTx$FX_DC$25
INPUTMC | 6 | 6 | 17 | 12 | 0 | 10 | 7 | 6 | 6 | 14 | 2 | 0 | 8
INPUTP | 1 | 106
EXPORTS | 1 | 15 | 10
EQ | 2 | 
       EXP42_.EXP  =  lan_adr_sw & !LAN_SM_FSM_FFd4 & !LAN_SM_FSM_FFd3 & 
	A<8>.PIN & lan_adr & !Z3_ADR<13> & !$OpTx$FX_DC$25

PIN | CLK_EXT | 4096 | 0 | N/A | 57 | 81 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 4 | 8 | 1 | 6 | 5 | 16 | 4 | 15 | 3 | 17 | 3 | 16 | 3 | 15 | 4 | 12 | 4 | 10 | 5 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 5 | 14 | 6 | 16 | 6 | 15 | 6 | 14 | 5 | 12 | 4 | 17 | 12 | 0 | 12 | 10 | 10 | 7 | 10 | 0 | 3 | 3 | 3 | 6 | 3 | 8 | 10 | 15 | 8 | 17 | 8 | 15 | 7 | 17 | 7 | 16 | 12 | 17 | 14 | 17 | 12 | 16 | 11 | 17 | 8 | 14 | 5 | 17 | 7 | 15 | 7 | 0 | 12 | 15 | 14 | 1 | 12 | 14 | 11 | 16 | 6 | 3 | 6 | 1 | 4 | 3 | 3 | 2 | 1 | 3 | 4 | 7 | 1 | 17 | 1 | 8 | 4 | 6 | 1 | 15 | 1 | 12 | 1 | 10 | 4 | 5 | 6 | 5 | 3 | 9 | 12 | 11 | 11 | 15 | 5 | 11 | 10 | 12 | 11 | 14 | 11 | 13 | 13 | 10
PIN | FCS | 64 | 0 | N/A | 147 | 51 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 1 | 6 | 6 | 17 | 14 | 3 | 0 | 15 | 0 | 12 | 6 | 9 | 6 | 7 | 6 | 6 | 14 | 2 | 6 | 13 | 6 | 12 | 6 | 10 | 1 | 3 | 9 | 17 | 10 | 6 | 10 | 5 | 6 | 8 | 0 | 17 | 10 | 3 | 4 | 7 | 1 | 17 | 1 | 8 | 4 | 6 | 1 | 15 | 1 | 12 | 1 | 10 | 4 | 5 | 13 | 10 | 13 | 13 | 9 | 0 | 1 | 0 | 9 | 14 | 9 | 3 | 9 | 15 | 0 | 10
PIN | RW | 64 | 0 | N/A | 158 | 58 | 8 | 10 | 15 | 5 | 15 | 2 | 15 | 1 | 14 | 16 | 14 | 14 | 14 | 13 | 8 | 13 | 8 | 16 | 10 | 2 | 10 | 4 | 10 | 9 | 10 | 10 | 12 | 7 | 15 | 10 | 15 | 7 | 1 | 6 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 9 | 11 | 11 | 3 | 1 | 4 | 13 | 4 | 14 | 4 | 16 | 6 | 2 | 6 | 4 | 6 | 11 | 1 | 14 | 4 | 9 | 1 | 11 | 0 | 5 | 0 | 4 | 1 | 9 | 1 | 13 | 1 | 16 | 4 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 5 | 9 | 4 | 9 | 7 | 9 | 11 | 9 | 10 | 9 | 13 | 10 | 0 | 1 | 3 | 9 | 6 | 1 | 0 | 9 | 8 | 9 | 14 | 9 | 12 | 9 | 3 | 9 | 15
PIN | RESET | 64 | 0 | N/A | 263 | 77 | 4 | 8 | 1 | 6 | 5 | 16 | 4 | 15 | 3 | 17 | 3 | 16 | 3 | 15 | 4 | 12 | 4 | 10 | 5 | 15 | 3 | 14 | 3 | 12 | 3 | 10 | 5 | 14 | 6 | 16 | 6 | 15 | 6 | 14 | 5 | 12 | 4 | 17 | 9 | 16 | 11 | 9 | 9 | 1 | 9 | 9 | 11 | 11 | 9 | 2 | 7 | 1 | 11 | 7 | 7 | 2 | 11 | 4 | 9 | 5 | 9 | 4 | 9 | 7 | 9 | 11 | 9 | 10 | 9 | 13 | 3 | 3 | 3 | 6 | 3 | 8 | 6 | 3 | 6 | 1 | 4 | 3 | 3 | 2 | 1 | 3 | 4 | 7 | 1 | 17 | 1 | 8 | 4 | 6 | 1 | 15 | 1 | 12 | 1 | 10 | 4 | 5 | 6 | 5 | 3 | 9 | 11 | 14 | 11 | 13 | 3 | 5 | 5 | 5 | 5 | 7 | 5 | 2 | 5 | 4 | 3 | 4 | 3 | 11 | 3 | 7 | 1 | 1 | 3 | 13 | 1 | 4 | 1 | 2 | 5 | 9 | 5 | 13 | 7 | 7 | 13 | 10 | 9 | 0 | 9 | 8 | 9 | 14 | 9 | 12 | 9 | 15 | 6 | 0
PIN | LAN_INT | 64 | 0 | N/A | 201 | 2 | 4 | 17 | 4 | 3
PIN | Z3 | 64 | 0 | N/A | 151 | 3 | 6 | 17 | 6 | 6 | 0 | 6
PIN | A<4> | 64 | 0 | N/A | 97 | 1 | 14 | 3
PIN | A<2> | 64 | 0 | N/A | 101 | 1 | 0 | 15
PIN | A<3> | 64 | 0 | N/A | 99 | 1 | 0 | 12
PIN | UDS | 64 | 0 | N/A | 155 | 2 | 5 | 11 | 5 | 8
PIN | LDS | 64 | 0 | N/A | 157 | 2 | 11 | 15 | 5 | 8
PIN | A<5> | 64 | 0 | N/A | 91 | 1 | 6 | 13
PIN | A<6> | 64 | 0 | N/A | 98 | 1 | 6 | 12
PIN | A<7> | 64 | 0 | N/A | 100 | 1 | 6 | 10
PIN | DS0 | 64 | 0 | N/A | 170 | 2 | 11 | 15 | 5 | 10
PIN | DS1 | 64 | 0 | N/A | 148 | 2 | 5 | 11 | 5 | 10
PIN | BERR | 64 | 0 | N/A | 176 | 1 | 6 | 0
PIN | CFIN | 64 | 0 | N/A | 190 | 1 | 0 | 6
PIN | AUTOBOOT_OFF | 64 | 0 | N/A | 142 | 1 | 13 | 10
PIN | A_LAN<0> | 536871040 | 0 | N/A | 7
PIN | A_LAN<10> | 536871040 | 0 | N/A | 255
PIN | A_LAN<11> | 536871040 | 0 | N/A | 256
PIN | A_LAN<12> | 536871040 | 0 | N/A | 253
PIN | A_LAN<13> | 536871040 | 0 | N/A | 254
PIN | A_LAN<1> | 536871040 | 0 | N/A | 6
PIN | A_LAN<2> | 536871040 | 0 | N/A | 12
PIN | A_LAN<3> | 536871040 | 0 | N/A | 8
PIN | A_LAN<4> | 536871040 | 0 | N/A | 20
PIN | A_LAN<5> | 536871040 | 0 | N/A | 13
PIN | A_LAN<6> | 536871040 | 0 | N/A | 22
PIN | A_LAN<7> | 536871040 | 0 | N/A | 21
PIN | A_LAN<8> | 536871040 | 0 | N/A | 258
PIN | A_LAN<9> | 536871040 | 0 | N/A | 262
PIN | LAN_CS | 536871040 | 0 | N/A | 240
PIN | LAN_WRH | 536871040 | 0 | N/A | 237
PIN | LAN_WRL | 536871040 | 0 | N/A | 145
PIN | LAN_RD | 536871040 | 0 | N/A | 242
PIN | INT_OUT | 536871040 | 0 | N/A | 60
PIN | DTACK | 536871040 | 0 | N/A | 160
PIN | CFOUT | 536871040 | 0 | N/A | 191
PIN | SLAVE | 536871040 | 0 | N/A | 193
PIN | OWN | 536871040 | 0 | N/A | 195
PIN | OVR | 536871040 | 0 | N/A | 185
PIN | MTACK | 536871040 | 0 | N/A | 174
PIN | LAN_CFG<4> | 536871040 | 0 | N/A | 199
PIN | LAN_CFG<3> | 536871040 | 0 | N/A | 24
PIN | LAN_CFG<2> | 536871040 | 0 | N/A | 251
PIN | LAN_CFG<1> | 536871040 | 0 | N/A | 23
PIN | ROM_OE | 536871040 | 0 | N/A | 65
PIN | ROM_B<1> | 536871040 | 0 | N/A | 129
PIN | ROM_B<0> | 536871040 | 0 | N/A | 127
PIN | CP_RD | 536871040 | 0 | N/A | 132
PIN | CP_CS | 536871040 | 0 | N/A | 63
PIN | IDE_W | 536871040 | 0 | N/A | 47
PIN | IDE_R | 536871040 | 0 | N/A | 46
PIN | IDE_CS<1> | 536871040 | 0 | N/A | 41
PIN | IDE_CS<0> | 536871040 | 0 | N/A | 39
PIN | IDE_A<2> | 536871040 | 0 | N/A | 44
PIN | IDE_A<1> | 536871040 | 0 | N/A | 45
PIN | IDE_A<0> | 536871040 | 0 | N/A | 43
PIN | CP_WE | 536871040 | 0 | N/A | 131
PIN | A<8> | 536870976 | 0 | N/A | 106 | 3 | 8 | 9 | 6 | 9 | 15 | 11
PIN | A<18> | 536870976 | 0 | N/A | 171 | 4 | 15 | 4 | 0 | 6 | 2 | 13 | 8 | 17
PIN | A<19> | 536870976 | 0 | N/A | 169 | 5 | 10 | 3 | 2 | 0 | 2 | 13 | 0 | 6 | 15 | 3
PIN | A<20> | 536870976 | 0 | N/A | 167 | 4 | 15 | 0 | 0 | 6 | 2 | 0 | 10 | 5
PIN | A<21> | 536870976 | 0 | N/A | 163 | 4 | 0 | 6 | 10 | 8 | 2 | 0 | 14 | 17
PIN | A<22> | 536870976 | 0 | N/A | 162 | 4 | 10 | 11 | 0 | 6 | 2 | 14 | 14 | 15
PIN | A<23> | 536870976 | 0 | N/A | 161 | 4 | 14 | 12 | 0 | 6 | 2 | 14 | 12 | 8
PIN | A<9> | 536870976 | 0 | N/A | 108 | 3 | 8 | 12 | 6 | 8 | 15 | 8
PIN | A<10> | 536870976 | 0 | N/A | 112 | 3 | 8 | 17 | 0 | 17 | 15 | 6
PIN | A<11> | 536870976 | 0 | N/A | 114 | 3 | 10 | 3 | 10 | 1 | 15 | 3
PIN | A<12> | 536870976 | 0 | N/A | 115 | 3 | 15 | 0 | 9 | 17 | 10 | 5
PIN | A<13> | 536870976 | 0 | N/A | 123 | 4 | 10 | 6 | 10 | 8 | 6 | 17 | 14 | 17
PIN | A<14> | 536870976 | 0 | N/A | 125 | 4 | 10 | 11 | 10 | 5 | 6 | 17 | 14 | 15
PIN | A<15> | 536870976 | 0 | N/A | 139 | 3 | 14 | 12 | 12 | 6 | 14 | 2
PIN | A<16> | 536870976 | 0 | N/A | 175 | 4 | 0 | 6 | 15 | 9 | 2 | 1 | 8 | 11
PIN | A<17> | 536870976 | 0 | N/A | 172 | 5 | 8 | 12 | 2 | 1 | 2 | 13 | 0 | 6 | 15 | 8
PIN | DQ<10> | 536870976 | 0 | N/A | 234 | 4 | 15 | 5 | 7 | 15 | 7 | 17 | 8 | 17
PIN | DQ<11> | 536870976 | 0 | N/A | 207 | 4 | 15 | 2 | 10 | 2 | 7 | 16 | 7 | 0
PIN | DQ<1> | 536870976 | 0 | N/A | 216 | 4 | 8 | 13 | 15 | 7 | 8 | 15 | 5 | 17
PIN | DQ<4> | 536870976 | 0 | N/A | 225 | 4 | 15 | 1 | 10 | 4 | 12 | 17 | 12 | 15
PIN | DQ<9> | 536870976 | 0 | N/A | 209 | 4 | 8 | 12 | 15 | 7 | 8 | 15 | 5 | 17
PIN | D<0> | 536870976 | 0 | N/A | 4 | 3 | 5 | 16 | 8 | 0 | 8 | 13
PIN | D<10> | 536870976 | 0 | N/A | 74 | 5 | 4 | 15 | 7 | 0 | 7 | 14 | 2 | 15 | 0 | 6
PIN | D<11> | 536870976 | 0 | N/A | 77 | 6 | 3 | 17 | 7 | 15 | 2 | 15 | 2 | 16 | 0 | 6 | 7 | 1
PIN | D<12> | 536870976 | 0 | N/A | 78 | 6 | 3 | 16 | 12 | 0 | 12 | 15 | 2 | 14 | 0 | 6 | 2 | 17
PIN | D<13> | 536870976 | 0 | N/A | 80 | 5 | 3 | 15 | 14 | 0 | 14 | 1 | 0 | 6 | 2 | 17
PIN | D<14> | 536870976 | 0 | N/A | 81 | 6 | 4 | 12 | 4 | 17 | 2 | 17 | 12 | 13 | 0 | 6 | 12 | 17
PIN | D<15> | 536870976 | 0 | N/A | 89 | 6 | 4 | 8 | 4 | 10 | 11 | 0 | 11 | 16 | 2 | 15 | 0 | 6
PIN | D<1> | 536870976 | 0 | N/A | 30 | 3 | 5 | 15 | 8 | 15 | 5 | 16
PIN | D<2> | 536870976 | 0 | N/A | 71 | 3 | 3 | 14 | 7 | 17 | 7 | 14
PIN | D<3> | 536870976 | 0 | N/A | 28 | 3 | 3 | 12 | 7 | 16 | 7 | 1
PIN | D<4> | 536870976 | 0 | N/A | 38 | 3 | 3 | 10 | 12 | 0 | 12 | 14
PIN | D<5> | 536870976 | 0 | N/A | 37 | 3 | 5 | 14 | 14 | 2 | 14 | 0
PIN | D<6> | 536870976 | 0 | N/A | 26 | 3 | 6 | 16 | 12 | 16 | 12 | 13
PIN | D<7> | 536870976 | 0 | N/A | 29 | 3 | 6 | 15 | 11 | 17 | 11 | 15
PIN | D<8> | 536870976 | 0 | N/A | 32 | 5 | 6 | 14 | 8 | 0 | 8 | 14 | 2 | 16 | 0 | 6
PIN | D<9> | 536870976 | 0 | N/A | 73 | 5 | 5 | 12 | 0 | 6 | 5 | 17 | 2 | 16 | 8 | 16
PIN | DQ<0> | 536870976 | 0 | N/A | 217 | 4 | 8 | 10 | 15 | 10 | 8 | 0 | 8 | 14
PIN | DQ<12> | 536870976 | 0 | N/A | 235 | 4 | 15 | 1 | 10 | 4 | 12 | 17 | 12 | 15
PIN | DQ<13> | 536870976 | 0 | N/A | 204 | 4 | 14 | 16 | 10 | 9 | 14 | 0 | 14 | 1
PIN | DQ<14> | 536870976 | 0 | N/A | 236 | 4 | 14 | 14 | 10 | 10 | 12 | 16 | 12 | 14
PIN | DQ<15> | 536870976 | 0 | N/A | 202 | 4 | 14 | 13 | 12 | 7 | 11 | 17 | 11 | 16
PIN | DQ<2> | 536870976 | 0 | N/A | 220 | 4 | 15 | 5 | 8 | 16 | 7 | 17 | 7 | 15
PIN | DQ<3> | 536870976 | 0 | N/A | 219 | 4 | 15 | 2 | 10 | 2 | 7 | 16 | 7 | 0
PIN | DQ<5> | 536870976 | 0 | N/A | 221 | 4 | 14 | 16 | 10 | 9 | 14 | 17 | 14 | 1
PIN | DQ<6> | 536870976 | 0 | N/A | 227 | 4 | 14 | 14 | 10 | 10 | 12 | 16 | 12 | 14
PIN | DQ<7> | 536870976 | 0 | N/A | 226 | 4 | 14 | 13 | 12 | 7 | 11 | 17 | 11 | 16
PIN | DQ<8> | 536870976 | 0 | N/A | 231 | 4 | 8 | 10 | 15 | 10 | 8 | 0 | 8 | 14