Pin Freeze File:  version P.20131013

95288XL144 XC95288XL-10-TQ144
AS S:PIN80
AUTOBOOT_OFF S:PIN75
A<1> S:PIN57
A<2> S:PIN54
A<3> S:PIN52
A<4> S:PIN50
A<5> S:PIN49
A<6> S:PIN51
A<7> S:PIN53
BERR S:PIN98
C1 S:PIN103
C3 S:PIN102
CFIN S:PIN104
CLK_EXT S:PIN30
CP_IRQ S:PIN31
DS0 S:PIN93
DS1 S:PIN78
FCS S:PIN77
LAN_INT S:PIN111
LDS S:PIN82
RESET S:PIN143
RW S:PIN83
UDS S:PIN81
Z3 S:PIN79
A_LAN<0> S:PIN4
A_LAN<10> S:PIN138
A_LAN<11> S:PIN139
A_LAN<12> S:PIN136
A_LAN<13> S:PIN137
A_LAN<1> S:PIN3
A_LAN<2> S:PIN6
A_LAN<3> S:PIN5
A_LAN<4> S:PIN9
A_LAN<5> S:PIN7
A_LAN<6> S:PIN11
A_LAN<7> S:PIN10
A_LAN<8> S:PIN140
A_LAN<9> S:PIN142
CFOUT S:PIN105
CP_CS S:PIN34
CP_RD S:PIN71
CP_WE S:PIN70
DQ<0> S:PIN118
DQ<10> S:PIN129
DQ<11> S:PIN115
DQ<12> S:PIN130
DQ<13> S:PIN113
DQ<14> S:PIN131
DQ<15> S:PIN112
DQ<1> S:PIN117
DQ<2> S:PIN120
DQ<3> S:PIN119
DQ<4> S:PIN124
DQ<5> S:PIN121
DQ<6> S:PIN126
DQ<7> S:PIN125
DQ<8> S:PIN128
DQ<9> S:PIN116
D<0> S:PIN2
D<10> S:PIN41
D<11> S:PIN43
D<12> S:PIN44
D<13> S:PIN45
D<14> S:PIN46
D<15> S:PIN48
D<1> S:PIN17
D<2> S:PIN39
D<3> S:PIN15
D<4> S:PIN21
D<5> S:PIN20
D<6> S:PIN14
D<7> S:PIN16
D<8> S:PIN19
D<9> S:PIN40
IDE_A<0> S:PIN24
IDE_A<1> S:PIN26
IDE_A<2> S:PIN25
IDE_CS<0> S:PIN22
IDE_CS<1> S:PIN23
IDE_R S:PIN27
IDE_W S:PIN28
LAN_CS S:PIN133
LAN_RD S:PIN134
LAN_WRH S:PIN132
LAN_WRL S:PIN76
ROM_B<1> S:PIN69
ROM_B<0> S:PIN33
OWN S:PIN107
DTACK S:PIN85
OVR S:PIN100
MTACK S:PIN96
LAN_CFG<4> S:PIN110
LAN_CFG<3> S:PIN13
LAN_CFG<2> S:PIN135
LAN_CFG<1> S:PIN12
INT_OUT S:PIN32
INT_CP_OUT S:PIN68
ROM_OE S:PIN35
SLAVE S:PIN106
A<8> S:PIN56
A<9> S:PIN58
A<10> S:PIN59
A<11> S:PIN60
A<12> S:PIN61
A<13> S:PIN64
A<14> S:PIN66
A<15> S:PIN74
A<16> S:PIN97
A<17> S:PIN95
A<18> S:PIN94
A<19> S:PIN92
A<20> S:PIN91
A<21> S:PIN88
A<22> S:PIN87
A<23> S:PIN86


;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.

PARTITION FB1_1 EXP22_ EXP23_ Z3_ADR<9> Z3_ADR<8>
		 D_5_IOBUFE D_4_IOBUFE Z3_ADR<7> IDE_CS_0_OBUF
		 Z3_ADR<12> IDE_CS_1_OBUF Z3_ADR<11> IDE_A_0_OBUF$BUF0
		 Z3_ADR<10> IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0 DQ_SWAP
		 IDE_R_OBUF IDE_ACCESS
PARTITION FB2_1 $OpTx$FX_DC$74 A_LAN_4_OBUF A_LAN_7_OBUF $OpTx$FX_DC$73
		 A_LAN_6_OBUF ROM_B_0_OBUF$BUF7 $OpTx$FX_DC$72 ROM_B_0_OBUF$BUF5
		 SHUT_UP_Z2<2> D_6_IOBUFE SHUT_UP_Z2<1> D_3_IOBUFE
		 AUTO_CONFIG_Z2_DONE_CYCLE<2> D_7_IOBUFE D_1_IOBUFE AUTO_CONFIG_Z2_DONE_CYCLE<1>
		 D_8_IOBUFE AUTO_CONFIG_Z2_DONE_CYCLE<0>
PARTITION FB3_2 IDE_W_OBUF
PARTITION FB3_14 ROM_B_0_OBUF$BUF8 ROM_B_0_OBUF$BUF0
PARTITION FB3_18 $OpTx$FX_DC$49
PARTITION FB4_1 D_Z2_OUT<1> D_0_IOBUFE BUF_D_Z2_OUT<0> BUF_D_Z2_OUT<2>
		 A_LAN_1_OBUF A_LAN_0_OBUF BUF_D_Z2_OUT<3> A_LAN_3_OBUF
		 AUTO_CONFIG_Z2_DONE<0> AUTO_CONFIG_Z2_DONE<1> IDE_ENABLE A_LAN_2_OBUF
		 IDE_R_S A_LAN_5_OBUF IDE_W_S ROM_OE_S
		 CP_RD_S $OpTx$FX_DC$77
PARTITION FB5_1 EXP24_ CP_CS_OBUF EXP25_ EXP26_
		 ROM_OE_OBUF
PARTITION FB5_9 Z3_DATA<6>/Z3_DATA<6>_TRST D_2_IOBUFE $OpTx$FX_SC$85 D_9_IOBUFE
		 $OpTx$FX_DC$86 D_10_IOBUFE D_11_IOBUFE D_9_IOBUFE/D_9_IOBUFE_TRST
		 D_12_IOBUFE AUTOCONFIG_Z2_ACCESS
PARTITION FB6_1 EXP27_ ROM_B_0_OBUF$BUF6 A_LAN_12_OBUF
PARTITION FB6_5 A_LAN_13_OBUF A_LAN_10_OBUF
PARTITION FB6_8 A_LAN_11_OBUF
PARTITION FB6_10 A_LAN_8_OBUF
PARTITION FB6_13 $OpTx$FX_DC$46 A_LAN_9_OBUF EXP28_ EXP29_
		 Mcompar_LAN_ACCESS_cmp_eq0000_AEB_or0000/Mcompar_LAN_ACCESS_cmp_eq0000_AEB_or0000_D2 EXP30_
PARTITION FB7_2 D_Z2_OUT<0> D_13_IOBUFE IDE_BASEADR<4> D_14_IOBUFE
		 IDE_BASEADR<3> IDE_BASEADR<2> IDE_BASEADR<1> IDE_BASEADR<0>
		 CP_BASEADR<7> CP_BASEADR<6> D_15_IOBUFE CP_BASEADR<5>
		 CP_BASEADR<4> CP_BASEADR<3> CP_BASEADR<2> CP_BASEADR<1>
		 CP_BASEADR<0>
PARTITION FB8_2 DQ_12_IOBUFE DQ_14_IOBUFE
PARTITION FB8_5 LAN_WRH_OBUF
PARTITION FB8_7 LAN_BASEADR<6> LAN_CS_OBUF LAN_BASEADR<5> LAN_RD_OBUF
		 LAN_BASEADR<4> LAN_BASEADR<3> LAN_BASEADR<2> LAN_BASEADR<15>
		 LAN_BASEADR<14> LAN_BASEADR<13> LAN_BASEADR<11> LAN_BASEADR<10>
		
PARTITION FB9_1 LAN_SM_RST LAN_READY LAN_IRQ_D0 LAN_D_INIT<8>
		 LAN_D_INIT<1> LAN_A_INIT<6> CP_WE_S BUF_LAN_D_INIT<1>
		 LAN_WR_RST LAN_RST_SM_FSM_FFd3 Z3_DATA<0> LAN_RST_SM_FSM_FFd2
		 LAN_RST_SM_FSM_FFd1 Z3_DATA<1> LAN_IRQ_OUT LAN_CS_RST
		 Z3_DATA<2> AUTO_CONFIG_Z2_DONE<2>
PARTITION FB10_1 LAN_A_INIT<3> DQ_1_IOBUFE DQ_0_IOBUFE $OpTx$FX_DC$65
		 DQ_3_IOBUFE DQ_2_IOBUFE $OpTx$FX_SC$67 DQ_5_IOBUFE
		 $OpTx$FX_DC$78 DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE
		 DQ_DATA<8> DQ_8_IOBUFE DQ_DATA<2> DQ_DATA<10>
		 DQ_10_IOBUFE DQ_DATA<0>
PARTITION FB11_1 Z3_DATA<30> Z3_DATA<29> Z3_DATA<3> Z3_DATA<28>
		 Z3_DATA<4> Z3_DATA<27> Z3_DATA<23> Z3_DATA<22>
		 Z3_DATA<21> Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF9
		 Z3_DATA<20> ROM_B_0_OBUF Z3_DATA<19> LAN_SM_FSM_FFd3
		 CP_WE_OBUF Z3_DATA<31>
PARTITION FB12_1 LAN_WRL_S ROM_B_0_OBUF$BUF4
PARTITION FB12_5 DQ_15_IOBUFE
PARTITION FB12_8 DQ_13_IOBUFE
PARTITION FB12_10 DQ_11_IOBUFE
PARTITION FB12_12 DQ_9_IOBUFE LAN_INT_ENABLE DQ_DATA<9> DQ_DATA<7>
		 DQ_DATA<3> DQ_DATA<1> DQ_DATA<15>
PARTITION FB13_2 CP_RD_OBUF
PARTITION FB13_4 $OpTx$FX_DC$114 SHUT_UP_Z2<0> LAN_ACCESS D_Z2_OUT<3>
		 Z3_DATA<7> LAN_BASEADR<9> LAN_BASEADR<8> LAN_BASEADR<7>
		 LAN_BASEADR<1> LAN_BASEADR<12> LAN_WRL_OBUF LAN_BASEADR<0>
		 IDE_BASEADR<7> IDE_BASEADR<6> IDE_BASEADR<5>
PARTITION FB14_1 ROM_B_0_OBUF$BUF2/ROM_B_0_OBUF$BUF2_TRST $OpTx$FX_DC$95 ROM_B_0_OBUF$BUF2 SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF
		 DQ_8_IOBUFE/DQ_8_IOBUFE_TRST CP_WE_QUIRK Z3_ADR_1 Z3_ADR_0
		 Z3_ADR<6> Z3_ADR<5> CFOUT_OBUF Z3_ADR<4>
		 Z3_ADR<3> SLAVE_OBUF ROM_B_0_OBUF$BUF1 Z3_ADR<2>
		 Z3_ADR<13> D_Z2_OUT<2>
PARTITION FB15_1 DQ_DATA<12> DQ_DATA<13> DQ_DATA<14> DQ_DATA<4>
		 DQ_DATA<5> DQ_DATA<6> BUF_LAN_READY LAN_WRH_S
		 $OpTx$FX_DC$59 $OpTx$FX_DC$106 $OpTx$FX_DC$99 ROM_B_0_OBUF$BUF10
		
PARTITION FB15_14 Z3_DATA<15> Z3_DATA<14>
PARTITION FB15_17 Z3_DATA<13> EXP31_
PARTITION FB16_1 Z3_DATA<26> Z3_DATA<12> Z3_DATA<11> Z3_DATA<25>
		 Z3_DATA<24> Z3_DATA<10> Z3_DATA<18> Z3_DATA<9>
		 Z3_DATA<17> ROM_B_0_OBUF$BUF3 Z3_DATA<8> LAN_RD_S
		 LAN_SM_FSM_FFd2 Z3_A_LOW DQ_DATA<11> LAN_SM_FSM_FFd4
		 LAN_SM_FSM_FFd1 Z3_DATA<16>