Pin Freeze File: version P.68d 95144XL144TQ XC95144XL-10-TQ144 AS S:PIN80 AUTOBOOT_OFF S:PIN75 A<12> S:PIN61 A<13> S:PIN64 A<14> S:PIN66 A<16> S:PIN97 A<17> S:PIN95 A<18> S:PIN94 A<19> S:PIN92 A<1> S:PIN57 A<20> S:PIN91 A<21> S:PIN88 A<22> S:PIN87 A<23> S:PIN86 A<2> S:PIN54 A<3> S:PIN52 A<4> S:PIN50 A<5> S:PIN49 A<6> S:PIN51 A<7> S:PIN53 A<8> S:PIN56 BERR S:PIN98 C1 S:PIN103 C3 S:PIN102 CFIN S:PIN104 CP_IRQ S:PIN31 A<9> S:PIN58 A<10> S:PIN59 A<11> S:PIN60 LAN_INT S:PIN111 LDS S:PIN82 RESET S:PIN143 RW S:PIN83 UDS S:PIN81 A_LAN<0> S:PIN4 A_LAN<10> S:PIN138 A_LAN<11> S:PIN139 A_LAN<12> S:PIN137 A_LAN<13> S:PIN136 A_LAN<1> S:PIN3 A_LAN<2> S:PIN6 A_LAN<3> S:PIN5 A_LAN<4> S:PIN9 A_LAN<5> S:PIN7 A_LAN<6> S:PIN11 A_LAN<7> S:PIN10 A_LAN<8> S:PIN140 A_LAN<9> S:PIN142 CFOUT S:PIN105 CP_CS S:PIN34 CP_RD S:PIN71 CP_WE S:PIN70 DQ<0> S:PIN118 DQ<10> S:PIN129 DQ<11> S:PIN115 DQ<12> S:PIN130 DQ<13> S:PIN113 DQ<14> S:PIN131 DQ<15> S:PIN112 DQ<1> S:PIN117 DQ<2> S:PIN120 DQ<3> S:PIN119 DQ<4> S:PIN124 DQ<5> S:PIN121 DQ<6> S:PIN126 DQ<7> S:PIN125 DQ<8> S:PIN128 DQ<9> S:PIN116 D<0> S:PIN2 D<10> S:PIN41 D<11> S:PIN43 D<12> S:PIN44 D<13> S:PIN45 D<14> S:PIN46 D<15> S:PIN48 D<1> S:PIN17 D<2> S:PIN39 D<3> S:PIN15 D<4> S:PIN21 D<5> S:PIN20 D<6> S:PIN14 D<7> S:PIN16 D<8> S:PIN19 D<9> S:PIN40 IDE_A<0> S:PIN24 IDE_A<1> S:PIN26 IDE_A<2> S:PIN25 IDE_CS<0> S:PIN22 IDE_CS<1> S:PIN23 IDE_R S:PIN27 IDE_W S:PIN28 LAN_CS S:PIN133 LAN_CFG<2> S:PIN135 LAN_RD S:PIN134 LAN_WRH S:PIN132 LAN_WRL S:PIN76 ROM_B<1> S:PIN69 ROM_B<0> S:PIN68 OWN S:PIN107 LAN_CFG<4> S:PIN110 LAN_CFG<3> S:PIN13 LAN_CFG<1> S:PIN12 INT_OUT S:PIN32 DTACK S:PIN85 ROM_OE S:PIN35 SLAVE S:PIN106 ;The remaining section of the .gyd file is for documentation purposes only. ;It shows where your internal equations were placed in the last successful fit. PARTITION FB1_1 IDE_CS_1_OBUF D_7_IOBUFE D_1_IOBUFE IDE_A_2_OBUF$BUF0 D_8_IOBUFE D_5_IOBUFE IDE_BASEADR<4> D_4_IOBUFE IDE_CS_0_OBUF CP_BASEADR<7> IDE_A_0_OBUF$BUF0 IDE_A_1_OBUF$BUF0 CP_BASEADR<6> IDE_R_S IDE_W_S ROM_OE_S CP_BASEADR<5> CP_BASEADR<4> PARTITION FB2_1 A_LAN_9_OBUF CP_BASEADR<3> CP_BASEADR<2> A_LAN_0_OBUF D_0_IOBUFE A_LAN_1_OBUF CP_BASEADR<1> A_LAN_3_OBUF A_LAN_2_OBUF A_LAN_5_OBUF A_LAN_4_OBUF A_LAN_7_OBUF ROM_B_0_OBUF$BUF4 A_LAN_6_OBUF ROM_B_0_OBUF$BUF3 D_6_IOBUFE D_3_IOBUFE CP_BASEADR<0> PARTITION FB3_1 D_2_IOBUFE ROM_B_0_OBUF$BUF5 D_10_IOBUFE D_12_IOBUFE SLAVE_OBUF__$INT CP_CS_OBUF D_14_IOBUFE $OpTx$INV$99__$INT D_9_IOBUFE D_15_IOBUFE D_11_IOBUFE D_13_IOBUFE IDE_BASEADR<6> IDE_BASEADR<5> IDE_BASEADR<3> IDE_BASEADR<2> IDE_BASEADR<1> IDE_BASEADR<0> PARTITION FB4_1 DQ_0_IOBUFE$BUF0 DQ_6_IOBUFE$BUF0 LAN_CFG_2_OBUF SHUT_UP<2> DQ_8_IOBUFE$BUF0 DQ_10_IOBUFE$BUF0 LAN_BASEADR<6> DQ_12_IOBUFE$BUF0 DQ_14_IOBUFE$BUF0 LAN_CFG_2_OBUF$BUF0 LAN_WRH_OBUF LAN_RD_OBUF A_LAN_12_OBUF A_LAN_13_OBUF A_LAN_10_OBUF A_LAN_11_OBUF A_LAN_8_OBUF IDE_BASEADR<7> PARTITION FB5_1 SHUT_UP<1> SHUT_UP<0> AUTO_CONFIG_DONE_CYCLE<2> AUTO_CONFIG_DONE_CYCLE<1> AUTO_CONFIG_DONE_CYCLE<0> $OpTx$FX_DC$122 $OpTx$FX_DC$118 $OpTx$$OpTx$FX_DC$121_INV$1021 $OpTx$$OpTx$FX_DC$115_INV$1019 ROM_B_0_OBUF$BUF0 LAN_BASEADR<4> $OpTx$INV$98 CP_WE_OBUF $OpTx$FX_DC$123 Dout1<2> Dout1<1> ROM_B_0_OBUF Dout1<0> PARTITION FB6_1 LAN_BASEADR<7> SLAVE_OBUF LAN_BASEADR<5> LAN_BASEADR<3> ROM_B_0_OBUF$BUF2 DQ_15_IOBUFE$BUF0 LAN_BASEADR<2> DQ_13_IOBUFE$BUF0 DQ_9_IOBUFE$BUF0 DQ_11_IOBUFE$BUF0 DQ_3_IOBUFE$BUF0 DQ_2_IOBUFE$BUF0 LAN_BASEADR<1> DQ_5_IOBUFE$BUF0 DQ_4_IOBUFE$BUF0 DQ_1_IOBUFE$BUF0 DQ_7_IOBUFE$BUF0 LAN_BASEADR<0> PARTITION FB7_1 EXP10_ CP_RD_OBUF EXP11_ ide EXP12_ LAN_WRL_OBUF IDE_ENABLE AUTO_CONFIG_DONE<0> AUTO_CONFIG_DONE<1> AUTO_CONFIG_DONE<2> LAN_INT_ENABLE ROM_B_0_OBUF$BUF6 $OpTx$$OpTx$FX_DC$100_INV$1016 PARTITION FB7_16 autoconfig EXP13_ cp PARTITION FB8_1 lan EXP14_ $OpTx$$OpTx$FX_DC$117_INV$1020 $OpTx$$OpTx$FX_DC$108_INV$1018 $OpTx$$OpTx$FX_DC$106_INV$1017 SHUT_UP<2>/SHUT_UP<2>_CLKF ROM_B_0_OBUF$BUF5/ROM_B_0_OBUF$BUF5_TRST $OpTx$FX_DC$120 $OpTx$FX_DC$119 $OpTx$FX_DC$112 $OpTx$FX_DC$111 $OpTx$FX_DC$110 $OpTx$FX_DC$109 $OpTx$FX_DC$103 Dout1<3> ROM_B_0_OBUF$BUF1 CFOUT_OBUF EXP15_