Dominick.Vansevenant/Zorro-LAN-IDE
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Resolved merge mess

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This commit is contained in:
MHeinrichs
2020-10-09 22:02:01 +02:00
parent 74dac57258
commit fdde3273e8
4 changed files with 1396 additions and 3015 deletions
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Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd
-24
View File
@@ -439,11 +439,7 @@ begin
elsif(AUTO_CONFIG_DONE = 1)then elsif(AUTO_CONFIG_DONE = 1)then
CP_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress CP_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress
SHUT_UP(1) <= '0'; --enable board SHUT_UP(1) <= '0'; --enable board
<<<<<<< HEAD
AUTO_CONFIG_DONE_CYCLE <= ('1' & not(AUTOBOOT_OFF)); --done here, if Autoboot = 1 skip ide part! AUTO_CONFIG_DONE_CYCLE <= ('1' & not(AUTOBOOT_OFF)); --done here, if Autoboot = 1 skip ide part!
=======
AUTO_CONFIG_DONE_CYCLE <= '1' & not AUTOBOOT_OFF; --done here, if Autoboot = 1 skip ide part!
>>>>>>> 85a06c170160536d7bbf493fc16ea4577085778e
elsif(AUTO_CONFIG_DONE = 2)then elsif(AUTO_CONFIG_DONE = 2)then
IDE_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress IDE_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress
SHUT_UP(2) <= '0'; --enable board SHUT_UP(2) <= '0'; --enable board
@@ -471,25 +467,10 @@ begin
CP_CS <= not cp; CP_CS <= not cp;
--the lanport is shifted by one adress line but I forgot to adopt the clockport address! --the lanport is shifted by one adress line but I forgot to adopt the clockport address!
<<<<<<< HEAD
A_LAN(13 downto 0)<= LAN_A_CLRREG(13 downto 0) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else A_LAN(13 downto 0)<= LAN_A_CLRREG(13 downto 0) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
LAN_A_SETREG(13 downto 0) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else LAN_A_SETREG(13 downto 0) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
A(14 downto 1) when lan_adr ='1' else A(14 downto 1) when lan_adr ='1' else
A(12 downto 1) &"00"; A(12 downto 1) &"00";
=======
A_LAN(13 downto 6)<= LAN_A_CLRREG(13 downto 6) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
LAN_A_SETREG(13 downto 6) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
--(A(14)&A(12)&A(13)&A(11 downto 7)); --swap A12/13 for the enj-Chip
A(14 downto 7);
A_LAN(5 downto 2) <= LAN_A_CLRREG(5 downto 2) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
LAN_A_SETREG(5 downto 2) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
-- A(5 downto 2) when cp='1' else A(6 downto 3); --mux the clock-port adresses!
A(4 downto 1) when cp='1' else A(6 downto 3); --mux the clock-port adresses! (shifted 1 down due to V2 bug)
A_LAN(1 downto 0)<= LAN_A_CLRREG(1 downto 0) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
LAN_A_SETREG(1 downto 0) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
A(2 downto 1);
>>>>>>> 85a06c170160536d7bbf493fc16ea4577085778e
@@ -517,12 +498,7 @@ begin
IDE_CS(1)<= not(A(13)); IDE_CS(1)<= not(A(13));
IDE_A(2 downto 0) <= A(11 downto 9); IDE_A(2 downto 0) <= A(11 downto 9);
ROM_B <= "00"; ROM_B <= "00";
<<<<<<< HEAD
ROM_OE <= ROM_OE_S when AS='0' else '1'; ROM_OE <= ROM_OE_S when AS='0' else '1';
=======
-- ROM_OE <= ROM_OE_S when AS='0' and AUTOBOOT_OFF = '0' else '1';
ROM_OE <= ROM_OE_S when AS='0' else '1';
>>>>>>> 85a06c170160536d7bbf493fc16ea4577085778e
-- INT_OUT <= 'Z'; -- INT_OUT <= 'Z';
INT2_OUT <= '0' when INT2_OUT <= '0' when
Logic/LAN_IDE_V2/LAN_IDE_CP-z2v2.jed
+1385 -2976
View File
File diff suppressed because it is too large Load Diff
Logic/LAN_IDE_V2/LAN_IDEz2v2.gise
+10 -15
View File
@@ -68,7 +68,7 @@
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
</transform> </transform>
<transform xil_pn:end_ts="1602193494" xil_pn:in_ck="-8368315473908605201" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="-5742752562858310575" xil_pn:start_ts="1602193490"> <transform xil_pn:end_ts="1602273516" xil_pn:in_ck="-8368315473908605201" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="-5742752562858310575" xil_pn:start_ts="1602273511">
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/> <status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
@@ -89,7 +89,7 @@
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
</transform> </transform>
<transform xil_pn:end_ts="1602193498" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1602193494"> <transform xil_pn:end_ts="1602273519" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1602273516">
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
<outfile xil_pn:name="LAN_IDE_CP.bld"/> <outfile xil_pn:name="LAN_IDE_CP.bld"/>
@@ -98,7 +98,7 @@
<outfile xil_pn:name="_ngo"/> <outfile xil_pn:name="_ngo"/>
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/> <outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
</transform> </transform>
<transform xil_pn:end_ts="1602193522" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-9118991997326562509" xil_pn:start_ts="1602193498"> <transform xil_pn:end_ts="1602273545" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-9118991997326562509" xil_pn:start_ts="1602273519">
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/> <status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
@@ -116,29 +116,24 @@
<outfile xil_pn:name="LAN_IDE_CP_html"/> <outfile xil_pn:name="LAN_IDE_CP_html"/>
<outfile xil_pn:name="LAN_IDE_CP_pad.csv"/> <outfile xil_pn:name="LAN_IDE_CP_pad.csv"/>
</transform> </transform>
<transform xil_pn:end_ts="1602195303" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1602195301"> <transform xil_pn:end_ts="1602273546" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1602273545">
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForOutputs"/> <outfile xil_pn:name="LAN_IDE_CP.jed"/>
<status xil_pn:value="OutputRemoved"/>
</transform> </transform>
<transform xil_pn:end_ts="1602023829" xil_pn:in_ck="-2520376148396285089" xil_pn:name="TRAN_impactProgrammingTool_CPLD" xil_pn:prop_ck="-3598488201878296819" xil_pn:start_ts="1602023829"> <transform xil_pn:end_ts="1602023829" xil_pn:in_ck="-2520376148396285089" xil_pn:name="TRAN_impactProgrammingTool_CPLD" xil_pn:prop_ck="-3598488201878296819" xil_pn:start_ts="1602023829">
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="NotReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForInputs"/> <status xil_pn:value="OutOfDateForInputs"/>
<status xil_pn:value="OutOfDateForPredecessor"/> <status xil_pn:value="OutOfDateForProperties"/>
<status xil_pn:value="InputAdded"/> <status xil_pn:value="InputAdded"/>
<status xil_pn:value="InputChanged"/> <status xil_pn:value="InputChanged"/>
<status xil_pn:value="InputRemoved"/> <status xil_pn:value="InputRemoved"/>
</transform> </transform>
<transform xil_pn:end_ts="1545595676" xil_pn:in_ck="-2520376148396285089" xil_pn:name="TRAN_configureTargetDevice_CPLD" xil_pn:prop_ck="-154879694275837835" xil_pn:start_ts="1545595673"> <transform xil_pn:end_ts="1602273571" xil_pn:in_ck="-2520376148396285089" xil_pn:name="TRAN_configureTargetDevice_CPLD" xil_pn:prop_ck="-154879694275837835" xil_pn:start_ts="1602273568">
<status xil_pn:value="SuccessfullyRun"/> <status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="NotReadyToRun"/> <status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForInputs"/> <status xil_pn:value="OutOfDateForProperties"/>
<status xil_pn:value="OutOfDateForPredecessor"/>
<status xil_pn:value="InputAdded"/>
<status xil_pn:value="InputChanged"/>
<status xil_pn:value="InputRemoved"/>
</transform> </transform>
<transform xil_pn:name="TRAN_timRpt"> <transform xil_pn:name="TRAN_timRpt">
<status xil_pn:value="AbortedRun"/> <status xil_pn:value="AbortedRun"/>
Logic/LAN_IDE_V2/LAN_IDEz2v2.xise
+1
View File
@@ -209,6 +209,7 @@
<property xil_pn:name="WYSIWYG" xil_pn:value="None" xil_pn:valueState="default"/> <property xil_pn:name="WYSIWYG" xil_pn:value="None" xil_pn:valueState="default"/>
<property xil_pn:name="Working Directory" xil_pn:value="." xil_pn:valueState="non-default"/> <property xil_pn:name="Working Directory" xil_pn:value="." xil_pn:valueState="non-default"/>
<property xil_pn:name="XOR Preserve" xil_pn:value="true" xil_pn:valueState="default"/> <property xil_pn:name="XOR Preserve" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="iMPACT Project File" xil_pn:value="ZORO_LAN_IDE_Z2.ipf" xil_pn:valueState="non-default"/>
<!-- --> <!-- -->
<!-- The following properties are for internal use only. These should not be modified.--> <!-- The following properties are for internal use only. These should not be modified.-->
<!-- --> <!-- -->