Dominick.Vansevenant/Zorro-LAN-IDE
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IDE and CP working in z2-mode

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This commit is contained in:
MHeinrichs
2019-01-03 00:11:33 +01:00
parent d11d1c5b27
commit eecd6c8918
27 changed files with 20625 additions and 14418 deletions
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Driver/baxnet/source/putty-bad2.log
BIN
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Binary file not shown.
Logic/LAN_IDE/LAN_IDE_CP.bld
+2 -2
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@@ -29,10 +29,10 @@ NGDBUILD Design Results Summary:
Number of errors: 0 Number of errors: 0
Number of warnings: 0 Number of warnings: 0
Total memory usage is 4418724 kilobytes Total memory usage is 4418736 kilobytes
Writing NGD file "LAN_IDE_CP.ngd" ... Writing NGD file "LAN_IDE_CP.ngd" ...
Total REAL time to NGDBUILD completion: 6 sec Total REAL time to NGDBUILD completion: 5 sec
Total CPU time to NGDBUILD completion: 5 sec Total CPU time to NGDBUILD completion: 5 sec
Writing NGDBUILD log file "LAN_IDE_CP.bld"... Writing NGDBUILD log file "LAN_IDE_CP.bld"...
Logic/LAN_IDE/LAN_IDE_CP.cmd_log
+9
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@@ -356,3 +356,12 @@ cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
Logic/LAN_IDE/LAN_IDE_CP.gyd
+80 -76
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@@ -2,6 +2,7 @@ Pin Freeze File: version P.20131013
95288XL144 XC95288XL-10-TQ144 95288XL144 XC95288XL-10-TQ144
AS S:PIN80 AS S:PIN80
AUTOBOOT_OFF S:PIN75
A<1> S:PIN57 A<1> S:PIN57
A<2> S:PIN54 A<2> S:PIN54
A<3> S:PIN52 A<3> S:PIN52
@@ -14,6 +15,7 @@ C1 S:PIN103
C3 S:PIN102 C3 S:PIN102
CFIN S:PIN104 CFIN S:PIN104
CLK_EXT S:PIN30 CLK_EXT S:PIN30
CP_IRQ S:PIN31
DS0 S:PIN93 DS0 S:PIN93
DS1 S:PIN78 DS1 S:PIN78
FCS S:PIN77 FCS S:PIN77
@@ -38,9 +40,9 @@ A_LAN<7> S:PIN10
A_LAN<8> S:PIN140 A_LAN<8> S:PIN140
A_LAN<9> S:PIN142 A_LAN<9> S:PIN142
CFOUT S:PIN105 CFOUT S:PIN105
CP_WE S:PIN70
CP_RD S:PIN71
CP_CS S:PIN34 CP_CS S:PIN34
CP_RD S:PIN71
CP_WE S:PIN70
DQ<0> S:PIN118 DQ<0> S:PIN118
DQ<10> S:PIN129 DQ<10> S:PIN129
DQ<11> S:PIN115 DQ<11> S:PIN115
@@ -118,83 +120,85 @@ A<23> S:PIN86
;The remaining section of the .gyd file is for documentation purposes only. ;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit. ;It shows where your internal equations were placed in the last successful fit.
PARTITION FB1_1 $OpTx$FX_DC$16 DQ_5_IOBUFE/DQ_5_IOBUFE_TRST Z3_ADR<9> Z3_ADR<10> PARTITION FB1_1 DQ_DATA<11> LAN_SM_FSM_FFd2 EXP22_
D_5_IOBUFE D_4_IOBUFE IDE_ACCESS IDE_CS_0_OBUF PARTITION FB1_5 D_5_IOBUFE D_4_IOBUFE
LAN_ACCESS IDE_CS_1_OBUF IDE_ENABLE IDE_A_0_OBUF$BUF0 PARTITION FB1_8 IDE_CS_0_OBUF Z3_A_LOW IDE_CS_1_OBUF LAN_SM_FSM_FFd3
D_9_IOBUFE/D_9_IOBUFE_TRST IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0 DQ_SWAP IDE_A_0_OBUF$BUF0 DQ_DATA<3> IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0
IDE_R_OBUF LAN_INT_ENABLE DQ_DATA<12> IDE_R_OBUF EXP23_
PARTITION FB2_1 SHUT_UP A_LAN_4_OBUF A_LAN_7_OBUF LAN_BASEADR<9> PARTITION FB2_1 LAN_BASEADR<1> A_LAN_4_OBUF A_LAN_7_OBUF LAN_BASEADR<15>
A_LAN_6_OBUF ROM_B_0_OBUF$BUF7 LAN_BASEADR<14> ROM_B_0_OBUF$BUF5 A_LAN_6_OBUF ROM_B_0_OBUF$BUF7 LAN_BASEADR<14> ROM_B_0_OBUF$BUF5
LAN_BASEADR<13> D_6_IOBUFE LAN_BASEADR<12> D_3_IOBUFE LAN_BASEADR<13> D_6_IOBUFE LAN_BASEADR<12> D_3_IOBUFE
LAN_BASEADR<11> D_7_IOBUFE D_1_IOBUFE LAN_BASEADR<10> LAN_BASEADR<11> D_7_IOBUFE D_1_IOBUFE LAN_BASEADR<10>
D_8_IOBUFE LAN_BASEADR<0> D_8_IOBUFE LAN_BASEADR<0>
PARTITION FB3_2 IDE_W_OBUF PARTITION FB3_1 $OpTx$INV$215 IDE_W_OBUF EXP24_
PARTITION FB3_14 ROM_B_0_OBUF$BUF8 PARTITION FB3_9 SHUT_UP_Z2<1>/SHUT_UP_Z2<1>_CLKF ROM_B_0_OBUF$BUF9/ROM_B_0_OBUF$BUF9_TRST__$INT ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST CP_WE_QUIRK
Z3_ADR<9> ROM_B_0_OBUF$BUF8 Z3_ADR<8> Z3_ADR<7>
PARTITION FB4_1 D_Z2_OUT<0> D_0_IOBUFE $OpTx$FX_DC$34 D_Z2_OUT<3> Z3_ADR<6> EXP25_
A_LAN_1_OBUF A_LAN_0_OBUF D_Z2_OUT<2> A_LAN_3_OBUF PARTITION FB4_1 D_OUT<7> D_0_IOBUFE D_OUT<3> D_OUT<0>
AUTO_CONFIG_Z2_DONE_CYCLE<0> CP_BASEADR<6> AUTO_CONFIG_Z2_DONE_CYCLE<1> A_LAN_2_OBUF A_LAN_1_OBUF A_LAN_0_OBUF D_OUT<2> A_LAN_3_OBUF
BUF_D_Z2_OUT<2> A_LAN_5_OBUF BUF_D_Z2_OUT<3> D_Z2_OUT<1> D_OUT<6> D_OUT<5> D_OUT<4> A_LAN_2_OBUF
EXP22_ $OpTx$FX_DC$35 D_OUT<1> A_LAN_5_OBUF IDE_BASEADR<3> IDE_BASEADR<2>
PARTITION FB5_1 LAN_BASEADR<8> CP_WE_OBUF$BUF1 LAN_BASEADR<7> LAN_BASEADR<6> IDE_BASEADR<1> IDE_BASEADR<0>
ROM_OE_OBUF LAN_BASEADR<5> LAN_BASEADR<4> LAN_BASEADR<3> PARTITION FB5_1 EXP26_ CP_CS_OBUF EXP27_ $OpTx$FX_DC$107
LAN_BASEADR<2> D_2_IOBUFE LAN_BASEADR<1> D_9_IOBUFE ROM_OE_OBUF Z3_ADR<10> AUTOCONFIG_Z2_ACCESS $OpTx$FX_DC$117__$INT
LAN_BASEADR<15> D_10_IOBUFE D_11_IOBUFE D_OUT<6> D_9_IOBUFE/D_9_IOBUFE_TRST__$INT D_2_IOBUFE EXP28_ D_9_IOBUFE
D_12_IOBUFE D_OUT<5> EXP29_ D_10_IOBUFE D_11_IOBUFE EXP30_
PARTITION FB6_2 ROM_B_0_OBUF$BUF6 A_LAN_12_OBUF $OpTx$FX_DC$57 A_LAN_13_OBUF D_12_IOBUFE ROM_B_0_OBUF$BUF2/ROM_B_0_OBUF$BUF2_TRST
A_LAN_10_OBUF $OpTx$FX_DC$37 A_LAN_11_OBUF $OpTx$FX_DC$12 PARTITION FB6_1 LAN_A_INIT<3> ROM_B_0_OBUF$BUF6 A_LAN_12_OBUF LAN_IRQ_D0
A_LAN_8_OBUF $OpTx$FX_DC$10 SHUT_UP_Z2<1>/SHUT_UP_Z2<1>_CLKF LAN_READY A_LAN_13_OBUF A_LAN_10_OBUF LAN_WR_RST A_LAN_11_OBUF
A_LAN_9_OBUF $OpTx$FX_DC$63 $OpTx$FX_DC$62 $OpTx$FX_DC$61 LAN_RST_SM_FSM_FFd3 A_LAN_8_OBUF LAN_RST_SM_FSM_FFd2 LAN_RST_SM_FSM_FFd1
$OpTx$FX_DC$60 LAN_IRQ_OUT A_LAN_9_OBUF LAN_D_INIT<8> LAN_D_INIT<1>
PARTITION FB7_1 CP_ACCESS EXP23_ D_13_IOBUFE EXP24_ LAN_CS_RST LAN_A_INIT<6>
D_14_IOBUFE PARTITION FB7_1 LAN_SM_RST EXP31_ D_13_IOBUFE AUTO_CONFIG_DONE_CYCLE
PARTITION FB7_10 SHUT_UP_Z2<0> CP_BASEADR<5> D_15_IOBUFE CP_BASEADR<4> D_14_IOBUFE EXP32_ SHUT_UP LAN_BASEADR<2>
CP_BASEADR<3> CP_BASEADR<2> CP_BASEADR<1> CP_BASEADR<0> LAN_BASEADR<3> LAN_BASEADR<4> LAN_BASEADR<5> D_15_IOBUFE
EXP25_ EXP33_ LAN_BASEADR<6> LAN_BASEADR<7> LAN_INT_ENABLE
PARTITION FB8_1 $OpTx$FX_DC$59 DQ_12_IOBUFE DQ_14_IOBUFE SHUT_UP_Z2<1> LAN_BASEADR<8> LAN_BASEADR<9>
LAN_WRH_OBUF IDE_BASEADR<7> IDE_BASEADR<6> LAN_CS_OBUF PARTITION FB8_1 EXP34_ DQ_12_IOBUFE DQ_14_IOBUFE
IDE_BASEADR<5> LAN_RD_OBUF IDE_BASEADR<4> IDE_BASEADR<3> PARTITION FB8_5 LAN_WRH_OBUF
IDE_BASEADR<2> IDE_BASEADR<1> IDE_BASEADR<0> CP_BASEADR<7> PARTITION FB8_8 LAN_CS_OBUF
EXP26_ BUF_IDE_ACCESS PARTITION FB8_10 LAN_RD_OBUF
PARTITION FB9_1 DQ_DATA<13> DQ_DATA<14> DQ_DATA<15> DQ_DATA<5> PARTITION FB8_13 Z3_ADR<13> AUTOCONFIG_Z3_ACCESS AUTO_CONFIG_Z2_DONE<1> AUTO_CONFIG_Z2_DONE<0>
DQ_DATA<6> DQ_DATA<7> $OpTx$INV$5 Z3_ADR<11> EXP35_ IDE_ACCESS
Z3_ADR<12> Z3_ADR<13> Z3_DATA<0> $OpTx$FX_DC$44 PARTITION FB9_1 EXP36_ DQ_SWAP EXP37_ Z3_ADR<12>
LAN_A_INIT<3> Z3_DATA<1> Z3_ADR<11> ROM_OE_S CONFIG_READY EXP38_
PARTITION FB9_17 Z3_DATA<2> EXP27_ LAN_ACCESS EXP39_ Z3_DATA<0> IDE_W_S
PARTITION FB10_2 DQ_1_IOBUFE DQ_0_IOBUFE IDE_R_S Z3_DATA<1> IDE_ENABLE AUTO_CONFIG_DONE
PARTITION FB10_5 DQ_3_IOBUFE DQ_2_IOBUFE Z3_DATA<2> EXP40_
PARTITION FB10_8 DQ_5_IOBUFE PARTITION FB10_1 Z3_ADR<2> DQ_1_IOBUFE DQ_0_IOBUFE IDE_BASEADR<7>
PARTITION FB10_10 DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE AUTOCONFIG_Z3_ACCESS DQ_3_IOBUFE DQ_2_IOBUFE IDE_BASEADR<6> DQ_5_IOBUFE
DQ_8_IOBUFE AUTO_CONFIG_Z2_DONE<1> AUTO_CONFIG_Z2_DONE<0> DQ_10_IOBUFE IDE_BASEADR<5> DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE
AUTOCONFIG_Z2_ACCESS IDE_BASEADR<4> DQ_8_IOBUFE CP_BASEADR<6> CP_BASEADR<5>
PARTITION FB11_1 Z3_DATA<30> Z3_DATA<29> Z3_DATA<3> Z3_DATA<22> DQ_10_IOBUFE CP_BASEADR<4>
Z3_DATA<4> Z3_DATA<21> LAN_SM_FSM_FFd4 LAN_SM_FSM_FFd2 PARTITION FB11_1 Z3_DATA<30> Z3_DATA<29> Z3_DATA<3> Z3_DATA<28>
LAN_RD_S Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF0 Z3_DATA<4> Z3_DATA<27> Z3_DATA<22> Z3_DATA<21>
LAN_SM_FSM_FFd1 ROM_B_0_OBUF DQ_DATA<8> DQ_DATA<10> Z3_DATA<20> Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF0
Z3_DATA<19> ROM_B_0_OBUF EXP41_ DQ_DATA<8>
CP_WE_OBUF DQ_DATA<0> CP_WE_OBUF DQ_DATA<0>
PARTITION FB12_1 LAN_SM_RST ROM_B_0_OBUF$BUF4 LAN_IRQ_D0 LAN_D_INIT<8> PARTITION FB12_1 Z3_ADR_1 ROM_B_0_OBUF$BUF4 D_Z2_OUT<2> EXP42_
DQ_15_IOBUFE LAN_D_INIT<1> LAN_A_INIT<6> DQ_13_IOBUFE DQ_15_IOBUFE D_Z2_OUT<3> EXP43_ DQ_13_IOBUFE
CONFIG_READY DQ_11_IOBUFE BUF_LAN_D_INIT<1> DQ_9_IOBUFE CP_WE_S DQ_11_IOBUFE Z3_ADR<3> DQ_9_IOBUFE
LAN_WR_RST LAN_RST_SM_FSM_FFd3 LAN_RST_SM_FSM_FFd2 LAN_RST_SM_FSM_FFd1 Z3_ADR<4> Z3_ADR<5> EXP44_ D_Z2_OUT<1>
LAN_IRQ_OUT LAN_CS_RST EXP45_ Z3_ADR_0
PARTITION FB13_1 EXP28_ CP_WE_OBUF$BUF0 PARTITION FB13_1 EXP46_ CP_RD_OBUF Z3_DATA<31> EXP47_
PARTITION FB13_4 D_OUT<7> D_OUT<3> D_OUT<0> Z3_ADR<8> LAN_SM_FSM_FFd1 EXP48_ DQ_DATA<6> Z3_DATA<7>
Z3_DATA<7> Z3_ADR<7> D_OUT<2> AUTO_CONFIG_DONE_CYCLE Z3_DATA<23> EXP49_ EXP50_ DQ_DATA<5>
AUTO_CONFIG_DONE D_OUT<4> LAN_WRL_OBUF D_OUT<1> DQ_DATA<15> LAN_WRL_OBUF DQ_DATA<14> EXP51_
DQ_DATA<9> DQ_DATA<2> DQ_DATA<1> EXP52_ DQ_DATA<13>
PARTITION FB14_1 $OpTx$INV$4 BUF_CONFIG_READY ROM_B_0_OBUF$BUF2 $OpTx$FX_DC$49 PARTITION FB14_1 CP_BASEADR<3> SHUT_UP_Z2<0> ROM_B_0_OBUF$BUF2 AUTO_CONFIG_Z2_DONE_CYCLE<1>
ROM_B_0_OBUF$BUF9/ROM_B_0_OBUF$BUF9_TRST ROM_B_0_OBUF$BUF2/ROM_B_0_OBUF$BUF2_TRST $OpTx$FX_DC$50 Z3_ADR_1 AUTO_CONFIG_Z2_DONE_CYCLE<0> CP_BASEADR<7> EXP53_ CP_BASEADR<2>
Z3_ADR_0 Z3_ADR<6> CFOUT_OBUF Z3_ADR<5> CP_BASEADR<1> CP_BASEADR<0> CFOUT_OBUF D_Z2_OUT<0>
Z3_ADR<4> SLAVE_OBUF ROM_B_0_OBUF$BUF1 Z3_ADR<3> EXP54_ SLAVE_OBUF ROM_B_0_OBUF$BUF1 SHUT_UP_Z2<1>
Z3_ADR<2> EXP29_
PARTITION FB15_1 DQ_DATA<11> DQ_DATA<12> DQ_DATA<3> DQ_DATA<4> PARTITION FB14_18 EXP55_
BUF_LAN_READY Z3_DATA<23> Z3_DATA<31> LAN_WRH_S PARTITION FB15_1 DQ_DATA<1> EXP56_ CP_RD_S LAN_SM_FSM_FFd4
LAN_WRL_S $OpTx$FX_DC$30 $OpTx$FX_DC$36 ROM_B_0_OBUF$BUF9 DQ_DATA<9> EXP57_ LAN_WRH_S EXP58_
$OpTx$FX_SC$31 Z3_DATA<15> Z3_DATA<14> $OpTx$FX_SC$66 EXP59_ DQ_DATA<7> DQ_DATA<4> ROM_B_0_OBUF$BUF9
Z3_DATA<13> Z3_DATA<9>/Z3_DATA<9>_TRST LAN_RD_S Z3_DATA<15> Z3_DATA<14> LAN_READY
PARTITION FB16_1 Z3_DATA<28> Z3_DATA<12> Z3_DATA<11> Z3_DATA<27> Z3_DATA<13> LAN_WRL_S
Z3_DATA<26> Z3_DATA<10> Z3_DATA<25> Z3_DATA<9> PARTITION FB16_1 EXP60_ Z3_DATA<12> Z3_DATA<11>
Z3_DATA<24> ROM_B_0_OBUF$BUF3 Z3_DATA<8> Z3_DATA<20> PARTITION FB16_5 Z3_DATA<26> Z3_DATA<10> Z3_DATA<25> Z3_DATA<9>
Z3_DATA<19> Z3_DATA<17> Z3_DATA<16> Z3_A_LOW Z3_DATA<24> ROM_B_0_OBUF$BUF3 Z3_DATA<8> Z3_DATA<18>
LAN_SM_FSM_FFd3 Z3_DATA<18> Z3_DATA<17> Z3_DATA<16> EXP61_ DQ_DATA<10>
DQ_DATA<2> EXP62_
Logic/LAN_IDE/LAN_IDE_CP.jed
+1435 -1435
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File diff suppressed because it is too large Load Diff
Logic/LAN_IDE/LAN_IDE_CP.mfd
+3546 -1991
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File diff suppressed because it is too large Load Diff
Logic/LAN_IDE/LAN_IDE_CP.nga
+1 -1
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File diff suppressed because one or more lines are too long
Logic/LAN_IDE/LAN_IDE_CP.ngc
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.ngd
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.ngr
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.pad
+3 -3
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@@ -1,7 +1,7 @@
Release 8.1i - Fit P.20131013 Release 8.1i - Fit P.20131013
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
1- 2-2019 10:08PM 1- 3-2019 0:09AM
NOTE: This file is designed to be imported into a spreadsheet program NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The pipe '|' such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
@@ -48,7 +48,7 @@ P27|IDE_R|O|I/O|OUTPUT|||||||||
P28|IDE_W|O|I/O|OUTPUT||||||||| P28|IDE_W|O|I/O|OUTPUT|||||||||
P29|GND||GND|||||||||| P29|GND||GND||||||||||
P30|CLK_EXT|GCK|I/O/GCK1|||||||||| P30|CLK_EXT|GCK|I/O/GCK1||||||||||
P31|TIE||I/O|||||||||| P31|CP_IRQ|I|I/O|INPUT|||||||||
P32|INT_OUT|O|I/O/GCK2|OUTPUT||||||||| P32|INT_OUT|O|I/O/GCK2|OUTPUT|||||||||
P33|TIE||I/O|||||||||| P33|TIE||I/O||||||||||
P34|CP_CS|O|I/O|OUTPUT||||||||| P34|CP_CS|O|I/O|OUTPUT|||||||||
@@ -92,7 +92,7 @@ P71|CP_RD|O|I/O|OUTPUT|||||||||
P72|GND||GND|||||||||| P72|GND||GND||||||||||
P73|VCC||VCCIO|||||||||| P73|VCC||VCCIO||||||||||
P74|A<15>|I/O|I/O|BIDIR||||||||| P74|A<15>|I/O|I/O|BIDIR|||||||||
P75|TIE||I/O|||||||||| P75|AUTOBOOT_OFF|I|I/O|INPUT|||||||||
P76|LAN_WRL|O|I/O|OUTPUT||||||||| P76|LAN_WRL|O|I/O|OUTPUT|||||||||
P77|FCS|I|I/O|INPUT||||||||| P77|FCS|I|I/O|INPUT|||||||||
P78|DS1|I|I/O|INPUT||||||||| P78|DS1|I|I/O|INPUT|||||||||
Logic/LAN_IDE/LAN_IDE_CP.pnx
+1 -1
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Logic/LAN_IDE/LAN_IDE_CP.rpt
+1952 -1516
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File diff suppressed because it is too large Load Diff
Logic/LAN_IDE/LAN_IDE_CP.syr
+58 -56
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@@ -110,8 +110,6 @@ INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP>
Synthesizing Unit <LAN_IDE_CP>. Synthesizing Unit <LAN_IDE_CP>.
Related source file is "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd". Related source file is "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd".
WARNING:Xst:647 - Input <IDE_WAIT> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <IDE_WAIT> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <AUTOBOOT_OFF> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <CP_IRQ> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <MTCR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <MTCR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>. INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
Found finite state machine <FSM_0> for signal <LAN_SM>. Found finite state machine <FSM_0> for signal <LAN_SM>.
@@ -167,7 +165,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
Found 1-bit tristate buffer for signal <A<10>>. Found 1-bit tristate buffer for signal <A<10>>.
Found 1-bit tristate buffer for signal <A<9>>. Found 1-bit tristate buffer for signal <A<9>>.
Found 1-bit tristate buffer for signal <A<8>>. Found 1-bit tristate buffer for signal <A<8>>.
Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 173. Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 181.
Found 1-bit register for signal <AUTO_CONFIG_DONE>. Found 1-bit register for signal <AUTO_CONFIG_DONE>.
Found 1-bit register for signal <AUTO_CONFIG_DONE_CYCLE>. Found 1-bit register for signal <AUTO_CONFIG_DONE_CYCLE>.
Found 2-bit register for signal <AUTO_CONFIG_Z2_DONE>. Found 2-bit register for signal <AUTO_CONFIG_Z2_DONE>.
@@ -176,22 +174,26 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
Found 1-bit register for signal <AUTOCONFIG_Z3_ACCESS>. Found 1-bit register for signal <AUTOCONFIG_Z3_ACCESS>.
Found 1-bit register for signal <CONFIG_READY>. Found 1-bit register for signal <CONFIG_READY>.
Found 1-bit register for signal <CP_ACCESS>. Found 1-bit register for signal <CP_ACCESS>.
Found 8-bit comparator equal for signal <CP_ACCESS$cmp_eq0000> created at line 290. Found 8-bit comparator equal for signal <CP_ACCESS$cmp_eq0000> created at line 297.
Found 8-bit register for signal <CP_BASEADR>. Found 8-bit register for signal <CP_BASEADR>.
Found 1-bit register for signal <CP_RD_S>.
Found 1-bit register for signal <CP_WE_QUIRK>.
Found 1-bit register for signal <CP_WE_S>.
Found 8-bit register for signal <D_OUT>. Found 8-bit register for signal <D_OUT>.
Found 4-bit register for signal <D_Z2_OUT>. Found 4-bit register for signal <D_Z2_OUT>.
Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 669. Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 675.
Found 16-bit register for signal <DQ_DATA>. Found 16-bit register for signal <DQ_DATA>.
Found 1-bit register for signal <DQ_SWAP>. Found 1-bit register for signal <DQ_SWAP>.
Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 261. Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 269.
Found 1-bit register for signal <IDE_ACCESS>. Found 1-bit register for signal <IDE_ACCESS>.
Found 8-bit comparator equal for signal <IDE_ACCESS$cmp_eq0000> created at line 297. Found 8-bit comparator equal for signal <IDE_ACCESS$cmp_eq0000> created at line 304.
Found 8-bit register for signal <IDE_BASEADR>. Found 8-bit register for signal <IDE_BASEADR>.
Found 1-bit register for signal <IDE_ENABLE>. Found 1-bit register for signal <IDE_ENABLE>.
Found 8-bit comparator equal for signal <IDE_ENABLE$cmp_eq0000> created at line 297. Found 1-bit register for signal <IDE_R_S>.
Found 1-bit register for signal <IDE_W_S>.
Found 14-bit register for signal <LAN_A_INIT>. Found 14-bit register for signal <LAN_A_INIT>.
Found 1-bit register for signal <LAN_ACCESS>. Found 1-bit register for signal <LAN_ACCESS>.
Found 16-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 260. Found 16-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 268.
Found 16-bit register for signal <LAN_BASEADR>. Found 16-bit register for signal <LAN_BASEADR>.
Found 1-bit register for signal <LAN_CS_RST>. Found 1-bit register for signal <LAN_CS_RST>.
Found 16-bit register for signal <LAN_D_INIT>. Found 16-bit register for signal <LAN_D_INIT>.
@@ -200,11 +202,12 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
Found 1-bit register for signal <LAN_IRQ_OUT>. Found 1-bit register for signal <LAN_IRQ_OUT>.
Found 1-bit register for signal <LAN_RD_S>. Found 1-bit register for signal <LAN_RD_S>.
Found 1-bit register for signal <LAN_READY>. Found 1-bit register for signal <LAN_READY>.
Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 405. Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 411.
Found 1-bit register for signal <LAN_SM_RST>. Found 1-bit register for signal <LAN_SM_RST>.
Found 1-bit register for signal <LAN_WR_RST>. Found 1-bit register for signal <LAN_WR_RST>.
Found 1-bit register for signal <LAN_WRH_S>. Found 1-bit register for signal <LAN_WRH_S>.
Found 1-bit register for signal <LAN_WRL_S>. Found 1-bit register for signal <LAN_WRL_S>.
Found 1-bit register for signal <ROM_OE_S>.
Found 1-bit register for signal <SHUT_UP>. Found 1-bit register for signal <SHUT_UP>.
Found 2-bit register for signal <SHUT_UP_Z2>. Found 2-bit register for signal <SHUT_UP_Z2>.
Found 1-bit register for signal <Z3_A_LOW>. Found 1-bit register for signal <Z3_A_LOW>.
@@ -213,8 +216,8 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
Summary: Summary:
inferred 2 Finite State Machine(s). inferred 2 Finite State Machine(s).
inferred 1 ROM(s). inferred 1 ROM(s).
inferred 57 D-type flip-flop(s). inferred 61 D-type flip-flop(s).
inferred 7 Comparator(s). inferred 6 Comparator(s).
inferred 1 Xor(s). inferred 1 Xor(s).
inferred 57 Tristate(s). inferred 57 Tristate(s).
Unit <LAN_IDE_CP> synthesized. Unit <LAN_IDE_CP> synthesized.
@@ -226,18 +229,18 @@ HDL Synthesis Report
Macro Statistics Macro Statistics
# ROMs : 1 # ROMs : 1
16x8-bit ROM : 1 16x8-bit ROM : 1
# Registers : 68 # Registers : 74
1-bit register : 58 1-bit register : 64
14-bit register : 2 14-bit register : 2
16-bit register : 3 16-bit register : 3
2-bit register : 1 2-bit register : 1
4-bit register : 1 4-bit register : 1
8-bit register : 3 8-bit register : 3
# Comparators : 7 # Comparators : 6
16-bit comparator equal : 1 16-bit comparator equal : 1
2-bit comparator less : 2 2-bit comparator less : 2
4-bit comparator less : 1 4-bit comparator less : 1
8-bit comparator equal : 3 8-bit comparator equal : 2
# Tristates : 27 # Tristates : 27
1-bit tristate buffer : 25 1-bit tristate buffer : 25
16-bit tristate buffer : 2 16-bit tristate buffer : 2
@@ -311,11 +314,11 @@ Macro Statistics
# FSMs : 2 # FSMs : 2
# ROMs : 1 # ROMs : 1
16x8-bit ROM : 1 16x8-bit ROM : 1
# Registers : 57 # Registers : 61
Flip-Flops : 57 Flip-Flops : 61
# Comparators : 4 # Comparators : 3
16-bit comparator equal : 1 16-bit comparator equal : 1
8-bit comparator equal : 3 8-bit comparator equal : 2
========================================================================= =========================================================================
@@ -348,28 +351,28 @@ INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_8> in Unit <LAN_IDE_CP> is equivalent t
INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_1> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_4> <LAN_D_INIT_9> INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_1> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_4> <LAN_D_INIT_9>
Optimizing unit <LAN_IDE_CP> ... Optimizing unit <LAN_IDE_CP> ...
implementation constraint: INIT=s : D_OUT_7 implementation constraint: INIT=s : D_OUT_4
implementation constraint: INIT=s : D_Z2_OUT_0 implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_0
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_0 implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_1
implementation constraint: INIT=s : D_Z2_OUT_3 implementation constraint: INIT=s : D_Z2_OUT_3
implementation constraint: INIT=s : LAN_A_INIT_3 implementation constraint: INIT=s : LAN_A_INIT_3
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_1
implementation constraint: INIT=s : LAN_A_INIT_6
implementation constraint: INIT=s : D_OUT_0
implementation constraint: INIT=s : D_OUT_1
implementation constraint: INIT=s : D_OUT_2
implementation constraint: INIT=r : LAN_D_INIT_1
implementation constraint: INIT=s : D_OUT_3
implementation constraint: INIT=s : SHUT_UP_Z2_0
implementation constraint: INIT=s : D_OUT_4
implementation constraint: INIT=r : LAN_D_INIT_8
implementation constraint: INIT=s : SHUT_UP_Z2_1
implementation constraint: INIT=s : D_Z2_OUT_2 implementation constraint: INIT=s : D_Z2_OUT_2
implementation constraint: INIT=s : D_OUT_5 implementation constraint: INIT=s : LAN_A_INIT_6
implementation constraint: INIT=s : D_OUT_6
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_0
implementation constraint: INIT=s : D_Z2_OUT_1 implementation constraint: INIT=s : D_Z2_OUT_1
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_1 implementation constraint: INIT=s : D_Z2_OUT_0
implementation constraint: INIT=s : D_OUT_7
implementation constraint: INIT=s : D_OUT_6
implementation constraint: INIT=s : D_OUT_5
implementation constraint: INIT=s : D_OUT_3
implementation constraint: INIT=r : LAN_D_INIT_1
implementation constraint: INIT=s : D_OUT_2
implementation constraint: INIT=s : D_OUT_1
implementation constraint: INIT=s : D_OUT_0
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_1
implementation constraint: INIT=r : LAN_D_INIT_8
implementation constraint: INIT=s : SHUT_UP_Z2_0
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_0
implementation constraint: INIT=s : SHUT_UP_Z2_1
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd1 implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd1
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd2 implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd2
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd3 implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd3
@@ -408,26 +411,25 @@ Design Statistics
# IOs : 116 # IOs : 116
Cell Usage : Cell Usage :
# BELS : 1263 # BELS : 1268
# AND2 : 379 # AND2 : 378
# AND3 : 54 # AND3 : 53
# AND4 : 10 # AND4 : 11
# AND8 : 6 # AND8 : 6
# GND : 1 # GND : 1
# INV : 465 # INV : 468
# OR2 : 277 # OR2 : 278
# OR3 : 18 # OR3 : 21
# OR4 : 1 # OR4 : 1
# VCC : 1
# XOR2 : 51 # XOR2 : 51
# FlipFlops/Latches : 145 # FlipFlops/Latches : 151
# FD : 1 # FD : 4
# FDC : 22 # FDC : 22
# FDCE : 8 # FDCE : 7
# FDP : 46 # FDP : 49
# FDPE : 68 # FDPE : 69
# IO Buffers : 112 # IO Buffers : 114
# IBUF : 22 # IBUF : 24
# IOBUFE : 48 # IOBUFE : 48
# OBUF : 33 # OBUF : 33
# OBUFE : 9 # OBUFE : 9
@@ -435,13 +437,13 @@ Cell Usage :
Total REAL time to Xst completion: 19.00 secs Total REAL time to Xst completion: 19.00 secs
Total CPU time to Xst completion: 19.05 secs Total CPU time to Xst completion: 18.89 secs
--> -->
Total memory usage is 4534736 kilobytes Total memory usage is 4534828 kilobytes
Number of errors : 0 ( 0 filtered) Number of errors : 0 ( 0 filtered)
Number of warnings : 48 ( 0 filtered) Number of warnings : 46 ( 0 filtered)
Number of infos : 10 ( 0 filtered) Number of infos : 10 ( 0 filtered)
Logic/LAN_IDE/LAN_IDE_CP.vhd
+57 -8
View File
@@ -116,6 +116,10 @@ architecture Behavioral of LAN_IDE_CP is
signal IDE_ACCESS: STD_LOGIC; signal IDE_ACCESS: STD_LOGIC;
signal IDE_ENABLE: STD_LOGIC; signal IDE_ENABLE: STD_LOGIC;
signal IDE_BASEADR:STD_LOGIC_VECTOR(7 downto 0); signal IDE_BASEADR:STD_LOGIC_VECTOR(7 downto 0);
signal IDE_R_S: STD_LOGIC;
signal IDE_W_S: STD_LOGIC;
signal ROM_OE_S: STD_LOGIC;
signal CP_ACCESS: STD_LOGIC; signal CP_ACCESS: STD_LOGIC;
signal CP_BASEADR:STD_LOGIC_VECTOR(7 downto 0); signal CP_BASEADR:STD_LOGIC_VECTOR(7 downto 0);
signal LAN_ACCESS: STD_LOGIC; signal LAN_ACCESS: STD_LOGIC;
@@ -145,6 +149,10 @@ architecture Behavioral of LAN_IDE_CP is
signal Z3_A_LOW:STD_LOGIC; signal Z3_A_LOW:STD_LOGIC;
signal LAN_SM_RST:STD_LOGIC; signal LAN_SM_RST:STD_LOGIC;
signal CP_RD_S: std_logic;
signal CP_WE_S: std_logic;
signal CP_WE_QUIRK: std_logic;
signal AMIGA_CLK:STD_LOGIC; signal AMIGA_CLK:STD_LOGIC;
signal DS:STD_LOGIC; signal DS:STD_LOGIC;
@@ -276,7 +284,6 @@ begin
if(reset ='0')then if(reset ='0')then
AUTOCONFIG_Z2_ACCESS <= '0'; AUTOCONFIG_Z2_ACCESS <= '0';
IDE_ACCESS <= '0'; IDE_ACCESS <= '0';
IDE_ENABLE <= '0';
CP_ACCESS <= '0'; CP_ACCESS <= '0';
elsif(falling_edge(AS))then elsif(falling_edge(AS))then
@@ -296,7 +303,6 @@ begin
--IDE base --IDE base
if(A(23 downto 16) = IDE_BASEADR and SHUT_UP_Z2(1)='0' )then if(A(23 downto 16) = IDE_BASEADR and SHUT_UP_Z2(1)='0' )then
IDE_ACCESS <= '1'; IDE_ACCESS <= '1';
IDE_ENABLE <= not RW; -- enable IDE on the first write
else else
IDE_ACCESS <= '0'; IDE_ACCESS <= '0';
end if; end if;
@@ -671,6 +677,7 @@ begin
(others => 'Z'); (others => 'Z');
INT_OUT <= '0' when LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1' else INT_OUT <= '0' when LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1' else
'0' when CP_IRQ = '0' else
'Z'; 'Z';
OWN <= 'Z'; OWN <= 'Z';
@@ -685,18 +692,60 @@ begin
MTACK <= 'Z'; MTACK <= 'Z';
IDE_W <= '0' when AS='0' and IDE_ACCESS='1' and RW='0' else '1'; --ide signal generation
IDE_R <= not IDE_ENABLE when AS='0' and IDE_ACCESS='1' and RW='1' else '1'; ide_rw_gen: process (reset,AMIGA_CLK)
ROM_OE<= IDE_ENABLE when AS='0' and IDE_ACCESS='1' and RW='1' else '1'; begin
if (reset = '0') then
IDE_ENABLE <= '1';
IDE_R_S <= '1';
IDE_W_S <= '1';
ROM_OE_S <= '1';
elsif falling_edge(AMIGA_CLK) then
--default values
IDE_R_S <= '1';
IDE_W_S <= '1';
ROM_OE_S <= '1';
if(IDE_ACCESS='1' and AS='0')then
if(RW='0')then
--the write goes to the hdd!
IDE_ENABLE <= '0'; -- enable IDE on first read
IDE_W_S <= '0';
else
IDE_R_S <= IDE_ENABLE; --read from IDE instead from ROM
ROM_OE_S <= not IDE_ENABLE;
end if;
end if;
end if;
end process ide_rw_gen;
IDE_W <= IDE_W_S when AS='0' else '1';
IDE_R <= IDE_R_S when AS='0' else '1';
ROM_OE<= ROM_OE_S when AS='0' and AUTOBOOT_OFF ='0' else '1';
IDE_CS(0)<= not(A(12)); IDE_CS(0)<= not(A(12));
IDE_CS(1)<= not(A(13)); IDE_CS(1)<= not(A(13));
IDE_A(2 downto 0) <= A(11 downto 9); IDE_A(2 downto 0) <= A(11 downto 9);
ROM_B <= "00"; ROM_B <= "00";
--cp signal generation
cp_rw_gen: process (AMIGA_CLK)
begin
if falling_edge(AMIGA_CLK) then
--default values
CP_RD_S <= '1';
CP_WE_S <= '1';
if(CP_ACCESS = '1' and DS='0')then --datastrobe instead of AS!
CP_RD_S <= not RW;
CP_WE_S <= RW;
end if;
CP_WE_QUIRK <= CP_WE_S;
end if;
end process cp_rw_gen;
--for the future --for the future
CP_WE <= '1'; CP_WE <= CP_WE_S when AS='0' and CP_WE_QUIRK ='1' else '1';
CP_RD <= '1'; CP_RD <= CP_RD_S when AS='0' else '1';
CP_CS <= '1'; CP_CS <= not CP_ACCESS;
end Behavioral; end Behavioral;
Logic/LAN_IDE/LAN_IDE_CP.vm6
+12276 -8177
View File
File diff suppressed because it is too large Load Diff
Logic/LAN_IDE/LAN_IDE_CP.xml
+2 -2
View File
File diff suppressed because one or more lines are too long
Logic/LAN_IDE/LAN_IDE_CP_build.xml
+4 -4
View File
@@ -1,10 +1,10 @@
<?xml version='1.0' encoding='utf-8' ?> <?xml version='1.0' encoding='utf-8' ?>
<!DOCTYPE document SYSTEM 'file:///c:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/buildXML.dtd'> <!DOCTYPE document SYSTEM 'file:///C:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/buildXML.dtd'>
<document> <document>
<design name='LAN_IDE_CP'/> <design name='LAN_IDE_CP'/>
<rptdir name='LAN_IDE_CP'/> <rptdir name='LAN_IDE_CP'/>
<xilinx path='c:/Xilinx/14.7/ISE_DS/ISE;'/> <xilinx path='C:/Xilinx/14.7/ISE_DS/ISE;'/>
<projDir path='C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE'/> <projDir path='C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE'/>
<xslDir path='chipviewer/data/xsl'/> <xslDir path='chipviewer/data/xsl'/>
<fileDir path='/chipviewer/data/html'/> <fileDir path='/chipviewer/data/html'/>
@@ -259,7 +259,7 @@
<output file='fbs_FB16.htm'/> <output file='fbs_FB16.htm'/>
</xslFile> </xslFile>
</xmlFile> </xmlFile>
<xmlFile file='c:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/pinlegend.xml'> <xmlFile file='C:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/pinlegend.xml'>
<xslFile file='legend.xsl'> <xslFile file='legend.xsl'>
<param name='device' value='XC95288XL-10-TQ144'/> <param name='device' value='XC95288XL-10-TQ144'/>
<param name='verOn' value='0'/> <param name='verOn' value='0'/>
@@ -271,7 +271,7 @@
<output file='pinlegendV.htm'/> <output file='pinlegendV.htm'/>
</xslFile> </xslFile>
</xmlFile> </xmlFile>
<xmlFile file='c:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/logiclegend.xml'> <xmlFile file='C:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/logiclegend.xml'>
<xslFile file='legend.xsl'> <xslFile file='legend.xsl'>
<param name='device' value='XC95288XL-10-TQ144'/> <param name='device' value='XC95288XL-10-TQ144'/>
<param name='verOn' value='0'/> <param name='verOn' value='0'/>
Logic/LAN_IDE/LAN_IDE_CP_ngdbuild.xrpt
+19 -21
View File
@@ -5,7 +5,7 @@
The structure and the elements are likely to change over the next few releases. The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.--> This means code written to parse this file will need to be revisited each subsequent release.-->
<application stringID="NgdBuild" timeStamp="Wed Jan 02 22:06:57 2019"> <application stringID="NgdBuild" timeStamp="Thu Jan 03 00:09:14 2019">
<section stringID="User_Env"> <section stringID="User_Env">
<table stringID="User_EnvVar"> <table stringID="User_EnvVar">
<column stringID="variable"/> <column stringID="variable"/>
@@ -70,37 +70,35 @@
<item dataType="int" stringID="NGDBUILD_NUM_INFOS" value="0"/> <item dataType="int" stringID="NGDBUILD_NUM_INFOS" value="0"/>
</section> </section>
<section stringID="NGDBUILD_PRE_UNISIM_SUMMARY"> <section stringID="NGDBUILD_PRE_UNISIM_SUMMARY">
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="379"/> <item dataType="int" stringID="NGDBUILD_NUM_AND2" value="378"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="54"/> <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="53"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="10"/> <item dataType="int" stringID="NGDBUILD_NUM_AND4" value="11"/>
<item dataType="int" stringID="NGDBUILD_NUM_FD" value="1"/> <item dataType="int" stringID="NGDBUILD_NUM_FD" value="4"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDC" value="22"/> <item dataType="int" stringID="NGDBUILD_NUM_FDC" value="22"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="8"/> <item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="7"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDP" value="46"/> <item dataType="int" stringID="NGDBUILD_NUM_FDP" value="49"/>
<item dataType="int" stringID="NGDBUILD_NUM_FDPE" value="68"/> <item dataType="int" stringID="NGDBUILD_NUM_FDPE" value="69"/>
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="1"/> <item dataType="int" stringID="NGDBUILD_NUM_GND" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="22"/> <item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="24"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="465"/> <item dataType="int" stringID="NGDBUILD_NUM_INV" value="468"/>
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/> <item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="277"/> <item dataType="int" stringID="NGDBUILD_NUM_OR2" value="278"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="18"/> <item dataType="int" stringID="NGDBUILD_NUM_OR3" value="21"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="1"/> <item dataType="int" stringID="NGDBUILD_NUM_OR4" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="51"/> <item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="51"/>
</section> </section>
<section stringID="NGDBUILD_POST_UNISIM_SUMMARY"> <section stringID="NGDBUILD_POST_UNISIM_SUMMARY">
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="379"/> <item dataType="int" stringID="NGDBUILD_NUM_AND2" value="378"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="54"/> <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="53"/>
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="10"/> <item dataType="int" stringID="NGDBUILD_NUM_AND4" value="11"/>
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="70"/> <item dataType="int" stringID="NGDBUILD_NUM_GND" value="76"/>
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="74"/> <item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="74"/>
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="465"/> <item dataType="int" stringID="NGDBUILD_NUM_INV" value="468"/>
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/> <item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="277"/> <item dataType="int" stringID="NGDBUILD_NUM_OR2" value="278"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="18"/> <item dataType="int" stringID="NGDBUILD_NUM_OR3" value="21"/>
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="1"/> <item dataType="int" stringID="NGDBUILD_NUM_OR4" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_TS_TIMESPEC" value="1"/> <item dataType="int" stringID="NGDBUILD_NUM_TS_TIMESPEC" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="51"/> <item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="51"/>
</section> </section>
<section stringID="NGDBUILD_CORE_GENERATION_SUMMARY"> <section stringID="NGDBUILD_CORE_GENERATION_SUMMARY">
Logic/LAN_IDE/LAN_IDE_CP_pad.csv
+3 -3
View File
@@ -1,7 +1,7 @@
Release 8.1i - Fit P.20131013 Release 8.1i - Fit P.20131013
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
1- 2-2019 10:08PM 1- 3-2019 0:09AM
NOTE: This file is designed to be imported into a spreadsheet program NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The comma ',' such as Microsoft Excel for viewing, printing and sorting. The comma ','
@@ -48,7 +48,7 @@ P27,IDE_R,O,I/O,OUTPUT,,,,,,,,,
P28,IDE_W,O,I/O,OUTPUT,,,,,,,,, P28,IDE_W,O,I/O,OUTPUT,,,,,,,,,
P29,GND,,GND,,,,,,,,,, P29,GND,,GND,,,,,,,,,,
P30,CLK_EXT,GCK,I/O/GCK1,,,,,,,,,, P30,CLK_EXT,GCK,I/O/GCK1,,,,,,,,,,
P31,TIE,,I/O,,,,,,,,,, P31,CP_IRQ,I,I/O,INPUT,,,,,,,,,
P32,INT_OUT,O,I/O/GCK2,OUTPUT,,,,,,,,, P32,INT_OUT,O,I/O/GCK2,OUTPUT,,,,,,,,,
P33,TIE,,I/O,,,,,,,,,, P33,TIE,,I/O,,,,,,,,,,
P34,CP_CS,O,I/O,OUTPUT,,,,,,,,, P34,CP_CS,O,I/O,OUTPUT,,,,,,,,,
@@ -92,7 +92,7 @@ P71,CP_RD,O,I/O,OUTPUT,,,,,,,,,
P72,GND,,GND,,,,,,,,,, P72,GND,,GND,,,,,,,,,,
P73,VCC,,VCCIO,,,,,,,,,, P73,VCC,,VCCIO,,,,,,,,,,
P74,A<15>,I/O,I/O,BIDIR,,,,,,,,, P74,A<15>,I/O,I/O,BIDIR,,,,,,,,,
P75,TIE,,I/O,,,,,,,,,, P75,AUTOBOOT_OFF,I,I/O,INPUT,,,,,,,,,
P76,LAN_WRL,O,I/O,OUTPUT,,,,,,,,, P76,LAN_WRL,O,I/O,OUTPUT,,,,,,,,,
P77,FCS,I,I/O,INPUT,,,,,,,,, P77,FCS,I,I/O,INPUT,,,,,,,,,
P78,DS1,I,I/O,INPUT,,,,,,,,, P78,DS1,I,I/O,INPUT,,,,,,,,,
1 Release 8.1i - Fit P.20131013
2 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
3 1- 2-2019 10:08PM 1- 3-2019 0:09AM
4 NOTE: This file is designed to be imported into a spreadsheet program
5 such as Microsoft Excel for viewing, printing and sorting. The comma ','
6 character is used as the data field separator.
7 This file is also designed to support parsing.
48 P33,TIE,,I/O,,,,,,,,,,
49 P34,CP_CS,O,I/O,OUTPUT,,,,,,,,,
50 P35,ROM_OE,O,I/O,OUTPUT,,,,,,,,,
51 P36,GND,,GND,,,,,,,,,,
52 P37,VCC,,VCCIO,,,,,,,,,,
53 P38,TIE,,I/O/GCK3,,,,,,,,,,
54 P39,D<2>,I/O,I/O,BIDIR,,,,,,,,,
92 P77,FCS,I,I/O,INPUT,,,,,,,,,
93 P78,DS1,I,I/O,INPUT,,,,,,,,,
94 P79,Z3,I,I/O,INPUT,,,,,,,,,
95 P80,AS,I,I/O,INPUT,,,,,,,,,
96 P81,UDS,I,I/O,INPUT,,,,,,,,,
97 P82,LDS,I,I/O,INPUT,,,,,,,,,
98 P83,RW,I,I/O,INPUT,,,,,,,,,
Logic/LAN_IDE/LAN_IDE_CP_xst.xrpt
+21 -22
View File
@@ -5,7 +5,7 @@
The structure and the elements are likely to change over the next few releases. The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.--> This means code written to parse this file will need to be revisited each subsequent release.-->
<application stringID="Xst" timeStamp="Wed Jan 02 22:06:30 2019"> <application stringID="Xst" timeStamp="Thu Jan 03 00:08:48 2019">
<section stringID="User_Env"> <section stringID="User_Env">
<table stringID="User_EnvVar"> <table stringID="User_EnvVar">
<column stringID="variable"/> <column stringID="variable"/>
@@ -80,15 +80,15 @@
</section> </section>
<section stringID="XST_HDL_SYNTHESIS_REPORT"> <section stringID="XST_HDL_SYNTHESIS_REPORT">
<item dataType="int" stringID="XST_ROMS" value="1"></item> <item dataType="int" stringID="XST_ROMS" value="1"></item>
<item dataType="int" stringID="XST_REGISTERS" value="68"> <item dataType="int" stringID="XST_REGISTERS" value="74">
<item dataType="int" stringID="XST_1BIT_REGISTER" value="58"/> <item dataType="int" stringID="XST_1BIT_REGISTER" value="64"/>
<item dataType="int" stringID="XST_14BIT_REGISTER" value="2"/> <item dataType="int" stringID="XST_14BIT_REGISTER" value="2"/>
<item dataType="int" stringID="XST_16BIT_REGISTER" value="3"/> <item dataType="int" stringID="XST_16BIT_REGISTER" value="3"/>
<item dataType="int" stringID="XST_2BIT_REGISTER" value="1"/> <item dataType="int" stringID="XST_2BIT_REGISTER" value="1"/>
<item dataType="int" stringID="XST_4BIT_REGISTER" value="1"/> <item dataType="int" stringID="XST_4BIT_REGISTER" value="1"/>
<item dataType="int" stringID="XST_8BIT_REGISTER" value="3"/> <item dataType="int" stringID="XST_8BIT_REGISTER" value="3"/>
</item> </item>
<item dataType="int" stringID="XST_COMPARATORS" value="7"></item> <item dataType="int" stringID="XST_COMPARATORS" value="6"></item>
<item dataType="int" stringID="XST_TRISTATES" value="27"> <item dataType="int" stringID="XST_TRISTATES" value="27">
<item dataType="int" stringID="XST_1BIT_TRISTATE_BUFFER" value="25"/> <item dataType="int" stringID="XST_1BIT_TRISTATE_BUFFER" value="25"/>
</item> </item>
@@ -99,10 +99,10 @@
<section stringID="XST_ADVANCED_HDL_SYNTHESIS_REPORT"> <section stringID="XST_ADVANCED_HDL_SYNTHESIS_REPORT">
<item dataType="int" stringID="XST_FSMS" value="2"/> <item dataType="int" stringID="XST_FSMS" value="2"/>
<item dataType="int" stringID="XST_ROMS" value="1"></item> <item dataType="int" stringID="XST_ROMS" value="1"></item>
<item dataType="int" stringID="XST_REGISTERS" value="57"> <item dataType="int" stringID="XST_REGISTERS" value="61">
<item dataType="int" stringID="XST_FLIPFLOPS" value="57"/> <item dataType="int" stringID="XST_FLIPFLOPS" value="61"/>
</item> </item>
<item dataType="int" stringID="XST_COMPARATORS" value="4"></item> <item dataType="int" stringID="XST_COMPARATORS" value="3"></item>
</section> </section>
<section stringID="XST_PARTITION_REPORT"> <section stringID="XST_PARTITION_REPORT">
<section stringID="XST_PARTITION_IMPLEMENTATION_STATUS"> <section stringID="XST_PARTITION_IMPLEMENTATION_STATUS">
@@ -121,32 +121,31 @@
<item stringID="XST_IOS" value="116"/> <item stringID="XST_IOS" value="116"/>
</section> </section>
<section stringID="XST_CELL_USAGE"> <section stringID="XST_CELL_USAGE">
<item dataType="int" stringID="XST_BELS" value="1263"> <item dataType="int" stringID="XST_BELS" value="1268">
<item dataType="int" stringID="XST_AND2" value="379"/> <item dataType="int" stringID="XST_AND2" value="378"/>
<item dataType="int" stringID="XST_AND3" value="54"/> <item dataType="int" stringID="XST_AND3" value="53"/>
<item dataType="int" stringID="XST_AND4" value="10"/> <item dataType="int" stringID="XST_AND4" value="11"/>
<item dataType="int" stringID="XST_GND" value="1"/> <item dataType="int" stringID="XST_GND" value="1"/>
<item dataType="int" stringID="XST_INV" value="465"/> <item dataType="int" stringID="XST_INV" value="468"/>
<item dataType="int" stringID="XST_OR2" value="277"/> <item dataType="int" stringID="XST_OR2" value="278"/>
<item dataType="int" stringID="XST_VCC" value="1"/>
<item dataType="int" stringID="XST_XOR2" value="51"/> <item dataType="int" stringID="XST_XOR2" value="51"/>
</item> </item>
<item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="145"> <item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="151">
<item dataType="int" stringID="XST_FD" value="1"/> <item dataType="int" stringID="XST_FD" value="4"/>
<item dataType="int" stringID="XST_FDC" value="22"/> <item dataType="int" stringID="XST_FDC" value="22"/>
<item dataType="int" stringID="XST_FDCE" value="8"/> <item dataType="int" stringID="XST_FDCE" value="7"/>
<item dataType="int" stringID="XST_FDP" value="46"/> <item dataType="int" stringID="XST_FDP" value="49"/>
<item dataType="int" stringID="XST_FDPE" value="68"/> <item dataType="int" stringID="XST_FDPE" value="69"/>
</item> </item>
<item dataType="int" stringID="XST_IO_BUFFERS" value="112"> <item dataType="int" stringID="XST_IO_BUFFERS" value="114">
<item dataType="int" stringID="XST_IBUF" value="22"/> <item dataType="int" stringID="XST_IBUF" value="24"/>
<item dataType="int" stringID="XST_OBUF" value="33"/> <item dataType="int" stringID="XST_OBUF" value="33"/>
</item> </item>
</section> </section>
</section> </section>
<section stringID="XST_ERRORS_STATISTICS"> <section stringID="XST_ERRORS_STATISTICS">
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_ERRORS" value="0"/> <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_ERRORS" value="0"/>
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="48"/> <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="46"/>
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="10"/> <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="10"/>
</section> </section>
</application> </application>
Logic/LAN_IDE/_ngo/netlist.lst
+1 -1
View File
@@ -1,2 +1,2 @@
C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1546463209 C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1546470547
OK OK
Logic/LAN_IDE/_xmsgs/cpldfit.xmsgs
-6
View File
@@ -11,12 +11,6 @@
<msg type="info" file="Cpld" num="0" delta="new" >Inferring BUFG constraint for signal &apos;<arg fmt="%s" index="1">CLK_EXT</arg>&apos; based upon the LOC constraint &apos;<arg fmt="%s" index="2">P30</arg>&apos;. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored. <msg type="info" file="Cpld" num="0" delta="new" >Inferring BUFG constraint for signal &apos;<arg fmt="%s" index="1">CLK_EXT</arg>&apos; based upon the LOC constraint &apos;<arg fmt="%s" index="2">P30</arg>&apos;. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.
</msg> </msg>
<msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">AUTOBOOT_OFF</arg>&apos;. The input(s) are unused after optimization. Please verify functionality via simulation.
</msg>
<msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">CP_IRQ</arg>&apos;. The input(s) are unused after optimization. Please verify functionality via simulation.
</msg>
<msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">IDE_WAIT</arg>&apos;. The input(s) are unused after optimization. Please verify functionality via simulation. <msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">IDE_WAIT</arg>&apos;. The input(s) are unused after optimization. Please verify functionality via simulation.
</msg> </msg>
Logic/LAN_IDE/_xmsgs/xst.xmsgs
-6
View File
@@ -29,12 +29,6 @@
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">IDE_WAIT</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. <msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">IDE_WAIT</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg> </msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">AUTOBOOT_OFF</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">CP_IRQ</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg>
<msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">MTCR</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. <msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">MTCR</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
</msg> </msg>
Logic/LAN_IDE/log.txt
+1039 -971
View File
File diff suppressed because it is too large Load Diff
Logic/LAN_IDE/webtalk_pn.xml
+1 -1
View File
@@ -3,7 +3,7 @@
<!--The data in this file is primarily intended for consumption by Xilinx tools. <!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases. The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.--> This means code written to parse this file will need to be revisited each subsequent release.-->
<application name="pn" timeStamp="Wed Jan 02 22:06:29 2019"> <application name="pn" timeStamp="Thu Jan 03 00:08:47 2019">
<section name="Project Information" visible="false"> <section name="Project Information" visible="false">
<property name="ProjectID" value="A2E624B6ED1449CD92F77DE849BF7B51" type="project"/> <property name="ProjectID" value="A2E624B6ED1449CD92F77DE849BF7B51" type="project"/>
<property name="ProjectIteration" value="0" type="project"/> <property name="ProjectIteration" value="0" type="project"/>
Logic/LAN_IDE/xlnx_auto_0_xdb/cst.xbcd
BIN
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Binary file not shown.