New driver
This commit is contained in:
@@ -18,10 +18,11 @@
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; - RXSTART_INIT = $0c00 -> currently $2000 due to previous location bug
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;
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; incdir Temp:Amiga/src/Zorro-LAN-IDE.git/Driver/enc624j6net/
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incdir src:baxnet/trunk/source/
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;Temp:Amiga/src/Zorro-LAN-IDE.git/Driver/enc624j6net/
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include "enc624j6net/registers.i"
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include "enc624j6net/macros.i"
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include lvo/exec_lib.i
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; enable debugging code block
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DEBUG EQU 1
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;
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@@ -34,7 +35,7 @@ ADD_4RX EQU 1 ;add 4 to valid RX size (fake CRC), fixes shapeshifter RAW treatme
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PSTART_INIT EQU $0BF0 ; 16 Bytes private storage for driver
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PSTOP_INIT EQU $0BFF ; (see below for definitions)
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RXSTART_INIT EQU $2000 ; start of RX buffer, room for 14 packets
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RXSTART_INIT EQU $0C00 ; start of RX buffer, room for 14 packets
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RXSTOP_INIT EQU $5fff ; end of RX buffer
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TXSTART_INIT EQU $0000 ; start of TX buffer, room for 2 packets
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@@ -109,8 +110,9 @@ ENC_BOARDID EQU 123 ;ZII-IDE-LAN-CP
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XDEF _enc624j6l_DisableInterrupt
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XDEF _enc624j6l_EnableGlobalInterrupt
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XDEF _enc624j6l_DisableGlobalInterrupt
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XDEF _enc624j6l_broadcast_multicast_filter
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XDEF _enc624j6l_bc_mc_filter
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XDEF _enc624j6l_ReadPHY
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;
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; System includes
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;
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@@ -220,6 +222,11 @@ opendos:
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tst.l d0
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ble error
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move.l _boardbase(pc),a0
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; moveq #PHSTAT1,d0 ;AUTONEG DONE, forced speeds/duplex
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moveq #PHSTAT3,d0 ;AUTONEG DONE, forced speeds/duplex
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bsr _enc624j6l_ReadPHY
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;---------- transmit test stuff ---------------
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moveq #100,d2
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.txtest:
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@@ -530,7 +537,7 @@ _enc624j6l_Init:
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moveq #ECON1_RXEN,d0 ;no RX, my dear (yet)
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CLRREG ECON1,a0,d0 ;
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;set clock out frequency (see defines above)
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;33.333Mhz clock out frequency (see defines above)
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move.w #CLOCK_DEF_CLR,d0 ;clr mask
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CLRREG ECON2,a0,d0
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move.w #CLOCK_DEF_SET,d0 ;set mask
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@@ -545,7 +552,7 @@ _enc624j6l_Init:
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WRITEREG ERXST,a0,d0 ;set RX start pointer (end will be $5fff)
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WRITEREG PNextPacket,a0,d0 ;set user read pointer
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bsr _enc624j6l_broadcast_multicast_filter ;in: A0/D1, out: D0
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bsr _enc624j6l_bc_mc_filter ;in: A0/D1, out: D0
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move #RXSTOP_INIT&$fffe,d0
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WRITEREG ERXTAIL,a0,d0 ;tail pointer in buffer = rx-2, wraparound
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@@ -604,7 +611,7 @@ _enc624j6l_Init:
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; D1 - init flags
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;out: D0 >0 = OK
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; <=0 = FAIL
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_enc624j6l_broadcast_multicast_filter:
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_enc624j6l_bc_mc_filter:
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move.l a0,d0
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beq.s .rts
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@@ -826,7 +833,7 @@ _enc624j6l_DisableInterrupt:
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moveq #0,d0 ;magic trick: the board enables Interrupts
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lea $4000(a0),a0
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move.w d0,($4000,a0)
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move.w d0,$4000(a0) ;was $4002
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lea -$4000(a0),a0
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;WRITEREG $8000,a0,d0 ;only with this "sesame"
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@@ -892,14 +899,18 @@ _enc624j6l_IntServer_List:
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bra.s .intdis_loop
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.boardsdone:
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ifne 1
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;faster: get from extended Driver board list instead from ZII/ZIII card
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ifne 1
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move.l (a6)+,d0 ;Sigtask
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move.l (a6)+,d0 ;SigTask
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beq.s .rts
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move.l d0,a1
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move.l (a6)+,d1 ;SigBit
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move.l d0,a1 ;SigTask
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move.l (a6)+,a6 ;ExecBase
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moveq #0,d0
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move.l (a6)+,d1 ;Sigbit
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bset d1,d0
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else
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@@ -915,10 +926,11 @@ _enc624j6l_IntServer_List:
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READREG PSigBit,a0,d1 ;get signal bit
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bset d1,d0 ;signal mask
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move.l 4.w,a6
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endc
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move.l 4.w,a6
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jsr _LVOSignal(a6)
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jsr _LVOSignal(a6)
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.rts
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move.l (sp)+,a6
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@@ -1083,8 +1095,9 @@ _enc624j6l_HaveRecv:
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move.l a0,d0
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beq.s .err
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READREG ESTAT,a0,d0
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and.l #$ff,d0 ;ESTAT_PKTCNT7...ESTAT_PKTCNT0
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moveq #0,d0
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READREG ESTAT,a0,d1
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move.b d1,d0 ;ESTAT_PKTCNT7...ESTAT_PKTCNT0
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.rts:
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rts
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.err: moveq #-1,d0
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@@ -1112,8 +1125,9 @@ _enc624j6l_RecvFrame: ;
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move.l a0,d1
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beq .err
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READREG ESTAT,a0,d0 ;number of pending frames
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and.l #$ff,d0 ;clear out count (ESTAT_PKTCNT7...ESTAT_PKTCNT0)
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moveq #0,d0
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READREG ESTAT,a0,d2 ;number of pending frames
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move.b d2,d0 ;clear out count (ESTAT_PKTCNT7...ESTAT_PKTCNT0)
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beq .rts ;nothing in buffer, return sheer emptiness
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;at least one frame in buffer
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@@ -1280,12 +1294,6 @@ _enc624j6l_RecvFrame: ;
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bge.s .rts
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moveq #0,d0
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; cmp.l #$d8803977,6(a3)
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; beq .rts
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; moveq #0,d0
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; clr.l 6(a3)
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.rts:
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movem.l (sp)+,d2-d7/a1-a3
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rts
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@@ -1319,7 +1327,7 @@ _enc624j6l_RecvFrame: ;
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; notes:
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;
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_enc624j6l_TransmitFrame:
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movem.l d2-d4/a2,-(sp)
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movem.l d2-d5/a2,-(sp)
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;---------------- parameter check -------------------------------------
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@@ -1344,13 +1352,6 @@ _enc624j6l_TransmitFrame:
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move.l a1,d1 ;no send frame ?
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beq.w .err ;exit
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move.w d0,d4 ;still need length later
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addq #7,d0 ;round up
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asr.w #3,d0 ;size/8 = words
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subq.w #1,d0 ;dbf...
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blt.w .err ;size<2 ? bail out
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;------ double-buffered frame copy to send buffer ---------------------
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READREG PNextTX,a0,d2 ;"last written, maybe still pending frame"
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and.w #PSwapTX,d2 ;sanity, leave only desired bits
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@@ -1358,6 +1359,40 @@ _enc624j6l_TransmitFrame:
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WRITEREG PNextTX,a0,d2 ;remember pointer (d2 also for ETXST later)
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lea (a0,d2.w),a2 ;write pointer for frame
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ifeq _OPT_BUFFER_SWAP
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;faster TX when buffer swapping is not necessary
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move.l d0,d4 ;remember length
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moveq #63,d5 ;
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and.l d5,d0 ;remainder of 64 byte copy loop
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move.l d4,d5 ;length in bytes
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asr.w #6,d5 ;64 byte blocks
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subq.w #1,d5 ;dbf
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blt.s .smallcopy
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bra.s .largecopy_start
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.largecopy:
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move.l d1,(a2)+
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.largecopy_start:
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rept 15
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move.l (a1)+,(a2)+ ;save to SRAM
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endr
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move.l (a1)+,d1
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dbf d5,.largecopy
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move.l d1,(a2)+
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bra.s .smallcopy
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endc ;_OPT_BUFFER_SWAP
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move.w d0,d4 ;still need length later
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.smallcopy:
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addq #7,d0 ;round up
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asr.w #3,d0 ;size/8 = words
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subq.w #1,d0 ;dbf...
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blt.w .err ;size<2 ? bail out
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swap d4
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move.w #8,d4
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.txcopy:
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@@ -1375,14 +1410,16 @@ _enc624j6l_TransmitFrame:
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swap d3
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move.l d1,(a2)+ ;save to SRAM
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move.l d3,(a2)+ ;save to SRAM
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else
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else ;_OPT_BUFFER_SWAP
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move.l (a1)+,(a2)+ ;save to SRAM
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move.l (a1)+,(a2)+ ;save to SRAM
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endc
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endc ;_OPT_BUFFER_SWAP
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dbf d0,.txcopy
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swap d4
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;---------------- wait on last frame ----------------------------------
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move #200,d3
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.txwait:
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@@ -1410,7 +1447,7 @@ _enc624j6l_TransmitFrame:
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SETREG ECON1,a0,d1 ;
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.err:
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movem.l (sp)+,d2-d4/a2
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movem.l (sp)+,d2-d5/a2
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rts
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ifne _OPT_CHECKLINK_TX
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@@ -1422,7 +1459,61 @@ _enc624j6l_TransmitFrame:
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bra.s .linkchgdone
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endc
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;---------------------------------------------------------------------------------------
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;
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; read PHY register (16 Bit)
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;
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; input: A0 - APTR mmapped board base address
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; D0 - LONG Phy register (5 valid bits)
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;
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; output: LONG D0 <0 - error (bad register index)
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; - 16 Bit PHY reg contents
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;
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; trash: -
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;
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; notes:
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;;
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;
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;
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_enc624j6l_ReadPHY:
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moveq #31,d1
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cmp.l d1,d0
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bhi.w .err
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bset #8,d0 ;$100 + PHY_REG
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WRITEREG MIREGADR,a0,d0 ;set PHY register address
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moveq #1,d0
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WRITEREG MICMD,a0,d0 ;read command
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moveq #25,d0 ;25 us delay (at least)
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bsr _enc624j6l_UMinDelay ;
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moveq #100,d1
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.waitloop:
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READREG MISTAT,a0,d0
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btst #0,d0
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beq.s .notbusy
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tst.b $BFE301 ;1 CIA access = 1.4 us
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subq.w #1,d1 ;>165 us exceeded ? -> something is wrong, SPEC says 25.6 us
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blt.s .notbusy ;error
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bra.s .waitloop
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.notbusy
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moveq #0,d0
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WRITEREG MICMD,a0,d0 ;cancel read command
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tst.w d1 ;did we run into timeout ?
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blt.s .err ;yes, we don't have anything worthwhile
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READREG MIRD,a0,d1
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moveq #0,d0
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move.w d1,d0
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rts
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.err:
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moveq #-1,d0
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rts
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;------------------------------------------------------------------------------------------------
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;------------------------------------------------------------------------------------------------
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;
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@@ -232,7 +232,7 @@ ASM SAVEDS int enc624j6l_SetOnline( ASMR(a0) void *board ASMREG(a0) );
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output: <0 - error
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>=0 - OK
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*/
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ASM SAVEDS int enc624j6l_broadcast_multicast_filter(
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ASM SAVEDS int enc624j6l_bc_mc_filter(
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ASMR(a0) void *board ASMREG(a0),
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ASMR(d1) unsigned long flags ASMREG(d1) );
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@@ -326,6 +326,19 @@ ASM SAVEDS void enc624j6l_IntServer_List( void );
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*/
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ASM SAVEDS int enc624j6l_CheckLinkChange( ASMR(a0) void *board ASMREG(a0) );
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/*
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Purpose: read PHY register
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input: board - mmapped board base address
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flags - broadcast,promiscous, multicast
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output: <0 - error
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>=0 - OK
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*/
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ASM SAVEDS int enc624j6l_ReadPHY(
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ASMR(a0) void *board ASMREG(a0),
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ASMR(d0) unsigned long phyreg ASMREG(d0) );
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#endif /* _INC_ENC624J6L_H */
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@@ -0,0 +1,110 @@
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/*
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enc624test.c
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|
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(C) 2018 Henryk Richter <henryk.richter@gmx.net>
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|
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Matze-Scrat-Buggs ZII card hardware test
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|
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*/
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#include <exec/libraries.h>
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#include <proto/exec.h>
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|
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#define ENC_MANUFACTURER 2588
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#define ENC_BOARD 123
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#include <proto/expansion.h>
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#include <proto/dos.h>
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#include <libraries/configvars.h>
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#include <hardware/intbits.h>
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#if 0
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#include "device.h"
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#include "hw.h"
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#include "enc624j6l.h"
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#endif
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#include "registers.h"
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#define READREG(_x_,_off_) *( (volatile USHORT*)( (volatile UBYTE*)(_x_) + (_off_)) )
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#define WRITEREG(_x_,_off_,_y_) *( (volatile USHORT*)( (volatile UBYTE*)(_x_) + (_off_)) ) = (_y_);
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#define SETREG(_x_,_off_,_y_) *( (volatile USHORT*)( (volatile UBYTE*)(_x_) + (_off_) + SET_OFFSET )) = (_y_);
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#define CLRREG(_x_,_off_,_y_) *( (volatile USHORT*)( (volatile UBYTE*)(_x_) + (_off_) + CLR_OFFSET )) = (_y_);
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const BYTE exp_name[] = "expansion.library";
|
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|
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int main( int argc, char **argv )
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{
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LONG ret = 0;
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ULONG ul;
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volatile APTR board = (0);
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volatile UBYTE *uboard;
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struct Library *ExpansionBase;
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struct ConfigDev *cfg = (0);
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|
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ExpansionBase = OpenLibrary( (BYTE*)exp_name, 37 );
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if( !ExpansionBase )
|
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{
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Printf("Cannot open Expansion. quitting\n");
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goto quit;
|
||||
}
|
||||
|
||||
cfg = FindConfigDev( cfg, ENC_MANUFACTURER, ENC_BOARD );
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if( cfg )
|
||||
{
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board = (volatile APTR)cfg->cd_BoardAddr;
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}
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if( !board )
|
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{
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Printf("Board %ld / %ld not found in expansions\n",(ULONG)ENC_MANUFACTURER,(ULONG)ENC_BOARD);
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goto quit;
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||||
}
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Printf("Board found at 0x%lx\n",(ULONG)board);
|
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|
||||
/* 16 Bit R/W Test */
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Printf("16 Bit reg test\n",(ULONG)board);
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WRITEREG( board, EUDAST, 0x1234 );
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ul = READREG( board, EUDAST );
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if( ul != 0x1234 )
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{
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Printf("Board error: wrote 0x1234, got 0x%lx\n",ul);
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ret = 1;
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||||
}
|
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WRITEREG( board, EUDAST, 0x0000 );
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|
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/* Byte R/W tests */
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Printf("8 Bit buffer tests\n",(ULONG)board);
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|
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WRITEREG( board, 0xBFE, 0x0000 );
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uboard = (volatile UBYTE*)board;
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|
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*(uboard+0xBFE) = 0xda;
|
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ul = READREG( board, 0xBFE );
|
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if( ul != 0xda00 )
|
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{
|
||||
Printf("Board error: expected 0xDA00, got 0x%lx on upper byte test\n",ul);
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ret = 1;
|
||||
}
|
||||
|
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WRITEREG( board, 0xBFE, 0x0000 );
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*(uboard+0xBFF) = 0xbf;
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ul = READREG( board, 0xBFE );
|
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if( ul != 0x00bf )
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{
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||||
Printf("Board error: expected 0x00BF, got 0x%lx on lower byte test\n",ul);
|
||||
ret = 1;
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||||
}
|
||||
|
||||
if( ret )
|
||||
Printf("Error(s) encountered\n");
|
||||
else
|
||||
Printf("Board looking good as far as tested\n");
|
||||
|
||||
quit:
|
||||
if( ExpansionBase )
|
||||
CloseLibrary(ExpansionBase);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
@@ -3,7 +3,7 @@
|
||||
|
||||
(C) 2018 Henryk Richter <henryk.richter@gmx.net>
|
||||
|
||||
SDNet hardware interface to device
|
||||
Matze-Scrat-Buggs ZII card hardware interface to device
|
||||
|
||||
|
||||
*/
|
||||
@@ -73,6 +73,8 @@ void myhw_ControlIntervalTimer( DEVBASEP );
|
||||
|
||||
hw_config_init() - set defaults for HW
|
||||
hw_config_update() - update config of HW
|
||||
|
||||
hw_get_mac_status() - running parameters
|
||||
*/
|
||||
|
||||
const BYTE exp_name[] = "expansion.library";
|
||||
@@ -85,11 +87,10 @@ ASM SAVEDS LONG hw_Find_Boards( ASMR(a0) DEVBASEP ASMREG(a0) )
|
||||
struct Library *ExpansionBase;
|
||||
struct ConfigDev *cfg = (0);
|
||||
|
||||
if( (ExpansionBase = OpenLibrary( exp_name, 37 )) )
|
||||
if( (ExpansionBase = OpenLibrary( (BYTE*)exp_name, 37 )) )
|
||||
{
|
||||
/* TODO: check for expansion port, i.e. distinguish V500/V600 */
|
||||
/* TODO: actually verify that we have a module here */
|
||||
ret = 1;
|
||||
/* ret = 1; */
|
||||
|
||||
for( i=0 ; i < MAX_UNITS ; i++ )
|
||||
{
|
||||
@@ -322,8 +323,64 @@ ASM SAVEDS LONG hw_check_link_change( ASMR(a0) DEVBASEP ASMREG(
|
||||
return 1; /* don't signal panic to the outside, everything is under control */
|
||||
}
|
||||
|
||||
/* obtain running parameters of Ethernet MAC: link up/down, Speed, Duplex */
|
||||
ASM SAVEDS LONG hw_get_mac_status( ASMR(a0) DEVBASEP ASMREG(a0),
|
||||
ASMR(d0) ULONG unit ASMREG(d0) )
|
||||
{
|
||||
struct HWData *hwd = &db->db_hwdat;
|
||||
APTR boardbase = db->db_Units[unit].duh_BASE;
|
||||
|
||||
LONG ret;
|
||||
LONG phstat3;
|
||||
LONG phstat1;
|
||||
LONG phcon1;
|
||||
|
||||
enc624j6l_ReadPHY( boardbase, PHSTAT1 );
|
||||
phstat3 = enc624j6l_ReadPHY( boardbase, PHSTAT3 );
|
||||
phcon1 = enc624j6l_ReadPHY( boardbase, PHCON1 );
|
||||
phstat1 = enc624j6l_ReadPHY( boardbase, PHSTAT1 ); /* read again to see whether link is established */
|
||||
if( ( phstat1 < 0 ) || ( phstat3 < 0 ) )
|
||||
return HW_MAC_INVALID; /* no valid data found */
|
||||
|
||||
/* a) check Link */
|
||||
ret = 0;
|
||||
if( phstat1 & PHSTAT1_LLSTAT )
|
||||
{
|
||||
ret |= HW_MAC_LINK_UP;
|
||||
|
||||
/* if( phstat1 & PHSTAT1_ANDONE ) */ /* autonegotiation successful */
|
||||
if( phcon1 & PHCON1_ANEN ) /* autonegotiation enabled */
|
||||
ret |= HW_MAC_AUTONEGOTIATION;
|
||||
|
||||
phstat3 = (phstat3>>2)&7; /* get active Speed/Duplex */
|
||||
switch( phstat3 )
|
||||
{
|
||||
case 6:
|
||||
if( hwd->flowcontrol )
|
||||
ret |= (HW_MAC_ON_FDX_FC<<HW_MACB_SPEED100);
|
||||
else
|
||||
ret |= (HW_MAC_ON_FDX<<HW_MACB_SPEED100);
|
||||
break;
|
||||
case 5:
|
||||
if( hwd->flowcontrol )
|
||||
ret |= (HW_MAC_ON_FDX_FC<<HW_MACB_SPEED10);
|
||||
else
|
||||
ret |= (HW_MAC_ON_FDX<<HW_MACB_SPEED10);
|
||||
break;
|
||||
case 2: ret |= (HW_MAC_ON<<HW_MACB_SPEED100);
|
||||
break;
|
||||
case 1: ret |= (HW_MAC_ON<<HW_MACB_SPEED10);
|
||||
break;
|
||||
default: break;
|
||||
}
|
||||
}
|
||||
|
||||
return ret;
|
||||
|
||||
}
|
||||
|
||||
ASM SAVEDS LONG hw_change_multicast( ASMR(a0) DEVBASEP ASMREG(a0),
|
||||
ASMR(a0) ULONG unit ASMREG(d0),
|
||||
ASMR(d0) ULONG unit ASMREG(d0),
|
||||
ASMR(a1) struct List *mcastlist ASMREG(a1) )
|
||||
{
|
||||
/* TODO: implement Multicast hashing */
|
||||
@@ -339,7 +396,7 @@ ASM SAVEDS LONG hw_change_multicast( ASMR(a0) DEVBASEP ASMREG(
|
||||
if( mcastlist->lh_Head->ln_Succ )
|
||||
flags |= PIO_INIT_MULTI_CAST;
|
||||
|
||||
enc624j6l_broadcast_multicast_filter(boardbase, flags );/* flags & (PIO_INIT_BROAD_CAST|PIO_INIT_MULTI_CAST) ); */
|
||||
enc624j6l_bc_mc_filter(boardbase, flags );/* flags & (PIO_INIT_BROAD_CAST|PIO_INIT_MULTI_CAST) ); */
|
||||
|
||||
|
||||
|
||||
@@ -366,6 +423,7 @@ void myhw_ControlInterrupts( DEVBASEP )
|
||||
hwd->hwd_act_boards[flag] = (0); /* NULL-terminate */
|
||||
hwd->hwd_act_boards[flag+1] = (APTR)FindTask(0); /* append task */
|
||||
hwd->hwd_act_boards[flag+2] = (APTR)hwd->hwd_IntSig; /* append sigbit */
|
||||
hwd->hwd_act_boards[flag+3] = (APTR)db->db_SysBase; /* append ExecBase *((APTR*)0x4); */
|
||||
|
||||
if( flag ) /* determine on/off switch */
|
||||
{
|
||||
|
||||
@@ -15,11 +15,14 @@
|
||||
/* sdnet/v2expnet specific: polling timer */
|
||||
#include "intervaltimer.h"
|
||||
|
||||
#define HW_VENDOR "a1k.org Matze Buggs Scrat"
|
||||
#define HW_PRODUCT "Zorro LAN IDE CP"
|
||||
|
||||
/* this struct is available in devicebase and should carry global information */
|
||||
struct HWData {
|
||||
struct Interrupt hwd_Interrupt; /* keep the interrupt at top of HWData !! */
|
||||
struct SignalSemaphore hwd_Sem; /* list locking (global per unit) */
|
||||
APTR hwd_act_boards[MAX_UNITS+1+2]; /* poll all active boards by ptr in interrupt, NULL terminated, followed by SigTask,Sigbit */
|
||||
APTR hwd_act_boards[MAX_UNITS+1+3]; /* poll all active boards by ptr in interrupt, NULL terminated, followed by SigTask,Sigbit,ExecBase */
|
||||
|
||||
ULONG hwd_SigMask; /* signal mask to wait for in server main instance */
|
||||
|
||||
|
||||
@@ -439,6 +439,17 @@
|
||||
#define EIDLED_REVID1 (1<<1)
|
||||
#define EIDLED_REVID0 (1)
|
||||
|
||||
/* ; PHY REGISTERS */
|
||||
#define PHCON1 0
|
||||
#define PHSTAT1 1
|
||||
#define PHANA 4
|
||||
#define PHANLPA 5
|
||||
#define PHANE 6
|
||||
#define PHCON2 0x11
|
||||
#define PHSTAT2 0x1b
|
||||
#define PHSTAT3 0x1f
|
||||
|
||||
|
||||
/* PHCON1 bits --------- */
|
||||
#define PHCON1_PRST (1<<15)
|
||||
#define PHCON1_PLOOPBK (1<<14)
|
||||
|
||||
@@ -437,6 +437,16 @@ EIDLED_REVID2 EQU (1<<2)
|
||||
EIDLED_REVID1 EQU (1<<1)
|
||||
EIDLED_REVID0 EQU (1)
|
||||
|
||||
; PHY REGISTERS
|
||||
PHCON1 EQU 0
|
||||
PHSTAT1 EQU 1
|
||||
PHANA EQU 4
|
||||
PHANLPA EQU 5
|
||||
PHANE EQU 6
|
||||
PHCON2 EQU $11
|
||||
PHSTAT2 EQU $1b
|
||||
PHSTAT3 EQU $1f
|
||||
|
||||
; PHCON1 bits ---------
|
||||
PHCON1_PRST EQU (1<<15)
|
||||
PHCON1_PLOOPBK EQU (1<<14)
|
||||
@@ -598,5 +608,6 @@ CLOCK_16_SET EQU (ECON2_COCON2) ;set mask
|
||||
CLOCK_4_CLR EQU (ECON2_COCON2) ;clr mask
|
||||
CLOCK_4_SET EQU (ECON2_COCON3|ECON2_COCON0|ECON2_COCON1) ;set mask
|
||||
|
||||
; changed to 25 MHz for ZIII firmware
|
||||
CLOCK_DEF_CLR EQU CLOCK_25_CLR
|
||||
CLOCK_DEF_SET EQU CLOCK_25_SET
|
||||
|
||||
Reference in New Issue
Block a user