sm cleaned up
This commit is contained in:
MHeinrichs
@@ -24,17 +24,24 @@
|
||||
<files xmlns="http://www.xilinx.com/XMLSchema">
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||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGDBUILD_LOG" xil_pn:name="LAN_IDE_CP.bld"/>
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||||
<file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="LAN_IDE_CP.cmd_log"/>
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||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_GYD" xil_pn:name="LAN_IDE_CP.gyd"/>
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||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_JEDEC" xil_pn:name="LAN_IDE_CP.jed"/>
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||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="LAN_IDE_CP.lso"/>
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||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MFD" xil_pn:name="LAN_IDE_CP.mfd"/>
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||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGA" xil_pn:name="LAN_IDE_CP.nga"/>
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||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="LAN_IDE_CP.ngc"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGD" xil_pn:name="LAN_IDE_CP.ngd"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="LAN_IDE_CP.ngr"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PNX" xil_pn:name="LAN_IDE_CP.pnx"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="LAN_IDE_CP.prj"/>
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<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.rpt"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="LAN_IDE_CP.stx"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="LAN_IDE_CP.syr"/>
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<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.tspec"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VM6" xil_pn:name="LAN_IDE_CP.vm6"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="LAN_IDE_CP.xst"/>
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<file xil_pn:fileType="FILE_HTML" xil_pn:name="LAN_IDE_CP_envsettings.html"/>
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<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="LAN_IDE_CP_html"/>
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<file xil_pn:fileType="FILE_XRPT" xil_pn:name="LAN_IDE_CP_ngdbuild.xrpt"/>
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<file xil_pn:fileType="FILE_HTML" xil_pn:name="LAN_IDE_CP_summary.html"/>
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<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="LAN_IDE_CP_vhdl.prj"/>
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@@ -48,7 +55,7 @@
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</files>
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<transforms xmlns="http://www.xilinx.com/XMLSchema">
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<transform xil_pn:end_ts="1544746825" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="6322792436244515286" xil_pn:start_ts="1544746813">
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<transform xil_pn:end_ts="1545083163" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="6322792436244515286" xil_pn:start_ts="1545083153">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="WarningsGenerated"/>
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<status xil_pn:value="ReadyToRun"/>
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@@ -65,11 +72,11 @@
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<outfile xil_pn:name="webtalk_pn.xml"/>
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<outfile xil_pn:name="xst"/>
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</transform>
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<transform xil_pn:end_ts="1544746690" xil_pn:in_ck="176569500195729039" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-8537920303570934858" xil_pn:start_ts="1544746690">
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<transform xil_pn:end_ts="1545079613" xil_pn:in_ck="176569500195729039" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-8537920303570934858" xil_pn:start_ts="1545079613">
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<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="ReadyToRun"/>
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</transform>
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<transform xil_pn:end_ts="1544746834" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1544746825">
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<transform xil_pn:end_ts="1545083171" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1545083163">
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||||
<status xil_pn:value="SuccessfullyRun"/>
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<status xil_pn:value="WarningsGenerated"/>
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<status xil_pn:value="ReadyToRun"/>
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@@ -79,12 +86,38 @@
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<outfile xil_pn:name="_ngo"/>
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<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
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</transform>
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<transform xil_pn:end_ts="1544746861" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-1014768965495450326" xil_pn:start_ts="1544746834">
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||||
<transform xil_pn:end_ts="1545083201" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-1014768965495450326" xil_pn:start_ts="1545083171">
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<status xil_pn:value="FailedRun"/>
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<status xil_pn:value="WarningsGenerated"/>
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||||
<status xil_pn:value="ReadyToRun"/>
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<outfile xil_pn:name="LAN_IDE_CP.rpt"/>
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<outfile xil_pn:name="LAN_IDE_CP.tspec"/>
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<outfile xil_pn:name="LAN_IDE_CP_html"/>
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</transform>
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||||
<transform xil_pn:end_ts="1545081837" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1545081834">
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<status xil_pn:value="SuccessfullyRun"/>
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||||
<status xil_pn:value="ReadyToRun"/>
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<status xil_pn:value="OutOfDateForInputs"/>
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||||
<status xil_pn:value="OutOfDateForPredecessor"/>
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<status xil_pn:value="OutOfDateForOutputs"/>
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<status xil_pn:value="InputChanged"/>
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<status xil_pn:value="OutputChanged"/>
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<outfile xil_pn:name="LAN_IDE_CP.jed"/>
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</transform>
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<transform xil_pn:end_ts="1545080319" xil_pn:in_ck="-2520376148396285089" xil_pn:name="TRAN_impactProgrammingTool_CPLD" xil_pn:prop_ck="-3598488201878296819" xil_pn:start_ts="1545080319">
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||||
<status xil_pn:value="SuccessfullyRun"/>
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||||
<status xil_pn:value="ReadyToRun"/>
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||||
<status xil_pn:value="OutOfDateForInputs"/>
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||||
<status xil_pn:value="OutOfDateForPredecessor"/>
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||||
<status xil_pn:value="InputChanged"/>
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||||
</transform>
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||||
<transform xil_pn:name="TRAN_timRpt">
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||||
<status xil_pn:value="AbortedRun"/>
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||||
<status xil_pn:value="ReadyToRun"/>
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||||
<status xil_pn:value="OutOfDateForInputs"/>
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||||
<status xil_pn:value="OutOfDateForPredecessor"/>
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||||
<status xil_pn:value="InputAdded"/>
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||||
<status xil_pn:value="InputChanged"/>
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||||
</transform>
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||||
</transforms>
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||||
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||||
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@@ -63,7 +63,7 @@
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<property xil_pn:name="Equivalent Register Removal XST" xil_pn:value="true" xil_pn:valueState="default"/>
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<property xil_pn:name="Evaluation Development Board" xil_pn:value="None Specified" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="Exhaustive Fit Mode" xil_pn:value="false" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Compact" xil_pn:valueState="non-default" xil_pn:x_locked="true"/>
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||||
<property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Compact" xil_pn:valueState="non-default"/>
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||||
<property xil_pn:name="Filter Files From Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="Functional Model Target Language ArchWiz" xil_pn:value="VHDL" xil_pn:valueState="default"/>
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<property xil_pn:name="Functional Model Target Language Coregen" xil_pn:value="VHDL" xil_pn:valueState="default"/>
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@@ -96,8 +96,8 @@
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<property xil_pn:name="Keep Hierarchy CPLD" xil_pn:value="Yes" xil_pn:valueState="default"/>
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<property xil_pn:name="Language" xil_pn:value="VHDL" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="Last Applied Goal" xil_pn:value="Balanced" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="Last Applied Strategy" xil_pn:value="area;C:/Xilinx/14.7/ISE_DS/ISE/data/area.xds" xil_pn:valueState="non-default"/>
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<property xil_pn:name="Last Unlock Status" xil_pn:value="false" xil_pn:valueState="default"/>
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<property xil_pn:name="Last Applied Strategy" xil_pn:value="area;C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/area.xds" xil_pn:valueState="non-default"/>
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<property xil_pn:name="Last Unlock Status" xil_pn:value="true" xil_pn:valueState="non-default"/>
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||||
<property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
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<property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/>
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@@ -111,8 +111,8 @@
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<property xil_pn:name="Mux Extraction" xil_pn:value="Yes" xil_pn:valueState="default"/>
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<property xil_pn:name="Netlist Hierarchy" xil_pn:value="As Optimized" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="Number of Clock Buffers" xil_pn:value="4" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="Optimization Effort" xil_pn:value="Normal" xil_pn:valueState="default" xil_pn:x_locked="true"/>
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||||
<property xil_pn:name="Optimization Goal" xil_pn:value="Area" xil_pn:valueState="non-default" xil_pn:x_locked="true"/>
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||||
<property xil_pn:name="Optimization Effort" xil_pn:value="Normal" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="Optimization Goal" xil_pn:value="Area" xil_pn:valueState="non-default"/>
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||||
<property xil_pn:name="Other CPLD Fitter Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="Other Compiler Options Fit" xil_pn:value="" xil_pn:valueState="default"/>
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@@ -200,7 +200,7 @@
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<property xil_pn:name="Use Smart Guide" xil_pn:value="false" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="Use Synthesis Constraints File" xil_pn:value="true" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="Use Timing Constraints" xil_pn:value="true" xil_pn:valueState="default"/>
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||||
<property xil_pn:name="User Browsed Strategy Files" xil_pn:value="C:/Xilinx/14.7/ISE_DS/ISE/data/area.xds" xil_pn:valueState="non-default"/>
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||||
<property xil_pn:name="User Browsed Strategy Files" xil_pn:value="C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/area.xds" xil_pn:valueState="non-default"/>
|
||||
<property xil_pn:name="VCCIO Reference Voltage" xil_pn:value="LVTTL" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="VHDL Source Analysis Standard" xil_pn:value="VHDL-93" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Value Range Check" xil_pn:value="false" xil_pn:valueState="default"/>
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||||
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@@ -30,10 +30,10 @@ NGDBUILD Design Results Summary:
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Number of errors: 0
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Number of warnings: 1
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Total memory usage is 4418732 kilobytes
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Total memory usage is 4418716 kilobytes
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Writing NGD file "LAN_IDE_CP.ngd" ...
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Total REAL time to NGDBUILD completion: 6 sec
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Total REAL time to NGDBUILD completion: 5 sec
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Total CPU time to NGDBUILD completion: 5 sec
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Writing NGDBUILD log file "LAN_IDE_CP.bld"...
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@@ -2,6 +2,57 @@ xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/L
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ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
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cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
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xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
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xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
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ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
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cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
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tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
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hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
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xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
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ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
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cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
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xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
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ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
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cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
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ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
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cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
|
||||
@@ -115,81 +115,80 @@ A<23> S:PIN86
|
||||
;The remaining section of the .gyd file is for documentation purposes only.
|
||||
;It shows where your internal equations were placed in the last successful fit.
|
||||
|
||||
PARTITION FB1_5 D_5_IOBUFE D_4_IOBUFE BUF_autoconfig ROM_B_0_OBUF$BUF5
|
||||
$OpTx$FX_DC$25 ROM_B_0_OBUF$BUF4 N0$BUF7/N0$BUF7_TRST ROM_B_0_OBUF$BUF8
|
||||
Z3_ADR_1 ROM_B_0_OBUF$BUF6 ROM_B_0_OBUF$BUF7 Z3_ADR_0
|
||||
ROM_B_0_OBUF$BUF3 Z3_ADR<8>
|
||||
PARTITION FB2_1 $OpTx$FX_DC$42 A_LAN_4_OBUF A_LAN_7_OBUF SHUT_UP
|
||||
A_LAN_6_OBUF N0$BUF5 AUTO_CONFIG_DONE_CYCLE N0$BUF3
|
||||
Dout1<2> D_6_IOBUFE Dout1<6> D_3_IOBUFE
|
||||
Dout1<5> D_7_IOBUFE D_1_IOBUFE Dout1<4>
|
||||
D_8_IOBUFE Dout1<1>
|
||||
PARTITION FB3_1 EXP22_ ROM_B_0_OBUF$BUF2
|
||||
PARTITION FB3_14 N0$BUF6 EXP23_ EXP24_ Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000/Mcompar_lan_adr_sw_cmp_eq0001_AEB_or0000_D2
|
||||
EXP25_
|
||||
PARTITION FB4_1 BUF_LAN_D_INIT<1>__$INT D_0_IOBUFE LAN_WR_RST LAN_RST_SM_FSM_FFd3
|
||||
A_LAN_1_OBUF A_LAN_0_OBUF LAN_RST_SM_FSM_FFd2 A_LAN_3_OBUF
|
||||
LAN_RST_SM_FSM_FFd1 LAN_CS_RST LAN_BASEADR<4> A_LAN_2_OBUF
|
||||
LAN_BASEADR<3> A_LAN_5_OBUF LAN_BASEADR<2> LAN_BASEADR<13>
|
||||
LAN_BASEADR<12> LAN_BASEADR<11>
|
||||
PARTITION FB5_2 ROM_B_0_OBUF$BUF11
|
||||
PARTITION FB5_4 LAN_IRQ_D0 ROM_B_0_OBUF Dout1<7> Dout1<3>
|
||||
Dout1<0> LAN_INT_ENABLE D_2_IOBUFE LAN_BASEADR<15>
|
||||
D_9_IOBUFE LAN_BASEADR<14> D_10_IOBUFE D_11_IOBUFE
|
||||
LAN_BASEADR<10> D_12_IOBUFE LAN_IRQ_OUT
|
||||
PARTITION FB6_2 N0$BUF4 A_LAN_12_OBUF
|
||||
PARTITION FB6_5 A_LAN_13_OBUF A_LAN_10_OBUF
|
||||
PARTITION FB6_8 A_LAN_11_OBUF $OpTx$FX_DC$24 A_LAN_8_OBUF $OpTx$FX_DC$23
|
||||
LAN_WRL_S LAN_BASEADR<9> A_LAN_9_OBUF LAN_BASEADR<5>
|
||||
LAN_BASEADR<1> LAN_BASEADR<0> Z3_DATA<25>
|
||||
PARTITION FB7_1 lan_adr_sw/lan_adr_sw_RSTF LAN_D_INIT<1> D_13_IOBUFE LAN_D_INIT<10>
|
||||
D_14_IOBUFE LAN_A_INIT<6> lan_adr autoconfig
|
||||
Z3_ADR<7> Z3_ADR<6> Z3_ADR<5> D_15_IOBUFE
|
||||
Z3_ADR<4> Z3_ADR<3> LAN_BASEADR<8> LAN_BASEADR<7>
|
||||
LAN_BASEADR<6> lan_adr_sw
|
||||
PARTITION FB8_1 Z3_DATA<27> DQ_12_IOBUFE DQ_14_IOBUFE
|
||||
PARTITION FB1_5 D_5_IOBUFE D_4_IOBUFE
|
||||
PARTITION FB1_8 ROM_B_0_OBUF$BUF5
|
||||
PARTITION FB1_10 ROM_B_0_OBUF$BUF4
|
||||
PARTITION FB1_12 ROM_B_0_OBUF$BUF8 N0$BUF7/N0$BUF7_TRST ROM_B_0_OBUF$BUF6 ROM_B_0_OBUF$BUF7
|
||||
autoconfig ROM_B_0_OBUF$BUF3 Z3_ADR<10>
|
||||
PARTITION FB2_1 LAN_IRQ_D0 A_LAN_4_OBUF A_LAN_7_OBUF Dout1<7>
|
||||
A_LAN_6_OBUF N0$BUF5 Dout1<3> N0$BUF3
|
||||
Dout1<0> D_6_IOBUFE D_9_IOBUFE/D_9_IOBUFE_TRST D_3_IOBUFE
|
||||
DQ_9_IOBUFE/DQ_9_IOBUFE_TRST D_7_IOBUFE D_1_IOBUFE LAN_INT_ENABLE
|
||||
D_8_IOBUFE LAN_IRQ_OUT
|
||||
PARTITION FB3_2 ROM_B_0_OBUF$BUF2
|
||||
PARTITION FB3_14 N0$BUF6 EXP22_ EXP23_ $OpTx$INV$5
|
||||
EXP24_
|
||||
PARTITION FB4_1 $OpTx$INV$4 D_0_IOBUFE SHUT_UP LAN_D_INIT<1>
|
||||
A_LAN_1_OBUF A_LAN_0_OBUF LAN_A_INIT<6> A_LAN_3_OBUF
|
||||
LAN_BASEADR<9> LAN_BASEADR<8> LAN_BASEADR<15> A_LAN_2_OBUF
|
||||
LAN_BASEADR<12> A_LAN_5_OBUF LAN_BASEADR<11> LAN_BASEADR<10>
|
||||
LAN_BASEADR<0> EXP25_
|
||||
PARTITION FB5_1 LAN_SM_FSM_FFd6 ROM_B_0_OBUF$BUF11 LAN_SM_FSM_FFd5 LAN_SM_FSM_FFd2
|
||||
ROM_B_0_OBUF $OpTx$FX_DC$8 $OpTx$FX_DC$7 $OpTx$FX_DC$34
|
||||
LAN_SM_FSM_FFd8 D_2_IOBUFE LAN_SM_FSM_FFd7 D_9_IOBUFE
|
||||
LAN_SM_FSM_FFd3 D_10_IOBUFE D_11_IOBUFE LAN_SM_FSM_FFd10
|
||||
D_12_IOBUFE LAN_RD_S
|
||||
PARTITION FB6_1 $OpTx$FX_DC$6 N0$BUF4 A_LAN_12_OBUF $OpTx$FX_DC$41
|
||||
A_LAN_13_OBUF A_LAN_10_OBUF $OpTx$FX_DC$36 A_LAN_11_OBUF
|
||||
$OpTx$FX_DC$26 A_LAN_8_OBUF LAN_SM_FSM_FFd1 lan_adr
|
||||
Z3_ADR<13> A_LAN_9_OBUF Z3_ADR<12> Z3_ADR<11>
|
||||
LAN_WRL_S dq_swap
|
||||
PARTITION FB7_3 D_13_IOBUFE
|
||||
PARTITION FB7_5 D_14_IOBUFE
|
||||
PARTITION FB7_9 BUF_LAN_SM_RST LAN_WR_RST LAN_RST_SM_FSM_FFd1 D_15_IOBUFE
|
||||
LAN_D_INIT<8> LAN_CS_RST LAN_WRH_S LAN_RST_SM_FSM_FFd3
|
||||
LAN_RST_SM_FSM_FFd2 DQ_DATA<3>
|
||||
PARTITION FB8_1 EXP26_ DQ_12_IOBUFE DQ_14_IOBUFE
|
||||
PARTITION FB8_5 LAN_WRH_OBUF
|
||||
PARTITION FB8_8 LAN_CS_OBUF
|
||||
PARTITION FB8_10 LAN_RD_OBUF
|
||||
PARTITION FB8_15 EXP26_ Z3_DATA<26> Z3_DATA<19> Z3_DATA<18>
|
||||
PARTITION FB8_8 LAN_CS_OBUF LAN_A_INIT<3> LAN_RD_OBUF $OpTx$FX_SC$43
|
||||
$OpTx$FX_DC$38 LAN_SM_FSM_FFd9 LAN_SM_FSM_FFd12 LAN_SM_FSM_FFd11
|
||||
LAN_BASEADR<1> DQ_DATA<9> DQ_DATA<1>
|
||||
PARTITION FB9_1 DQ_DATA<4> EXP27_
|
||||
PARTITION FB9_11 Z3_DATA<0> EXP28_ DQ_DATA<5> Z3_DATA<1>
|
||||
EXP29_ DQ_DATA<13> Z3_DATA<2> DQ_DATA<12>
|
||||
|
||||
PARTITION FB9_1 EXP27_
|
||||
PARTITION FB9_10 EXP28_ Z3_DATA<0> EXP29_ EXP30_
|
||||
Z3_DATA<1> Z3_DATA<24> Z3_DATA<17> Z3_DATA<2>
|
||||
Z3_DATA<16>
|
||||
PARTITION FB10_1 lan_rdy/lan_rdy_RSTF DQ_1_IOBUFE DQ_0_IOBUFE Z3_DATA<7>/Z3_DATA<7>_TRST
|
||||
DQ_3_IOBUFE DQ_2_IOBUFE $OpTx$FX_DC$66 DQ_5_IOBUFE
|
||||
DQ_14_IOBUFE/DQ_14_IOBUFE_TRST DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE
|
||||
DQ_11_IOBUFE/DQ_11_IOBUFE_TRST DQ_8_IOBUFE $OpTx$FX_DC$61 $OpTx$FX_DC$49
|
||||
DQ_10_IOBUFE Z3_ADR<10>
|
||||
PARTITION FB11_1 LAN_SM_FSM_FFd1 BUF_LAN_RD_S Z3_DATA<3> Z3_ADR<9>
|
||||
Z3_DATA<4> Z3_ADR<12> Z3_ADR<11> LAN_SM_FSM_FFd3
|
||||
$OpTx$FX_DC$326 Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF1
|
||||
lan_rdy ROM_B_0_OBUF$BUF0 BUF_LAN_SM_FSM_FFd2 Z3_A_LOW
|
||||
ROM_B_0_OBUF$BUF9 BUF_LAN_SM_FSM_FFd4__$INT
|
||||
PARTITION FB12_1 EXP31_ N0$BUF2
|
||||
PARTITION FB10_1 $OpTx$FX_DC$17 DQ_1_IOBUFE DQ_0_IOBUFE AUTO_CONFIG_DONE_CYCLE
|
||||
DQ_3_IOBUFE DQ_2_IOBUFE Dout1<2> DQ_5_IOBUFE
|
||||
LAN_BASEADR<14> DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE
|
||||
Dout1<6> DQ_8_IOBUFE Dout1<5> Dout1<4>
|
||||
DQ_10_IOBUFE Dout1<1>
|
||||
PARTITION FB11_2 BUF_LAN_SM_FSM_FFd9 Z3_DATA<3> $OpTx$FX_DC$35 Z3_DATA<4>
|
||||
Z3_DATA<31> Z3_DATA<30> Z3_DATA<29> Z3_DATA<23>
|
||||
Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF1 Z3_DATA<22>
|
||||
ROM_B_0_OBUF$BUF0 Z3_DATA<21> DQ_DATA<8> ROM_B_0_OBUF$BUF9
|
||||
DQ_DATA<0>
|
||||
PARTITION FB12_2 N0$BUF2
|
||||
PARTITION FB12_5 DQ_15_IOBUFE
|
||||
PARTITION FB12_8 DQ_13_IOBUFE
|
||||
PARTITION FB12_10 DQ_11_IOBUFE
|
||||
PARTITION FB12_12 DQ_9_IOBUFE
|
||||
PARTITION FB12_14 LAN_D_INIT<9> LAN_A_INIT<3> LAN_WRH_S Z3_DATA<31>
|
||||
Z3_DATA<23>
|
||||
PARTITION FB13_1 LAN_SM_FSM_FFd4 ROM_B_0_OBUF$BUF10
|
||||
PARTITION FB13_7 EXP32_ Z3_DATA<7> EXP33_
|
||||
PARTITION FB13_11 LAN_SM_FSM_FFd2 LAN_RD_S $OpTx$FX_DC$325 LAN_WRL_OBUF
|
||||
Z3_DATA<30> Z3_DATA<28> Z3_DATA<22> Z3_DATA<20>
|
||||
PARTITION FB12_7 lan_adr/lan_adr_RSTF DQ_13_IOBUFE LAN_BASEADR<7> DQ_11_IOBUFE
|
||||
LAN_BASEADR<6> DQ_9_IOBUFE LAN_BASEADR<5> LAN_BASEADR<4>
|
||||
LAN_BASEADR<3> LAN_BASEADR<2> LAN_BASEADR<13> BUF_lan_adr
|
||||
|
||||
PARTITION FB13_1 LAN_SM_RST ROM_B_0_OBUF$BUF10
|
||||
PARTITION FB13_8 Z3_DATA<7>
|
||||
PARTITION FB13_13 LAN_SM_FSM_FFd4 LAN_WRL_OBUF DQ_DATA<7> DQ_DATA<6>
|
||||
DQ_DATA<15> DQ_DATA<14>
|
||||
PARTITION FB14_3 N0$BUF0
|
||||
PARTITION FB14_11 CFOUT_OBUF
|
||||
PARTITION FB14_14 SLAVE_OBUF N0
|
||||
|
||||
PARTITION FB15_1 EXP34_ Z3_DATA<29> Z3_ADR<13> Z3_ADR<2>
|
||||
$OpTx$FX_DC$268
|
||||
PARTITION FB15_12 N0$BUF7 EXP35_ Z3_DATA<15> Z3_DATA<14>
|
||||
EXP36_ Z3_DATA<13> Z3_DATA<21>
|
||||
PARTITION FB16_1 EXP37_ Z3_DATA<12> Z3_DATA<11> EXP38_
|
||||
EXP39_ Z3_DATA<10> EXP40_ Z3_DATA<9>
|
||||
EXP41_ N0$BUF1 Z3_DATA<8> EXP42_
|
||||
PARTITION FB14_5 $OpTx$FX_DC$19 Z3_ADR_1 Z3_ADR_0 Z3_ADR<9>
|
||||
Z3_ADR<8> Z3_ADR<7> CFOUT_OBUF Z3_ADR<6>
|
||||
Z3_ADR<5> SLAVE_OBUF N0 Z3_ADR<4>
|
||||
Z3_ADR<3> Z3_ADR<2>
|
||||
PARTITION FB15_1 DQ_DATA<11> EXP30_
|
||||
PARTITION FB15_12 N0$BUF7 DQ_DATA<2> Z3_DATA<15> Z3_DATA<14>
|
||||
|
||||
|
||||
PARTITION FB15_17 Z3_DATA<13> DQ_DATA<10>
|
||||
PARTITION FB16_1 lan_rdy Z3_DATA<12> Z3_DATA<11> Z3_DATA<28>
|
||||
Z3_DATA<27> Z3_DATA<10> Z3_DATA<26> Z3_DATA<9>
|
||||
Z3_DATA<25> N0$BUF1 Z3_DATA<8> Z3_DATA<24>
|
||||
Z3_DATA<20> Z3_DATA<19> Z3_DATA<18> Z3_DATA<17>
|
||||
Z3_DATA<16> Z3_A_LOW
|
||||
|
||||
|
||||
+1110
-1110
File diff suppressed because it is too large
Load Diff
+2007
-2202
File diff suppressed because it is too large
Load Diff
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
@@ -1,7 +1,7 @@
|
||||
Release 8.1i - Fit P.20131013
|
||||
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
|
||||
|
||||
12-14-2018 1:22AM
|
||||
12-17-2018 10:59PM
|
||||
|
||||
NOTE: This file is designed to be imported into a spreadsheet program
|
||||
such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
|
||||
|
||||
File diff suppressed because one or more lines are too long
+1468
-1582
File diff suppressed because it is too large
Load Diff
@@ -3,14 +3,14 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
|
||||
--> Parameter TMPDIR set to xst/projnav.tmp
|
||||
|
||||
|
||||
Total REAL time to Xst completion: 0.00 secs
|
||||
Total CPU time to Xst completion: 0.14 secs
|
||||
Total REAL time to Xst completion: 1.00 secs
|
||||
Total CPU time to Xst completion: 0.13 secs
|
||||
|
||||
--> Parameter xsthdpdir set to xst
|
||||
|
||||
|
||||
Total REAL time to Xst completion: 0.00 secs
|
||||
Total CPU time to Xst completion: 0.15 secs
|
||||
Total REAL time to Xst completion: 1.00 secs
|
||||
Total CPU time to Xst completion: 0.13 secs
|
||||
|
||||
--> Reading design: LAN_IDE_CP.prj
|
||||
|
||||
@@ -43,7 +43,7 @@ Target Device : XC9500XL CPLDs
|
||||
---- Source Options
|
||||
Top Module Name : LAN_IDE_CP
|
||||
Automatic FSM Extraction : YES
|
||||
FSM Encoding Algorithm : Compact
|
||||
FSM Encoding Algorithm : Auto
|
||||
Safe Implementation : No
|
||||
Mux Extraction : Yes
|
||||
Resource Sharing : YES
|
||||
@@ -55,7 +55,7 @@ XOR Preserve : YES
|
||||
Equivalent register Removal : YES
|
||||
|
||||
---- General Options
|
||||
Optimization Goal : Area
|
||||
Optimization Goal : Speed
|
||||
Optimization Effort : 1
|
||||
Keep Hierarchy : Yes
|
||||
Netlist Hierarchy : As_Optimized
|
||||
@@ -71,14 +71,13 @@ wysiwyg : NO
|
||||
|
||||
=========================================================================
|
||||
|
||||
Setting FSM Encoding Algorithm to : OPT
|
||||
|
||||
|
||||
=========================================================================
|
||||
* HDL Compilation *
|
||||
=========================================================================
|
||||
Compiling vhdl file "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd" in Library work.
|
||||
Architecture behavioral of Entity lan_ide_cp is up to date.
|
||||
Entity <lan_ide_cp> compiled.
|
||||
Entity <lan_ide_cp> (Architecture <behavioral>) compiled.
|
||||
|
||||
=========================================================================
|
||||
* Design Hierarchy Analysis *
|
||||
@@ -90,6 +89,8 @@ Analyzing hierarchy for entity <LAN_IDE_CP> in library <work> (architecture <beh
|
||||
* HDL Analysis *
|
||||
=========================================================================
|
||||
Analyzing Entity <LAN_IDE_CP> in library <work> (Architecture <behavioral>).
|
||||
WARNING:Xst:819 - "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd" line 291: One or more signals are missing in the process sensitivity list. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are:
|
||||
<LAN_SM_RST>
|
||||
Entity <LAN_IDE_CP> analyzed. Unit <LAN_IDE_CP> generated.
|
||||
|
||||
|
||||
@@ -115,18 +116,19 @@ WARNING:Xst:647 - Input <CP_IRQ> is never used. This port will be preserved and
|
||||
WARNING:Xst:2565 - Inout <A<1>> is never assigned.
|
||||
WARNING:Xst:647 - Input <MTCR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
||||
WARNING:Xst:647 - Input <C1> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
||||
INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
|
||||
Found finite state machine <FSM_0> for signal <LAN_SM>.
|
||||
-----------------------------------------------------------------------
|
||||
| States | 13 |
|
||||
| Transitions | 25 |
|
||||
| States | 12 |
|
||||
| Transitions | 24 |
|
||||
| Inputs | 8 |
|
||||
| Outputs | 14 |
|
||||
| Outputs | 12 |
|
||||
| Clock | CLK_EXT (rising_edge) |
|
||||
| Reset | LAN_SM$or0000 (positive) |
|
||||
| Reset | LAN_SM_RST (positive) |
|
||||
| Reset type | asynchronous |
|
||||
| Reset State | nop |
|
||||
| Power Up State | nop |
|
||||
| Encoding | compact |
|
||||
| Encoding | automatic |
|
||||
| Implementation | automatic |
|
||||
-----------------------------------------------------------------------
|
||||
Found finite state machine <FSM_1> for signal <LAN_RST_SM>.
|
||||
@@ -134,13 +136,13 @@ WARNING:Xst:647 - Input <C1> is never used. This port will be preserved and left
|
||||
| States | 8 |
|
||||
| Transitions | 8 |
|
||||
| Inputs | 0 |
|
||||
| Outputs | 18 |
|
||||
| Outputs | 30 |
|
||||
| Clock | CLK_EXT (rising_edge) |
|
||||
| Reset | RESET (positive) |
|
||||
| Reset type | asynchronous |
|
||||
| Reset State | nop |
|
||||
| Power Up State | nop |
|
||||
| Encoding | compact |
|
||||
| Encoding | automatic |
|
||||
| Implementation | automatic |
|
||||
-----------------------------------------------------------------------
|
||||
Found 16x8-bit ROM for signal <Dout1$mux0004>.
|
||||
@@ -172,11 +174,12 @@ WARNING:Xst:647 - Input <C1> is never used. This port will be preserved and left
|
||||
Found 1-bit register for signal <AUTO_CONFIG_DONE_CYCLE>.
|
||||
Found 1-bit register for signal <autoconfig>.
|
||||
Found 8-bit register for signal <Dout1>.
|
||||
Found 16-bit register for signal <DQ_DATA>.
|
||||
Found 1-bit register for signal <dq_swap>.
|
||||
Found 16-bit comparator equal for signal <dq_swap$cmp_eq0000> created at line 247.
|
||||
Found 2-bit comparator less for signal <dq_swap$cmp_lt0000> created at line 248.
|
||||
Found 14-bit register for signal <LAN_A_INIT>.
|
||||
Found 1-bit register for signal <lan_adr>.
|
||||
Found 1-bit register for signal <lan_adr_sw>.
|
||||
Found 16-bit comparator equal for signal <lan_adr_sw$cmp_eq0001> created at line 239.
|
||||
Found 2-bit comparator less for signal <lan_adr_sw$cmp_lt0000> created at line 241.
|
||||
Found 16-bit register for signal <LAN_BASEADR>.
|
||||
Found 1-bit register for signal <LAN_CS_RST>.
|
||||
Found 16-bit register for signal <LAN_D_INIT>.
|
||||
@@ -185,6 +188,7 @@ WARNING:Xst:647 - Input <C1> is never used. This port will be preserved and left
|
||||
Found 1-bit register for signal <LAN_IRQ_OUT>.
|
||||
Found 1-bit register for signal <LAN_RD_S>.
|
||||
Found 1-bit register for signal <lan_rdy>.
|
||||
Found 1-bit register for signal <LAN_SM_RST>.
|
||||
Found 1-bit register for signal <LAN_WR_RST>.
|
||||
Found 1-bit register for signal <LAN_WRH_S>.
|
||||
Found 1-bit register for signal <LAN_WRL_S>.
|
||||
@@ -207,10 +211,10 @@ HDL Synthesis Report
|
||||
Macro Statistics
|
||||
# ROMs : 1
|
||||
16x8-bit ROM : 1
|
||||
# Registers : 53
|
||||
1-bit register : 48
|
||||
# Registers : 55
|
||||
1-bit register : 49
|
||||
14-bit register : 2
|
||||
16-bit register : 2
|
||||
16-bit register : 3
|
||||
8-bit register : 1
|
||||
# Comparators : 2
|
||||
16-bit comparator equal : 1
|
||||
@@ -225,37 +229,39 @@ Macro Statistics
|
||||
* Advanced HDL Synthesis *
|
||||
=========================================================================
|
||||
|
||||
Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with compact encoding.
|
||||
Analyzing FSM <FSM_1> for best encoding.
|
||||
Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with gray encoding.
|
||||
------------------------
|
||||
State | Encoding
|
||||
------------------------
|
||||
nop | 000
|
||||
wait0 | 100
|
||||
clr | 101
|
||||
clr_commit | 111
|
||||
wait1 | 001
|
||||
set | 011
|
||||
set_commit | 010
|
||||
done | 110
|
||||
wait0 | 001
|
||||
clr | 011
|
||||
clr_commit | 010
|
||||
wait1 | 110
|
||||
set | 111
|
||||
set_commit | 101
|
||||
done | 100
|
||||
------------------------
|
||||
Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:4]> with compact encoding.
|
||||
-------------------------------
|
||||
Analyzing FSM <FSM_0> for best encoding.
|
||||
Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:12]> with one-hot encoding.
|
||||
-----------------------------------
|
||||
State | Encoding
|
||||
-------------------------------
|
||||
nop | 0000
|
||||
start_read_upper | 0101
|
||||
wait_read_upper | 0111
|
||||
end_read_upper | 0110
|
||||
start_read_lower | 0001
|
||||
wait_read_lower | 0011
|
||||
end_read_lower | 0010
|
||||
start_write_upper | 1101
|
||||
wait_write_upper | 1111
|
||||
end_write_upper | 1110
|
||||
start_write_lower | 1001
|
||||
wait_write_lower | 1011
|
||||
end_write_lower | 1010
|
||||
-------------------------------
|
||||
-----------------------------------
|
||||
nop | 000000000001
|
||||
start_read_upper | unreached
|
||||
wait_read_upper | 000000000010
|
||||
end_read_upper | 000000100000
|
||||
start_read_lower | 000001000000
|
||||
wait_read_lower | 000000000100
|
||||
end_read_lower | 000010000000
|
||||
start_write_upper | 000000001000
|
||||
wait_write_upper | 000100000000
|
||||
end_write_upper | 001000000000
|
||||
start_write_lower | 000000010000
|
||||
wait_write_lower | 010000000000
|
||||
end_write_lower | 100000000000
|
||||
-----------------------------------
|
||||
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <13>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <12>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <11>. This FF/Latch will be trimmed during the optimization process.
|
||||
@@ -272,7 +278,6 @@ WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <15>. This FF
|
||||
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <14>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <13>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <12>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <8>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <7>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <6>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <5>. This FF/Latch will be trimmed during the optimization process.
|
||||
@@ -301,7 +306,6 @@ WARNING:Xst:1293 - FF/Latch <LAN_D_INIT_15> has a constant value of 0 in block <
|
||||
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_14> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_13> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_12> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_8> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_7> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_6> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_5> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
|
||||
@@ -320,10 +324,11 @@ WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_4> has a
|
||||
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_2> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_1> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_0> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
|
||||
INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_10> in Unit <LAN_IDE_CP> is equivalent to the following FF/Latch, which will be removed : <LAN_D_INIT_11>
|
||||
INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_1> in Unit <LAN_IDE_CP> is equivalent to the following FF/Latch, which will be removed : <LAN_D_INIT_4>
|
||||
INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_8> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_10> <LAN_D_INIT_11>
|
||||
INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_1> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_4> <LAN_D_INIT_9>
|
||||
|
||||
Optimizing unit <LAN_IDE_CP> ...
|
||||
implementation constraint: INIT=s : LAN_SM_FSM_FFd12
|
||||
implementation constraint: INIT=s : Dout1_7
|
||||
implementation constraint: INIT=s : Dout1_6
|
||||
implementation constraint: INIT=s : Dout1_5
|
||||
@@ -335,8 +340,7 @@ Optimizing unit <LAN_IDE_CP> ...
|
||||
implementation constraint: INIT=s : Dout1_1
|
||||
implementation constraint: INIT=s : Dout1_0
|
||||
implementation constraint: INIT=r : LAN_D_INIT_1
|
||||
implementation constraint: INIT=r : LAN_D_INIT_9
|
||||
implementation constraint: INIT=r : LAN_D_INIT_10
|
||||
implementation constraint: INIT=r : LAN_D_INIT_8
|
||||
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd1
|
||||
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd2
|
||||
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd3
|
||||
@@ -344,6 +348,13 @@ Optimizing unit <LAN_IDE_CP> ...
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd2
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd3
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd4
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd5
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd6
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd7
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd8
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd9
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd10
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd11
|
||||
|
||||
=========================================================================
|
||||
* Partition Report *
|
||||
@@ -363,7 +374,7 @@ Final Results
|
||||
RTL Top Level Output File Name : LAN_IDE_CP.ngr
|
||||
Top Level Output File Name : LAN_IDE_CP
|
||||
Output Format : NGC
|
||||
Optimization Goal : Area
|
||||
Optimization Goal : Speed
|
||||
Keep Hierarchy : Yes
|
||||
Target Technology : XC9500XL CPLDs
|
||||
Macro Preserve : YES
|
||||
@@ -375,22 +386,25 @@ Design Statistics
|
||||
# IOs : 116
|
||||
|
||||
Cell Usage :
|
||||
# BELS : 892
|
||||
# AND2 : 351
|
||||
# AND3 : 18
|
||||
# AND4 : 2
|
||||
# BELS : 789
|
||||
# AND2 : 252
|
||||
# AND3 : 33
|
||||
# AND4 : 7
|
||||
# AND8 : 4
|
||||
# GND : 1
|
||||
# INV : 253
|
||||
# OR2 : 248
|
||||
# OR3 : 1
|
||||
# OR4 : 1
|
||||
# INV : 235
|
||||
# OR2 : 199
|
||||
# OR3 : 22
|
||||
# OR4 : 2
|
||||
# OR8 : 16
|
||||
# VCC : 1
|
||||
# XOR2 : 16
|
||||
# FlipFlops/Latches : 98
|
||||
# FDC : 20
|
||||
# XOR2 : 17
|
||||
# FlipFlops/Latches : 122
|
||||
# FD : 1
|
||||
# FDC : 26
|
||||
# FDCE : 3
|
||||
# FDP : 57
|
||||
# FDPE : 18
|
||||
# FDP : 42
|
||||
# FDPE : 50
|
||||
# IO Buffers : 109
|
||||
# IBUF : 19
|
||||
# IOBUFE : 48
|
||||
@@ -400,13 +414,13 @@ Cell Usage :
|
||||
|
||||
|
||||
Total REAL time to Xst completion: 9.00 secs
|
||||
Total CPU time to Xst completion: 9.35 secs
|
||||
Total CPU time to Xst completion: 8.22 secs
|
||||
|
||||
-->
|
||||
|
||||
Total memory usage is 4534748 kilobytes
|
||||
Total memory usage is 4534836 kilobytes
|
||||
|
||||
Number of errors : 0 ( 0 filtered)
|
||||
Number of warnings : 53 ( 0 filtered)
|
||||
Number of infos : 9 ( 0 filtered)
|
||||
Number of warnings : 52 ( 0 filtered)
|
||||
Number of infos : 10 ( 0 filtered)
|
||||
|
||||
|
||||
+507
-364
@@ -1,157 +1,77 @@
|
||||
TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<10>.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<10>.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<0>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<0>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<10>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<10>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<11>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<11>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<9>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<12>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<12>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<13>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<13>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<14>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<14>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<15>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<15>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<10>.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<10>.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<1>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<1>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<2>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<2>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<3>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<3>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<9>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<4>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<4>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<5>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<5>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<6>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<6>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<7>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<7>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<8>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<8>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<9>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<9>.CE:400
|
||||
TS_CLK_EXT:FROM:Dout1<7>.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:LAN_INT_ENABLE.Q:TO:LAN_INT_ENABLE.D:400
|
||||
@@ -201,233 +121,456 @@ TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:LAN_IRQ_OUT.D:400
|
||||
TS_CLK_EXT:FROM:LAN_INT_ENABLE.Q:TO:LAN_IRQ_OUT.D:400
|
||||
TS_CLK_EXT:FROM:LAN_IRQ_D0.Q:TO:LAN_IRQ_OUT.D:400
|
||||
TS_CLK_EXT:FROM:LAN_IRQ_OUT.Q:TO:LAN_IRQ_OUT.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd4.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd4.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd4.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd4.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<16>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<16>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<17>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<17>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<18>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<18>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<19>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<19>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<20>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<20>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<21>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<21>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<22>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<22>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<23>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<23>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<24>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<24>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<25>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<25>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<26>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<26>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<27>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<27>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<28>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<28>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<29>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<29>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<30>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<30>.CE:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<31>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<31>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_SM_FSM_FFd12.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd12.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:LAN_SM_FSM_FFd7.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:LAN_SM_FSM_FFd7.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd7.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:LAN_SM_FSM_FFd5.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:LAN_SM_FSM_FFd5.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd5.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:LAN_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd2.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd3.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_SM_FSM_FFd8.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd8.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd8.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:LAN_SM_FSM_FFd10.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_SM_FSM_FFd10.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd10.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:LAN_SM_FSM_FFd4.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd4.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:LAN_SM_FSM_FFd6.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd6.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_SM_FSM_FFd9.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd9.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd1.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_SM_FSM_FFd11.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd11.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<0>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<1>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<9>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<2>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<10>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<3>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<10>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<4>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<5>.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<6>.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<7>.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<0>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<1>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<9>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<2>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<10>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<3>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<10>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<4>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<5>.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<6>.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_A_LOW.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<7>.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_D_INIT<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_D_INIT<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_D_INIT<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_D_INIT<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_WR_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_WR_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<8>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<0>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<0>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<2>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<10>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<3>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<11>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<4>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<12>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<5>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<13>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<6>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<14>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<7>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<15>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<1>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<1>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<2>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<2>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<3>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<3>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<4>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<4>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<5>.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<5>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<6>.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<6>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<7>.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<7>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<0>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<8>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Dout1<1>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<9>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_WR_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_WR_RST.D:400
|
||||
TS_CLK_EXT:FROM:SHUT_UP.Q:TO:SHUT_UP.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_A_INIT<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_A_INIT<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_A_INIT<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_CS_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_CS_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_CS_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_WRH_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_CS_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_RD_S.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:LAN_WRH_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_WRH_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_WRH_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:LAN_WRH_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRH_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_WRL_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_WRH_S.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:LAN_WRL_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_WRL_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_WRL_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:LAN_WRL_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRL_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:lan_rdy.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:lan_rdy.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:lan_rdy.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_WRL_S.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_A_LOW.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:lan_rdy.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:lan_rdy.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:lan_rdy.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:lan_rdy.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:lan_rdy.RSTF:400
|
||||
TS_CLK_EXT:FROM:AUTO_CONFIG_DONE_CYCLE.Q:TO:CFOUT_OBUF.D:400
|
||||
|
||||
@@ -113,7 +113,7 @@ architecture Behavioral of LAN_IDE_CP is
|
||||
SIGNAL LAN_SM: lan_bus_sm :=nop;
|
||||
SIGNAL autoconfig: STD_LOGIC;
|
||||
SIGNAL lan_adr: STD_LOGIC;
|
||||
SIGNAL lan_adr_sw: STD_LOGIC;
|
||||
SIGNAL dq_swap: STD_LOGIC;
|
||||
signal Dout1:STD_LOGIC_VECTOR(7 downto 0):=x"FF";
|
||||
signal AUTO_CONFIG_DONE:STD_LOGIC;
|
||||
signal AUTO_CONFIG_DONE_CYCLE:STD_LOGIC;
|
||||
@@ -130,8 +130,10 @@ architecture Behavioral of LAN_IDE_CP is
|
||||
signal Z3_ADR:STD_LOGIC_VECTOR(15 downto 2);
|
||||
signal Z3_DATA_IN:STD_LOGIC_VECTOR(31 downto 0);
|
||||
signal Z3_DATA:STD_LOGIC_VECTOR(31 downto 0);
|
||||
signal DQ_DATA:STD_LOGIC_VECTOR(15 downto 0);
|
||||
signal Z3_DS:STD_LOGIC;
|
||||
signal Z3_A_LOW:STD_LOGIC;
|
||||
signal LAN_SM_RST:STD_LOGIC;
|
||||
|
||||
signal LAN_CS_RST: std_logic;
|
||||
signal LAN_WR_RST: std_logic;
|
||||
@@ -141,8 +143,9 @@ architecture Behavioral of LAN_IDE_CP is
|
||||
constant LAN_A_CLRREG:STD_LOGIC_VECTOR(13 downto 0) :="11"&x"FF7";
|
||||
constant LAN_A_SETREG:STD_LOGIC_VECTOR(13 downto 0) :="11"&x"FB7";
|
||||
--constant LAN_D_SET:STD_LOGIC_VECTOR(15 downto 0) := "0000000100010000"; --33MHz
|
||||
--constant LAN_D_CLR:STD_LOGIC_VECTOR(15 downto 0) := "0000111000000000"; --33MHz
|
||||
constant LAN_D_SET:STD_LOGIC_VECTOR(15 downto 0) := "0000001000010010"; --25MHz
|
||||
constant LAN_D_CLR:STD_LOGIC_VECTOR(15 downto 0) := "0000111000000000";
|
||||
constant LAN_D_CLR:STD_LOGIC_VECTOR(15 downto 0) := "0000110100000000"; --25MHz
|
||||
|
||||
Function to_std_logic(X: in Boolean) return Std_Logic is
|
||||
variable ret : std_logic;
|
||||
@@ -225,21 +228,25 @@ begin
|
||||
if(DECODE_RESET ='0')then
|
||||
autoconfig <= '0';
|
||||
lan_adr <= '0';
|
||||
lan_adr_sw <= '0';
|
||||
dq_swap <= '0';
|
||||
Z3_ADR <= (others => '1');
|
||||
elsif(falling_edge(FCS))then
|
||||
--default values
|
||||
autoconfig <= '0';
|
||||
lan_adr <= '0';
|
||||
lan_adr_sw <= '0';
|
||||
dq_swap <= '0';
|
||||
Z3_ADR(15 downto 2) <= A(15 downto 2);-- latch the whole address for the whole cycle
|
||||
|
||||
--use D(15 downto 8)& A(23 downto 16) = A(31 downto 16) for quick response
|
||||
--autoconfig
|
||||
if(Z3='1' and (D(15 downto 8)& A(23 downto 16)) = x"FF00" and AUTO_CONFIG_DONE = '0' and CFIN='0')then
|
||||
autoconfig <= '1';
|
||||
elsif(Z3='1' and (D(15 downto 8) & A(23 downto 16)) = LAN_BASEADR and SHUT_UP='0' )then
|
||||
end if;
|
||||
|
||||
--lan base
|
||||
if(Z3='1' and (D(15 downto 8) & A(23 downto 16)) = LAN_BASEADR and SHUT_UP='0' )then
|
||||
if(A(14 downto 13)<"11")then
|
||||
lan_adr_sw <= '1';
|
||||
dq_swap <= '1';
|
||||
end if;
|
||||
lan_adr <= '1';
|
||||
end if;
|
||||
@@ -268,17 +275,30 @@ begin
|
||||
end if;
|
||||
end process lan_int_proc;
|
||||
|
||||
--clock this signal to avoid glitches due to short resets
|
||||
lan_rst_gen: process (CLK_EXT)
|
||||
begin
|
||||
if rising_edge(CLK_EXT) then
|
||||
if(FCS ='1' or reset = '0') then
|
||||
LAN_SM_RST <='1';
|
||||
else
|
||||
LAN_SM_RST <='0';
|
||||
end if;
|
||||
end if;
|
||||
end process lan_rst_gen;
|
||||
|
||||
--lan signal generation: all Signals are HIGH active!
|
||||
lan_rw_gen: process (CLK_EXT,FCS,reset)
|
||||
begin
|
||||
if(FCS ='1' or reset = '0') then
|
||||
if(LAN_SM_RST ='1' ) then
|
||||
LAN_SM <=nop;
|
||||
LAN_RD_S <= '0';
|
||||
LAN_WRH_S <= '0';
|
||||
LAN_WRL_S <= '0';
|
||||
Z3_A_LOW <= '0';
|
||||
Z3_DATA <= x"FFFFFFFF";
|
||||
lan_rdy <='0';
|
||||
Z3_DATA(31 downto 0) <= x"FFFFFFFF";
|
||||
DQ_DATA(15 downto 0) <= x"FFFF";
|
||||
elsif rising_edge(CLK_EXT) then
|
||||
--default values
|
||||
LAN_RD_S <= '0';
|
||||
@@ -288,29 +308,54 @@ begin
|
||||
lan_rdy <='0';
|
||||
case LAN_SM is
|
||||
when nop=>
|
||||
if(lan_adr = '1' and Z3_DS = '0' and Z3_ADR(15) = '0' )then --cycle start!
|
||||
-- prepare the data for write
|
||||
if(lan_adr_sw='0') then
|
||||
Z3_DATA(31 downto 0) <= Z3_DATA_IN(31 downto 0);
|
||||
|
||||
|
||||
-- prepare the data for write
|
||||
-- this is a quite complex thing for a cpld
|
||||
-- so I have to move this out of the cycle start condition and prepare it for every loop
|
||||
if(UDS='0' or LDS='0')then
|
||||
if(dq_swap='0') then
|
||||
DQ_DATA(15 downto 0) <= Z3_DATA_IN(31 downto 16);
|
||||
else
|
||||
Z3_DATA(31 downto 0) <= Z3_DATA_IN(23 downto 16) & Z3_DATA_IN(31 downto 24) & Z3_DATA_IN(7 downto 0) & Z3_DATA_IN(15 downto 8);
|
||||
DQ_DATA(15 downto 0) <= Z3_DATA_IN(23 downto 16) & Z3_DATA_IN(31 downto 24);
|
||||
end if;
|
||||
|
||||
else
|
||||
if(dq_swap='0') then
|
||||
DQ_DATA(15 downto 0) <= Z3_DATA_IN(15 downto 0);
|
||||
else
|
||||
DQ_DATA(15 downto 0) <= Z3_DATA_IN( 7 downto 0) & Z3_DATA_IN(15 downto 8);
|
||||
end if;
|
||||
end if;
|
||||
if(lan_adr = '1' and Z3_DS = '0' and Z3_ADR(15) = '0' )then --cycle start!
|
||||
|
||||
if(RW='1')then --read from MSB
|
||||
-- determine bushalf
|
||||
if(UDS='0' or LDS='0')then
|
||||
LAN_SM <= start_read_upper;
|
||||
LAN_SM <= wait_read_upper;
|
||||
LAN_RD_S <= '1';
|
||||
else
|
||||
Z3_A_LOW <= '1';
|
||||
LAN_SM <= start_read_lower;
|
||||
LAN_RD_S <= '1';
|
||||
LAN_SM <= wait_read_lower;
|
||||
end if;
|
||||
else
|
||||
|
||||
-- determine bushalf
|
||||
if(UDS='0' or LDS='0')then
|
||||
-- prepare the data for write
|
||||
if(dq_swap='0') then
|
||||
DQ_DATA(15 downto 0) <= Z3_DATA_IN(31 downto 16);
|
||||
else
|
||||
DQ_DATA(15 downto 0) <= Z3_DATA_IN(23 downto 16) & Z3_DATA_IN(31 downto 24);
|
||||
end if;
|
||||
LAN_SM <= start_write_upper;
|
||||
else
|
||||
-- prepare the data for write
|
||||
if(dq_swap='0') then
|
||||
DQ_DATA(15 downto 0) <= Z3_DATA_IN(15 downto 0);
|
||||
else
|
||||
DQ_DATA(15 downto 0) <= Z3_DATA_IN( 7 downto 0) & Z3_DATA_IN(15 downto 8);
|
||||
end if;
|
||||
Z3_A_LOW <= '1';
|
||||
LAN_SM <= start_write_lower;
|
||||
end if;
|
||||
@@ -324,14 +369,14 @@ begin
|
||||
LAN_SM<=end_read_upper;
|
||||
when end_read_upper=>
|
||||
--fetch data
|
||||
--TODO: Swapping!
|
||||
if(lan_adr_sw='0') then
|
||||
if(dq_swap='0') then
|
||||
Z3_DATA(31 downto 16) <= DQ;
|
||||
else
|
||||
Z3_DATA(31 downto 16) <= DQ(7 downto 0) & DQ(15 downto 8);
|
||||
end if;
|
||||
if(DS1='1' and DS0='1')then -- no lower half
|
||||
lan_rdy <='1';
|
||||
LAN_SM <= end_read_upper; -- stay here until cylce end
|
||||
else
|
||||
Z3_A_LOW <= '1';
|
||||
LAN_SM <= start_read_lower;
|
||||
@@ -346,13 +391,13 @@ begin
|
||||
LAN_SM<=end_read_lower;
|
||||
when end_read_lower=>
|
||||
--fetch data
|
||||
--TODO: Swapping!
|
||||
if(lan_adr_sw='0') then
|
||||
if(dq_swap='0') then
|
||||
Z3_DATA(15 downto 0) <= DQ;
|
||||
else
|
||||
Z3_DATA(15 downto 0) <= DQ(7 downto 0) & DQ(15 downto 8);
|
||||
end if;
|
||||
lan_rdy <='1';
|
||||
LAN_SM<=end_read_lower; -- stay here until cylce end
|
||||
when start_write_upper=>
|
||||
-- swapped LDS/UDS here: ENC624 is little endian
|
||||
LAN_WRH_S <= not LDS;
|
||||
@@ -364,8 +409,16 @@ begin
|
||||
LAN_WRL_S <= not UDS;
|
||||
LAN_SM<=end_write_upper;
|
||||
when end_write_upper=>
|
||||
-- prepare the data for write
|
||||
if(dq_swap='0') then
|
||||
DQ_DATA(15 downto 0) <= Z3_DATA_IN(15 downto 0);
|
||||
else
|
||||
DQ_DATA(15 downto 0) <= Z3_DATA_IN(7 downto 0) & Z3_DATA_IN(15 downto 8);
|
||||
end if;
|
||||
|
||||
if(DS1='1' and DS0='1')then -- no lower half
|
||||
lan_rdy <='1';
|
||||
LAN_SM <= end_write_upper; -- stay here until cylce end
|
||||
else
|
||||
Z3_A_LOW <= '1';
|
||||
LAN_SM <= start_write_lower;
|
||||
@@ -384,6 +437,7 @@ begin
|
||||
LAN_SM<=end_write_lower;
|
||||
when end_write_lower=>
|
||||
lan_rdy <='1';
|
||||
LAN_SM<=end_write_lower; -- stay here until cylce end
|
||||
end case;
|
||||
end if;
|
||||
end process lan_rw_gen;
|
||||
@@ -444,19 +498,18 @@ begin
|
||||
Z3_ADR(14 downto 2) & Z3_A_LOW;
|
||||
|
||||
--signal assignment
|
||||
D(15 downto 0) <= Z3_DATA(31 downto 16) when RW='1' and lan_adr ='1' and Z3_DS ='0' and FCS='0' else
|
||||
Dout1 & x"FF" when RW='1' and autoconfig ='1' and Z3_DS ='0' and FCS='0' else
|
||||
(others => 'Z');
|
||||
D(15 downto 0) <= Z3_DATA(31 downto 16) when RW='1' and Z3_DS ='0' and FCS='0' and lan_adr ='1' else
|
||||
Dout1 & x"FF" when RW='1' and Z3_DS ='0' and FCS='0' and autoconfig ='1' else
|
||||
(others => 'Z');
|
||||
|
||||
A(23 downto 8) <= Z3_DATA(15 downto 0) when RW='1' and lan_adr ='1' and Z3_DS ='0' and FCS='0' else
|
||||
(others => 'Z');
|
||||
A(23 downto 8) <= Z3_DATA(15 downto 0) when RW='1' and Z3_DS ='0' and FCS='0' and lan_adr ='1' else
|
||||
(others => 'Z');
|
||||
|
||||
A(7 downto 1) <= (others => 'Z');
|
||||
|
||||
--defined lancp signal that matches both LAN and CP addresses
|
||||
DQ <= LAN_D_INIT when reset='0' else
|
||||
Z3_DATA(31 downto 16) when RW='0' and FCS='0' and Z3_DS ='0' and lan_adr ='1' and Z3_A_LOW ='0' else
|
||||
Z3_DATA(15 downto 0) when RW='0' and FCS='0' and Z3_DS ='0' and lan_adr ='1' and Z3_A_LOW ='1' else
|
||||
DQ <= LAN_D_INIT when reset='0' else
|
||||
DQ_DATA(15 downto 0) when RW='0' and FCS='0' and Z3_DS ='0' and lan_adr ='1' else
|
||||
(others => 'Z');
|
||||
|
||||
INT_OUT <= '0' when LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1' else
|
||||
|
||||
+8351
-9461
File diff suppressed because it is too large
Load Diff
File diff suppressed because one or more lines are too long
@@ -7,7 +7,7 @@ run
|
||||
-ofmt NGC
|
||||
-p xc9500xl
|
||||
-top LAN_IDE_CP
|
||||
-opt_mode Area
|
||||
-opt_mode Speed
|
||||
-opt_level 1
|
||||
-iuc NO
|
||||
-keep_hierarchy Yes
|
||||
@@ -17,7 +17,7 @@ run
|
||||
-bus_delimiter <>
|
||||
-case Maintain
|
||||
-verilog2001 YES
|
||||
-fsm_extract YES -fsm_encoding Compact
|
||||
-fsm_extract YES -fsm_encoding Auto
|
||||
-safe_implementation No
|
||||
-mux_extract Yes
|
||||
-resource_sharing YES
|
||||
|
||||
@@ -92,7 +92,7 @@
|
||||
<tr>
|
||||
<td>-opt_mode</td>
|
||||
<td>Optimization Goal</td>
|
||||
<td>Area</td>
|
||||
<td>Speed</td>
|
||||
<td>SPEED</td>
|
||||
</tr>
|
||||
<tr>
|
||||
@@ -146,7 +146,7 @@
|
||||
<tr>
|
||||
<td>-fsm_encoding</td>
|
||||
<td> </td>
|
||||
<td>Compact</td>
|
||||
<td>Auto</td>
|
||||
<td>AUTO</td>
|
||||
</tr>
|
||||
<tr>
|
||||
|
||||
+1468
-1582
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
+1971
-1541
File diff suppressed because it is too large
Load Diff
@@ -30,7 +30,7 @@
|
||||
<tr>
|
||||
<td width="40%"> <b>Date</b>
|
||||
</td>
|
||||
<td width="60%"> 12-14-2018, 1:22AM</td>
|
||||
<td width="60%"> 12-17-2018, 10:59PM</td>
|
||||
</tr>
|
||||
</table></span><br><span id="sumres" class="pgRef"><h5 align="center">RESOURCES SUMMARY</h5>
|
||||
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
|
||||
@@ -42,11 +42,11 @@
|
||||
<th width="20%">Function Block Inputs Used</th>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="20%" align="center">193/288 (68%)</td>
|
||||
<td width="20%" align="center">589/1440 (41%)</td>
|
||||
<td width="20%" align="center">98/288 (35%)</td>
|
||||
<td width="20%" align="center">216/288 (75%)</td>
|
||||
<td width="20%" align="center">610/1440 (43%)</td>
|
||||
<td width="20%" align="center">122/288 (43%)</td>
|
||||
<td width="20%" align="center">109/117 (94%)</td>
|
||||
<td width="20%" align="center">511/864 (60%)</td>
|
||||
<td width="20%" align="center">426/864 (50%)</td>
|
||||
</tr>
|
||||
</table></span><br><span id="pinres" class="pgRef"><h5 align="center">PIN RESOURCES</h5>
|
||||
<table align="center" width="90%" border="0" cellspacing="0" cellpadding="0"><tr>
|
||||
@@ -123,7 +123,7 @@
|
||||
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
|
||||
<tr>
|
||||
<td width="50%"> Macrocells in high performance mode (MCHP)</td>
|
||||
<td width="50%"> 193</td>
|
||||
<td width="50%"> 216</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="50%"> Macrocells in low power mode (MCLP)</td>
|
||||
@@ -131,7 +131,7 @@
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="50%"> Total macrocells used (MC)</td>
|
||||
<td width="50%"> 193</td>
|
||||
<td width="50%"> 216</td>
|
||||
</tr>
|
||||
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
|
||||
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
|
||||
<application stringID="NgdBuild" timeStamp="Fri Dec 14 01:20:32 2018">
|
||||
<application stringID="NgdBuild" timeStamp="Mon Dec 17 22:58:57 2018">
|
||||
<section stringID="User_Env">
|
||||
<table stringID="User_EnvVar">
|
||||
<column stringID="variable"/>
|
||||
@@ -70,37 +70,38 @@
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_INFOS" value="0"/>
|
||||
</section>
|
||||
<section stringID="NGDBUILD_PRE_UNISIM_SUMMARY">
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="351"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="18"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="2"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDC" value="20"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="252"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="33"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="7"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FD" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDC" value="26"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="3"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDP" value="57"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDPE" value="18"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDP" value="42"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDPE" value="50"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="19"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="253"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="235"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="248"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="199"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="22"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="2"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="16"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="17"/>
|
||||
</section>
|
||||
<section stringID="NGDBUILD_POST_UNISIM_SUMMARY">
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="351"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="18"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="2"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="78"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="252"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="33"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="7"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="70"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="74"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="253"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="235"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="248"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="199"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="22"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="2"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_TS_TIMESPEC" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_VCC" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="16"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="17"/>
|
||||
</section>
|
||||
<section stringID="NGDBUILD_CORE_GENERATION_SUMMARY">
|
||||
<section stringID="NGDBUILD_CORE_INSTANCES"/>
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
Release 8.1i - Fit P.20131013
|
||||
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
|
||||
|
||||
12-14-2018 1:22AM
|
||||
12-17-2018 10:59PM
|
||||
|
||||
NOTE: This file is designed to be imported into a spreadsheet program
|
||||
such as Microsoft Excel for viewing, printing and sorting. The comma ','
|
||||
|
||||
|
@@ -2,7 +2,7 @@
|
||||
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
|
||||
<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
|
||||
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
|
||||
<TD ALIGN=CENTER COLSPAN='4'><B>LAN_IDE_CP Project Status (12/14/2018 - 01:20:34)</B></TD></TR>
|
||||
<TD ALIGN=CENTER COLSPAN='4'><B>LAN_IDE_CP Project Status (12/17/2018 - 22:58:59)</B></TD></TR>
|
||||
<TR ALIGN=LEFT>
|
||||
<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
|
||||
<TD>LAN_IDE.xise</TD>
|
||||
@@ -25,7 +25,7 @@ No Errors</TD>
|
||||
<TR ALIGN=LEFT>
|
||||
<TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>ISE 14.7</TD>
|
||||
<TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
|
||||
<TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/*.xmsgs?&DataKey=Warning'>54 Warnings (0 new)</A></TD>
|
||||
<TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/*.xmsgs?&DataKey=Warning'>53 Warnings (1 new)</A></TD>
|
||||
</TR>
|
||||
<TR ALIGN=LEFT>
|
||||
<TD BGCOLOR='#FFFF99'><B>Design Goal:</B></dif></TD>
|
||||
@@ -65,9 +65,9 @@ System Settings</A>
|
||||
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
|
||||
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
|
||||
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Fr 14. Dez 01:20:24 2018</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Warning'>53 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Info'>9 Infos (0 new)</A></TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.bld'>Translation Report</A></TD><TD>Current</TD><TD>Fr 14. Dez 01:20:32 2018</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>1 Warning (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Out of Date</TD><TD>Fr 14. Dez 01:19:48 2018</TD><TD ALIGN=LEFT><font color="red"; face="Arial"><b>X </b></font><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Error'>2 Errors (1 new)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>8 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>1 Info (1 new)</A></TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Mo 17. Dez 22:58:50 2018</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Warning'>52 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Info'>10 Infos (0 new)</A></TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.bld'>Translation Report</A></TD><TD>Current</TD><TD>Mo 17. Dez 22:58:57 2018</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>1 Warning (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
|
||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Out of Date</TD><TD>Mo 17. Dez 22:58:02 2018</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>8 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>1 Info (1 new)</A></TD></TR>
|
||||
<TR ALIGN=LEFT><TD>Power Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>
|
||||
</TABLE>
|
||||
<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
|
||||
@@ -77,5 +77,5 @@ System Settings</A>
|
||||
</TABLE>
|
||||
|
||||
|
||||
<br><center><b>Date Generated:</b> 12/14/2018 - 01:20:34</center>
|
||||
<br><center><b>Date Generated:</b> 12/17/2018 - 22:58:59</center>
|
||||
</BODY></HTML>
|
||||
@@ -5,7 +5,7 @@
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
|
||||
<application stringID="Xst" timeStamp="Fri Dec 14 01:20:15 2018">
|
||||
<application stringID="Xst" timeStamp="Mon Dec 17 22:58:42 2018">
|
||||
<section stringID="User_Env">
|
||||
<table stringID="User_EnvVar">
|
||||
<column stringID="variable"/>
|
||||
@@ -60,7 +60,7 @@
|
||||
<item DEFAULT="NGC" label="-ofmt" stringID="XST_OFMT" value="NGC"/>
|
||||
<item DEFAULT="" label="-p" stringID="XST_P" value="xc9500xl"/>
|
||||
<item DEFAULT="" label="-top" stringID="XST_TOP" value="LAN_IDE_CP"/>
|
||||
<item DEFAULT="SPEED" label="-opt_mode" stringID="XST_OPTMODE" value="Area"/>
|
||||
<item DEFAULT="SPEED" label="-opt_mode" stringID="XST_OPTMODE" value="Speed"/>
|
||||
<item DEFAULT="1" label="-opt_level" stringID="XST_OPTLEVEL" value="1"/>
|
||||
<item DEFAULT="NO" label="-iuc" stringID="XST_IUC" value="NO"/>
|
||||
<item DEFAULT="YES" label="-keep_hierarchy" stringID="XST_KEEPHIERARCHY" value="Yes"/>
|
||||
@@ -71,7 +71,7 @@
|
||||
<item DEFAULT="MAINTAIN" stringID="XST_CASE" value="Maintain"/>
|
||||
<item DEFAULT="YES" label="-verilog2001" stringID="XST_VERILOG2001" value="YES"/>
|
||||
<item DEFAULT="YES" label="-fsm_extract" stringID="XST_FSMEXTRACT" value="YES"/>
|
||||
<item DEFAULT="AUTO" label="-fsm_encoding" stringID="XST_FSMENCODING" value="Compact"/>
|
||||
<item DEFAULT="AUTO" label="-fsm_encoding" stringID="XST_FSMENCODING" value="Auto"/>
|
||||
<item DEFAULT="NO" label="-safe_implementation" stringID="XST_SAFEIMPLEMENTATION" value="No"/>
|
||||
<item DEFAULT="YES" stringID="XST_MUXEXTRACT" value="Yes"/>
|
||||
<item DEFAULT="YES" label="-resource_sharing" stringID="XST_RESOURCESHARING" value="YES"/>
|
||||
@@ -80,10 +80,10 @@
|
||||
</section>
|
||||
<section stringID="XST_HDL_SYNTHESIS_REPORT">
|
||||
<item dataType="int" stringID="XST_ROMS" value="1"></item>
|
||||
<item dataType="int" stringID="XST_REGISTERS" value="53">
|
||||
<item dataType="int" stringID="XST_1BIT_REGISTER" value="48"/>
|
||||
<item dataType="int" stringID="XST_REGISTERS" value="55">
|
||||
<item dataType="int" stringID="XST_1BIT_REGISTER" value="49"/>
|
||||
<item dataType="int" stringID="XST_14BIT_REGISTER" value="2"/>
|
||||
<item dataType="int" stringID="XST_16BIT_REGISTER" value="2"/>
|
||||
<item dataType="int" stringID="XST_16BIT_REGISTER" value="3"/>
|
||||
<item dataType="int" stringID="XST_8BIT_REGISTER" value="1"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_COMPARATORS" value="2"></item>
|
||||
@@ -109,28 +109,29 @@
|
||||
<item stringID="XST_RTL_TOP_LEVEL_OUTPUT_FILE_NAME" value="LAN_IDE_CP.ngr"/>
|
||||
<item stringID="XST_TOP_LEVEL_OUTPUT_FILE_NAME" value="LAN_IDE_CP"/>
|
||||
<item stringID="XST_OUTPUT_FORMAT" value="NGC"/>
|
||||
<item stringID="XST_OPTIMIZATION_GOAL" value="Area"/>
|
||||
<item stringID="XST_OPTIMIZATION_GOAL" value="Speed"/>
|
||||
<item stringID="XST_KEEP_HIERARCHY" value="Yes"/>
|
||||
</section>
|
||||
<section stringID="XST_DESIGN_STATISTICS">
|
||||
<item stringID="XST_IOS" value="116"/>
|
||||
</section>
|
||||
<section stringID="XST_CELL_USAGE">
|
||||
<item dataType="int" stringID="XST_BELS" value="892">
|
||||
<item dataType="int" stringID="XST_AND2" value="351"/>
|
||||
<item dataType="int" stringID="XST_AND3" value="18"/>
|
||||
<item dataType="int" stringID="XST_AND4" value="2"/>
|
||||
<item dataType="int" stringID="XST_BELS" value="789">
|
||||
<item dataType="int" stringID="XST_AND2" value="252"/>
|
||||
<item dataType="int" stringID="XST_AND3" value="33"/>
|
||||
<item dataType="int" stringID="XST_AND4" value="7"/>
|
||||
<item dataType="int" stringID="XST_GND" value="1"/>
|
||||
<item dataType="int" stringID="XST_INV" value="253"/>
|
||||
<item dataType="int" stringID="XST_OR2" value="248"/>
|
||||
<item dataType="int" stringID="XST_INV" value="235"/>
|
||||
<item dataType="int" stringID="XST_OR2" value="199"/>
|
||||
<item dataType="int" stringID="XST_VCC" value="1"/>
|
||||
<item dataType="int" stringID="XST_XOR2" value="16"/>
|
||||
<item dataType="int" stringID="XST_XOR2" value="17"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="98">
|
||||
<item dataType="int" stringID="XST_FDC" value="20"/>
|
||||
<item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="122">
|
||||
<item dataType="int" stringID="XST_FD" value="1"/>
|
||||
<item dataType="int" stringID="XST_FDC" value="26"/>
|
||||
<item dataType="int" stringID="XST_FDCE" value="3"/>
|
||||
<item dataType="int" stringID="XST_FDP" value="57"/>
|
||||
<item dataType="int" stringID="XST_FDPE" value="18"/>
|
||||
<item dataType="int" stringID="XST_FDP" value="42"/>
|
||||
<item dataType="int" stringID="XST_FDPE" value="50"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_IO_BUFFERS" value="109">
|
||||
<item dataType="int" stringID="XST_IBUF" value="19"/>
|
||||
@@ -140,8 +141,8 @@
|
||||
</section>
|
||||
<section stringID="XST_ERRORS_STATISTICS">
|
||||
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_ERRORS" value="0"/>
|
||||
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="53"/>
|
||||
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="9"/>
|
||||
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="52"/>
|
||||
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="10"/>
|
||||
</section>
|
||||
</application>
|
||||
|
||||
|
||||
@@ -1,2 +1,2 @@
|
||||
C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1544746824
|
||||
C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1545083930
|
||||
OK
|
||||
|
||||
@@ -5,6 +5,10 @@
|
||||
behavior or data corruption. It is strongly advised that
|
||||
users do not edit the contents of this file. -->
|
||||
<messages>
|
||||
<msg type="warning" file="Xst" num="819" delta="new" >"<arg fmt="%s" index="1">C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd</arg>" line <arg fmt="%d" index="2">291</arg>: One or more signals are missing in the process sensitivity list. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are:
|
||||
<arg fmt="%s" index="3"><LAN_SM_RST></arg>
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="Xst" num="2561" delta="old" >Always blocking tristate driving signal <<arg fmt="%s" index="1">A</arg>> in unit <<arg fmt="%s" index="2">LAN_IDE_CP</arg>> is removed.
|
||||
</msg>
|
||||
|
||||
@@ -47,6 +51,9 @@
|
||||
<msg type="warning" file="Xst" num="647" delta="old" >Input <<arg fmt="%s" index="1">C1</arg>> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="Xst" num="1799" delta="old" >State <arg fmt="%s" index="1">start_read_upper</arg> is never reached in FSM <<arg fmt="%s" index="2">LAN_SM</arg>>.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Xst" num="1293" delta="old" >FF/Latch <<arg fmt="%s" index="1">0</arg>> has a constant value of <arg fmt="%d" index="2">1</arg> in block <<arg fmt="%s" index="3">13</arg>>. This FF/Latch will be trimmed during the optimization process.
|
||||
</msg>
|
||||
|
||||
@@ -95,9 +102,6 @@
|
||||
<msg type="warning" file="Xst" num="1293" delta="old" >FF/Latch <<arg fmt="%s" index="1">0</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">12</arg>>. This FF/Latch will be trimmed during the optimization process.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Xst" num="1293" delta="old" >FF/Latch <<arg fmt="%s" index="1">0</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">8</arg>>. This FF/Latch will be trimmed during the optimization process.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Xst" num="1293" delta="old" >FF/Latch <<arg fmt="%s" index="1">0</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">7</arg>>. This FF/Latch will be trimmed during the optimization process.
|
||||
</msg>
|
||||
|
||||
@@ -128,9 +132,6 @@
|
||||
<msg type="warning" file="Xst" num="1896" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">LAN_D_INIT_12</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">LAN_IDE_CP</arg>>. This FF/Latch will be trimmed during the optimization process.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Xst" num="1896" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">LAN_D_INIT_8</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">LAN_IDE_CP</arg>>. This FF/Latch will be trimmed during the optimization process.
|
||||
</msg>
|
||||
|
||||
<msg type="warning" file="Xst" num="1896" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">LAN_D_INIT_7</arg>> has a constant value of <arg fmt="%d" index="2">0</arg> in block <<arg fmt="%s" index="3">LAN_IDE_CP</arg>>. This FF/Latch will be trimmed during the optimization process.
|
||||
</msg>
|
||||
|
||||
@@ -185,10 +186,10 @@
|
||||
<msg type="warning" file="Xst" num="1896" delta="old" >Due to other FF/Latch trimming, FF/Latch <<arg fmt="%s" index="1">LAN_A_INIT_0</arg>> has a constant value of <arg fmt="%d" index="2">1</arg> in block <<arg fmt="%s" index="3">LAN_IDE_CP</arg>>. This FF/Latch will be trimmed during the optimization process.
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">LAN_D_INIT_10</arg>> in Unit <<arg fmt="%s" index="2">LAN_IDE_CP</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg>, which will be removed : <arg fmt="%s" index="4"><LAN_D_INIT_11> </arg>
|
||||
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">LAN_D_INIT_8</arg>> in Unit <<arg fmt="%s" index="2">LAN_IDE_CP</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><LAN_D_INIT_10> <LAN_D_INIT_11> </arg>
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">LAN_D_INIT_1</arg>> in Unit <<arg fmt="%s" index="2">LAN_IDE_CP</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg>, which will be removed : <arg fmt="%s" index="4"><LAN_D_INIT_4> </arg>
|
||||
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">LAN_D_INIT_1</arg>> in Unit <<arg fmt="%s" index="2">LAN_IDE_CP</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><LAN_D_INIT_4> <LAN_D_INIT_9> </arg>
|
||||
</msg>
|
||||
|
||||
</messages>
|
||||
|
||||
@@ -6,8 +6,8 @@
|
||||
<DeviceList devices="xc9500xl"/>
|
||||
|
||||
<Properties>
|
||||
<property name="Synthesize - XST:Optimization Goal" value="Area"/>
|
||||
<property name="Synthesize - XST:FSM Encoding Algorithm" value="Gray"/>
|
||||
<property name="Synthesize - XST:Optimization Goal" value="Speed"/>
|
||||
<property name="Synthesize - XST:FSM Encoding Algorithm" value="Auto"/>
|
||||
<property name="Synthesize - XST:Safe Implementation" value="No"/>
|
||||
</Properties>
|
||||
|
||||
|
||||
@@ -9,13 +9,13 @@
|
||||
<ClosedNodesVersion>2</ClosedNodesVersion>
|
||||
</ClosedNodes>
|
||||
<SelectedItems>
|
||||
<SelectedItem>pinlist.ucf (C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/pinlist.ucf)</SelectedItem>
|
||||
<SelectedItem>LAN_IDE_CP - Behavioral (C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd)</SelectedItem>
|
||||
</SelectedItems>
|
||||
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
|
||||
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
|
||||
<ViewHeaderState orientation="horizontal" >000000ff0000000000000001000000010000000000000000000000000000000002020000000100000001000000640000013c000000020000000000000000000000000200000064ffffffff0000008100000003000000020000013c0000000100000003000000000000000100000003</ViewHeaderState>
|
||||
<UserChangedColumnWidths orientation="horizontal" >true</UserChangedColumnWidths>
|
||||
<CurrentItem>pinlist.ucf (C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/pinlist.ucf)</CurrentItem>
|
||||
<CurrentItem>LAN_IDE_CP - Behavioral (C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd)</CurrentItem>
|
||||
</ItemView>
|
||||
<ItemView engineview="SynthesisOnly" sourcetype="" guiview="Process" >
|
||||
<ClosedNodes>
|
||||
|
||||
@@ -1,9 +1,9 @@
|
||||
<?xml version='1.0' encoding='UTF-8'?>
|
||||
<report-views version="2.0" >
|
||||
<header>
|
||||
<DateModified>2018-12-14T01:18:40</DateModified>
|
||||
<DateModified>2018-12-17T21:46:07</DateModified>
|
||||
<ModuleName>LAN_IDE_CP</ModuleName>
|
||||
<SummaryTimeStamp>2018-12-14T01:18:18</SummaryTimeStamp>
|
||||
<SummaryTimeStamp>2018-12-17T21:44:27</SummaryTimeStamp>
|
||||
<SavedFilePath>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/iseconfig/LAN_IDE_CP.xreport</SavedFilePath>
|
||||
<ImplementationReportsDirectory>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\</ImplementationReportsDirectory>
|
||||
<DateInitialized>2016-12-13T22:08:29</DateInitialized>
|
||||
|
||||
+2960
-3132
File diff suppressed because it is too large
Load Diff
@@ -3,7 +3,7 @@
|
||||
<!--The data in this file is primarily intended for consumption by Xilinx tools.
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
<application name="pn" timeStamp="Fri Dec 14 01:20:14 2018">
|
||||
<application name="pn" timeStamp="Mon Dec 17 22:58:41 2018">
|
||||
<section name="Project Information" visible="false">
|
||||
<property name="ProjectID" value="0" type="project"/>
|
||||
<property name="ProjectIteration" value="0" type="project"/>
|
||||
@@ -13,16 +13,14 @@ This means code written to parse this file will need to be revisited each subseq
|
||||
<section name="Project Statistics" visible="true">
|
||||
<property name="PROP_Enable_Message_Filtering" value="false" type="design"/>
|
||||
<property name="PROP_LastAppliedGoal" value="Balanced" type="design"/>
|
||||
<property name="PROP_LastAppliedStrategy" value="area;C:/Xilinx/14.7/ISE_DS/ISE/data/area.xds" type="design"/>
|
||||
<property name="PROP_LastAppliedStrategy" value="area;C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/area.xds" type="design"/>
|
||||
<property name="PROP_ManualCompileOrderImp" value="false" type="design"/>
|
||||
<property name="PROP_PropSpecInProjFile" value="Store all values" type="design"/>
|
||||
<property name="PROP_Simulator" value="ISim (VHDL/Verilog)" type="design"/>
|
||||
<property name="PROP_SynthFsmEncode" value="Compact" type="process"/>
|
||||
<property name="PROP_SynthOpt" value="Area" type="process"/>
|
||||
<property name="PROP_SynthTopFile" value="changed" type="process"/>
|
||||
<property name="PROP_Top_Level_Module_Type" value="HDL" type="design"/>
|
||||
<property name="PROP_UseSmartGuide" value="false" type="design"/>
|
||||
<property name="PROP_UserBrowsedStrategyFiles" value="C:/Xilinx/14.7/ISE_DS/ISE/data/area.xds" type="process"/>
|
||||
<property name="PROP_UserBrowsedStrategyFiles" value="C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/area.xds" type="process"/>
|
||||
<property name="PROP_intProjectCreationTimestamp" value="YYYY-MM-DDTHH:MM:SS" type="design"/>
|
||||
<property name="PROP_intWbtProjectID" value="0" type="design"/>
|
||||
<property name="PROP_intWorkingDirLocWRTProjDir" value="UnableToCalculate" type="design"/>
|
||||
|
||||
Binary file not shown.
@@ -1,2 +1,2 @@
|
||||
AR lan_ide_cp behavioral C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd sub00/vhpl01 1544746816
|
||||
EN lan_ide_cp NULL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd sub00/vhpl00 1544746815
|
||||
AR lan_ide_cp behavioral C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd sub00/vhpl01 1545083923
|
||||
EN lan_ide_cp NULL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd sub00/vhpl00 1545083922
|
||||
|
||||
@@ -1,9 +1,9 @@
|
||||
V3 3
|
||||
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd 2018/12/14.01:17:58 P.20131013
|
||||
EN work/LAN_IDE_CP 1544746815 \
|
||||
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd 2018/12/17.22:58:40 P.20131013
|
||||
EN work/LAN_IDE_CP 1545083922 \
|
||||
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd \
|
||||
PB ieee/std_logic_1164 1381692176 PB ieee/std_logic_arith 1381692177 \
|
||||
PB ieee/STD_LOGIC_UNSIGNED 1381692179
|
||||
AR work/LAN_IDE_CP/Behavioral 1544746816 \
|
||||
AR work/LAN_IDE_CP/Behavioral 1545083923 \
|
||||
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd \
|
||||
EN work/LAN_IDE_CP 1544746815
|
||||
EN work/LAN_IDE_CP 1545083922
|
||||
|
||||
Binary file not shown.
Binary file not shown.
Reference in New Issue
Block a user