Dominick.Vansevenant/Zorro-LAN-IDE
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Updated baxnet-driver ansd Z3-Interface

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This commit is contained in:
MHeinrichs
2019-11-15 00:40:34 +01:00
parent 906d8a902f
commit d125d49fa6
58 changed files with 27198 additions and 18831 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Logic/LAN_IDE_V2/LAN_IDE_CP.cmd_log
+84
View File
@@ -12,3 +12,87 @@ cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
taengine -intstyle ise -f LAN_IDE_CP -w --format html1 -l LAN_IDE_CP_html/tim/timing_report.htm
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
Logic/LAN_IDE_V2/LAN_IDE_CP.gyd
+105 -104
View File
@@ -3,41 +3,28 @@ Pin Freeze File: version P.20131013
95288XL144 XC95288XL-10-TQ144
AS S:PIN80
AUTOBOOT_OFF S:PIN75
A<12> S:PIN61
A<13> S:PIN64
A<14> S:PIN66
A<15> S:PIN74
A<16> S:PIN97
A<17> S:PIN95
A<18> S:PIN94
A<19> S:PIN92
A<1> S:PIN57
A<20> S:PIN91
A<21> S:PIN88
A<22> S:PIN87
A<23> S:PIN86
A<2> S:PIN54
A<3> S:PIN52
A<4> S:PIN50
A<5> S:PIN49
A<6> S:PIN51
A<7> S:PIN53
A<8> S:PIN56
BERR S:PIN98
C1 S:PIN103
C3 S:PIN102
CFIN S:PIN104
CLK_EXT S:PIN30
CP_IRQ S:PIN31
A<9> S:PIN58
A<10> S:PIN59
A<11> S:PIN60
IDE_WAIT S:PIN33
DS0 S:PIN93
DS1 S:PIN78
FCS S:PIN77
LAN_INT S:PIN111
LDS S:PIN82
MTCR S:PIN101
RESET S:PIN143
RW S:PIN83
UDS S:PIN81
Z3 S:PIN79
A_LAN<0> S:PIN4
A_LAN<10> S:PIN138
A_LAN<11> S:PIN139
@@ -57,6 +44,7 @@ CP_CS S:PIN34
CP_RD S:PIN71
CP_WE S:PIN70
DQ<0> S:PIN118
DQ<10> S:PIN129
DQ<11> S:PIN115
DQ<12> S:PIN130
DQ<13> S:PIN113
@@ -64,6 +52,11 @@ DQ<14> S:PIN131
DQ<15> S:PIN112
DQ<1> S:PIN117
DQ<2> S:PIN120
DQ<3> S:PIN119
DQ<5> S:PIN121
DQ<6> S:PIN126
DQ<7> S:PIN125
DQ<9> S:PIN116
D<0> S:PIN2
D<10> S:PIN41
D<11> S:PIN43
@@ -87,111 +80,119 @@ IDE_CS<0> S:PIN22
IDE_CS<1> S:PIN23
IDE_R S:PIN27
IDE_W S:PIN28
LAN_CFG<2> S:PIN135
LAN_CS S:PIN133
LAN_RD S:PIN134
LAN_WRH S:PIN132
LAN_WRL S:PIN76
ROM_B<1> S:PIN69
ROM_B<0> S:PIN77
ROM_B<0> S:PIN68
OWN S:PIN107
OVR S:PIN100
MTACK S:PIN96
LAN_CFG<4> S:PIN110
LAN_CFG<3> S:PIN13
LAN_CFG<1> S:PIN12
INT6_OUT S:PIN68
INT6_OUT S:PIN135
INT2_OUT S:PIN32
DTACK S:PIN85
ROM_OE S:PIN35
SLAVE S:PIN106
A<8> S:PIN56
A<9> S:PIN58
A<10> S:PIN59
A<11> S:PIN60
A<12> S:PIN61
A<13> S:PIN64
A<14> S:PIN66
A<15> S:PIN74
A<16> S:PIN97
A<17> S:PIN95
A<18> S:PIN94
A<19> S:PIN92
A<20> S:PIN91
A<21> S:PIN88
A<22> S:PIN87
A<23> S:PIN86
DQ<8> S:PIN128
DQ<4> S:PIN124
DQ<10> S:PIN129
DQ<7> S:PIN125
DQ<6> S:PIN126
DQ<5> S:PIN121
DQ<3> S:PIN119
DQ<9> S:PIN116
;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.
PARTITION FB1_1 ROM_OE_S LAN_RST_SM_FSM_FFd3 LAN_RST_SM_FSM_FFd2 LAN_RST_SM_FSM_FFd1
D_5_IOBUFE D_4_IOBUFE LAN_CS_RST IDE_CS_0_OBUF
IDE_W_S IDE_CS_1_OBUF IDE_ENABLE IDE_A_0_OBUF$BUF0
DS_D IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0 CP_WE_S
IDE_R_OBUF DQ<7>_BUFR.MC
PARTITION FB2_1 DQ<10>_BUFR.MC A_LAN_4_OBUF A_LAN_7_OBUF
PARTITION FB2_5 A_LAN_6_OBUF ROM_B_0_OBUF$BUF6
PARTITION FB2_8 ROM_B_0_OBUF$BUF5
PARTITION FB2_10 D_6_IOBUFE
PARTITION FB2_12 D_3_IOBUFE $OpTx$INV$87__$INT D_7_IOBUFE D_1_IOBUFE
DQ_9_IOBUFE/DQ_9_IOBUFE_TRST D_8_IOBUFE EXP30_
PARTITION FB3_1 EXP31_ IDE_W_OBUF EXP32_ EXP33_
EXP34_ BUF_cp EXP35_
PARTITION FB3_10 EXP36_ EXP37_ lancp EXP38_
ROM_B_0_OBUF$BUF8 autoconfig CP_WE_QUIRK EXP39_
ide
PARTITION FB4_2 D_0_IOBUFE
PARTITION FB4_5 A_LAN_1_OBUF A_LAN_0_OBUF
PARTITION FB4_8 A_LAN_3_OBUF
PARTITION FB4_12 A_LAN_2_OBUF
PARTITION FB4_14 A_LAN_5_OBUF SHUT_UP<0> LAN_BASEADR<1> IDE_BASEADR<1>
CP_BASEADR<1>
PARTITION FB5_1 EXP40_ CP_CS_OBUF EXP41_ EXP42_
ROM_OE_OBUF
PARTITION FB5_10 D_2_IOBUFE
PARTITION FB5_12 D_9_IOBUFE
PARTITION FB5_14 D_10_IOBUFE D_11_IOBUFE EXP43_ D_12_IOBUFE
EXP44_
PARTITION FB6_1 EXP45_ LAN_CFG_2_OBUF A_LAN_12_OBUF
PARTITION FB1_4 SHUT_UP_Z2<1> D_5_IOBUFE D_4_IOBUFE AUTO_CONFIG_Z2_DONE_CYCLE<2>
IDE_CS_0_OBUF AUTO_CONFIG_Z2_DONE<1> IDE_CS_1_OBUF LAN_BASEADR<9>
IDE_A_0_OBUF$BUF0 LAN_BASEADR<8> IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0
LAN_BASEADR<15> IDE_R_OBUF LAN_BASEADR<13>
PARTITION FB2_1 D_Z2_OUT<1> A_LAN_4_OBUF A_LAN_7_OBUF IDE_BASEADR<4>
A_LAN_6_OBUF IDE_BASEADR<3> IDE_BASEADR<2> IDE_BASEADR<1>
EXP24_ D_6_IOBUFE IDE_BASEADR<0> D_3_IOBUFE
EXP25_ D_7_IOBUFE D_1_IOBUFE EXP26_
D_8_IOBUFE EXP27_
PARTITION FB3_2 IDE_W_OBUF
PARTITION FB3_13 LAN_D_INIT<8> ROM_B_0_OBUF$BUF5 LAN_D_INIT<1> LAN_A_INIT<6>
CP_WE_S/CP_WE_S_CLKF CP_WE_QUIRK
PARTITION FB4_1 SHUT_UP_Z2<2> D_0_IOBUFE LAN_BASEADR<14> LAN_BASEADR<12>
A_LAN_1_OBUF A_LAN_0_OBUF LAN_BASEADR<11> A_LAN_3_OBUF
LAN_BASEADR<10> IDE_BASEADR<7> CP_BASEADR<7> A_LAN_2_OBUF
CP_BASEADR<6> A_LAN_5_OBUF CP_BASEADR<4> CP_BASEADR<3>
CP_BASEADR<2> CP_BASEADR<1>
PARTITION FB5_1 LAN_A_INIT<3> CP_CS_OBUF EXP28_ EXP29_
ROM_OE_OBUF IDE_W_S IDE_ENABLE AS_D1
AS_D0 D_2_IOBUFE D_8_IOBUFE/D_8_IOBUFE_TRST D_9_IOBUFE
AUTOCONFIG_Z2_ACCESS D_10_IOBUFE D_11_IOBUFE EXP30_
D_12_IOBUFE EXP31_
PARTITION FB6_1 EXP32_ ROM_B_0_OBUF$BUF4 A_LAN_12_OBUF
PARTITION FB6_5 A_LAN_13_OBUF A_LAN_10_OBUF
PARTITION FB6_8 A_LAN_11_OBUF
PARTITION FB6_10 A_LAN_8_OBUF EXP46_ lan_adr EXP47_
A_LAN_9_OBUF EXP48_ EXP49_ lan_adr_sw
EXP50_
PARTITION FB7_1 Dout1<1> EXP51_ D_13_IOBUFE EXP52_
D_14_IOBUFE EXP53_ EXP54_ EXP55_
Dout1<2> EXP56_ EXP57_ D_15_IOBUFE
EXP58_ EXP59_ Dout1<0> EXP60_
EXP61_ EXP62_
PARTITION FB8_1 EXP63_ DQ_12_IOBUFE DQ_14_IOBUFE EXP64_
LAN_WRH_OBUF DQ<6>_BUFR.MC EXP65_ LAN_CS_OBUF
EXP66_ LAN_RD_OBUF LAN_INT_ENABLE EXP67_
EXP68_ DQ<9>_BUFR.MC DQ<4>_BUFR.MC EXP69_
LAN_RD_S EXP70_
PARTITION FB9_1 EXP71_ $OpTx$FX_DC$144 EXP72_ EXP73_
PARTITION FB9_15 EXP74_ EXP75_ $OpTx$FX_DC$145 EXP76_
PARTITION FB10_1 EXP77_ DQ_1_IOBUFE DQ_0_IOBUFE EXP78_
_24_ DQ_2_IOBUFE EXP79_ _23_
EXP80_ _19_ _21_ _22_
PARTITION FB10_14 _18_ DQ<8>_BUFR.MC EXP81_ _20_
EXP82_
PARTITION FB11_8 SHUT_UP<1> LAN_BASEADR<7> LAN_BASEADR<6> LAN_BASEADR<5>
ROM_B_0_OBUF$BUF7 IDE_BASEADR<7> ROM_B_0_OBUF IDE_BASEADR<6>
CP_BASEADR<7> CP_WE_OBUF CP_BASEADR<6>
PARTITION FB12_1 EXP83_ ROM_B_0_OBUF$BUF4 EXP84_ EXP85_
DQ_15_IOBUFE LAN_WRL_S EXP86_ DQ_13_IOBUFE
LAN_WRH_S DQ_11_IOBUFE EXP87_ _25_
IDE_R_S LAN_IRQ_OUT CP_RD_S DQ<3>_BUFR.MC
EXP88_ DQ<5>_BUFR.MC
PARTITION FB13_2 CP_RD_OBUF
PARTITION FB13_9 LAN_BASEADR<4> LAN_BASEADR<3> IDE_BASEADR<5> IDE_BASEADR<4>
IDE_BASEADR<3> LAN_WRL_OBUF ROM_B_0_OBUF$BUF0 CP_BASEADR<5>
CP_BASEADR<4> CP_BASEADR<3>
PARTITION FB14_1 AUTO_CONFIG_DONE_CYCLE<0> EXP89_ ROM_B_0_OBUF$BUF2
PARTITION FB14_6 AUTO_CONFIG_DONE<1> AUTO_CONFIG_DONE<0> LAN_BASEADR<2> LAN_BASEADR<0>
IDE_BASEADR<2> CFOUT_OBUF IDE_BASEADR<0> CP_BASEADR<2>
SLAVE_OBUF ROM_B_0_OBUF$BUF1 CP_BASEADR<0> EXP90_
AUTO_CONFIG_DONE_CYCLE<1>
PARTITION FB15_1 Dout1<3> EXP91_
PARTITION FB15_12 ROM_B_0_OBUF$BUF9 lancp/lancp_RSTF__$INT LAN_WR_RST SHUT_UP<2>/SHUT_UP<2>_CLKF
LAN_IRQ_D0 SHUT_UP<2> EXP92_
PARTITION FB16_10 ROM_B_0_OBUF$BUF3
PARTITION FB6_10 A_LAN_8_OBUF EXP33_ EXP34_ DQ_DATA<3>
A_LAN_9_OBUF EXP35_ DQ_DATA<11> EXP36_
IDE_ACCESS
PARTITION FB7_1 EXP37_ EXP38_ D_13_IOBUFE EXP39_
D_14_IOBUFE DQ_9_IOBUFE/DQ_9_IOBUFE_TRST CP_BASEADR<0> CP_BASEADR<5>
IDE_BASEADR<5> IDE_BASEADR<6> EXP40_ D_15_IOBUFE
LAN_SM_RST EXP41_ D_Z2_OUT<2> EXP42_
EXP43_ DQ<8>_BUFR.MC
PARTITION FB8_1 DQ_DATA<12> DQ_12_IOBUFE DQ_14_IOBUFE EXP44_
LAN_WRH_OBUF EXP45_ LAN_SM_FSM_FFd4 LAN_CS_OBUF
DQ_DATA<6> LAN_RD_OBUF LAN_WRH_S DQ_DATA<14>
EXP46_ DQ_DATA<4> EXP47_ EXP48_
EXP49_ EXP50_
PARTITION FB9_1 AUTO_CONFIG_Z2_DONE<0> EXP51_ D_Z2_OUT<3> AUTO_CONFIG_Z2_DONE_CYCLE<0>
INT_VECTOR_CYCLE Z3_ADR<10> Z3_ADR<13> Z3_ADR<2>
Z3_ADR<3> Z3_ADR<4> Z3_DATA<0> Z3_ADR<5>
Z3_ADR<6> Z3_DATA<1> Z3_ADR<7> Z3_ADR_0
Z3_DATA<2> Z3_ADR_1
PARTITION FB10_1 DQ<4>_BUFR.MC DQ_1_IOBUFE DQ_0_IOBUFE EXP52_
DQ_3_IOBUFE DQ_2_IOBUFE EXP53_ DQ_5_IOBUFE
EXP54_ _19_ DQ_7_IOBUFE DQ_6_IOBUFE
EXP55_ _18_ EXP56_ EXP57_
DQ_10_IOBUFE EXP58_
PARTITION FB11_1 Z3_DATA<30> Z3_DATA<29> Z3_DATA<3> Z3_DATA<28>
Z3_DATA<4> Z3_DATA<27> Z3_DATA<22> Z3_DATA<21>
Z3_DATA<20> Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF0
Z3_DATA<19> ROM_B_0_OBUF EXP59_ DQ_DATA<8>
CP_WE_OBUF DQ_DATA<0>
PARTITION FB12_1 EXP60_ EXP61_ LAN_ACCESS EXP62_
DQ_15_IOBUFE EXP63_ Z3_ADR<11> DQ_13_IOBUFE
Z3_ADR<12> DQ_11_IOBUFE EXP64_ DQ_9_IOBUFE
EXP65_ EXP66_ EXP67_ DQ_SWAP
EXP68_ EXP69_
PARTITION FB13_1 EXP70_ CP_RD_OBUF Z3_DATA<31> Z3_DATA<23>
LAN_INT_ENABLE EXP71_ DQ_DATA<7> Z3_DATA<7>
EXP72_ EXP73_ DQ_DATA<5> DQ_DATA<1>
EXP74_ LAN_WRL_OBUF EXP75_ DQ_DATA<13>
LAN_WRL_S DQ_DATA<15>
PARTITION FB14_1 ROM_OE_S LAN_WR_RST ROM_B_0_OBUF$BUF2 LAN_RST_SM_FSM_FFd1
LAN_IRQ_D0 LAN_CS_RST IDE_R_S Z3_ADR<9>
Z3_ADR<8> LAN_RST_SM_FSM_FFd3 CFOUT_OBUF LAN_RST_SM_FSM_FFd2
LAN_IRQ_OUT SLAVE_OBUF ROM_B_0_OBUF$BUF1 CP_WE_S
CP_RD_S AUTO_CONFIG_Z2_DONE<2>
PARTITION FB15_1 EXP76_ EXP77_ SHUT_UP_Z2<0> AUTO_CONFIG_Z2_DONE_CYCLE<1>
LAN_SM_FSM_FFd1 LAN_RD_S LAN_SM_FSM_FFd3 EXP78_
LAN_READY DQ_DATA<9> EXP79_ ROM_B_0_OBUF$BUF6
Z3_A_LOW Z3_DATA<15> Z3_DATA<14> LAN_SM_FSM_FFd2
Z3_DATA<13> D_Z2_OUT<0>
PARTITION FB16_1 EXP80_ Z3_DATA<12> Z3_DATA<11>
PARTITION FB16_5 Z3_DATA<26> Z3_DATA<10> Z3_DATA<25> Z3_DATA<9>
Z3_DATA<24> ROM_B_0_OBUF$BUF3 Z3_DATA<8> Z3_DATA<18>
Z3_DATA<17> Z3_DATA<16> EXP81_ DQ_DATA<10>
DQ_DATA<2> EXP82_
Logic/LAN_IDE_V2/LAN_IDE_CP.jed
+1488 -1488
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File diff suppressed because it is too large Load Diff
Logic/LAN_IDE_V2/LAN_IDE_CP.mfd
+5206 -4008
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File diff suppressed because it is too large Load Diff
Logic/LAN_IDE_V2/LAN_IDE_CP.nga
+1 -1
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Logic/LAN_IDE_V2/LAN_IDE_CP.ngd
+1 -1
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Logic/LAN_IDE_V2/LAN_IDE_CP.pad
+30 -30
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@@ -1,7 +1,7 @@
Release 8.1i - Fit P.20131013
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
3- 2-2019 7:56PM
11-15-2019 0:25AM
NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
@@ -29,8 +29,8 @@ P8|VCC||VCCINT||||||||||
P9|A_LAN<4>|O|I/O|OUTPUT|||||||||
P10|A_LAN<7>|O|I/O|OUTPUT|||||||||
P11|A_LAN<6>|O|I/O|OUTPUT|||||||||
P12|LAN_CFG<1>|O|I/O|OUTPUT|||||||||
P13|LAN_CFG<3>|O|I/O|OUTPUT|||||||||
P12|TIE||I/O||||||||||
P13|TIE||I/O||||||||||
P14|D<6>|I/O|I/O|BIDIR|||||||||
P15|D<3>|I/O|I/O|BIDIR|||||||||
P16|D<7>|I/O|I/O|BIDIR|||||||||
@@ -50,7 +50,7 @@ P29|GND||GND||||||||||
P30|CLK_EXT|GCK|I/O/GCK1||||||||||
P31|CP_IRQ|I|I/O|INPUT|||||||||
P32|INT2_OUT|O|I/O/GCK2|OUTPUT|||||||||
P33|IDE_WAIT|I|I/O|INPUT|||||||||
P33|TIE||I/O||||||||||
P34|CP_CS|O|I/O|OUTPUT|||||||||
P35|ROM_OE|O|I/O|OUTPUT|||||||||
P36|GND||GND||||||||||
@@ -73,52 +73,52 @@ P52|A<3>|I|I/O|INPUT|||||||||
P53|A<7>|I|I/O|INPUT|||||||||
P54|A<2>|I|I/O|INPUT|||||||||
P55|VCC||VCCIO||||||||||
P56|A<8>|I|I/O|INPUT|||||||||
P56|A<8>|I/O|I/O|BIDIR|||||||||
P57|A<1>|I|I/O|INPUT|||||||||
P58|A<9>|I|I/O|INPUT|||||||||
P59|A<10>|I|I/O|INPUT|||||||||
P60|A<11>|I|I/O|INPUT|||||||||
P61|A<12>|I|I/O|INPUT|||||||||
P58|A<9>|I/O|I/O|BIDIR|||||||||
P59|A<10>|I/O|I/O|BIDIR|||||||||
P60|A<11>|I/O|I/O|BIDIR|||||||||
P61|A<12>|I/O|I/O|BIDIR|||||||||
P62|GND||GND||||||||||
P63|TDI||TDI||||||||||
P64|A<13>|I|I/O|INPUT|||||||||
P64|A<13>|I/O|I/O|BIDIR|||||||||
P65|TMS||TMS||||||||||
P66|A<14>|I|I/O|INPUT|||||||||
P66|A<14>|I/O|I/O|BIDIR|||||||||
P67|TCK||TCK||||||||||
P68|INT6_OUT|O|I/O|OUTPUT|||||||||
P68|ROM_B<0>|O|I/O|OUTPUT|||||||||
P69|ROM_B<1>|O|I/O|OUTPUT|||||||||
P70|CP_WE|O|I/O|OUTPUT|||||||||
P71|CP_RD|O|I/O|OUTPUT|||||||||
P72|GND||GND||||||||||
P73|VCC||VCCIO||||||||||
P74|A<15>|I|I/O|INPUT|||||||||
P74|A<15>|I/O|I/O|BIDIR|||||||||
P75|AUTOBOOT_OFF|I|I/O|INPUT|||||||||
P76|LAN_WRL|O|I/O|OUTPUT|||||||||
P77|ROM_B<0>|O|I/O|OUTPUT|||||||||
P78|TIE||I/O||||||||||
P79|TIE||I/O||||||||||
P77|FCS|I|I/O|INPUT|||||||||
P78|DS1|I|I/O|INPUT|||||||||
P79|Z3|I|I/O|INPUT|||||||||
P80|AS|I|I/O|INPUT|||||||||
P81|UDS|I|I/O|INPUT|||||||||
P82|LDS|I|I/O|INPUT|||||||||
P83|RW|I|I/O|INPUT|||||||||
P84|VCC||VCCINT||||||||||
P85|DTACK|O|I/O|OUTPUT|||||||||
P86|A<23>|I|I/O|INPUT|||||||||
P87|A<22>|I|I/O|INPUT|||||||||
P88|A<21>|I|I/O|INPUT|||||||||
P86|A<23>|I/O|I/O|BIDIR|||||||||
P87|A<22>|I/O|I/O|BIDIR|||||||||
P88|A<21>|I/O|I/O|BIDIR|||||||||
P89|GND||GND||||||||||
P90|GND||GND||||||||||
P91|A<20>|I|I/O|INPUT|||||||||
P92|A<19>|I|I/O|INPUT|||||||||
P93|TIE||I/O||||||||||
P94|A<18>|I|I/O|INPUT|||||||||
P95|A<17>|I|I/O|INPUT|||||||||
P91|A<20>|I/O|I/O|BIDIR|||||||||
P92|A<19>|I/O|I/O|BIDIR|||||||||
P93|DS0|I|I/O|INPUT|||||||||
P94|A<18>|I/O|I/O|BIDIR|||||||||
P95|A<17>|I/O|I/O|BIDIR|||||||||
P96|MTACK|O|I/O|OUTPUT|||||||||
P97|A<16>|I|I/O|INPUT|||||||||
P98|BERR|I|I/O|INPUT|||||||||
P97|A<16>|I/O|I/O|BIDIR|||||||||
P98|TIE||I/O||||||||||
P99|GND||GND||||||||||
P100|OVR|O|I/O|OUTPUT|||||||||
P101|TIE||I/O||||||||||
P101|MTCR|I|I/O|INPUT|||||||||
P102|C3|I|I/O|INPUT|||||||||
P103|C1|I|I/O|INPUT|||||||||
P104|CFIN|I|I/O|INPUT|||||||||
@@ -127,7 +127,7 @@ P106|SLAVE|O|I/O|OUTPUT|||||||||
P107|OWN|O|I/O|OUTPUT|||||||||
P108|GND||GND||||||||||
P109|VCC||VCCIO||||||||||
P110|LAN_CFG<4>|O|I/O|OUTPUT|||||||||
P110|TIE||I/O||||||||||
P111|LAN_INT|I|I/O|INPUT|||||||||
P112|DQ<15>|I/O|I/O|BIDIR|||||||||
P113|DQ<13>|I/O|I/O|BIDIR|||||||||
@@ -152,7 +152,7 @@ P131|DQ<14>|I/O|I/O|BIDIR|||||||||
P132|LAN_WRH|O|I/O|OUTPUT|||||||||
P133|LAN_CS|O|I/O|OUTPUT|||||||||
P134|LAN_RD|O|I/O|OUTPUT|||||||||
P135|LAN_CFG<2>|O|I/O|OUTPUT|||||||||
P135|INT6_OUT|O|I/O|OUTPUT|||||||||
P136|A_LAN<12>|O|I/O|OUTPUT|||||||||
P137|A_LAN<13>|O|I/O|OUTPUT|||||||||
P138|A_LAN<10>|O|I/O|OUTPUT|||||||||
@@ -160,7 +160,7 @@ P139|A_LAN<11>|O|I/O|OUTPUT|||||||||
P140|A_LAN<8>|O|I/O|OUTPUT|||||||||
P141|VCC||VCCINT||||||||||
P142|A_LAN<9>|O|I/O|OUTPUT|||||||||
P143|RESET|GSR/I|I/O/GSR||||||||||
P143|RESET|I|I/O/GSR|INPUT|||||||||
P144|GND||GND||||||||||
To preserve the pinout above for future design iterations in
Logic/LAN_IDE_V2/LAN_IDE_CP.rpt
+2702 -2135
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File diff suppressed because it is too large Load Diff
Logic/LAN_IDE_V2/LAN_IDE_CP.syr
+219 -80
View File
@@ -4,13 +4,13 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
Total REAL time to Xst completion: 1.00 secs
Total CPU time to Xst completion: 0.13 secs
Total CPU time to Xst completion: 0.12 secs
--> Parameter xsthdpdir set to xst
Total REAL time to Xst completion: 1.00 secs
Total CPU time to Xst completion: 0.13 secs
Total CPU time to Xst completion: 0.12 secs
--> Reading design: LAN_IDE_CP.prj
@@ -77,8 +77,9 @@ Setting FSM Encoding Algorithm to : Gray
=========================================================================
* HDL Compilation *
=========================================================================
Compiling vhdl file "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd" in Library work.
Architecture behavioral of Entity lan_ide_cp is up to date.
Compiling vhdl file "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.vhd" in Library work.
Entity <lan_ide_cp> compiled.
Entity <lan_ide_cp> (Architecture <behavioral>) compiled.
=========================================================================
* Design Hierarchy Analysis *
@@ -90,6 +91,12 @@ Analyzing hierarchy for entity <LAN_IDE_CP> in library <work> (architecture <beh
* HDL Analysis *
=========================================================================
Analyzing Entity <LAN_IDE_CP> in library <work> (Architecture <behavioral>).
WARNING:Xst:819 - "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.vhd" line 271: One or more signals are missing in the process sensitivity list. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are:
<CLK_EXT>
WARNING:Xst:819 - "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.vhd" line 517: One or more signals are missing in the process sensitivity list. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are:
<CLK_EXT>
WARNING:Xst:819 - "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.vhd" line 683: One or more signals are missing in the process sensitivity list. To enable synthesis of FPGA/CPLD hardware, XST will assume that all necessary signals are present in the sensitivity list. Please note that the result of the synthesis may differ from the initial design specification. The missing signals are:
<CLK_EXT>
Entity <LAN_IDE_CP> analyzed. Unit <LAN_IDE_CP> generated.
@@ -99,25 +106,43 @@ Entity <LAN_IDE_CP> analyzed. Unit <LAN_IDE_CP> generated.
Performing bidirectional port resolution...
INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
Synthesizing Unit <LAN_IDE_CP>.
Related source file is "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd".
WARNING:Xst:647 - Input <DS0> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <DS1> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <FCS> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <Z3> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <MTCR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:1780 - Signal <LAN_INT_D0> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
WARNING:Xst:1780 - Signal <DTACK_S> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
Found finite state machine <FSM_0> for signal <LAN_RST_SM>.
Related source file is "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.vhd".
WARNING:Xst:647 - Input <IDE_WAIT> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:647 - Input <BERR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
WARNING:Xst:646 - Signal <LAN_BASEADR<7:0>> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
WARNING:Xst:1780 - Signal <CONFIG_READY> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
Found finite state machine <FSM_0> for signal <LAN_SM>.
-----------------------------------------------------------------------
| States | 13 |
| Transitions | 19 |
| Inputs | 4 |
| Outputs | 14 |
| Clock | CLK_EXT (rising_edge) |
| Reset | LAN_SM_RST (positive) |
| Reset type | asynchronous |
| Reset State | nop |
| Power Up State | nop |
| Encoding | gray |
| Implementation | automatic |
-----------------------------------------------------------------------
Found finite state machine <FSM_1> for signal <LAN_RST_SM>.
-----------------------------------------------------------------------
| States | 8 |
| Transitions | 8 |
| Inputs | 0 |
| Outputs | 8 |
| Outputs | 30 |
| Clock | CLK_EXT (rising_edge) |
| Reset | RESET (positive) |
| Reset type | synchronous |
| Reset type | asynchronous |
| Reset State | nop |
| Power Up State | nop |
| Encoding | gray |
@@ -131,50 +156,73 @@ WARNING:Xst:1780 - Signal <DTACK_S> is never used or assigned. This unconnected
Found 1-bit tristate buffer for signal <DTACK>.
Found 1-bit tristate buffer for signal <INT2_OUT>.
Found 1-bit tristate buffer for signal <INT6_OUT>.
Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 147.
Found 2-bit register for signal <AUTO_CONFIG_DONE>.
Found 2-bit register for signal <AUTO_CONFIG_DONE_CYCLE>.
Found 2-bit adder for signal <AUTO_CONFIG_DONE_CYCLE$addsub0000> created at line 415.
Found 1-bit register for signal <autoconfig>.
Found 1-bit register for signal <cp>.
Found 8-bit comparator equal for signal <cp$cmp_eq0001> created at line 217.
Found 8-bit comparator equal for signal <cp$cmp_eq0002> created at line 223.
Found 2-bit comparator less for signal <cp$cmp_lt0000> created at line 216.
Found 1-bit tristate buffer for signal <A<23>>.
Found 1-bit tristate buffer for signal <A<22>>.
Found 1-bit tristate buffer for signal <A<21>>.
Found 1-bit tristate buffer for signal <A<20>>.
Found 1-bit tristate buffer for signal <A<19>>.
Found 1-bit tristate buffer for signal <A<18>>.
Found 1-bit tristate buffer for signal <A<17>>.
Found 1-bit tristate buffer for signal <A<16>>.
Found 1-bit tristate buffer for signal <A<15>>.
Found 1-bit tristate buffer for signal <A<14>>.
Found 1-bit tristate buffer for signal <A<13>>.
Found 1-bit tristate buffer for signal <A<12>>.
Found 1-bit tristate buffer for signal <A<11>>.
Found 1-bit tristate buffer for signal <A<10>>.
Found 1-bit tristate buffer for signal <A<9>>.
Found 1-bit tristate buffer for signal <A<8>>.
Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 184.
Found 1-bit register for signal <AS_D0>.
Found 1-bit register for signal <AS_D1>.
Found 3-bit register for signal <AUTO_CONFIG_Z2_DONE>.
Found 3-bit register for signal <AUTO_CONFIG_Z2_DONE_CYCLE>.
Found 1-bit register for signal <AUTOCONFIG_Z2_ACCESS>.
Found 1-bit register for signal <CP_ACCESS>.
Found 8-bit comparator equal for signal <CP_ACCESS$cmp_eq0000> created at line 309.
Found 8-bit register for signal <CP_BASEADR>.
Found 1-bit register for signal <CP_RD_S>.
Found 1-bit register for signal <CP_WE_QUIRK>.
Found 1-bit register for signal <CP_WE_S>.
Found 4-bit register for signal <Dout1>.
Found 3-bit comparator less for signal <Dout1$cmp_lt0000> created at line 337.
Found 1-bit register for signal <DS_D>.
Found 1-bit register for signal <ide>.
Found 8-bit comparator equal for signal <ide$cmp_eq0000> created at line 226.
Found 4-bit register for signal <D_Z2_OUT>.
Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 649.
Found 16-bit register for signal <DQ_DATA>.
Found 1-bit register for signal <DQ_SWAP>.
Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 284.
Found 1-bit register for signal <IDE_ACCESS>.
Found 8-bit comparator equal for signal <IDE_ACCESS$cmp_eq0000> created at line 316.
Found 8-bit register for signal <IDE_BASEADR>.
Found 1-bit register for signal <IDE_ENABLE>.
Found 1-bit register for signal <IDE_R_S>.
Found 1-bit register for signal <IDE_W_S>.
Found 1-bit register for signal <lan_adr>.
Found 1-bit register for signal <lan_adr_sw>.
Found 2-bit comparator less for signal <lan_adr_sw$cmp_lt0000> created at line 219.
Found 8-bit register for signal <LAN_BASEADR>.
Found 1-bit register for signal <INT_VECTOR_CYCLE>.
Found 14-bit register for signal <LAN_A_INIT>.
Found 1-bit register for signal <LAN_ACCESS>.
Found 8-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 283.
Found 16-bit register for signal <LAN_BASEADR>.
Found 1-bit register for signal <LAN_CS_RST>.
Found 16-bit register for signal <LAN_D_INIT>.
Found 1-bit register for signal <LAN_INT_ENABLE>.
Found 1-bit register for signal <LAN_IRQ_D0>.
Found 1-bit register for signal <LAN_IRQ_OUT>.
Found 1-bit register for signal <LAN_RD_S>.
Found 1-bit register for signal <LAN_READY>.
Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 406.
Found 1-bit register for signal <LAN_SM_RST>.
Found 1-bit register for signal <LAN_WR_RST>.
Found 1-bit register for signal <LAN_WRH_S>.
Found 1-bit register for signal <LAN_WRL_S>.
Found 1-bit register for signal <lancp>.
Found 1-bit register for signal <ROM_OE_S>.
Found 3-bit register for signal <SHUT_UP>.
Found 3-bit register for signal <SHUT_UP_Z2>.
Found 1-bit register for signal <Z3_A_LOW>.
Found 14-bit register for signal <Z3_ADR>.
Found 32-bit register for signal <Z3_DATA>.
Summary:
inferred 1 Finite State Machine(s).
inferred 18 D-type flip-flop(s).
inferred 1 Adder/Subtractor(s).
inferred 2 Finite State Machine(s).
inferred 61 D-type flip-flop(s).
inferred 6 Comparator(s).
inferred 1 Xor(s).
inferred 38 Tristate(s).
inferred 54 Tristate(s).
Unit <LAN_IDE_CP> synthesized.
@@ -182,19 +230,19 @@ Unit <LAN_IDE_CP> synthesized.
HDL Synthesis Report
Macro Statistics
# Adders/Subtractors : 1
2-bit adder : 1
# Registers : 31
1-bit register : 25
2-bit register : 2
# Registers : 73
1-bit register : 64
14-bit register : 2
16-bit register : 3
3-bit register : 1
4-bit register : 1
8-bit register : 3
8-bit register : 2
# Comparators : 6
2-bit comparator less : 2
3-bit comparator less : 1
4-bit comparator less : 1
8-bit comparator equal : 3
# Tristates : 8
1-bit tristate buffer : 6
# Tristates : 24
1-bit tristate buffer : 22
16-bit tristate buffer : 2
# Xors : 1
1-bit xor2 : 1
@@ -218,16 +266,55 @@ Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with gray encoding.
set_commit | 101
done | 100
------------------------
Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:4]> with gray encoding.
-------------------------------
State | Encoding
-------------------------------
nop | 0000
start_read_upper | unreached
wait_read_upper | 0011
end_read_upper | 0101
start_read_lower | 0100
wait_read_lower | 0010
end_read_lower | 1100
start_write_upper | 0110
wait_write_upper | 1101
end_write_upper | 1111
start_write_lower | 0111
wait_write_lower | 1110
end_write_lower | 1010
config_rw | 0001
-------------------------------
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <13>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <12>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <11>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <10>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <9>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <8>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <7>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <5>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <4>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <2>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <1>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <0>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <15>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <14>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <13>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <12>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <7>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <6>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <5>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <3>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <2>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 0 in block <0>. This FF/Latch will be trimmed during the optimization process.
=========================================================================
Advanced HDL Synthesis Report
Macro Statistics
# FSMs : 1
# Adders/Subtractors : 1
2-bit adder : 1
# Registers : 18
Flip-Flops : 18
# FSMs : 2
# Registers : 61
Flip-Flops : 61
# Comparators : 3
8-bit comparator equal : 3
@@ -236,11 +323,65 @@ Macro Statistics
=========================================================================
* Low Level Synthesis *
=========================================================================
WARNING:Xst:1293 - FF/Latch <LAN_D_INIT_15> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_14> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_13> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_12> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_7> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_6> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_5> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_3> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_2> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_D_INIT_0> has a constant value of 0 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_13> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_12> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_11> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_10> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_9> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_8> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_7> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_5> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_4> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_2> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_1> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_0> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
WARNING:Xst:2677 - Node <LAN_BASEADR_7> of sequential type is unconnected in block <LAN_IDE_CP>.
WARNING:Xst:2677 - Node <LAN_BASEADR_6> of sequential type is unconnected in block <LAN_IDE_CP>.
WARNING:Xst:2677 - Node <LAN_BASEADR_5> of sequential type is unconnected in block <LAN_IDE_CP>.
WARNING:Xst:2677 - Node <LAN_BASEADR_4> of sequential type is unconnected in block <LAN_IDE_CP>.
WARNING:Xst:2677 - Node <LAN_BASEADR_3> of sequential type is unconnected in block <LAN_IDE_CP>.
WARNING:Xst:2677 - Node <LAN_BASEADR_2> of sequential type is unconnected in block <LAN_IDE_CP>.
WARNING:Xst:2677 - Node <LAN_BASEADR_1> of sequential type is unconnected in block <LAN_IDE_CP>.
WARNING:Xst:2677 - Node <LAN_BASEADR_0> of sequential type is unconnected in block <LAN_IDE_CP>.
INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_8> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_10> <LAN_D_INIT_11>
INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_1> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_4> <LAN_D_INIT_9>
Optimizing unit <LAN_IDE_CP> ...
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_0
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_1
implementation constraint: INIT=s : SHUT_UP_Z2_0
implementation constraint: INIT=r : LAN_INT_ENABLE
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_2
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_1
implementation constraint: INIT=s : D_Z2_OUT_0
implementation constraint: INIT=s : D_Z2_OUT_2
implementation constraint: INIT=s : LAN_A_INIT_3
implementation constraint: INIT=s : LAN_A_INIT_6
implementation constraint: INIT=s : D_Z2_OUT_3
implementation constraint: INIT=s : D_Z2_OUT_1
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_2
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_0
implementation constraint: INIT=r : LAN_D_INIT_1
implementation constraint: INIT=r : LAN_D_INIT_8
implementation constraint: INIT=s : SHUT_UP_Z2_1
implementation constraint: INIT=s : SHUT_UP_Z2_2
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd1
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd2
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd3
implementation constraint: INIT=r : LAN_SM_FSM_FFd1
implementation constraint: INIT=r : LAN_SM_FSM_FFd2
implementation constraint: INIT=r : LAN_SM_FSM_FFd3
implementation constraint: INIT=r : LAN_SM_FSM_FFd4
=========================================================================
* Partition Report *
@@ -269,45 +410,43 @@ Clock Enable : YES
wysiwyg : NO
Design Statistics
# IOs : 117
# IOs : 113
Cell Usage :
# BELS : 904
# AND2 : 207
# AND3 : 75
# AND4 : 9
# AND5 : 2
# AND6 : 1
# BELS : 1475
# AND2 : 486
# AND3 : 67
# AND4 : 26
# AND5 : 1
# AND8 : 3
# GND : 1
# INV : 374
# OR2 : 182
# OR3 : 20
# OR4 : 2
# VCC : 1
# XOR2 : 27
# FlipFlops/Latches : 60
# FD : 11
# FDC : 6
# FDCE : 6
# FDP : 4
# FDPE : 33
# IO Buffers : 112
# IBUF : 37
# IOBUFE : 32
# OBUF : 37
# INV : 558
# OR2 : 246
# OR3 : 58
# OR4 : 4
# XOR2 : 25
# FlipFlops/Latches : 136
# FD : 4
# FDC : 19
# FDCE : 10
# FDP : 27
# FDPE : 76
# IO Buffers : 111
# IBUF : 24
# IOBUFE : 48
# OBUF : 33
# OBUFE : 6
=========================================================================
Total REAL time to Xst completion: 9.00 secs
Total CPU time to Xst completion: 8.51 secs
Total CPU time to Xst completion: 8.50 secs
-->
Total memory usage is 4534796 kilobytes
Total memory usage is 4521784 kilobytes
Number of errors : 0 ( 0 filtered)
Number of warnings : 7 ( 0 filtered)
Number of infos : 1 ( 0 filtered)
Number of warnings : 59 ( 0 filtered)
Number of infos : 10 ( 0 filtered)
Logic/LAN_IDE_V2/LAN_IDE_CP.tspec
+1379 -3
View File
File diff suppressed because it is too large Load Diff
Logic/LAN_IDE_V2/LAN_IDE_CP.vhd
+52 -41
View File
@@ -155,6 +155,8 @@ architecture Behavioral of LAN_IDE_CP is
signal AMIGA_CLK:STD_LOGIC;
signal DS:STD_LOGIC;
signal AS_D0:STD_LOGIC;
signal AS_D1:STD_LOGIC;
signal LAN_CS_RST: std_logic;
signal LAN_WR_RST: std_logic;
@@ -249,64 +251,76 @@ begin
ADDRESS_Z3_DECODE: process(reset,FCS)
begin
if(reset='0')then
elsif(falling_edge(FCS))then
end if;
end process ADDRESS_Z3_DECODE;
ADDRESS_DECODE: process(FCS,reset,AS)
begin
if(reset='0' )then
AUTOCONFIG_Z2_ACCESS <= '0';
IDE_ACCESS <= '0';
CP_ACCESS <= '0';
AS_D0 <='1';
LAN_ACCESS <= '0';
DQ_SWAP <= '1';
Z3_ADR <= (others => '1');
INT_VECTOR_CYCLE <='0';
elsif(falling_edge(FCS))then
Z3_ADR(15 downto 2) <= A(15 downto 2);-- latch the whole address for the whole cycle
INT_VECTOR_CYCLE <= not MTCR; --is this s special int vector cycle?!?
--use D(15 downto 8)& A(23 downto 16) = A(31 downto 16) for quick response
--lan base
--if(Z3='1' and (D(15 downto 8) & A(23 downto 16)) = LAN_BASEADR and SHUT_UP_Z2(0)='0' )then
if(Z3='1' and (D(15 downto 8) ) = LAN_BASEADR(15 downto 8) and SHUT_UP_Z2(0)='0' )then --only the upper 8 bits matter!!!
if(A(14 downto 13)<"11")then
DQ_SWAP <= '1';
elsif(rising_edge(CLK_EXT))then
if(FCS='0' and AS_D1 ='1' and Z3='1') then
Z3_ADR(15 downto 2) <= A(15 downto 2);-- latch the whole address for the whole cycle
INT_VECTOR_CYCLE <= not MTCR; --is this s special int vector cycle?!?
--use D(15 downto 8)& A(23 downto 16) = A(31 downto 16) for quick response
--lan base
--if(Z3='1' and (D(15 downto 8) & A(23 downto 16)) = LAN_BASEADR and SHUT_UP_Z2(0)='0' )then
if((D(15 downto 8) ) = LAN_BASEADR(15 downto 8) and SHUT_UP_Z2(0)='0' )then --only the upper 8 bits matter!!!
if(A(14 downto 13)<"11")then
DQ_SWAP <= '1';
else
DQ_SWAP <= '0';
end if;
LAN_ACCESS <= '1';
else
DQ_SWAP <= '0';
LAN_ACCESS <= '0';
DQ_SWAP <= '1';
end if;
LAN_ACCESS <= '1';
else
elsif(FCS ='1' or Z3='0')then
LAN_ACCESS <= '0';
DQ_SWAP <= '1';
end if;
end if;
end process ADDRESS_Z3_DECODE;
ADDRESS_Z2_DECODE: process(FCS,reset,AS)
begin
if(reset='0' or FCS='1')then
AUTOCONFIG_Z2_ACCESS <= '0';
IDE_ACCESS <= '0';
CP_ACCESS <= '0';
elsif(falling_edge(AS))then
if(A(23 downto 16) = x"E8" and AUTO_CONFIG_Z2_DONE /= "111" and CFIN='0')then
end if;
AS_D0 <= AS;
AS_D1 <= FCS; -- double sync!
if(A(23 downto 16) = x"E8" and AUTO_CONFIG_Z2_DONE /= "111" and CFIN='0' and LAN_ACCESS = '0' and AS='0')then
AUTOCONFIG_Z2_ACCESS <= '1';
else
AUTOCONFIG_Z2_ACCESS <= '0';
end if;
--CP base
if(A(23 downto 16) = CP_BASEADR and SHUT_UP_Z2(1)='0' and LAN_ACCESS = '0')then
if(A(23 downto 16) = CP_BASEADR and SHUT_UP_Z2(1)='0' and LAN_ACCESS = '0' and AS='0' )then
CP_ACCESS <= '1';
else
CP_ACCESS <= '0';
end if;
--IDE base
if(A(23 downto 16) = IDE_BASEADR and SHUT_UP_Z2(2)='0' and LAN_ACCESS = '0' )then
if(A(23 downto 16) = IDE_BASEADR and SHUT_UP_Z2(2)='0' and LAN_ACCESS = '0' and AS='0' )then
IDE_ACCESS <= '1';
else
IDE_ACCESS <= '0';
end if;
end if;
end process ADDRESS_Z2_DECODE;
end process ADDRESS_DECODE;
--LAN interrupt controll
lan_int_proc: process (CLK_EXT,reset)
@@ -501,9 +515,9 @@ begin
CP_BASEADR<=x"FF";
AUTO_CONFIG_Z2_DONE <="000";
LAN_BASEADR<=x"FFFF";
elsif falling_edge(AMIGA_CLK) then -- no reset, so wait for rising edge of the clock
elsif rising_edge(CLK_EXT) then -- no reset, so wait for rising edge of the clock
D_Z2_OUT<="1111";
if(AS='1')then
if(AS_D0='1')then
AUTO_CONFIG_Z2_DONE <= AUTO_CONFIG_Z2_DONE or AUTO_CONFIG_Z2_DONE_CYCLE or (not AUTOBOOT_OFF & "00") ;
elsif(AUTOCONFIG_Z2_ACCESS= '1' and DS='0') then
case A(6 downto 1) is
@@ -667,26 +681,25 @@ begin
IDE_R_S <= '1';
IDE_W_S <= '1';
ROM_OE_S <= '1';
elsif falling_edge(AMIGA_CLK) then
elsif rising_edge(CLK_EXT) then
--default values
IDE_R_S <= '1';
IDE_W_S <= '1';
ROM_OE_S <= '1';
if(IDE_ACCESS='1' and AS='0')then
if(IDE_ACCESS='1')then
if(RW='0')then
--the write goes to the hdd!
IDE_ENABLE <= '0'; -- enable IDE on first read
IDE_W_S <= '0';
else
IDE_R_S <= IDE_ENABLE; --read from IDE instead from ROM
ROM_OE_S <= not IDE_ENABLE;
ROM_OE_S <= not IDE_ENABLE;
end if;
end if;
end if;
end process ide_rw_gen;
IDE_W <= IDE_W_S when AS='0' else '1';
IDE_R <= IDE_R_S when AS='0' else '1';
IDE_R <= IDE_R_S when AS='0' else '1';
ROM_OE<= ROM_OE_S when AS='0' else '1';
IDE_CS(0)<= not(A(12));
IDE_CS(1)<= not(A(13));
@@ -708,8 +721,6 @@ begin
CP_WE_QUIRK <= CP_WE_S; --the clockport write must be low exactly one 7MHz cycle!
end if;
end process cp_rw_gen;
--for the future
CP_WE <= CP_WE_S when AS='0' and CP_WE_QUIRK ='1' else '1';
CP_RD <= CP_RD_S when AS='0' else '1';
CP_CS <= not CP_ACCESS;
Logic/LAN_IDE_V2/LAN_IDE_CP.vm6
+15520 -10612
View File
File diff suppressed because it is too large Load Diff
Logic/LAN_IDE_V2/LAN_IDE_CP_V2.zip
BIN
View File
Binary file not shown.
Logic/LAN_IDE_V2/LAN_IDEz2v2.gise
+14 -9
View File
@@ -67,10 +67,12 @@
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1551552942" xil_pn:in_ck="-8368315473908605201" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="-5742752562858310575" xil_pn:start_ts="1551552931">
<transform xil_pn:end_ts="1545595558" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="1235887333676579674" xil_pn:start_ts="1545595546">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForInputs"/>
<status xil_pn:value="OutOfDateForProperties"/>
<outfile xil_pn:name="LAN_IDE_CP.lso"/>
<outfile xil_pn:name="LAN_IDE_CP.ngc"/>
<outfile xil_pn:name="LAN_IDE_CP.ngr"/>
@@ -84,23 +86,26 @@
<outfile xil_pn:name="webtalk_pn.xml"/>
<outfile xil_pn:name="xst"/>
</transform>
<transform xil_pn:end_ts="1550744562" xil_pn:in_ck="176569500195729039" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-8537920303570934858" xil_pn:start_ts="1550744562">
<transform xil_pn:end_ts="1545079613" xil_pn:in_ck="176569500195729039" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-8537920303570934858" xil_pn:start_ts="1545079613">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="ReadyToRun"/>
</transform>
<transform xil_pn:end_ts="1551552950" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1551552942">
<transform xil_pn:end_ts="1545595565" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1545595558">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForPredecessor"/>
<outfile xil_pn:name="LAN_IDE_CP.bld"/>
<outfile xil_pn:name="LAN_IDE_CP.ngd"/>
<outfile xil_pn:name="LAN_IDE_CP_ngdbuild.xrpt"/>
<outfile xil_pn:name="_ngo"/>
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
</transform>
<transform xil_pn:end_ts="1551552983" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-1014768965495450326" xil_pn:start_ts="1551552950">
<transform xil_pn:end_ts="1545595609" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-1014768965495450326" xil_pn:start_ts="1545595565">
<status xil_pn:value="SuccessfullyRun"/>
<status xil_pn:value="WarningsGenerated"/>
<status xil_pn:value="ReadyToRun"/>
<status xil_pn:value="OutOfDateForPredecessor"/>
<outfile xil_pn:name="LAN_IDE_CP.gyd"/>
<outfile xil_pn:name="LAN_IDE_CP.mfd"/>
<outfile xil_pn:name="LAN_IDE_CP.nga"/>
@@ -114,32 +119,32 @@
<outfile xil_pn:name="LAN_IDE_CP_html"/>
<outfile xil_pn:name="LAN_IDE_CP_pad.csv"/>
</transform>
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