Start of reintegration IDE/CP AutoConfig works
This commit is contained in:
MHeinrichs
@@ -4,13 +4,13 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
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Total REAL time to Xst completion: 0.00 secs
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Total CPU time to Xst completion: 0.14 secs
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Total CPU time to Xst completion: 0.13 secs
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--> Parameter xsthdpdir set to xst
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Total REAL time to Xst completion: 0.00 secs
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Total CPU time to Xst completion: 0.14 secs
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Total CPU time to Xst completion: 0.13 secs
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--> Reading design: LAN_IDE_CP.prj
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@@ -43,7 +43,7 @@ Target Device : XC9500XL CPLDs
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---- Source Options
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Top Module Name : LAN_IDE_CP
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Automatic FSM Extraction : YES
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FSM Encoding Algorithm : Gray
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FSM Encoding Algorithm : Compact
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Safe Implementation : No
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Mux Extraction : Yes
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Resource Sharing : YES
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@@ -71,7 +71,7 @@ wysiwyg : NO
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=========================================================================
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Setting FSM Encoding Algorithm to : Gray
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Setting FSM Encoding Algorithm to : OPT
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=========================================================================
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@@ -109,13 +109,10 @@ INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP>
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Synthesizing Unit <LAN_IDE_CP>.
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Related source file is "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd".
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WARNING:Xst:647 - Input <C3> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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WARNING:Xst:647 - Input <IDE_WAIT> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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WARNING:Xst:647 - Input <AS> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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WARNING:Xst:647 - Input <AUTOBOOT_OFF> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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WARNING:Xst:647 - Input <CP_IRQ> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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WARNING:Xst:2565 - Inout <A<1>> is never assigned.
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WARNING:Xst:647 - Input <MTCR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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WARNING:Xst:647 - Input <C1> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
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INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
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Found finite state machine <FSM_0> for signal <LAN_SM>.
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-----------------------------------------------------------------------
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@@ -128,7 +125,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
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| Reset type | asynchronous |
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| Reset State | nop |
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| Power Up State | nop |
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| Encoding | gray |
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| Encoding | compact |
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| Implementation | automatic |
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-----------------------------------------------------------------------
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Found finite state machine <FSM_1> for signal <LAN_RST_SM>.
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@@ -142,7 +139,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
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| Reset type | asynchronous |
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| Reset State | nop |
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| Power Up State | nop |
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| Encoding | gray |
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| Encoding | compact |
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| Implementation | automatic |
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-----------------------------------------------------------------------
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Found 16x8-bit ROM for signal <D_OUT$mux0004>.
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@@ -170,18 +167,31 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
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Found 1-bit tristate buffer for signal <A<10>>.
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Found 1-bit tristate buffer for signal <A<9>>.
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Found 1-bit tristate buffer for signal <A<8>>.
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Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 173.
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Found 1-bit register for signal <AUTO_CONFIG_DONE>.
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Found 1-bit register for signal <AUTO_CONFIG_DONE_CYCLE>.
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Found 1-bit register for signal <AUTOCONFIG_ACCESS>.
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Found 2-bit register for signal <AUTO_CONFIG_Z2_DONE>.
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Found 2-bit register for signal <AUTO_CONFIG_Z2_DONE_CYCLE>.
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Found 1-bit register for signal <AUTOCONFIG_Z2_ACCESS>.
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Found 1-bit register for signal <AUTOCONFIG_Z3_ACCESS>.
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Found 1-bit register for signal <CONFIG_READY>.
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Found 1-bit register for signal <CP_ACCESS>.
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Found 8-bit comparator equal for signal <CP_ACCESS$cmp_eq0000> created at line 290.
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Found 8-bit register for signal <CP_BASEADR>.
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Found 8-bit register for signal <D_OUT>.
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Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 518.
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Found 4-bit register for signal <D_Z2_OUT>.
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Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 669.
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Found 16-bit register for signal <DQ_DATA>.
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Found 1-bit register for signal <DQ_SWAP>.
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Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 249.
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Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 261.
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Found 1-bit register for signal <IDE_ACCESS>.
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Found 8-bit comparator equal for signal <IDE_ACCESS$cmp_eq0000> created at line 297.
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Found 8-bit register for signal <IDE_BASEADR>.
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Found 1-bit register for signal <IDE_ENABLE>.
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Found 8-bit comparator equal for signal <IDE_ENABLE$cmp_eq0000> created at line 297.
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Found 14-bit register for signal <LAN_A_INIT>.
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Found 1-bit register for signal <LAN_ACCESS>.
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Found 16-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 248.
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Found 16-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 260.
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Found 16-bit register for signal <LAN_BASEADR>.
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Found 1-bit register for signal <LAN_CS_RST>.
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Found 16-bit register for signal <LAN_D_INIT>.
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@@ -190,20 +200,22 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
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Found 1-bit register for signal <LAN_IRQ_OUT>.
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Found 1-bit register for signal <LAN_RD_S>.
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Found 1-bit register for signal <LAN_READY>.
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Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 360.
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Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 405.
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Found 1-bit register for signal <LAN_SM_RST>.
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Found 1-bit register for signal <LAN_WR_RST>.
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Found 1-bit register for signal <LAN_WRH_S>.
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Found 1-bit register for signal <LAN_WRL_S>.
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Found 1-bit register for signal <SHUT_UP>.
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Found 2-bit register for signal <SHUT_UP_Z2>.
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Found 1-bit register for signal <Z3_A_LOW>.
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Found 14-bit register for signal <Z3_ADR>.
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Found 32-bit register for signal <Z3_DATA>.
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Summary:
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inferred 2 Finite State Machine(s).
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inferred 1 ROM(s).
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inferred 49 D-type flip-flop(s).
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inferred 4 Comparator(s).
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inferred 57 D-type flip-flop(s).
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inferred 7 Comparator(s).
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inferred 1 Xor(s).
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inferred 57 Tristate(s).
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Unit <LAN_IDE_CP> synthesized.
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@@ -214,18 +226,23 @@ HDL Synthesis Report
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Macro Statistics
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# ROMs : 1
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16x8-bit ROM : 1
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# Registers : 56
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1-bit register : 50
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# Registers : 68
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1-bit register : 58
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14-bit register : 2
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16-bit register : 3
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8-bit register : 1
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# Comparators : 4
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2-bit register : 1
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4-bit register : 1
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8-bit register : 3
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# Comparators : 7
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16-bit comparator equal : 1
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2-bit comparator less : 2
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4-bit comparator less : 1
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8-bit comparator equal : 3
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# Tristates : 27
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1-bit tristate buffer : 25
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16-bit tristate buffer : 2
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# Xors : 1
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1-bit xor2 : 1
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=========================================================================
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@@ -233,36 +250,36 @@ Macro Statistics
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* Advanced HDL Synthesis *
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=========================================================================
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Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with gray encoding.
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Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with compact encoding.
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------------------------
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State | Encoding
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------------------------
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nop | 000
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wait0 | 001
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clr | 011
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clr_commit | 010
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wait1 | 110
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set | 111
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set_commit | 101
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done | 100
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wait0 | 100
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clr | 101
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clr_commit | 111
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wait1 | 001
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set | 011
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set_commit | 010
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done | 110
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------------------------
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Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:4]> with gray encoding.
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Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:4]> with compact encoding.
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-------------------------------
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State | Encoding
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-------------------------------
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nop | 0000
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start_read_upper | unreached
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wait_read_upper | 0001
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end_read_upper | 0111
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start_read_lower | 0101
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wait_read_upper | 0101
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end_read_upper | 1110
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start_read_lower | 0001
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wait_read_lower | 0011
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end_read_lower | 0100
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start_write_upper | 0010
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wait_write_upper | 1100
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end_write_upper | 1101
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start_write_lower | 0110
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wait_write_lower | 1111
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end_write_lower | 1110
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end_read_lower | 0010
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start_write_upper | 1101
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wait_write_upper | 0111
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end_write_upper | 0110
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start_write_lower | 1001
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wait_write_lower | 1011
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end_write_lower | 1010
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-------------------------------
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WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <13>. This FF/Latch will be trimmed during the optimization process.
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WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <12>. This FF/Latch will be trimmed during the optimization process.
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@@ -294,10 +311,11 @@ Macro Statistics
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# FSMs : 2
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# ROMs : 1
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16x8-bit ROM : 1
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# Registers : 49
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Flip-Flops : 49
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# Comparators : 1
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# Registers : 57
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Flip-Flops : 57
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# Comparators : 4
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16-bit comparator equal : 1
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8-bit comparator equal : 3
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=========================================================================
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@@ -331,17 +349,27 @@ INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_1> in Unit <LAN_IDE_CP> is equivalent t
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Optimizing unit <LAN_IDE_CP> ...
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implementation constraint: INIT=s : D_OUT_7
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implementation constraint: INIT=s : D_OUT_6
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implementation constraint: INIT=s : D_OUT_5
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implementation constraint: INIT=s : D_Z2_OUT_0
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implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_0
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implementation constraint: INIT=s : D_Z2_OUT_3
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implementation constraint: INIT=s : LAN_A_INIT_3
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implementation constraint: INIT=s : D_OUT_4
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implementation constraint: INIT=s : D_OUT_3
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implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_1
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implementation constraint: INIT=s : LAN_A_INIT_6
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implementation constraint: INIT=s : D_OUT_2
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implementation constraint: INIT=s : D_OUT_1
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implementation constraint: INIT=s : D_OUT_0
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implementation constraint: INIT=s : D_OUT_1
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implementation constraint: INIT=s : D_OUT_2
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implementation constraint: INIT=r : LAN_D_INIT_1
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implementation constraint: INIT=s : D_OUT_3
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implementation constraint: INIT=s : SHUT_UP_Z2_0
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implementation constraint: INIT=s : D_OUT_4
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implementation constraint: INIT=r : LAN_D_INIT_8
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implementation constraint: INIT=s : SHUT_UP_Z2_1
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implementation constraint: INIT=s : D_Z2_OUT_2
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implementation constraint: INIT=s : D_OUT_5
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implementation constraint: INIT=s : D_OUT_6
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implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_0
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implementation constraint: INIT=s : D_Z2_OUT_1
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implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_1
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implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd1
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implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd2
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implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd3
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@@ -380,40 +408,40 @@ Design Statistics
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# IOs : 116
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Cell Usage :
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# BELS : 1038
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# AND2 : 344
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# AND3 : 50
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# AND4 : 7
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# AND8 : 4
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# BELS : 1263
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# AND2 : 379
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# AND3 : 54
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# AND4 : 10
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# AND8 : 6
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# GND : 1
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# INV : 382
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# OR2 : 205
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# OR3 : 10
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# OR4 : 17
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# INV : 465
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# OR2 : 277
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# OR3 : 18
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# OR4 : 1
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# VCC : 1
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# XOR2 : 17
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# FlipFlops/Latches : 115
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# XOR2 : 51
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# FlipFlops/Latches : 145
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# FD : 1
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# FDC : 19
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# FDCE : 3
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# FDP : 42
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# FDPE : 50
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# IO Buffers : 109
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# IBUF : 19
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# FDC : 22
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# FDCE : 8
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# FDP : 46
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# FDPE : 68
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# IO Buffers : 112
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# IBUF : 22
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# IOBUFE : 48
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# OBUF : 33
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# OBUFE : 9
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=========================================================================
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Total REAL time to Xst completion: 8.00 secs
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Total CPU time to Xst completion: 8.42 secs
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Total REAL time to Xst completion: 19.00 secs
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Total CPU time to Xst completion: 19.05 secs
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-->
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Total memory usage is 4534740 kilobytes
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Total memory usage is 4534736 kilobytes
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Number of errors : 0 ( 0 filtered)
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Number of warnings : 51 ( 0 filtered)
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Number of warnings : 48 ( 0 filtered)
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Number of infos : 10 ( 0 filtered)
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