Dominick.Vansevenant/Zorro-LAN-IDE
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Cacheinhibit must be asserted!

Browse Source
This commit is contained in:
MHeinrichs
2018-12-19 18:49:12 +01:00
parent 2bfa35c4b2
commit d0da391575
36 changed files with 14445 additions and 25172 deletions
Download Patch File Download Diff File Expand all files Collapse all files
Logic/LAN_IDE/webtalk_pn.xml
+1 -2
View File
@@ -3,7 +3,7 @@
<!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application name="pn" timeStamp="Tue Dec 18 22:53:37 2018">
<application name="pn" timeStamp="Wed Dec 19 18:44:01 2018">
<section name="Project Information" visible="false">
<property name="ProjectID" value="A2E624B6ED1449CD92F77DE849BF7B51" type="project"/>
<property name="ProjectIteration" value="0" type="project"/>
@@ -18,7 +18,6 @@ This means code written to parse this file will need to be revisited each subseq
<property name="PROP_ManualCompileOrderImp" value="false" type="design"/>
<property name="PROP_PropSpecInProjFile" value="Store all values" type="design"/>
<property name="PROP_Simulator" value="ISim (VHDL/Verilog)" type="design"/>
<property name="PROP_SynthFsmEncode" value="Gray" type="process"/>
<property name="PROP_SynthTopFile" value="changed" type="process"/>
<property name="PROP_Top_Level_Module_Type" value="HDL" type="design"/>
<property name="PROP_UseSmartGuide" value="false" type="design"/>