InitLan works and macros put in the ENCX24J-Lib

This commit is contained in:
MHeinrichs
2017-01-18 22:19:57 +01:00
parent a1b4c891be
commit cca52926f8
56 changed files with 14659 additions and 13505 deletions
+10 -1
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@@ -58,9 +58,18 @@
// Define macro for 8-bit PSP SFR address translation to SPI addresses
#define ENC100_TRANSLATE_TO_PIN_ADDR(a) (a)
#define ENC100_RAM_SIZE (24*1024)
//read/write macros
#define WRITEREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+(b)))=(WORD)(c)//;printf("Write 0x%x at register 0x%lx\n",(WORD)(c),((volatile BYTE *)(a)+(b)))
#define READREG(a,b) (*(volatile WORD *)((volatile BYTE *)(a)+(b)))//;printf("Read from register 0x%lx\n",((volatile BYTE *)(a)+(b)))
//set/clear register bit macros
#define SETREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+((b)+(SET_OFFSET))))=((WORD)(c))//;printf("Set register 0x%x at register 0x%lx\n",(WORD)(c),(volatile WORD *)((volatile BYTE *)(a)+((b)+(SET_OFFSET))));
#define CLRREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+((b)+(CLR_OFFSET))))=((WORD)(c))//;printf("Clear register 0x%x at register 0x%lx\n",(WORD)(c),(volatile WORD *)((volatile BYTE *)(a)+((b)+(CLR_OFFSET))))
// Crypto memory addresses. These are accessible by the DMA only and therefore
// have the same addresses no matter what MCU interface is being used (SPI,
// 8-bit PSP, or 16-bit PSP)
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+23 -10
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@@ -61,12 +61,21 @@ int SoftReset(APTR *BaseAddress){
do{
delayCIA();
v = (WORD) READREG(BaseAddress,ESTAT);
v &= (WORD) w;
printf("Read 0x%x at register 0x%x (should be 0x%x)\n",v,ESTAT,w);
v = (WORD) READREG(BaseAddress,ESTAT);
v &= (WORD) w;
printf("Read 0x%x at register 0x%x (should be 0x%x)\n",v,ESTAT,w);
}while(v != w);
/*
In software, wait at least 25 µs for the Reset to
take place and the SPI/PSP interface to begin
operating again.
*/
for(i=0; i<25; ++i){
delayCIA();
}
// Check to see if the reset operation was successful by
// checking if EUDAST went back to its reset default. This test
// should always pass, but certain special conditions might make
@@ -75,13 +84,15 @@ int SoftReset(APTR *BaseAddress){
printf("Read 0x%x at register 0x%x\n",w,EUDAST);
} while(w != 0);
// Really ensure reset is done and give some time for power to be stable
for(i=0; i<1000; ++i){
delayCIA();
/*
Wait at least 256 µs for the PHY registers and PHY status bits to become available.
*/
for(i=0; i<256; ++i){
delayCIA();
}
// If using PSP, verify all address and data lines are working
// Parallel direct addressing
@@ -98,7 +109,7 @@ int SoftReset(APTR *BaseAddress){
}
// Read back and verify random pattern
i=0;
for(w = 0; w < ENC100_RAM_SIZE; w += sizeof(wTestWriteData))
{
wTestWriteData = w;
@@ -107,10 +118,12 @@ int SoftReset(APTR *BaseAddress){
// See if the data matches. If your application gets stuck here,
// it means you have a hardware failure. Check all of your PSP
// address and data lines.
if(wTestWriteData != wTestReadData)
if(wTestWriteData != wTestReadData){
printf("Error checking memory at adress %lx! Expected %x - got %x\n",(BaseAddress+w),wTestWriteData,wTestReadData);
++i;
}
}
printf("Memory passed with %d errors\n",i);
return v;
}
-5
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@@ -16,11 +16,6 @@
#define VERSION_STRING "1.1"
#define CIA_TST (*(volatile BYTE *)(0XBFE301)) //cia call 1.4micro sec
#define CHP_TST (*(volatile WORD *)(0X000004)) //chip mem call 400ns
#define WRITEREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+(b)))=((WORD)(c))
#define READREG(a,b) ((WORD)(*(volatile WORD *)((volatile BYTE *)(a)+(b))))
#define SETREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+(b)+(SET_OFFSET)))=((WORD)(c))
#define CLRREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+(b)+(CLR_OFFSET)))=((WORD)(c))
struct Library *ExpansionBase=NULL;
unsigned long hex2int(char *a);
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