InitLan works and macros put in the ENCX24J-Lib
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@@ -58,9 +58,18 @@
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// Define macro for 8-bit PSP SFR address translation to SPI addresses
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#define ENC100_TRANSLATE_TO_PIN_ADDR(a) (a)
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#define ENC100_RAM_SIZE (24*1024)
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//read/write macros
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#define WRITEREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+(b)))=(WORD)(c)//;printf("Write 0x%x at register 0x%lx\n",(WORD)(c),((volatile BYTE *)(a)+(b)))
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#define READREG(a,b) (*(volatile WORD *)((volatile BYTE *)(a)+(b)))//;printf("Read from register 0x%lx\n",((volatile BYTE *)(a)+(b)))
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//set/clear register bit macros
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#define SETREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+((b)+(SET_OFFSET))))=((WORD)(c))//;printf("Set register 0x%x at register 0x%lx\n",(WORD)(c),(volatile WORD *)((volatile BYTE *)(a)+((b)+(SET_OFFSET))));
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#define CLRREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+((b)+(CLR_OFFSET))))=((WORD)(c))//;printf("Clear register 0x%x at register 0x%lx\n",(WORD)(c),(volatile WORD *)((volatile BYTE *)(a)+((b)+(CLR_OFFSET))))
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// Crypto memory addresses. These are accessible by the DMA only and therefore
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// have the same addresses no matter what MCU interface is being used (SPI,
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// 8-bit PSP, or 16-bit PSP)
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+23
-10
@@ -61,12 +61,21 @@ int SoftReset(APTR *BaseAddress){
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do{
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delayCIA();
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v = (WORD) READREG(BaseAddress,ESTAT);
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v &= (WORD) w;
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printf("Read 0x%x at register 0x%x (should be 0x%x)\n",v,ESTAT,w);
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v = (WORD) READREG(BaseAddress,ESTAT);
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v &= (WORD) w;
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printf("Read 0x%x at register 0x%x (should be 0x%x)\n",v,ESTAT,w);
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}while(v != w);
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/*
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In software, wait at least 25 µs for the Reset to
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take place and the SPI/PSP interface to begin
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operating again.
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*/
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for(i=0; i<25; ++i){
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delayCIA();
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}
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// Check to see if the reset operation was successful by
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// checking if EUDAST went back to its reset default. This test
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// should always pass, but certain special conditions might make
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@@ -75,13 +84,15 @@ int SoftReset(APTR *BaseAddress){
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printf("Read 0x%x at register 0x%x\n",w,EUDAST);
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} while(w != 0);
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// Really ensure reset is done and give some time for power to be stable
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for(i=0; i<1000; ++i){
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delayCIA();
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/*
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Wait at least 256 µs for the PHY registers and PHY status bits to become available.
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*/
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for(i=0; i<256; ++i){
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delayCIA();
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}
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// If using PSP, verify all address and data lines are working
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// Parallel direct addressing
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@@ -98,7 +109,7 @@ int SoftReset(APTR *BaseAddress){
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}
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// Read back and verify random pattern
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i=0;
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for(w = 0; w < ENC100_RAM_SIZE; w += sizeof(wTestWriteData))
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{
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wTestWriteData = w;
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@@ -107,10 +118,12 @@ int SoftReset(APTR *BaseAddress){
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// See if the data matches. If your application gets stuck here,
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// it means you have a hardware failure. Check all of your PSP
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// address and data lines.
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if(wTestWriteData != wTestReadData)
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if(wTestWriteData != wTestReadData){
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printf("Error checking memory at adress %lx! Expected %x - got %x\n",(BaseAddress+w),wTestWriteData,wTestReadData);
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++i;
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}
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}
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printf("Memory passed with %d errors\n",i);
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return v;
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}
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@@ -16,11 +16,6 @@
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#define VERSION_STRING "1.1"
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#define CIA_TST (*(volatile BYTE *)(0XBFE301)) //cia call 1.4micro sec
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#define CHP_TST (*(volatile WORD *)(0X000004)) //chip mem call 400ns
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#define WRITEREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+(b)))=((WORD)(c))
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#define READREG(a,b) ((WORD)(*(volatile WORD *)((volatile BYTE *)(a)+(b))))
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#define SETREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+(b)+(SET_OFFSET)))=((WORD)(c))
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#define CLRREG(a,b,c) (*(volatile WORD *)((volatile BYTE *)(a)+(b)+(CLR_OFFSET)))=((WORD)(c))
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struct Library *ExpansionBase=NULL;
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unsigned long hex2int(char *a);
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