OK Clock is 33MHz but the timing to AmigaCLK cannot be convertet 1:1...

This commit is contained in:
MHeinrichs
2017-01-26 22:24:01 +01:00
parent 9d64477682
commit c5e1b0debd
47 changed files with 9515 additions and 9811 deletions
+4 -4
View File
@@ -1,9 +1,9 @@
V3 3
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd 2017/01/26.22:00:46 P.68d
EN work/LAN_IDE_CP 1485464447 \
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd 2017/01/26.22:15:57 P.68d
EN work/LAN_IDE_CP 1485465359 \
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd \
PB ieee/std_logic_1164 1370735607 PB ieee/std_logic_arith 1370735608 \
PB ieee/STD_LOGIC_UNSIGNED 1370735609
AR work/LAN_IDE_CP/Behavioral 1485464448 \
AR work/LAN_IDE_CP/Behavioral 1485465360 \
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd \
EN work/LAN_IDE_CP 1485464447
EN work/LAN_IDE_CP 1485465359