OK Clock is 33MHz but the timing to AmigaCLK cannot be convertet 1:1...
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@@ -29,7 +29,7 @@
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<msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) '<arg fmt="%s" index="1">Z3</arg>'. The input(s) are unused after optimization. Please verify functionality via simulation.
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</msg>
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<msg type="warning" file="Cpld" num="1239" delta="new" >The global <arg fmt="%s" index="1">clock</arg> designation (BUFG) on signal '<arg fmt="%s" index="2">N41</arg>' is ignored. Most likely the signal is gated and therefore cannot be used as a global control signal.
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<msg type="warning" file="Cpld" num="1239" delta="old" >The global <arg fmt="%s" index="1">clock</arg> designation (BUFG) on signal '<arg fmt="%s" index="2">N41</arg>' is ignored. Most likely the signal is gated and therefore cannot be used as a global control signal.
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</msg>
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</messages>
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