Dominick.Vansevenant/Zorro-LAN-IDE
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MHeinrichs
2019-02-21 23:41:30 +01:00
parent b1854c3f8c
commit 99f78251cd
35 changed files with 24821 additions and 23815 deletions
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Logic/LAN_IDE/webtalk_pn.xml
+2 -3
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@@ -3,7 +3,7 @@
<!--The data in this file is primarily intended for consumption by Xilinx tools.
The structure and the elements are likely to change over the next few releases.
This means code written to parse this file will need to be revisited each subsequent release.-->
<application name="pn" timeStamp="Thu Feb 21 14:44:45 2019">
<application name="pn" timeStamp="Thu Feb 21 23:37:50 2019">
<section name="Project Information" visible="false">
<property name="ProjectID" value="A2E624B6ED1449CD92F77DE849BF7B51" type="project"/>
<property name="ProjectIteration" value="0" type="project"/>
@@ -18,8 +18,7 @@ This means code written to parse this file will need to be revisited each subseq
<property name="PROP_ManualCompileOrderImp" value="false" type="design"/>
<property name="PROP_PropSpecInProjFile" value="Store all values" type="design"/>
<property name="PROP_Simulator" value="ISim (VHDL/Verilog)" type="design"/>
<property name="PROP_SynthFsmEncode" value="Compact" type="process"/>
<property name="PROP_SynthOpt" value="Area" type="process"/>
<property name="PROP_SynthFsmEncode" value="One-Hot" type="process"/>
<property name="PROP_SynthTopFile" value="changed" type="process"/>
<property name="PROP_Top_Level_Module_Type" value="HDL" type="design"/>
<property name="PROP_UseSmartGuide" value="false" type="design"/>