Intermediate2
This commit is contained in:
@@ -3,14 +3,14 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
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--> Parameter TMPDIR set to xst/projnav.tmp
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Total REAL time to Xst completion: 1.00 secs
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Total CPU time to Xst completion: 0.13 secs
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Total REAL time to Xst completion: 0.00 secs
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Total CPU time to Xst completion: 0.14 secs
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--> Parameter xsthdpdir set to xst
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Total REAL time to Xst completion: 1.00 secs
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Total CPU time to Xst completion: 0.13 secs
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Total REAL time to Xst completion: 0.00 secs
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Total CPU time to Xst completion: 0.14 secs
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--> Reading design: LAN_IDE_CP.prj
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@@ -43,7 +43,7 @@ Target Device : XC9500XL CPLDs
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---- Source Options
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Top Module Name : LAN_IDE_CP
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Automatic FSM Extraction : YES
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FSM Encoding Algorithm : Compact
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FSM Encoding Algorithm : One-Hot
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Safe Implementation : No
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Mux Extraction : Yes
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Resource Sharing : YES
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@@ -55,7 +55,7 @@ XOR Preserve : YES
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Equivalent register Removal : YES
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---- General Options
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Optimization Goal : Area
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Optimization Goal : Speed
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Optimization Effort : 1
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Keep Hierarchy : Yes
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Netlist Hierarchy : As_Optimized
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@@ -71,7 +71,7 @@ wysiwyg : NO
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=========================================================================
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Setting FSM Encoding Algorithm to : OPT
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Setting FSM Encoding Algorithm to : ONE
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=========================================================================
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@@ -123,7 +123,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
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| Reset type | asynchronous |
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| Reset State | nop |
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| Power Up State | nop |
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| Encoding | compact |
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| Encoding | one-hot |
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| Implementation | automatic |
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-----------------------------------------------------------------------
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Found finite state machine <FSM_1> for signal <LAN_RST_SM>.
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@@ -137,7 +137,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
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| Reset type | asynchronous |
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| Reset State | nop |
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| Power Up State | nop |
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| Encoding | compact |
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| Encoding | one-hot |
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| Implementation | automatic |
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-----------------------------------------------------------------------
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Found 16-bit tristate buffer for signal <D>.
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@@ -165,30 +165,30 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
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Found 1-bit tristate buffer for signal <A<10>>.
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Found 1-bit tristate buffer for signal <A<9>>.
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Found 1-bit tristate buffer for signal <A<8>>.
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Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 176.
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Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 177.
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Found 3-bit register for signal <AUTO_CONFIG_Z2_DONE>.
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Found 3-bit register for signal <AUTO_CONFIG_Z2_DONE_CYCLE>.
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Found 1-bit register for signal <AUTOCONFIG_Z2_ACCESS>.
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Found 1-bit register for signal <CP_ACCESS>.
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Found 8-bit comparator equal for signal <CP_ACCESS$cmp_eq0000> created at line 289.
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Found 8-bit comparator equal for signal <CP_ACCESS$cmp_eq0000> created at line 290.
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Found 8-bit register for signal <CP_BASEADR>.
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Found 1-bit register for signal <CP_RD_S>.
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Found 1-bit register for signal <CP_WE_QUIRK>.
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Found 1-bit register for signal <CP_WE_S>.
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Found 4-bit register for signal <D_Z2_OUT>.
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Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 629.
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Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 637.
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Found 16-bit register for signal <DQ_DATA>.
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Found 1-bit register for signal <DQ_SWAP>.
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Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 260.
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Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 261.
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Found 1-bit register for signal <IDE_ACCESS>.
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Found 8-bit comparator equal for signal <IDE_ACCESS$cmp_eq0000> created at line 296.
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Found 8-bit comparator equal for signal <IDE_ACCESS$cmp_eq0000> created at line 297.
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Found 8-bit register for signal <IDE_BASEADR>.
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Found 1-bit register for signal <IDE_ENABLE>.
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Found 1-bit register for signal <IDE_R_S>.
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Found 1-bit register for signal <IDE_W_S>.
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Found 14-bit register for signal <LAN_A_INIT>.
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Found 1-bit register for signal <LAN_ACCESS>.
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Found 16-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 259.
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Found 16-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 260.
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Found 16-bit register for signal <LAN_BASEADR>.
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Found 1-bit register for signal <LAN_CS_RST>.
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Found 16-bit register for signal <LAN_D_INIT>.
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@@ -197,7 +197,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
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Found 1-bit register for signal <LAN_IRQ_OUT>.
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Found 1-bit register for signal <LAN_RD_S>.
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Found 1-bit register for signal <LAN_READY>.
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Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 386.
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Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 387.
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Found 1-bit register for signal <LAN_SM_RST>.
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Found 1-bit register for signal <LAN_WR_RST>.
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Found 1-bit register for signal <LAN_WRH_S>.
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@@ -209,7 +209,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
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Found 32-bit register for signal <Z3_DATA>.
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Summary:
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inferred 2 Finite State Machine(s).
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inferred 58 D-type flip-flop(s).
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inferred 74 D-type flip-flop(s).
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inferred 6 Comparator(s).
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inferred 1 Xor(s).
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inferred 58 Tristate(s).
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@@ -220,10 +220,10 @@ Unit <LAN_IDE_CP> synthesized.
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HDL Synthesis Report
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Macro Statistics
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# Registers : 70
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1-bit register : 61
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# Registers : 85
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1-bit register : 77
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14-bit register : 2
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16-bit register : 3
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16-bit register : 2
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3-bit register : 1
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4-bit register : 1
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8-bit register : 2
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@@ -244,38 +244,38 @@ Macro Statistics
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* Advanced HDL Synthesis *
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=========================================================================
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Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with compact encoding.
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Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:8]> with one-hot encoding.
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------------------------
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State | Encoding
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------------------------
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nop | 000
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wait0 | 100
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clr | 101
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clr_commit | 111
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wait1 | 001
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set | 011
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set_commit | 010
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done | 110
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nop | 00000001
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wait0 | 00000010
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clr | 00000100
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clr_commit | 00001000
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wait1 | 00010000
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set | 00100000
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set_commit | 01000000
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done | 10000000
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------------------------
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Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:4]> with compact encoding.
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-------------------------------
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Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:13]> with one-hot encoding.
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------------------------------------
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State | Encoding
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-------------------------------
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nop | 0000
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------------------------------------
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nop | 0000000000001
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start_read_upper | unreached
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wait_read_upper | 0001
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end_read_upper | 1010
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start_read_lower | 0101
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wait_read_lower | 0111
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end_read_lower | 0110
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start_write_upper | 1001
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wait_write_upper | 0011
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end_write_upper | 0010
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start_write_lower | 1101
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wait_write_lower | 1111
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end_write_lower | 1110
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config_rw | 0100
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-------------------------------
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wait_read_upper | 0000000000100
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end_read_upper | 0000001000000
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start_read_lower | 0000010000000
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wait_read_lower | 0000000001000
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end_read_lower | 0000100000000
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start_write_upper | 0000000010000
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wait_write_upper | 0001000000000
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end_write_upper | 0010000000000
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start_write_lower | 0000000100000
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wait_write_lower | 0100000000000
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end_write_lower | 1000000000000
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config_rw | 0000000000010
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------------------------------------
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WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <13>. This FF/Latch will be trimmed during the optimization process.
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WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <12>. This FF/Latch will be trimmed during the optimization process.
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WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <11>. This FF/Latch will be trimmed during the optimization process.
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@@ -304,8 +304,8 @@ Advanced HDL Synthesis Report
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Macro Statistics
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# FSMs : 2
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# Registers : 58
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Flip-Flops : 58
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# Registers : 74
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Flip-Flops : 74
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# Comparators : 3
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16-bit comparator equal : 1
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8-bit comparator equal : 2
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@@ -339,14 +339,14 @@ WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_1> has a
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WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_0> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
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INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_8> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_10> <LAN_D_INIT_11>
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INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_1> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_4> <LAN_D_INIT_9>
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INFO:Xst:2261 - The FF/Latch <LAN_A_INIT_3> in Unit <LAN_IDE_CP> is equivalent to the following FF/Latch, which will be removed : <LAN_RST_SM_FSM_FFd8>
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Optimizing unit <LAN_IDE_CP> ...
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implementation constraint: INIT=s : SHUT_UP_Z2_2
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implementation constraint: INIT=s : SHUT_UP_Z2_0
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implementation constraint: INIT=s : SHUT_UP_Z2_1
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implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_1
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implementation constraint: INIT=r : LAN_INT_ENABLE
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implementation constraint: INIT=s : SHUT_UP_Z2_2
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implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_0
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implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_1
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implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_2
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implementation constraint: INIT=s : D_Z2_OUT_3
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implementation constraint: INIT=s : LAN_A_INIT_3
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implementation constraint: INIT=s : D_Z2_OUT_2
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@@ -354,18 +354,32 @@ Optimizing unit <LAN_IDE_CP> ...
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implementation constraint: INIT=s : D_Z2_OUT_1
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implementation constraint: INIT=s : D_Z2_OUT_0
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implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_2
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implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_2
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implementation constraint: INIT=r : LAN_D_INIT_1
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implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_0
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implementation constraint: INIT=r : LAN_D_INIT_8
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implementation constraint: INIT=s : SHUT_UP_Z2_0
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implementation constraint: INIT=s : SHUT_UP_Z2_1
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implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_1
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implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_0
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implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd1
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implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd2
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implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd3
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implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd4
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implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd5
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implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd6
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implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd7
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implementation constraint: INIT=r : LAN_SM_FSM_FFd1
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implementation constraint: INIT=r : LAN_SM_FSM_FFd2
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implementation constraint: INIT=r : LAN_SM_FSM_FFd3
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implementation constraint: INIT=r : LAN_SM_FSM_FFd4
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implementation constraint: INIT=r : LAN_SM_FSM_FFd5
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implementation constraint: INIT=r : LAN_SM_FSM_FFd6
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implementation constraint: INIT=r : LAN_SM_FSM_FFd7
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implementation constraint: INIT=r : LAN_SM_FSM_FFd8
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implementation constraint: INIT=r : LAN_SM_FSM_FFd9
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implementation constraint: INIT=r : LAN_SM_FSM_FFd10
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implementation constraint: INIT=r : LAN_SM_FSM_FFd11
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implementation constraint: INIT=r : LAN_SM_FSM_FFd12
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implementation constraint: INIT=s : LAN_SM_FSM_FFd13
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=========================================================================
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* Partition Report *
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@@ -385,7 +399,7 @@ Final Results
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RTL Top Level Output File Name : LAN_IDE_CP.ngr
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Top Level Output File Name : LAN_IDE_CP
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Output Format : NGC
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Optimization Goal : Area
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Optimization Goal : Speed
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Keep Hierarchy : Yes
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Target Technology : XC9500XL CPLDs
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Macro Preserve : YES
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@@ -397,20 +411,25 @@ Design Statistics
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# IOs : 117
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Cell Usage :
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# BELS : 966
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# AND2 : 362
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# AND3 : 15
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# BELS : 1090
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# AND2 : 361
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# AND3 : 39
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# AND4 : 15
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# AND5 : 1
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# AND8 : 4
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# GND : 1
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# INV : 280
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# OR2 : 259
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# OR3 : 14
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# OR4 : 2
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# INV : 346
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# OR2 : 222
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# OR3 : 45
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# OR4 : 6
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# OR5 : 1
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# OR8 : 16
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# XOR2 : 33
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# FlipFlops/Latches : 141
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# FlipFlops/Latches : 154
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# FD : 4
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# FDC : 20
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# FDC : 32
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# FDCE : 7
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# FDP : 41
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# FDP : 42
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# FDPE : 69
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# IO Buffers : 115
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# IBUF : 24
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@@ -420,14 +439,14 @@ Cell Usage :
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=========================================================================
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Total REAL time to Xst completion: 19.00 secs
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Total CPU time to Xst completion: 18.56 secs
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Total REAL time to Xst completion: 9.00 secs
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Total CPU time to Xst completion: 9.16 secs
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-->
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Total memory usage is 4534820 kilobytes
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Total memory usage is 4534788 kilobytes
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Number of errors : 0 ( 0 filtered)
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Number of warnings : 46 ( 0 filtered)
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Number of infos : 10 ( 0 filtered)
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Number of infos : 11 ( 0 filtered)
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Reference in New Issue
Block a user