Intermediate2
This commit is contained in:
MHeinrichs
@@ -21,8 +21,103 @@
|
||||
|
||||
<sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="LAN_IDE.xise"/>
|
||||
|
||||
<files xmlns="http://www.xilinx.com/XMLSchema"/>
|
||||
<files xmlns="http://www.xilinx.com/XMLSchema">
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGDBUILD_LOG" xil_pn:name="LAN_IDE_CP.bld"/>
|
||||
<file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="LAN_IDE_CP.cmd_log"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_GYD" xil_pn:name="LAN_IDE_CP.gyd"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_JEDEC" xil_pn:name="LAN_IDE_CP.jed"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="LAN_IDE_CP.lso"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MFD" xil_pn:name="LAN_IDE_CP.mfd"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGA" xil_pn:name="LAN_IDE_CP.nga"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="LAN_IDE_CP.ngc"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGD" xil_pn:name="LAN_IDE_CP.ngd"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="LAN_IDE_CP.ngr"/>
|
||||
<file xil_pn:fileType="FILE_PAD_MISC" xil_pn:name="LAN_IDE_CP.pad"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PNX" xil_pn:name="LAN_IDE_CP.pnx"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="LAN_IDE_CP.prj"/>
|
||||
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.rpt"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="LAN_IDE_CP.stx"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="LAN_IDE_CP.syr"/>
|
||||
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.tim"/>
|
||||
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.tspec"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VM6" xil_pn:name="LAN_IDE_CP.vm6"/>
|
||||
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.xml"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="LAN_IDE_CP.xst"/>
|
||||
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP_build.xml"/>
|
||||
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="LAN_IDE_CP_html"/>
|
||||
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="LAN_IDE_CP_ngdbuild.xrpt"/>
|
||||
<file xil_pn:fileType="FILE_PAD_EXCEL_REPORT" xil_pn:name="LAN_IDE_CP_pad.csv"/>
|
||||
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="LAN_IDE_CP_vhdl.prj"/>
|
||||
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="LAN_IDE_CP_xst.xrpt"/>
|
||||
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="_ngo"/>
|
||||
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
|
||||
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
|
||||
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
|
||||
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xlnx_auto_0_xdb"/>
|
||||
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xst"/>
|
||||
</files>
|
||||
|
||||
<transforms xmlns="http://www.xilinx.com/XMLSchema"/>
|
||||
<transforms xmlns="http://www.xilinx.com/XMLSchema">
|
||||
<transform xil_pn:end_ts="1550787349" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="1235887333676579674" xil_pn:start_ts="1550787337">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="WarningsGenerated"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.lso"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.ngc"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.ngr"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.prj"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.stx"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.syr"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.xst"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP_vhdl.prj"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP_xst.xrpt"/>
|
||||
<outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
|
||||
<outfile xil_pn:name="webtalk_pn.xml"/>
|
||||
<outfile xil_pn:name="xst"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1550755418" xil_pn:in_ck="176569500195729039" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-8537920303570934858" xil_pn:start_ts="1550755418">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1550787357" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1550787349">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.bld"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.ngd"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP_ngdbuild.xrpt"/>
|
||||
<outfile xil_pn:name="_ngo"/>
|
||||
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1550787395" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-1014768965495450326" xil_pn:start_ts="1550787357">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="WarningsGenerated"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.gyd"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.mfd"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.nga"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.pad"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.pnx"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.rpt"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.tim"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.tspec"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.vm6"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.xml"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP_build.xml"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP_html"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP_pad.csv"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1550787397" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1550787395">
|
||||
<status xil_pn:value="SuccessfullyRun"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
<outfile xil_pn:name="LAN_IDE_CP.jed"/>
|
||||
</transform>
|
||||
<transform xil_pn:end_ts="1550755464" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRAN_timRpt" xil_pn:prop_ck="111903974446" xil_pn:start_ts="1550755461">
|
||||
<status xil_pn:value="AbortedRun"/>
|
||||
<status xil_pn:value="WarningsGenerated"/>
|
||||
<status xil_pn:value="ReadyToRun"/>
|
||||
<status xil_pn:value="OutOfDateForInputs"/>
|
||||
<status xil_pn:value="InputChanged"/>
|
||||
</transform>
|
||||
</transforms>
|
||||
|
||||
</generated_project>
|
||||
|
||||
@@ -63,7 +63,7 @@
|
||||
<property xil_pn:name="Equivalent Register Removal XST" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Evaluation Development Board" xil_pn:value="None Specified" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Exhaustive Fit Mode" xil_pn:value="false" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Compact" xil_pn:valueState="non-default" xil_pn:x_locked="true"/>
|
||||
<property xil_pn:name="FSM Encoding Algorithm" xil_pn:value="Gray" xil_pn:valueState="non-default"/>
|
||||
<property xil_pn:name="Filter Files From Compile Order" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Functional Model Target Language ArchWiz" xil_pn:value="VHDL" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Functional Model Target Language Coregen" xil_pn:value="VHDL" xil_pn:valueState="default"/>
|
||||
@@ -97,7 +97,7 @@
|
||||
<property xil_pn:name="Language" xil_pn:value="VHDL" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Last Applied Goal" xil_pn:value="Balanced" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Last Applied Strategy" xil_pn:value="area;C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/area.xds" xil_pn:valueState="non-default"/>
|
||||
<property xil_pn:name="Last Unlock Status" xil_pn:value="false" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Last Unlock Status" xil_pn:value="true" xil_pn:valueState="non-default"/>
|
||||
<property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||
@@ -112,7 +112,7 @@
|
||||
<property xil_pn:name="Netlist Hierarchy" xil_pn:value="As Optimized" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Number of Clock Buffers" xil_pn:value="4" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Optimization Effort" xil_pn:value="Normal" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Optimization Goal" xil_pn:value="Area" xil_pn:valueState="non-default" xil_pn:x_locked="true"/>
|
||||
<property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Other CPLD Fitter Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Other Compiler Options Fit" xil_pn:value="" xil_pn:valueState="default"/>
|
||||
@@ -155,7 +155,7 @@
|
||||
<property xil_pn:name="Run for Specified Time Map" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Run for Specified Time Par" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Run for Specified Time Translate" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default" xil_pn:x_locked="true"/>
|
||||
<property xil_pn:name="Safe Implementation" xil_pn:value="No" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Selected Module Instance Name" xil_pn:value="" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Selected Simulation Root Source Node Behavioral" xil_pn:value="" xil_pn:valueState="default"/>
|
||||
<property xil_pn:name="Selected Simulation Root Source Node Post-Map" xil_pn:value="" xil_pn:valueState="default"/>
|
||||
|
||||
@@ -58,8 +58,8 @@ entity LAN_IDE_CP is
|
||||
DS1 : in STD_LOGIC;
|
||||
FCS : in STD_LOGIC;
|
||||
RESET : in STD_LOGIC;
|
||||
INT_OUT : out STD_LOGIC;
|
||||
INT_CP_OUT : out STD_LOGIC;
|
||||
INT2_OUT : out STD_LOGIC;
|
||||
INT6_OUT : out STD_LOGIC;
|
||||
AUTOBOOT_OFF : in STD_LOGIC;
|
||||
ROM_B : out STD_LOGIC_VECTOR (1 downto 0);
|
||||
ROM_OE : out STD_LOGIC;
|
||||
@@ -107,12 +107,12 @@ architecture Behavioral of LAN_IDE_CP is
|
||||
end_write_upper,
|
||||
start_write_lower,
|
||||
wait_write_lower,
|
||||
end_write_lower
|
||||
end_write_lower,
|
||||
config_rw
|
||||
);
|
||||
|
||||
signal LAN_RST_SM: lan_reset :=nop;
|
||||
signal LAN_SM: lan_bus_sm :=nop;
|
||||
signal AUTOCONFIG_Z3_ACCESS: STD_LOGIC;
|
||||
signal AUTOCONFIG_Z2_ACCESS: STD_LOGIC;
|
||||
signal IDE_ACCESS: STD_LOGIC;
|
||||
signal IDE_ENABLE: STD_LOGIC;
|
||||
@@ -130,7 +130,7 @@ architecture Behavioral of LAN_IDE_CP is
|
||||
signal AUTO_CONFIG_Z2_DONE_CYCLE:STD_LOGIC_VECTOR(2 downto 0):="000";
|
||||
signal SHUT_UP_Z2:STD_LOGIC_VECTOR(2 downto 0):="111";
|
||||
signal LAN_BASEADR:STD_LOGIC_VECTOR(15 downto 0);
|
||||
signal LAN_INT_ENABLE: std_logic;
|
||||
signal LAN_INT_ENABLE: std_logic :='0';
|
||||
signal LAN_RD_S: std_logic;
|
||||
signal LAN_WRH_S: std_logic;
|
||||
signal LAN_WRL_S: std_logic;
|
||||
@@ -246,7 +246,6 @@ begin
|
||||
begin
|
||||
if(--AS ='0' or
|
||||
reset='0')then
|
||||
AUTOCONFIG_Z3_ACCESS <= '0';
|
||||
LAN_ACCESS <= '0';
|
||||
DQ_SWAP <= '1';
|
||||
Z3_ADR <= (others => '1');
|
||||
@@ -289,14 +288,14 @@ begin
|
||||
end if;
|
||||
|
||||
--CP base
|
||||
if(A(23 downto 16) = CP_BASEADR and SHUT_UP_Z2(0)='0' )then
|
||||
if(A(23 downto 16) = CP_BASEADR and SHUT_UP_Z2(1)='0' )then
|
||||
CP_ACCESS <= '1';
|
||||
else
|
||||
CP_ACCESS <= '0';
|
||||
end if;
|
||||
|
||||
--IDE base
|
||||
if(A(23 downto 16) = IDE_BASEADR and SHUT_UP_Z2(1)='0' )then
|
||||
if(A(23 downto 16) = IDE_BASEADR and SHUT_UP_Z2(2)='0' )then
|
||||
IDE_ACCESS <= '1';
|
||||
else
|
||||
IDE_ACCESS <= '0';
|
||||
@@ -305,14 +304,12 @@ begin
|
||||
end if;
|
||||
end process ADDRESS_Z2_DECODE;
|
||||
|
||||
--LAN interrupt enable
|
||||
--LAN interrupt controll
|
||||
lan_int_proc: process (CLK_EXT,reset)
|
||||
begin
|
||||
if(reset ='0') then
|
||||
LAN_INT_ENABLE <='0';
|
||||
LAN_IRQ_D0 <='1';
|
||||
LAN_IRQ_OUT <='1';
|
||||
CONFIG_READY <='0';
|
||||
elsif rising_edge(CLK_EXT) then
|
||||
LAN_IRQ_D0 <= LAN_INT;
|
||||
|
||||
@@ -329,22 +326,6 @@ begin
|
||||
) then
|
||||
LAN_IRQ_OUT <='0';
|
||||
end if;
|
||||
|
||||
--bus acknowledge if a access to A15=1 occurred
|
||||
if(LAN_ACCESS = '1' and FCS ='0' and Z3_ADR(15)='1') then
|
||||
CONFIG_READY <='1';
|
||||
else
|
||||
CONFIG_READY <='0';
|
||||
end if;
|
||||
|
||||
--set int enable and config ready flags
|
||||
if(LAN_ACCESS = '1' and FCS ='0' and RW='0' and Z3_ADR(15)='1') then --enable if a write to A15 occured
|
||||
if(Z3_DS(3) ='0')then
|
||||
LAN_INT_ENABLE <= Z3_DATA_IN(31); --this controlls the output bit
|
||||
elsif(Z3_DS(2) ='0')then
|
||||
LAN_INT_ENABLE <= Z3_DATA_IN(15); --this controlls the output bit
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
end process lan_int_proc;
|
||||
|
||||
@@ -352,7 +333,7 @@ begin
|
||||
lan_rst_gen: process (CLK_EXT)
|
||||
begin
|
||||
if falling_edge(CLK_EXT) then
|
||||
if(FCS ='1' or reset = '0' or Z3_DS = "1111" or LAN_ACCESS = '0' or BERR = '0' or Z3_ADR(15)='1') then
|
||||
if(FCS ='1' or reset = '0' or Z3_DS = "1111" or LAN_ACCESS = '0' or BERR = '0') then
|
||||
LAN_SM_RST <='1';
|
||||
else
|
||||
LAN_SM_RST <='0';
|
||||
@@ -401,8 +382,9 @@ begin
|
||||
end if;
|
||||
end if;
|
||||
|
||||
if(RW='1')then --read from MSB
|
||||
|
||||
if(Z3_ADR(15)='1')then
|
||||
LAN_SM <= config_rw;
|
||||
elsif(RW='1')then --read from MSB
|
||||
if(Z3_DS(3 downto 2) < "11")then --determine bushalf
|
||||
LAN_RD_S <= '1';
|
||||
LAN_SM <= wait_read_upper;
|
||||
@@ -491,7 +473,15 @@ begin
|
||||
when end_write_lower=>
|
||||
LAN_READY <='1';
|
||||
LAN_SM<=end_write_lower; -- stay here until cylce end
|
||||
end case;
|
||||
when config_rw=>
|
||||
LAN_READY <='1';
|
||||
if(Z3_DS(3) ='0' and RW='0')then
|
||||
LAN_INT_ENABLE <= Z3_DATA_IN(31); --this controlls the output bit
|
||||
elsif(Z3_DS(1) ='0' and RW='0')then
|
||||
LAN_INT_ENABLE <= Z3_DATA_IN(15); --this controlls the output bit
|
||||
end if;
|
||||
LAN_SM<=config_rw; -- stay here until cylce end
|
||||
end case;
|
||||
end if;
|
||||
end process lan_rw_gen;
|
||||
|
||||
@@ -536,7 +526,12 @@ begin
|
||||
else
|
||||
D_Z2_OUT <= "1001" ; --ProductID low nibble: 6->1001
|
||||
end if;
|
||||
when "000100" => --er_flags (Z3)
|
||||
D_Z2_OUT <= "1110" ; -- io device no size extension 64kb subsize
|
||||
when "000101" => --er_flags (Z3)
|
||||
D_Z2_OUT <= "1101" ; -- io device no size extension 64kb subsize
|
||||
when "001000" => D_Z2_OUT <= "1111" ; --Ventor ID 0
|
||||
|
||||
when "001001" =>
|
||||
if(AUTO_CONFIG_Z2_DONE(0) = '0' or AUTO_CONFIG_Z2_DONE(1) = '0')then
|
||||
D_Z2_OUT <= "0101" ; --Ventor ID 1
|
||||
@@ -567,18 +562,16 @@ begin
|
||||
--when "010101" => Dout1 <= "1111" ; --Rom vector high byte low nibble
|
||||
--when "010110" => Dout1 <= "1111" ; --Rom vector low byte high nibble
|
||||
when "010111" =>
|
||||
if(AUTO_CONFIG_Z2_DONE = 1)then
|
||||
D_Z2_OUT <= "1110" ; --Rom vector low byte low nibble
|
||||
else
|
||||
D_Z2_OUT <= "1111" ; --Rom vector low byte low nibble
|
||||
end if;
|
||||
D_Z2_OUT <= "1110" ; --Rom vector low byte low nibble
|
||||
when "100010" =>
|
||||
D_Z2_OUT <= "1111" ;
|
||||
if(RW='0')then
|
||||
if(AUTO_CONFIG_Z2_DONE(1) = '0')then
|
||||
LAN_BASEADR(15 downto 8) <= D(15 downto 8); --Base adress
|
||||
end if;
|
||||
end if;
|
||||
when "100100" =>
|
||||
D_Z2_OUT <= "1111" ;
|
||||
if(RW='0')then
|
||||
if(AUTO_CONFIG_Z2_DONE(0) = '0')then
|
||||
LAN_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress
|
||||
@@ -613,7 +606,7 @@ begin
|
||||
|
||||
|
||||
|
||||
LAN_CS <= LAN_ACCESS when reset='1' else LAN_CS_RST;
|
||||
LAN_CS <= LAN_ACCESS when reset='1' and Z3_ADR(15)='0' else LAN_CS_RST;
|
||||
LAN_WRL <= LAN_WRL_S when FCS='0' and reset = '1' else LAN_WR_RST;
|
||||
LAN_WRH <= LAN_WRH_S when FCS='0' and reset = '1' else LAN_WR_RST;
|
||||
LAN_RD <= LAN_RD_S when FCS='0' and reset = '1' else '0';
|
||||
@@ -647,24 +640,14 @@ begin
|
||||
D when RW='0' and AS='0' and CP_ACCESS ='1' else
|
||||
(others => 'Z');
|
||||
|
||||
--
|
||||
-- --defined lancp signal that matches both LAN and CP addresses (and IDE for Rev2 boards)
|
||||
-- DQ <= LAN_D_CLR when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
|
||||
-- LAN_D_SET when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
|
||||
-- D( 7 downto 0) & D( 7 downto 0) when RW='0' and AS='0' and lancp = '1' and LDS='0' and UDS='1' else
|
||||
-- D(15 downto 8) & D(15 downto 8) when RW='0' and AS='0' and lancp = '1' and LDS='1' and UDS='0' else
|
||||
-- D( 7 downto 0) & D(15 downto 8) when RW='0' and AS='0' and lan_adr ='1' and lan_adr_sw ='1' else
|
||||
-- D when RW='0' and AS='0' and lancp ='1'
|
||||
-- else (others => 'Z');
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
|
||||
INT_OUT <= '0' when LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1' else
|
||||
INT2_OUT <= '0' when LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1' else
|
||||
--'0' when CP_IRQ = '0' else
|
||||
'Z';
|
||||
INT_CP_OUT <= '0' when CP_IRQ = '0' else
|
||||
INT6_OUT <= '0' when CP_IRQ = '0' else
|
||||
'Z';
|
||||
OWN <= 'Z';
|
||||
SLAVE <= '0' when FCS='0' and LAN_ACCESS = '1' else
|
||||
@@ -673,7 +656,7 @@ begin
|
||||
|
||||
OVR <= '0' when FCS='0' and LAN_ACCESS = '1' else 'Z'; --is Cache inhibit on Z3!
|
||||
|
||||
DTACK <= '0' when FCS='0' and (LAN_READY = '1' or CONFIG_READY='1') else 'Z';
|
||||
DTACK <= '0' when FCS='0' and LAN_READY = '1' else 'Z';
|
||||
|
||||
MTACK <= 'Z';
|
||||
|
||||
@@ -0,0 +1,495 @@
|
||||
----------------------------------------------------------------------------------
|
||||
-- Company:
|
||||
-- Engineer:
|
||||
--
|
||||
-- Create Date: 22:08:29 12/13/2016
|
||||
-- Design Name:
|
||||
-- Module Name: LAN_IDE_CP - Behavioral
|
||||
-- Project Name:
|
||||
-- Target Devices:
|
||||
-- Tool versions:
|
||||
-- Description:
|
||||
--
|
||||
-- Dependencies:
|
||||
--
|
||||
-- Revision:
|
||||
-- Revision 0.01 - File Created
|
||||
-- Additional Comments:
|
||||
--
|
||||
-- directory cleanup hint:
|
||||
-- svn status|grep ^M|sed "s/^M [\t ]*//"|xargs rm
|
||||
----------------------------------------------------------------------------------
|
||||
library IEEE;
|
||||
use IEEE.STD_LOGIC_1164.ALL;
|
||||
use IEEE.STD_LOGIC_ARITH.ALL;
|
||||
use IEEE.STD_LOGIC_UNSIGNED.ALL;
|
||||
|
||||
-- Uncomment the following library declaration if using
|
||||
-- arithmetic functions with Signed or Unsigned values
|
||||
--use IEEE.NUMERIC_STD.ALL;
|
||||
|
||||
-- Uncomment the following library declaration if instantiating
|
||||
-- any Xilinx primitives in this code.
|
||||
--library UNISIM;
|
||||
--use UNISIM.VComponents.all;
|
||||
|
||||
entity LAN_IDE_CP is
|
||||
Port ( A : inout STD_LOGIC_VECTOR (23 downto 1);
|
||||
D : inout STD_LOGIC_VECTOR (15 downto 0);
|
||||
DQ : inout STD_LOGIC_VECTOR (15 downto 0);
|
||||
A_LAN : out STD_LOGIC_VECTOR (13 downto 0);
|
||||
OWN : out STD_LOGIC;
|
||||
SLAVE : out STD_LOGIC;
|
||||
CFOUT : out STD_LOGIC;
|
||||
CFIN : in STD_LOGIC;
|
||||
C1 : in STD_LOGIC;
|
||||
C3 : in STD_LOGIC;
|
||||
MTCR : in STD_LOGIC;
|
||||
OVR : out STD_LOGIC;
|
||||
BERR : in STD_LOGIC;
|
||||
MTACK : out STD_LOGIC;
|
||||
DS0 : in STD_LOGIC;
|
||||
DTACK : out STD_LOGIC;
|
||||
UDS : in STD_LOGIC;
|
||||
LDS : in STD_LOGIC;
|
||||
AS : in STD_LOGIC;
|
||||
RW : in STD_LOGIC;
|
||||
Z3 : in STD_LOGIC;
|
||||
DS1 : in STD_LOGIC;
|
||||
FCS : in STD_LOGIC;
|
||||
RESET : in STD_LOGIC;
|
||||
INT2_OUT : out STD_LOGIC;
|
||||
INT6_OUT : out STD_LOGIC;
|
||||
AUTOBOOT_OFF : in STD_LOGIC;
|
||||
ROM_B : out STD_LOGIC_VECTOR (1 downto 0);
|
||||
ROM_OE : out STD_LOGIC;
|
||||
IDE_WAIT : in STD_LOGIC;
|
||||
CLK_EXT : in STD_LOGIC;
|
||||
IDE_W : out STD_LOGIC;
|
||||
IDE_R : out STD_LOGIC;
|
||||
IDE_A : out STD_LOGIC_VECTOR (2 downto 0);
|
||||
IDE_CS : out STD_LOGIC_VECTOR (1 downto 0);
|
||||
LAN_CFG : out STD_LOGIC_VECTOR (4 downto 1);
|
||||
LAN_RD : out STD_LOGIC;
|
||||
LAN_CS : out STD_LOGIC;
|
||||
LAN_WRH : out STD_LOGIC;
|
||||
LAN_WRL : out STD_LOGIC;
|
||||
LAN_INT : in STD_LOGIC;
|
||||
CP_RD : out STD_LOGIC;
|
||||
CP_WE : out STD_LOGIC;
|
||||
CP_CS : out STD_LOGIC;
|
||||
CP_IRQ : in STD_LOGIC);
|
||||
end LAN_IDE_CP;
|
||||
|
||||
architecture Behavioral of LAN_IDE_CP is
|
||||
|
||||
TYPE lan_reset IS (
|
||||
nop,
|
||||
wait0,
|
||||
clr,
|
||||
clr_commit,
|
||||
wait1,
|
||||
set,
|
||||
set_commit,
|
||||
done
|
||||
);
|
||||
|
||||
SIGNAL LAN_RST_SM: lan_reset :=nop;
|
||||
SIGNAL lancp: STD_LOGIC; -- LAN or ClockPort
|
||||
SIGNAL ide: STD_LOGIC;
|
||||
SIGNAL autoconfig: STD_LOGIC;
|
||||
SIGNAL lan_adr: STD_LOGIC;
|
||||
SIGNAL lan_adr_sw: STD_LOGIC;
|
||||
SIGNAL cp: STD_LOGIC;
|
||||
signal Dout1:STD_LOGIC_VECTOR(3 downto 0);
|
||||
signal AUTO_CONFIG_DONE:STD_LOGIC_VECTOR(1 downto 0);
|
||||
signal AUTO_CONFIG_DONE_CYCLE:STD_LOGIC_VECTOR(1 downto 0);
|
||||
signal SHUT_UP:STD_LOGIC_VECTOR(2 downto 0);
|
||||
signal IDE_BASEADR:STD_LOGIC_VECTOR(7 downto 0);
|
||||
signal LAN_BASEADR:STD_LOGIC_VECTOR(7 downto 0);
|
||||
signal CP_BASEADR:STD_LOGIC_VECTOR(7 downto 0);
|
||||
signal IDE_ENABLE:STD_LOGIC;
|
||||
signal ROM_OE_S:STD_LOGIC;
|
||||
signal IDE_R_S:STD_LOGIC;
|
||||
signal IDE_W_S:STD_LOGIC;
|
||||
signal DTACK_S:STD_LOGIC;
|
||||
signal AMIGA_CLK: std_logic;
|
||||
signal LAN_INT_ENABLE: std_logic;
|
||||
signal DECODE_RESET: std_logic;
|
||||
signal LAN_INT_D0: std_logic;
|
||||
signal DS: std_logic;
|
||||
signal DS_D: std_logic;
|
||||
signal LAN_RD_S: std_logic;
|
||||
signal LAN_WRH_S: std_logic;
|
||||
signal LAN_WRL_S: std_logic;
|
||||
signal LAN_IRQ_D0: std_logic;
|
||||
signal LAN_IRQ_OUT: std_logic;
|
||||
signal CP_RD_S: std_logic;
|
||||
signal CP_WE_S: std_logic;
|
||||
signal CP_WE_QUIRK: std_logic;
|
||||
|
||||
signal LAN_CS_RST: std_logic;
|
||||
signal LAN_WR_RST: std_logic;
|
||||
constant LAN_A_CLRREG:STD_LOGIC_VECTOR(13 downto 0) :="11"&x"FF7";
|
||||
constant LAN_A_SETREG:STD_LOGIC_VECTOR(13 downto 0) :="11"&x"FB7";
|
||||
constant LAN_D_SET:STD_LOGIC_VECTOR(15 downto 0) := "0000000100010000";
|
||||
constant LAN_D_CLR:STD_LOGIC_VECTOR(15 downto 0) := "0000111000000000";
|
||||
|
||||
Function to_std_logic(X: in Boolean) return Std_Logic is
|
||||
variable ret : std_logic;
|
||||
begin
|
||||
if x then ret := '1'; else ret := '0'; end if;
|
||||
return ret;
|
||||
end to_std_logic;
|
||||
|
||||
begin
|
||||
|
||||
AMIGA_CLK <= not (C1 xor C3);
|
||||
DECODE_RESET <= BERR and reset;
|
||||
|
||||
DS <= UDS and LDS;
|
||||
|
||||
clock_init: process(CLK_EXT)
|
||||
begin
|
||||
if(rising_edge(CLK_EXT))then
|
||||
if(reset = '0')then
|
||||
--init the clock!
|
||||
case LAN_RST_SM is
|
||||
when nop=>
|
||||
LAN_CS_RST<='0';
|
||||
LAN_WR_RST<='0';
|
||||
LAN_RST_SM<=wait0;
|
||||
when wait0=>
|
||||
LAN_CS_RST<='1';
|
||||
LAN_WR_RST<='0';
|
||||
LAN_RST_SM<=clr;
|
||||
when clr=>
|
||||
LAN_CS_RST<='1';
|
||||
LAN_WR_RST<='1';
|
||||
LAN_RST_SM<=clr_commit;
|
||||
when clr_commit=>
|
||||
LAN_CS_RST<='1';
|
||||
LAN_WR_RST<='0';
|
||||
LAN_RST_SM<=wait1;
|
||||
when wait1=>
|
||||
LAN_CS_RST<='1';
|
||||
LAN_WR_RST<='0';
|
||||
LAN_RST_SM<=set;
|
||||
when set=>
|
||||
LAN_CS_RST<='1';
|
||||
LAN_WR_RST<='1';
|
||||
LAN_RST_SM<=set_commit;
|
||||
when set_commit=>
|
||||
LAN_CS_RST<='1';
|
||||
LAN_WR_RST<='0';
|
||||
LAN_RST_SM<=done;
|
||||
when done=>
|
||||
LAN_CS_RST<='0';
|
||||
LAN_WR_RST<='0';
|
||||
LAN_RST_SM<=done;
|
||||
end case;
|
||||
else
|
||||
LAN_CS_RST<='0';
|
||||
LAN_WR_RST<='0';
|
||||
LAN_RST_SM<=nop;
|
||||
end if;
|
||||
end if;
|
||||
end process clock_init;
|
||||
|
||||
ADDRESS_DECODE: process(DECODE_RESET,AS)
|
||||
begin
|
||||
if(DECODE_RESET ='0')then
|
||||
autoconfig <= '0';
|
||||
ide <= '0';
|
||||
lan_adr <= '0';
|
||||
lan_adr_sw <= '0';
|
||||
cp <= '0';
|
||||
lancp <= '0';
|
||||
elsif(falling_edge(AS))then
|
||||
--default values
|
||||
autoconfig <= '0';
|
||||
ide <= '0';
|
||||
lan_adr <= '0';
|
||||
lan_adr_sw <= '0';
|
||||
cp <= '0';
|
||||
lancp <= '0';
|
||||
if(A(23 downto 16) = x"E8" and AUTO_CONFIG_DONE < "11" and CFIN='0')then
|
||||
autoconfig <= '1';
|
||||
elsif(A(23 downto 16) = LAN_BASEADR and SHUT_UP(0)='0' )then
|
||||
if(A(14 downto 13)<"11")then
|
||||
lan_adr_sw <= '1';
|
||||
end if;
|
||||
lan_adr <= '1';
|
||||
lancp <= '1';
|
||||
elsif(A(23 downto 16) = CP_BASEADR and SHUT_UP(1)='0')then
|
||||
cp <= '1';
|
||||
lancp <= '1';
|
||||
elsif(A(23 downto 16) = IDE_BASEADR and SHUT_UP(2)='0')then
|
||||
ide <= '1';
|
||||
end if;
|
||||
end if;
|
||||
end process ADDRESS_DECODE;
|
||||
|
||||
--LAN interrupt enable
|
||||
lan_int_proc: process (AMIGA_CLK,reset)
|
||||
begin
|
||||
if(reset ='0') then
|
||||
LAN_INT_ENABLE <='0';
|
||||
LAN_IRQ_D0 <='1';
|
||||
LAN_IRQ_OUT <='1';
|
||||
elsif falling_edge(AMIGA_CLK) then
|
||||
LAN_IRQ_D0 <= LAN_INT;
|
||||
if(LAN_INT ='0' and LAN_IRQ_D0 ='1') then
|
||||
LAN_IRQ_OUT <='0';
|
||||
elsif(LAN_INT ='1' or LAN_INT_ENABLE = '0')then
|
||||
LAN_IRQ_OUT <='1';
|
||||
elsif(lan_adr = '1' and DS ='0' and RW='0' and A(15)='1') then
|
||||
LAN_IRQ_OUT <= D(14); --controll lan irq
|
||||
end if;
|
||||
|
||||
if(lan_adr = '1' and DS ='0' and RW='0' and A(15)='1') then --enable if a write to A15 occured
|
||||
LAN_INT_ENABLE <= D(15);
|
||||
end if;
|
||||
end if;
|
||||
end process lan_int_proc;
|
||||
|
||||
--lan signal generation: all Signals are HIGH active!
|
||||
lan_rw_gen: process (AMIGA_CLK)
|
||||
begin
|
||||
if falling_edge(AMIGA_CLK) then
|
||||
--default values
|
||||
LAN_RD_S <= '0';
|
||||
LAN_WRH_S <= '0';
|
||||
LAN_WRL_S <= '0';
|
||||
|
||||
if(lan_adr='1' and DS='0' and A(15)='0')then
|
||||
LAN_RD_S <= RW;
|
||||
-- swapped LDS/UDS here: ENC624 is little endian
|
||||
LAN_WRH_S <= not LDS and not RW;
|
||||
LAN_WRL_S <= not UDS and not RW;
|
||||
end if;
|
||||
end if;
|
||||
end process lan_rw_gen;
|
||||
|
||||
--cp signal generation
|
||||
cp_rw_gen: process (AMIGA_CLK)
|
||||
begin
|
||||
if falling_edge(AMIGA_CLK) then
|
||||
--default values
|
||||
CP_RD_S <= '1';
|
||||
CP_WE_S <= '1';
|
||||
if(cp = '1' and DS='0')then --datastrobe instead of AS!
|
||||
CP_RD_S <= not RW;
|
||||
CP_WE_S <= RW;
|
||||
end if;
|
||||
CP_WE_QUIRK <= CP_WE_S;
|
||||
end if;
|
||||
end process cp_rw_gen;
|
||||
|
||||
--ide signal generation
|
||||
ide_rw_gen: process (reset,AMIGA_CLK)
|
||||
begin
|
||||
if (reset = '0') then
|
||||
IDE_ENABLE <= '1';
|
||||
IDE_R_S <= '1';
|
||||
IDE_W_S <= '1';
|
||||
ROM_OE_S <= '1';
|
||||
elsif falling_edge(AMIGA_CLK) then
|
||||
--default values
|
||||
IDE_R_S <= '1';
|
||||
IDE_W_S <= '1';
|
||||
ROM_OE_S <= '1';
|
||||
if(ide='1' and AS='0')then
|
||||
if(RW='0')then
|
||||
--the write goes to the hdd!
|
||||
IDE_ENABLE <= '0'; -- enable IDE on first read
|
||||
IDE_W_S <= '0';
|
||||
else
|
||||
IDE_R_S <= IDE_ENABLE; --read from IDE instead from ROM
|
||||
ROM_OE_S <= not IDE_ENABLE;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
end process ide_rw_gen;
|
||||
|
||||
|
||||
--autoconfig
|
||||
autoconfig_proc: process (reset, AMIGA_CLK)
|
||||
begin
|
||||
if reset = '0' then
|
||||
-- reset active ...
|
||||
AUTO_CONFIG_DONE_CYCLE <="00";
|
||||
Dout1<="1111";
|
||||
--Dout2<="1111";
|
||||
SHUT_UP <="111";
|
||||
IDE_BASEADR<=x"FF";
|
||||
LAN_BASEADR<=x"FF";
|
||||
CP_BASEADR<=x"FF";
|
||||
AUTO_CONFIG_DONE <="00";
|
||||
elsif falling_edge(AMIGA_CLK) then -- no reset, so wait for rising edge of the clock
|
||||
DS_D <= DS;
|
||||
if(AS='1')then
|
||||
AUTO_CONFIG_DONE <= AUTO_CONFIG_DONE_CYCLE;
|
||||
elsif(autoconfig= '1' and DS='0') then
|
||||
case A(6 downto 1) is
|
||||
when "000000" =>
|
||||
if(AUTO_CONFIG_DONE < 2)then
|
||||
Dout1 <= "1100" ; --ZII, No-System-Memory, no ROM
|
||||
else
|
||||
Dout1 <= "1101" ; --ZII, no System-Memory, (perhaps)ROM
|
||||
end if;
|
||||
when "000001" => Dout1 <= "0001" ; --one Card, 64KB =001
|
||||
when "000010" =>
|
||||
if(AUTO_CONFIG_DONE < 2)then
|
||||
Dout1 <= "1000" ; --ProductID high nibble : 7->1000
|
||||
else
|
||||
Dout1 <= "1111" ; --ProductID high nibble : 0->1111
|
||||
end if;
|
||||
when "000011" =>
|
||||
if(AUTO_CONFIG_DONE = 0)then
|
||||
Dout1 <= "0100" ; --ProductID low nibble: B->0100
|
||||
elsif(AUTO_CONFIG_DONE = 1)then
|
||||
Dout1 <= "0011" ; --ProductID low nibble: C->0011
|
||||
else
|
||||
Dout1 <= "1001" ; --ProductID low nibble: 6->1001
|
||||
end if;
|
||||
when "001000" => Dout1 <= "1111" ; --Ventor ID 0
|
||||
when "001001" =>
|
||||
if(AUTO_CONFIG_DONE < 2)then
|
||||
Dout1 <= "0101" ; --Ventor ID 1
|
||||
else
|
||||
Dout1 <= "0111" ; --Ventor ID 1
|
||||
end if;
|
||||
when "001010" =>
|
||||
if(AUTO_CONFIG_DONE < 2)then
|
||||
Dout1 <= "1110" ; --Ventor ID 2
|
||||
else
|
||||
Dout1 <= "1101" ; --Ventor ID 2
|
||||
end if;
|
||||
when "001011" =>
|
||||
if(AUTO_CONFIG_DONE < 2)then
|
||||
Dout1 <= "0011" ; --Ventor ID 3 : $0A1C: A1K.org
|
||||
else
|
||||
Dout1 <= "0011" ; --Ventor ID 3 : $082C: BSC
|
||||
end if;
|
||||
when "001100" => Dout1 <= "0100" ; --Serial byte 0 (msb) high nibble
|
||||
when "001101" => Dout1 <= "1110" ; --Serial byte 0 (msb) low nibble
|
||||
when "001110" => Dout1 <= "1001" ; --Serial byte 1 high nibble
|
||||
when "001111" => Dout1 <= "0100" ; --Serial byte 1 low nibble
|
||||
when "010000" => Dout1 <= "1111" ; --Serial byte 2 high nibble
|
||||
when "010001" => Dout1 <= "1111" ; --Serial byte 2 low nibble
|
||||
when "010010" => Dout1 <= "0100" ; --Serial byte 3 (lsb) high nibble
|
||||
when "010011" => Dout1 <= "1010" ; --Serial byte 3 (lsb) low nibble: B16B00B5
|
||||
--when "010100" => Dout1 <= "1111" ; --Rom vector high byte high nibble
|
||||
--when "010101" => Dout1 <= "1111" ; --Rom vector high byte low nibble
|
||||
--when "010110" => Dout1 <= "1111" ; --Rom vector low byte high nibble
|
||||
when "010111" =>
|
||||
if(AUTO_CONFIG_DONE = 2)then
|
||||
Dout1 <= "1110" ; --Rom vector low byte low nibble
|
||||
else
|
||||
Dout1 <= "1111" ; --Rom vector low byte low nibble
|
||||
end if;
|
||||
when "100000" => Dout1 <= "0000" ; --Interrupt config: all zero
|
||||
when "100001" => Dout1 <= "0000" ; --Interrupt config: all zero
|
||||
when "100100" =>
|
||||
Dout1 <= "1111" ;
|
||||
if(RW='0' and DS_D='1')then
|
||||
if(AUTO_CONFIG_DONE = 0)then
|
||||
LAN_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress
|
||||
SHUT_UP(0) <='0'; --enable board
|
||||
AUTO_CONFIG_DONE_CYCLE <= "01"; --done here
|
||||
elsif(AUTO_CONFIG_DONE = 1)then
|
||||
CP_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress
|
||||
SHUT_UP(1) <= '0'; --enable board
|
||||
AUTO_CONFIG_DONE_CYCLE <= '1' & AUTOBOOT_OFF; --done here, if Autoboot = 1 skip ide part!
|
||||
elsif(AUTO_CONFIG_DONE = 2)then
|
||||
IDE_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress
|
||||
SHUT_UP(2) <= '0'; --enable board
|
||||
AUTO_CONFIG_DONE_CYCLE <= "11"; --done here
|
||||
end if;
|
||||
end if;
|
||||
when "100110" =>
|
||||
Dout1 <= "1111" ;
|
||||
if(RW='0' and DS_D='1')then
|
||||
AUTO_CONFIG_DONE_CYCLE <= AUTO_CONFIG_DONE_CYCLE+1; --done here
|
||||
end if;
|
||||
when others => Dout1 <= "1111" ;
|
||||
end case;
|
||||
end if;
|
||||
end if;
|
||||
end process autoconfig_proc; --- that's all
|
||||
|
||||
LAN_CS <= lan_adr when reset='1' else LAN_CS_RST;
|
||||
LAN_WRL <= LAN_WRL_S when AS='0' and reset = '1' else LAN_WR_RST;
|
||||
LAN_WRH <= LAN_WRH_S when AS='0' and reset = '1' else LAN_WR_RST;
|
||||
LAN_RD <= LAN_RD_S when AS='0' and reset = '1' else '0';
|
||||
LAN_CFG <= "ZZZZ";
|
||||
|
||||
CP_WE <= CP_WE_S when AS='0' and CP_WE_QUIRK ='1' else '1';
|
||||
CP_RD <= CP_RD_S when AS='0' else '1';
|
||||
CP_CS <= not cp;
|
||||
|
||||
--the lanport is shifted by one adress line but I forgot to adopt the clockport address!
|
||||
A_LAN(13 downto 6)<= LAN_A_CLRREG(13 downto 6) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
|
||||
LAN_A_SETREG(13 downto 6) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
|
||||
--(A(14)&A(12)&A(13)&A(11 downto 7)); --swap A12/13 for the enj-Chip
|
||||
A(14 downto 7);
|
||||
A_LAN(5 downto 2) <= LAN_A_CLRREG(5 downto 2) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
|
||||
LAN_A_SETREG(5 downto 2) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
|
||||
A(5 downto 2) when cp='1' else A(6 downto 3); --mux the clock-port adresses!
|
||||
A_LAN(1 downto 0)<= LAN_A_CLRREG(1 downto 0) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
|
||||
LAN_A_SETREG(1 downto 0) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
|
||||
A(2 downto 1);
|
||||
|
||||
|
||||
|
||||
--signal assignment
|
||||
D <= --RAM_D when RW='1' and TRANSFER_IN_PROGRES ='1' else
|
||||
DQ when RW='1' and lan_adr ='1' and lan_adr_sw ='0' and AS='0' else
|
||||
DQ(7 downto 0)&DQ(15 downto 8) when RW='1' and lan_adr ='1' and lan_adr_sw ='1' and AS='0' else
|
||||
DQ(7 downto 0)&DQ(7 downto 0) when RW='1' and cp = '1' and AS='0' else
|
||||
Dout1 & x"FFF" when RW='1' and autoconfig ='1' and AS='0' else
|
||||
(others => 'Z');
|
||||
|
||||
--defined lancp signal that matches both LAN and CP addresses
|
||||
DQ <= LAN_D_CLR when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
|
||||
LAN_D_SET when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
|
||||
D( 7 downto 0) & D( 7 downto 0) when RW='0' and AS='0' and lancp = '1' and LDS='0' and UDS='1' else
|
||||
D(15 downto 8) & D(15 downto 8) when RW='0' and AS='0' and lancp = '1' and LDS='1' and UDS='0' else
|
||||
D( 7 downto 0) & D(15 downto 8) when RW='0' and AS='0' and lan_adr ='1' and lan_adr_sw ='1' else
|
||||
D when RW='0' and AS='0' and lancp ='1'
|
||||
else (others => 'Z');
|
||||
|
||||
IDE_W <= IDE_W_S when AS='0' else '1';
|
||||
IDE_R <= IDE_R_S when AS='0' else '1';
|
||||
IDE_CS(0)<= not(A(12));
|
||||
IDE_CS(1)<= not(A(13));
|
||||
IDE_A(2 downto 0) <= A(11 downto 9);
|
||||
ROM_B <= "00";
|
||||
ROM_OE <= ROM_OE_S when AS='0' and AUTOBOOT_OFF = '0' else '1';
|
||||
|
||||
-- INT_OUT <= 'Z';
|
||||
INT_OUT <= '0' when
|
||||
(LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1')
|
||||
or CP_IRQ = '0'
|
||||
else 'Z';
|
||||
|
||||
OWN <= 'Z';--'0' when AS='0' and (autoconfig = '1' or ide = '1' or lan_adr = '1' or cp = '1') else 'Z';
|
||||
SLAVE <= '0' when AS='0' and (autoconfig = '1' or ide = '1' or lan_adr = '1' or cp = '1') else '1';
|
||||
CFOUT <= '0' when AUTO_CONFIG_DONE=3 else '1';
|
||||
|
||||
-- OVR <= 'Z';
|
||||
OVR <= '0' when ide='1' and AS='0' else 'Z';
|
||||
|
||||
-- DTACK <= DTACK_S when --TRANSFER_IN_PROGRES ='1' or
|
||||
-- AUTOCONFIG_IN_PROGRES ='1'
|
||||
-- else 'Z';
|
||||
|
||||
DTACK <= '0' when ide='1' and AS='0' and IDE_WAIT='1' else 'Z';
|
||||
-- DTACK <= 'Z';
|
||||
A <= (others => 'Z');
|
||||
MTACK <= 'Z';
|
||||
|
||||
|
||||
end Behavioral;
|
||||
|
||||
@@ -29,7 +29,7 @@ NGDBUILD Design Results Summary:
|
||||
Number of errors: 0
|
||||
Number of warnings: 0
|
||||
|
||||
Total memory usage is 4418712 kilobytes
|
||||
Total memory usage is 4418684 kilobytes
|
||||
|
||||
Writing NGD file "LAN_IDE_CP.ngd" ...
|
||||
Total REAL time to NGDBUILD completion: 5 sec
|
||||
|
||||
@@ -29,3 +29,123 @@ cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||
XSLTProcess LAN_IDE_CP_build.xml
|
||||
|
||||
@@ -121,84 +121,84 @@ DQ<4> S:PIN124
|
||||
;The remaining section of the .gyd file is for documentation purposes only.
|
||||
;It shows where your internal equations were placed in the last successful fit.
|
||||
|
||||
PARTITION FB1_1 SHUT_UP_Z2<0> AUTO_CONFIG_Z2_DONE_CYCLE<2> LAN_BASEADR<9> LAN_BASEADR<8>
|
||||
D_5_IOBUFE D_4_IOBUFE LAN_BASEADR<7> IDE_CS_0_OBUF
|
||||
LAN_BASEADR<6> IDE_CS_1_OBUF LAN_BASEADR<5> IDE_A_0_OBUF$BUF0
|
||||
LAN_BASEADR<4> IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0 LAN_BASEADR<3>
|
||||
IDE_R_OBUF LAN_BASEADR<2>
|
||||
PARTITION FB1_1 LAN_BASEADR<5> LAN_BASEADR<9> D_10_IOBUFE/D_10_IOBUFE_TRST LAN_BASEADR<7>
|
||||
D_5_IOBUFE D_4_IOBUFE EXP24_ IDE_CS_0_OBUF
|
||||
LAN_BASEADR<2> IDE_CS_1_OBUF LAN_BASEADR<1> IDE_A_0_OBUF$BUF0
|
||||
LAN_BASEADR<15> IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0 LAN_BASEADR<13>
|
||||
IDE_R_OBUF LAN_BASEADR<10>
|
||||
PARTITION FB2_1 DQ<8>_BUFR.MC A_LAN_4_OBUF A_LAN_7_OBUF IDE_BASEADR<3>
|
||||
A_LAN_6_OBUF ROM_B_0_OBUF$BUF7 IDE_BASEADR<2> ROM_B_0_OBUF$BUF5
|
||||
IDE_BASEADR<1> D_6_IOBUFE EXP24_ D_3_IOBUFE
|
||||
IDE_BASEADR<0> D_7_IOBUFE D_1_IOBUFE DQ_5_IOBUFE/DQ_5_IOBUFE_TRST
|
||||
D_8_IOBUFE EXP25_
|
||||
PARTITION FB3_2 IDE_W_OBUF
|
||||
PARTITION FB3_8 EXP26_ EXP27_ EXP28_ Mcompar_LAN_ACCESS_cmp_eq0000_AEB_or0000/Mcompar_LAN_ACCESS_cmp_eq0000_AEB_or0000_D2
|
||||
EXP29_ EXP30_ ROM_B_0_OBUF$BUF9 ROM_B_0_OBUF$BUF0
|
||||
|
||||
PARTITION FB3_18 SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF
|
||||
IDE_BASEADR<1> D_6_IOBUFE EXP25_ D_3_IOBUFE
|
||||
IDE_BASEADR<0> D_7_IOBUFE D_1_IOBUFE DQ_4_IOBUFE/DQ_4_IOBUFE_TRST
|
||||
D_8_IOBUFE EXP26_
|
||||
PARTITION FB3_1 LAN_IRQ_OUT IDE_W_OBUF
|
||||
PARTITION FB3_4 LAN_A_INIT<3> SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000/Mcompar_LAN_ACCESS_cmp_eq0000_or0007_xor0000_D LAN_RST_SM_FSM_FFd7
|
||||
LAN_IRQ_D0 CP_WE_QUIRK $OpTx$FX_DC$84 $OpTx$FX_DC$83
|
||||
Z3_ADR<9> Z3_ADR<8> ROM_B_0_OBUF$BUF9 ROM_B_0_OBUF$BUF0
|
||||
$OpTx$INV$62 $OpTx$INV$61 EXP27_
|
||||
PARTITION FB4_1 SHUT_UP_Z2<2> D_0_IOBUFE IDE_BASEADR<7> IDE_BASEADR<6>
|
||||
A_LAN_1_OBUF A_LAN_0_OBUF IDE_BASEADR<5> A_LAN_3_OBUF
|
||||
IDE_BASEADR<4> CP_BASEADR<7> CP_BASEADR<6> A_LAN_2_OBUF
|
||||
CP_BASEADR<5> A_LAN_5_OBUF CP_BASEADR<4> CP_BASEADR<2>
|
||||
CP_BASEADR<1> CP_BASEADR<0>
|
||||
PARTITION FB5_1 EXP31_ CP_CS_OBUF EXP32_ EXP33_
|
||||
ROM_OE_OBUF EXP34_ IDE_ACCESS EXP35_
|
||||
Z3_ADR<10> D_2_IOBUFE D_8_IOBUFE/D_8_IOBUFE_TRST D_9_IOBUFE
|
||||
EXP36_ D_10_IOBUFE D_11_IOBUFE EXP37_
|
||||
D_12_IOBUFE EXP38_
|
||||
PARTITION FB6_1 LAN_IRQ_D0 ROM_B_0_OBUF$BUF6 A_LAN_12_OBUF CP_WE_QUIRK
|
||||
A_LAN_13_OBUF A_LAN_10_OBUF Z3_ADR<5> A_LAN_11_OBUF
|
||||
Z3_ADR<4> A_LAN_8_OBUF Z3_ADR<13> Z3_ADR<12>
|
||||
Z3_ADR<11> A_LAN_9_OBUF LAN_IRQ_OUT LAN_A_INIT<6>
|
||||
LAN_ACCESS DQ_SWAP
|
||||
PARTITION FB7_1 AUTO_CONFIG_Z2_DONE_CYCLE<1> EXP39_ D_13_IOBUFE
|
||||
PARTITION FB7_5 D_14_IOBUFE EXP40_ EXP41_ EXP42_
|
||||
D_Z2_OUT<1> EXP43_ EXP44_ D_15_IOBUFE
|
||||
EXP45_ D_Z2_OUT<2> EXP46_ EXP47_
|
||||
D_Z2_OUT<0> EXP48_
|
||||
PARTITION FB8_1 EXP49_ DQ_12_IOBUFE DQ_14_IOBUFE EXP50_
|
||||
LAN_WRH_OBUF LAN_BASEADR<1> LAN_BASEADR<15> LAN_CS_OBUF
|
||||
LAN_BASEADR<14> LAN_RD_OBUF LAN_BASEADR<13> LAN_BASEADR<12>
|
||||
LAN_BASEADR<11> LAN_BASEADR<10> LAN_BASEADR<0> CP_BASEADR<3>
|
||||
EXP51_ SHUT_UP_Z2<1>
|
||||
PARTITION FB9_1 D_Z2_OUT<3> EXP52_ AUTOCONFIG_Z2_ACCESS AUTO_CONFIG_Z2_DONE<0>
|
||||
AUTO_CONFIG_Z2_DONE<1> AUTO_CONFIG_Z2_DONE<2> AUTO_CONFIG_Z2_DONE_CYCLE<0> CP_RD_S
|
||||
CP_WE_S IDE_ENABLE Z3_DATA<0> IDE_R_S
|
||||
IDE_W_S Z3_DATA<1> ROM_OE_S Z3_ADR<2>
|
||||
Z3_DATA<2> Z3_ADR<3>
|
||||
PARTITION FB10_1 DQ<4>_BUFR.MC DQ_1_IOBUFE DQ_0_IOBUFE EXP53_
|
||||
DQ_3_IOBUFE DQ_2_IOBUFE EXP54_ DQ_5_IOBUFE
|
||||
EXP55_ _19_ DQ_7_IOBUFE DQ_6_IOBUFE
|
||||
EXP56_ _18_ EXP57_ EXP58_
|
||||
DQ_10_IOBUFE EXP59_
|
||||
PARTITION FB11_1 Z3_DATA<30> Z3_DATA<29> Z3_DATA<3> Z3_DATA<28>
|
||||
Z3_DATA<4> Z3_DATA<27> Z3_DATA<22> Z3_DATA<21>
|
||||
Z3_DATA<20> Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF8
|
||||
Z3_DATA<19> ROM_B_0_OBUF EXP60_ DQ_DATA<8>
|
||||
CP_WE_OBUF DQ_DATA<0>
|
||||
PARTITION FB12_1 DQ_DATA<11> ROM_B_0_OBUF$BUF4 LAN_SM_RST EXP61_
|
||||
DQ_15_IOBUFE LAN_RD_S EXP62_ DQ_13_IOBUFE
|
||||
EXP63_ DQ_11_IOBUFE EXP64_ DQ_9_IOBUFE
|
||||
LAN_INT_ENABLE LAN_SM_FSM_FFd3 LAN_SM_FSM_FFd2 EXP65_
|
||||
EXP66_ DQ_DATA<3>
|
||||
PARTITION FB13_1 EXP67_ CP_RD_OBUF EXP68_ EXP69_
|
||||
DQ_DATA<7> DQ_DATA<6> EXP70_ Z3_DATA<7>
|
||||
Z3_DATA<31> EXP71_ DQ_DATA<15> DQ_DATA<5>
|
||||
EXP72_ LAN_WRL_OBUF Z3_DATA<23> EXP73_
|
||||
DQ_DATA<13> DQ_DATA<14>
|
||||
PARTITION FB14_1 LAN_A_INIT<3> Z3_ADR_1 ROM_B_0_OBUF$BUF2 Z3_ADR_0
|
||||
Z3_ADR<9> Z3_ADR<8> Z3_ADR<7> Z3_ADR<6>
|
||||
LAN_WR_RST LAN_RST_SM_FSM_FFd3 CFOUT_OBUF LAN_RST_SM_FSM_FFd2
|
||||
LAN_RST_SM_FSM_FFd1 SLAVE_OBUF ROM_B_0_OBUF$BUF1 LAN_D_INIT<8>
|
||||
LAN_D_INIT<1> LAN_CS_RST
|
||||
PARTITION FB15_1 EXP74_ EXP75_ LAN_WRL_S LAN_READY
|
||||
EXP76_ LAN_SM_FSM_FFd4 LAN_SM_FSM_FFd1 EXP77_
|
||||
DQ_DATA<4> DQ_DATA<9> EXP78_ ROM_B_0_OBUF$BUF10
|
||||
LAN_WRH_S Z3_DATA<15> Z3_DATA<14> Z3_A_LOW
|
||||
Z3_DATA<13> DQ_DATA<1>
|
||||
PARTITION FB16_1 Z3_DATA<26> Z3_DATA<12> Z3_DATA<11> Z3_DATA<25>
|
||||
Z3_DATA<24> Z3_DATA<10> Z3_DATA<18> Z3_DATA<9>
|
||||
Z3_DATA<17> ROM_B_0_OBUF$BUF3 Z3_DATA<8> DQ_DATA<2>
|
||||
EXP79_ Z3_DATA<16> EXP80_ EXP81_
|
||||
DQ_DATA<12> DQ_DATA<10>
|
||||
PARTITION FB5_1 AUTOCONFIG_Z2_ACCESS CP_CS_OBUF EXP28_ EXP29_
|
||||
ROM_OE_OBUF AUTO_CONFIG_Z2_DONE<2> AUTO_CONFIG_Z2_DONE_CYCLE<2> Z3_ADR<2>
|
||||
Z3_ADR<3> D_2_IOBUFE Z3_ADR<4> D_9_IOBUFE
|
||||
Z3_ADR_1 D_10_IOBUFE D_11_IOBUFE $OpTx$$OpTx$FX_DC$87_INV$1549
|
||||
D_12_IOBUFE EXP30_
|
||||
PARTITION FB6_1 LAN_WR_RST ROM_B_0_OBUF$BUF6 A_LAN_12_OBUF LAN_RST_SM_FSM_FFd6
|
||||
A_LAN_13_OBUF A_LAN_10_OBUF LAN_RST_SM_FSM_FFd5 A_LAN_11_OBUF
|
||||
LAN_RST_SM_FSM_FFd4 A_LAN_8_OBUF LAN_RST_SM_FSM_FFd3 LAN_RST_SM_FSM_FFd2
|
||||
LAN_RST_SM_FSM_FFd1 A_LAN_9_OBUF LAN_D_INIT<8> LAN_D_INIT<1>
|
||||
LAN_CS_RST LAN_A_INIT<6>
|
||||
PARTITION FB7_1 SHUT_UP_Z2<0> CP_RD_S D_13_IOBUFE AUTO_CONFIG_Z2_DONE_CYCLE<1>
|
||||
D_14_IOBUFE EXP31_ EXP32_ D_Z2_OUT<0>
|
||||
EXP33_ AUTO_CONFIG_Z2_DONE_CYCLE<0> EXP34_ D_15_IOBUFE
|
||||
EXP35_ D_Z2_OUT<1> EXP36_ EXP37_
|
||||
D_Z2_OUT<2> EXP38_
|
||||
PARTITION FB8_1 EXP39_ DQ_12_IOBUFE DQ_14_IOBUFE EXP40_
|
||||
LAN_WRH_OBUF LAN_BASEADR<8> LAN_BASEADR<6> LAN_CS_OBUF
|
||||
LAN_BASEADR<4> LAN_RD_OBUF LAN_BASEADR<3> LAN_BASEADR<14>
|
||||
LAN_BASEADR<12> LAN_BASEADR<11> LAN_BASEADR<0> CP_BASEADR<3>
|
||||
EXP41_ SHUT_UP_Z2<1>
|
||||
PARTITION FB9_1 EXP42_ LAN_ACCESS LAN_SM_FSM_FFd1 Z3_ADR<11>
|
||||
$OpTx$FX_DC$81 $OpTx$INV$63 EXP43_ Z3_ADR<12>
|
||||
LAN_SM_FSM_FFd13 IDE_ENABLE Z3_DATA<0> DQ_SWAP
|
||||
LAN_SM_FSM_FFd2 Z3_DATA<1> IDE_W_S $OpTx$FX_DC$82
|
||||
Z3_DATA<2> LAN_SM_FSM_FFd4
|
||||
PARTITION FB10_1 DQ<4>_BUFR.MC DQ_1_IOBUFE DQ_0_IOBUFE EXP44_
|
||||
DQ_3_IOBUFE DQ_2_IOBUFE EXP45_ DQ_5_IOBUFE
|
||||
EXP46_ _19_ DQ_7_IOBUFE DQ_6_IOBUFE
|
||||
EXP47_ _18_ EXP48_ EXP49_
|
||||
DQ_10_IOBUFE EXP50_
|
||||
PARTITION FB11_1 $OpTx$FX_DC$1248 Z3_DATA<30> Z3_DATA<3> Z3_DATA<29>
|
||||
Z3_DATA<4> Z3_DATA<28> Z3_DATA<27> Z3_DATA<22>
|
||||
Z3_DATA<21> Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF8
|
||||
Z3_DATA<20> ROM_B_0_OBUF Z3_DATA<19> LAN_READY
|
||||
CP_WE_OBUF Z3_A_LOW
|
||||
PARTITION FB12_1 DQ_DATA<11> ROM_B_0_OBUF$BUF4 LAN_SM_FSM_FFd8 LAN_SM_FSM_FFd10
|
||||
DQ_15_IOBUFE LAN_SM_RST EXP51_ DQ_13_IOBUFE
|
||||
EXP52_ DQ_11_IOBUFE EXP53_ DQ_9_IOBUFE
|
||||
EXP54_ DQ_DATA<5> EXP55_ DQ_DATA<3>
|
||||
EXP56_ DQ_DATA<13>
|
||||
PARTITION FB13_1 DQ_DATA<10> CP_RD_OBUF EXP57_ EXP58_
|
||||
DQ_DATA<6> EXP59_ DQ_DATA<4> Z3_DATA<7>
|
||||
EXP60_ DQ_DATA<2>
|
||||
PARTITION FB13_12 EXP61_ DQ_DATA<15> LAN_WRL_OBUF EXP62_
|
||||
DQ_DATA<14> EXP63_ DQ_DATA<12>
|
||||
PARTITION FB14_1 EXP64_ D_Z2_OUT<3> ROM_B_0_OBUF$BUF2 AUTO_CONFIG_Z2_DONE<1>
|
||||
IDE_ACCESS CP_WE_S IDE_R_S ROM_OE_S
|
||||
Z3_ADR<10> Z3_ADR<13> CFOUT_OBUF Z3_ADR<5>
|
||||
Z3_ADR<6> SLAVE_OBUF ROM_B_0_OBUF$BUF1 Z3_ADR<7>
|
||||
Z3_ADR_0 AUTO_CONFIG_Z2_DONE<0>
|
||||
PARTITION FB15_1 DQ_DATA<1> LAN_SM_FSM_FFd12 LAN_WRL_S LAN_WRH_S
|
||||
LAN_SM_FSM_FFd7 LAN_SM_FSM_FFd3 LAN_SM_FSM_FFd9 LAN_SM_FSM_FFd11
|
||||
LAN_RD_S DQ_DATA<9> LAN_SM_FSM_FFd6 ROM_B_0_OBUF$BUF10
|
||||
DQ_DATA<7> Z3_DATA<15> Z3_DATA<14> LAN_INT_ENABLE
|
||||
Z3_DATA<13> LAN_SM_FSM_FFd5
|
||||
PARTITION FB16_1 DQ_DATA<0> Z3_DATA<12> Z3_DATA<11> EXP65_
|
||||
DQ_DATA<8> Z3_DATA<10> Z3_DATA<17> Z3_DATA<9>
|
||||
Z3_DATA<18> ROM_B_0_OBUF$BUF3 Z3_DATA<8> Z3_DATA<23>
|
||||
Z3_DATA<24> Z3_DATA<25> Z3_DATA<26> Z3_DATA<31>
|
||||
Z3_DATA<16> EXP66_
|
||||
|
||||
|
||||
+1496
-1496
File diff suppressed because it is too large
Load Diff
+3688
-4091
File diff suppressed because it is too large
Load Diff
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
@@ -1,7 +1,7 @@
|
||||
Release 8.1i - Fit P.20131013
|
||||
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
|
||||
|
||||
2-21-2019 2:45PM
|
||||
2-21-2019 11:38PM
|
||||
|
||||
NOTE: This file is designed to be imported into a spreadsheet program
|
||||
such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
|
||||
|
||||
File diff suppressed because one or more lines are too long
+2194
-2230
File diff suppressed because it is too large
Load Diff
@@ -3,14 +3,14 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
|
||||
--> Parameter TMPDIR set to xst/projnav.tmp
|
||||
|
||||
|
||||
Total REAL time to Xst completion: 1.00 secs
|
||||
Total CPU time to Xst completion: 0.13 secs
|
||||
Total REAL time to Xst completion: 0.00 secs
|
||||
Total CPU time to Xst completion: 0.14 secs
|
||||
|
||||
--> Parameter xsthdpdir set to xst
|
||||
|
||||
|
||||
Total REAL time to Xst completion: 1.00 secs
|
||||
Total CPU time to Xst completion: 0.13 secs
|
||||
Total REAL time to Xst completion: 0.00 secs
|
||||
Total CPU time to Xst completion: 0.14 secs
|
||||
|
||||
--> Reading design: LAN_IDE_CP.prj
|
||||
|
||||
@@ -43,7 +43,7 @@ Target Device : XC9500XL CPLDs
|
||||
---- Source Options
|
||||
Top Module Name : LAN_IDE_CP
|
||||
Automatic FSM Extraction : YES
|
||||
FSM Encoding Algorithm : Compact
|
||||
FSM Encoding Algorithm : One-Hot
|
||||
Safe Implementation : No
|
||||
Mux Extraction : Yes
|
||||
Resource Sharing : YES
|
||||
@@ -55,7 +55,7 @@ XOR Preserve : YES
|
||||
Equivalent register Removal : YES
|
||||
|
||||
---- General Options
|
||||
Optimization Goal : Area
|
||||
Optimization Goal : Speed
|
||||
Optimization Effort : 1
|
||||
Keep Hierarchy : Yes
|
||||
Netlist Hierarchy : As_Optimized
|
||||
@@ -71,7 +71,7 @@ wysiwyg : NO
|
||||
|
||||
=========================================================================
|
||||
|
||||
Setting FSM Encoding Algorithm to : OPT
|
||||
Setting FSM Encoding Algorithm to : ONE
|
||||
|
||||
|
||||
=========================================================================
|
||||
@@ -123,7 +123,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
|
||||
| Reset type | asynchronous |
|
||||
| Reset State | nop |
|
||||
| Power Up State | nop |
|
||||
| Encoding | compact |
|
||||
| Encoding | one-hot |
|
||||
| Implementation | automatic |
|
||||
-----------------------------------------------------------------------
|
||||
Found finite state machine <FSM_1> for signal <LAN_RST_SM>.
|
||||
@@ -137,7 +137,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
|
||||
| Reset type | asynchronous |
|
||||
| Reset State | nop |
|
||||
| Power Up State | nop |
|
||||
| Encoding | compact |
|
||||
| Encoding | one-hot |
|
||||
| Implementation | automatic |
|
||||
-----------------------------------------------------------------------
|
||||
Found 16-bit tristate buffer for signal <D>.
|
||||
@@ -165,30 +165,30 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
|
||||
Found 1-bit tristate buffer for signal <A<10>>.
|
||||
Found 1-bit tristate buffer for signal <A<9>>.
|
||||
Found 1-bit tristate buffer for signal <A<8>>.
|
||||
Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 176.
|
||||
Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 177.
|
||||
Found 3-bit register for signal <AUTO_CONFIG_Z2_DONE>.
|
||||
Found 3-bit register for signal <AUTO_CONFIG_Z2_DONE_CYCLE>.
|
||||
Found 1-bit register for signal <AUTOCONFIG_Z2_ACCESS>.
|
||||
Found 1-bit register for signal <CP_ACCESS>.
|
||||
Found 8-bit comparator equal for signal <CP_ACCESS$cmp_eq0000> created at line 289.
|
||||
Found 8-bit comparator equal for signal <CP_ACCESS$cmp_eq0000> created at line 290.
|
||||
Found 8-bit register for signal <CP_BASEADR>.
|
||||
Found 1-bit register for signal <CP_RD_S>.
|
||||
Found 1-bit register for signal <CP_WE_QUIRK>.
|
||||
Found 1-bit register for signal <CP_WE_S>.
|
||||
Found 4-bit register for signal <D_Z2_OUT>.
|
||||
Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 629.
|
||||
Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 637.
|
||||
Found 16-bit register for signal <DQ_DATA>.
|
||||
Found 1-bit register for signal <DQ_SWAP>.
|
||||
Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 260.
|
||||
Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 261.
|
||||
Found 1-bit register for signal <IDE_ACCESS>.
|
||||
Found 8-bit comparator equal for signal <IDE_ACCESS$cmp_eq0000> created at line 296.
|
||||
Found 8-bit comparator equal for signal <IDE_ACCESS$cmp_eq0000> created at line 297.
|
||||
Found 8-bit register for signal <IDE_BASEADR>.
|
||||
Found 1-bit register for signal <IDE_ENABLE>.
|
||||
Found 1-bit register for signal <IDE_R_S>.
|
||||
Found 1-bit register for signal <IDE_W_S>.
|
||||
Found 14-bit register for signal <LAN_A_INIT>.
|
||||
Found 1-bit register for signal <LAN_ACCESS>.
|
||||
Found 16-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 259.
|
||||
Found 16-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 260.
|
||||
Found 16-bit register for signal <LAN_BASEADR>.
|
||||
Found 1-bit register for signal <LAN_CS_RST>.
|
||||
Found 16-bit register for signal <LAN_D_INIT>.
|
||||
@@ -197,7 +197,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
|
||||
Found 1-bit register for signal <LAN_IRQ_OUT>.
|
||||
Found 1-bit register for signal <LAN_RD_S>.
|
||||
Found 1-bit register for signal <LAN_READY>.
|
||||
Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 386.
|
||||
Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 387.
|
||||
Found 1-bit register for signal <LAN_SM_RST>.
|
||||
Found 1-bit register for signal <LAN_WR_RST>.
|
||||
Found 1-bit register for signal <LAN_WRH_S>.
|
||||
@@ -209,7 +209,7 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
|
||||
Found 32-bit register for signal <Z3_DATA>.
|
||||
Summary:
|
||||
inferred 2 Finite State Machine(s).
|
||||
inferred 58 D-type flip-flop(s).
|
||||
inferred 74 D-type flip-flop(s).
|
||||
inferred 6 Comparator(s).
|
||||
inferred 1 Xor(s).
|
||||
inferred 58 Tristate(s).
|
||||
@@ -220,10 +220,10 @@ Unit <LAN_IDE_CP> synthesized.
|
||||
HDL Synthesis Report
|
||||
|
||||
Macro Statistics
|
||||
# Registers : 70
|
||||
1-bit register : 61
|
||||
# Registers : 85
|
||||
1-bit register : 77
|
||||
14-bit register : 2
|
||||
16-bit register : 3
|
||||
16-bit register : 2
|
||||
3-bit register : 1
|
||||
4-bit register : 1
|
||||
8-bit register : 2
|
||||
@@ -244,38 +244,38 @@ Macro Statistics
|
||||
* Advanced HDL Synthesis *
|
||||
=========================================================================
|
||||
|
||||
Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with compact encoding.
|
||||
Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:8]> with one-hot encoding.
|
||||
------------------------
|
||||
State | Encoding
|
||||
------------------------
|
||||
nop | 000
|
||||
wait0 | 100
|
||||
clr | 101
|
||||
clr_commit | 111
|
||||
wait1 | 001
|
||||
set | 011
|
||||
set_commit | 010
|
||||
done | 110
|
||||
nop | 00000001
|
||||
wait0 | 00000010
|
||||
clr | 00000100
|
||||
clr_commit | 00001000
|
||||
wait1 | 00010000
|
||||
set | 00100000
|
||||
set_commit | 01000000
|
||||
done | 10000000
|
||||
------------------------
|
||||
Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:4]> with compact encoding.
|
||||
-------------------------------
|
||||
Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:13]> with one-hot encoding.
|
||||
------------------------------------
|
||||
State | Encoding
|
||||
-------------------------------
|
||||
nop | 0000
|
||||
------------------------------------
|
||||
nop | 0000000000001
|
||||
start_read_upper | unreached
|
||||
wait_read_upper | 0001
|
||||
end_read_upper | 1010
|
||||
start_read_lower | 0101
|
||||
wait_read_lower | 0111
|
||||
end_read_lower | 0110
|
||||
start_write_upper | 1001
|
||||
wait_write_upper | 0011
|
||||
end_write_upper | 0010
|
||||
start_write_lower | 1101
|
||||
wait_write_lower | 1111
|
||||
end_write_lower | 1110
|
||||
config_rw | 0100
|
||||
-------------------------------
|
||||
wait_read_upper | 0000000000100
|
||||
end_read_upper | 0000001000000
|
||||
start_read_lower | 0000010000000
|
||||
wait_read_lower | 0000000001000
|
||||
end_read_lower | 0000100000000
|
||||
start_write_upper | 0000000010000
|
||||
wait_write_upper | 0001000000000
|
||||
end_write_upper | 0010000000000
|
||||
start_write_lower | 0000000100000
|
||||
wait_write_lower | 0100000000000
|
||||
end_write_lower | 1000000000000
|
||||
config_rw | 0000000000010
|
||||
------------------------------------
|
||||
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <13>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <12>. This FF/Latch will be trimmed during the optimization process.
|
||||
WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <11>. This FF/Latch will be trimmed during the optimization process.
|
||||
@@ -304,8 +304,8 @@ Advanced HDL Synthesis Report
|
||||
|
||||
Macro Statistics
|
||||
# FSMs : 2
|
||||
# Registers : 58
|
||||
Flip-Flops : 58
|
||||
# Registers : 74
|
||||
Flip-Flops : 74
|
||||
# Comparators : 3
|
||||
16-bit comparator equal : 1
|
||||
8-bit comparator equal : 2
|
||||
@@ -339,14 +339,14 @@ WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_1> has a
|
||||
WARNING:Xst:1896 - Due to other FF/Latch trimming, FF/Latch <LAN_A_INIT_0> has a constant value of 1 in block <LAN_IDE_CP>. This FF/Latch will be trimmed during the optimization process.
|
||||
INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_8> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_10> <LAN_D_INIT_11>
|
||||
INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_1> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_4> <LAN_D_INIT_9>
|
||||
INFO:Xst:2261 - The FF/Latch <LAN_A_INIT_3> in Unit <LAN_IDE_CP> is equivalent to the following FF/Latch, which will be removed : <LAN_RST_SM_FSM_FFd8>
|
||||
|
||||
Optimizing unit <LAN_IDE_CP> ...
|
||||
implementation constraint: INIT=s : SHUT_UP_Z2_2
|
||||
implementation constraint: INIT=s : SHUT_UP_Z2_0
|
||||
implementation constraint: INIT=s : SHUT_UP_Z2_1
|
||||
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_1
|
||||
implementation constraint: INIT=r : LAN_INT_ENABLE
|
||||
implementation constraint: INIT=s : SHUT_UP_Z2_2
|
||||
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_0
|
||||
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_1
|
||||
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_2
|
||||
implementation constraint: INIT=s : D_Z2_OUT_3
|
||||
implementation constraint: INIT=s : LAN_A_INIT_3
|
||||
implementation constraint: INIT=s : D_Z2_OUT_2
|
||||
@@ -354,18 +354,32 @@ Optimizing unit <LAN_IDE_CP> ...
|
||||
implementation constraint: INIT=s : D_Z2_OUT_1
|
||||
implementation constraint: INIT=s : D_Z2_OUT_0
|
||||
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_2
|
||||
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_2
|
||||
implementation constraint: INIT=r : LAN_D_INIT_1
|
||||
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_0
|
||||
implementation constraint: INIT=r : LAN_D_INIT_8
|
||||
implementation constraint: INIT=s : SHUT_UP_Z2_0
|
||||
implementation constraint: INIT=s : SHUT_UP_Z2_1
|
||||
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_1
|
||||
implementation constraint: INIT=r : AUTO_CONFIG_Z2_DONE_CYCLE_0
|
||||
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd1
|
||||
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd2
|
||||
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd3
|
||||
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd4
|
||||
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd5
|
||||
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd6
|
||||
implementation constraint: INIT=r : LAN_RST_SM_FSM_FFd7
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd1
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd2
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd3
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd4
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd5
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd6
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd7
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd8
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd9
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd10
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd11
|
||||
implementation constraint: INIT=r : LAN_SM_FSM_FFd12
|
||||
implementation constraint: INIT=s : LAN_SM_FSM_FFd13
|
||||
|
||||
=========================================================================
|
||||
* Partition Report *
|
||||
@@ -385,7 +399,7 @@ Final Results
|
||||
RTL Top Level Output File Name : LAN_IDE_CP.ngr
|
||||
Top Level Output File Name : LAN_IDE_CP
|
||||
Output Format : NGC
|
||||
Optimization Goal : Area
|
||||
Optimization Goal : Speed
|
||||
Keep Hierarchy : Yes
|
||||
Target Technology : XC9500XL CPLDs
|
||||
Macro Preserve : YES
|
||||
@@ -397,20 +411,25 @@ Design Statistics
|
||||
# IOs : 117
|
||||
|
||||
Cell Usage :
|
||||
# BELS : 966
|
||||
# AND2 : 362
|
||||
# AND3 : 15
|
||||
# BELS : 1090
|
||||
# AND2 : 361
|
||||
# AND3 : 39
|
||||
# AND4 : 15
|
||||
# AND5 : 1
|
||||
# AND8 : 4
|
||||
# GND : 1
|
||||
# INV : 280
|
||||
# OR2 : 259
|
||||
# OR3 : 14
|
||||
# OR4 : 2
|
||||
# INV : 346
|
||||
# OR2 : 222
|
||||
# OR3 : 45
|
||||
# OR4 : 6
|
||||
# OR5 : 1
|
||||
# OR8 : 16
|
||||
# XOR2 : 33
|
||||
# FlipFlops/Latches : 141
|
||||
# FlipFlops/Latches : 154
|
||||
# FD : 4
|
||||
# FDC : 20
|
||||
# FDC : 32
|
||||
# FDCE : 7
|
||||
# FDP : 41
|
||||
# FDP : 42
|
||||
# FDPE : 69
|
||||
# IO Buffers : 115
|
||||
# IBUF : 24
|
||||
@@ -420,14 +439,14 @@ Cell Usage :
|
||||
=========================================================================
|
||||
|
||||
|
||||
Total REAL time to Xst completion: 19.00 secs
|
||||
Total CPU time to Xst completion: 18.56 secs
|
||||
Total REAL time to Xst completion: 9.00 secs
|
||||
Total CPU time to Xst completion: 9.16 secs
|
||||
|
||||
-->
|
||||
|
||||
Total memory usage is 4534820 kilobytes
|
||||
Total memory usage is 4534788 kilobytes
|
||||
|
||||
Number of errors : 0 ( 0 filtered)
|
||||
Number of warnings : 46 ( 0 filtered)
|
||||
Number of infos : 10 ( 0 filtered)
|
||||
Number of infos : 11 ( 0 filtered)
|
||||
|
||||
|
||||
+323
-235
@@ -1,545 +1,633 @@
|
||||
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<0>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<0>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<0>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<0>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<0>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<0>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<10>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<10>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<10>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<10>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<10>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<10>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<11>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<11>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<11>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<11>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<11>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<11>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<12>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<12>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<12>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<12>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<12>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<12>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<13>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<13>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<13>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<13>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<13>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<13>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<14>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<14>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<14>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<14>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<14>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<14>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<15>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<15>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<15>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<15>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<15>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<15>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<1>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<1>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<1>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<1>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<1>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<1>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<2>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<2>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<2>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<2>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<2>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<2>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<3>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<3>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<3>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<3>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<3>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<3>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<4>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<4>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<4>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<4>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<4>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<4>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<5>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<5>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<5>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<5>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<5>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<5>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<6>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<6>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<6>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<6>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<6>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<6>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<7>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<7>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<7>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<7>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<7>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<7>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<8>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<8>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<8>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<8>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<8>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<8>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<9>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<9>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<9>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<9>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<9>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:Z3_DATA<9>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_IRQ_D0.Q:TO:LAN_IRQ_OUT.D:400
|
||||
TS_CLK_EXT:FROM:LAN_IRQ_OUT.Q:TO:LAN_IRQ_OUT.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<16>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<16>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<16>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<16>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<16>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<16>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<17>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<17>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<17>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<17>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<17>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<17>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<18>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<18>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<18>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<18>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<18>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<18>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<19>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<19>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<19>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<19>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<19>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<19>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<20>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<20>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<20>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<20>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<20>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<20>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<21>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<21>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<21>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<21>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<21>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<21>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<22>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<22>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<22>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<22>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<22>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<22>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<23>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<23>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<23>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<23>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<23>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<23>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<24>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<24>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<24>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<24>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<24>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<24>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<25>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<25>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<25>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<25>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<25>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<25>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<26>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<26>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<26>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<26>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<26>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<26>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<27>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<27>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<27>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<27>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<27>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<27>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<28>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<28>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<28>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<28>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<28>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<28>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<29>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<29>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<29>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<29>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<29>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<29>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<30>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<30>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<30>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<30>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<30>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<30>.CE:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<31>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<31>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<31>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<31>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<31>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd2.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd4.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd4.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd4.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd4.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd4.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_DATA<31>.CE:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:LAN_SM_FSM_FFd7.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:LAN_SM_FSM_FFd7.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd7.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:LAN_SM_FSM_FFd5.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:LAN_SM_FSM_FFd5.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd5.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:LAN_SM_FSM_FFd10.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:LAN_SM_FSM_FFd10.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd10.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd3.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd8.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:LAN_SM_FSM_FFd8.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd8.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_SM_FSM_FFd12.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:LAN_SM_FSM_FFd12.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd12.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:LAN_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd2.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:LAN_SM_FSM_FFd6.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd6.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:LAN_SM_FSM_FFd9.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd9.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd1.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:LAN_SM_FSM_FFd11.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd11.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:LAN_SM_FSM_FFd4.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd4.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_D_INIT<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_D_INIT<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:LAN_D_INIT<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_A_INIT<3>.Q:TO:LAN_D_INIT<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:LAN_D_INIT<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:LAN_D_INIT<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:LAN_D_INIT<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd4.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:LAN_RST_SM_FSM_FFd6.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:DQ_DATA<0>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<0>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:DQ_DATA<10>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<10>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:DQ_DATA<11>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<11>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:DQ_DATA<12>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<12>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:DQ_DATA<13>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<13>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:DQ_DATA<14>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<14>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:DQ_DATA<15>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<15>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:DQ_DATA<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<1>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:DQ_DATA<2>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<2>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:DQ_DATA<3>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<3>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:DQ_DATA<4>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<4>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:DQ_DATA<5>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<5>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:DQ_DATA<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<6>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:DQ_DATA<7>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<7>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:DQ_DATA<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<8>.SETF:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:DQ_DATA<9>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<9>.SETF:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:LAN_RST_SM_FSM_FFd4.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:LAN_RST_SM_FSM_FFd5.D:400
|
||||
TS_CLK_EXT:FROM:LAN_A_INIT<3>.Q:TO:LAN_RST_SM_FSM_FFd7.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_WR_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_WR_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_WR_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_A_INIT<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_A_INIT<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_A_INIT<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_CS_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:LAN_WR_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_A_INIT<3>.Q:TO:LAN_A_INIT<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd5.Q:TO:LAN_A_INIT<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd6.Q:TO:LAN_A_INIT<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd7.Q:TO:LAN_A_INIT<6>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_A_INIT<3>.Q:TO:LAN_CS_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_CS_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_CS_RST.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_D_INIT<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_D_INIT<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<1>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_D_INIT<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_D_INIT<8>.D:400
|
||||
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<8>.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:LAN_INT_ENABLE.Q:TO:LAN_INT_ENABLE.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd11.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:LAN_RD_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_RD_S.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_READY.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_READY.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_READY.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_READY.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_READY.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:LAN_READY.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:LAN_READY.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd12.Q:TO:LAN_READY.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_READY.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd5.Q:TO:LAN_READY.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_READY.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_WRH_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_WRH_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRH_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_WRH_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:LAN_WRH_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:LAN_WRH_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_WRH_S.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_WRL_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_WRL_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRL_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_WRL_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd9.Q:TO:LAN_WRL_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:LAN_WRL_S.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_WRL_S.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd10.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd8.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd6.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd13.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_FSM_FFd7.Q:TO:Z3_A_LOW.D:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_A_LOW.RSTF:400
|
||||
TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd13.SETF:400
|
||||
|
||||
@@ -172,6 +172,7 @@ architecture Behavioral of LAN_IDE_CP is
|
||||
begin
|
||||
|
||||
Z3_DATA_IN <= D(15 downto 0) & A(23 downto 8);
|
||||
|
||||
Z3_DS <= UDS & LDS & DS1 & DS0;
|
||||
AMIGA_CLK <= not (C1 xor C3);
|
||||
DS <= UDS and LDS;
|
||||
@@ -561,11 +562,18 @@ begin
|
||||
--when "010110" => Dout1 <= "1111" ; --Rom vector low byte high nibble
|
||||
when "010111" =>
|
||||
D_Z2_OUT <= "1110" ; --Rom vector low byte low nibble
|
||||
when "100010" =>
|
||||
D_Z2_OUT <= "1111" ;
|
||||
if(RW='0')then
|
||||
if(AUTO_CONFIG_Z2_DONE(1) = '0')then --reg (1)?!?! Why? it does not work with (0) but it should!
|
||||
LAN_BASEADR(15 downto 8) <= D(15 downto 8); --Base adress
|
||||
end if;
|
||||
end if;
|
||||
when "100100" =>
|
||||
D_Z2_OUT <= "1111" ;
|
||||
if(RW='0')then
|
||||
if(AUTO_CONFIG_Z2_DONE(0) = '0')then
|
||||
LAN_BASEADR(15 downto 0) <= D(15 downto 0); --Base adress
|
||||
LAN_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress
|
||||
SHUT_UP_Z2(0) <='0'; --enable board
|
||||
AUTO_CONFIG_Z2_DONE_CYCLE(0) <= '1'; --done here
|
||||
elsif(AUTO_CONFIG_Z2_DONE(1) = '0')then
|
||||
@@ -617,7 +625,7 @@ begin
|
||||
--signal assignment
|
||||
D(15 downto 0) <= Z3_DATA(31 downto 16) when RW='1' and FCS='0' and LAN_ACCESS ='1' else
|
||||
D_Z2_OUT & x"FFF" when RW='1' and AS='0' and AUTOCONFIG_Z2_ACCESS ='1' else
|
||||
DQ(7 downto 0)&DQ(7 downto 0) when RW='1' and CP_ACCESS = '1' and AS='0' else
|
||||
DQ(15 downto 0) when RW='1' and CP_ACCESS = '1' and AS='0' else
|
||||
(others => 'Z');
|
||||
|
||||
A(23 downto 8) <= Z3_DATA(15 downto 0) when RW='1' and FCS='0' and LAN_ACCESS ='1' else
|
||||
@@ -694,7 +702,7 @@ begin
|
||||
--default values
|
||||
CP_RD_S <= '1';
|
||||
CP_WE_S <= '1';
|
||||
if(CP_ACCESS = '1' and DS='0')then --datastrobe instead of AS!
|
||||
if(CP_ACCESS = '1' and DS='0' and AS='0')then --datastrobe and AS!
|
||||
CP_RD_S <= not RW;
|
||||
CP_WE_S <= RW;
|
||||
end if;
|
||||
|
||||
@@ -58,8 +58,8 @@ entity LAN_IDE_CP is
|
||||
DS1 : in STD_LOGIC;
|
||||
FCS : in STD_LOGIC;
|
||||
RESET : in STD_LOGIC;
|
||||
INT_OUT : out STD_LOGIC;
|
||||
INT_CP_OUT : out STD_LOGIC;
|
||||
INT2_OUT : out STD_LOGIC;
|
||||
INT6_OUT : out STD_LOGIC;
|
||||
AUTOBOOT_OFF : in STD_LOGIC;
|
||||
ROM_B : out STD_LOGIC_VECTOR (1 downto 0);
|
||||
ROM_OE : out STD_LOGIC;
|
||||
@@ -172,7 +172,6 @@ architecture Behavioral of LAN_IDE_CP is
|
||||
begin
|
||||
|
||||
Z3_DATA_IN <= D(15 downto 0) & A(23 downto 8);
|
||||
|
||||
Z3_DS <= UDS & LDS & DS1 & DS0;
|
||||
AMIGA_CLK <= not (C1 xor C3);
|
||||
DS <= UDS and LDS;
|
||||
@@ -243,7 +242,7 @@ begin
|
||||
|
||||
ADDRESS_Z3_DECODE: process(AS,reset,FCS)
|
||||
begin
|
||||
if(--AS ='0' or
|
||||
if(AS ='0' or
|
||||
reset='0')then
|
||||
LAN_ACCESS <= '0';
|
||||
DQ_SWAP <= '1';
|
||||
@@ -273,7 +272,7 @@ begin
|
||||
|
||||
ADDRESS_Z2_DECODE: process(FCS,reset,AS)
|
||||
begin
|
||||
if(--FCS ='0' or
|
||||
if(FCS ='0' or
|
||||
reset='0')then
|
||||
AUTOCONFIG_Z2_ACCESS <= '0';
|
||||
IDE_ACCESS <= '0';
|
||||
@@ -392,6 +391,7 @@ begin
|
||||
LAN_SM <= wait_read_lower;
|
||||
end if;
|
||||
else
|
||||
|
||||
if(Z3_DS(3 downto 2) < "11")then -- determine bushalf
|
||||
LAN_SM <= start_write_upper;
|
||||
else
|
||||
@@ -560,11 +560,11 @@ begin
|
||||
--when "010101" => Dout1 <= "1111" ; --Rom vector high byte low nibble
|
||||
--when "010110" => Dout1 <= "1111" ; --Rom vector low byte high nibble
|
||||
when "010111" =>
|
||||
D_Z2_OUT <= "1110" ; --Rom vector low byte low nibble
|
||||
D_Z2_OUT <= "1110" ; --Rom vector low byte low nibble
|
||||
when "100010" =>
|
||||
D_Z2_OUT <= "1111" ;
|
||||
if(RW='0')then
|
||||
if(AUTO_CONFIG_Z2_DONE(1) = '0')then
|
||||
if(AUTO_CONFIG_Z2_DONE(0) = '0')then
|
||||
LAN_BASEADR(15 downto 8) <= D(15 downto 8); --Base adress
|
||||
end if;
|
||||
end if;
|
||||
@@ -604,7 +604,7 @@ begin
|
||||
|
||||
|
||||
|
||||
LAN_CS <= LAN_ACCESS when reset='1' else LAN_CS_RST;
|
||||
LAN_CS <= LAN_ACCESS when reset='1' and Z3_ADR(15)='0' else LAN_CS_RST;
|
||||
LAN_WRL <= LAN_WRL_S when FCS='0' and reset = '1' else LAN_WR_RST;
|
||||
LAN_WRH <= LAN_WRH_S when FCS='0' and reset = '1' else LAN_WR_RST;
|
||||
LAN_RD <= LAN_RD_S when FCS='0' and reset = '1' else '0';
|
||||
@@ -642,10 +642,10 @@ begin
|
||||
|
||||
|
||||
|
||||
INT_OUT <= '0' when LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1' else
|
||||
INT2_OUT <= '0' when LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1' else
|
||||
--'0' when CP_IRQ = '0' else
|
||||
'Z';
|
||||
INT_CP_OUT <= '0' when CP_IRQ = '0' else
|
||||
INT6_OUT <= '0' when CP_IRQ = '0' else
|
||||
'Z';
|
||||
OWN <= 'Z';
|
||||
SLAVE <= '0' when FCS='0' and LAN_ACCESS = '1' else
|
||||
@@ -701,7 +701,7 @@ begin
|
||||
--default values
|
||||
CP_RD_S <= '1';
|
||||
CP_WE_S <= '1';
|
||||
if(CP_ACCESS = '1' and DS='0')then --datastrobe instead of AS!
|
||||
if(CP_ACCESS = '1' and DS='0' and AS='0')then --datastrobe and AS!
|
||||
CP_RD_S <= not RW;
|
||||
CP_WE_S <= RW;
|
||||
end if;
|
||||
|
||||
+13007
-13027
File diff suppressed because it is too large
Load Diff
File diff suppressed because one or more lines are too long
@@ -7,7 +7,7 @@ run
|
||||
-ofmt NGC
|
||||
-p xc9500xl
|
||||
-top LAN_IDE_CP
|
||||
-opt_mode Area
|
||||
-opt_mode Speed
|
||||
-opt_level 1
|
||||
-iuc NO
|
||||
-keep_hierarchy Yes
|
||||
@@ -17,7 +17,7 @@ run
|
||||
-bus_delimiter <>
|
||||
-case Maintain
|
||||
-verilog2001 YES
|
||||
-fsm_extract YES -fsm_encoding Compact
|
||||
-fsm_extract YES -fsm_encoding One-Hot
|
||||
-safe_implementation No
|
||||
-mux_extract Yes
|
||||
-resource_sharing YES
|
||||
|
||||
@@ -1,10 +1,10 @@
|
||||
<?xml version='1.0' encoding='utf-8' ?>
|
||||
<!DOCTYPE document SYSTEM 'file:///C:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/buildXML.dtd'>
|
||||
<!DOCTYPE document SYSTEM 'file:///c:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/buildXML.dtd'>
|
||||
|
||||
<document>
|
||||
<design name='LAN_IDE_CP'/>
|
||||
<rptdir name='LAN_IDE_CP'/>
|
||||
<xilinx path='C:/Xilinx/14.7/ISE_DS/ISE;'/>
|
||||
<xilinx path='c:/Xilinx/14.7/ISE_DS/ISE;'/>
|
||||
<projDir path='C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE'/>
|
||||
<xslDir path='chipviewer/data/xsl'/>
|
||||
<fileDir path='/chipviewer/data/html'/>
|
||||
@@ -259,7 +259,7 @@
|
||||
<output file='fbs_FB16.htm'/>
|
||||
</xslFile>
|
||||
</xmlFile>
|
||||
<xmlFile file='C:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/pinlegend.xml'>
|
||||
<xmlFile file='c:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/pinlegend.xml'>
|
||||
<xslFile file='legend.xsl'>
|
||||
<param name='device' value='XC95288XL-10-TQ144'/>
|
||||
<param name='verOn' value='0'/>
|
||||
@@ -271,7 +271,7 @@
|
||||
<output file='pinlegendV.htm'/>
|
||||
</xslFile>
|
||||
</xmlFile>
|
||||
<xmlFile file='C:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/logiclegend.xml'>
|
||||
<xmlFile file='c:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/logiclegend.xml'>
|
||||
<xslFile file='legend.xsl'>
|
||||
<param name='device' value='XC95288XL-10-TQ144'/>
|
||||
<param name='verOn' value='0'/>
|
||||
|
||||
@@ -5,7 +5,7 @@
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
|
||||
<application stringID="NgdBuild" timeStamp="Thu Feb 21 14:45:11 2019">
|
||||
<application stringID="NgdBuild" timeStamp="Thu Feb 21 23:38:08 2019">
|
||||
<section stringID="User_Env">
|
||||
<table stringID="User_EnvVar">
|
||||
<column stringID="variable"/>
|
||||
@@ -70,32 +70,38 @@
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_INFOS" value="0"/>
|
||||
</section>
|
||||
<section stringID="NGDBUILD_PRE_UNISIM_SUMMARY">
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="362"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="15"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="361"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="39"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="15"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND5" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FD" value="4"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDC" value="20"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDC" value="32"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="7"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDP" value="41"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDP" value="42"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_FDPE" value="69"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="24"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="280"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="346"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="259"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="14"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="2"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="222"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="45"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="6"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR5" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="33"/>
|
||||
</section>
|
||||
<section stringID="NGDBUILD_POST_UNISIM_SUMMARY">
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="362"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="15"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="66"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND2" value="361"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND3" value="39"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND4" value="15"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_AND5" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_GND" value="79"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="74"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="280"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_INV" value="346"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="259"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="14"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="2"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR2" value="222"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR3" value="45"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR4" value="6"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_OR5" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_TS_TIMESPEC" value="1"/>
|
||||
<item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="33"/>
|
||||
</section>
|
||||
|
||||
@@ -1,7 +1,7 @@
|
||||
Release 8.1i - Fit P.20131013
|
||||
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
|
||||
|
||||
2-21-2019 2:45PM
|
||||
2-21-2019 11:38PM
|
||||
|
||||
NOTE: This file is designed to be imported into a spreadsheet program
|
||||
such as Microsoft Excel for viewing, printing and sorting. The comma ','
|
||||
|
||||
|
@@ -5,7 +5,7 @@
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
|
||||
<application stringID="Xst" timeStamp="Thu Feb 21 14:44:46 2019">
|
||||
<application stringID="Xst" timeStamp="Thu Feb 21 23:37:51 2019">
|
||||
<section stringID="User_Env">
|
||||
<table stringID="User_EnvVar">
|
||||
<column stringID="variable"/>
|
||||
@@ -60,7 +60,7 @@
|
||||
<item DEFAULT="NGC" label="-ofmt" stringID="XST_OFMT" value="NGC"/>
|
||||
<item DEFAULT="" label="-p" stringID="XST_P" value="xc9500xl"/>
|
||||
<item DEFAULT="" label="-top" stringID="XST_TOP" value="LAN_IDE_CP"/>
|
||||
<item DEFAULT="SPEED" label="-opt_mode" stringID="XST_OPTMODE" value="Area"/>
|
||||
<item DEFAULT="SPEED" label="-opt_mode" stringID="XST_OPTMODE" value="Speed"/>
|
||||
<item DEFAULT="1" label="-opt_level" stringID="XST_OPTLEVEL" value="1"/>
|
||||
<item DEFAULT="NO" label="-iuc" stringID="XST_IUC" value="NO"/>
|
||||
<item DEFAULT="YES" label="-keep_hierarchy" stringID="XST_KEEPHIERARCHY" value="Yes"/>
|
||||
@@ -71,7 +71,7 @@
|
||||
<item DEFAULT="MAINTAIN" stringID="XST_CASE" value="Maintain"/>
|
||||
<item DEFAULT="YES" label="-verilog2001" stringID="XST_VERILOG2001" value="YES"/>
|
||||
<item DEFAULT="YES" label="-fsm_extract" stringID="XST_FSMEXTRACT" value="YES"/>
|
||||
<item DEFAULT="AUTO" label="-fsm_encoding" stringID="XST_FSMENCODING" value="Compact"/>
|
||||
<item DEFAULT="AUTO" label="-fsm_encoding" stringID="XST_FSMENCODING" value="One-Hot"/>
|
||||
<item DEFAULT="NO" label="-safe_implementation" stringID="XST_SAFEIMPLEMENTATION" value="No"/>
|
||||
<item DEFAULT="YES" stringID="XST_MUXEXTRACT" value="Yes"/>
|
||||
<item DEFAULT="YES" label="-resource_sharing" stringID="XST_RESOURCESHARING" value="YES"/>
|
||||
@@ -79,10 +79,10 @@
|
||||
<item DEFAULT="YES" label="-equivalent_register_removal" stringID="XST_EQUIVALENTREGISTERREMOVAL" value="YES"/>
|
||||
</section>
|
||||
<section stringID="XST_HDL_SYNTHESIS_REPORT">
|
||||
<item dataType="int" stringID="XST_REGISTERS" value="70">
|
||||
<item dataType="int" stringID="XST_1BIT_REGISTER" value="61"/>
|
||||
<item dataType="int" stringID="XST_REGISTERS" value="85">
|
||||
<item dataType="int" stringID="XST_1BIT_REGISTER" value="77"/>
|
||||
<item dataType="int" stringID="XST_14BIT_REGISTER" value="2"/>
|
||||
<item dataType="int" stringID="XST_16BIT_REGISTER" value="3"/>
|
||||
<item dataType="int" stringID="XST_16BIT_REGISTER" value="2"/>
|
||||
<item dataType="int" stringID="XST_3BIT_REGISTER" value="1"/>
|
||||
<item dataType="int" stringID="XST_4BIT_REGISTER" value="1"/>
|
||||
<item dataType="int" stringID="XST_8BIT_REGISTER" value="2"/>
|
||||
@@ -97,8 +97,8 @@
|
||||
</section>
|
||||
<section stringID="XST_ADVANCED_HDL_SYNTHESIS_REPORT">
|
||||
<item dataType="int" stringID="XST_FSMS" value="2"/>
|
||||
<item dataType="int" stringID="XST_REGISTERS" value="58">
|
||||
<item dataType="int" stringID="XST_FLIPFLOPS" value="58"/>
|
||||
<item dataType="int" stringID="XST_REGISTERS" value="74">
|
||||
<item dataType="int" stringID="XST_FLIPFLOPS" value="74"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_COMPARATORS" value="3"></item>
|
||||
</section>
|
||||
@@ -112,26 +112,27 @@
|
||||
<item stringID="XST_RTL_TOP_LEVEL_OUTPUT_FILE_NAME" value="LAN_IDE_CP.ngr"/>
|
||||
<item stringID="XST_TOP_LEVEL_OUTPUT_FILE_NAME" value="LAN_IDE_CP"/>
|
||||
<item stringID="XST_OUTPUT_FORMAT" value="NGC"/>
|
||||
<item stringID="XST_OPTIMIZATION_GOAL" value="Area"/>
|
||||
<item stringID="XST_OPTIMIZATION_GOAL" value="Speed"/>
|
||||
<item stringID="XST_KEEP_HIERARCHY" value="Yes"/>
|
||||
</section>
|
||||
<section stringID="XST_DESIGN_STATISTICS">
|
||||
<item stringID="XST_IOS" value="117"/>
|
||||
</section>
|
||||
<section stringID="XST_CELL_USAGE">
|
||||
<item dataType="int" stringID="XST_BELS" value="966">
|
||||
<item dataType="int" stringID="XST_AND2" value="362"/>
|
||||
<item dataType="int" stringID="XST_AND3" value="15"/>
|
||||
<item dataType="int" stringID="XST_BELS" value="1090">
|
||||
<item dataType="int" stringID="XST_AND2" value="361"/>
|
||||
<item dataType="int" stringID="XST_AND3" value="39"/>
|
||||
<item dataType="int" stringID="XST_AND4" value="15"/>
|
||||
<item dataType="int" stringID="XST_GND" value="1"/>
|
||||
<item dataType="int" stringID="XST_INV" value="280"/>
|
||||
<item dataType="int" stringID="XST_OR2" value="259"/>
|
||||
<item dataType="int" stringID="XST_INV" value="346"/>
|
||||
<item dataType="int" stringID="XST_OR2" value="222"/>
|
||||
<item dataType="int" stringID="XST_XOR2" value="33"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="141">
|
||||
<item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="154">
|
||||
<item dataType="int" stringID="XST_FD" value="4"/>
|
||||
<item dataType="int" stringID="XST_FDC" value="20"/>
|
||||
<item dataType="int" stringID="XST_FDC" value="32"/>
|
||||
<item dataType="int" stringID="XST_FDCE" value="7"/>
|
||||
<item dataType="int" stringID="XST_FDP" value="41"/>
|
||||
<item dataType="int" stringID="XST_FDP" value="42"/>
|
||||
<item dataType="int" stringID="XST_FDPE" value="69"/>
|
||||
</item>
|
||||
<item dataType="int" stringID="XST_IO_BUFFERS" value="115">
|
||||
@@ -143,7 +144,7 @@
|
||||
<section stringID="XST_ERRORS_STATISTICS">
|
||||
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_ERRORS" value="0"/>
|
||||
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="46"/>
|
||||
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="10"/>
|
||||
<item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="11"/>
|
||||
</section>
|
||||
</application>
|
||||
|
||||
|
||||
@@ -1,2 +1,2 @@
|
||||
C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1550756704
|
||||
C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1550788680
|
||||
OK
|
||||
|
||||
@@ -173,5 +173,8 @@
|
||||
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">LAN_D_INIT_1</arg>> in Unit <<arg fmt="%s" index="2">LAN_IDE_CP</arg>> is equivalent to the following <arg fmt="%s" index="3">2 FFs/Latches</arg>, which will be removed : <arg fmt="%s" index="4"><LAN_D_INIT_4> <LAN_D_INIT_9> </arg>
|
||||
</msg>
|
||||
|
||||
<msg type="info" file="Xst" num="2261" delta="old" >The FF/Latch <<arg fmt="%s" index="1">LAN_A_INIT_3</arg>> in Unit <<arg fmt="%s" index="2">LAN_IDE_CP</arg>> is equivalent to the following <arg fmt="%s" index="3">FF/Latch</arg>, which will be removed : <arg fmt="%s" index="4"><LAN_RST_SM_FSM_FFd8> </arg>
|
||||
</msg>
|
||||
|
||||
</messages>
|
||||
|
||||
|
||||
@@ -7,7 +7,7 @@
|
||||
|
||||
<Properties>
|
||||
<property name="Synthesize - XST:Optimization Goal" value="Speed"/>
|
||||
<property name="Synthesize - XST:FSM Encoding Algorithm" value="Compact"/>
|
||||
<property name="Synthesize - XST:FSM Encoding Algorithm" value="One-Hot"/>
|
||||
<property name="Synthesize - XST:Safe Implementation" value="No"/>
|
||||
</Properties>
|
||||
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
@SET PATH=c:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;C:\Xilinx\14.6\ISE_DS\ISE\lib\nt64
|
||||
@SET XILINX=c:\Xilinx\14.7\ISE_DS\ISE
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize density -htmlrpt -loc on -slew fast -init low -inputs %1 -pterms %2 -unused float -power std -terminate float LAN_IDE_CP.ngd >log.txt
|
||||
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs %1 -pterms %2 -unused float -power std -terminate float LAN_IDE_CP.ngd >log.txt
|
||||
@IF %ERRORLEVEL% NEQ 0 GOTO NO_SUCCESS
|
||||
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga >>log.txt
|
||||
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||
|
||||
+3115
-2467
File diff suppressed because it is too large
Load Diff
@@ -3,7 +3,7 @@
|
||||
<!--The data in this file is primarily intended for consumption by Xilinx tools.
|
||||
The structure and the elements are likely to change over the next few releases.
|
||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||
<application name="pn" timeStamp="Thu Feb 21 14:44:45 2019">
|
||||
<application name="pn" timeStamp="Thu Feb 21 23:37:50 2019">
|
||||
<section name="Project Information" visible="false">
|
||||
<property name="ProjectID" value="A2E624B6ED1449CD92F77DE849BF7B51" type="project"/>
|
||||
<property name="ProjectIteration" value="0" type="project"/>
|
||||
@@ -18,8 +18,7 @@ This means code written to parse this file will need to be revisited each subseq
|
||||
<property name="PROP_ManualCompileOrderImp" value="false" type="design"/>
|
||||
<property name="PROP_PropSpecInProjFile" value="Store all values" type="design"/>
|
||||
<property name="PROP_Simulator" value="ISim (VHDL/Verilog)" type="design"/>
|
||||
<property name="PROP_SynthFsmEncode" value="Compact" type="process"/>
|
||||
<property name="PROP_SynthOpt" value="Area" type="process"/>
|
||||
<property name="PROP_SynthFsmEncode" value="One-Hot" type="process"/>
|
||||
<property name="PROP_SynthTopFile" value="changed" type="process"/>
|
||||
<property name="PROP_Top_Level_Module_Type" value="HDL" type="design"/>
|
||||
<property name="PROP_UseSmartGuide" value="false" type="design"/>
|
||||
|
||||
Binary file not shown.
Reference in New Issue
Block a user