Switched Driver to baxnet-structure
This commit is contained in:
@@ -3,14 +3,14 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
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--> Parameter TMPDIR set to xst/projnav.tmp
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Total REAL time to Xst completion: 1.00 secs
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Total CPU time to Xst completion: 0.19 secs
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Total REAL time to Xst completion: 0.00 secs
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Total CPU time to Xst completion: 0.20 secs
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--> Parameter xsthdpdir set to xst
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Total REAL time to Xst completion: 1.00 secs
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Total CPU time to Xst completion: 0.19 secs
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Total REAL time to Xst completion: 0.00 secs
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Total CPU time to Xst completion: 0.20 secs
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--> Reading design: LAN_IDE_CP.prj
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@@ -132,31 +132,31 @@ WARNING:Xst - You have specified state <nop> as a recovery-only state for the sa
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Found 1-bit tristate buffer for signal <DTACK>.
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Found 1-bit tristate buffer for signal <INT_OUT>.
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Found 4-bit tristate buffer for signal <LAN_CFG>.
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Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 143.
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Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 146.
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Found 2-bit register for signal <AUTO_CONFIG_DONE>.
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Found 2-bit register for signal <AUTO_CONFIG_DONE_CYCLE>.
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Found 2-bit adder for signal <AUTO_CONFIG_DONE_CYCLE$addsub0000> created at line 405.
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Found 2-bit adder for signal <AUTO_CONFIG_DONE_CYCLE$addsub0000> created at line 413.
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Found 1-bit register for signal <autoconfig>.
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Found 1-bit register for signal <cp>.
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Found 8-bit comparator equal for signal <cp$cmp_eq0001> created at line 211.
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Found 8-bit comparator equal for signal <cp$cmp_eq0002> created at line 216.
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Found 2-bit comparator less for signal <cp$cmp_lt0000> created at line 210.
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Found 8-bit comparator equal for signal <cp$cmp_eq0001> created at line 216.
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Found 8-bit comparator equal for signal <cp$cmp_eq0002> created at line 222.
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Found 2-bit comparator less for signal <cp$cmp_lt0000> created at line 215.
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Found 8-bit register for signal <CP_BASEADR>.
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Found 1-bit register for signal <CP_RD_S>.
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Found 1-bit register for signal <CP_WE_QUIRK>.
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Found 1-bit register for signal <CP_WE_S>.
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Found 4-bit register for signal <Dout1>.
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Found 3-bit comparator less for signal <Dout1$cmp_lt0000> created at line 327.
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Found 3-bit comparator less for signal <Dout1$cmp_lt0000> created at line 335.
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Found 1-bit register for signal <DS_D>.
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Found 1-bit register for signal <ide>.
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Found 8-bit comparator equal for signal <ide$cmp_eq0000> created at line 218.
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Found 8-bit comparator equal for signal <ide$cmp_eq0000> created at line 225.
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Found 8-bit register for signal <IDE_BASEADR>.
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Found 1-bit register for signal <IDE_ENABLE>.
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Found 1-bit register for signal <IDE_R_S>.
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Found 1-bit register for signal <IDE_W_S>.
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Found 1-bit register for signal <lan_adr>.
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Found 1-bit register for signal <lan_adr_sw>.
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Found 2-bit comparator less for signal <lan_adr_sw$cmp_lt0000> created at line 213.
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Found 2-bit comparator less for signal <lan_adr_sw$cmp_lt0000> created at line 218.
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Found 8-bit register for signal <LAN_BASEADR>.
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Found 1-bit register for signal <LAN_CS_RST>.
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Found 1-bit register for signal <LAN_INT_ENABLE>.
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@@ -166,11 +166,12 @@ WARNING:Xst - You have specified state <nop> as a recovery-only state for the sa
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Found 1-bit register for signal <LAN_WR_RST>.
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Found 1-bit register for signal <LAN_WRH_S>.
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Found 1-bit register for signal <LAN_WRL_S>.
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Found 1-bit register for signal <lancp>.
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Found 1-bit register for signal <ROM_OE_S>.
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Found 3-bit register for signal <SHUT_UP>.
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Summary:
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inferred 1 Finite State Machine(s).
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inferred 17 D-type flip-flop(s).
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inferred 18 D-type flip-flop(s).
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inferred 1 Adder/Subtractor(s).
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inferred 6 Comparator(s).
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inferred 1 Xor(s).
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@@ -184,8 +185,8 @@ HDL Synthesis Report
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Macro Statistics
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# Adders/Subtractors : 1
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2-bit adder : 1
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# Registers : 30
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1-bit register : 24
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# Registers : 31
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1-bit register : 25
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2-bit register : 2
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4-bit register : 1
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8-bit register : 3
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@@ -227,8 +228,8 @@ Macro Statistics
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# FSMs : 1
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# Adders/Subtractors : 1
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2-bit adder : 1
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# Registers : 17
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Flip-Flops : 17
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# Registers : 18
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Flip-Flops : 18
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# Comparators : 3
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8-bit comparator equal : 3
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@@ -273,19 +274,19 @@ Design Statistics
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# IOs : 116
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Cell Usage :
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# BELS : 659
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# AND2 : 224
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# AND3 : 16
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# AND4 : 2
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# BELS : 645
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# AND2 : 220
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# AND3 : 13
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# AND4 : 3
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# GND : 1
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# INV : 214
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# OR2 : 158
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# INV : 207
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# OR2 : 157
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# OR3 : 17
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# OR4 : 1
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# XOR2 : 26
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# FlipFlops/Latches : 59
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# FlipFlops/Latches : 60
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# FD : 11
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# FDC : 5
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# FDC : 6
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# FDCE : 6
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# FDP : 4
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# FDPE : 33
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@@ -298,11 +299,11 @@ Cell Usage :
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Total REAL time to Xst completion: 9.00 secs
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Total CPU time to Xst completion: 8.40 secs
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Total CPU time to Xst completion: 8.59 secs
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-->
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Total memory usage is 340316 kilobytes
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Total memory usage is 4534760 kilobytes
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Number of errors : 0 ( 0 filtered)
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Number of warnings : 8 ( 0 filtered)
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