Update in Firmware (pure Z2-AC but LAN becomes Z3) and new pcb
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@@ -3,7 +3,7 @@
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<!--The data in this file is primarily intended for consumption by Xilinx tools.
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The structure and the elements are likely to change over the next few releases.
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This means code written to parse this file will need to be revisited each subsequent release.-->
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<application name="pn" timeStamp="Thu Jan 03 00:08:47 2019">
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<application name="pn" timeStamp="Tue Feb 19 22:46:04 2019">
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<section name="Project Information" visible="false">
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<property name="ProjectID" value="A2E624B6ED1449CD92F77DE849BF7B51" type="project"/>
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<property name="ProjectIteration" value="0" type="project"/>
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