Improved clock startup and IDE-ROM-timing
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@@ -110,6 +110,8 @@ architecture Behavioral of LAN_IDE_CP is
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signal CP_BASEADR:STD_LOGIC_VECTOR(7 downto 0);
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signal IDE_ENABLE:STD_LOGIC;
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signal ROM_OE_S:STD_LOGIC;
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signal ROM_OE_D0:STD_LOGIC;
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signal IDE_TERM:STD_LOGIC;
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signal IDE_R_S:STD_LOGIC;
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signal IDE_W_S:STD_LOGIC;
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signal DTACK_S:STD_LOGIC;
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@@ -118,7 +120,7 @@ architecture Behavioral of LAN_IDE_CP is
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signal DECODE_RESET: std_logic;
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signal LAN_INT_D0: std_logic;
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signal DS: std_logic;
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signal DS_D: std_logic;
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signal DS_D: std_logic;
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signal LAN_RD_S: std_logic;
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signal LAN_WRH_S: std_logic;
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signal LAN_WRL_S: std_logic;
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@@ -152,8 +154,12 @@ begin
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clock_init: process(CLK_EXT)
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begin
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if(rising_edge(CLK_EXT))then
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if(reset = '0')then
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--init the clock!
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if(reset = '0' )then
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LAN_RST_SM <= nop;
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LAN_CS_RST<='0';
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LAN_WR_RST<='0';
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else
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--init the clock afer reset finished!
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case LAN_RST_SM is
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when nop=>
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LAN_CS_RST<='0';
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@@ -183,29 +189,25 @@ begin
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LAN_CS_RST<='1';
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LAN_WR_RST<='0';
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LAN_RST_SM<=done;
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when done=>
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when done=> --stay here
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LAN_CS_RST<='0';
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LAN_WR_RST<='0';
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LAN_RST_SM<=done;
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end case;
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else
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LAN_CS_RST<='0';
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LAN_WR_RST<='0';
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LAN_RST_SM<=nop;
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end if;
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end if;
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end process clock_init;
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ADDRESS_DECODE: process(DECODE_RESET,AS)
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ADDRESS_DECODE: process(reset,AMIGA_CLK)
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begin
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if(DECODE_RESET ='0')then
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if(reset ='0')then
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autoconfig <= '0';
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ide <= '0';
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lan_adr <= '0';
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lan_adr_sw <= '0';
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cp <= '0';
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lancp <= '0';
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elsif(falling_edge(AS))then
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elsif(rising_edge(AMIGA_CLK))then
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--default values
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autoconfig <= '0';
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ide <= '0';
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@@ -255,11 +257,15 @@ begin
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end process lan_int_proc;
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--lan signal generation: all Signals are HIGH active!
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lan_rw_gen: process (AMIGA_CLK)
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lan_rw_gen: process (AMIGA_CLK,AS)
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begin
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if falling_edge(AMIGA_CLK) then
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if(AS ='1') then
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LAN_RD_S <= '0';
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LAN_WRH_S <= '0';
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LAN_WRL_S <= '0';
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elsif falling_edge(AMIGA_CLK) then
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--default values
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LAN_RD_S <= '0';
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LAN_RD_S <= '0';
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LAN_WRH_S <= '0';
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LAN_WRL_S <= '0';
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@@ -273,9 +279,13 @@ begin
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end process lan_rw_gen;
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--cp signal generation
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cp_rw_gen: process (AMIGA_CLK)
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cp_rw_gen: process (AMIGA_CLK,AS)
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begin
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if falling_edge(AMIGA_CLK) then
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if (AS = '1') then
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CP_WE_QUIRK <= '1';
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CP_WE_S <= '1';
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CP_RD_S <= '1';
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elsif falling_edge(AMIGA_CLK) then
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--default values
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CP_RD_S <= '1';
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CP_WE_S <= '1';
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@@ -288,27 +298,55 @@ begin
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end process cp_rw_gen;
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--ide signal generation
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ide_rw_gen: process (reset,AMIGA_CLK)
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ide_enable_gen: process (reset,AMIGA_CLK)
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begin
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if (reset = '0') then
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IDE_ENABLE <= '1';
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elsif falling_edge(AMIGA_CLK) then
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if(ide='1' and AS='0' and RW='0')then
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IDE_ENABLE <= '0'; -- enable IDE on first write
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end if;
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end if;
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end process ide_enable_gen;
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ide_rw_gen: process (AS,AMIGA_CLK)
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begin
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if (AS = '1') then
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IDE_R_S <= '1';
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IDE_W_S <= '1';
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ROM_OE_S <= '1';
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ROM_OE_S <= '1';
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ROM_OE_D0 <= '1';
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IDE_TERM <= '1';
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elsif falling_edge(AMIGA_CLK) then
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--default values
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IDE_R_S <= '1';
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IDE_W_S <= '1';
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ROM_OE_S <= '1';
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if(ide='1' and AS='0')then
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if(ide='1')then
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if(RW='0')then
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--the write goes to the hdd!
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IDE_ENABLE <= '0'; -- enable IDE on first read
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IDE_W_S <= '0';
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IDE_R_S <= '1';
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ROM_OE_S <= '1';
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ROM_OE_D0 <= '1';
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IDE_TERM <= not IDE_WAIT or IDE_W_S;
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elsif(IDE_ENABLE ='1')then
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IDE_W_S <= '1';
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IDE_R_S <= '1';
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ROM_OE_S <= '0'; --read from ROM instead from IDE
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ROM_OE_D0 <= ROM_OE_S;
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IDE_TERM <= '0';
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else
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IDE_R_S <= IDE_ENABLE; --read from IDE instead from ROM
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ROM_OE_S <= not IDE_ENABLE;
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IDE_W_S <= '1';
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IDE_R_S <= '0'; --read from IDE instead from ROM
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ROM_OE_S <= '1';
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ROM_OE_D0 <= '1';
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IDE_TERM <= not IDE_WAIT or IDE_R_S;
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end if;
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else
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--default values
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IDE_R_S <= '1';
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IDE_W_S <= '1';
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ROM_OE_S <= '1';
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ROM_OE_D0 <= '1';
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IDE_TERM <= '1';
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end if;
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end if;
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end process ide_rw_gen;
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@@ -337,7 +375,7 @@ begin
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if(AUTO_CONFIG_DONE < 2)then
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Dout1 <= "1100" ; --ZII, No-System-Memory, no ROM
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else
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Dout1 <= "1101" ; --ZII, no System-Memory, (perhaps)ROM
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Dout1 <= "1101" ; --ZII, no System-Memory, ROM
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end if;
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when "000001" => Dout1 <= "0001" ; --one Card, 64KB =001
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when "000010" =>
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@@ -402,7 +440,7 @@ begin
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elsif(AUTO_CONFIG_DONE = 1)then
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CP_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress
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SHUT_UP(1) <= '0'; --enable board
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AUTO_CONFIG_DONE_CYCLE <= '1' & AUTOBOOT_OFF; --done here, if Autoboot = 1 skip ide part!
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AUTO_CONFIG_DONE_CYCLE <= ('1' & not(AUTOBOOT_OFF)); --done here, if Autoboot = 1 skip ide part!
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elsif(AUTO_CONFIG_DONE = 2)then
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IDE_BASEADR(7 downto 0) <= D(15 downto 8); --Base adress
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SHUT_UP(2) <= '0'; --enable board
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@@ -431,16 +469,10 @@ begin
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CP_CS <= not cp;
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--the lanport is shifted by one adress line but I forgot to adopt the clockport address!
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A_LAN(13 downto 6)<= LAN_A_CLRREG(13 downto 6) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
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LAN_A_SETREG(13 downto 6) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
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--(A(14)&A(12)&A(13)&A(11 downto 7)); --swap A12/13 for the enj-Chip
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A(14 downto 7);
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A_LAN(5 downto 2) <= LAN_A_CLRREG(5 downto 2) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
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LAN_A_SETREG(5 downto 2) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
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A(5 downto 2) when cp='1' else A(6 downto 3); --mux the clock-port adresses!
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A_LAN(1 downto 0)<= LAN_A_CLRREG(1 downto 0) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
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LAN_A_SETREG(1 downto 0) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
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A(2 downto 1);
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A_LAN(13 downto 0)<= LAN_A_CLRREG(13 downto 0) when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
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LAN_A_SETREG(13 downto 0) when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
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A(14 downto 1) when lan_adr ='1' else
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A(12 downto 1) &"00";
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@@ -448,16 +480,16 @@ begin
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D <= --RAM_D when RW='1' and TRANSFER_IN_PROGRES ='1' else
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DQ when RW='1' and lan_adr ='1' and lan_adr_sw ='0' and AS='0' else
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DQ(7 downto 0)&DQ(15 downto 8) when RW='1' and lan_adr ='1' and lan_adr_sw ='1' and AS='0' else
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DQ(7 downto 0)&DQ(7 downto 0) when RW='1' and cp = '1' and AS='0' else
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DQ when RW='1' and ide = '1' and AS='0' else
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Dout1 & x"FFF" when RW='1' and autoconfig ='1' and AS='0' else
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DQ(7 downto 0)&DQ(7 downto 0) when RW='1' and (cp = '1' or ROM_OE_S ='0') and AS='0' else
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DQ when RW='1' and ide = '1' and ROM_OE_S ='1' and AS='0' else
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Dout1 & x"FFF" when RW='1' and autoconfig ='1' and AS='0' else
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(others => 'Z');
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--defined lancp signal that matches both LAN and CP addresses (and IDE for Rev2 boards)
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DQ <= LAN_D_CLR when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
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LAN_D_SET when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
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D( 7 downto 0) & D( 7 downto 0) when RW='0' and AS='0' and lancp = '1' and LDS='0' and UDS='1' else
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D(15 downto 8) & D(15 downto 8) when RW='0' and AS='0' and lancp = '1' and LDS='1' and UDS='0' else
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--D( 7 downto 0) & D( 7 downto 0) when RW='0' and AS='0' and lancp = '1' and LDS='0' and UDS='1' else
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--D(15 downto 8) & D(15 downto 8) when RW='0' and AS='0' and lancp = '1' and LDS='1' and UDS='0' else
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D( 7 downto 0) & D(15 downto 8) when RW='0' and AS='0' and lan_adr ='1' and lan_adr_sw ='1' else
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D when RW='0' and AS='0' and lancp ='1'
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else (others => 'Z');
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@@ -468,7 +500,7 @@ begin
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IDE_CS(1)<= not(A(13));
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IDE_A(2 downto 0) <= A(11 downto 9);
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ROM_B <= "00";
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ROM_OE <= ROM_OE_S when AS='0' and AUTOBOOT_OFF = '0' else '1';
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ROM_OE <= ROM_OE_S when AS='0' else '1';
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-- INT_OUT <= 'Z';
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INT2_OUT <= '0' when
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@@ -484,15 +516,11 @@ begin
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SLAVE <= '0' when AS='0' and (autoconfig = '1' or ide = '1' or lan_adr = '1' or cp = '1') else '1';
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CFOUT <= '0' when AUTO_CONFIG_DONE=3 else '1';
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-- OVR <= 'Z';
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--OVR <= 'Z';
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OVR <= '0' when ide='1' and AS='0' else 'Z';
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-- DTACK <= DTACK_S when --TRANSFER_IN_PROGRES ='1' or
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-- AUTOCONFIG_IN_PROGRES ='1'
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-- else 'Z';
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DTACK <= '0' when ide='1' and AS='0' and IDE_WAIT='1' else 'Z';
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-- DTACK <= 'Z';
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DTACK <= IDE_TERM when ide='1' and AS='0' else 'Z';
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--DTACK <= 'Z';
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A <= (others => 'Z');
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MTACK <= 'Z';
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