CP and LAN working! Clockport needed to be stopped if FCS='1'

This commit is contained in:
MHeinrichs
2019-03-07 23:53:52 +01:00
parent 943507175a
commit 7936ad431b
161 changed files with 45433 additions and 43327 deletions
+10
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@@ -2,3 +2,13 @@ xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/L
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr"
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
XSLTProcess LAN_IDE_CP_build.xml
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
+75 -75
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@@ -57,7 +57,6 @@ CP_CS S:PIN34
CP_RD S:PIN71
CP_WE S:PIN70
DQ<0> S:PIN118
DQ<10> S:PIN129
DQ<11> S:PIN115
DQ<12> S:PIN130
DQ<13> S:PIN113
@@ -65,13 +64,6 @@ DQ<14> S:PIN131
DQ<15> S:PIN112
DQ<1> S:PIN117
DQ<2> S:PIN120
DQ<3> S:PIN119
DQ<4> S:PIN124
DQ<5> S:PIN121
DQ<6> S:PIN126
DQ<7> S:PIN125
DQ<8> S:PIN128
DQ<9> S:PIN116
D<0> S:PIN2
D<10> S:PIN41
D<11> S:PIN43
@@ -113,85 +105,93 @@ INT2_OUT S:PIN32
DTACK S:PIN85
ROM_OE S:PIN35
SLAVE S:PIN106
DQ<8> S:PIN128
DQ<4> S:PIN124
DQ<10> S:PIN129
DQ<7> S:PIN125
DQ<6> S:PIN126
DQ<5> S:PIN121
DQ<3> S:PIN119
DQ<9> S:PIN116
;The remaining section of the .gyd file is for documentation purposes only.
;It shows where your internal equations were placed in the last successful fit.
PARTITION FB1_2 D_and0000/D_and0000_D2 $OpTx$FX_DC$172 $OpTx$FX_DC$141 D_5_IOBUFE
D_4_IOBUFE $OpTx$FX_DC$127 IDE_CS_0_OBUF LAN_WRL_S
IDE_CS_1_OBUF LAN_WRH_S IDE_A_0_OBUF$BUF0 LAN_RD_S
IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0 CP_WE_S IDE_R_OBUF
CP_RD_S
PARTITION FB2_2 A_LAN_4_OBUF A_LAN_7_OBUF
PARTITION FB1_1 ROM_OE_S LAN_RST_SM_FSM_FFd3 LAN_RST_SM_FSM_FFd2 LAN_RST_SM_FSM_FFd1
D_5_IOBUFE D_4_IOBUFE LAN_CS_RST IDE_CS_0_OBUF
IDE_W_S IDE_CS_1_OBUF IDE_ENABLE IDE_A_0_OBUF$BUF0
DS_D IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0 CP_WE_S
IDE_R_OBUF DQ<7>_BUFR.MC
PARTITION FB2_1 DQ<10>_BUFR.MC A_LAN_4_OBUF A_LAN_7_OBUF
PARTITION FB2_5 A_LAN_6_OBUF ROM_B_0_OBUF$BUF6
PARTITION FB2_8 ROM_B_0_OBUF$BUF5
PARTITION FB2_10 D_6_IOBUFE
PARTITION FB2_12 D_3_IOBUFE
PARTITION FB2_14 D_7_IOBUFE D_1_IOBUFE $OpTx$FX_SC$167 D_8_IOBUFE
$OpTx$FX_DC$152
PARTITION FB3_2 IDE_W_OBUF
PARTITION FB3_7 DQ_and0001/DQ_and0001_D2 DQ_and0000/DQ_and0000_D2 $OpTx$FX_DC$126 LAN_BASEADR<5>
LAN_BASEADR<4> LAN_BASEADR<3> LAN_BASEADR<1> ROM_B_0_OBUF$BUF8
CP_BASEADR<5> CP_BASEADR<3> CP_BASEADR<1> CP_BASEADR<0>
PARTITION FB4_1 Dout1<1> D_0_IOBUFE
PARTITION FB2_12 D_3_IOBUFE $OpTx$INV$87__$INT D_7_IOBUFE D_1_IOBUFE
DQ_9_IOBUFE/DQ_9_IOBUFE_TRST D_8_IOBUFE EXP30_
PARTITION FB3_1 EXP31_ IDE_W_OBUF EXP32_ EXP33_
EXP34_ BUF_cp EXP35_
PARTITION FB3_10 EXP36_ EXP37_ lancp EXP38_
ROM_B_0_OBUF$BUF8 autoconfig CP_WE_QUIRK EXP39_
ide
PARTITION FB4_2 D_0_IOBUFE
PARTITION FB4_5 A_LAN_1_OBUF A_LAN_0_OBUF
PARTITION FB4_8 A_LAN_3_OBUF
PARTITION FB4_12 A_LAN_2_OBUF
PARTITION FB4_14 A_LAN_5_OBUF $OpTx$FX_DC$195 Dout1<2> EXP22_
EXP23_
PARTITION FB5_2 CP_CS_OBUF
PARTITION FB5_5 ROM_OE_OBUF
PARTITION FB5_10 D_2_IOBUFE $OpTx$FX_DC$154 D_9_IOBUFE lan_adr
D_10_IOBUFE D_11_IOBUFE ide D_12_IOBUFE
lancp
PARTITION FB6_2 LAN_CFG_2_OBUF A_LAN_12_OBUF
PARTITION FB4_14 A_LAN_5_OBUF SHUT_UP<0> LAN_BASEADR<1> IDE_BASEADR<1>
CP_BASEADR<1>
PARTITION FB5_1 EXP40_ CP_CS_OBUF EXP41_ EXP42_
ROM_OE_OBUF
PARTITION FB5_10 D_2_IOBUFE
PARTITION FB5_12 D_9_IOBUFE
PARTITION FB5_14 D_10_IOBUFE D_11_IOBUFE EXP43_ D_12_IOBUFE
EXP44_
PARTITION FB6_1 EXP45_ LAN_CFG_2_OBUF A_LAN_12_OBUF
PARTITION FB6_5 A_LAN_13_OBUF A_LAN_10_OBUF
PARTITION FB6_8 A_LAN_11_OBUF
PARTITION FB6_10 A_LAN_8_OBUF
PARTITION FB6_13 cp_and0000/cp_and0000_D2 A_LAN_9_OBUF A_LAN_9_or0001/A_LAN_9_or0001_D2 $OpTx$FX_DC$137
autoconfig lan_adr_sw
PARTITION FB7_3 D_13_IOBUFE
PARTITION FB7_5 D_14_IOBUFE
PARTITION FB7_8 $OpTx$FX_DC$174 $OpTx$FX_DC$160 ROM_OE_S IDE_W_S
D_15_IOBUFE IDE_R_S IDE_ENABLE D_9_IOBUFE/D_9_IOBUFE_TRST
DS_D AUTO_CONFIG_DONE<1> AUTO_CONFIG_DONE<0>
PARTITION FB8_2 DQ_12_IOBUFE DQ_14_IOBUFE
PARTITION FB8_5 LAN_WRH_OBUF
PARTITION FB8_8 LAN_CS_OBUF
PARTITION FB8_10 LAN_RD_OBUF
PARTITION FB8_14 LAN_IRQ_D0 LAN_INT_ENABLE CP_BASEADR<6> CP_BASEADR<4>
LAN_IRQ_OUT
PARTITION FB9_1 cp_and0001/cp_and0001_D2 EXP24_
PARTITION FB9_17 SHUT_UP<2>/SHUT_UP<2>_CLKF EXP25_
PARTITION FB10_2 DQ_1_IOBUFE DQ_0_IOBUFE
PARTITION FB10_5 DQ_3_IOBUFE DQ_2_IOBUFE
PARTITION FB10_8 DQ_5_IOBUFE
PARTITION FB10_10 DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE
PARTITION FB10_14 DQ_8_IOBUFE
PARTITION FB10_16 $OpTx$FX_DC$129 DQ_10_IOBUFE DQ_9_IOBUFE/DQ_9_IOBUFE_TRST
PARTITION FB11_10 CP_WE_QUIRK $OpTx$FX_DC$180 ROM_B_0_OBUF$BUF7 $OpTx$FX_DC$159
ROM_B_0_OBUF $OpTx$FX_DC$153 LAN_BASEADR<2> CP_WE_OBUF
CP_BASEADR<2>
PARTITION FB12_2 ROM_B_0_OBUF$BUF4
PARTITION FB12_5 DQ_15_IOBUFE
PARTITION FB12_8 DQ_13_IOBUFE lancp/lancp_RSTF DQ_11_IOBUFE SHUT_UP<2>
DQ_9_IOBUFE IDE_BASEADR<7> IDE_BASEADR<5> IDE_BASEADR<4>
IDE_BASEADR<3> IDE_BASEADR<2> IDE_BASEADR<1>
PARTITION FB13_2 CP_RD_OBUF
PARTITION FB13_5 SHUT_UP<0> LAN_WR_RST LAN_RST_SM_FSM_FFd3 LAN_RST_SM_FSM_FFd1
LAN_RST_SM_FSM_FFd2 LAN_CS_RST LAN_BASEADR<7> LAN_BASEADR<6>
LAN_BASEADR<0> LAN_WRL_OBUF ROM_B_0_OBUF$BUF0 IDE_BASEADR<6>
IDE_BASEADR<0> CP_BASEADR<7>
PARTITION FB14_1 EXP26_ Dout1<0> ROM_B_0_OBUF$BUF2
PARTITION FB14_9 $OpTx$FX_DC$158 $OpTx$FX_DC$157 CFOUT_OBUF $OpTx$FX_DC$156
AUTO_CONFIG_DONE_CYCLE<0> SLAVE_OBUF ROM_B_0_OBUF$BUF1 AUTO_CONFIG_DONE_CYCLE<1>
EXP27_ Dout1<3>
PARTITION FB15_1 $OpTx$FX_DC$206 EXP28_
PARTITION FB15_12 ROM_B_0_OBUF$BUF9
PARTITION FB15_17 SHUT_UP<1> EXP29_
PARTITION FB16_10 ROM_B_0_OBUF$BUF3
PARTITION FB16_15 EXP30_ EXP31_ cp_and0002/cp_and0002_D2 EXP32_
PARTITION FB6_10 A_LAN_8_OBUF EXP46_ lan_adr EXP47_
A_LAN_9_OBUF EXP48_ EXP49_ lan_adr_sw
EXP50_
PARTITION FB7_1 Dout1<1> EXP51_ D_13_IOBUFE EXP52_
D_14_IOBUFE EXP53_ EXP54_ EXP55_
Dout1<2> EXP56_ EXP57_ D_15_IOBUFE
EXP58_ EXP59_ Dout1<0> EXP60_
EXP61_ EXP62_
PARTITION FB8_1 EXP63_ DQ_12_IOBUFE DQ_14_IOBUFE EXP64_
LAN_WRH_OBUF DQ<6>_BUFR.MC EXP65_ LAN_CS_OBUF
EXP66_ LAN_RD_OBUF LAN_INT_ENABLE EXP67_
EXP68_ DQ<9>_BUFR.MC DQ<4>_BUFR.MC EXP69_
LAN_RD_S EXP70_
PARTITION FB9_1 EXP71_ $OpTx$FX_DC$144 EXP72_ EXP73_
PARTITION FB9_15 EXP74_ EXP75_ $OpTx$FX_DC$145 EXP76_
PARTITION FB10_1 EXP77_ DQ_1_IOBUFE DQ_0_IOBUFE EXP78_
_24_ DQ_2_IOBUFE EXP79_ _23_
EXP80_ _19_ _21_ _22_
PARTITION FB10_14 _18_ DQ<8>_BUFR.MC EXP81_ _20_
EXP82_
PARTITION FB11_8 SHUT_UP<1> LAN_BASEADR<7> LAN_BASEADR<6> LAN_BASEADR<5>
ROM_B_0_OBUF$BUF7 IDE_BASEADR<7> ROM_B_0_OBUF IDE_BASEADR<6>
CP_BASEADR<7> CP_WE_OBUF CP_BASEADR<6>
PARTITION FB12_1 EXP83_ ROM_B_0_OBUF$BUF4 EXP84_ EXP85_
DQ_15_IOBUFE LAN_WRL_S EXP86_ DQ_13_IOBUFE
LAN_WRH_S DQ_11_IOBUFE EXP87_ _25_
IDE_R_S LAN_IRQ_OUT CP_RD_S DQ<3>_BUFR.MC
EXP88_ DQ<5>_BUFR.MC
PARTITION FB13_2 CP_RD_OBUF
PARTITION FB13_9 LAN_BASEADR<4> LAN_BASEADR<3> IDE_BASEADR<5> IDE_BASEADR<4>
IDE_BASEADR<3> LAN_WRL_OBUF ROM_B_0_OBUF$BUF0 CP_BASEADR<5>
CP_BASEADR<4> CP_BASEADR<3>
PARTITION FB14_1 AUTO_CONFIG_DONE_CYCLE<0> EXP89_ ROM_B_0_OBUF$BUF2
PARTITION FB14_6 AUTO_CONFIG_DONE<1> AUTO_CONFIG_DONE<0> LAN_BASEADR<2> LAN_BASEADR<0>
IDE_BASEADR<2> CFOUT_OBUF IDE_BASEADR<0> CP_BASEADR<2>
SLAVE_OBUF ROM_B_0_OBUF$BUF1 CP_BASEADR<0> EXP90_
AUTO_CONFIG_DONE_CYCLE<1>
PARTITION FB15_1 Dout1<3> EXP91_
PARTITION FB15_12 ROM_B_0_OBUF$BUF9 lancp/lancp_RSTF__$INT LAN_WR_RST SHUT_UP<2>/SHUT_UP<2>_CLKF
LAN_IRQ_D0 SHUT_UP<2> EXP92_
PARTITION FB16_10 ROM_B_0_OBUF$BUF3
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+1 -1
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@@ -1,7 +1,7 @@
Release 8.1i - Fit P.20131013
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
2-21-2019 1:44PM
3- 2-2019 7:56PM
NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
File diff suppressed because it is too large Load Diff
+33 -33
View File
@@ -3,14 +3,14 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
--> Parameter TMPDIR set to xst/projnav.tmp
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.14 secs
Total REAL time to Xst completion: 1.00 secs
Total CPU time to Xst completion: 0.13 secs
--> Parameter xsthdpdir set to xst
Total REAL time to Xst completion: 0.00 secs
Total CPU time to Xst completion: 0.14 secs
Total REAL time to Xst completion: 1.00 secs
Total CPU time to Xst completion: 0.13 secs
--> Reading design: LAN_IDE_CP.prj
@@ -43,7 +43,7 @@ Target Device : XC9500XL CPLDs
---- Source Options
Top Module Name : LAN_IDE_CP
Automatic FSM Extraction : YES
FSM Encoding Algorithm : Compact
FSM Encoding Algorithm : Gray
Safe Implementation : No
Mux Extraction : Yes
Resource Sharing : YES
@@ -56,7 +56,7 @@ Equivalent register Removal : YES
---- General Options
Optimization Goal : Speed
Optimization Effort : 1
Optimization Effort : 2
Keep Hierarchy : Yes
Netlist Hierarchy : As_Optimized
RTL Output : Yes
@@ -71,26 +71,25 @@ wysiwyg : NO
=========================================================================
Setting FSM Encoding Algorithm to : OPT
Setting FSM Encoding Algorithm to : Gray
=========================================================================
* HDL Compilation *
=========================================================================
Compiling vhdl file "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd" in Library work.
Entity <LAN_IDE_CP> compiled.
Entity <LAN_IDE_CP> (Architecture <Behavioral>) compiled.
Architecture behavioral of Entity lan_ide_cp is up to date.
=========================================================================
* Design Hierarchy Analysis *
=========================================================================
Analyzing hierarchy for entity <LAN_IDE_CP> in library <work> (architecture <Behavioral>).
Analyzing hierarchy for entity <LAN_IDE_CP> in library <work> (architecture <behavioral>).
=========================================================================
* HDL Analysis *
=========================================================================
Analyzing Entity <LAN_IDE_CP> in library <work> (Architecture <Behavioral>).
Analyzing Entity <LAN_IDE_CP> in library <work> (Architecture <behavioral>).
Entity <LAN_IDE_CP> analyzed. Unit <LAN_IDE_CP> generated.
@@ -121,7 +120,7 @@ WARNING:Xst:1780 - Signal <DTACK_S> is never used or assigned. This unconnected
| Reset type | synchronous |
| Reset State | nop |
| Power Up State | nop |
| Encoding | compact |
| Encoding | gray |
| Implementation | automatic |
-----------------------------------------------------------------------
Found 16-bit tristate buffer for signal <D>.
@@ -206,18 +205,18 @@ Macro Statistics
* Advanced HDL Synthesis *
=========================================================================
Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with compact encoding.
Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with gray encoding.
------------------------
State | Encoding
------------------------
nop | 000
wait0 | 100
clr | 101
clr_commit | 111
wait1 | 001
set | 011
set_commit | 010
done | 110
wait0 | 001
clr | 011
clr_commit | 010
wait1 | 110
set | 111
set_commit | 101
done | 100
------------------------
=========================================================================
@@ -273,19 +272,20 @@ Design Statistics
# IOs : 117
Cell Usage :
# BELS : 964
# AND2 : 222
# AND3 : 78
# AND4 : 12
# AND5 : 5
# BELS : 904
# AND2 : 207
# AND3 : 75
# AND4 : 9
# AND5 : 2
# AND6 : 1
# AND8 : 4
# AND8 : 3
# GND : 1
# INV : 407
# OR2 : 196
# OR3 : 9
# INV : 374
# OR2 : 182
# OR3 : 20
# OR4 : 2
# VCC : 1
# XOR2 : 28
# XOR2 : 27
# FlipFlops/Latches : 60
# FD : 11
# FDC : 6
@@ -300,12 +300,12 @@ Cell Usage :
=========================================================================
Total REAL time to Xst completion: 8.00 secs
Total CPU time to Xst completion: 8.23 secs
Total REAL time to Xst completion: 9.00 secs
Total CPU time to Xst completion: 8.51 secs
-->
Total memory usage is 4534756 kilobytes
Total memory usage is 4534796 kilobytes
Number of errors : 0 ( 0 filtered)
Number of warnings : 7 ( 0 filtered)
+3 -6
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@@ -1,15 +1,12 @@
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_WR_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_WR_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_WR_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_CS_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_CS_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_WR_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_CS_RST.D:400
TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_CS_RST.D:400
+10469 -5387
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<html><head><link type='text/css' href='style.css' rel='stylesheet'></head><body class='pgBgnd'>
<h3 align='center'>Equations</h3>
<table width='90%' align='center' border='1' cellpadding='0' cellspacing='0'>
<tr><td>
</td></tr><tr><td>
********** Mapped Logic **********
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$126 <= (LDS AND UDS);
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$127 <= (lan_adr AND lan_adr_sw);
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$129 <= (RW AND NOT AS);
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$137 <= ((NOT LAN_RST_SM_FSM_FFd1)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3));
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$141 <= (CP_CS AND NOT $OpTx$FX_DC$127);
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$152 <= ((D_and0000/D_and0000_D2)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (ide AND $OpTx$FX_DC$129 AND $OpTx$FX_DC$141));
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$153 <= ((DQ_and0000/DQ_and0000_D2)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT RW AND NOT AS AND $OpTx$FX_DC$127 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT DQ_and0001/DQ_and0001_D2));
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$154 <= ($OpTx$FX_DC$127 AND NOT D_and0000/D_and0000_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$129);
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$156 <= (NOT RW AND NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT A(1) AND NOT AS AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND A(3) AND A(6) AND autoconfig AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DS_D AND NOT $OpTx$FX_DC$126);
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$157 <= (NOT RW AND NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT A(1) AND NOT AS AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND A(3) AND A(6) AND autoconfig AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DS_D AND NOT $OpTx$FX_DC$126);
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$158 <= (NOT RW AND NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT A(1) AND NOT AS AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND A(3) AND A(6) AND autoconfig AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DS_D AND NOT $OpTx$FX_DC$126);
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$159 <= ((NOT DQ_and0000/DQ_and0000_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DQ_and0001/DQ_and0001_D2)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT RW AND NOT AS AND $OpTx$FX_DC$127 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT DQ_and0000/DQ_and0000_D2));
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$160 <= (NOT AS AND autoconfig AND NOT $OpTx$FX_DC$126);
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$172 <= (NOT RW AND lan_adr AND A(15) AND NOT $OpTx$FX_DC$126);
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$174 <= (NOT AS AND RESET);
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$180 <= ((NOT RW AND NOT A(5) AND NOT A(4) AND A(2) AND NOT A(1) AND NOT AS AND A(3) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; A(6) AND autoconfig AND DS_D AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT RW AND NOT A(5) AND NOT A(4) AND NOT A(1) AND NOT AS AND A(3) AND A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; autoconfig AND DS_D AND CFOUT AND NOT $OpTx$FX_DC$126));
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$195 <= (NOT A(4) AND A(2) AND A(1));
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_DC$206 <= ((SHUT_UP(2))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(0) AND NOT A(16))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT IDE_BASEADR(0) AND A(16))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(1) AND NOT A(17))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT IDE_BASEADR(1) AND A(17))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT IDE_BASEADR(2) AND A(18))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (SHUT_UP(1).EXP)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(2) AND NOT A(18))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(3) AND NOT A(19))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT IDE_BASEADR(3) AND A(19))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(6) AND NOT A(22))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT IDE_BASEADR(6) AND A(22))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(4) AND NOT A(20))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT IDE_BASEADR(4) AND A(20))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(5) AND NOT A(21))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT IDE_BASEADR(5) AND A(21)));
</td></tr><tr><td>
</td></tr><tr><td>
$OpTx$FX_SC$167 <= ((NOT D_and0000/D_and0000_D2 AND NOT $OpTx$FX_DC$129)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT ide AND NOT D_and0000/D_and0000_D2 AND $OpTx$FX_DC$141));
</td></tr><tr><td>
FDCPE_AUTO_CONFIG_DONE0: FDCPE port map (AUTO_CONFIG_DONE(0),AUTO_CONFIG_DONE_CYCLE(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT RESET,'0',AS);
</td></tr><tr><td>
FDCPE_AUTO_CONFIG_DONE1: FDCPE port map (AUTO_CONFIG_DONE(1),AUTO_CONFIG_DONE_CYCLE(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT RESET,'0',AS);
</td></tr><tr><td>
FDCPE_AUTO_CONFIG_DONE_CYCLE0: FDCPE port map (AUTO_CONFIG_DONE_CYCLE(0),AUTO_CONFIG_DONE_CYCLE_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT RESET,'0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;AUTO_CONFIG_DONE_CYCLE_D(0) <= ((NOT AUTO_CONFIG_DONE_CYCLE(0) AND NOT $OpTx$FX_DC$180)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(2) AND AUTO_CONFIG_DONE(0) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT AUTO_CONFIG_DONE_CYCLE(0) AND NOT AUTOBOOT_OFF)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT RW AND NOT A(5) AND NOT A(4) AND A(2) AND NOT A(1) AND NOT AS AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; AUTO_CONFIG_DONE_CYCLE(0) AND A(3) AND A(6) AND autoconfig AND DS_D AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT RW AND NOT A(5) AND NOT A(4) AND NOT A(1) AND NOT AS AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND AUTO_CONFIG_DONE_CYCLE(0) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; A(3) AND A(6) AND autoconfig AND DS_D AND NOT AUTOBOOT_OFF AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT $OpTx$FX_DC$126));
</td></tr><tr><td>
FDCPE_AUTO_CONFIG_DONE_CYCLE1: FDCPE port map (AUTO_CONFIG_DONE_CYCLE(1),AUTO_CONFIG_DONE_CYCLE_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT RESET,'0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;AUTO_CONFIG_DONE_CYCLE_D(1) <= ((NOT RW AND NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT A(1) AND NOT AS AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND A(3) AND A(6) AND autoconfig AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; DS_D AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT AUTO_CONFIG_DONE_CYCLE(1) AND NOT $OpTx$FX_DC$180)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(2) AND NOT AUTO_CONFIG_DONE_CYCLE(0) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT AUTO_CONFIG_DONE_CYCLE(1))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(2) AND NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT AUTO_CONFIG_DONE_CYCLE(1))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT RW AND NOT A(5) AND NOT A(4) AND A(2) AND NOT A(1) AND NOT AS AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; AUTO_CONFIG_DONE_CYCLE(0) AND AUTO_CONFIG_DONE_CYCLE(1) AND A(3) AND A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; autoconfig AND DS_D AND NOT $OpTx$FX_DC$126));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(0) <= NOT ((NOT A(1) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(1) <= NOT ((NOT A(2) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(2) <= NOT (((NOT A(2) AND NOT CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(3) AND CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137)));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(3) <= ((A(4) AND CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(3) AND NOT CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(4) <= NOT (((NOT A(5) AND CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(4) AND NOT CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137)));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(5) <= NOT (((NOT A(5) AND NOT CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(6) AND CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137)));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(6) <= ((NOT $OpTx$FX_DC$137)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(7) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(7) <= NOT ((NOT A(8) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(8) <= NOT ((NOT A(9) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(9) <= NOT ((NOT A(10) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(10) <= NOT ((NOT A(11) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(11) <= NOT ((NOT A(12) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(12) <= NOT ((NOT A(13) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN(13) <= NOT ((NOT A(14) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137));
</td></tr><tr><td>
</td></tr><tr><td>
A_LAN_9_or0001/A_LAN_9_or0001_D2 <= ((LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1));
</td></tr><tr><td>
</td></tr><tr><td>
CFOUT <= NOT ((AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0)));
</td></tr><tr><td>
FDCPE_CP_BASEADR0: FDCPE port map (CP_BASEADR(0),CP_BASEADR_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(0) <= ((D(8).PIN AND $OpTx$FX_DC$157)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(0) AND NOT $OpTx$FX_DC$157));
</td></tr><tr><td>
FDCPE_CP_BASEADR1: FDCPE port map (CP_BASEADR(1),CP_BASEADR_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(1) <= ((D(9).PIN AND $OpTx$FX_DC$157)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(1) AND NOT $OpTx$FX_DC$157));
</td></tr><tr><td>
FDCPE_CP_BASEADR2: FDCPE port map (CP_BASEADR(2),CP_BASEADR_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(2) <= ((D(10).PIN AND $OpTx$FX_DC$157)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(2) AND NOT $OpTx$FX_DC$157));
</td></tr><tr><td>
FDCPE_CP_BASEADR3: FDCPE port map (CP_BASEADR(3),CP_BASEADR_D(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(3) <= ((D(11).PIN AND $OpTx$FX_DC$157)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(3) AND NOT $OpTx$FX_DC$157));
</td></tr><tr><td>
FDCPE_CP_BASEADR4: FDCPE port map (CP_BASEADR(4),CP_BASEADR_D(4),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(4) <= ((D(12).PIN AND $OpTx$FX_DC$157)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(4) AND NOT $OpTx$FX_DC$157));
</td></tr><tr><td>
FDCPE_CP_BASEADR5: FDCPE port map (CP_BASEADR(5),CP_BASEADR_D(5),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(5) <= ((D(13).PIN AND $OpTx$FX_DC$157)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(5) AND NOT $OpTx$FX_DC$157));
</td></tr><tr><td>
FDCPE_CP_BASEADR6: FDCPE port map (CP_BASEADR(6),CP_BASEADR_D(6),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(6) <= ((D(14).PIN AND $OpTx$FX_DC$157)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(6) AND NOT $OpTx$FX_DC$157));
</td></tr><tr><td>
FDCPE_CP_BASEADR7: FDCPE port map (CP_BASEADR(7),CP_BASEADR_D(7),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(7) <= ((D(15).PIN AND $OpTx$FX_DC$157)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(7) AND NOT $OpTx$FX_DC$157));
</td></tr><tr><td>
FDCPE_CP_CS: FDCPE port map (CP_CS,CP_CS_D,NOT AS,'0',NOT lancp/lancp_RSTF);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_CS_D <= (cp_and0001/cp_and0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT cp_and0000/cp_and0000_D2 AND NOT cp_and0002/cp_and0002_D2);
</td></tr><tr><td>
</td></tr><tr><td>
CP_RD <= NOT ((NOT AS AND NOT CP_RD_S));
</td></tr><tr><td>
FDCPE_CP_RD_S: FDCPE port map (CP_RD_S,CP_RD_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_RD_S_D <= (RW AND NOT CP_CS AND NOT $OpTx$FX_DC$126);
</td></tr><tr><td>
</td></tr><tr><td>
CP_WE <= NOT ((NOT AS AND NOT CP_WE_S AND CP_WE_QUIRK));
</td></tr><tr><td>
FDCPE_CP_WE_QUIRK: FDCPE port map (CP_WE_QUIRK,CP_WE_S,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
</td></tr><tr><td>
FDCPE_CP_WE_S: FDCPE port map (CP_WE_S,CP_WE_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_WE_S_D <= (NOT RW AND NOT CP_CS AND NOT $OpTx$FX_DC$126);
</td></tr><tr><td>
</td></tr><tr><td>
D_I(0) <= NOT (((NOT DQ(0).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT DQ(8).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(0) <= D_I(0) when D_OE(0) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(0) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(1) <= NOT (((NOT DQ(1).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT DQ(9).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(1) <= D_I(1) when D_OE(1) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(1) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(2) <= NOT (((NOT DQ(2).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT DQ(10).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(2) <= D_I(2) when D_OE(2) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(2) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(3) <= NOT (((NOT DQ(3).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT DQ(11).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(3) <= D_I(3) when D_OE(3) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(3) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(4) <= NOT (((NOT DQ(4).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT DQ(12).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(4) <= D_I(4) when D_OE(4) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(4) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(5) <= NOT (((NOT DQ(5).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT DQ(13).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(5) <= D_I(5) when D_OE(5) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(5) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(6) <= NOT (((NOT DQ(6).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT DQ(14).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(6) <= D_I(6) when D_OE(6) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(6) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(7) <= NOT (((NOT DQ(7).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT DQ(15).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(7) <= D_I(7) when D_OE(7) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(7) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(8) <= NOT (((NOT DQ(8).PIN AND $OpTx$FX_DC$152)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT DQ(0).PIN AND NOT D_and0000/D_and0000_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141)));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(8) <= D_I(8) when D_OE(8) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(8) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(9) <= NOT (((NOT DQ(9).PIN AND $OpTx$FX_DC$152)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT DQ(1).PIN AND NOT D_and0000/D_and0000_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141)));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(9) <= D_I(9) when D_OE(9) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(9) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(10) <= NOT (((NOT DQ(10).PIN AND $OpTx$FX_DC$152)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT DQ(2).PIN AND NOT D_and0000/D_and0000_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141)));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(10) <= D_I(10) when D_OE(10) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(10) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(11) <= NOT (((NOT DQ(11).PIN AND $OpTx$FX_DC$152)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT DQ(3).PIN AND NOT D_and0000/D_and0000_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141)));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(11) <= D_I(11) when D_OE(11) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(11) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(12) <= ((Dout1(0) AND $OpTx$FX_SC$167)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (DQ(12).PIN AND $OpTx$FX_DC$152)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (DQ(4).PIN AND NOT D_and0000/D_and0000_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(12) <= D_I(12) when D_OE(12) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(12) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(13) <= ((Dout1(1) AND $OpTx$FX_SC$167)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (DQ(13).PIN AND $OpTx$FX_DC$152)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (DQ(5).PIN AND NOT D_and0000/D_and0000_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(13) <= D_I(13) when D_OE(13) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(13) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(14) <= ((Dout1(2) AND $OpTx$FX_SC$167)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (DQ(14).PIN AND $OpTx$FX_DC$152)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (DQ(6).PIN AND NOT D_and0000/D_and0000_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(14) <= D_I(14) when D_OE(14) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(14) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
D_I(15) <= ((Dout1(3) AND $OpTx$FX_SC$167)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (DQ(15).PIN AND $OpTx$FX_DC$152)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (DQ(7).PIN AND NOT D_and0000/D_and0000_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(15) <= D_I(15) when D_OE(15) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(15) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(0) <= ((D(8).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(0).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(0) <= DQ_I(0) when DQ_OE(0) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(0) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(1) <= ((D(9).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(1).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(1) <= DQ_I(1) when DQ_OE(1) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(1) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(2) <= ((D(10).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(2).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(2) <= DQ_I(2) when DQ_OE(2) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(2) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(3) <= ((D(11).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(3).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(3) <= DQ_I(3) when DQ_OE(3) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(3) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(4) <= ((A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(12).PIN AND $OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(4).PIN AND $OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(4) <= DQ_I(4) when DQ_OE(4) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(4) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(5) <= ((D(13).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(5).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(5) <= DQ_I(5) when DQ_OE(5) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(5) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(6) <= ((D(14).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(6).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(6) <= DQ_I(6) when DQ_OE(6) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(6) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(7) <= ((D(15).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(7).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(7) <= DQ_I(7) when DQ_OE(7) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(7) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(8) <= NOT (((NOT $OpTx$FX_DC$137)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT D(8).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT $OpTx$FX_DC$153)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT D(0).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$153)));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(8) <= DQ_I(8) when DQ_OE(8) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(8) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(9) <= ((NOT $OpTx$FX_DC$137)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(9).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT $OpTx$FX_DC$153)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(1).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$153));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(9) <= DQ_I(9) when DQ_OE(9) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(9) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(10) <= ((NOT $OpTx$FX_DC$137)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(10).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT $OpTx$FX_DC$153)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(2).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$153));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(10) <= DQ_I(10) when DQ_OE(10) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(10) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(11) <= ((NOT $OpTx$FX_DC$137)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(11).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT $OpTx$FX_DC$153)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(3).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$153));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(11) <= DQ_I(11) when DQ_OE(11) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(11) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(12) <= ((D(12).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$153)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(4).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND $OpTx$FX_DC$153));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(12) <= DQ_I(12) when DQ_OE(12) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(12) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(13) <= ((D(13).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$153)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(5).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND $OpTx$FX_DC$153));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(13) <= DQ_I(13) when DQ_OE(13) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(13) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(14) <= ((D(14).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$153)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(6).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND $OpTx$FX_DC$153));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(14) <= DQ_I(14) when DQ_OE(14) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(14) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_I(15) <= ((D(15).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$153)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (D(7).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137 AND $OpTx$FX_DC$153));
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(15) <= DQ_I(15) when DQ_OE(15) = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(15) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
</td></tr><tr><td>
</td></tr><tr><td>
DQ_9_IOBUFE/DQ_9_IOBUFE_TRST <= ((RW AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (AS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$137)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT lancp AND NOT $OpTx$FX_DC$127 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND $OpTx$FX_DC$137));
</td></tr><tr><td>
</td></tr><tr><td>
DQ_and0000/DQ_and0000_D2 <= (NOT RW AND NOT AS AND NOT LDS AND UDS AND lancp);
</td></tr><tr><td>
</td></tr><tr><td>
DQ_and0001/DQ_and0001_D2 <= (NOT RW AND NOT AS AND LDS AND NOT UDS AND lancp);
</td></tr><tr><td>
FDCPE_DS_D: FDCPE port map (DS_D,$OpTx$FX_DC$126,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0',RESET);
</td></tr><tr><td>
</td></tr><tr><td>
DTACK_I <= '0';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DTACK <= DTACK_I when DTACK_OE = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DTACK_OE <= (NOT AS AND ide AND IDE_WAIT);
</td></tr><tr><td>
</td></tr><tr><td>
D_9_IOBUFE/D_9_IOBUFE_TRST <= ((NOT D_and0000/D_and0000_D2 AND NOT $OpTx$FX_DC$129)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT autoconfig AND NOT ide AND NOT D_and0000/D_and0000_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$141));
</td></tr><tr><td>
</td></tr><tr><td>
D_and0000/D_and0000_D2 <= (lan_adr AND NOT lan_adr_sw AND $OpTx$FX_DC$129);
</td></tr><tr><td>
FDCPE_Dout10: FDCPE port map (Dout1(0),Dout1_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Dout1_D(0) <= ((NOT A(5) AND A(4) AND NOT A(2) AND NOT AS AND A(3) AND NOT A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND A(4) AND A(1) AND NOT AS AND A(3) AND NOT A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT AS AND NOT A(3) AND A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND NOT A(4) AND NOT A(1) AND NOT AS AND NOT AUTO_CONFIG_DONE(1) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT A(3) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND A(2) AND NOT A(1) AND NOT AS AND NOT AUTO_CONFIG_DONE(1) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT A(3) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT Dout1(0) AND NOT $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(5) AND NOT A(4) AND A(2) AND NOT A(3) AND NOT A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(4) AND A(2) AND NOT AUTO_CONFIG_DONE(1) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT AUTO_CONFIG_DONE(0) AND NOT A(3) AND NOT A(6) AND $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(5) AND NOT A(4) AND A(2) AND A(1) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT A(6) AND $OpTx$FX_DC$160));
</td></tr><tr><td>
FDCPE_Dout11: FDCPE port map (Dout1(1),Dout1_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Dout1_D(1) <= ((NOT A(5) AND NOT A(4) AND NOT AS AND NOT AUTO_CONFIG_DONE(1) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT AUTO_CONFIG_DONE(0) AND NOT A(3) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND A(4) AND NOT A(1) AND NOT AS AND A(3) AND NOT A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND A(4) AND A(2) AND NOT A(1) AND NOT AS AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; AUTO_CONFIG_DONE(1) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND NOT A(4) AND A(1) AND NOT AS AND AUTO_CONFIG_DONE(1) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT A(3) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND NOT A(4) AND NOT A(1) AND NOT AS AND NOT AUTO_CONFIG_DONE(1) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT A(3) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND NOT A(2) AND A(1) AND NOT AS AND NOT AUTO_CONFIG_DONE(1) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT A(3) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT Dout1(1) AND NOT $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(5) AND NOT A(4) AND A(2) AND NOT A(1) AND NOT A(3) AND NOT A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT AS AND NOT A(3) AND autoconfig AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND A(4) AND A(2) AND NOT AS AND A(3) AND NOT A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; autoconfig AND NOT $OpTx$FX_DC$126));
</td></tr><tr><td>
FDCPE_Dout12: FDCPE port map (Dout1(2),Dout1_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Dout1_D(2) <= ((A(2) AND A(6) AND $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(1) AND A(3) AND $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(4) AND NOT A(1) AND NOT A(3) AND $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(2) AND NOT A(1) AND NOT A(6) AND $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(1) AND AUTO_CONFIG_DONE(1) AND NOT A(3) AND NOT A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND NOT A(4) AND A(2) AND A(1) AND NOT AS AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND autoconfig AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (Dout1(2) AND NOT $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(5) AND $OpTx$FX_DC$160 AND NOT $OpTx$FX_DC$195)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(4) AND NOT A(2) AND $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(4) AND A(3) AND $OpTx$FX_DC$160));
</td></tr><tr><td>
FDCPE_Dout13: FDCPE port map (Dout1(3),Dout1_D(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Dout1_D(3) <= ((NOT A(5) AND A(4) AND A(2) AND A(1) AND NOT AS AND NOT A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND A(4) AND A(1) AND NOT AS AND NOT A(3) AND NOT A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND A(1) AND NOT AS AND NOT AUTO_CONFIG_DONE(1) AND NOT A(3) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND A(4) AND NOT A(2) AND NOT A(1) AND NOT AS AND A(3) AND NOT A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT Dout1(3) AND NOT $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (A(5) AND NOT A(4) AND A(2) AND NOT A(1) AND NOT A(3) AND NOT A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$160)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND NOT A(4) AND NOT A(2) AND A(1) AND NOT AS AND NOT A(3) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; autoconfig AND NOT $OpTx$FX_DC$126)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT AS AND NOT A(3) AND A(6) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; autoconfig AND NOT $OpTx$FX_DC$126));
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
</td></tr><tr><td>
IDE_A(0) <= A(9);
</td></tr><tr><td>
</td></tr><tr><td>
IDE_A(1) <= A(10);
</td></tr><tr><td>
</td></tr><tr><td>
IDE_A(2) <= A(11);
</td></tr><tr><td>
FDCPE_IDE_BASEADR0: FDCPE port map (IDE_BASEADR(0),IDE_BASEADR_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(0) <= ((D(8).PIN AND $OpTx$FX_DC$158)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(0) AND NOT $OpTx$FX_DC$158));
</td></tr><tr><td>
FDCPE_IDE_BASEADR1: FDCPE port map (IDE_BASEADR(1),IDE_BASEADR_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(1) <= ((D(9).PIN AND $OpTx$FX_DC$158)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(1) AND NOT $OpTx$FX_DC$158));
</td></tr><tr><td>
FDCPE_IDE_BASEADR2: FDCPE port map (IDE_BASEADR(2),IDE_BASEADR_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(2) <= ((D(10).PIN AND $OpTx$FX_DC$158)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(2) AND NOT $OpTx$FX_DC$158));
</td></tr><tr><td>
FDCPE_IDE_BASEADR3: FDCPE port map (IDE_BASEADR(3),IDE_BASEADR_D(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(3) <= ((D(11).PIN AND $OpTx$FX_DC$158)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(3) AND NOT $OpTx$FX_DC$158));
</td></tr><tr><td>
FDCPE_IDE_BASEADR4: FDCPE port map (IDE_BASEADR(4),IDE_BASEADR_D(4),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(4) <= ((D(12).PIN AND $OpTx$FX_DC$158)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(4) AND NOT $OpTx$FX_DC$158));
</td></tr><tr><td>
FDCPE_IDE_BASEADR5: FDCPE port map (IDE_BASEADR(5),IDE_BASEADR_D(5),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(5) <= ((D(13).PIN AND $OpTx$FX_DC$158)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(5) AND NOT $OpTx$FX_DC$158));
</td></tr><tr><td>
FDCPE_IDE_BASEADR6: FDCPE port map (IDE_BASEADR(6),IDE_BASEADR_D(6),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(6) <= ((D(14).PIN AND $OpTx$FX_DC$158)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(6) AND NOT $OpTx$FX_DC$158));
</td></tr><tr><td>
FDCPE_IDE_BASEADR7: FDCPE port map (IDE_BASEADR(7),IDE_BASEADR_D(7),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(7) <= ((D(15).PIN AND $OpTx$FX_DC$158)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (IDE_BASEADR(7) AND NOT $OpTx$FX_DC$158));
</td></tr><tr><td>
</td></tr><tr><td>
IDE_CS(0) <= NOT A(12);
</td></tr><tr><td>
</td></tr><tr><td>
IDE_CS(1) <= NOT A(13);
</td></tr><tr><td>
FDCPE_IDE_ENABLE: FDCPE port map (IDE_ENABLE,'0',SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET,IDE_ENABLE_CE);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_ENABLE_CE <= (NOT RW AND NOT AS AND ide);
</td></tr><tr><td>
</td></tr><tr><td>
IDE_R <= NOT ((NOT AS AND NOT IDE_R_S));
</td></tr><tr><td>
FDCPE_IDE_R_S: FDCPE port map (IDE_R_S,IDE_R_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_R_S_D <= (ide AND NOT IDE_ENABLE AND $OpTx$FX_DC$129);
</td></tr><tr><td>
</td></tr><tr><td>
IDE_W <= NOT ((NOT AS AND NOT IDE_W_S));
</td></tr><tr><td>
FDCPE_IDE_W_S: FDCPE port map (IDE_W_S,IDE_W_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_W_S_D <= (NOT RW AND NOT AS AND ide);
</td></tr><tr><td>
</td></tr><tr><td>
INT2_OUT_I <= '0';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;INT2_OUT <= INT2_OUT_I when INT2_OUT_OE = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;INT2_OUT_OE <= (LAN_INT_ENABLE AND NOT LAN_IRQ_OUT);
</td></tr><tr><td>
</td></tr><tr><td>
INT6_OUT_I <= '0';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;INT6_OUT <= INT6_OUT_I when INT6_OUT_OE = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;INT6_OUT_OE <= NOT CP_IRQ;
</td></tr><tr><td>
FDCPE_LAN_BASEADR0: FDCPE port map (LAN_BASEADR(0),LAN_BASEADR_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(0) <= ((D(8).PIN AND $OpTx$FX_DC$156)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(0) AND NOT $OpTx$FX_DC$156));
</td></tr><tr><td>
FDCPE_LAN_BASEADR1: FDCPE port map (LAN_BASEADR(1),LAN_BASEADR_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(1) <= ((D(9).PIN AND $OpTx$FX_DC$156)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(1) AND NOT $OpTx$FX_DC$156));
</td></tr><tr><td>
FDCPE_LAN_BASEADR2: FDCPE port map (LAN_BASEADR(2),LAN_BASEADR_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(2) <= ((D(10).PIN AND $OpTx$FX_DC$156)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(2) AND NOT $OpTx$FX_DC$156));
</td></tr><tr><td>
FDCPE_LAN_BASEADR3: FDCPE port map (LAN_BASEADR(3),LAN_BASEADR_D(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(3) <= ((D(11).PIN AND $OpTx$FX_DC$156)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(3) AND NOT $OpTx$FX_DC$156));
</td></tr><tr><td>
FDCPE_LAN_BASEADR4: FDCPE port map (LAN_BASEADR(4),LAN_BASEADR_D(4),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(4) <= ((D(12).PIN AND $OpTx$FX_DC$156)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(4) AND NOT $OpTx$FX_DC$156));
</td></tr><tr><td>
FDCPE_LAN_BASEADR5: FDCPE port map (LAN_BASEADR(5),LAN_BASEADR_D(5),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(5) <= ((D(13).PIN AND $OpTx$FX_DC$156)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(5) AND NOT $OpTx$FX_DC$156));
</td></tr><tr><td>
FDCPE_LAN_BASEADR6: FDCPE port map (LAN_BASEADR(6),LAN_BASEADR_D(6),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(6) <= ((D(14).PIN AND $OpTx$FX_DC$156)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(6) AND NOT $OpTx$FX_DC$156));
</td></tr><tr><td>
FDCPE_LAN_BASEADR7: FDCPE port map (LAN_BASEADR(7),LAN_BASEADR_D(7),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(7) <= ((D(15).PIN AND $OpTx$FX_DC$156)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(7) AND NOT $OpTx$FX_DC$156));
</td></tr><tr><td>
</td></tr><tr><td>
LAN_CFG(1) <= '0';
</td></tr><tr><td>
</td></tr><tr><td>
LAN_CFG(2) <= '1';
</td></tr><tr><td>
</td></tr><tr><td>
LAN_CFG(3) <= '0';
</td></tr><tr><td>
</td></tr><tr><td>
LAN_CFG(4) <= '0';
</td></tr><tr><td>
</td></tr><tr><td>
LAN_CS <= ((RESET AND lan_adr)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT RESET AND LAN_CS_RST));
</td></tr><tr><td>
FDCPE_LAN_CS_RST: FDCPE port map (LAN_CS_RST,LAN_CS_RST_D,CLK_EXT,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_CS_RST_D <= ((NOT RESET AND LAN_RST_SM_FSM_FFd3)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT RESET AND LAN_RST_SM_FSM_FFd2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT LAN_RST_SM_FSM_FFd1)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT RESET AND NOT LAN_RST_SM_FSM_FFd2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; LAN_RST_SM_FSM_FFd1));
</td></tr><tr><td>
FDCPE_LAN_INT_ENABLE: FDCPE port map (LAN_INT_ENABLE,LAN_INT_ENABLE_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT RESET,'0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_INT_ENABLE_D <= ((D(15).PIN AND $OpTx$FX_DC$172)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_INT_ENABLE AND NOT $OpTx$FX_DC$172));
</td></tr><tr><td>
FDCPE_LAN_IRQ_D0: FDCPE port map (LAN_IRQ_D0,LAN_INT,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
</td></tr><tr><td>
FDCPE_LAN_IRQ_OUT: FDCPE port map (LAN_IRQ_OUT,LAN_IRQ_OUT_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_IRQ_OUT_D <= ((NOT LAN_INT AND LAN_IRQ_D0)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_INT_ENABLE AND NOT D(14).PIN AND NOT LAN_INT AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; $OpTx$FX_DC$172)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_INT_ENABLE AND NOT LAN_IRQ_OUT AND NOT LAN_INT AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT $OpTx$FX_DC$172));
</td></tr><tr><td>
</td></tr><tr><td>
LAN_RD <= (LAN_RD_S AND $OpTx$FX_DC$174);
</td></tr><tr><td>
FDCPE_LAN_RD_S: FDCPE port map (LAN_RD_S,LAN_RD_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_RD_S_D <= (RW AND lan_adr AND NOT A(15) AND NOT $OpTx$FX_DC$126);
</td></tr><tr><td>
FDCPE_LAN_RST_SM_FSM_FFd1: FDCPE port map (LAN_RST_SM_FSM_FFd1,LAN_RST_SM_FSM_FFd1_D,CLK_EXT,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_RST_SM_FSM_FFd1_D <= ((NOT RESET AND NOT LAN_RST_SM_FSM_FFd3)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT RESET AND NOT LAN_RST_SM_FSM_FFd2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; LAN_RST_SM_FSM_FFd1));
</td></tr><tr><td>
FDCPE_LAN_RST_SM_FSM_FFd2: FDCPE port map (LAN_RST_SM_FSM_FFd2,LAN_RST_SM_FSM_FFd2_D,CLK_EXT,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_RST_SM_FSM_FFd2_D <= ((RESET)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_RST_SM_FSM_FFd2 AND LAN_RST_SM_FSM_FFd3 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; LAN_RST_SM_FSM_FFd1));
</td></tr><tr><td>
FDCPE_LAN_RST_SM_FSM_FFd3: FDCPE port map (LAN_RST_SM_FSM_FFd3,LAN_RST_SM_FSM_FFd3_D,CLK_EXT,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_RST_SM_FSM_FFd3_D <= ((NOT RESET AND NOT $OpTx$FX_DC$137)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT RESET AND NOT LAN_RST_SM_FSM_FFd2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; LAN_RST_SM_FSM_FFd3));
</td></tr><tr><td>
</td></tr><tr><td>
LAN_WRH <= ((LAN_WR_RST AND NOT $OpTx$FX_DC$174)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_WRH_S AND $OpTx$FX_DC$174));
</td></tr><tr><td>
FDCPE_LAN_WRH_S: FDCPE port map (LAN_WRH_S,LAN_WRH_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_WRH_S_D <= (NOT RW AND NOT LDS AND lan_adr AND NOT A(15));
</td></tr><tr><td>
</td></tr><tr><td>
LAN_WRL <= ((LAN_WR_RST AND NOT $OpTx$FX_DC$174)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_WRL_S AND $OpTx$FX_DC$174));
</td></tr><tr><td>
FDCPE_LAN_WRL_S: FDCPE port map (LAN_WRL_S,LAN_WRL_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_WRL_S_D <= (NOT RW AND NOT UDS AND lan_adr AND NOT A(15));
</td></tr><tr><td>
FDCPE_LAN_WR_RST: FDCPE port map (LAN_WR_RST,LAN_WR_RST_D,CLK_EXT,'0','0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_WR_RST_D <= ((NOT RESET AND LAN_RST_SM_FSM_FFd2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT RESET AND NOT LAN_RST_SM_FSM_FFd2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; LAN_RST_SM_FSM_FFd3 AND LAN_RST_SM_FSM_FFd1));
</td></tr><tr><td>
</td></tr><tr><td>
MTACK_I <= '0';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;MTACK <= MTACK_I when MTACK_OE = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;MTACK_OE <= '0';
</td></tr><tr><td>
</td></tr><tr><td>
OVR_I <= '0';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;OVR <= OVR_I when OVR_OE = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;OVR_OE <= (NOT AS AND ide);
</td></tr><tr><td>
</td></tr><tr><td>
OWN_I <= '0';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;OWN <= OWN_I when OWN_OE = '1' else 'Z';
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;OWN_OE <= '0';
</td></tr><tr><td>
</td></tr><tr><td>
ROM_B(0) <= '0';
</td></tr><tr><td>
</td></tr><tr><td>
ROM_B(1) <= '0';
</td></tr><tr><td>
</td></tr><tr><td>
ROM_OE <= NOT ((NOT AS AND NOT ROM_OE_S AND NOT AUTOBOOT_OFF));
</td></tr><tr><td>
FDCPE_ROM_OE_S: FDCPE port map (ROM_OE_S,ROM_OE_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ROM_OE_S_D <= (ide AND IDE_ENABLE AND $OpTx$FX_DC$129);
</td></tr><tr><td>
FDCPE_SHUT_UP0: FDCPE port map (SHUT_UP(0),SHUT_UP_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;SHUT_UP_D(0) <= (SHUT_UP(0) AND NOT $OpTx$FX_DC$156);
</td></tr><tr><td>
FDCPE_SHUT_UP1: FDCPE port map (SHUT_UP(1),SHUT_UP_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;SHUT_UP_D(1) <= (SHUT_UP(1) AND NOT $OpTx$FX_DC$157);
</td></tr><tr><td>
</td></tr><tr><td>
SHUT_UP(2)/SHUT_UP(2)_CLKF <= C1
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; XOR
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;SHUT_UP(2)/SHUT_UP(2)_CLKF <= C3;
</td></tr><tr><td>
FDCPE_SHUT_UP2: FDCPE port map (SHUT_UP(2),SHUT_UP_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;SHUT_UP_D(2) <= (SHUT_UP(2) AND NOT $OpTx$FX_DC$158);
</td></tr><tr><td>
</td></tr><tr><td>
SLAVE <= ((AS)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS));
</td></tr><tr><td>
FDCPE_autoconfig: FDCPE port map (autoconfig,autoconfig_D,NOT AS,NOT lancp/lancp_RSTF,'0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;autoconfig_D <= (A(23) AND A(22) AND A(21) AND A(19) AND NOT A(17) AND NOT A(16) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT A(18) AND NOT A(20) AND NOT CFIN AND CFOUT);
</td></tr><tr><td>
</td></tr><tr><td>
cp_and0000/cp_and0000_D2 <= (A(23) AND A(22) AND A(21) AND A(19) AND NOT A(17) AND NOT A(16) AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT A(18) AND NOT A(20) AND NOT CFIN AND CFOUT);
</td></tr><tr><td>
</td></tr><tr><td>
cp_and0001/cp_and0001_D2 <= ((SHUT_UP(0))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(4) AND NOT A(20))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(5) AND NOT A(21))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT LAN_BASEADR(5) AND A(21))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(7) AND NOT A(23))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT LAN_BASEADR(7) AND A(23))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (SHUT_UP(2)/SHUT_UP(2)_CLKF.EXP)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(2) AND NOT A(18))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT LAN_BASEADR(2) AND A(18))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(3) AND NOT A(19))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT LAN_BASEADR(3) AND A(19))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT LAN_BASEADR(4) AND A(20))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(0) AND NOT A(16))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT LAN_BASEADR(0) AND A(16))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (LAN_BASEADR(1) AND NOT A(17))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT LAN_BASEADR(1) AND A(17)));
</td></tr><tr><td>
</td></tr><tr><td>
cp_and0002/cp_and0002_D2 <= ((SHUT_UP(1))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (EXP30_.EXP)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(2) AND NOT A(18))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT CP_BASEADR(2) AND A(18))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(3) AND NOT A(19))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT CP_BASEADR(3) AND A(19))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT CP_BASEADR(4) AND A(20))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(4) AND NOT A(20))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(5) AND NOT A(21))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT CP_BASEADR(5) AND A(21))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(7) AND NOT A(23))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT CP_BASEADR(7) AND A(23))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(0) AND NOT A(16))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT CP_BASEADR(0) AND A(16))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (CP_BASEADR(1) AND NOT A(17))
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT CP_BASEADR(1) AND A(17)));
</td></tr><tr><td>
FDCPE_ide: FDCPE port map (ide,ide_D,NOT AS,NOT lancp/lancp_RSTF,'0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ide_D <= (cp_and0001/cp_and0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT cp_and0000/cp_and0000_D2 AND cp_and0002/cp_and0002_D2 AND NOT $OpTx$FX_DC$206);
</td></tr><tr><td>
FDCPE_lan_adr: FDCPE port map (lan_adr,lan_adr_D,NOT AS,NOT lancp/lancp_RSTF,'0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;lan_adr_D <= (NOT cp_and0001/cp_and0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT cp_and0000/cp_and0000_D2);
</td></tr><tr><td>
FDCPE_lan_adr_sw: FDCPE port map (lan_adr_sw,lan_adr_sw_D,NOT AS,NOT lancp/lancp_RSTF,'0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;lan_adr_sw_D <= ((NOT A(13) AND NOT cp_and0001/cp_and0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT cp_and0000/cp_and0000_D2)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (NOT A(14) AND NOT cp_and0001/cp_and0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; NOT cp_and0000/cp_and0000_D2));
</td></tr><tr><td>
FDCPE_lancp: FDCPE port map (lancp,lancp_D,NOT AS,NOT lancp/lancp_RSTF,'0');
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;lancp_D <= ((cp_and0000/cp_and0000_D2)
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; OR (cp_and0001/cp_and0001_D2 AND
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; cp_and0002/cp_and0002_D2 AND $OpTx$FX_DC$206));
</td></tr><tr><td>
</td></tr><tr><td>
lancp/lancp_RSTF <= (RESET AND BERR);
</td></tr><tr><td>
Register Legend:
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; FDCPE (Q,D,C,CLR,PRE,CE);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; FTCPE (Q,D,C,CLR,PRE,CE);
<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; LDCP (Q,D,G,CLR,PRE);
</td></tr><tr><td>
</td></tr>
</table>
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<h1>
Failure Table</h1>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
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<title>Function Block Specifics</title>
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<h1>
Function Block Specifics</h1>
<div class="whs1">To access specific details for a particular function
block, click on that function block in either the <a href="maplogicdoc.htm">Mapped
Logic</a>, <a href="mapinputdoc.htm">Mapped Inputs</a>, or <a href="fbsdoc.htm" style="font-family: arial, sans-serif; font-size: 10pt;">Function
Blocks</a> sections of the fitter report.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->The
function block details page displays a table of details about the particular
function block you selected, a view button you can click to show a graphical
display of the function block, and a pulldown menu you can use to select
other function blocks to see.</div>
<p class="whs2">The Table
<p class="whs3">The View
<p><script LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
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else
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//--></script>
<h4 class="whs4">
<a NAME="table"></a>The Table</h4>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
table at the top of the function block details page provides the following
information about the function block:</font></span>
<ul type="disc" class="whs5">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
signal name&nbsp;</font></span></li>
</ul>
<div class="whs6"><span style="font-weight: bold;
font-family: arial, sans-serif;
font-size: 10pt;"><font size=-1><b>Note:</span><span
style="font-family: arial, sans-serif; font-size: 10pt;"></b>
Clicking on a signal name will open a new window with the equations for
that signal.&nbsp;</font></span></div>
<ul type="disc" class="whs7">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
total product terms used&nbsp;</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><!--kadov_tag{{<spaces>}}--><font size=-1>&nbsp;<!--kadov_tag{{</spaces>}}-->A
list of product terms</font></span></li>
</ul>
<div class="whs8"><span style="font-weight: bold;
font-family: arial, sans-serif;
font-size: 10pt;"><font size=-1><b>Note:</span><span
style="font-family: arial, sans-serif; font-size: 10pt;"></b>
Clicking on a&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->product
term will open a new window with the equations for that term.&nbsp;</font></span></div>
<ul type="disc" class="whs9">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
macrocell number in which the function block is located</font></span></li>
</ul>
<div class="whs10"><span style="font-family: arial, sans-serif; font-size: 10pt;"><span
style="font-weight: bold;"><font size=-1><b>Note:</span></b>
Clicking on the underscored macrocell number will provide a graphical display
of the macrocell that looks like this:</font></span></div>
<p class="whs11"><script LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
{ document.write("<img src='macrocell.gif' x-maintain-ratio='TRUE' width='540' height='420' border='0'>");}
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{ document.write("<img src='macrocell.gif' x-maintain-ratio='TRUE' style='border: none; width: 540px; height: 420px; float: none;' width='540' height='420' border='0'>");}
//--></script>
.
<ul type="disc" class="whs12">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
power mode</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
pin number - an asterisk "*" indicates a user assignment</font></span></li>
</ul>
<ul type="disc" class="whs13">
<div class="whs14"><span style="font-family: arial, sans-serif; font-size: 10pt;"><span
style="font-weight: bold;"><font size=-1><b>N</span></b>ote:</span><span style="font-family: arial, sans-serif; font-size: 10pt;">
Clicking on the underscored pin number will provide the pin layout diagram
for the highlighted pin.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Rolling
your mouse over the colored pin will pop up a tooltip with the signal name
assigned to the pin, the I/O standard,&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->the
I/O style, the slew rate, and/or any constraints assigned to the pin:</font></span></div>
</ul>
<div class="whs15"><script LANGUAGE="JavaScript"><!--
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{ document.write("<img src='pin.gif' x-maintain-ratio='TRUE' width='309' height='312' border='0'>");}
else
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//--></script>
</div>
<ul type="disc" class="whs16">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
pin type</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
pin use&nbsp;</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1><i>XPLA3
only</i> - The GCK (Global Clock Signal) mapping&nbsp;</font></span></li>
</ul>
<div class="whs17"><span style="font-weight: bold;
font-family: arial, sans-serif;
font-size: 10pt;"><font size=-1><b>Note:</span><span
style="font-family: arial, sans-serif; font-size: 10pt;"></b>
Moving your mouse cursor over an "I" in the Pin Use column will display
that input signal as a tooltip.</font></span></div>
<br><span style="font-family: arial, sans-serif; font-size: 10pt;">
<br><span style="font-family: arial, sans-serif; font-size: 10pt;"><i>XBR
only</i> - Below the resource table there is another table listing the
<b>Function Block Control Term</b> usage, the product term mapped to the
control term is listed. Clicking on the product term will bring up a pop-up
window displaying that product term.
<blockquote>
<li>
CTC - control term clock</li>
<li>
CTR - control term reset</li>
<li>
CTS - control term set</li>
<li>
CTE - control term output enable</li>
</blockquote>
<p><br><span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>Below
this table you will find a list of signals used by logic in the function
block you are viewing.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->The
list displays output signals as links.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Clicking
on an output signal link will open a new window showing the equations for
that signal.</font></span><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}-->
<p class="whs18"><span style="font-family: arial, sans-serif;
font-size: 10pt;
font-weight: bold;"><font size=-1><b>Note:</span><span
style="font-family: arial, sans-serif; font-size: 10pt;"><!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}--></b>There
is also a&nbsp;<script LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
{ document.write("<img src='legend.gif' x-maintain-ratio='TRUE' width='68' height='28' border='0'>");}
else
{ document.write("<img src='legend.gif' x-maintain-ratio='TRUE' style='border: none; width: 68px; height: 28px; float: none;' width='68' height='28' border='0'>");}
//--></script>
button
below the table.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Click
this button to open a new window describing all of the acronyms used in
the function block table.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->You
can select either brief descriptions or more detailed descriptions by clicking
the "Verbose" button at the top of the window.</font></span>
<h4 class="whs19">
<a NAME="view"></a>The View</h4>
<div class="whs20">When you click on the&nbsp;<script LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
{ document.write("<img src='view.gif' x-maintain-ratio='TRUE' width='61' height='53' border='0'>");}
else
{ document.write("<img src='view.gif' x-maintain-ratio='TRUE' style='border: none; width: 61px; height: 53px; float: none;' width='61' height='53' border='0'>");}
//--></script>
button
above the table, a new window will open with a graphical display of the
function block you are examining.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->The
pins are all color-coded: input pins are green, output pins are blue, and
clocks are magenta:</div>
<p class="whs21"><script LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
{ document.write("<img src='fb1.gif' x-maintain-ratio='TRUE' width='482' height='378' border='0'>");}
else
{ document.write("<img src='fb1.gif' x-maintain-ratio='TRUE' style='border: none; width: 482px; height: 378px; float: none;' width='482' height='378' border='0'>");}
//--></script>
<p class="whs22">Right-click anywhere within the window to pull up a menu
that allows you to zoom in or out for easier viewing.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->
<p class="whs23">This menu also allows you choose to see all of the input
connections, all of the output connections, or both at once.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Like
the pins, the signals are color-coded: inputs are red, outputs are yellow,
and macrocell connections are aqua:
<p class="whs24"><script LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
{ document.write("<img src='fb.gif' x-maintain-ratio='TRUE' width='497' height='377' border='0'>");}
else
{ document.write("<img src='fb.gif' x-maintain-ratio='TRUE' style='border: none; width: 497px; height: 377px; float: none;' width='497' height='377' border='0'>");}
//--></script>
<p class="whs25">To examine the signals of single pins, simply click the
pin whose signals you wish to see.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->To
examine multiple pins without having to see everything at once, hold down
the control key while you click the pins you want to view.
<p class="whs26">To view the signals for individual macrocells:
<ul type="disc" class="whs27">
<div class="whs28">Click the inside edge of the macrocell to display its
macrocell connections and inputs.</div>
<p class="whs29">Click the outer edge to display its output signals
<p class="whs30">Click in the center to display everything
<p class="whs31">Double click in the center to open a new window with a
detailed macrocell diagram</ul>
<div class="whs32"></div>
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<h1>Function Blocks</h1>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The Function
Blocks page provides a summary of all function blocks' resources. Clicking
on one of the function blocks in the summary table will display the <a href="fbs_FBdoc.htm">specific details</a> for that function block. <!--kadov_tag{{<spaces>}}-->&nbsp;</FONT></span><!--kadov_tag{{</spaces>}}-->
<!--begin!kadov{{--><br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}-->&nbsp;
<!--begin!kadov{{--><br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><span
style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The summary table
contains the following: <!--kadov_tag{{<spaces>}}-->&nbsp;</FONT></span><!--kadov_tag{{</spaces>}}-->
<ul type="disc" class="whs1">
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
function block</FONT></span></li>
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
number of macrocell used </FONT></span></li>
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
number of function block inputs used </FONT></span></li>
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
number of product terms used</FONT></span></li>
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
pins used</FONT></span></li>
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
local control terms used</FONT></span></li>
<li class=kadov-p
class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The
number of foldback NANDs used (CoolRunner only)</FONT></span></li>
</ul>
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<h1>
Unmapped Inputs</h1>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Unmapped Inputs section provides a table listing all inputs that failed
to fit into the specified device. The page will appear in your browser
sorted by Signal Name.&nbsp;</font></span><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><span
style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Unmapped Inputs table contains the following:&nbsp;</font></span>
<ul type="disc" class="whs1">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
input signal name&nbsp;</font></span></li>
</ul>
<ul type="disc" class="whs11">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Pin/FB Assignment specified by the user.</font></span></li>
</ul>
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<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<script>var currEqnType = defEqnType = 1</script><script src="applet.js"></script><script src="leftnav.js"></script><link rel="stylesheet" type="text/css" href="../tim/toc.css">
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<body bgcolor="#CCCCCC" text="#000000"><form name="options">
<span class="tocRef"><table width="105" border="0" cellspacing="0" cellpadding="0">
<tr><td colspan="2"><div align="left"><span class="HEADING">Fitter Report</span></div></td></tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showSummary();" class="SECONDARY-NAV" onmouseover="window.status='goto Summary'; return true;" onmouseout="window.status=''">Summary</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showError(10);" class="SECONDARY-NAV" onmouseover="window.status='goto Errors/Warnings'; return true;" onmouseout="window.status=''">Errors/Warnings</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showMappedLogics(0);" class="SECONDARY-NAV" onmouseover="window.status='goto Logic'; return true;" onmouseout="window.status=''">Logic</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showMappedInputs(0);" class="SECONDARY-NAV" onmouseover="window.status='goto Inputs'; return true;" onmouseout="window.status=''">Inputs</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showFBSum();" class="SECONDARY-NAV" onmouseover="window.status='goto Function Blocks Summary'; return true;" onmouseout="window.status=''">Function Blocks</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showEqnAll();" class="SECONDARY-NAV" onmouseover="window.status='goto Equations'; return true;" onmouseout="window.status=''">Equations</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showPinOut(10);" class="SECONDARY-NAV" onmouseover="window.status='goto Pin List'; return true;" onmouseout="window.status=''">Pin List</a></td>
</tr>
<tr>
<td width="7"> </td>
<td><a href="javascript:showOptions();" class="SECONDARY-NAV" onmouseover="window.status='goto Compiler Options'; return true;" onmouseout="window.status=''">Compiler Options</a></td>
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<td width="7"> </td>
<td><a href="javascript:showAscii();" class="SECONDARY-NAV" onmouseover="window.status='goto Text Report'; return true;" onmouseout="window.status=''">Text Report</a></td>
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<td><a href="javascript:showHelp();" class="SECONDARY-NAV" onmouseover="window.status='goto Help'; return true;" onmouseout="window.status=''">Help</a></td>
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<br><br><br><table width="105" border="0" cellspacing="0" cellpadding="0">
<tr><td colspan="2"><b><span class="HEADING">Equation Display Style</span></b></td></tr>
<tr>
<td width="7"> </td>
<td><select name="eqnType" onchange="doEqnFormat()"><option value="0">ABEL</option>
<option value="1" selected>VHDL</option>
<option value="2">Verilog</option></select></td>
</tr>
</table>
<br><b> </b>
</div>
<input type="hidden" name="info" value="1"><input type="hidden" name="warn" value="1"><input type="hidden" name="error" value="1"><input type="hidden" name="inOn" value="1"><input type="hidden" name="outOn" value="1"><input type="hidden" name="glbOn" value="1"><input type="hidden" name="ispOn" value="1"><input type="hidden" name="vccOn" value="1"><input type="hidden" name="gndOn" value="1"><input type="hidden" name="prohibitOn" value="1"><input type="hidden" name="unuseOn" value="1"><input type="hidden" name="ncOn" value="1"><input type="hidden" name="htmlStr" value=""><input type="hidden" name="pinStr" value=""><input type="hidden" name="eqnStr" value=""><input type="hidden" name="errStr" value=""><input type="hidden" name="pinSel" value="0"><input type="hidden" name="currPage" value="summary">
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<body>
<h1>
Unmapped Logic</h1>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Unmapped Logic section provides a table listing all logic that failed to
fit into the specified device. The page will appear in your browser sorted
by Signal Name.&nbsp;</font></span><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><span
style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Mapped Logic table contains the following:&nbsp;</font></span>
<ul type="disc" class="whs1">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
signal name&nbsp;</font></span></li>
</ul>
<div class="whs2"><span style="font-weight: bold;
font-family: arial, sans-serif;
font-size: 10pt;"><font size=-1><b>Note:</span><span
style="font-family: arial, sans-serif; font-size: 10pt;"></b>
Clicking on the signal name will open a new window with the equations for
that signal.&nbsp;</font></span></div>
<ul type="disc" class="whs3">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
total number of product terms&nbsp;</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
total number of inputs&nbsp;</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
I/O standard where appropriate</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Pin/FB Assignment specified by the user.</font></span></li>
</ul>
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<h1>
Mapped Inputs</h1>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>Like
the <a href="maplogicdoc.htm">Mapped Logic</a> section, the Mapped Inputs
section of the report displays a table detailing the resources allocated
by the fitter to mapped inputs.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Again,
the table can be sorted by Signal Name, Function Block, or Pin Number by
clicking on the appropriate table headings.&nbsp;</font><!--kadov_tag{{<spaces>}}--></span><!--kadov_tag{{</spaces>}}--><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><span
style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
inputs table contains the following:&nbsp;</font></span>
<ul type="disc" class="whs1">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
input signal name&nbsp;</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
function block number - an asterisk "*" indicates a user assignment</font></span></li>
</ul>
<div class="whs2"><span style="font-weight: bold;"><b>Note:</span></b>
Clicking on the function block will provide a detailed table of all the
block's resources and a graphical display of the function block diagram
(see <a href="fbs_FBdoc.htm">Function Block Specifics</a> for more details).</div>
<ul type="disc" class="whs3">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
macrocell number</font></span></li>
</ul>
<ul type="disc" class="whs4">
<div class="whs5"><span style="font-family: arial, sans-serif; font-size: 10pt;"><span
style="font-family: arial, sans-serif; font-size: 10pt;"><span style="font-weight: bold;"><font size=-1><b>N</span></b>ote:</span>
Clicking on the underscored macrocell number will provide a graphical display
of the macrocell that looks like this:</font></span></div>
<div class="kadov-p" class="kadov-p"><script LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
{ document.write("<img src='macrocell.gif' x-maintain-ratio='TRUE' width='540' height='420' border='0'>");}
else
{ document.write("<img src='macrocell.gif' x-maintain-ratio='TRUE' style='border: none; width: 540px; height: 420px; float: none;' width='540' height='420' border='0'>");}
//--></script>
</div>
<div class="kadov-p" class="kadov-p"></div>&nbsp;
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
pin number - an asterisk "*" indicates a user assignment</font></span></li>
</ul>
<div class="whs6"><span style="font-weight: bold;"><b>Note:</span><span
style="font-family: arial, sans-serif; font-size: 10pt;"></b><font size=-1>
Clicking on the underscored pin number will provide the pin layout diagram
for the highlighted pin.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Rolling
your mouse over the colored pin will pop up a tooltip with the signal name
assigned to the pin, the I/O standard,&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->the
I/O style, the slew rate, and/or any constraints assigned to the pin:</font></span></div>
<p class="whs7"><script LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
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//--></script>
<div class="whs8"></div>&nbsp;
<ul type="disc" class="whs9">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
pin type</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
pin use&nbsp;</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
I/O standard</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
I/O style</font></span></li>
</ul>
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<title>Mapped Logic</title>
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<h1>
Mapped Logic</h1>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Mapped Logic section provides a table listing resources allocated by the
fitter to mapped logic. The page will appear in your browser sorted by
Signal Name, but you can choose to sort it by Signal Name, Function Block,
and Pin Number by clicking on the appropriate table headers.&nbsp;</font></span><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><!--begin!kadov{{-->
<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><span
style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
Mapped Logic table contains the following:&nbsp;</font></span>
<ul type="disc" class="whs1">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
output signal name&nbsp;</font></span></li>
</ul>
<div class="whs2"><span style="font-weight: bold;
font-family: arial, sans-serif;
font-size: 10pt;"><font size=-1><b>Note:</span><span
style="font-family: arial, sans-serif; font-size: 10pt;"></b>
Clicking on the signal name will open a new window with the equations for
that signal.&nbsp;</font></span></div>
<ul type="disc" class="whs3">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
total number of product terms&nbsp;</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
number of signals used&nbsp;</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
function block number - an asterisk "<b>*</b>" indicates a user assignment&nbsp;</font></span></li>
</ul>
<div class="whs4"><span style="font-weight: bold;"><b>Note:</span></b>
Clicking on the function block will provide a detailed table of all the
block's resources and a graphical display of the function block diagram
(see <a href="fbs_FBdoc.htm">Function Block Specifics</a> for more details).</div>
<ul type="disc" class="whs5">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
macrocell number</font></span></li>
</ul>
<div class="whs6"><span style="font-weight: bold;"><b>Note:</span></b>
Clicking on the underscored macrocell number will provide a graphical display
of the macrocell that looks like this:</div>
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.
<ul type="disc" class="whs8">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
slew rate</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
pin number - an asterisk "<b>*</b>" indicates a user assignment&nbsp;</font></span></li>
</ul>
<div class="whs9"><span style="font-weight: bold;"><b>Note:</span></b>
Clicking on the underscored pin number will provide the pin layout diagram
for the highlighted pin.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Rolling
your mouse over the colored pin will pop up a tooltip with the signal name
assigned to the pin, the I/O standard,&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->the
I/O style, the slew rate, and/or any constraints assigned to the pin:</div>
<p class="whs10"><script LANGUAGE="JavaScript"><!--
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<ul type="disc" class="whs11">
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
pin type</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
pin use</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
input register use</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
I/O standard</font></span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
I/O style</font></span></li>
</ul>
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<h1>Compiler Options</h1>
<p class="whs1">The Compiler
Options page provides all the fitter options settings for the device family
the fitter has selected.</p>
<h1 class="whs2">Fitter Options</h1>
<p class="whs3"><a href="#Basic Tab"
style="font-family: arial, sans-serif; font-size: 10pt;"><span
style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">Basic Tab</a></FONT></span></p>
<p class="whs4"><a href="#XPLA Advanced Options"
style="font-family: arial, sans-serif; font-size: 10pt;"><span
style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">XPLA3 Advanced
Options</a></FONT></span></p>
<p class="whs5"><a href="#CoolRunner-II Advanced Options"
style="font-family: arial, sans-serif; font-size: 10pt;"><span
style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">CoolRunner-II
Advanced Options</a></FONT></span></p>
<p class="whs6"><a href="#XC9500/XL/XV Advanced Options"
style="font-family: arial, sans-serif; font-size: 10pt;">XC9500/XL/XV
Advanced Options</a></p>
<h2 class="whs7"><a name="Basic Tab"></a>Basic
Tab</h2>
<p class=whs1
style="font-family: arial, sans-serif; font-size: 10pt;">The CPLD devices
have the following fitter <span style="font-weight: bold;"><B><b>Implementation
Options </B></span><span style="font-weight: bold;"><B>available</B></span></b> in
the <span style="font-weight: bold;"><B>Basic</B></span> tab:</p>
<ul>
<li class=kadov-h4><h4 class="whs8">Use
Multi-Level Logic Optimization</h4></li>
</ul>
<p class="whs9">This option simplifies the total number
of logic expressions in a design, and then collapses the logic in order
to meet user objectives such as density, speed and timing constraints.
This optimization targets CPLD architecture, making it possible to collapse
to the macrocell limits, reduce levels of logic, and minimize the total
number of p-terms.</p>
<p class="whs10">Multi-level Logic Optimization optimizes
all combinatorial logic arcs spanning from an input pad or register output
to an output pad or register input.</p>
<p class="whs11">Multi-level Logic Optimization operates
on combinatorial logic according to the following rules.</p>
<p class="whs12">If timing constraints are set, the program
optimizes for speed to meet timing constraints.</p>
<p class="whs13">If timing constraints are not set, the
program optimizes either for speed or density, depending on the user setting
for the <span style="font-weight: bold;"><B>Use Timing Optimization</B></span>
option.</p>
<ul>
<ul class=whs1
style="list-style: disc;"
type=disc>
<ul class=whs2
style="list-style: circle;"
type=circle>
<li class=kadov-p><p class="whs14">If
<span style="font-weight: bold;"><B>Use Timing Optimization</B></span> is turned
on, the combinatorial logic will be mapped for speed.</p></li>
<li class=kadov-p-Cwhs3><p class=whs3
style="font-family: arial; font-size: 10pt;">If
<span style="font-weight: bold;"><B>Use Timing Optimization</B></span> is turned
off, the combinatorial logic will be mapped for density. The goal of optimization
will then be to reduce the total number of p-terms.</p></li>
</ul>
</ul>
</ul>
<p class="whs15"><font style="font-family: arial; font-size: 10pt;"
face=arial
size=2><span style="font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">Logic
marked with the </FONT></span><span style="font-weight: bold;"><B><b style="font-size: 10pt;">NOREDUCE</b></B></span><span
style="font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;"> property will not be extracted or optimized.</FONT></span></font></p>
<p class=whs3
style="font-family: arial, sans-serif;
font-size: 10pt;
font-weight: bold;
margin-left: 40px;"><span style="font-family: arial; font-weight: normal;">By
default, this option is on.</span> </p>
<ul>
<li class=kadov-p-Cwhs3><p class=whs3
style="font-family: arial, sans-serif;
font-size: 10pt;
font-weight: bold;"><b style="font-weight: bold;"><span
style="font-weight: bold;"><B>Use Timing Constraints -- </B></span><span style="font-weight: normal;">This
option instructs the fitter use Timing Constraints when fitting the design.
<!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->If this
box is not checked, the fitter will ignore timing constraints, if necessary.</span></b></p></li>
<li class=kadov-p-Cwhs3><p class=whs3
style="font-family: arial, sans-serif; font-size: 10pt;"><b
style="font-weight: bold;"><span style="font-weight: bold;"><B>Enable WYSIWYG
Mode -- (CoolRunner only) </B></span><span style="font-weight: normal;">T</span></b>he
goal of the WYSIWYG options is to have a netlist reflect the user's specifications,
as much as possible. All the nodes declared in the HDL design are preserved.
By default, this property is set to Off (Checkbox is not checked) When
this property is On (checkbox is checked), XST:</p></li>
<ul>
<li style="list-style: circle;"
type=circle
class=kadov-p-Cwhs3><p class=whs3
style="font-family: arial, sans-serif; font-size: 10pt;">Preserves
all the user internal signals (nodes)</p></li>
<li style="list-style: circle;"
type=circle
class=kadov-p-Cwhs3><p class=whs3
style="font-family: arial, sans-serif; font-size: 10pt;">Creates
source_node constraints in NGC file for all these nodes.</p></li>
<li style="list-style: circle;"
type=circle
class=kadov-p-Cwhs3><p class=whs3
style="font-family: arial, sans-serif; font-size: 10pt;">Skips
the design optimization (collapse, factorization). Only the Boolean equation
minimization is performed.</p></li>
</ul>
<li class=kadov-p-Cwhs3><p class=whs3
style="font-family: arial, sans-serif; font-size: 10pt;"><b><span
style="font-weight: bold;"><B>Optimization Style</B></span></b>-- The Optimization
Method allows you to select from one of two basic optimization strategies:
<span style="font-weight: bold;"><B><b>Density</b></B></span> or <span style="font-weight: bold;"><B><b>Speed</b></B></span>.
<span style="font-weight: bold;"><B><b>Density</b></B></span> focuses on solely
on density, and <span style="font-weight: bold;"><B><b>Speed</b></B></span> focuses
solely on speed.</p></li>
<li class=kadov-p><p class="whs16"><span
style="font-weight: bold;"><B>Location Constraints</B></span> -- The Try selection
will attempt to fit the design with the pin assignments specified in the
design source. If the design cannot be fit with these pin assignments,
the fitter will remove the location constraints and attempt to fit the
design with no location constraints. A warning message will tell the user
if the location constraints have been removed.</p></li>
<ul class=whs5
style="list-style: circle;"
type=circle>
<li class=kadov-p><p class="whs17">The
<span style="font-weight: bold;"><B><b>Try</b></B></span> selection will attempt
to fit the design with the pin assignments specified in the design source.
If the design cannot be fit with these pin assignments, the fitter will
ignore the pin assignments.</p></li>
</ul>
<li style="list-style: circle;"
type=circle
class=kadov-p-Cwhs6><p class=whs6
style="font-family: arial, sans-serif; font-size: 10pt;">The
<span style="font-weight: bold;"><B>On </B></span>selection will attempt to fit
the design with the pin assignments specified in the design source. If
the design cannot be fit with these pin assignments, the fitter will notify
the user that the device could not fit. It will not unlock the pins under
this option.</p></li>
<li style="list-style: circle;"
type=circle
class=kadov-p-Cwhs7><p class=whs7
style="font-family: arial, sans-serif; font-size: 10pt;">The
<span style="font-weight: bold;"><B>Off</B></span> selection will attempt to
fit the design and will ignore the pin assignments specified in the design
source. If the design can be fit with no pre-assigned pins, the fitter
will assign pins, which can be viewed in the fitter report (filename.fit).
The user should take these pin assignments and incorporate them back into
the design source file. The user will be notified whether the fitting
operation was successful.</p></li>
<li class=kadov-p-Cwhs8><p class=whs8
style="font-family: arial, sans-serif;
font-size: 10pt;
font-weight: bold;"><b><span style="font-weight: bold;"><B>Output
Slew Rate -- </B></span></b><span style="font-weight: normal;">Use this option
to control the default output slew rate. You can control the transition
time of device output pins by setting the slew rate to Slow or Fast. Limiting
the slew rate (Slow) reduces output switching surges in the device. The
default is Fast.</span></p></li>
</ul>
<p class="whs18"><span style="font-weight: bold;"><B>Note</B></span>:
Any explicit slew rate control properties in the design or constraints
file take precedence over this Output Slew Rate setting. </p>
<ul>
<li class=kadov-p-Cwhs8><p class=whs8
style="font-family: arial, sans-serif;
font-size: 10pt;
font-weight: bold;"><b style="font-weight: bold;"><span
style="font-weight: bold;"><B>FF Initial State -- </B></span><span style="font-weight: normal;">Sets
the initial state for all Flip-Flops. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->The
options are Low, High and FPGA.</span></b></p></li>
<li class=kadov-p-Cwhs8><p class=whs8
style="font-family: arial, sans-serif;
font-size: 10pt;
font-weight: bold;"><b><span style="font-weight: bold;"><B>Collapsing
P-Term Limit -- </B></span></b><span style="font-weight: normal;">This option
controls the degree to which the fitter flattens a design netlist. A logic
gate can collapse forward into a subsequent gate only if the number of
product terms in the resulting logic function does not exceed the p-term
limit. If the path delay of a logic function is not acceptable, increase
the p-term limit to allow the larger functions to be further flattened.
Choose a number from 3 to 48.</span> </p></li>
<li class=kadov-p-Cwhs8><p class=whs8
style="font-family: arial, sans-serif;
font-size: 10pt;
font-weight: bold;"><b><span style="font-weight: bold;"><B>Collapsing
Input Limit -- </B></span></b><span style="font-weight: normal;">This is a
secondary option for controlling the degree to which the fitter flattens
a design netlist. A logic gate can collapse forward into a subsequent
gate only if the number of inputs in the resulting logic function does
not exceed the input limit. If the design fails to fit the target device
because flattening uses up too many of the function block inputs, decrease
the input limit to prevent flattening of certain high fan-in functions.
</span><!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}--></p></li>
</ul>
<h2 class="whs19"><b><span
style="font-weight: bold;"><B><a name="XPLA Advanced Options"></a>XPLA Advanced
Options</B></span></b></h2>
<p class="whs20"><b><span style="font-weight: normal;">The
following options are available under XPLA </span><span style="font-weight: bold;"><B>Implementation
Options</B></span><span style="font-weight: normal;">, </span><span style="font-weight: bold;"><B>Advanced</B></span><span
style="font-weight: normal;"> tab.</span></b></p>
<ul>
<li class=kadov-p-Cwhs8><p class=whs8
style="font-family: arial, sans-serif;
font-size: 10pt;
font-weight: bold;">Enable Fast
Input Registers -<span style="font-weight: normal;">- Enables the use
of the Fast Input path in XPLA3 devices.</span></p></li>
<li class=kadov-p-Cwhs8><p class=whs8
style="font-family: arial, sans-serif;
font-size: 10pt;
font-weight: bold;">Enable Use
of Foldback NANDs -- <span style="font-weight: normal;">When selected,
the software will use foldback NANDs. This increases the capability to
fit a design, sometimes at the expense of speed.</span></p></li>
<li class=kadov-p-Cwhs8><p class=whs8
style="font-family: arial, sans-serif; font-size: 10pt;"><span
style="font-weight: bold;"><B>Reserve JTAG Pins for ISP -- </B></span>Checking
this box will instruct the fitter to reserve JTAG pins.</p></li>
</ul>
<h2 class="whs21"><a name="CoolRunner-II Advanced Options"></a>CoolRunner-II
Advanced Options</h2>
<p class="whs22">The following
options are found under the Advanced tab for CoolRunner-II devices.</p>
<ul type="disc" class="whs23">
<li class=kadov-h4><h4 class="whs24">Use
Global Clock(s) -- <span style="font-weight: normal;">Select this option
to allow the fitter to assign input pins used as clocks to dedicated global
clock (GCK) pins of the device. If this option is disabled, only pins
identified with the BUFG=CLK property in the design (or UCF file) will
be assigned to GCK device pins. By default, this option is on.</span>
</h4></li>
<li class=kadov-p><p class="whs25"><span
style="font-weight: bold;"><B>Use Global Output Enable(s)</B></span> -- Select
this option to allow the fitter to assign input pins used as output enable
control to dedicated global OE (GTS) pins of the device. If this option
is disabled, only pins identified with the BUFG=OE property in the design
(or UCF file) will be assigned to GTS device pins. By default, this option
is on. </p></li>
<li class=kadov-p><p class="whs26"><span
style="font-weight: bold;"><B>Use Global Set/Reset</B></span> -- Select this
option to allow the fitter to assign input pins used as register asynchronous
reset or preset control to the dedicated global set/reset (GSR) pin of
the device. If this option is disabled, only a pin identified with the
BUFG=SR property in the design (or UCF file) will be assigned to the GSR
device pin. By default, this option is on.</p></li>
<li class=kadov-p><p class="whs27"><span
style="font-weight: bold;"><B>Enable Fast Input Registers</B></span> -- Enables
fast input registers.</p></li>
<li class=kadov-p><p class="whs28"><span
style="font-weight: bold;"><B>Ignore DATA_GATE Attributes</B></span> -- Data
Gate is a power saving property that can be used in CoolRunner-II designs.
<!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->This option
allows you to turn Data Gate off in case you want the fitter to ignore
data gate.</p></li>
<li class=kadov-p><p class="whs29"><span
style="font-weight: bold;"><B>Tristate Outputs Termination Node</B></span> --
The Tristate Output Termination Mode globally sets all tristate outputs
to the specified termination mode. By default, this field is set to Pullup..
<!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->The options
are Pullup, Keeper and Float.</p></li>
<li class=kadov-p><p class="whs30"><span
style="font-weight: bold;"><B>Create Programmable Ground Pins on Unused I/O</B></span>
-- The Create Programmable GND Pins on Unused I/O property controls the
option to indicate that you want all unused I/O pads to be configured
as ground pins. This can reduce ground bounce. By default, this option
is set to ground. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->The
options are Ground, Pullup, Keeper and Float.</p></li>
<li class=kadov-p>
<p class="whs31"><span style="font-weight: bold;"><B>Default
Output Voltage Standard</B></span> -- set a default voltage standard for CoolRunner-II
device pins.</p>
<p class="whs32">IOSTANDARD
names supported by CoolRunner-II are:</p>
<!--(Table)=====================================================-->
<table x-use-null-cells width="84.797%" cellspacing="0" class="whs33">
<col class="whs34">
<col class="whs35">
<col class="whs36">
<col class="whs37">
<tr valign=top>
<td width="20.209%" class="whs38">
<p class="whs39">I/O Standard</td>
<td width="16.192%" class="whs40">
<p align="center" class="whs41">VCC<span style="vertical-align: Sub;">IO</span></td>
<td width="22.217%" class="whs42">
<p align="center" class="whs43">Input V<span style="vertical-align: Sub;">REF</span></td>
<td width="41.383%" class="whs44">
<p align="center" class="whs45">Board Termination Voltage (V<span style="vertical-align: Sub;">TT</span>)</td></tr>
<tr valign=top>
<td width="20.209%" class="whs46">
<p class="whs47">LVTTL </td>
<td width="16.192%" class="whs48">
<p align="center" class="whs49">3.3V</td>
<td width="22.217%" class="whs50">
<p align="center" class="whs51">N/A</td>
<td width="41.383%" class="whs52">
<p align="center" class="whs53">N/A</td></tr>
<tr valign=top>
<td width="20.209%" class="whs54">
<p class="whs55">LVCMOS33</td>
<td width="16.192%" class="whs56">
<p align="center" class="whs57">3.3V</td>
<td width="22.217%" class="whs58">
<p align="center" class="whs59">N/A</td>
<td width="41.383%" class="whs60">
<p align="center" class="whs61">N/A</td></tr>
<tr valign=top>
<td width="20.209%" class="whs62">
<p class="whs63">LVCMOS25</td>
<td width="16.192%" class="whs64">
<p align="center" class="whs65">2.5V</td>
<td width="22.217%" class="whs66">
<p align="center" class="whs67">N/A</td>
<td width="41.383%" class="whs68">
<p align="center" class="whs69">N/A</td></tr>
<tr valign=top>
<td width="20.209%" class="whs70">
<p class="whs71">LVCMOS18</td>
<td width="16.192%" class="whs72">
<p align="center" class="whs73">1.8V</td>
<td width="22.217%" class="whs74">
<p align="center" class="whs75">N/A</td>
<td width="41.383%" class="whs76">
<p align="center" class="whs77">N/A</td></tr>
<tr valign=top>
<td width="20.209%" class="whs78">
<p class="whs79">LVCMOS15</td>
<td width="16.192%" class="whs80">
<p align="center" class="whs81">1.5V</td>
<td width="22.217%" class="whs82">
<p align="center" class="whs83">N/A</td>
<td width="41.383%" class="whs84">
<p align="center" class="whs85">N/A</td></tr>
<tr valign=top>
<td width="20.209%" class="whs86">
<p class="whs87">HSTL_I</td>
<td width="16.192%" class="whs88">
<p align="center" class="whs89">1.5V</td>
<td width="22.217%" class="whs90">
<p align="center" class="whs91">0.75V</td>
<td width="41.383%" class="whs92">
<p align="center" class="whs93">0.75V</td></tr>
<tr valign=top>
<td width="20.209%" class="whs94">
<p class="whs95">SSTL2_I</td>
<td width="16.192%" class="whs96">
<p align="center" class="whs97">2.5V</td>
<td width="22.217%" class="whs98">
<p align="center" class="whs99">1.25V</td>
<td width="41.383%" class="whs100">
<p align="center" class="whs101">1.25V</td></tr>
<tr valign=top>
<td width="20.209%" class="whs102">
<p class="whs103">SSTL3_I</td>
<td width="16.192%" class="whs104">
<p align="center" class="whs105">3.3V</td>
<td width="22.217%" class="whs106">
<p align="center" class="whs107">1.5V</td>
<td width="41.383%" class="whs108">
<p align="center" class="whs109">1.5V</td></tr>
</table>
<p class="whs110">The software
automatically groups outputs with similar IOSTANDARD settings into the
same bank when no location constraints are specified. </p>
</li>
</ul>
<h2 class="whs111"><a name="XC9500/XL/XV Advanced Options"></a>XC9500/XL/XV
Advanced Options</h2>
<p class="whs112">The following
options are found under the Advanced tab for XC9500/XL/XV. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->Note
that additional options for XC9500 only are also described below.</p>
<ul type="disc" class="whs113">
<li class=kadov-h4><h4 class="whs114">Use
Global Clock(s) -- <span style="font-weight: normal;">Select this option
to allow the fitter to assign input pins used as clocks to dedicated global
clock (GCK) pins of the device. If this option is disabled, only pins
identified with the BUFG=CLK property in the design (or UCF file) will
be assigned to GCK device pins. By default, this option is on.</span>
</h4></li>
<li class=kadov-p><p class="whs115"><span
style="font-weight: bold;"><B>Use Global Output Enable(s)</B></span> -- Select
this option to allow the fitter to assign input pins used as output enable
control to dedicated global OE (GTS) pins of the device. If this option
is disabled, only pins identified with the BUFG=OE property in the design
(or UCF file) will be assigned to GTS device pins. By default, this option
is on. </p></li>
<li class=kadov-p><p class="whs116"><span
style="font-weight: bold;"><B>Use Global Set/Reset</B></span> -- Select this
option to allow the fitter to assign input pins used as register asynchronous
reset or preset control to the dedicated global set/reset (GSR) pin of
the device. If this option is disabled, only a pin identified with the
BUFG=SR property in the design (or UCF file) will be assigned to the GSR
device pin. By default, this option is on.</p></li>
<li class=kadov-p><p class="whs117"><span
style="font-weight: bold;"><B>Create Programmable Ground Pins on Unused I/O</B></span>
-- Select this option to indicate that you want all unused I/O pads to
be configured as ground pins. This can reduce ground bounce. By default,
this option is off.</p></li>
<li class=kadov-p><p class="whs118"><span
style="font-weight: bold;"><B>Macrocell Power Setting</B></span> -- Use this
option to control device power consumption. Select Low or Standard to
set the default power mode for the macrocells used to implement the design.
Select Timing Driven to automatically reduce power on paths covered by
timing specifications that can meet speed requirements while operating
in low power. The default is Standard, which results in highest speed.</p></li>
</ul>
<p class="whs119">Note: Any explicit power control (PWR_MODE)
properties in the design or constraints file take precedence over this
Macrocell Power Setting. </p>
<ul type="disc" class="whs120">
<li class=kadov-p><p class="whs121"><span
style="font-weight: bold;"><B>Enable FASTConnect/UIM Optimization (XC9500
only)</B></span> -- Enables optimization of the FASTConnect/UIM for XC9500
devices.</p></li>
<li class=kadov-h4><h4 class="whs122">Use
Local Feedback (XC9500 only)</h4></li>
</ul>
<p class="whs123">Select this option to enable the software
to use local macrocell feedback whenever possible. The local feedback
path, running from each macrocell output to an input of the same function
block, has shorter propagation delay than the global feedback path. The
fitter always tries to use local macrocell feedback (if possible) to satisfy
timing constraints. This option allows the fitter to use local feedback
to generally improve timing on remaining paths. Using local feedback can
speed up your design but could also make it difficult to maintain the
same timing after a design change. By default, this option is on.</p>
<!--(HR)============================================================-->
<hr class=whs4
style="margin-left: 40px; /*begin!kadov{{*/ float: aligncenter; /*}}end!kadov*/ "
align=center>
<p class="whs124"><b><span style="font-weight: bold;"><B>Note:
</B></span></b>To force the fitter to use local feedback, manually map both
the source and load functions into the same function block using the property
<span style="font-weight: bold;"><B><b>LOC=FB</b></B></span><span style="font-style: italic;"><I><i>nn</i></I></span>,
then apply a timespec across the path.&nbsp;</p>
<!--(HR)============================================================-->
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style="margin-left: 40px; /*begin!kadov{{*/ float: aligncenter; /*}}end!kadov*/ "
align=center>
<p class="whs125"><span><FONT SIZE=2 style="font-size:10pt;"><b style="font-weight: bold;">Note:
</b></FONT></span>The XC9536 device does not have local feedback.</p>
<!--(HR)============================================================-->
<hr class=whs6
style="margin-left: 40px; /*begin!kadov{{*/ float: aligncenter; /*}}end!kadov*/ "
align=center>
<ul type="disc" class="whs126">
<li class=kadov-h4><h4 class="whs127">Use
Pin Feedback (XC9500 only)</h4></li>
</ul>
<p class="whs128">Select this option to enable the software
to use I/O pin feedback whenever possible. The pin feedback path has slightly
shorter propagation delay than the global feedback path. If this option
is enabled, the software uses the pin feedback path instead of the global
feedback path for macrocell signals that do not drive 3-state outputs
or slew-rate-limited outputs, and where the associated I/O pin is not
used as input-only. By default, this option is on.</p>
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<body>
<h1>Pin List</h1>
<p class="whs1">The Pin List
page lists each pin of your design with its pin type and associated signal.
<!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->Check boxes
at the top of the table allow you to select and deselect which pin types
you want displayed in the table (the default view will display all of
them).</p>
<p class="whs2"><span style="font-weight: bold;"><B>Note:</B></span>
<!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->There is
a <SCRIPT LANGUAGE="JavaScript"><!--
if (navigator.appName=="Netscape")
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//--></SCRIPT> button below the table. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->Click
this button to open a new window describing all of the acronyms used in
the function block table. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->You
can select either brief descriptions or more detailed descriptions by
clicking the &quot;Verbose&quot; button at the top of the window. </p>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">Clicking
on the underscored pin numbers in the first column of the table will open
a new window displaying the pin layout diagram for the selected pin. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->Rolling
your mouse over the colored pin will pop up a tooltip with the signal
name assigned to the pin, the I/O standard, <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->the
I/O style, the slew rate, and/or any constraints assigned to the pin:
</FONT></span>
<p class="whs3"><SCRIPT LANGUAGE="JavaScript"><!--
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//--></SCRIPT></p>
<p class="whs4">Clicking any underscored signal in the
third column of the table will open a new window displaying the equations
for that particular signal.</p>
<p class="whs5">Clicking on the <SCRIPT LANGUAGE="JavaScript"><!--
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//--></SCRIPT>button
at the top of the screen will open a new window with a graphical, top
view of all of the pins: <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}--></p>
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<p class="whs7">They are color-coded as follows:</p>
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<col class="whs10">
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<td width="56.431%" class="whs21">
<p class="whs22">Bidirectional</td></tr>
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<td width="56.431%" class="whs25">
<p class="whs26">Output</td></tr>
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<p class="whs28">Magenta</td>
<td width="56.431%" class="whs29">
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<p class="whs32">Red</td>
<td width="56.431%" class="whs33">
<p class="whs34">VCC</td></tr>
<tr valign=top>
<td width="43.569%" class="whs35">
<p class="whs36">Black</td>
<td width="56.431%" class="whs37">
<p class="whs38">GND</td></tr>
<tr valign=top>
<td width="43.569%" class="whs39">
<p class="whs40">Yellow</td>
<td width="56.431%" class="whs41">
<p class="whs42">TDO</td></tr>
<tr valign=top>
<td width="43.569%" class="whs43">
<p class="whs44">Gray</td>
<td width="56.431%" class="whs45">
<p class="whs46">TDI</td></tr>
<tr valign=top>
<td width="43.569%" class="whs47">
<p class="whs48">White</td>
<td width="56.431%" class="whs49">
<p class="whs50">Unused Pin</td></tr>
<tr valign=top>
<td width="43.569%" class="whs51">
<p class="whs52">Black Outline</td>
<td width="56.431%" class="whs53">
<p class="whs54">No available
Pad</td></tr>
</table>
<p class="whs55">As with the single pin display, rolling
your mouse over any colored pin will pop up a tooltip with the signal
name assigned to the pin, the I/O standard, <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->the
I/O style, the slew rate, and/or any constraints assigned to the pin.</p>
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</head>
<body class="pgBgnd" id="XC95288XL">
<span id="summary" class="pgRef"><h3 align="center">Summary</h3>
<table align="center" width="75%" border="1" cellspacing="0" cellpadding="3">
<tr>
<td width="40%"> <b>Design Name</b>
</td>
<td width="60%"> LAN_IDE_CP</td>
</tr>
<tr>
<td width="40%"> <b>Fitting Status</b>
</td>
<td width="60%"> Successful</td>
</tr>
<tr>
<td width="40%"> <b>Software Version</b>
</td>
<td width="60%"> P.20131013</td>
</tr>
<tr>
<td width="40%"> <b>Device Used</b>
</td>
<td width="60%"> <a href="#" onclick="showDoc('XC95288XL')" onmouseover="window.status='show Device Info'; return true;" onmouseout="window.status=''">XC95288XL-10-TQ144</a>
</td>
</tr>
<tr>
<td width="40%"> <b>Date</b>
</td>
<td width="60%">  2-21-2019, 1:44PM</td>
</tr>
</table></span><br><span id="sumres" class="pgRef"><h5 align="center">RESOURCES SUMMARY</h5>
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
<tr class="pgHeader">
<th width="20%">Macrocells Used</th>
<th width="20%">Pterms Used</th>
<th width="20%">Registers Used</th>
<th width="20%">Pins Used</th>
<th width="20%">Function Block Inputs Used</th>
</tr>
<tr>
<td width="20%" align="center">164/288  (57%)</td>
<td width="20%" align="center">437/1440  (31%)</td>
<td width="20%" align="center">60/288  (21%)</td>
<td width="20%" align="center">112/117  (96%)</td>
<td width="20%" align="center">379/864  (44%)</td>
</tr>
</table></span><br><span id="pinres" class="pgRef"><h5 align="center">PIN RESOURCES</h5>
<table align="center" width="90%" border="0" cellspacing="0" cellpadding="0"><tr>
<td width="50%" valign="top"><table align="center" width="100%" border="1" cellspacing="0" cellpadding="0">
<tr class="pgHeader">
<th width="33%">Signal Type</th>
<th width="33%">Required</th>
<th width="33%">Mapped</th>
</tr>
<tr>
<td width="33%"> Input</td>
<td width="33%" align="center"> 35</td>
<td width="33%" align="center"> 35</td>
</tr>
<tr>
<td width="33%"> Output</td>
<td width="33%" align="center"> 43</td>
<td width="33%" align="center"> 43</td>
</tr>
<tr>
<td width="33%"> Bidirectional</td>
<td width="33%" align="center"> 32</td>
<td width="33%" align="center"> 32</td>
</tr>
<tr>
<td width="33%"> GCK</td>
<td width="33%" align="center"> 1</td>
<td width="33%" align="center"> 1</td>
</tr>
<tr>
<td width="33%"> GTS</td>
<td width="33%" align="center"> 0</td>
<td width="33%" align="center"> 0</td>
</tr>
<tr>
<td width="33%"> GSR</td>
<td width="33%" align="center"> 1</td>
<td width="33%" align="center"> 1</td>
</tr>
</table></td>
<td width="50%" valign="top"><table align="center" width="100%" border="1" cellspacing="0" cellpadding="0">
<tr class="pgHeader">
<th width="33%">Pin Type</th>
<th width="33%">Used</th>
<th width="33%">Total</th>
</tr>
<tr>
<td width="33%"> I/O</td>
<td width="33%" align="center"> 
105</td>
<td width="33%" align="center"> 110</td>
</tr>
<tr>
<td width="33%"> GCK/IO</td>
<td width="33%" align="center"> 2</td>
<td width="33%" align="center"> 3</td>
</tr>
<tr>
<td width="33%"> GTS/IO</td>
<td width="33%" align="center"> 4</td>
<td width="33%" align="center"> 4</td>
</tr>
<tr>
<td width="33%"> GSR/IO</td>
<td width="33%" align="center"> 1</td>
<td width="33%" align="center"> 1</td>
</tr>
</table></td>
</tr></table></span><br><span id="glbres" class="pgRef"><h5 align="center">GLOBAL RESOURCES</h5>
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
<tr>
<td width="50%"> Signal mapped onto global clock net (GCK1)</td>
<td width="50%"> CLK_EXT</td>
</tr>
<tr>
<td width="50%"> Signal mapped onto global output enable net (GSR)</td>
<td width="50%"> RESET</td>
</tr>
</table></span><br><span id="pwrres" class="pgRef"><h5 align="center">POWER DATA</h5>
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
<tr>
<td width="50%"> Macrocells in high performance mode (MCHP)</td>
<td width="50%"> 164</td>
</tr>
<tr>
<td width="50%"> Macrocells in low power mode (MCLP)</td>
<td width="50%"> 0</td>
</tr>
<tr>
<td width="50%"> Total macrocells used (MC)</td>
<td width="50%"> 164</td>
</tr>
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
</tr></table></span></form>
</body>
</html>
@@ -1,205 +0,0 @@
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
<meta name="generator" content="RoboHELP by eHelp Corporation - www.ehelp.com">
<meta name="generator-major-version" content="0.1">
<meta name="generator-minor-version" content="1">
<meta name="filetype" content="kadov">
<meta name="filetype-version" content="1">
<meta name="page-count" content="1">
<meta name="layout-height" content="509">
<meta name="layout-width" content="614">
<meta name="date" content="05 24, 2002 11:22:55 AM">
<meta name="GENERATOR" content="Mozilla/4.79 [en]C-CCK-MCD (Windows NT 5.0; U) [Netscape]">
<title>Summary</title>
<!--(==============================================================)-->
<!--(Document created with RoboEditor. )============================-->
<!--(==============================================================)-->
<!--(Meta)==========================================================-->
<!--(Body)==========================================================-->
</head>
<body>
<h1>
Summary</h1>
<div style="font-size: 10pt;"><span style="font-family: arial, sans-serif;">The
Summary section of the HTML report contains several tables summarizing
the fitting results for your design.</span>
<br>&nbsp;</div>
<span style="font-family: arial, sans-serif; font-size: 10pt;">The <b>Header</b>
table contains the following:&nbsp;</span>
<ul style="list-style: disc;"
type=disc>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">The Design
Name</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">The Fitting
Status, which is one of&nbsp; the following:</span></li>
<ul style="list-style: disc;"
type=disc>
<li class="kadov-p" class="kadov-p">
Successful</span></li>
<li class="kadov-p" class="kadov-p">
Design Rule Checking Failed</span></li>
<li class="kadov-p" class="kadov-p">
Placement Failed</span></li>
<li class="kadov-p" class="kadov-p">
Routing Failed</span></li>
</ul>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">The Software
Version&nbsp;</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">The Device
Used, with a link to a PDF version of the device documentation</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">The Date
and time of completion</span></li>
</ul>
<span style="font-family: arial, sans-serif; font-size: 10pt;">The <b>Resources
Summary</b> table includes:</span><span style="font-size: 10pt;"></span>
<ul style="list-style: disc;"
type=disc>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">The number
and percentage of macrocells used vs total in device&nbsp;</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">The number
and percentage of product terms used vs total in device&nbsp;</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">The number
and percentage of registers used vs total in device&nbsp;</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">The number
and percentage of pins used vs total in device&nbsp;</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">The number
and percentage of function block inputs used vs total in device&nbsp;</span></li>
</ul>
<span style="font-family: arial, sans-serif; font-size: 10pt;">The <b>Pin
Resources</b> table includes two tables:</span><span style="font-size: 10pt;"></span>
<ul style="list-style: disc;"
type=disc>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">The first
table indicates the requirements of the design, broken up by Signal Type.
The number required and the number mapped onto the device are indicated
for each signal type.</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">The second
table gives the total number of each pin type available in the device,
alongwith the number used.</span></li>
</ul>
<span style="font-family: arial, sans-serif; font-size: 10pt;"><i>XPLA3
only</i> - The <b>Local Control Term Resources</b> table lists the local
control term mapping for each function block:</span><span style="font-size: 10pt;"></span>
<ul style="list-style: disc;"
type=disc>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">Each row
lists the local control term mapping for each of the eight control terms,
LCT0-LCT7, in a function block.</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">The control
term mapping can be:</span></li>
<ul style="list-style: disc;"
type=disc>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">ce - clock
enable</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">clk - clock</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">ee - output
enable</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">sr - set/reset</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">uct1 - universal
control term clock</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">uct2 - universal
control term output enable</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">uct3 - universal
control term set</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">uct4 - universal
control term reset</span></li>
</ul>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">Each LCT
can have some subset of the signals above mapped onto them:</span></li>
<ul style="list-style: disc;"
type=disc>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">LCT0 - sr,
oe</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">LCT1 - sr,
oe</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">LCT2 - sr,
oe</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">LCT3 - sr</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">LCT4 - ce,
clk, sr</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">LCT5 - clk,
sr</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">LCT6 - clk,
oe</span></li>
<li class="kadov-p" class="kadov-p">
<span style="font-family: arial, sans-serif; font-size: 10pt;">LCT7 - clk,
uct1/uct2/uct3/uct4</span></li>
</ul>
</ul>
<span style="font-family: arial, sans-serif; font-size: 10pt;">The <b>Global
Resources</b> table indicates the signals used as global signals in the
device.</span><span style="font-size: 10pt;"></span>
<p><span style="font-family: arial, sans-serif; font-size: 10pt;"><i>XC9500/XL/XV
only</i> - The <b>Power Data</b> table indicates the number of macrocells
in standard and low power mode.</span><span style="font-size: 10pt;"></span>
<p><span style="font-family: arial, sans-serif; font-size: 10pt;"><i>XPLA3
only</i> - The <b>Block Resources</b> table indicates the number of function
block control terms used vs available and the number of foldback NANDs
used vs available.</span><span style="font-size: 10pt;"></span>
</body>
</html>
@@ -1,3 +0,0 @@
<html><body>
No Timing Data Available...
</body></html>
@@ -1,10 +0,0 @@
<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
<script src="topnav.js"></script><script src="paths.js"></script>
</head>
<body bgcolor="#FFFFFF" text="#000000"><table width="100%" border="0" cellspacing="0" cellpadding="0" vspace="0" hspace="0">
<tr><td valign="top"><img src="xc9500xl_logo.jpg"></td></tr>
<td height="25" bgcolor="#000000"><img align="center" width="1" height="1" src="blank.gif"></td>
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<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
<html>
<head>
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
<title>genmsg</title>
</head>
<body>
&nbsp;
<br>&nbsp;
<dl>
<dd>
This file is currently being generated. Please recheck the link after some
time for this report data.</dd>
</dl>
</body>
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@@ -67,7 +67,7 @@
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@@ -88,7 +88,7 @@
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@@ -41,7 +41,7 @@
<property xil_pn:name="Bring Out Global Tristate Net as a Port" xil_pn:value="false" xil_pn:valueState="default"/>
<property xil_pn:name="Bus Delimiter" xil_pn:value="&lt;>" xil_pn:valueState="default"/>
<property xil_pn:name="Case" xil_pn:value="Maintain" xil_pn:valueState="default"/>
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<property xil_pn:name="Case Implementation Style" xil_pn:value="None" xil_pn:valueState="default" xil_pn:x_locked="true"/>
<property xil_pn:name="Clock Enable" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Collapsing Input Limit (2-54)" xil_pn:value="54" xil_pn:valueState="default"/>
<property xil_pn:name="Collapsing Pterm Limit (1-90)" xil_pn:value="25" xil_pn:valueState="default"/>
@@ -63,7 +63,7 @@
<property xil_pn:name="Equivalent Register Removal XST" xil_pn:value="true" xil_pn:valueState="default"/>
<property xil_pn:name="Evaluation Development Board" xil_pn:value="None Specified" xil_pn:valueState="default"/>
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@@ -111,7 +111,7 @@
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<property xil_pn:name="Optimization Effort" xil_pn:value="Normal" xil_pn:valueState="default"/>
<property xil_pn:name="Optimization Effort" xil_pn:value="High" xil_pn:valueState="non-default" xil_pn:x_locked="true"/>
<property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default" xil_pn:x_locked="true"/>
<property xil_pn:name="Other CPLD Fitter Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
<property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/>
@@ -1,7 +1,7 @@
<?xml version='1.0' encoding='UTF-8'?>
<report-views version="2.0" >
<header>
<DateModified>2019-02-21T11:22:31</DateModified>
<DateModified>2019-03-02T19:53:28</DateModified>
<ModuleName>LAN_IDE_CP</ModuleName>
<SummaryTimeStamp>Unknown</SummaryTimeStamp>
<SavedFilePath>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/iseconfig/LAN_IDE_CP.xreport</SavedFilePath>
@@ -9,13 +9,13 @@
<ClosedNodesVersion>2</ClosedNodesVersion>
</ClosedNodes>
<SelectedItems>
<SelectedItem>pinlist.ucf (C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/pinlist.ucf)</SelectedItem>
<SelectedItem>LAN_IDE_CP - Behavioral (C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd)</SelectedItem>
</SelectedItems>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
<ViewHeaderState orientation="horizontal" >000000ff0000000000000001000000010000000000000000000000000000000002020000000100000001000000640000015a000000020000000000000000000000000200000064ffffffff0000008100000003000000020000015a0000000100000003000000000000000100000003</ViewHeaderState>
<UserChangedColumnWidths orientation="horizontal" >true</UserChangedColumnWidths>
<CurrentItem>pinlist.ucf (C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/pinlist.ucf)</CurrentItem>
<CurrentItem>LAN_IDE_CP - Behavioral (C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd)</CurrentItem>
</ItemView>
<ItemView engineview="SynthesisOnly" sourcetype="DESUT_VHDL_ARCHITECTURE" guiview="Process" >
<ClosedNodes>
@@ -79,8 +79,8 @@
<SelectedItems/>
<ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
<ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
<ViewHeaderState orientation="horizontal" ></ViewHeaderState>
<ViewHeaderState orientation="horizontal" />
<UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
<CurrentItem></CurrentItem>
<CurrentItem/>
</ItemView>
</Project>