CP and LAN working! Clockport needed to be stopped if FCS='1'
This commit is contained in:
@@ -1,3 +1,4 @@
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;APS00000000000000000000000000000000000000000000000000000000000000000000000000000000
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; ------------------------------------------------------------------------------
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; | Lowlevel Access to memory mapped ENC624J600 in PSP mode |
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; | Henryk Richter <henryk.richter@gmx.net> |
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@@ -15,18 +16,23 @@
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;
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;
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;TODO:
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; - Pattern Matching, MC/MC filtering: Multicast,Broadcast,Unicast(self),MagicPacket,correct CRC,"not me" Unicast
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; - Pattern Matching, MC filtering: Multicast,Broadcast,Unicast(self),MagicPacket,correct CRC,"not me" Unicast
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; - _enc624j6l_RXReset -> won't recover from totally unresponsive chip (but exits gracefully)
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; - RXSTART_INIT = $0c00 -> currently $2000 due to previous location bug
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;
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; enable debugging code block (comment/uncomment, see below)
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;DEBUG EQU 1
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incdir src:baxnet/trunk/source/
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;Temp:Amiga/src/Zorro-LAN-IDE.git/Driver/enc624j6net/
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include "enc624j6net/registers.i"
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include "enc624j6net/macros.i"
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include "debug.i"
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include "hw.i"
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; enable debugging code block
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ifnd DEBUG
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DEBUG EQU 0
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endc
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;
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ADD_4RX EQU 1 ;add 4 to valid RX size (fake CRC), fixes shapeshifter RAW treatment
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_OPT_LONGRESET EQU 0 ;in testing, don't enable
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@@ -116,6 +122,9 @@ ENC_BOARDID EQU 123 ;ZII-IDE-LAN-CP
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XDEF _enc624j6l_bc_mc_filter
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XDEF _enc624j6l_ReadPHY
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XDEF _enc624j6l_WritePHY
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;
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; System includes
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;
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@@ -250,9 +259,9 @@ opendos:
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beq .noframe ;nothing received
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;debug: disable recv
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move.l _boardbase(pc),a0
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moveq #ECON1_RXEN,d0
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CLRREG ECON1,a0,d0
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;move.l _boardbase(pc),a0
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;moveq #ECON1_RXEN,d0
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;CLRREG ECON1,a0,d0
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move.l _boardbase(pc),a0
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lea readframe,a1
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@@ -791,7 +800,7 @@ _enc624j6l_EnableInterrupt:
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move.w d0,($4000,a0)
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lea -$4000(a0),a0
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move #EIE_PKTIE|EIE_INTIE,d0
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move #EIE_PKTIE|EIE_PCFULIE|EIE_INTIE,d0
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SETREG EIE,a0,d0
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moveq #1,d0
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@@ -814,7 +823,7 @@ _enc624j6l_EnableInterrupt:
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; Notes: assumes that init() was called before
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;
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_enc624j6l_EnableGlobalInterrupt:
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move #EIE_INTIE,d0
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move #EIE_PKTIE|EIE_PCFULIE|EIE_INTIE,d0 ; move #EIE_INTIE,d0
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SETREG EIE,a0,d0
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moveq #1,d0
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.rts
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@@ -896,35 +905,32 @@ _enc624j6l_DisableInterrupt:
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; ULONG sigbit
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;
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_enc624j6l_IntServer_List:
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move.l a6,-(sp)
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move.l a1,d0 ;no pointer supplied ? -> return
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beq.s .rts
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beq.s .end
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movem.l d1/A1/a6,-(sp)
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move.l a1,a6
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moveq #0,d1
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.boardloop:
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move.l (a1)+,d0 ;next entry from list
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beq.s .done ;
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move.l d0,a0 ;current board
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move.l (A6)+,d0 ;read magic word
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cmp.l #HW_MAGIC_WORD,D0 ; are we in the right structure?
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bne.s .done
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READREG EIR,a0,d0 ;get interrupt status reg
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and #EIR_PKTIF,d0
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or.l d0,d1
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bra.s .boardloop
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.boardloop:
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move.l (A6)+,d0 ;next entry from list
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beq.s .done ;
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move.l d0,a1 ;current board
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READREG EIR,A1,d0 ;get interrupt status reg
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and #EIR_PKTIF|EIR_PCFULIF,D0
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beq.s .boardloop ;no interrupt here
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or.l d0,D1 ; save if at least one one board has interrupted
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move #EIE_INTIE,D0 ;disable board interrupt until someone enables it again
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CLRREG EIE,A1,d0
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BRA.s .boardloop
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.done:
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tst.w d1
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beq.s .rts
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; clear EIE_INTIE in all active boards directly from here
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.intdis_loop:
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move.l (a6)+,d0
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beq.s .boardsdone
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move.l d0,a1
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move #EIE_INTIE,D0 ;disable board interrupt until someone enables it again
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CLRREG EIE,A1,d0
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bra.s .intdis_loop
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.boardsdone:
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;faster: get from extended Driver board list instead from ZII/ZIII card
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ifne 1
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@@ -960,7 +966,8 @@ _enc624j6l_IntServer_List:
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jsr _LVOSignal(a6)
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.rts
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move.l (sp)+,a6
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movem.l (sp)+,D1/A1/A6
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.end
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moveq #0,d0 ;set Z flag
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rts
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@@ -1062,8 +1069,45 @@ _enc624j6l_CheckLinkChange:
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; Notes: - Doesn't check for Board Pointer (!)
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; - doesn't re-enable RX (!)
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;
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ifne DEBUG
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RXReset_MSG: dc.b "RXReset Head %04lx Tail %04lx NextPacket %04lx ReadPTR %04lx Bytes %04lx",10,0
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endc
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_enc624j6l_RXReset:
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ifne DEBUG
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;print current HW registers to serial
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movem.l d2-d7,-(sp)
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moveq #0,d0
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moveq #0,d1
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moveq #0,d2
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moveq #0,d3
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READREG ERXHEAD,A0,d0
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READREG ERXTAIL,A0,d1
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READREG PNextPacket,a0,d2
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READSRAM a0,d2,d3 ;move (a0,d7.w),d0
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ifeq _OPT_BUFFER_SWAP
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rol.w #8,d3 ;swap pointer to Big Endian
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endc ;d3=next Packet (from receive status vector)
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moveq #2,d5
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add d2,d5 ;increment pointer by one word
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WRAPINDEX d5 ;wrap D4 if beyond buffer
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READSRAM a0,d5,d4 ;receive byte count
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ifeq _OPT_BUFFER_SWAP
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rol.w #8,d4 ;swap pointer to Big Endian
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endc
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WRITEDEBUG RXReset_MSG,d0,d1,d2,d3,d4
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movem.l (sp)+,d2-d7
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endc
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moveq #ECON2_RXRST,d0 ;RX Reset, clears RXEN
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SETREG ECON2,a0,d0 ;
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;moveq #ECON1_RXEN,d0 ;done by RX reset
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@@ -1171,6 +1215,15 @@ _enc624j6l_RecvFrame: ;
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rol.w #8,d0 ;swap pointer to Big Endian
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endc
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; btst #0,d0
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; beq.s .nozerobit
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; nop
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;.nozerobit
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; btst #0,d7
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; beq.s .nozerobit2
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; nop
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;.nozerobit2
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;verify next packet pointer, re-initialize recv if this is invalid
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cmp #RXSTOP_INIT,d0 ;bad pointer (<0 or >end of memory)
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bhi.w .recv_err
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@@ -1259,10 +1312,23 @@ _enc624j6l_RecvFrame: ;
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lea (a0,d7.w),a2 ;read pointer
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ifeq _OPT_BUFFER_SWAP
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btst #1,d7 ;do we have a read address that`s not long aligned?
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beq.s .no_impair
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move.w (a2)+,(a1)+ ;long-align address
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subq #2,d0
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ble.w .end_read ;should not happen (>14 per valid frame)
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moveq #15,d1 ;
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move.l d0,d2 ;total bytes
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and.l d0,d1 ;remainder: max 15 bytes
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lsr.w #4,d2 ;total/16
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addq #2,d0
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bra.s .impair
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.no_impair:
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move.l d0,d2 ;total bytes
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moveq #15,d1 ;
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lsr.w #4,d2 ;total/16
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and.l d0,d1 ;remainder: max 15 bytes
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.impair:
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addq #3,d1 ;remainder, rounded up to +3 bytes
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subq #1,d2 ;dbf
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blt.s .nopt16_read ;less than 16 bytes -> bail out
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@@ -1424,7 +1490,7 @@ _enc624j6l_RecvFrame: ;
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; notes:
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;
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_enc624j6l_TransmitFrame:
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movem.l d2-d5/a2,-(sp)
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movem.l d2-d5/a3,-(sp)
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;---------------- parameter check -------------------------------------
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@@ -1455,33 +1521,60 @@ _enc624j6l_TransmitFrame:
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eor.w #PSwapTX,d2 ;swap buffer
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WRITEREG PNextTX,a0,d2 ;remember pointer (d2 also for ETXST later)
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lea (a0,d2.w),a2 ;write pointer for frame
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lea (a0,d2.w),a3 ;write pointer for frame
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ifeq _OPT_BUFFER_SWAP
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ifd HW_DMA_TX
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move.l a2,d3
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beq.s .no_separate_header
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ifne 1
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move.l -2(a2),(a3)+ ;garbage (2), DstMAC,SrcMAC,Type/Len = 16 Bytes
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move.l 2(a2),(a3)+
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move.l 6(a2),(a3)+
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move.l 10(a2),(a3)+
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moveq #14,d3
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addq #2,d2 ;start pointer behind garbage (2)
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else
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move.l (a2),(a3)+ ;copy DstMAC,SrcMAC,Type/Len = 14 Bytes
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move.l 4(a2),(a3)+
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move.l 8(a2),(a3)+
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move.w 12(a2),(a3)+
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moveq #14,d3
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endc
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.no_separate_header
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endc
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;faster TX when buffer swapping is not necessary
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move.l d0,d4 ;remember length
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moveq #63,d5 ;
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and.l d5,d0 ;remainder of 64 byte copy loop
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move.l d4,d5 ;length in bytes
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ifd HW_DMA_TX
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add.l d3,d4 ;length+header (either 0 or 14)
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endc
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asr.w #6,d5 ;64 byte blocks
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subq.w #1,d5 ;dbf
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blt.s .smallcopy
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bra.s .largecopy_start
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.largecopy:
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move.l d1,(a2)+
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move.l d1,(a3)+
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.largecopy_start:
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rept 15
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move.l (a1)+,(a2)+ ;save to SRAM
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move.l (a1)+,(a3)+ ;save to SRAM
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endr
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move.l (a1)+,d1
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dbf d5,.largecopy
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move.l d1,(a2)+
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move.l d1,(a3)+
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else ;_OPT_BUFFER_SWAP
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ifd HW_DMA_TX
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error "HW_DMA_TX not supported for _OPT_BUFFER_SWAP configuration, disable!"
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endc
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move.w d0,d4 ;still need length later
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endc ;_OPT_BUFFER_SWAP
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@@ -1507,11 +1600,11 @@ _enc624j6l_TransmitFrame:
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rol.w d4,d3
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swap d1
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swap d3
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move.l d1,(a2)+ ;save to SRAM
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move.l d3,(a2)+ ;save to SRAM
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move.l d1,(a3)+ ;save to SRAM
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move.l d3,(a3)+ ;save to SRAM
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else ;_OPT_BUFFER_SWAP
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move.l (a1)+,(a2)+ ;save to SRAM
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move.l (a1)+,(a2)+ ;save to SRAM
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move.l (a1)+,(a3)+ ;save to SRAM
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move.l (a1)+,(a3)+ ;save to SRAM
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endc ;_OPT_BUFFER_SWAP
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dbf d0,.txcopy
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@@ -1546,7 +1639,7 @@ _enc624j6l_TransmitFrame:
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SETREG ECON1,a0,d1 ;
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.err:
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movem.l (sp)+,d2-d5/a2
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movem.l (sp)+,d2-d5/a3
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rts
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ifne _OPT_CHECKLINK_TX
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@@ -1559,6 +1652,7 @@ _enc624j6l_TransmitFrame:
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endc
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;---------------------------------------------------------------------------------------
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;
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; read PHY register (16 Bit)
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@@ -1613,6 +1707,60 @@ _enc624j6l_ReadPHY:
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.err:
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moveq #-1,d0
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rts
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;---------------------------------------------------------------------------------------
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;
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; write PHY register (16 Bit)
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;
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; input: A0 - APTR mmapped board base address
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; D0 - LONG Phy register (5 valid bits)
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; D1 - SHORT value written into PHY reg
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;
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; output: LONG D0 <0 - error (bad register index)
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; - 16 Bit PHY reg contents
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;
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; trash: -
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;
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; notes:
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;
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;
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_enc624j6l_WritePHY:
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cmp.w #31,d0
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bhi.w .err
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bset #8,d0 ;$100 + PHY_REG
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WRITEREG MIREGADR,a0,d0 ;set PHY register address
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WRITEREG MIWR,a0,d1 ;set desired content
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moveq #25,d0 ;25 us delay (at least)
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bsr _enc624j6l_UMinDelay ;
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moveq #100,d1
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.waitloop:
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READREG MISTAT,a0,d0
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btst #0,d0
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beq.s .notbusy
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tst.b $BFE301 ;1 CIA access = 1.4 us
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subq.w #1,d1 ;>165 us exceeded ? -> something is wrong, SPEC says 25.6 us
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blt.s .notbusy ;error
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bra.s .waitloop
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.notbusy
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; moveq #0,d0
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; WRITEREG MICMD,a0,d0 ;cancel write command
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moveq #0,d0
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.ret:
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rts
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.err:
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moveq #-1,d0
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bra.s .ret
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||||
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||||
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||||
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;------------------------------------------------------------------------------------------------
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;------------------------------------------------------------------------------------------------
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;
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@@ -196,17 +196,23 @@ ASM SAVEDS int enc624j6l_RecvFrame( ASMR(a0) void *board ASMREG(a0),
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input: board - mmapped board base address
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buffer - output buffer (should have >=1514 bytes)
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sendsize - size of buffer in bytes ( no CRC appended (!) )
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header - 14 Bytes Ethernet header
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(total frame transmit size = sendsize+14)
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output: <0 - error
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0 - nothing in receive buffer
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>0 - size of received frame
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notes:
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||||
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"header" argument valid only when "HW_DMA_TX" is defined (Makefile)
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*/
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ASM SAVEDS int enc624j6l_TransmitFrame( ASMR(a0) void *board ASMREG(a0),
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ASMR(a1) unsigned char* buffer ASMREG(a1),
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ASMR(d0) short sendsize ASMREG(d0) );
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ASMR(d0) short sendsize ASMREG(d0)
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#ifdef HW_DMA_TX
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,ASMR(a2) unsigned char* header ASMREG(a2)
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#endif
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);
|
||||
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||||
|
||||
/*
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||||
@@ -330,7 +336,7 @@ ASM SAVEDS int enc624j6l_CheckLinkChange( ASMR(a0) void *board ASMREG(a0) );
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||||
Purpose: read PHY register
|
||||
|
||||
input: board - mmapped board base address
|
||||
flags - broadcast,promiscous, multicast
|
||||
phyreg - PHY register to read
|
||||
|
||||
output: <0 - error
|
||||
>=0 - OK
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||||
@@ -340,5 +346,20 @@ ASM SAVEDS int enc624j6l_ReadPHY(
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||||
ASMR(d0) unsigned long phyreg ASMREG(d0) );
|
||||
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||||
|
||||
/*
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||||
Purpose: write PHY register
|
||||
|
||||
input: board - mmapped board base address
|
||||
phyreg - PHY register to read
|
||||
value - value written into PHY reg
|
||||
|
||||
output: <0 - error
|
||||
>=0 - OK
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||||
*/
|
||||
ASM SAVEDS int enc624j6l_WritePHY(
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||||
ASMR(a0) void *board ASMREG(a0),
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||||
ASMR(d0) unsigned long phyreg ASMREG(d0),
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||||
ASMR(d1) unsigned short data ASMREG(d1) );
|
||||
|
||||
|
||||
#endif /* _INC_ENC624J6L_H */
|
||||
|
||||
@@ -51,18 +51,18 @@ void myhw_ControlIntervalTimer( DEVBASEP );
|
||||
|
||||
/* these calls might not run within the context of a process and
|
||||
will be called from varying tasks and without prior init:
|
||||
hw_Find_Boards()
|
||||
hw_Find_Boards() - this one just identifies available HW and returns #boards
|
||||
hw_AllocBoard()
|
||||
hw_ReleaseBoard()
|
||||
hw_GetMacAddress()
|
||||
hw_GetMacAddress() - get default MAC address from board
|
||||
|
||||
these calls are in the context of the server task:
|
||||
hw_Setup() - general init (board allocated already)
|
||||
hw_Shutdown() - general shutdown (board still allocated)
|
||||
hw_Attach() - make hardware ready for action (online)
|
||||
hw_Detach() - put hardware into sleep mode (offline)
|
||||
hw_Setup() - general init (board allocated already)
|
||||
hw_Shutdown() - general shutdown (board still allocated)
|
||||
hw_Attach() - make hardware ready for action (online)
|
||||
hw_Detach() - put hardware into sleep mode (offline)
|
||||
|
||||
hw_recv_sigmask() - get signals for hardware (if any)
|
||||
hw_recv_sigmask() - get signals for hardware (if any, i.e. signal on interrupt)
|
||||
hw_recv_pending() - check for pending receive frames
|
||||
|
||||
hw_recv_frame() - receive one frame
|
||||
@@ -71,10 +71,11 @@ void myhw_ControlIntervalTimer( DEVBASEP );
|
||||
and apply them (called only when no RX/TX
|
||||
in progress)
|
||||
|
||||
hw_config_init() - set defaults for HW
|
||||
hw_config_update() - update config of HW
|
||||
hw_ConfigInit() - set defaults for HW
|
||||
hw_ConfigUpdate() - update config of HW
|
||||
|
||||
hw_get_mac_status() - running parameters
|
||||
hw_change_multicast - re-initialize multicast filter for new address list
|
||||
hw_get_mac_status() - running parameters (optional), S2_DEVICEQUERYEXT
|
||||
*/
|
||||
|
||||
const BYTE exp_name[] = "expansion.library";
|
||||
@@ -274,13 +275,31 @@ ASM SAVEDS void hw_ConfigUpdate( ASMR(a0) DEVBASEP ASMREG(a0),
|
||||
hwd->multicast = 1;
|
||||
}
|
||||
|
||||
/*
|
||||
send a single frame to the hardware:
|
||||
- either fully assembled frame (14 bytes DMAC,SMAC,TYPE followed by payload
|
||||
- or payload in "frame" and 14 byte header in "header"
|
||||
- provide Makefile-level definition of HW_DMA_TX in the latter case
|
||||
|
||||
- note: if you pass "header==NULL" with active HW_DMA_TX definition,
|
||||
the hw_send_frame assumes the header to be present (SANA-II RAW frames) and
|
||||
is handling "frame" as fully assembled frame
|
||||
*/
|
||||
ASM SAVEDS LONG hw_send_frame( ASMR(a0) DEVBASEP ASMREG(a0),
|
||||
ASMR(d0) ULONG unit ASMREG(d0),
|
||||
ASMR(a1) UBYTE *frame ASMREG(a1),
|
||||
ASMR(d1) ULONG framesize ASMREG(d1) )
|
||||
ASMR(d1) ULONG framesize ASMREG(d1)
|
||||
#ifdef HW_DMA_TX
|
||||
,ASMR(a2) UBYTE *header ASMREG(a2)
|
||||
#endif
|
||||
)
|
||||
{
|
||||
enc624j6l_TransmitFrame( db->db_Units[unit].duh_BASE, frame, framesize );
|
||||
/* TX with separate header support ? (optional) */
|
||||
enc624j6l_TransmitFrame( db->db_Units[unit].duh_BASE, frame, framesize
|
||||
#ifdef HW_DMA_TX
|
||||
,header
|
||||
#endif
|
||||
);
|
||||
return 1;
|
||||
}
|
||||
|
||||
@@ -329,14 +348,16 @@ ASM SAVEDS LONG hw_check_link_change( ASMR(a0) DEVBASEP ASMREG(
|
||||
return 1; /* don't signal panic to the outside, everything is under control */
|
||||
}
|
||||
|
||||
/* obtain running parameters of Ethernet MAC: link up/down, Speed, Duplex */
|
||||
/* obtain running parameters of Ethernet MAC: link up/down, Speed, Duplex for
|
||||
SANA-II DeviceQueryExtension (general parameters)
|
||||
*/
|
||||
ASM SAVEDS LONG hw_get_mac_status( ASMR(a0) DEVBASEP ASMREG(a0),
|
||||
ASMR(d0) ULONG unit ASMREG(d0) )
|
||||
{
|
||||
struct HWData *hwd = &db->db_hwdat;
|
||||
APTR boardbase = db->db_Units[unit].duh_BASE;
|
||||
struct HWData *hwd = &db->db_hwdat;
|
||||
APTR boardbase = db->db_Units[unit].duh_BASE;
|
||||
|
||||
LONG ret;
|
||||
LONG ret;
|
||||
LONG phstat3;
|
||||
LONG phstat1;
|
||||
LONG phcon1;
|
||||
@@ -345,8 +366,8 @@ ASM SAVEDS LONG hw_get_mac_status( ASMR(a0) DEVBASEP ASMREG(
|
||||
phstat3 = enc624j6l_ReadPHY( boardbase, PHSTAT3 );
|
||||
phcon1 = enc624j6l_ReadPHY( boardbase, PHCON1 );
|
||||
phstat1 = enc624j6l_ReadPHY( boardbase, PHSTAT1 ); /* read again to see whether link is established */
|
||||
if( ( phstat1 < 0 ) || ( phstat3 < 0 ) )
|
||||
return HW_MAC_INVALID; /* no valid data found */
|
||||
if( ( phstat1 < 0 ) || ( phstat3 < 0 ) )
|
||||
return HW_MAC_INVALID; /* no valid data found */
|
||||
|
||||
/* a) check Link */
|
||||
ret = 0;
|
||||
@@ -358,7 +379,7 @@ ASM SAVEDS LONG hw_get_mac_status( ASMR(a0) DEVBASEP ASMREG(
|
||||
if( phcon1 & PHCON1_ANEN ) /* autonegotiation enabled */
|
||||
ret |= HW_MAC_AUTONEGOTIATION;
|
||||
|
||||
phstat3 = (phstat3>>2)&7; /* get active Speed/Duplex */
|
||||
phstat3 = (phstat3>>2)&7; /* get active Speed/Duplex */
|
||||
switch( phstat3 )
|
||||
{
|
||||
case 6:
|
||||
@@ -385,6 +406,30 @@ ASM SAVEDS LONG hw_get_mac_status( ASMR(a0) DEVBASEP ASMREG(
|
||||
|
||||
}
|
||||
|
||||
/* read PHY register */
|
||||
ASM SAVEDS LONG hw_read_phy( ASMR(a0) DEVBASEP ASMREG(a0),
|
||||
ASMR(d0) ULONG unit ASMREG(d0),
|
||||
ASMR(d1) ULONG reg ASMREG(d1) )
|
||||
{
|
||||
APTR boardbase = db->db_Units[unit].duh_BASE;
|
||||
|
||||
return enc624j6l_ReadPHY( boardbase, reg );
|
||||
}
|
||||
|
||||
/* write PHY register (return -1 in case of error) */
|
||||
ASM SAVEDS LONG hw_write_phy( ASMR(a0) DEVBASEP ASMREG(a0),
|
||||
ASMR(d0) ULONG unit ASMREG(d0),
|
||||
ASMR(d1) ULONG reg ASMREG(d1),
|
||||
ASMR(d2) ULONG value ASMREG(d2) )
|
||||
{
|
||||
APTR boardbase = db->db_Units[unit].duh_BASE;
|
||||
|
||||
return enc624j6l_WritePHY( boardbase, reg, value );
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
ASM SAVEDS LONG hw_change_multicast( ASMR(a0) DEVBASEP ASMREG(a0),
|
||||
ASMR(d0) ULONG unit ASMREG(d0),
|
||||
ASMR(a1) struct List *mcastlist ASMREG(a1) )
|
||||
@@ -404,8 +449,6 @@ ASM SAVEDS LONG hw_change_multicast( ASMR(a0) DEVBASEP ASMREG(
|
||||
|
||||
enc624j6l_bc_mc_filter(boardbase, flags );/* flags & (PIO_INIT_BROAD_CAST|PIO_INIT_MULTI_CAST) ); */
|
||||
|
||||
|
||||
|
||||
return 1;
|
||||
}
|
||||
|
||||
@@ -417,7 +460,9 @@ void myhw_ControlInterrupts( DEVBASEP )
|
||||
|
||||
ObtainSemaphore( &hwd->hwd_Sem ); /* redundant here: server is a single task -> but it looks good :-) */
|
||||
|
||||
flag = 0;
|
||||
hwd->hwd_act_boards[0] = HW_MAGIC_WORD;
|
||||
|
||||
flag = 1;
|
||||
for( i=0 ; i < db->db_NBoards ; i++ )
|
||||
{
|
||||
if( db->db_Units[i].duh_online )
|
||||
@@ -431,7 +476,7 @@ void myhw_ControlInterrupts( DEVBASEP )
|
||||
hwd->hwd_act_boards[flag+2] = (APTR)hwd->hwd_IntSig; /* append sigbit */
|
||||
hwd->hwd_act_boards[flag+3] = (APTR)db->db_SysBase; /* append ExecBase *((APTR*)0x4); */
|
||||
|
||||
if( flag ) /* determine on/off switch */
|
||||
if( flag>1 ) /* determine on/off switch */
|
||||
{
|
||||
/* at least 1 board is online */
|
||||
if( hwd->hwd_Interrupt.is_Data )
|
||||
|
||||
@@ -22,7 +22,7 @@
|
||||
struct HWData {
|
||||
struct Interrupt hwd_Interrupt; /* keep the interrupt at top of HWData !! */
|
||||
struct SignalSemaphore hwd_Sem; /* list locking (global per unit) */
|
||||
APTR hwd_act_boards[MAX_UNITS+1+3]; /* poll all active boards by ptr in interrupt, NULL terminated, followed by SigTask,Sigbit,ExecBase */
|
||||
APTR hwd_act_boards[MAX_UNITS+1+3+1]; /* poll all active boards by ptr in interrupt, MAGIC_WORD INIT, NULL terminated, followed by SigTask,Sigbit,ExecBase */
|
||||
|
||||
ULONG hwd_SigMask; /* signal mask to wait for in server main instance */
|
||||
|
||||
|
||||
Reference in New Issue
Block a user