Added IDE-Disable option
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@@ -3,14 +3,14 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
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--> Parameter TMPDIR set to xst/projnav.tmp
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Total REAL time to Xst completion: 1.00 secs
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Total CPU time to Xst completion: 0.19 secs
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Total REAL time to Xst completion: 0.00 secs
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Total CPU time to Xst completion: 0.13 secs
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--> Parameter xsthdpdir set to xst
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Total REAL time to Xst completion: 1.00 secs
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Total CPU time to Xst completion: 0.19 secs
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Total REAL time to Xst completion: 0.00 secs
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Total CPU time to Xst completion: 0.13 secs
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--> Reading design: LAN_IDE_CP.prj
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@@ -76,19 +76,19 @@ wysiwyg : NO
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* HDL Compilation *
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=========================================================================
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Compiling vhdl file "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd" in Library work.
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Entity <LAN_IDE_CP> compiled.
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Entity <LAN_IDE_CP> (Architecture <Behavioral>) compiled.
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Entity <lan_ide_cp> compiled.
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Entity <lan_ide_cp> (Architecture <behavioral>) compiled.
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=========================================================================
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* Design Hierarchy Analysis *
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=========================================================================
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Analyzing hierarchy for entity <LAN_IDE_CP> in library <work> (architecture <Behavioral>).
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Analyzing hierarchy for entity <LAN_IDE_CP> in library <work> (architecture <behavioral>).
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=========================================================================
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* HDL Analysis *
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=========================================================================
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Analyzing Entity <LAN_IDE_CP> in library <work> (Architecture <Behavioral>).
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Analyzing Entity <LAN_IDE_CP> in library <work> (Architecture <behavioral>).
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Entity <LAN_IDE_CP> analyzed. Unit <LAN_IDE_CP> generated.
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@@ -136,7 +136,7 @@ WARNING:Xst - You have specified state <nop> as a recovery-only state for the sa
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Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 143.
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Found 2-bit register for signal <AUTO_CONFIG_DONE>.
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Found 2-bit register for signal <AUTO_CONFIG_DONE_CYCLE>.
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Found 2-bit adder for signal <AUTO_CONFIG_DONE_CYCLE$share0000> created at line 325.
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Found 2-bit adder for signal <AUTO_CONFIG_DONE_CYCLE$addsub0000> created at line 405.
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Found 1-bit register for signal <autoconfig>.
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Found 1-bit register for signal <cp>.
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Found 8-bit comparator equal for signal <cp$cmp_eq0001> created at line 211.
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@@ -274,14 +274,14 @@ Design Statistics
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# IOs : 116
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Cell Usage :
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# BELS : 651
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# AND2 : 222
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# AND3 : 15
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# BELS : 658
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# AND2 : 224
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# AND3 : 16
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# AND4 : 2
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# GND : 1
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# INV : 213
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# OR2 : 153
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# OR3 : 18
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# OR2 : 158
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# OR3 : 17
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# OR4 : 1
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# XOR2 : 26
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# FlipFlops/Latches : 59
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@@ -298,12 +298,12 @@ Cell Usage :
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=========================================================================
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Total REAL time to Xst completion: 9.00 secs
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Total CPU time to Xst completion: 8.36 secs
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Total REAL time to Xst completion: 8.00 secs
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Total CPU time to Xst completion: 8.48 secs
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-->
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Total memory usage is 340392 kilobytes
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Total memory usage is 340344 kilobytes
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Number of errors : 0 ( 0 filtered)
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Number of warnings : 8 ( 0 filtered)
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