Dominick.Vansevenant/Zorro-LAN-IDE
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Converted logic to all registers high during power up AND reset!

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MHeinrichs
2022-03-08 12:39:34 +01:00
parent 88cdb9fb52
commit 65af379ced
13 changed files with 19433 additions and 17623 deletions
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Logic/LAN_IDE_V2/LAN_IDE_CP.pad
+2 -2
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@@ -1,7 +1,7 @@
Release 8.1i - Fit P.20131013
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
3- 8-2022 12:14PM
3- 8-2022 12:35PM
NOTE: This file is designed to be imported into a spreadsheet program
such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
@@ -160,7 +160,7 @@ P139|A_LAN<11>|O|I/O|OUTPUT|||||||||
P140|A_LAN<8>|O|I/O|OUTPUT|||||||||
P141|VCC||VCCINT||||||||||
P142|A_LAN<9>|O|I/O|OUTPUT|||||||||
P143|RESET|GSR/I|I/O/GSR||||||||||
P143|RESET|I|I/O/GSR|INPUT|||||||||
P144|GND||GND||||||||||
To preserve the pinout above for future design iterations in