Z2-Firmware with working CP and LAN

2019-02-21 13:53:40 +01:00
parent 11c25fe78d
commit 5fc99a4460
140 changed files with 49227 additions and 28406 deletions
@@ -67,12 +67,10 @@
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
-    <transform xil_pn:end_ts="1550612785" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="2647934492491614606" xil_pn:start_ts="1550612764">
+    <transform xil_pn:end_ts="1550743854" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="6322792436244515286" xil_pn:start_ts="1550743833">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="WarningsGenerated"/>
      <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForInputs"/>
-      <status xil_pn:value="InputChanged"/>
      <outfile xil_pn:name="LAN_IDE_CP.lso"/>
      <outfile xil_pn:name="LAN_IDE_CP.ngc"/>
      <outfile xil_pn:name="LAN_IDE_CP.ngr"/>
@@ -86,25 +84,23 @@
      <outfile xil_pn:name="webtalk_pn.xml"/>
      <outfile xil_pn:name="xst"/>
    </transform>
-    <transform xil_pn:end_ts="1545079613" xil_pn:in_ck="176569500195729039" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-8537920303570934858" xil_pn:start_ts="1545079613">
+    <transform xil_pn:end_ts="1550700300" xil_pn:in_ck="176569500195729039" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-8537920303570934858" xil_pn:start_ts="1550700300">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
    </transform>
-    <transform xil_pn:end_ts="1550612793" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1550612785">
+    <transform xil_pn:end_ts="1550743862" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="6932115226421322529" xil_pn:start_ts="1550743854">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
      <outfile xil_pn:name="LAN_IDE_CP.bld"/>
      <outfile xil_pn:name="LAN_IDE_CP.ngd"/>
      <outfile xil_pn:name="LAN_IDE_CP_ngdbuild.xrpt"/>
      <outfile xil_pn:name="_ngo"/>
      <outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
    </transform>
-    <transform xil_pn:end_ts="1550612839" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-1014768965495450326" xil_pn:start_ts="1550612793">
+    <transform xil_pn:end_ts="1550743903" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-1014768965495450326" xil_pn:start_ts="1550743862">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="WarningsGenerated"/>
      <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
      <outfile xil_pn:name="LAN_IDE_CP.gyd"/>
      <outfile xil_pn:name="LAN_IDE_CP.mfd"/>
      <outfile xil_pn:name="LAN_IDE_CP.nga"/>
@@ -118,24 +114,21 @@
      <outfile xil_pn:name="LAN_IDE_CP_html"/>
      <outfile xil_pn:name="LAN_IDE_CP_pad.csv"/>
    </transform>
-    <transform xil_pn:end_ts="1550612842" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1550612839">
+    <transform xil_pn:end_ts="1550743905" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1550743903">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
      <outfile xil_pn:name="LAN_IDE_CP.jed"/>
    </transform>
-    <transform xil_pn:end_ts="1550358728" xil_pn:in_ck="-2520376148396285089" xil_pn:name="TRAN_impactProgrammingTool_CPLD" xil_pn:prop_ck="-3598488201878296819" xil_pn:start_ts="1550358728">
+    <transform xil_pn:end_ts="1550740771" xil_pn:in_ck="-2520376148396285089" xil_pn:name="TRAN_impactProgrammingTool_CPLD" xil_pn:prop_ck="-3598488201878296819" xil_pn:start_ts="1550740771">
      <status xil_pn:value="SuccessfullyRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <status xil_pn:value="OutOfDateForInputs"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
      <status xil_pn:value="InputChanged"/>
    </transform>
    <transform xil_pn:name="TRAN_timRpt">
      <status xil_pn:value="AbortedRun"/>
      <status xil_pn:value="ReadyToRun"/>
      <status xil_pn:value="OutOfDateForInputs"/>
-      <status xil_pn:value="OutOfDateForPredecessor"/>
      <status xil_pn:value="InputAdded"/>
      <status xil_pn:value="InputChanged"/>
    </transform>
@@ -112,7 +112,7 @@
    <property xil_pn:name="Netlist Hierarchy" xil_pn:value="As Optimized" xil_pn:valueState="default"/>
    <property xil_pn:name="Number of Clock Buffers" xil_pn:value="4" xil_pn:valueState="default"/>
    <property xil_pn:name="Optimization Effort" xil_pn:value="Normal" xil_pn:valueState="default"/>
-    <property xil_pn:name="Optimization Goal" xil_pn:value="Speed" xil_pn:valueState="default" xil_pn:x_locked="true"/>
+    <property xil_pn:name="Optimization Goal" xil_pn:value="Area" xil_pn:valueState="non-default" xil_pn:x_locked="true"/>
    <property xil_pn:name="Other CPLD Fitter Command Line Options" xil_pn:value="" xil_pn:valueState="default"/>
    <property xil_pn:name="Other Compiler Options" xil_pn:value="" xil_pn:valueState="default"/>
    <property xil_pn:name="Other Compiler Options Fit" xil_pn:value="" xil_pn:valueState="default"/>
@@ -29,7 +29,7 @@ NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   0

-Total memory usage is 4418704 kilobytes
+Total memory usage is 4418716 kilobytes

 Writing NGD file "LAN_IDE_CP.ngd" ...
 Total REAL time to NGDBUILD completion:  5 sec
@@ -544,3 +544,84 @@ cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt
 XSLTProcess LAN_IDE_CP_build.xml 
 tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
 hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+XSLTProcess LAN_IDE_CP_build.xml 
+tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga 
+hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP 
@@ -53,9 +53,11 @@ DQ<15> S:PIN112
 DQ<1> S:PIN117
 DQ<2> S:PIN120
 DQ<3> S:PIN119
+DQ<4> S:PIN124
 DQ<5> S:PIN121
 DQ<6> S:PIN126
 DQ<7> S:PIN125
+DQ<8> S:PIN128
 DQ<9> S:PIN116
 D<0> S:PIN2
 D<10> S:PIN41
@@ -114,92 +116,91 @@ A<20> S:PIN91
 A<21> S:PIN88
 A<22> S:PIN87
 A<23> S:PIN86
-DQ<8> S:PIN128
-DQ<4> S:PIN124


 ;The remaining section of the .gyd file is for documentation purposes only.
 ;It shows where your internal equations were placed in the last successful fit.

-PARTITION FB1_1 D_Z2_OUT<0> EXP24_ AUTO_CONFIG_Z2_DONE_CYCLE<2> AUTO_CONFIG_Z2_DONE_CYCLE<1>
-		 D_5_IOBUFE D_4_IOBUFE LAN_BASEADR<9> IDE_CS_0_OBUF
-		 LAN_BASEADR<7> IDE_CS_1_OBUF LAN_BASEADR<2> IDE_A_0_OBUF$BUF0
-		 LAN_BASEADR<1> IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0 LAN_BASEADR<15>
-		 IDE_R_OBUF EXP25_
-PARTITION FB2_1 DQ<8>_BUFR.MC A_LAN_4_OBUF A_LAN_7_OBUF IDE_BASEADR<3>
-		 A_LAN_6_OBUF ROM_B_0_OBUF$BUF7 IDE_BASEADR<2> ROM_B_0_OBUF$BUF5
-		 IDE_BASEADR<1> D_6_IOBUFE EXP26_ D_3_IOBUFE
-		 IDE_BASEADR<0> D_7_IOBUFE D_1_IOBUFE DQ_5_IOBUFE/DQ_5_IOBUFE_TRST
-		 D_8_IOBUFE EXP27_
-PARTITION FB3_1 $OpTx$INV$111 IDE_W_OBUF SHUT_UP_Z2<1>/SHUT_UP_Z2<1>_CLKF ROM_B_0_OBUF$BUF10/ROM_B_0_OBUF$BUF10_TRST
-		 CP_WE_QUIRK Z3_ADR_1 Z3_ADR_0 Z3_ADR<9>
-		 Z3_ADR<8> Z3_ADR<7> Z3_ADR<6> Z3_ADR<5>
-		 Z3_ADR<4> ROM_B_0_OBUF$BUF8 ROM_B_0_OBUF$BUF0 Z3_ADR<3>
-		 Z3_ADR<2> EXP28_
-PARTITION FB4_1 IDE_BASEADR<7> D_0_IOBUFE EXP29_ IDE_BASEADR<5>
-		 A_LAN_1_OBUF A_LAN_0_OBUF IDE_BASEADR<4> A_LAN_3_OBUF
-		 CP_BASEADR<7> CP_BASEADR<6> CP_BASEADR<5> A_LAN_2_OBUF
-		 CP_BASEADR<4> A_LAN_5_OBUF CP_BASEADR<2> CP_BASEADR<1>
-		 CP_BASEADR<0> IDE_BASEADR<6>
-PARTITION FB5_1 EXP30_ CP_CS_OBUF EXP31_ EXP32_
-		 ROM_OE_OBUF EXP33_ IDE_ACCESS EXP34_
-		 D_4_IOBUFE/D_4_IOBUFE_TRST D_2_IOBUFE Z3_ADR<10> D_9_IOBUFE
-		 EXP35_ D_10_IOBUFE D_11_IOBUFE EXP36_
+PARTITION FB1_1 EXP22_ EXP23_ Z3_ADR<9> Z3_ADR<8>
+		 D_5_IOBUFE D_4_IOBUFE Z3_ADR<7> IDE_CS_0_OBUF
+		 Z3_ADR<12> IDE_CS_1_OBUF Z3_ADR<11> IDE_A_0_OBUF$BUF0
+		 Z3_ADR<10> IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0 DQ_SWAP
+		 IDE_R_OBUF IDE_ACCESS
+PARTITION FB2_1 $OpTx$FX_DC$74 A_LAN_4_OBUF A_LAN_7_OBUF $OpTx$FX_DC$73
+		 A_LAN_6_OBUF ROM_B_0_OBUF$BUF7 $OpTx$FX_DC$72 ROM_B_0_OBUF$BUF5
+		 SHUT_UP_Z2<2> D_6_IOBUFE SHUT_UP_Z2<1> D_3_IOBUFE
+		 AUTO_CONFIG_Z2_DONE_CYCLE<2> D_7_IOBUFE D_1_IOBUFE AUTO_CONFIG_Z2_DONE_CYCLE<1>
+		 D_8_IOBUFE AUTO_CONFIG_Z2_DONE_CYCLE<0>
+PARTITION FB3_2 IDE_W_OBUF
+PARTITION FB3_14 ROM_B_0_OBUF$BUF8 ROM_B_0_OBUF$BUF0
+PARTITION FB3_18 $OpTx$FX_DC$49
+PARTITION FB4_1 D_Z2_OUT<1> D_0_IOBUFE BUF_D_Z2_OUT<0> BUF_D_Z2_OUT<2>
+		 A_LAN_1_OBUF A_LAN_0_OBUF BUF_D_Z2_OUT<3> A_LAN_3_OBUF
+		 AUTO_CONFIG_Z2_DONE<0> AUTO_CONFIG_Z2_DONE<1> IDE_ENABLE A_LAN_2_OBUF
+		 IDE_R_S A_LAN_5_OBUF IDE_W_S ROM_OE_S
+		 CP_RD_S $OpTx$FX_DC$77
+PARTITION FB5_1 EXP24_ CP_CS_OBUF EXP25_ EXP26_
+		 ROM_OE_OBUF
+PARTITION FB5_9 Z3_DATA<6>/Z3_DATA<6>_TRST D_2_IOBUFE $OpTx$FX_SC$85 D_9_IOBUFE
+		 $OpTx$FX_DC$86 D_10_IOBUFE D_11_IOBUFE D_9_IOBUFE/D_9_IOBUFE_TRST
 		 D_12_IOBUFE AUTOCONFIG_Z2_ACCESS
-PARTITION FB6_1 LAN_A_INIT<3> ROM_B_0_OBUF$BUF6 A_LAN_12_OBUF LAN_IRQ_D0
-		 A_LAN_13_OBUF A_LAN_10_OBUF Z3_ADR<13> A_LAN_11_OBUF
-		 Z3_ADR<12> A_LAN_8_OBUF Z3_ADR<11> LAN_WR_RST
-		 LAN_RST_SM_FSM_FFd3 A_LAN_9_OBUF LAN_RST_SM_FSM_FFd2 LAN_RST_SM_FSM_FFd1
-		 LAN_IRQ_OUT LAN_D_INIT<8>
-PARTITION FB7_1 IDE_R_S SHUT_UP_Z2<0> D_13_IOBUFE AUTO_CONFIG_Z2_DONE_CYCLE<0>
-		 D_14_IOBUFE EXP37_ AUTO_CONFIG_Z2_DONE<0> EXP38_
-		 EXP39_ D_Z2_OUT<3> EXP40_ D_15_IOBUFE
-		 EXP41_ EXP42_ D_Z2_OUT<2> EXP43_
-		 D_Z2_OUT<1> EXP44_
-PARTITION FB8_1 EXP45_ DQ_12_IOBUFE DQ_14_IOBUFE EXP46_
-		 LAN_WRH_OBUF LAN_BASEADR<8> LAN_BASEADR<6> LAN_CS_OBUF
-		 LAN_BASEADR<5> LAN_RD_OBUF LAN_BASEADR<4> LAN_BASEADR<3>
-		 LAN_BASEADR<14> LAN_BASEADR<13> LAN_BASEADR<0> CP_BASEADR<3>
-		 EXP47_ SHUT_UP_Z2<1>
-PARTITION FB9_1 EXP48_ LAN_SM_FSM_FFd1 DQ_DATA<9> EXP49_
-		 EXP50_ DQ_DATA<5> EXP51_ EXP52_
-		 Z3_A_LOW LAN_SM_FSM_FFd2 Z3_DATA<0> LAN_READY
-		 LAN_RD_S Z3_DATA<1> LAN_SM_FSM_FFd4 LAN_WRH_S
-		 Z3_DATA<2> LAN_WRL_S
-PARTITION FB10_1 DQ<4>_BUFR.MC DQ_1_IOBUFE DQ_0_IOBUFE EXP53_
-		 DQ_3_IOBUFE DQ_2_IOBUFE EXP54_ DQ_5_IOBUFE
-		 EXP55_ _19_ DQ_7_IOBUFE DQ_6_IOBUFE
-		 EXP56_ _18_ EXP57_ EXP58_
-		 DQ_10_IOBUFE EXP59_
+PARTITION FB6_1 EXP27_ ROM_B_0_OBUF$BUF6 A_LAN_12_OBUF
+PARTITION FB6_5 A_LAN_13_OBUF A_LAN_10_OBUF
+PARTITION FB6_8 A_LAN_11_OBUF
+PARTITION FB6_10 A_LAN_8_OBUF
+PARTITION FB6_13 $OpTx$FX_DC$46 A_LAN_9_OBUF EXP28_ EXP29_
+		 Mcompar_LAN_ACCESS_cmp_eq0000_AEB_or0000/Mcompar_LAN_ACCESS_cmp_eq0000_AEB_or0000_D2 EXP30_
+PARTITION FB7_2 D_Z2_OUT<0> D_13_IOBUFE IDE_BASEADR<4> D_14_IOBUFE
+		 IDE_BASEADR<3> IDE_BASEADR<2> IDE_BASEADR<1> IDE_BASEADR<0>
+		 CP_BASEADR<7> CP_BASEADR<6> D_15_IOBUFE CP_BASEADR<5>
+		 CP_BASEADR<4> CP_BASEADR<3> CP_BASEADR<2> CP_BASEADR<1>
+		 CP_BASEADR<0>
+PARTITION FB8_2 DQ_12_IOBUFE DQ_14_IOBUFE
+PARTITION FB8_5 LAN_WRH_OBUF
+PARTITION FB8_7 LAN_BASEADR<6> LAN_CS_OBUF LAN_BASEADR<5> LAN_RD_OBUF
+		 LAN_BASEADR<4> LAN_BASEADR<3> LAN_BASEADR<2> LAN_BASEADR<15>
+		 LAN_BASEADR<14> LAN_BASEADR<13> LAN_BASEADR<11> LAN_BASEADR<10>
+		
+PARTITION FB9_1 LAN_SM_RST LAN_READY LAN_IRQ_D0 LAN_D_INIT<8>
+		 LAN_D_INIT<1> LAN_A_INIT<6> CP_WE_S BUF_LAN_D_INIT<1>
+		 LAN_WR_RST LAN_RST_SM_FSM_FFd3 Z3_DATA<0> LAN_RST_SM_FSM_FFd2
+		 LAN_RST_SM_FSM_FFd1 Z3_DATA<1> LAN_IRQ_OUT LAN_CS_RST
+		 Z3_DATA<2> AUTO_CONFIG_Z2_DONE<2>
+PARTITION FB10_1 LAN_A_INIT<3> DQ_1_IOBUFE DQ_0_IOBUFE $OpTx$FX_DC$65
+		 DQ_3_IOBUFE DQ_2_IOBUFE $OpTx$FX_SC$67 DQ_5_IOBUFE
+		 $OpTx$FX_DC$78 DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE
+		 DQ_DATA<8> DQ_8_IOBUFE DQ_DATA<2> DQ_DATA<10>
+		 DQ_10_IOBUFE DQ_DATA<0>
 PARTITION FB11_1 Z3_DATA<30> Z3_DATA<29> Z3_DATA<3> Z3_DATA<28>
-		 Z3_DATA<4> Z3_DATA<27> Z3_DATA<22> Z3_DATA<21>
-		 Z3_DATA<20> Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF9
-		 Z3_DATA<19> ROM_B_0_OBUF EXP60_ DQ_DATA<8>
-		 CP_WE_OBUF DQ_DATA<0>
-PARTITION FB12_1 LAN_SM_RST ROM_B_0_OBUF$BUF4 LAN_INT_ENABLE EXP61_
-		 DQ_15_IOBUFE LAN_BASEADR<11> LAN_BASEADR<10> DQ_13_IOBUFE
-		 EXP62_ DQ_11_IOBUFE EXP63_ DQ_9_IOBUFE
-		 EXP64_ EXP65_ EXP66_ DQ_SWAP
-		 EXP67_ LAN_BASEADR<12>
-PARTITION FB13_1 EXP68_ CP_RD_OBUF Z3_DATA<31> EXP69_
-		 LAN_SM_FSM_FFd3 DQ_DATA<4> EXP70_ Z3_DATA<7>
-		 EXP71_ EXP72_ DQ_DATA<3> DQ_DATA<13>
-		 EXP73_ LAN_WRL_OBUF Z3_DATA<23> EXP74_
-		 DQ_DATA<11> DQ_DATA<12>
-PARTITION FB14_1 CONFIG_READY AUTO_CONFIG_Z2_DONE<1> ROM_B_0_OBUF$BUF2 AUTO_CONFIG_Z2_DONE<2>
-		 CP_RD_S CP_WE_S IDE_ENABLE IDE_W_S
-		 LAN_A_INIT<6> LAN_CS_RST CFOUT_OBUF LAN_D_INIT<1>
-		 ROM_OE_S SLAVE_OBUF ROM_B_0_OBUF$BUF1 EXP75_
-		 LAN_ACCESS EXP76_
-PARTITION FB15_1 DQ_DATA<6> DQ_DATA<7> EXP77_ EXP78_
-		 EXP79_ EXP80_ DQ_DATA<1> DQ_DATA<14>
-		 EXP81_ DQ_DATA<15> EXP82_ ROM_B_0_OBUF$BUF10
+		 Z3_DATA<4> Z3_DATA<27> Z3_DATA<23> Z3_DATA<22>
+		 Z3_DATA<21> Z3_DATA<5> Z3_DATA<6> ROM_B_0_OBUF$BUF9
+		 Z3_DATA<20> ROM_B_0_OBUF Z3_DATA<19> LAN_SM_FSM_FFd3
+		 CP_WE_OBUF Z3_DATA<31>
+PARTITION FB12_1 LAN_WRL_S ROM_B_0_OBUF$BUF4
+PARTITION FB12_5 DQ_15_IOBUFE
+PARTITION FB12_8 DQ_13_IOBUFE
+PARTITION FB12_10 DQ_11_IOBUFE
+PARTITION FB12_12 DQ_9_IOBUFE LAN_INT_ENABLE DQ_DATA<9> DQ_DATA<7>
+		 DQ_DATA<3> DQ_DATA<1> DQ_DATA<15>
+PARTITION FB13_2 CP_RD_OBUF
+PARTITION FB13_4 $OpTx$FX_DC$114 SHUT_UP_Z2<0> LAN_ACCESS D_Z2_OUT<3>
+		 Z3_DATA<7> LAN_BASEADR<9> LAN_BASEADR<8> LAN_BASEADR<7>
+		 LAN_BASEADR<1> LAN_BASEADR<12> LAN_WRL_OBUF LAN_BASEADR<0>
+		 IDE_BASEADR<7> IDE_BASEADR<6> IDE_BASEADR<5>
+PARTITION FB14_1 ROM_B_0_OBUF$BUF2/ROM_B_0_OBUF$BUF2_TRST $OpTx$FX_DC$95 ROM_B_0_OBUF$BUF2 SHUT_UP_Z2<2>/SHUT_UP_Z2<2>_CLKF
+		 DQ_8_IOBUFE/DQ_8_IOBUFE_TRST CP_WE_QUIRK Z3_ADR_1 Z3_ADR_0
+		 Z3_ADR<6> Z3_ADR<5> CFOUT_OBUF Z3_ADR<4>
+		 Z3_ADR<3> SLAVE_OBUF ROM_B_0_OBUF$BUF1 Z3_ADR<2>
+		 Z3_ADR<13> D_Z2_OUT<2>
+PARTITION FB15_1 DQ_DATA<12> DQ_DATA<13> DQ_DATA<14> DQ_DATA<4>
+		 DQ_DATA<5> DQ_DATA<6> BUF_LAN_READY LAN_WRH_S
+		 $OpTx$FX_DC$59 $OpTx$FX_DC$106 $OpTx$FX_DC$99 ROM_B_0_OBUF$BUF10
 		
-PARTITION FB15_14 Z3_DATA<15> Z3_DATA<14> EXP83_ Z3_DATA<13>
-		 EXP84_
-PARTITION FB16_1 EXP85_ Z3_DATA<12> Z3_DATA<11>
-PARTITION FB16_5 Z3_DATA<26> Z3_DATA<10> Z3_DATA<25> Z3_DATA<9>
-		 Z3_DATA<24> ROM_B_0_OBUF$BUF3 Z3_DATA<8> Z3_DATA<18>
-		 Z3_DATA<17> Z3_DATA<16> EXP86_ DQ_DATA<10>
-		 DQ_DATA<2> EXP87_
+PARTITION FB15_14 Z3_DATA<15> Z3_DATA<14>
+PARTITION FB15_17 Z3_DATA<13> EXP31_
+PARTITION FB16_1 Z3_DATA<26> Z3_DATA<12> Z3_DATA<11> Z3_DATA<25>
+		 Z3_DATA<24> Z3_DATA<10> Z3_DATA<18> Z3_DATA<9>
+		 Z3_DATA<17> ROM_B_0_OBUF$BUF3 Z3_DATA<8> LAN_RD_S
+		 LAN_SM_FSM_FFd2 Z3_A_LOW DQ_DATA<11> LAN_SM_FSM_FFd4
+		 LAN_SM_FSM_FFd1 Z3_DATA<16>

@@ -1,7 +1,7 @@
 Release 8.1i - Fit P.20131013
 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved

- 2-20-2019 11:05PM
+ 2-21-2019 11:26AM

 NOTE: This file is designed to be imported into a spreadsheet program
 such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
@@ -55,7 +55,7 @@ XOR Preserve                       : YES
 Equivalent register Removal        : YES

 ---- General Options
-Optimization Goal                  : Speed
+Optimization Goal                  : Area
 Optimization Effort                : 1
 Keep Hierarchy                     : Yes
 Netlist Hierarchy                  : As_Optimized
@@ -91,7 +91,6 @@ Analyzing hierarchy for entity <LAN_IDE_CP> in library <work> (architecture <beh
 *                            HDL Analysis                               *
 =========================================================================
 Analyzing Entity <LAN_IDE_CP> in library <work> (Architecture <behavioral>).
-INFO:Xst:2679 - Register <AUTOCONFIG_Z3_ACCESS> in unit <LAN_IDE_CP> has a constant value of 0 during circuit operation. The register is replaced by logic.
 Entity <LAN_IDE_CP> analyzed. Unit <LAN_IDE_CP> generated.


@@ -112,15 +111,13 @@ Synthesizing Unit <LAN_IDE_CP>.
    Related source file is "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd".
 WARNING:Xst:647 - Input <IDE_WAIT> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
 WARNING:Xst:647 - Input <MTCR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
-WARNING:Xst:646 - Signal <SHUT_UP_Z2<2>> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
-WARNING:Xst:646 - Signal <AUTOCONFIG_Z3_ACCESS> is assigned but never used. This unconnected signal will be trimmed during the optimization process.
 INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
    Found finite state machine <FSM_0> for signal <LAN_SM>.
    -----------------------------------------------------------------------
-    | States             | 12                                             |
-    | Transitions        | 17                                             |
-    | Inputs             | 3                                              |
-    | Outputs            | 12                                             |
+    | States             | 13                                             |
+    | Transitions        | 19                                             |
+    | Inputs             | 4                                              |
+    | Outputs            | 14                                             |
    | Clock              | CLK_EXT                   (rising_edge)        |
    | Reset              | LAN_SM_RST                (positive)           |
    | Reset type         | asynchronous                                   |
@@ -168,31 +165,30 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
    Found 1-bit tristate buffer for signal <A<10>>.
    Found 1-bit tristate buffer for signal <A<9>>.
    Found 1-bit tristate buffer for signal <A<8>>.
-    Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 178.
+    Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 177.
    Found 3-bit register for signal <AUTO_CONFIG_Z2_DONE>.
    Found 3-bit register for signal <AUTO_CONFIG_Z2_DONE_CYCLE>.
    Found 1-bit register for signal <AUTOCONFIG_Z2_ACCESS>.
-    Found 1-bit register for signal <CONFIG_READY>.
    Found 1-bit register for signal <CP_ACCESS>.
-    Found 8-bit comparator equal for signal <CP_ACCESS$cmp_eq0000> created at line 292.
+    Found 8-bit comparator equal for signal <CP_ACCESS$cmp_eq0000> created at line 290.
    Found 8-bit register for signal <CP_BASEADR>.
    Found 1-bit register for signal <CP_RD_S>.
    Found 1-bit register for signal <CP_WE_QUIRK>.
    Found 1-bit register for signal <CP_WE_S>.
    Found 4-bit register for signal <D_Z2_OUT>.
-    Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 645.
+    Found 4-bit comparator less for signal <DQ$cmp_lt0000> created at line 638.
    Found 16-bit register for signal <DQ_DATA>.
    Found 1-bit register for signal <DQ_SWAP>.
-    Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 263.
+    Found 2-bit comparator less for signal <DQ_SWAP$cmp_lt0000> created at line 261.
    Found 1-bit register for signal <IDE_ACCESS>.
-    Found 8-bit comparator equal for signal <IDE_ACCESS$cmp_eq0000> created at line 299.
+    Found 8-bit comparator equal for signal <IDE_ACCESS$cmp_eq0000> created at line 297.
    Found 8-bit register for signal <IDE_BASEADR>.
    Found 1-bit register for signal <IDE_ENABLE>.
    Found 1-bit register for signal <IDE_R_S>.
    Found 1-bit register for signal <IDE_W_S>.
    Found 14-bit register for signal <LAN_A_INIT>.
    Found 1-bit register for signal <LAN_ACCESS>.
-    Found 16-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 262.
+    Found 16-bit comparator equal for signal <LAN_ACCESS$cmp_eq0000> created at line 260.
    Found 16-bit register for signal <LAN_BASEADR>.
    Found 1-bit register for signal <LAN_CS_RST>.
    Found 16-bit register for signal <LAN_D_INIT>.
@@ -201,13 +197,13 @@ INFO:Xst:1799 - State start_read_upper is never reached in FSM <LAN_SM>.
    Found 1-bit register for signal <LAN_IRQ_OUT>.
    Found 1-bit register for signal <LAN_RD_S>.
    Found 1-bit register for signal <LAN_READY>.
-    Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 406.
+    Found 2-bit comparator less for signal <LAN_SM$cmp_lt0000> created at line 387.
    Found 1-bit register for signal <LAN_SM_RST>.
    Found 1-bit register for signal <LAN_WR_RST>.
    Found 1-bit register for signal <LAN_WRH_S>.
    Found 1-bit register for signal <LAN_WRL_S>.
    Found 1-bit register for signal <ROM_OE_S>.
-    Found 2-bit register for signal <SHUT_UP_Z2<1:0>>.
+    Found 3-bit register for signal <SHUT_UP_Z2>.
    Found 1-bit register for signal <Z3_A_LOW>.
    Found 14-bit register for signal <Z3_ADR>.
    Found 32-bit register for signal <Z3_DATA>.
@@ -267,17 +263,18 @@ Optimizing FSM <LAN_SM/FSM> on signal <LAN_SM[1:4]> with compact encoding.
 -------------------------------
 nop               | 0000
 start_read_upper  | unreached
- wait_read_upper   | 0101
- end_read_upper    | 1110
- start_read_lower  | 0001
- wait_read_lower   | 0011
- end_read_lower    | 0010
- start_write_upper | 1101
- wait_write_upper  | 0111
- end_write_upper   | 0110
- start_write_lower | 1001
- wait_write_lower  | 1011
- end_write_lower   | 1010
+ wait_read_upper   | 0001
+ end_read_upper    | 1010
+ start_read_lower  | 0101
+ wait_read_lower   | 0111
+ end_read_lower    | 0110
+ start_write_upper | 1001
+ wait_write_upper  | 0011
+ end_write_upper   | 0010
+ start_write_lower | 1101
+ wait_write_lower  | 1111
+ end_write_lower   | 1110
+ config_rw         | 0100
 -------------------------------
 WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <13>. This FF/Latch will be trimmed during the optimization process.
 WARNING:Xst:1293 - FF/Latch <0> has a constant value of 1 in block <12>. This FF/Latch will be trimmed during the optimization process.
@@ -344,10 +341,12 @@ INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_8> in Unit <LAN_IDE_CP> is equivalent t
 INFO:Xst:2261 - The FF/Latch <LAN_D_INIT_1> in Unit <LAN_IDE_CP> is equivalent to the following 2 FFs/Latches, which will be removed : <LAN_D_INIT_4> <LAN_D_INIT_9> 

 Optimizing unit <LAN_IDE_CP> ...
-  implementation constraint: INIT=s	 : SHUT_UP_Z2_0
-  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_CYCLE_0
-  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_1
+  implementation constraint: INIT=s	 : SHUT_UP_Z2_2
  implementation constraint: INIT=s	 : SHUT_UP_Z2_1
+  implementation constraint: INIT=s	 : SHUT_UP_Z2_0
+  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_CYCLE_2
+  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_1
+  implementation constraint: INIT=r	 : LAN_INT_ENABLE
  implementation constraint: INIT=s	 : D_Z2_OUT_3
  implementation constraint: INIT=s	 : LAN_A_INIT_3
  implementation constraint: INIT=s	 : D_Z2_OUT_2
@@ -358,8 +357,8 @@ Optimizing unit <LAN_IDE_CP> ...
  implementation constraint: INIT=r	 : LAN_D_INIT_1
  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_0
  implementation constraint: INIT=r	 : LAN_D_INIT_8
-  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_CYCLE_2
  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_CYCLE_1
+  implementation constraint: INIT=r	 : AUTO_CONFIG_Z2_DONE_CYCLE_0
  implementation constraint: INIT=r	 : LAN_RST_SM_FSM_FFd1
  implementation constraint: INIT=r	 : LAN_RST_SM_FSM_FFd2
  implementation constraint: INIT=r	 : LAN_RST_SM_FSM_FFd3
@@ -386,7 +385,7 @@ Final Results
 RTL Top Level Output File Name     : LAN_IDE_CP.ngr
 Top Level Output File Name         : LAN_IDE_CP
 Output Format                      : NGC
-Optimization Goal                  : Speed
+Optimization Goal                  : Area
 Keep Hierarchy                     : Yes
 Target Technology                  : XC9500XL CPLDs
 Macro Preserve                     : YES
@@ -398,23 +397,20 @@ Design Statistics
 # IOs                              : 117

 Cell Usage :
-# BELS                             : 1283
-#      AND2                        : 418
-#      AND3                        : 44
-#      AND4                        : 15
-#      AND5                        : 1
-#      AND8                        : 4
+# BELS                             : 989
+#      AND2                        : 369
+#      AND3                        : 16
 #      GND                         : 1
-#      INV                         : 451
-#      OR2                         : 277
-#      OR3                         : 20
-#      OR4                         : 2
-#      XOR2                        : 50
+#      INV                         : 288
+#      OR2                         : 263
+#      OR3                         : 16
+#      OR4                         : 3
+#      XOR2                        : 33
 # FlipFlops/Latches                : 141
 #      FD                          : 4
-#      FDC                         : 21
+#      FDC                         : 20
 #      FDCE                        : 7
-#      FDP                         : 41
+#      FDP                         : 42
 #      FDPE                        : 68
 # IO Buffers                       : 115
 #      IBUF                        : 24
@@ -425,13 +421,13 @@ Cell Usage :


 Total REAL time to Xst completion: 19.00 secs
-Total CPU time to Xst completion: 19.00 secs
+Total CPU time to Xst completion: 18.77 secs
 
 --> 

-Total memory usage is 4534760 kilobytes
+Total memory usage is 4534808 kilobytes

 Number of errors   :    0 (   0 filtered)
-Number of warnings :   48 (   0 filtered)
-Number of infos    :   11 (   0 filtered)
+Number of warnings :   46 (   0 filtered)
+Number of infos    :   10 (   0 filtered)

@@ -1,177 +1,172 @@
+TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<0>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<0>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<0>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<0>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<0>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<0>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<0>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<0>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<0>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<0>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<0>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<0>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<0>.CE:400
 TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:Z3_DATA<10>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<10>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:Z3_DATA<10>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<10>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<10>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<10>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<10>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<10>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<10>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<10>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<10>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<10>.CE:400
 TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:Z3_DATA<11>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<11>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:Z3_DATA<11>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<11>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<11>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<11>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<11>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<11>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<11>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<11>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<11>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<11>.CE:400
 TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:Z3_DATA<12>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<12>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<12>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:Z3_DATA<12>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<12>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<12>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<12>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<12>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<12>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<12>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<12>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<12>.CE:400
 TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:Z3_DATA<13>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<13>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:Z3_DATA<13>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<13>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<13>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<13>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<13>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<13>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<13>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<13>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<13>.CE:400
 TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:Z3_DATA<14>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<14>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:Z3_DATA<14>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<14>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<14>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<14>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<14>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<14>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<14>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<14>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<14>.CE:400
 TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:Z3_DATA<15>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<15>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:Z3_DATA<15>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<15>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<15>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<15>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<15>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<15>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<15>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<15>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<15>.CE:400
+TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<1>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:Z3_DATA<1>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<1>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<1>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<1>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<1>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<1>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<1>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<1>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<1>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<1>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<1>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<1>.CE:400
 TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:Z3_DATA<2>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:Z3_DATA<2>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:Z3_DATA<2>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:Z3_DATA<2>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<2>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<2>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<2>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<2>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<2>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<2>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<2>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<2>.CE:400
 TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:Z3_DATA<3>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:Z3_DATA<3>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:Z3_DATA<3>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:Z3_DATA<3>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<3>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<3>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<3>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<3>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<3>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<3>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<3>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<3>.CE:400
 TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:Z3_DATA<4>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:Z3_DATA<4>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<4>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:Z3_DATA<4>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:Z3_DATA<4>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<4>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<4>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<4>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<4>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<4>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<4>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<4>.CE:400
 TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:Z3_DATA<5>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:Z3_DATA<5>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:Z3_DATA<5>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:Z3_DATA<5>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<5>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<5>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<5>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<5>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<5>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<5>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<5>.CE:400
 TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:Z3_DATA<6>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:Z3_DATA<6>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:Z3_DATA<6>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:Z3_DATA<6>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<6>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<6>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<6>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<6>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<6>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<6>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<6>.CE:400
 TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:Z3_DATA<7>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<7>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:Z3_DATA<7>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<7>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<7>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<7>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<7>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<7>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<7>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<7>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<7>.CE:400
+TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<8>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<8>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<8>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<8>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<8>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<8>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<8>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<8>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<8>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<8>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<8>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<8>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<8>.CE:400
+TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<9>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:Z3_DATA<9>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<9>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<9>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<9>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<9>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<9>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<9>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<9>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<9>.CE:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<9>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<9>.CE:400
-TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:LAN_INT_ENABLE.D:400
-TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:LAN_INT_ENABLE.D:400
-TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:LAN_INT_ENABLE.D:400
-TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:LAN_INT_ENABLE.D:400
-TS_CLK_EXT:FROM:LAN_INT_ENABLE.Q:TO:LAN_INT_ENABLE.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<9>.CE:400
 TS_CLK_EXT:FROM:LAN_IRQ_D0.Q:TO:LAN_IRQ_OUT.D:400
 TS_CLK_EXT:FROM:LAN_IRQ_OUT.Q:TO:LAN_IRQ_OUT.D:400
+TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<16>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<16>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<16>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<16>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<16>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<16>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<16>.SETF:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<16>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<16>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<16>.CE:400
+TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<17>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:Z3_DATA<17>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<17>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<17>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<17>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<17>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<17>.SETF:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<17>.CE:400
@@ -228,19 +223,19 @@ TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<23>.SETF:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<23>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<23>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<23>.CE:400
+TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<24>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:Z3_DATA<24>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:Z3_DATA<24>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:Z3_DATA<24>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:Z3_DATA<24>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<8>.Q:TO:Z3_DATA<24>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<24>.SETF:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<24>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<24>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<24>.CE:400
+TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<25>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:Z3_DATA<25>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:Z3_DATA<25>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:Z3_DATA<25>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:Z3_DATA<25>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:Z3_DATA<25>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<25>.SETF:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<25>.CE:400
@@ -289,34 +284,26 @@ TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<30>.SETF:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<30>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<30>.CE:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<30>.CE:400
-TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:Z3_DATA<31>.D:400
-TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<31>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:Z3_DATA<31>.D:400
-TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<31>.D:400
-TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<31>.SETF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<31>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<31>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<31>.CE:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd3.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd3.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd3.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd3.D:400
-TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd3.RSTF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd4.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd4.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd4.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd4.D:400
-TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd4.RSTF:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd2.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd2.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd2.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd2.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd2.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd2.RSTF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd1.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd1.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd4.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd4.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd4.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd4.D:400
+TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd4.RSTF:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd1.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd1.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd1.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd1.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd1.RSTF:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_SM_FSM_FFd3.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_SM_FSM_FFd3.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_SM_FSM_FFd3.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_SM_FSM_FFd3.D:400
+TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_SM_FSM_FFd3.RSTF:400
 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
@@ -326,211 +313,231 @@ TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
-TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_D_INIT<1>.D:400
-TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_D_INIT<1>.D:400
-TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<1>.D:400
-TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<8>.D:400
-TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_D_INIT<8>.D:400
-TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_D_INIT<8>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:DQ_DATA<0>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<0>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<0>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<0>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<0>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<0>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:DQ_DATA<0>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:DQ_DATA<0>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:DQ_DATA<0>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:DQ_DATA<0>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<0>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:DQ_DATA<0>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:DQ_DATA<0>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<0>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<10>.Q:TO:DQ_DATA<10>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<10>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<10>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<10>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<10>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<10>.D:400
-TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:DQ_DATA<10>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:DQ_DATA<10>.D:400
+TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:DQ_DATA<10>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<10>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:DQ_DATA<10>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:DQ_DATA<10>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:DQ_DATA<10>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:DQ_DATA<10>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<10>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<11>.Q:TO:DQ_DATA<11>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<11>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<11>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<11>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<11>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<11>.D:400
-TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:DQ_DATA<11>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:DQ_DATA<11>.D:400
+TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:DQ_DATA<11>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<11>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:DQ_DATA<11>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:DQ_DATA<11>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:DQ_DATA<11>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:DQ_DATA<11>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<11>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<12>.Q:TO:DQ_DATA<12>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<12>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<12>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<12>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<12>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<12>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<12>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:DQ_DATA<12>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:DQ_DATA<12>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<12>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<12>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:DQ_DATA<12>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:DQ_DATA<12>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:DQ_DATA<12>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:DQ_DATA<12>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<12>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<13>.Q:TO:DQ_DATA<13>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<13>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<13>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<13>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<13>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<13>.D:400
-TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:DQ_DATA<13>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:DQ_DATA<13>.D:400
+TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:DQ_DATA<13>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<13>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:DQ_DATA<13>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:DQ_DATA<13>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:DQ_DATA<13>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:DQ_DATA<13>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<13>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<14>.Q:TO:DQ_DATA<14>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<14>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<14>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<14>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<14>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<14>.D:400
-TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:DQ_DATA<14>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:DQ_DATA<14>.D:400
+TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:DQ_DATA<14>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<14>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:DQ_DATA<14>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:DQ_DATA<14>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:DQ_DATA<14>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:DQ_DATA<14>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<14>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:DQ_DATA<15>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<15>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<15>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<15>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<15>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<15>.D:400
-TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:DQ_DATA<15>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:DQ_DATA<15>.D:400
+TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:DQ_DATA<15>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<15>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:DQ_DATA<15>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:DQ_DATA<15>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:DQ_DATA<15>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:DQ_DATA<15>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<15>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:DQ_DATA<1>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<1>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<1>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<1>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<1>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<1>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<1>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:DQ_DATA<1>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:DQ_DATA<1>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<1>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:DQ_DATA<1>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<1>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:DQ_DATA<1>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:DQ_DATA<1>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<1>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<2>.Q:TO:DQ_DATA<2>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<2>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<2>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<2>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<2>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<2>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:DQ_DATA<2>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<26>.Q:TO:DQ_DATA<2>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<18>.Q:TO:DQ_DATA<2>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<2>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<10>.Q:TO:DQ_DATA<2>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<2>.Q:TO:DQ_DATA<2>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<2>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<3>.Q:TO:DQ_DATA<3>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<3>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<3>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<3>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<3>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<3>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:DQ_DATA<3>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<27>.Q:TO:DQ_DATA<3>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<19>.Q:TO:DQ_DATA<3>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<3>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<11>.Q:TO:DQ_DATA<3>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<3>.Q:TO:DQ_DATA<3>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<3>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<4>.Q:TO:DQ_DATA<4>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<4>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<4>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<4>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<4>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<4>.D:400
-TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:DQ_DATA<4>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<4>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<28>.Q:TO:DQ_DATA<4>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<20>.Q:TO:DQ_DATA<4>.D:400
+TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:DQ_DATA<4>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<4>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<12>.Q:TO:DQ_DATA<4>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<4>.Q:TO:DQ_DATA<4>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<4>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<5>.Q:TO:DQ_DATA<5>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<5>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<5>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<5>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<5>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<5>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:DQ_DATA<5>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<29>.Q:TO:DQ_DATA<5>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<21>.Q:TO:DQ_DATA<5>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<5>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<13>.Q:TO:DQ_DATA<5>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<5>.Q:TO:DQ_DATA<5>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<5>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<6>.Q:TO:DQ_DATA<6>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<6>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<6>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<6>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<6>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<6>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:DQ_DATA<6>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<30>.Q:TO:DQ_DATA<6>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<22>.Q:TO:DQ_DATA<6>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<6>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<14>.Q:TO:DQ_DATA<6>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<6>.Q:TO:DQ_DATA<6>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<6>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:DQ_DATA<7>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<7>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<7>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<7>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<7>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<7>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:DQ_DATA<7>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:DQ_DATA<7>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:DQ_DATA<7>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<7>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:DQ_DATA<7>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<7>.Q:TO:DQ_DATA<7>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<7>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<8>.Q:TO:DQ_DATA<8>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<8>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<8>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<8>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<8>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<8>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<16>.Q:TO:DQ_DATA<8>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<0>.Q:TO:DQ_DATA<8>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:DQ_DATA<8>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<8>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<0>.Q:TO:DQ_DATA<8>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<24>.Q:TO:DQ_DATA<8>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<8>.Q:TO:DQ_DATA<8>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<8>.SETF:400
 TS_CLK_EXT:FROM:DQ_DATA<9>.Q:TO:DQ_DATA<9>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<9>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:DQ_DATA<9>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:DQ_DATA<9>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<9>.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:DQ_DATA<9>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<17>.Q:TO:DQ_DATA<9>.D:400
 TS_CLK_EXT:FROM:DQ_DATA<1>.Q:TO:DQ_DATA<9>.D:400
 TS_CLK_EXT:FROM:LAN_D_INIT<1>.Q:TO:DQ_DATA<9>.D:400
-TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<9>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:DQ_DATA<9>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<1>.Q:TO:DQ_DATA<9>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<25>.Q:TO:DQ_DATA<9>.D:400
 TS_CLK_EXT:FROM:Z3_DATA<9>.Q:TO:DQ_DATA<9>.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:DQ_DATA<9>.SETF:400
+TS_CLK_EXT:FROM:Z3_DATA<15>.Q:TO:LAN_INT_ENABLE.D:400
+TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:LAN_INT_ENABLE.D:400
+TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:LAN_INT_ENABLE.D:400
+TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:LAN_INT_ENABLE.D:400
+TS_CLK_EXT:FROM:LAN_INT_ENABLE.Q:TO:LAN_INT_ENABLE.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_INT_ENABLE.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_INT_ENABLE.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_INT_ENABLE.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_INT_ENABLE.D:400
+TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_INT_ENABLE.D:400
 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_WR_RST.D:400
-TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_WR_RST.D:400
 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_WR_RST.D:400
-TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_A_INIT<6>.D:400
-TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_A_INIT<6>.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_WR_RST.D:400
+TS_CLK_EXT:FROM:Z3_DATA<31>.Q:TO:Z3_DATA<31>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:Z3_DATA<31>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_DATA<31>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:Z3_DATA<31>.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:Z3_DATA<31>.D:400
+TS_CLK_EXT:FROM:LAN_INT_ENABLE.Q:TO:Z3_DATA<31>.D:400
+TS_CLK_EXT:FROM:Z3_DATA<23>.Q:TO:Z3_DATA<31>.D:400
+TS_CLK_EXT:FROM:DQ_DATA<7>.Q:TO:Z3_DATA<31>.D:400
+TS_CLK_EXT:FROM:DQ_DATA<15>.Q:TO:Z3_DATA<31>.D:400
+TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:Z3_DATA<31>.SETF:400
 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_A_INIT<6>.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_A_INIT<6>.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_A_INIT<6>.D:400
 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_CS_RST.D:400
 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_CS_RST.D:400
 TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_CS_RST.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_D_INIT<1>.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_D_INIT<1>.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<1>.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_D_INIT<8>.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_D_INIT<8>.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_D_INIT<8>.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_RD_S.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_RD_S.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_RD_S.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_RD_S.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_RD_S.RSTF:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_READY.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_READY.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_READY.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_READY.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_READY.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_READY.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_READY.RSTF:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_WRH_S.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRH_S.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_WRH_S.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRH_S.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_WRH_S.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_WRH_S.RSTF:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:LAN_WRL_S.D:400
-TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRL_S.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd4.Q:TO:LAN_WRL_S.D:400
+TS_CLK_EXT:FROM:LAN_SM_FSM_FFd2.Q:TO:LAN_WRL_S.D:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd3.Q:TO:LAN_WRL_S.D:400
 TS_CLK_EXT:FROM:LAN_SM_RST.Q:TO:LAN_WRL_S.RSTF:400
 TS_CLK_EXT:FROM:LAN_SM_FSM_FFd1.Q:TO:Z3_A_LOW.D:400
@@ -107,12 +107,12 @@ architecture Behavioral of LAN_IDE_CP is
 				end_write_upper,
 				start_write_lower,
 				wait_write_lower,
-				end_write_lower
+				end_write_lower,
+				config_rw
 	);

 	signal LAN_RST_SM: lan_reset :=nop;
 	signal LAN_SM: lan_bus_sm :=nop;
-	signal AUTOCONFIG_Z3_ACCESS: STD_LOGIC;
 	signal AUTOCONFIG_Z2_ACCESS: STD_LOGIC;
 	signal IDE_ACCESS: STD_LOGIC;
 	signal IDE_ENABLE: STD_LOGIC;
@@ -130,12 +130,11 @@ architecture Behavioral of LAN_IDE_CP is
 	signal AUTO_CONFIG_Z2_DONE_CYCLE:STD_LOGIC_VECTOR(2 downto 0):="000";
 	signal SHUT_UP_Z2:STD_LOGIC_VECTOR(2 downto 0):="111";
 	signal LAN_BASEADR:STD_LOGIC_VECTOR(15 downto 0);
-	signal LAN_INT_ENABLE: std_logic;
+	signal LAN_INT_ENABLE: std_logic :='0';
 	signal LAN_RD_S: std_logic;
 	signal LAN_WRH_S: std_logic;
 	signal LAN_WRL_S: std_logic;
 	signal LAN_READY: std_logic;
-	signal CONFIG_READY: std_logic;
 	signal LAN_IRQ_D0: std_logic;
 	signal LAN_IRQ_OUT: std_logic;
 	signal Z3_ADR:STD_LOGIC_VECTOR(15 downto 2);
@@ -246,7 +245,6 @@ begin
 	begin
 		if(--AS ='0' or 
 			reset='0')then
-			AUTOCONFIG_Z3_ACCESS 	<= '0';
 			LAN_ACCESS 		<= '0';
 			DQ_SWAP  <= '1';
 			Z3_ADR <= (others => '1'); 
@@ -289,14 +287,14 @@ begin
 			end if;	

 			--CP base
-			if(A(23 downto 16) = CP_BASEADR and SHUT_UP_Z2(0)='0' )then	
+			if(A(23 downto 16) = CP_BASEADR and SHUT_UP_Z2(1)='0' )then	
 				CP_ACCESS 		<= '1';
 			else
 				CP_ACCESS 		<= '0';
 			end if;		

 			--IDE base
-			if(A(23 downto 16) = IDE_BASEADR and SHUT_UP_Z2(1)='0' )then	
+			if(A(23 downto 16) = IDE_BASEADR and SHUT_UP_Z2(2)='0' )then	
 				IDE_ACCESS 		<= '1';
 			else
 				IDE_ACCESS 		<= '0';
@@ -305,14 +303,12 @@ begin
 		end if;				
 	end process ADDRESS_Z2_DECODE;
 	
-	--LAN interrupt enable
+	--LAN interrupt controll
 	lan_int_proc: process (CLK_EXT,reset)
 	begin
 		if(reset ='0') then
-			LAN_INT_ENABLE <='0';
 			LAN_IRQ_D0 <='1';
 			LAN_IRQ_OUT <='1';
-			CONFIG_READY <='0';
 		elsif rising_edge(CLK_EXT) then
 			LAN_IRQ_D0 <= LAN_INT;
 			
@@ -329,22 +325,6 @@ begin
 				) then
 				LAN_IRQ_OUT <='0';
 			end if;
-			
-			--bus acknowledge if a access to A15=1 occurred
-			if(LAN_ACCESS = '1' and FCS ='0' and Z3_ADR(15)='1') then 
-				CONFIG_READY <='1';
-			else
-				CONFIG_READY <='0';
-			end if;
-			
-			--set int enable and config ready flags
-			if(LAN_ACCESS = '1' and FCS ='0' and RW='0' and Z3_ADR(15)='1') then --enable if a write to A15 occured
-				if(Z3_DS(3) ='0')then 
-					LAN_INT_ENABLE <= Z3_DATA_IN(31); --this controlls the output bit
-				elsif(Z3_DS(2) ='0')then
-					LAN_INT_ENABLE <= Z3_DATA_IN(15); --this controlls the output bit
-				end if;
-			end if;
 		end if;
 	end process lan_int_proc;
 	
@@ -352,7 +332,7 @@ begin
 	lan_rst_gen: process (CLK_EXT)
 	begin
 		if falling_edge(CLK_EXT) then			
-			if(FCS ='1' or reset = '0' or Z3_DS = "1111" or LAN_ACCESS = '0' or BERR = '0' or Z3_ADR(15)='1') then
+			if(FCS ='1' or reset = '0' or Z3_DS = "1111" or LAN_ACCESS = '0' or BERR = '0') then
 				LAN_SM_RST <='1';
 			else
 				LAN_SM_RST <='0';
@@ -401,8 +381,9 @@ begin
 						end if;
 					end if;	
 						
-					if(RW='1')then --read from MSB
-						
+					if(Z3_ADR(15)='1')then
+							LAN_SM <= config_rw;
+					elsif(RW='1')then --read from MSB			
 						if(Z3_DS(3 downto 2) < "11")then --determine bushalf
 							LAN_RD_S		<= '1';
 							LAN_SM <= wait_read_upper;
@@ -411,7 +392,6 @@ begin
 							LAN_SM <= wait_read_lower;
 						end if;
 					else
-						
 						if(Z3_DS(3 downto 2) < "11")then -- determine bushalf
 							LAN_SM <= start_write_upper;
 						else
@@ -491,6 +471,16 @@ begin
 				when end_write_lower=>
 					LAN_READY <='1';
 					LAN_SM<=end_write_lower; -- stay here until cylce end
+				when config_rw=>
+					LAN_READY <='1';
+					if(RW='1')then
+						Z3_DATA(31) <= LAN_INT_ENABLE;
+					elsif(Z3_DS(3) ='0')then 
+						LAN_INT_ENABLE <= Z3_DATA_IN(31); --this controlls the output bit
+					elsif(Z3_DS(1) ='0')then
+						LAN_INT_ENABLE <= Z3_DATA_IN(15); --this controlls the output bit
+					end if;
+					LAN_SM<=config_rw; -- stay here until cylce end
 				end case;			
 		end if;
 	end process lan_rw_gen;
@@ -536,7 +526,12 @@ begin
 						else
 							D_Z2_OUT <=	"1001" ; --ProductID low nibble: 6->1001 
 						end if;						
+					when "000100"	=> --er_flags (Z3) 
+						D_Z2_OUT <=	"1110" ; -- io device no size extension 64kb subsize    	
+					when "000101"	=> --er_flags (Z3) 
+						D_Z2_OUT <=	"1101" ; -- io device no size extension 64kb subsize    	
 					when "001000"	=> D_Z2_OUT <=	"1111" ; --Ventor ID 0
+					
 					when "001001"	=> 
 						if(AUTO_CONFIG_Z2_DONE(0) = '0' or AUTO_CONFIG_Z2_DONE(1) = '0')then
 							D_Z2_OUT <=	"0101" ; --Ventor ID 1
@@ -567,18 +562,16 @@ begin
 					--when "010101"	=> Dout1 <=	"1111" ; --Rom vector high byte low  nibble 
 					--when "010110"	=> Dout1 <=	"1111" ; --Rom vector low byte high nibble
 					when "010111"	=> 
-						if(AUTO_CONFIG_Z2_DONE = 1)then
 						D_Z2_OUT <=	"1110" ; --Rom vector low byte low  nibble						
-						else
-							D_Z2_OUT <=	"1111" ; --Rom vector low byte low  nibble						
-						end if;
 					when "100010"	=>
+						D_Z2_OUT <=	"1111" ;
 						if(RW='0')then
 							if(AUTO_CONFIG_Z2_DONE(1) = '0')then
 								LAN_BASEADR(15 downto 8)	<= D(15 downto 8); --Base adress
 							end if;
 						end if;	
 					when "100100"	=>
+						D_Z2_OUT <=	"1111" ;
 						if(RW='0')then
 							if(AUTO_CONFIG_Z2_DONE(0) = '0')then
 								LAN_BASEADR(7 downto 0)	<= D(15 downto 8); --Base adress
@@ -647,22 +640,12 @@ begin
 			D 	when RW='0' and AS='0' and CP_ACCESS ='1' else
 			(others => 'Z');

--
--	--defined lancp signal that matches both LAN and CP addresses (and IDE for Rev2 boards)
--	DQ <=	LAN_D_CLR when (LAN_RST_SM = wait0 or LAN_RST_SM = clr or LAN_RST_SM = clr_commit) else
--			LAN_D_SET when (LAN_RST_SM = wait1 or LAN_RST_SM = set or LAN_RST_SM = set_commit) else
--			D( 7 downto 0) & D( 7 downto 0)	when RW='0' and AS='0' and lancp = '1' and LDS='0' and UDS='1' else
--			D(15 downto 8) & D(15 downto 8)	when RW='0' and AS='0' and lancp = '1' and LDS='1' and UDS='0' else
--			D( 7 downto 0) & D(15 downto 8)	when RW='0' and AS='0' and lan_adr ='1' and lan_adr_sw ='1' else
--			D 	when RW='0' and AS='0' and lancp ='1'
--			else (others => 'Z');
-								
-




 	INT_OUT <= '0' when LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1' else
+					--'0' when CP_IRQ = '0' else
 				  'Z';
 	INT_CP_OUT <= '0' when CP_IRQ = '0' else
 				  'Z';
@@ -673,7 +656,7 @@ begin
 	
 	OVR <= '0' when FCS='0' and LAN_ACCESS = '1' else 'Z'; --is Cache inhibit on Z3!

-	DTACK <= '0' when FCS='0' and (LAN_READY = '1' or CONFIG_READY='1') else 'Z';
+	DTACK <= '0' when FCS='0' and LAN_READY = '1' else 'Z';

   MTACK <= 'Z';

@@ -7,7 +7,7 @@ run
 -ofmt NGC
 -p xc9500xl
 -top LAN_IDE_CP
-opt_mode Speed
+-opt_mode Area
 -opt_level 1
 -iuc NO
 -keep_hierarchy Yes
@@ -1,10 +1,10 @@
 <?xml version='1.0' encoding='utf-8' ?>
-<!DOCTYPE document SYSTEM 'file:///C:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/buildXML.dtd'>
+<!DOCTYPE document SYSTEM 'file:///c:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/buildXML.dtd'>

 <document>
 <design name='LAN_IDE_CP'/>
 <rptdir name='LAN_IDE_CP'/>
-<xilinx path='C:/Xilinx/14.7/ISE_DS/ISE;'/>
+<xilinx path='c:/Xilinx/14.7/ISE_DS/ISE;'/>
 <projDir path='C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE'/>
 <xslDir path='chipviewer/data/xsl'/>
 <fileDir path='/chipviewer/data/html'/>
@@ -259,7 +259,7 @@
    <output file='fbs_FB16.htm'/>
  </xslFile>
 </xmlFile>
-<xmlFile file='C:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/pinlegend.xml'>
+<xmlFile file='c:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/pinlegend.xml'>
  <xslFile file='legend.xsl'>
    <param name='device' value='XC95288XL-10-TQ144'/>
    <param name='verOn' value='0'/>
@@ -271,7 +271,7 @@
    <output file='pinlegendV.htm'/>
  </xslFile>
 </xmlFile>
-<xmlFile file='C:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/logiclegend.xml'>
+<xmlFile file='c:/Xilinx/14.7/ISE_DS/ISE/chipviewer/data/xsl/logiclegend.xml'>
  <xslFile file='legend.xsl'>
    <param name='device' value='XC95288XL-10-TQ144'/>
    <param name='verOn' value='0'/>
@@ -18,8 +18,8 @@
 </tr>
 <tr>
 <td>Path</td>
-<td>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;<br>C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;<br>C:\Xilinx\14.7\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\common\lib\nt64;<br>C:\Program Files (x86)\Common Files\Oracle\Java\javapath;<br>E:\ispLEVER_Classic2_0\ispcpld\bin;<br>E:\ispLEVER_Classic2_0\ispFPGA\bin\nt;<br>E:\ispLEVER_Classic2_0\active-hdl\BIN;<br>C:\ProgramData\Oracle\Java\javapath;<br>C:\SynaptiCAD\bin\win32;<br>C:\Program Files\Java\jre7\bin;<br>C\Windows\System32;<br>C:\Program Files (x86)\WinAVR\bin;<br>C:\Program Files (x86)\WinAVR\utils\bin;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Program Files (x86)\SSH Communications Security\SSH Secure Shell;<br>C:\Program Files (x86)\UltraEdit;<br>c:\Xilinx\14.6\ISE_DS\ISE\bin\nt64;<br>C:\ispLever\ispcpld\bin;<br>C:\ispLever\ispFPGA\bin\nt;<br>C:\ispLever\active-hdl\BIN;<br>C:\Program Files\WinRAR;<br>C:\SynaptiCAD\bin;<br>C:\Program Files (x86)\Windows Kits\8.1\Windows Performance Toolkit\;<br>C:\Program Files\Microsoft SQL Server\110\Tools\Binn\;<br>C:\Program Files (x86)\Microsoft SDKs\TypeScript\1.0\;<br>C:\Program Files\Microsoft SQL Server\120\Tools\Binn\;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files (x86)\ATI Technologies\ATI.ACE\Core-Static;<br>C:\Program Files (x86)\AMD\ATI.ACE\Core-Static;<br>C:\Windows\System32\OpenSSH\;<br>%PATH;<br>C:\Program Files (x86)\IDM Computer Solutions\UltraEdit\;<br>C:\Program Files (x86)\UltraEdit\;<br>C:\Program Files\Java\jdk1.7.0_02\bin;<br>C:\Users\Matze\AppData\Local\Microsoft\WindowsApps</td>
-<td>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;<br>C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;<br>C:\Xilinx\14.7\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\common\lib\nt64;<br>C:\Program Files (x86)\Common Files\Oracle\Java\javapath;<br>E:\ispLEVER_Classic2_0\ispcpld\bin;<br>E:\ispLEVER_Classic2_0\ispFPGA\bin\nt;<br>E:\ispLEVER_Classic2_0\active-hdl\BIN;<br>C:\ProgramData\Oracle\Java\javapath;<br>C:\SynaptiCAD\bin\win32;<br>C:\Program Files\Java\jre7\bin;<br>C\Windows\System32;<br>C:\Program Files (x86)\WinAVR\bin;<br>C:\Program Files (x86)\WinAVR\utils\bin;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Program Files (x86)\SSH Communications Security\SSH Secure Shell;<br>C:\Program Files (x86)\UltraEdit;<br>c:\Xilinx\14.6\ISE_DS\ISE\bin\nt64;<br>C:\ispLever\ispcpld\bin;<br>C:\ispLever\ispFPGA\bin\nt;<br>C:\ispLever\active-hdl\BIN;<br>C:\Program Files\WinRAR;<br>C:\SynaptiCAD\bin;<br>C:\Program Files (x86)\Windows Kits\8.1\Windows Performance Toolkit\;<br>C:\Program Files\Microsoft SQL Server\110\Tools\Binn\;<br>C:\Program Files (x86)\Microsoft SDKs\TypeScript\1.0\;<br>C:\Program Files\Microsoft SQL Server\120\Tools\Binn\;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files (x86)\ATI Technologies\ATI.ACE\Core-Static;<br>C:\Program Files (x86)\AMD\ATI.ACE\Core-Static;<br>C:\Windows\System32\OpenSSH\;<br>%PATH;<br>C:\Program Files (x86)\IDM Computer Solutions\UltraEdit\;<br>C:\Program Files (x86)\UltraEdit\;<br>C:\Program Files\Java\jdk1.7.0_02\bin;<br>C:\Users\Matze\AppData\Local\Microsoft\WindowsApps</td>
+<td>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;<br>C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;<br>C:\Xilinx\14.7\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\common\lib\nt64;<br>C:\Program Files (x86)\Common Files\Oracle\Java\javapath;<br>E:\ispLEVER_Classic2_0\ispcpld\bin;<br>E:\ispLEVER_Classic2_0\ispFPGA\bin\nt;<br>E:\ispLEVER_Classic2_0\active-hdl\BIN;<br>C:\ProgramData\Oracle\Java\javapath;<br>C:\SynaptiCAD\bin\win32;<br>C:\Program Files\Java\jre7\bin;<br>C\Windows\System32;<br>C:\Program Files (x86)\WinAVR\bin;<br>C:\Program Files (x86)\WinAVR\utils\bin;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Program Files (x86)\SSH Communications Security\SSH Secure Shell;<br>C:\Program Files (x86)\UltraEdit;<br>c:\Xilinx\14.6\ISE_DS\ISE\bin\nt64;<br>C:\ispLever\ispcpld\bin;<br>C:\ispLever\ispFPGA\bin\nt;<br>C:\ispLever\active-hdl\BIN;<br>C:\Program Files\WinRAR;<br>C:\SynaptiCAD\bin;<br>C:\Program Files (x86)\Windows Kits\8.1\Windows Performance Toolkit\;<br>C:\Program Files\Microsoft SQL Server\110\Tools\Binn\;<br>C:\Program Files (x86)\Microsoft SDKs\TypeScript\1.0\;<br>C:\Program Files\Microsoft SQL Server\120\Tools\Binn\;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files (x86)\ATI Technologies\ATI.ACE\Core-Static;<br>C:\Program Files (x86)\AMD\ATI.ACE\Core-Static;<br>C:\Windows\System32\OpenSSH\;<br>%PATH;<br>C:\Users\Matze\Amiga\development\VBCC\bin;<br>C:\Program Files (x86)\IDM Computer Solutions\UltraEdit\;<br>C:\Program Files (x86)\UltraEdit\;<br>C:\Program Files\Java\jdk1.7.0_02\bin;<br>C:\Users\Matze\AppData\Local\Microsoft\WindowsApps</td>
+<td>C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;<br>C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;<br>C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;<br>C:\Xilinx\14.7\ISE_DS\common\bin\nt64;<br>C:\Xilinx\14.7\ISE_DS\common\lib\nt64;<br>C:\Program Files (x86)\Common Files\Oracle\Java\javapath;<br>E:\ispLEVER_Classic2_0\ispcpld\bin;<br>E:\ispLEVER_Classic2_0\ispFPGA\bin\nt;<br>E:\ispLEVER_Classic2_0\active-hdl\BIN;<br>C:\ProgramData\Oracle\Java\javapath;<br>C:\SynaptiCAD\bin\win32;<br>C:\Program Files\Java\jre7\bin;<br>C\Windows\System32;<br>C:\Program Files (x86)\WinAVR\bin;<br>C:\Program Files (x86)\WinAVR\utils\bin;<br>C:\Program Files\Common Files\Microsoft Shared\Windows Live;<br>C:\Program Files (x86)\SSH Communications Security\SSH Secure Shell;<br>C:\Program Files (x86)\UltraEdit;<br>c:\Xilinx\14.6\ISE_DS\ISE\bin\nt64;<br>C:\ispLever\ispcpld\bin;<br>C:\ispLever\ispFPGA\bin\nt;<br>C:\ispLever\active-hdl\BIN;<br>C:\Program Files\WinRAR;<br>C:\SynaptiCAD\bin;<br>C:\Program Files (x86)\Windows Kits\8.1\Windows Performance Toolkit\;<br>C:\Program Files\Microsoft SQL Server\110\Tools\Binn\;<br>C:\Program Files (x86)\Microsoft SDKs\TypeScript\1.0\;<br>C:\Program Files\Microsoft SQL Server\120\Tools\Binn\;<br>C:\Windows\system32;<br>C:\Windows;<br>C:\Windows\System32\Wbem;<br>C:\Windows\System32\WindowsPowerShell\v1.0\;<br>C:\Program Files (x86)\ATI Technologies\ATI.ACE\Core-Static;<br>C:\Program Files (x86)\AMD\ATI.ACE\Core-Static;<br>C:\Windows\System32\OpenSSH\;<br>%PATH;<br>C:\Users\Matze\Amiga\development\VBCC\bin;<br>C:\Program Files (x86)\IDM Computer Solutions\UltraEdit\;<br>C:\Program Files (x86)\UltraEdit\;<br>C:\Program Files\Java\jdk1.7.0_02\bin;<br>C:\Users\Matze\AppData\Local\Microsoft\WindowsApps</td>
 </tr>
 <tr>
 <td>XILINX</td>
@@ -92,7 +92,7 @@
 <tr>
 <td>-opt_mode</td>
 <td>Optimization Goal</td>
-<td>Speed</td>
+<td>Area</td>
 <td>SPEED</td>
 </tr>
 <tr>
@@ -5,14 +5,14 @@
    The structure and the elements are likely to change over the next few releases.
    This means code written to parse this file will need to be revisited each subsequent release.-->

-  <application stringID="NgdBuild" timeStamp="Wed Feb 20 23:05:07 2019">
+  <application stringID="NgdBuild" timeStamp="Thu Feb 21 11:11:00 2019">
    <section stringID="User_Env">
      <table stringID="User_EnvVar">
        <column stringID="variable"/>
        <column stringID="value"/>
        <row stringID="row" value="0">
          <item stringID="variable" value="Path"/>
-          <item stringID="value" value="C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64;C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64;C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;C:\Xilinx\14.7\ISE_DS\common\bin\nt64;C:\Xilinx\14.7\ISE_DS\common\lib\nt64;C:\Program Files (x86)\Common Files\Oracle\Java\javapath;E:\ispLEVER_Classic2_0\ispcpld\bin;E:\ispLEVER_Classic2_0\ispFPGA\bin\nt;E:\ispLEVER_Classic2_0\active-hdl\BIN;C:\ProgramData\Oracle\Java\javapath;C:\SynaptiCAD\bin\win32;C:\Program Files\Java\jre7\bin;C\Windows\System32;C:\Program Files (x86)\WinAVR\bin;C:\Program Files (x86)\WinAVR\utils\bin;C:\Program Files\Common Files\Microsoft Shared\Windows Live;C:\Program Files (x86)\SSH Communications Security\SSH Secure Shell;C:\Program Files (x86)\UltraEdit;c:\Xilinx\14.6\ISE_DS\ISE\bin\nt64;C:\ispLever\ispcpld\bin;C:\ispLever\ispFPGA\bin\nt;C:\ispLever\active-hdl\BIN;C:\Program Files\WinRAR;C:\SynaptiCAD\bin;C:\Program Files (x86)\Windows Kits\8.1\Windows Performance Toolkit\;C:\Program Files\Microsoft SQL Server\110\Tools\Binn\;C:\Program Files (x86)\Microsoft SDKs\TypeScript\1.0\;C:\Program Files\Microsoft SQL Server\120\Tools\Binn\;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem;C:\Windows\System32\WindowsPowerShell\v1.0\;C:\Program Files (x86)\ATI Technologies\ATI.ACE\Core-Static;C:\Program Files (x86)\AMD\ATI.ACE\Core-Static;C:\Windows\System32\OpenSSH\;%PATH;C:\Program Files (x86)\IDM Computer Solutions\UltraEdit\;C:\Program Files (x86)\UltraEdit\;C:\Program Files\Java\jdk1.7.0_02\bin;C:\Users\Matze\AppData\Local\Microsoft\WindowsApps"/>
+          <item stringID="value" value="C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64;C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64;C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;C:\Xilinx\14.7\ISE_DS\common\bin\nt64;C:\Xilinx\14.7\ISE_DS\common\lib\nt64;C:\Program Files (x86)\Common Files\Oracle\Java\javapath;E:\ispLEVER_Classic2_0\ispcpld\bin;E:\ispLEVER_Classic2_0\ispFPGA\bin\nt;E:\ispLEVER_Classic2_0\active-hdl\BIN;C:\ProgramData\Oracle\Java\javapath;C:\SynaptiCAD\bin\win32;C:\Program Files\Java\jre7\bin;C\Windows\System32;C:\Program Files (x86)\WinAVR\bin;C:\Program Files (x86)\WinAVR\utils\bin;C:\Program Files\Common Files\Microsoft Shared\Windows Live;C:\Program Files (x86)\SSH Communications Security\SSH Secure Shell;C:\Program Files (x86)\UltraEdit;c:\Xilinx\14.6\ISE_DS\ISE\bin\nt64;C:\ispLever\ispcpld\bin;C:\ispLever\ispFPGA\bin\nt;C:\ispLever\active-hdl\BIN;C:\Program Files\WinRAR;C:\SynaptiCAD\bin;C:\Program Files (x86)\Windows Kits\8.1\Windows Performance Toolkit\;C:\Program Files\Microsoft SQL Server\110\Tools\Binn\;C:\Program Files (x86)\Microsoft SDKs\TypeScript\1.0\;C:\Program Files\Microsoft SQL Server\120\Tools\Binn\;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem;C:\Windows\System32\WindowsPowerShell\v1.0\;C:\Program Files (x86)\ATI Technologies\ATI.ACE\Core-Static;C:\Program Files (x86)\AMD\ATI.ACE\Core-Static;C:\Windows\System32\OpenSSH\;%PATH;C:\Users\Matze\Amiga\development\VBCC\bin;C:\Program Files (x86)\IDM Computer Solutions\UltraEdit\;C:\Program Files (x86)\UltraEdit\;C:\Program Files\Java\jdk1.7.0_02\bin;C:\Users\Matze\AppData\Local\Microsoft\WindowsApps"/>
        </row>
        <row stringID="row" value="1">
          <item stringID="variable" value="PATHEXT"/>
@@ -70,38 +70,34 @@
        <item dataType="int" stringID="NGDBUILD_NUM_INFOS" value="0"/>
      </section>
      <section stringID="NGDBUILD_PRE_UNISIM_SUMMARY">
-        <item dataType="int" stringID="NGDBUILD_NUM_AND2" value="418"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="44"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_AND4" value="15"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_AND5" value="1"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND2" value="369"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="16"/>
        <item dataType="int" stringID="NGDBUILD_NUM_FD" value="4"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_FDC" value="21"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_FDC" value="20"/>
        <item dataType="int" stringID="NGDBUILD_NUM_FDCE" value="7"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_FDP" value="41"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_FDP" value="42"/>
        <item dataType="int" stringID="NGDBUILD_NUM_FDPE" value="68"/>
        <item dataType="int" stringID="NGDBUILD_NUM_GND" value="1"/>
        <item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="24"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_INV" value="451"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_INV" value="288"/>
        <item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OR2" value="277"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OR3" value="20"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OR4" value="2"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="50"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_OR2" value="263"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_OR3" value="16"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_OR4" value="3"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="33"/>
      </section>
      <section stringID="NGDBUILD_POST_UNISIM_SUMMARY">
-        <item dataType="int" stringID="NGDBUILD_NUM_AND2" value="418"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="44"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_AND4" value="15"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_AND5" value="1"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND2" value="369"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_AND3" value="16"/>
        <item dataType="int" stringID="NGDBUILD_NUM_GND" value="67"/>
        <item dataType="int" stringID="NGDBUILD_NUM_IBUF" value="74"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_INV" value="451"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_INV" value="288"/>
        <item dataType="int" stringID="NGDBUILD_NUM_OBUF" value="33"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OR2" value="277"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OR3" value="20"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_OR4" value="2"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_OR2" value="263"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_OR3" value="16"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_OR4" value="3"/>
        <item dataType="int" stringID="NGDBUILD_NUM_TS_TIMESPEC" value="1"/>
-        <item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="50"/>
+        <item dataType="int" stringID="NGDBUILD_NUM_XOR2" value="33"/>
      </section>
      <section stringID="NGDBUILD_CORE_GENERATION_SUMMARY">
        <section stringID="NGDBUILD_CORE_INSTANCES"/>
@@ -1,7 +1,7 @@
 Release 8.1i - Fit P.20131013
 Copyright(c) 1995-2003 Xilinx Inc. All rights reserved

- 2-20-2019 11:05PM
+ 2-21-2019 11:26AM

 NOTE: This file is designed to be imported into a spreadsheet program
 such as Microsoft Excel for viewing, printing and sorting. The comma ','
@@ -2,7 +2,7 @@
 <BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
 <TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
 <TR ALIGN=CENTER BGCOLOR='#99CCFF'>
-<TD ALIGN=CENTER COLSPAN='4'><B>LAN_IDE_CP Project Status (02/20/2019 - 23:05:43)</B></TD></TR>
+<TD ALIGN=CENTER COLSPAN='4'><B>LAN_IDE_CP Project Status (02/21/2019 - 11:03:28)</B></TD></TR>
 <TR ALIGN=LEFT>
 <TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
 <TD>LAN_IDE.xise</TD>
@@ -25,7 +25,7 @@ No Errors</TD>
 <TR ALIGN=LEFT>
 <TD BGCOLOR='#FFFF99'><B>Product Version:</B></TD><TD>ISE 14.7</TD>
 <TD BGCOLOR='#FFFF99'><UL><LI><B>Warnings:</B></LI></UL></TD>
-<TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/*.xmsgs?&DataKey=Warning'>48 Warnings (0 new)</A></TD>
+<TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/*.xmsgs?&DataKey=Warning'>46 Warnings (0 new)</A></TD>
 </TR>
 <TR ALIGN=LEFT>
 <TD BGCOLOR='#FFFF99'><B>Design Goal:</B></dif></TD>
@@ -65,9 +65,9 @@ System Settings</A>
 <TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
 <TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
 <TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Mi 20. Feb 23:04:59 2019</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Warning'>48 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Info'>11 Infos (0 new)</A></TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.bld'>Translation Report</A></TD><TD>Current</TD><TD>Mi 20. Feb 23:05:07 2019</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
-<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Current</TD><TD>Mi 20. Feb 23:05:30 2019</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>5 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>1 Info (1 new)</A></TD></TR>
+<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Do 21. Feb 11:10:53 2019</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Warning'>46 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Info'>10 Infos (0 new)</A></TD></TR>
+<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.bld'>Translation Report</A></TD><TD>Current</TD><TD>Do 21. Feb 11:11:01 2019</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
+<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Current</TD><TD>Do 21. Feb 11:26:28 2019</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>3 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>1 Info (1 new)</A></TD></TR>
 <TR ALIGN=LEFT><TD>Power Report</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD>&nbsp;</TD><TD COLSPAN='2'>&nbsp;</TD></TR>
 </TABLE>
 &nbsp;<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
@@ -77,5 +77,5 @@ System Settings</A>
 </TABLE>


-<br><center><b>Date Generated:</b> 02/20/2019 - 23:05:43</center>
+<br><center><b>Date Generated:</b> 02/21/2019 - 13:53:24</center>
 </BODY></HTML>
@@ -5,14 +5,14 @@
    The structure and the elements are likely to change over the next few releases.
    This means code written to parse this file will need to be revisited each subsequent release.-->

-  <application stringID="Xst" timeStamp="Wed Feb 20 23:04:40 2019">
+  <application stringID="Xst" timeStamp="Thu Feb 21 11:10:34 2019">
    <section stringID="User_Env">
      <table stringID="User_EnvVar">
        <column stringID="variable"/>
        <column stringID="value"/>
        <row stringID="row" value="0">
          <item stringID="variable" value="Path"/>
-          <item stringID="value" value="C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64;C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64;C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;C:\Xilinx\14.7\ISE_DS\common\bin\nt64;C:\Xilinx\14.7\ISE_DS\common\lib\nt64;C:\Program Files (x86)\Common Files\Oracle\Java\javapath;E:\ispLEVER_Classic2_0\ispcpld\bin;E:\ispLEVER_Classic2_0\ispFPGA\bin\nt;E:\ispLEVER_Classic2_0\active-hdl\BIN;C:\ProgramData\Oracle\Java\javapath;C:\SynaptiCAD\bin\win32;C:\Program Files\Java\jre7\bin;C\Windows\System32;C:\Program Files (x86)\WinAVR\bin;C:\Program Files (x86)\WinAVR\utils\bin;C:\Program Files\Common Files\Microsoft Shared\Windows Live;C:\Program Files (x86)\SSH Communications Security\SSH Secure Shell;C:\Program Files (x86)\UltraEdit;c:\Xilinx\14.6\ISE_DS\ISE\bin\nt64;C:\ispLever\ispcpld\bin;C:\ispLever\ispFPGA\bin\nt;C:\ispLever\active-hdl\BIN;C:\Program Files\WinRAR;C:\SynaptiCAD\bin;C:\Program Files (x86)\Windows Kits\8.1\Windows Performance Toolkit\;C:\Program Files\Microsoft SQL Server\110\Tools\Binn\;C:\Program Files (x86)\Microsoft SDKs\TypeScript\1.0\;C:\Program Files\Microsoft SQL Server\120\Tools\Binn\;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem;C:\Windows\System32\WindowsPowerShell\v1.0\;C:\Program Files (x86)\ATI Technologies\ATI.ACE\Core-Static;C:\Program Files (x86)\AMD\ATI.ACE\Core-Static;C:\Windows\System32\OpenSSH\;%PATH;C:\Program Files (x86)\IDM Computer Solutions\UltraEdit\;C:\Program Files (x86)\UltraEdit\;C:\Program Files\Java\jdk1.7.0_02\bin;C:\Users\Matze\AppData\Local\Microsoft\WindowsApps"/>
+          <item stringID="value" value="C:\Xilinx\14.7\ISE_DS\ISE\\lib\nt64;C:\Xilinx\14.7\ISE_DS\ISE\\bin\nt64;C:\Xilinx\14.7\ISE_DS\ISE\bin\nt64;C:\Xilinx\14.7\ISE_DS\ISE\lib\nt64;C:\Xilinx\14.7\ISE_DS\ISE\..\..\..\DocNav;C:\Xilinx\14.7\ISE_DS\PlanAhead\bin;C:\Xilinx\14.7\ISE_DS\EDK\bin\nt64;C:\Xilinx\14.7\ISE_DS\EDK\lib\nt64;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\powerpc-eabi\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnuwin\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\arm\nt\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_be\bin;C:\Xilinx\14.7\ISE_DS\EDK\gnu\microblaze\linux_toolchain\nt64_le\bin;C:\Xilinx\14.7\ISE_DS\common\bin\nt64;C:\Xilinx\14.7\ISE_DS\common\lib\nt64;C:\Program Files (x86)\Common Files\Oracle\Java\javapath;E:\ispLEVER_Classic2_0\ispcpld\bin;E:\ispLEVER_Classic2_0\ispFPGA\bin\nt;E:\ispLEVER_Classic2_0\active-hdl\BIN;C:\ProgramData\Oracle\Java\javapath;C:\SynaptiCAD\bin\win32;C:\Program Files\Java\jre7\bin;C\Windows\System32;C:\Program Files (x86)\WinAVR\bin;C:\Program Files (x86)\WinAVR\utils\bin;C:\Program Files\Common Files\Microsoft Shared\Windows Live;C:\Program Files (x86)\SSH Communications Security\SSH Secure Shell;C:\Program Files (x86)\UltraEdit;c:\Xilinx\14.6\ISE_DS\ISE\bin\nt64;C:\ispLever\ispcpld\bin;C:\ispLever\ispFPGA\bin\nt;C:\ispLever\active-hdl\BIN;C:\Program Files\WinRAR;C:\SynaptiCAD\bin;C:\Program Files (x86)\Windows Kits\8.1\Windows Performance Toolkit\;C:\Program Files\Microsoft SQL Server\110\Tools\Binn\;C:\Program Files (x86)\Microsoft SDKs\TypeScript\1.0\;C:\Program Files\Microsoft SQL Server\120\Tools\Binn\;C:\Windows\system32;C:\Windows;C:\Windows\System32\Wbem;C:\Windows\System32\WindowsPowerShell\v1.0\;C:\Program Files (x86)\ATI Technologies\ATI.ACE\Core-Static;C:\Program Files (x86)\AMD\ATI.ACE\Core-Static;C:\Windows\System32\OpenSSH\;%PATH;C:\Users\Matze\Amiga\development\VBCC\bin;C:\Program Files (x86)\IDM Computer Solutions\UltraEdit\;C:\Program Files (x86)\UltraEdit\;C:\Program Files\Java\jdk1.7.0_02\bin;C:\Users\Matze\AppData\Local\Microsoft\WindowsApps"/>
        </row>
        <row stringID="row" value="1">
          <item stringID="variable" value="PATHEXT"/>
@@ -60,7 +60,7 @@
      <item DEFAULT="NGC" label="-ofmt" stringID="XST_OFMT" value="NGC"/>
      <item DEFAULT="" label="-p" stringID="XST_P" value="xc9500xl"/>
      <item DEFAULT="" label="-top" stringID="XST_TOP" value="LAN_IDE_CP"/>
-      <item DEFAULT="SPEED" label="-opt_mode" stringID="XST_OPTMODE" value="Speed"/>
+      <item DEFAULT="SPEED" label="-opt_mode" stringID="XST_OPTMODE" value="Area"/>
      <item DEFAULT="1" label="-opt_level" stringID="XST_OPTLEVEL" value="1"/>
      <item DEFAULT="NO" label="-iuc" stringID="XST_IUC" value="NO"/>
      <item DEFAULT="YES" label="-keep_hierarchy" stringID="XST_KEEPHIERARCHY" value="Yes"/>
@@ -112,27 +112,26 @@
        <item stringID="XST_RTL_TOP_LEVEL_OUTPUT_FILE_NAME" value="LAN_IDE_CP.ngr"/>
        <item stringID="XST_TOP_LEVEL_OUTPUT_FILE_NAME" value="LAN_IDE_CP"/>
        <item stringID="XST_OUTPUT_FORMAT" value="NGC"/>
-        <item stringID="XST_OPTIMIZATION_GOAL" value="Speed"/>
+        <item stringID="XST_OPTIMIZATION_GOAL" value="Area"/>
        <item stringID="XST_KEEP_HIERARCHY" value="Yes"/>
      </section>
      <section stringID="XST_DESIGN_STATISTICS">
        <item stringID="XST_IOS" value="117"/>
      </section>
      <section stringID="XST_CELL_USAGE">
-        <item dataType="int" stringID="XST_BELS" value="1283">
-          <item dataType="int" stringID="XST_AND2" value="418"/>
-          <item dataType="int" stringID="XST_AND3" value="44"/>
-          <item dataType="int" stringID="XST_AND4" value="15"/>
+        <item dataType="int" stringID="XST_BELS" value="989">
+          <item dataType="int" stringID="XST_AND2" value="369"/>
+          <item dataType="int" stringID="XST_AND3" value="16"/>
          <item dataType="int" stringID="XST_GND" value="1"/>
-          <item dataType="int" stringID="XST_INV" value="451"/>
-          <item dataType="int" stringID="XST_OR2" value="277"/>
-          <item dataType="int" stringID="XST_XOR2" value="50"/>
+          <item dataType="int" stringID="XST_INV" value="288"/>
+          <item dataType="int" stringID="XST_OR2" value="263"/>
+          <item dataType="int" stringID="XST_XOR2" value="33"/>
        </item>
        <item dataType="int" stringID="XST_FLIPFLOPSLATCHES" value="141">
          <item dataType="int" stringID="XST_FD" value="4"/>
-          <item dataType="int" stringID="XST_FDC" value="21"/>
+          <item dataType="int" stringID="XST_FDC" value="20"/>
          <item dataType="int" stringID="XST_FDCE" value="7"/>
-          <item dataType="int" stringID="XST_FDP" value="41"/>
+          <item dataType="int" stringID="XST_FDP" value="42"/>
          <item dataType="int" stringID="XST_FDPE" value="68"/>
        </item>
        <item dataType="int" stringID="XST_IO_BUFFERS" value="115">
@@ -143,8 +142,8 @@
    </section>
    <section stringID="XST_ERRORS_STATISTICS">
      <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_ERRORS" value="0"/>
-      <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="48"/>
-      <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="11"/>
+      <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_WARNINGS" value="46"/>
+      <item dataType="int" filtered="0" stringID="XST_NUMBER_OF_INFOS" value="10"/>
    </section>
  </application>

@@ -1,2 +1,2 @@
-C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1550700299
+C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1550743853
 OK
@@ -17,11 +17,5 @@
 <msg type="warning" file="Cpld" num="1007" delta="old" >Removing unused input(s) &apos;<arg fmt="%s" index="1">MTCR</arg>&apos;.  The input(s) are unused after optimization. Please verify functionality via simulation.
 </msg>

-<msg type="warning" file="Cpld" num="896" delta="old" >Unable to map all desired signals into function block, FB<arg fmt="%d" index="1">10</arg>, because too many function block product terms are required. Buffering output signal <arg fmt="%s" index="2">DQ&lt;8&gt;</arg> to allow all signals assigned to this function block to be placed.
-</msg>
-
-<msg type="warning" file="Cpld" num="896" delta="old" >Unable to map all desired signals into function block, FB<arg fmt="%d" index="1">10</arg>, because too many function block product terms are required. Buffering output signal <arg fmt="%s" index="2">DQ&lt;4&gt;</arg> to allow all signals assigned to this function block to be placed.
-</msg>
-
 </messages>

@@ -5,9 +5,6 @@
     behavior or data corruption.  It is strongly advised that
     users do not edit the contents of this file. -->
 <messages>
-<msg type="info" file="Xst" num="2679" delta="old" >Register &lt;<arg fmt="%s" index="1">AUTOCONFIG_Z3_ACCESS</arg>&gt; in unit &lt;<arg fmt="%s" index="2">LAN_IDE_CP</arg>&gt; has a constant value of <arg fmt="%s" index="3">0</arg> during circuit operation. The register is replaced by logic.
-</msg>
-
 <msg type="info" file="Xst" num="2561" delta="old" >Always blocking tristate driving signal &lt;<arg fmt="%s" index="1">A</arg>&gt; in unit &lt;<arg fmt="%s" index="2">LAN_IDE_CP</arg>&gt; is removed.
 </msg>

@@ -35,12 +32,6 @@
 <msg type="warning" file="Xst" num="647" delta="old" >Input &lt;<arg fmt="%s" index="1">MTCR</arg>&gt; is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
 </msg>

-<msg type="warning" file="Xst" num="646" delta="old" >Signal &lt;<arg fmt="%s" index="1">SHUT_UP_Z2&lt;2&gt;</arg>&gt; is assigned but never used. This unconnected signal will be trimmed during the optimization process.
-</msg>
-
-<msg type="warning" file="Xst" num="646" delta="old" >Signal &lt;<arg fmt="%s" index="1">AUTOCONFIG_Z3_ACCESS</arg>&gt; is assigned but never used. This unconnected signal will be trimmed during the optimization process.
-</msg>
-
 <msg type="info" file="Xst" num="1799" delta="old" >State <arg fmt="%s" index="1">start_read_upper</arg> is never reached in FSM &lt;<arg fmt="%s" index="2">LAN_SM</arg>&gt;.
 </msg>

@@ -79,13 +79,13 @@
         <ClosedNodesVersion>1</ClosedNodesVersion>
      </ClosedNodes>
      <SelectedItems>
-         <SelectedItem></SelectedItem>
+         <SelectedItem/>
      </SelectedItems>
      <ScrollbarPosition orientation="vertical" >0</ScrollbarPosition>
      <ScrollbarPosition orientation="horizontal" >0</ScrollbarPosition>
      <ViewHeaderState orientation="horizontal" >000000ff000000000000000100000001000000000000000000000000000000000000000000000000f8000000010000000100000000000000000000000064ffffffff000000810000000000000001000000f80000000100000000</ViewHeaderState>
      <UserChangedColumnWidths orientation="horizontal" >false</UserChangedColumnWidths>
-      <CurrentItem></CurrentItem>
+      <CurrentItem/>
   </ItemView>
   <ItemView engineview="BehavioralSim" guiview="Source" compilemode="AutoCompile" >
      <ClosedNodes>
@@ -1,9 +1,9 @@
 <?xml version='1.0' encoding='UTF-8'?>
 <report-views version="2.0" >
 <header>
-  <DateModified>2019-02-20T22:55:09</DateModified>
+  <DateModified>2019-02-21T13:53:24</DateModified>
  <ModuleName>LAN_IDE_CP</ModuleName>
-  <SummaryTimeStamp>2019-01-02T00:55:58</SummaryTimeStamp>
+  <SummaryTimeStamp>2019-02-21T11:03:28</SummaryTimeStamp>
  <SavedFilePath>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/iseconfig/LAN_IDE_CP.xreport</SavedFilePath>
  <ImplementationReportsDirectory>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\</ImplementationReportsDirectory>
  <DateInitialized>2016-12-13T22:08:29</DateInitialized>
@@ -3,7 +3,7 @@
 <!--The data in this file is primarily intended for consumption by Xilinx tools.
 The structure and the elements are likely to change over the next few releases.
 This means code written to parse this file will need to be revisited each subsequent release.-->
-<application name="pn" timeStamp="Wed Feb 20 23:04:39 2019">
+<application name="pn" timeStamp="Thu Feb 21 11:10:33 2019">
 <section name="Project Information" visible="false">
 <property name="ProjectID" value="A2E624B6ED1449CD92F77DE849BF7B51" type="project"/>
 <property name="ProjectIteration" value="0" type="project"/>
@@ -19,6 +19,7 @@ This means code written to parse this file will need to be revisited each subseq
 <property name="PROP_PropSpecInProjFile" value="Store all values" type="design"/>
 <property name="PROP_Simulator" value="ISim (VHDL/Verilog)" type="design"/>
 <property name="PROP_SynthFsmEncode" value="Compact" type="process"/>
+<property name="PROP_SynthOpt" value="Area" type="process"/>
 <property name="PROP_SynthTopFile" value="changed" type="process"/>
 <property name="PROP_Top_Level_Module_Type" value="HDL" type="design"/>
 <property name="PROP_UseSmartGuide" value="false" type="design"/>
@@ -58,7 +58,8 @@ entity LAN_IDE_CP is
           DS1 : in  STD_LOGIC;
           FCS : in  STD_LOGIC;
           RESET : in  STD_LOGIC;
-           INT_OUT : out  STD_LOGIC;
+           INT2_OUT : out  STD_LOGIC;
+			  INT6_OUT : out  STD_LOGIC;
           AUTOBOOT_OFF : in  STD_LOGIC;
           ROM_B : out  STD_LOGIC_VECTOR (1 downto 0);
           ROM_OE : out  STD_LOGIC;
@@ -470,11 +471,15 @@ begin
 	ROM_OE	<= ROM_OE_S when AS='0' and AUTOBOOT_OFF = '0' else '1';				

 --	INT_OUT <= 'Z';
-	INT_OUT <= '0' when 
+	INT2_OUT <= '0' when 
 							(LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1')
-							or CP_IRQ = '0' 
 							else 'Z';

+	INT6_OUT <= '0' when 
+							CP_IRQ = '0' 
+							else 'Z';
+
+	
 	OWN 	<= 'Z';--'0' when AS='0' and (autoconfig  = '1' or ide = '1' or lan_adr = '1' or cp = '1') else 'Z';
 	SLAVE <= '0' when AS='0' and (autoconfig  = '1' or ide = '1' or lan_adr = '1' or cp = '1') else '1';	
 	CFOUT <= '0' when AUTO_CONFIG_DONE=3 else '1';
@@ -0,0 +1,4 @@
+xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP.syr" 
+ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95288xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd  
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
+cpldfit -intstyle ise -p xc95288xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd 
@@ -0,0 +1,197 @@
+Pin Freeze File:  version P.20131013
+
+95288XL144 XC95288XL-10-TQ144
+AS S:PIN80
+AUTOBOOT_OFF S:PIN75
+A<12> S:PIN61
+A<13> S:PIN64
+A<14> S:PIN66
+A<15> S:PIN74
+A<16> S:PIN97
+A<17> S:PIN95
+A<18> S:PIN94
+A<19> S:PIN92
+A<1> S:PIN57
+A<20> S:PIN91
+A<21> S:PIN88
+A<22> S:PIN87
+A<23> S:PIN86
+A<2> S:PIN54
+A<3> S:PIN52
+A<4> S:PIN50
+A<5> S:PIN49
+A<6> S:PIN51
+A<7> S:PIN53
+A<8> S:PIN56
+BERR S:PIN98
+C1 S:PIN103
+C3 S:PIN102
+CFIN S:PIN104
+CLK_EXT S:PIN30
+CP_IRQ S:PIN31
+A<9> S:PIN58
+A<10> S:PIN59
+A<11> S:PIN60
+IDE_WAIT S:PIN33
+LAN_INT S:PIN111
+LDS S:PIN82
+RESET S:PIN143
+RW S:PIN83
+UDS S:PIN81
+A_LAN<0> S:PIN4
+A_LAN<10> S:PIN138
+A_LAN<11> S:PIN139
+A_LAN<12> S:PIN136
+A_LAN<13> S:PIN137
+A_LAN<1> S:PIN3
+A_LAN<2> S:PIN6
+A_LAN<3> S:PIN5
+A_LAN<4> S:PIN9
+A_LAN<5> S:PIN7
+A_LAN<6> S:PIN11
+A_LAN<7> S:PIN10
+A_LAN<8> S:PIN140
+A_LAN<9> S:PIN142
+CFOUT S:PIN105
+CP_CS S:PIN34
+CP_RD S:PIN71
+CP_WE S:PIN70
+DQ<0> S:PIN118
+DQ<10> S:PIN129
+DQ<11> S:PIN115
+DQ<12> S:PIN130
+DQ<13> S:PIN113
+DQ<14> S:PIN131
+DQ<15> S:PIN112
+DQ<1> S:PIN117
+DQ<2> S:PIN120
+DQ<3> S:PIN119
+DQ<4> S:PIN124
+DQ<5> S:PIN121
+DQ<6> S:PIN126
+DQ<7> S:PIN125
+DQ<8> S:PIN128
+DQ<9> S:PIN116
+D<0> S:PIN2
+D<10> S:PIN41
+D<11> S:PIN43
+D<12> S:PIN44
+D<13> S:PIN45
+D<14> S:PIN46
+D<15> S:PIN48
+D<1> S:PIN17
+D<2> S:PIN39
+D<3> S:PIN15
+D<4> S:PIN21
+D<5> S:PIN20
+D<6> S:PIN14
+D<7> S:PIN16
+D<8> S:PIN19
+D<9> S:PIN40
+IDE_A<0> S:PIN24
+IDE_A<1> S:PIN26
+IDE_A<2> S:PIN25
+IDE_CS<0> S:PIN22
+IDE_CS<1> S:PIN23
+IDE_R S:PIN27
+IDE_W S:PIN28
+LAN_CFG<2> S:PIN135
+LAN_CS S:PIN133
+LAN_RD S:PIN134
+LAN_WRH S:PIN132
+LAN_WRL S:PIN76
+ROM_B<1> S:PIN69
+ROM_B<0> S:PIN77
+OWN S:PIN107
+OVR S:PIN100
+MTACK S:PIN96
+LAN_CFG<4> S:PIN110
+LAN_CFG<3> S:PIN13
+LAN_CFG<1> S:PIN12
+INT6_OUT S:PIN68
+INT2_OUT S:PIN32
+DTACK S:PIN85
+ROM_OE S:PIN35
+SLAVE S:PIN106
+
+
+;The remaining section of the .gyd file is for documentation purposes only.
+;It shows where your internal equations were placed in the last successful fit.
+
+PARTITION FB1_2 D_and0000/D_and0000_D2 $OpTx$FX_DC$172 $OpTx$FX_DC$141 D_5_IOBUFE
+		 D_4_IOBUFE $OpTx$FX_DC$127 IDE_CS_0_OBUF LAN_WRL_S
+		 IDE_CS_1_OBUF LAN_WRH_S IDE_A_0_OBUF$BUF0 LAN_RD_S
+		 IDE_A_2_OBUF$BUF0 IDE_A_1_OBUF$BUF0 CP_WE_S IDE_R_OBUF
+		 CP_RD_S
+PARTITION FB2_2 A_LAN_4_OBUF A_LAN_7_OBUF
+PARTITION FB2_5 A_LAN_6_OBUF ROM_B_0_OBUF$BUF6
+PARTITION FB2_8 ROM_B_0_OBUF$BUF5
+PARTITION FB2_10 D_6_IOBUFE
+PARTITION FB2_12 D_3_IOBUFE
+PARTITION FB2_14 D_7_IOBUFE D_1_IOBUFE $OpTx$FX_SC$167 D_8_IOBUFE
+		 $OpTx$FX_DC$152
+PARTITION FB3_2 IDE_W_OBUF
+PARTITION FB3_7 DQ_and0001/DQ_and0001_D2 DQ_and0000/DQ_and0000_D2 $OpTx$FX_DC$126 LAN_BASEADR<5>
+		 LAN_BASEADR<4> LAN_BASEADR<3> LAN_BASEADR<1> ROM_B_0_OBUF$BUF8
+		 CP_BASEADR<5> CP_BASEADR<3> CP_BASEADR<1> CP_BASEADR<0>
+		
+PARTITION FB4_1 Dout1<1> D_0_IOBUFE
+PARTITION FB4_5 A_LAN_1_OBUF A_LAN_0_OBUF
+PARTITION FB4_8 A_LAN_3_OBUF
+PARTITION FB4_12 A_LAN_2_OBUF
+PARTITION FB4_14 A_LAN_5_OBUF $OpTx$FX_DC$195 Dout1<2> EXP22_
+		 EXP23_
+PARTITION FB5_2 CP_CS_OBUF
+PARTITION FB5_5 ROM_OE_OBUF
+PARTITION FB5_10 D_2_IOBUFE $OpTx$FX_DC$154 D_9_IOBUFE lan_adr
+		 D_10_IOBUFE D_11_IOBUFE ide D_12_IOBUFE
+		 lancp
+PARTITION FB6_2 LAN_CFG_2_OBUF A_LAN_12_OBUF
+PARTITION FB6_5 A_LAN_13_OBUF A_LAN_10_OBUF
+PARTITION FB6_8 A_LAN_11_OBUF
+PARTITION FB6_10 A_LAN_8_OBUF
+PARTITION FB6_13 cp_and0000/cp_and0000_D2 A_LAN_9_OBUF A_LAN_9_or0001/A_LAN_9_or0001_D2 $OpTx$FX_DC$137
+		 autoconfig lan_adr_sw
+PARTITION FB7_3 D_13_IOBUFE
+PARTITION FB7_5 D_14_IOBUFE
+PARTITION FB7_8 $OpTx$FX_DC$174 $OpTx$FX_DC$160 ROM_OE_S IDE_W_S
+		 D_15_IOBUFE IDE_R_S IDE_ENABLE D_9_IOBUFE/D_9_IOBUFE_TRST
+		 DS_D AUTO_CONFIG_DONE<1> AUTO_CONFIG_DONE<0>
+PARTITION FB8_2 DQ_12_IOBUFE DQ_14_IOBUFE
+PARTITION FB8_5 LAN_WRH_OBUF
+PARTITION FB8_8 LAN_CS_OBUF
+PARTITION FB8_10 LAN_RD_OBUF
+PARTITION FB8_14 LAN_IRQ_D0 LAN_INT_ENABLE CP_BASEADR<6> CP_BASEADR<4>
+		 LAN_IRQ_OUT
+PARTITION FB9_1 cp_and0001/cp_and0001_D2 EXP24_
+PARTITION FB9_17 SHUT_UP<2>/SHUT_UP<2>_CLKF EXP25_
+PARTITION FB10_2 DQ_1_IOBUFE DQ_0_IOBUFE
+PARTITION FB10_5 DQ_3_IOBUFE DQ_2_IOBUFE
+PARTITION FB10_8 DQ_5_IOBUFE
+PARTITION FB10_10 DQ_4_IOBUFE DQ_7_IOBUFE DQ_6_IOBUFE
+PARTITION FB10_14 DQ_8_IOBUFE
+PARTITION FB10_16 $OpTx$FX_DC$129 DQ_10_IOBUFE DQ_9_IOBUFE/DQ_9_IOBUFE_TRST
+PARTITION FB11_10 CP_WE_QUIRK $OpTx$FX_DC$180 ROM_B_0_OBUF$BUF7 $OpTx$FX_DC$159
+		 ROM_B_0_OBUF $OpTx$FX_DC$153 LAN_BASEADR<2> CP_WE_OBUF
+		 CP_BASEADR<2>
+PARTITION FB12_2 ROM_B_0_OBUF$BUF4
+PARTITION FB12_5 DQ_15_IOBUFE
+PARTITION FB12_8 DQ_13_IOBUFE lancp/lancp_RSTF DQ_11_IOBUFE SHUT_UP<2>
+		 DQ_9_IOBUFE IDE_BASEADR<7> IDE_BASEADR<5> IDE_BASEADR<4>
+		 IDE_BASEADR<3> IDE_BASEADR<2> IDE_BASEADR<1>
+PARTITION FB13_2 CP_RD_OBUF
+PARTITION FB13_5 SHUT_UP<0> LAN_WR_RST LAN_RST_SM_FSM_FFd3 LAN_RST_SM_FSM_FFd1
+		 LAN_RST_SM_FSM_FFd2 LAN_CS_RST LAN_BASEADR<7> LAN_BASEADR<6>
+		 LAN_BASEADR<0> LAN_WRL_OBUF ROM_B_0_OBUF$BUF0 IDE_BASEADR<6>
+		 IDE_BASEADR<0> CP_BASEADR<7>
+PARTITION FB14_1 EXP26_ Dout1<0> ROM_B_0_OBUF$BUF2
+PARTITION FB14_9 $OpTx$FX_DC$158 $OpTx$FX_DC$157 CFOUT_OBUF $OpTx$FX_DC$156
+		 AUTO_CONFIG_DONE_CYCLE<0> SLAVE_OBUF ROM_B_0_OBUF$BUF1 AUTO_CONFIG_DONE_CYCLE<1>
+		 EXP27_ Dout1<3>
+PARTITION FB15_1 $OpTx$FX_DC$206 EXP28_
+PARTITION FB15_12 ROM_B_0_OBUF$BUF9
+PARTITION FB15_17 SHUT_UP<1> EXP29_
+PARTITION FB16_10 ROM_B_0_OBUF$BUF3
+PARTITION FB16_15 EXP30_ EXP31_ cp_and0002/cp_and0002_D2 EXP32_
+		
+
@@ -0,0 +1,173 @@
+Release 8.1i - Fit P.20131013
+Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
+
+ 2-21-2019  1:44PM
+
+NOTE: This file is designed to be imported into a spreadsheet program
+such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
+character is used as the data field separator.
+This file is also designed to support parsing.
+
+Input file:  LAN_IDE_CP.ngd
+output file: LAN_IDE_CP.pad
+Part type:   xc95288xl
+Speed grade: -10
+Package:     tq144
+
+Pinout by Pin Number:
+
+-----|-----|-----|-----|-----|-----|-----|-----|-----|-----|
+Pin Number|Signal Name|Pin Usage|Pin Name|Direction|IO Standard|IO Bank Number|{blank}|Slew Rate|Termination|{blank}|Voltage|Constraint|
+P1|VCC||VCCIO||||||||||
+P2|D<0>|I/O|I/O/GTS3|BIDIR|||||||||
+P3|A_LAN<1>|O|I/O/GTS4|OUTPUT|||||||||
+P4|A_LAN<0>|O|I/O|OUTPUT|||||||||
+P5|A_LAN<3>|O|I/O/GTS1|OUTPUT|||||||||
+P6|A_LAN<2>|O|I/O/GTS2|OUTPUT|||||||||
+P7|A_LAN<5>|O|I/O|OUTPUT|||||||||
+P8|VCC||VCCINT||||||||||
+P9|A_LAN<4>|O|I/O|OUTPUT|||||||||
+P10|A_LAN<7>|O|I/O|OUTPUT|||||||||
+P11|A_LAN<6>|O|I/O|OUTPUT|||||||||
+P12|LAN_CFG<1>|O|I/O|OUTPUT|||||||||
+P13|LAN_CFG<3>|O|I/O|OUTPUT|||||||||
+P14|D<6>|I/O|I/O|BIDIR|||||||||
+P15|D<3>|I/O|I/O|BIDIR|||||||||
+P16|D<7>|I/O|I/O|BIDIR|||||||||
+P17|D<1>|I/O|I/O|BIDIR|||||||||
+P18|GND||GND||||||||||
+P19|D<8>|I/O|I/O|BIDIR|||||||||
+P20|D<5>|I/O|I/O|BIDIR|||||||||
+P21|D<4>|I/O|I/O|BIDIR|||||||||
+P22|IDE_CS<0>|O|I/O|OUTPUT|||||||||
+P23|IDE_CS<1>|O|I/O|OUTPUT|||||||||
+P24|IDE_A<0>|O|I/O|OUTPUT|||||||||
+P25|IDE_A<2>|O|I/O|OUTPUT|||||||||
+P26|IDE_A<1>|O|I/O|OUTPUT|||||||||
+P27|IDE_R|O|I/O|OUTPUT|||||||||
+P28|IDE_W|O|I/O|OUTPUT|||||||||
+P29|GND||GND||||||||||
+P30|CLK_EXT|GCK|I/O/GCK1||||||||||
+P31|CP_IRQ|I|I/O|INPUT|||||||||
+P32|INT2_OUT|O|I/O/GCK2|OUTPUT|||||||||
+P33|IDE_WAIT|I|I/O|INPUT|||||||||
+P34|CP_CS|O|I/O|OUTPUT|||||||||
+P35|ROM_OE|O|I/O|OUTPUT|||||||||
+P36|GND||GND||||||||||
+P37|VCC||VCCIO||||||||||
+P38|TIE||I/O/GCK3||||||||||
+P39|D<2>|I/O|I/O|BIDIR|||||||||
+P40|D<9>|I/O|I/O|BIDIR|||||||||
+P41|D<10>|I/O|I/O|BIDIR|||||||||
+P42|VCC||VCCINT||||||||||
+P43|D<11>|I/O|I/O|BIDIR|||||||||
+P44|D<12>|I/O|I/O|BIDIR|||||||||
+P45|D<13>|I/O|I/O|BIDIR|||||||||
+P46|D<14>|I/O|I/O|BIDIR|||||||||
+P47|GND||GND||||||||||
+P48|D<15>|I/O|I/O|BIDIR|||||||||
+P49|A<5>|I|I/O|INPUT|||||||||
+P50|A<4>|I|I/O|INPUT|||||||||
+P51|A<6>|I|I/O|INPUT|||||||||
+P52|A<3>|I|I/O|INPUT|||||||||
+P53|A<7>|I|I/O|INPUT|||||||||
+P54|A<2>|I|I/O|INPUT|||||||||
+P55|VCC||VCCIO||||||||||
+P56|A<8>|I|I/O|INPUT|||||||||
+P57|A<1>|I|I/O|INPUT|||||||||
+P58|A<9>|I|I/O|INPUT|||||||||
+P59|A<10>|I|I/O|INPUT|||||||||
+P60|A<11>|I|I/O|INPUT|||||||||
+P61|A<12>|I|I/O|INPUT|||||||||
+P62|GND||GND||||||||||
+P63|TDI||TDI||||||||||
+P64|A<13>|I|I/O|INPUT|||||||||
+P65|TMS||TMS||||||||||
+P66|A<14>|I|I/O|INPUT|||||||||
+P67|TCK||TCK||||||||||
+P68|INT6_OUT|O|I/O|OUTPUT|||||||||
+P69|ROM_B<1>|O|I/O|OUTPUT|||||||||
+P70|CP_WE|O|I/O|OUTPUT|||||||||
+P71|CP_RD|O|I/O|OUTPUT|||||||||
+P72|GND||GND||||||||||
+P73|VCC||VCCIO||||||||||
+P74|A<15>|I|I/O|INPUT|||||||||
+P75|AUTOBOOT_OFF|I|I/O|INPUT|||||||||
+P76|LAN_WRL|O|I/O|OUTPUT|||||||||
+P77|ROM_B<0>|O|I/O|OUTPUT|||||||||
+P78|TIE||I/O||||||||||
+P79|TIE||I/O||||||||||
+P80|AS|I|I/O|INPUT|||||||||
+P81|UDS|I|I/O|INPUT|||||||||
+P82|LDS|I|I/O|INPUT|||||||||
+P83|RW|I|I/O|INPUT|||||||||
+P84|VCC||VCCINT||||||||||
+P85|DTACK|O|I/O|OUTPUT|||||||||
+P86|A<23>|I|I/O|INPUT|||||||||
+P87|A<22>|I|I/O|INPUT|||||||||
+P88|A<21>|I|I/O|INPUT|||||||||
+P89|GND||GND||||||||||
+P90|GND||GND||||||||||
+P91|A<20>|I|I/O|INPUT|||||||||
+P92|A<19>|I|I/O|INPUT|||||||||
+P93|TIE||I/O||||||||||
+P94|A<18>|I|I/O|INPUT|||||||||
+P95|A<17>|I|I/O|INPUT|||||||||
+P96|MTACK|O|I/O|OUTPUT|||||||||
+P97|A<16>|I|I/O|INPUT|||||||||
+P98|BERR|I|I/O|INPUT|||||||||
+P99|GND||GND||||||||||
+P100|OVR|O|I/O|OUTPUT|||||||||
+P101|TIE||I/O||||||||||
+P102|C3|I|I/O|INPUT|||||||||
+P103|C1|I|I/O|INPUT|||||||||
+P104|CFIN|I|I/O|INPUT|||||||||
+P105|CFOUT|O|I/O|OUTPUT|||||||||
+P106|SLAVE|O|I/O|OUTPUT|||||||||
+P107|OWN|O|I/O|OUTPUT|||||||||
+P108|GND||GND||||||||||
+P109|VCC||VCCIO||||||||||
+P110|LAN_CFG<4>|O|I/O|OUTPUT|||||||||
+P111|LAN_INT|I|I/O|INPUT|||||||||
+P112|DQ<15>|I/O|I/O|BIDIR|||||||||
+P113|DQ<13>|I/O|I/O|BIDIR|||||||||
+P114|GND||GND||||||||||
+P115|DQ<11>|I/O|I/O|BIDIR|||||||||
+P116|DQ<9>|I/O|I/O|BIDIR|||||||||
+P117|DQ<1>|I/O|I/O|BIDIR|||||||||
+P118|DQ<0>|I/O|I/O|BIDIR|||||||||
+P119|DQ<3>|I/O|I/O|BIDIR|||||||||
+P120|DQ<2>|I/O|I/O|BIDIR|||||||||
+P121|DQ<5>|I/O|I/O|BIDIR|||||||||
+P122|TDO||TDO||||||||||
+P123|GND||GND||||||||||
+P124|DQ<4>|I/O|I/O|BIDIR|||||||||
+P125|DQ<7>|I/O|I/O|BIDIR|||||||||
+P126|DQ<6>|I/O|I/O|BIDIR|||||||||
+P127|VCC||VCCIO||||||||||
+P128|DQ<8>|I/O|I/O|BIDIR|||||||||
+P129|DQ<10>|I/O|I/O|BIDIR|||||||||
+P130|DQ<12>|I/O|I/O|BIDIR|||||||||
+P131|DQ<14>|I/O|I/O|BIDIR|||||||||
+P132|LAN_WRH|O|I/O|OUTPUT|||||||||
+P133|LAN_CS|O|I/O|OUTPUT|||||||||
+P134|LAN_RD|O|I/O|OUTPUT|||||||||
+P135|LAN_CFG<2>|O|I/O|OUTPUT|||||||||
+P136|A_LAN<12>|O|I/O|OUTPUT|||||||||
+P137|A_LAN<13>|O|I/O|OUTPUT|||||||||
+P138|A_LAN<10>|O|I/O|OUTPUT|||||||||
+P139|A_LAN<11>|O|I/O|OUTPUT|||||||||
+P140|A_LAN<8>|O|I/O|OUTPUT|||||||||
+P141|VCC||VCCINT||||||||||
+P142|A_LAN<9>|O|I/O|OUTPUT|||||||||
+P143|RESET|GSR/I|I/O/GSR||||||||||
+P144|GND||GND||||||||||
+
+To preserve the pinout above for future design iterations in
+Project Navigator simply execute the (Lock Pins) process
+located under the (Implement Design) process in a toolbox named
+(Optional Implementation Tools) or invoke PIN2UCF from the
+command line. The location constraints will be written into your
+specified UCF file
+
+
@@ -0,0 +1,313 @@
+Release 14.7 - xst P.20131013 (nt64)
+Copyright (c) 1995-2013 Xilinx, Inc.  All rights reserved.
+--> Parameter TMPDIR set to xst/projnav.tmp
+
+
+Total REAL time to Xst completion: 0.00 secs
+Total CPU time to Xst completion: 0.14 secs
+ 
+--> Parameter xsthdpdir set to xst
+
+
+Total REAL time to Xst completion: 0.00 secs
+Total CPU time to Xst completion: 0.14 secs
+ 
+--> Reading design: LAN_IDE_CP.prj
+
+TABLE OF CONTENTS
+  1) Synthesis Options Summary
+  2) HDL Compilation
+  3) Design Hierarchy Analysis
+  4) HDL Analysis
+  5) HDL Synthesis
+     5.1) HDL Synthesis Report
+  6) Advanced HDL Synthesis
+     6.1) Advanced HDL Synthesis Report
+  7) Low Level Synthesis
+  8) Partition Report
+  9) Final Report
+
+=========================================================================
+*                      Synthesis Options Summary                        *
+=========================================================================
+---- Source Parameters
+Input File Name                    : "LAN_IDE_CP.prj"
+Input Format                       : mixed
+Ignore Synthesis Constraint File   : NO
+
+---- Target Parameters
+Output File Name                   : "LAN_IDE_CP"
+Output Format                      : NGC
+Target Device                      : XC9500XL CPLDs
+
+---- Source Options
+Top Module Name                    : LAN_IDE_CP
+Automatic FSM Extraction           : YES
+FSM Encoding Algorithm             : Compact
+Safe Implementation                : No
+Mux Extraction                     : Yes
+Resource Sharing                   : YES
+
+---- Target Options
+Add IO Buffers                     : YES
+MACRO Preserve                     : YES
+XOR Preserve                       : YES
+Equivalent register Removal        : YES
+
+---- General Options
+Optimization Goal                  : Speed
+Optimization Effort                : 1
+Keep Hierarchy                     : Yes
+Netlist Hierarchy                  : As_Optimized
+RTL Output                         : Yes
+Hierarchy Separator                : /
+Bus Delimiter                      : <>
+Case Specifier                     : Maintain
+Verilog 2001                       : YES
+
+---- Other Options
+Clock Enable                       : YES
+wysiwyg                            : NO
+
+=========================================================================
+
+Setting FSM Encoding Algorithm to : OPT
+
+
+=========================================================================
+*                          HDL Compilation                              *
+=========================================================================
+Compiling vhdl file "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd" in Library work.
+Entity <LAN_IDE_CP> compiled.
+Entity <LAN_IDE_CP> (Architecture <Behavioral>) compiled.
+
+=========================================================================
+*                     Design Hierarchy Analysis                         *
+=========================================================================
+Analyzing hierarchy for entity <LAN_IDE_CP> in library <work> (architecture <Behavioral>).
+
+
+=========================================================================
+*                            HDL Analysis                               *
+=========================================================================
+Analyzing Entity <LAN_IDE_CP> in library <work> (Architecture <Behavioral>).
+Entity <LAN_IDE_CP> analyzed. Unit <LAN_IDE_CP> generated.
+
+
+=========================================================================
+*                           HDL Synthesis                               *
+=========================================================================
+
+Performing bidirectional port resolution...
+INFO:Xst:2561 - Always blocking tristate driving signal <A> in unit <LAN_IDE_CP> is removed.
+
+Synthesizing Unit <LAN_IDE_CP>.
+    Related source file is "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE_V2/LAN_IDE_CP-Z2v2.vhd".
+WARNING:Xst:647 - Input <DS0> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
+WARNING:Xst:647 - Input <DS1> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
+WARNING:Xst:647 - Input <FCS> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
+WARNING:Xst:647 - Input <Z3> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
+WARNING:Xst:647 - Input <MTCR> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.
+WARNING:Xst:1780 - Signal <LAN_INT_D0> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
+WARNING:Xst:1780 - Signal <DTACK_S> is never used or assigned. This unconnected signal will be trimmed during the optimization process.
+    Found finite state machine <FSM_0> for signal <LAN_RST_SM>.
+    -----------------------------------------------------------------------
+    | States             | 8                                              |
+    | Transitions        | 8                                              |
+    | Inputs             | 0                                              |
+    | Outputs            | 8                                              |
+    | Clock              | CLK_EXT                   (rising_edge)        |
+    | Reset              | RESET                     (positive)           |
+    | Reset type         | synchronous                                    |
+    | Reset State        | nop                                            |
+    | Power Up State     | nop                                            |
+    | Encoding           | compact                                        |
+    | Implementation     | automatic                                      |
+    -----------------------------------------------------------------------
+    Found 16-bit tristate buffer for signal <D>.
+    Found 16-bit tristate buffer for signal <DQ>.
+    Found 1-bit tristate buffer for signal <OWN>.
+    Found 1-bit tristate buffer for signal <OVR>.
+    Found 1-bit tristate buffer for signal <MTACK>.
+    Found 1-bit tristate buffer for signal <DTACK>.
+    Found 1-bit tristate buffer for signal <INT2_OUT>.
+    Found 1-bit tristate buffer for signal <INT6_OUT>.
+    Found 1-bit xor2 for signal <AMIGA_CLK$xor0000> created at line 147.
+    Found 2-bit register for signal <AUTO_CONFIG_DONE>.
+    Found 2-bit register for signal <AUTO_CONFIG_DONE_CYCLE>.
+    Found 2-bit adder for signal <AUTO_CONFIG_DONE_CYCLE$addsub0000> created at line 415.
+    Found 1-bit register for signal <autoconfig>.
+    Found 1-bit register for signal <cp>.
+    Found 8-bit comparator equal for signal <cp$cmp_eq0001> created at line 217.
+    Found 8-bit comparator equal for signal <cp$cmp_eq0002> created at line 223.
+    Found 2-bit comparator less for signal <cp$cmp_lt0000> created at line 216.
+    Found 8-bit register for signal <CP_BASEADR>.
+    Found 1-bit register for signal <CP_RD_S>.
+    Found 1-bit register for signal <CP_WE_QUIRK>.
+    Found 1-bit register for signal <CP_WE_S>.
+    Found 4-bit register for signal <Dout1>.
+    Found 3-bit comparator less for signal <Dout1$cmp_lt0000> created at line 337.
+    Found 1-bit register for signal <DS_D>.
+    Found 1-bit register for signal <ide>.
+    Found 8-bit comparator equal for signal <ide$cmp_eq0000> created at line 226.
+    Found 8-bit register for signal <IDE_BASEADR>.
+    Found 1-bit register for signal <IDE_ENABLE>.
+    Found 1-bit register for signal <IDE_R_S>.
+    Found 1-bit register for signal <IDE_W_S>.
+    Found 1-bit register for signal <lan_adr>.
+    Found 1-bit register for signal <lan_adr_sw>.
+    Found 2-bit comparator less for signal <lan_adr_sw$cmp_lt0000> created at line 219.
+    Found 8-bit register for signal <LAN_BASEADR>.
+    Found 1-bit register for signal <LAN_CS_RST>.
+    Found 1-bit register for signal <LAN_INT_ENABLE>.
+    Found 1-bit register for signal <LAN_IRQ_D0>.
+    Found 1-bit register for signal <LAN_IRQ_OUT>.
+    Found 1-bit register for signal <LAN_RD_S>.
+    Found 1-bit register for signal <LAN_WR_RST>.
+    Found 1-bit register for signal <LAN_WRH_S>.
+    Found 1-bit register for signal <LAN_WRL_S>.
+    Found 1-bit register for signal <lancp>.
+    Found 1-bit register for signal <ROM_OE_S>.
+    Found 3-bit register for signal <SHUT_UP>.
+    Summary:
+	inferred   1 Finite State Machine(s).
+	inferred  18 D-type flip-flop(s).
+	inferred   1 Adder/Subtractor(s).
+	inferred   6 Comparator(s).
+	inferred   1 Xor(s).
+	inferred  38 Tristate(s).
+Unit <LAN_IDE_CP> synthesized.
+
+
+=========================================================================
+HDL Synthesis Report
+
+Macro Statistics
+# Adders/Subtractors                                   : 1
+ 2-bit adder                                           : 1
+# Registers                                            : 31
+ 1-bit register                                        : 25
+ 2-bit register                                        : 2
+ 4-bit register                                        : 1
+ 8-bit register                                        : 3
+# Comparators                                          : 6
+ 2-bit comparator less                                 : 2
+ 3-bit comparator less                                 : 1
+ 8-bit comparator equal                                : 3
+# Tristates                                            : 8
+ 1-bit tristate buffer                                 : 6
+ 16-bit tristate buffer                                : 2
+# Xors                                                 : 1
+ 1-bit xor2                                            : 1
+
+=========================================================================
+
+=========================================================================
+*                       Advanced HDL Synthesis                          *
+=========================================================================
+
+Optimizing FSM <LAN_RST_SM/FSM> on signal <LAN_RST_SM[1:3]> with compact encoding.
+------------------------
+ State      | Encoding
+------------------------
+ nop        | 000
+ wait0      | 100
+ clr        | 101
+ clr_commit | 111
+ wait1      | 001
+ set        | 011
+ set_commit | 010
+ done       | 110
+------------------------
+
+=========================================================================
+Advanced HDL Synthesis Report
+
+Macro Statistics
+# FSMs                                                 : 1
+# Adders/Subtractors                                   : 1
+ 2-bit adder                                           : 1
+# Registers                                            : 18
+ Flip-Flops                                            : 18
+# Comparators                                          : 3
+ 8-bit comparator equal                                : 3
+
+=========================================================================
+
+=========================================================================
+*                         Low Level Synthesis                           *
+=========================================================================
+
+Optimizing unit <LAN_IDE_CP> ...
+  implementation constraint: INIT=r	 : LAN_RST_SM_FSM_FFd1
+  implementation constraint: INIT=r	 : LAN_RST_SM_FSM_FFd2
+  implementation constraint: INIT=r	 : LAN_RST_SM_FSM_FFd3
+
+=========================================================================
+*                           Partition Report                            *
+=========================================================================
+
+Partition Implementation Status
+-------------------------------
+
+  No Partitions were found in this design.
+
+-------------------------------
+
+=========================================================================
+*                            Final Report                               *
+=========================================================================
+Final Results
+RTL Top Level Output File Name     : LAN_IDE_CP.ngr
+Top Level Output File Name         : LAN_IDE_CP
+Output Format                      : NGC
+Optimization Goal                  : Speed
+Keep Hierarchy                     : Yes
+Target Technology                  : XC9500XL CPLDs
+Macro Preserve                     : YES
+XOR Preserve                       : YES
+Clock Enable                       : YES
+wysiwyg                            : NO
+
+Design Statistics
+# IOs                              : 117
+
+Cell Usage :
+# BELS                             : 964
+#      AND2                        : 222
+#      AND3                        : 78
+#      AND4                        : 12
+#      AND5                        : 5
+#      AND6                        : 1
+#      AND8                        : 4
+#      GND                         : 1
+#      INV                         : 407
+#      OR2                         : 196
+#      OR3                         : 9
+#      VCC                         : 1
+#      XOR2                        : 28
+# FlipFlops/Latches                : 60
+#      FD                          : 11
+#      FDC                         : 6
+#      FDCE                        : 6
+#      FDP                         : 4
+#      FDPE                        : 33
+# IO Buffers                       : 112
+#      IBUF                        : 37
+#      IOBUFE                      : 32
+#      OBUF                        : 37
+#      OBUFE                       : 6
+=========================================================================
+
+
+Total REAL time to Xst completion: 8.00 secs
+Total CPU time to Xst completion: 8.23 secs
+ 
+--> 
+
+Total memory usage is 4534756 kilobytes
+
+Number of errors   :    0 (   0 filtered)
+Number of warnings :    7 (   0 filtered)
+Number of infos    :    1 (   0 filtered)
+
@@ -0,0 +1,15 @@
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd2.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd3.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_RST_SM_FSM_FFd1.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_WR_RST.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_WR_RST.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_WR_RST.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd3.Q:TO:LAN_CS_RST.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd1.Q:TO:LAN_CS_RST.D:400
+TS_CLK_EXT:FROM:LAN_RST_SM_FSM_FFd2.Q:TO:LAN_CS_RST.D:400
@@ -0,0 +1,14 @@
+<html>
+  <head>
+    <title></title>
+  </head>
+  <frameset frameborder="NO" framespacing="0" border="0" rows="94,*,0,0" col="*">
+    <frame name="topnav" src="../tim/topnav.htm" scrolling="no" noresize marginwidth="0" marginheight="0">
+    <frameset frameborder="NO" framespacing="0" border="0" cols="125,*">
+      <frame name="leftnav" src="leftnav.htm" noresize marginwidth="0" marginheight="0">
+      <frame name="content" src="summary.htm">
+    </frameset>
+    <frame name="eqns" src="eqns.htm" scrolling="no">
+  </frameset>
+</html>
+
@@ -0,0 +1,4 @@
+<form><span class="pgRef"><table width="90%" align="center"><tr>
+<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
+<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
+</tr></table></span></form>
@@ -0,0 +1,71 @@
+<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
+
+<html>
+
+<!--(==============================================================)-->
+<!--(Document created with RoboEditor. )============================-->
+<!--(==============================================================)-->
+
+<head>
+
+<title>Text Report</title>
+
+<!--(Meta)==========================================================-->
+
+<meta name=generator content="RoboHELP by eHelp Corporation - www.ehelp.com">
+<meta name=generator-major-version content=0.1>
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+<meta name=layout-height content=375>
+<meta name=layout-width content=798>
+<meta name=date content="05 1, 2002 4:24:59 PM">
+
+
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+<!--
+p.whs1 {font-family: arial, sans-serif; font-size: 10pt;}
+
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+	onresize = reDo;
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+//-->
+</script><style>
+<!--
+  div.WebHelpPopupMenu {position:absolute; left:0px; top:0px; z-index:4; visibility:hidden;}
+  p.WebHelpNavBar {text-align:right;}
+-->
+</style>
+</head>
+
+<!--(Body)==========================================================-->
+
+
+<body>
+
+
+<h1>Text Report</h1>
+
+<p class="whs1">Selecting Text 
+ Report from the left-hand frame will give you a printable text version 
+ of the fitter report. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->It 
+ contains sections similar to those of the XML report (a summary section, 
+ errors and warnings, mapped logic, function blocks, function block details, 
+ a text-graphical display of the pinout, and a summary of compiler options), 
+ but it is not easily navigable. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->It 
+ is best to use the text report only when you need to print out a hard 
+ copy of the fitter results.</p>
+
+</body>
+
+</html>
@@ -0,0 +1,9 @@
+<html>
+  <head>
+   <script src="XilinxD.js"> </script>
+   <script src="plugin.js"> </script>
+
+  </head> 
+  <body onload="javascript:checkJre()" bgcolor="#ffffff" topmargin="0" leftmargin="0" marginheight="0" marginwidth="0" > 
+  </body> 
+</html> 
@@ -0,0 +1,9 @@
+<html>
+  <head>
+   <script src="xilinxD.js"> </script>
+   <script src="ns4plugin.js"> </script>
+
+  </head> 
+  <body onload="javascript:checkJre()" bgcolor="#ffffff" topmargin="0" leftmargin="0" marginheight="0" marginwidth="0" > 
+  </body> 
+</html> 
@@ -0,0 +1,915 @@
+<html><head><link type='text/css' href='style.css' rel='stylesheet'></head><body class='pgBgnd'>
+<h3 align='center'>Equations</h3>
+<table width='90%' align='center' border='1' cellpadding='0' cellspacing='0'>
+<tr><td>
+</td></tr><tr><td>
+********** Mapped Logic **********
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$126 <= (LDS AND UDS);
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$127 <= (lan_adr AND lan_adr_sw);
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$129 <= (RW AND NOT AS);
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$137 <= ((NOT LAN_RST_SM_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3));
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$141 <= (CP_CS AND NOT $OpTx$FX_DC$127);
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$152 <= ((D_and0000/D_and0000_D2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (ide AND $OpTx$FX_DC$129 AND $OpTx$FX_DC$141));
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$153 <= ((DQ_and0000/DQ_and0000_D2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT RW AND NOT AS AND $OpTx$FX_DC$127 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT DQ_and0001/DQ_and0001_D2));
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$154 <= ($OpTx$FX_DC$127 AND NOT D_and0000/D_and0000_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$129);
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$156 <= (NOT RW AND NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT A(1) AND NOT AS AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND A(3) AND A(6) AND autoconfig AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	DS_D AND NOT $OpTx$FX_DC$126);
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$157 <= (NOT RW AND NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT A(1) AND NOT AS AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND A(3) AND A(6) AND autoconfig AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	DS_D AND NOT $OpTx$FX_DC$126);
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$158 <= (NOT RW AND NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT A(1) AND NOT AS AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND A(3) AND A(6) AND autoconfig AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	DS_D AND NOT $OpTx$FX_DC$126);
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$159 <= ((NOT DQ_and0000/DQ_and0000_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	DQ_and0001/DQ_and0001_D2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT RW AND NOT AS AND $OpTx$FX_DC$127 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT DQ_and0000/DQ_and0000_D2));
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$160 <= (NOT AS AND autoconfig AND NOT $OpTx$FX_DC$126);
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$172 <= (NOT RW AND lan_adr AND A(15) AND NOT $OpTx$FX_DC$126);
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$174 <= (NOT AS AND RESET);
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$180 <= ((NOT RW AND NOT A(5) AND NOT A(4) AND A(2) AND NOT A(1) AND NOT AS AND A(3) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A(6) AND autoconfig AND DS_D AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT RW AND NOT A(5) AND NOT A(4) AND NOT A(1) AND NOT AS AND A(3) AND A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	autoconfig AND DS_D AND CFOUT AND NOT $OpTx$FX_DC$126));
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$195 <= (NOT A(4) AND A(2) AND A(1));
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_DC$206 <= ((SHUT_UP(2))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(0) AND NOT A(16))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT IDE_BASEADR(0) AND A(16))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(1) AND NOT A(17))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT IDE_BASEADR(1) AND A(17))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT IDE_BASEADR(2) AND A(18))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (SHUT_UP(1).EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(2) AND NOT A(18))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(3) AND NOT A(19))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT IDE_BASEADR(3) AND A(19))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(6) AND NOT A(22))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT IDE_BASEADR(6) AND A(22))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(4) AND NOT A(20))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT IDE_BASEADR(4) AND A(20))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(5) AND NOT A(21))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT IDE_BASEADR(5) AND A(21)));
+</td></tr><tr><td>
+</td></tr><tr><td>
+$OpTx$FX_SC$167 <= ((NOT D_and0000/D_and0000_D2 AND NOT $OpTx$FX_DC$129)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT ide AND NOT D_and0000/D_and0000_D2 AND $OpTx$FX_DC$141));
+</td></tr><tr><td>
+FDCPE_AUTO_CONFIG_DONE0: FDCPE port map (AUTO_CONFIG_DONE(0),AUTO_CONFIG_DONE_CYCLE(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT RESET,'0',AS);
+</td></tr><tr><td>
+FDCPE_AUTO_CONFIG_DONE1: FDCPE port map (AUTO_CONFIG_DONE(1),AUTO_CONFIG_DONE_CYCLE(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT RESET,'0',AS);
+</td></tr><tr><td>
+FDCPE_AUTO_CONFIG_DONE_CYCLE0: FDCPE port map (AUTO_CONFIG_DONE_CYCLE(0),AUTO_CONFIG_DONE_CYCLE_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT RESET,'0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;AUTO_CONFIG_DONE_CYCLE_D(0) <= ((NOT AUTO_CONFIG_DONE_CYCLE(0) AND NOT $OpTx$FX_DC$180)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(2) AND AUTO_CONFIG_DONE(0) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT AUTO_CONFIG_DONE_CYCLE(0) AND NOT AUTOBOOT_OFF)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT RW AND NOT A(5) AND NOT A(4) AND A(2) AND NOT A(1) AND NOT AS AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	AUTO_CONFIG_DONE_CYCLE(0) AND A(3) AND A(6) AND autoconfig AND DS_D AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT RW AND NOT A(5) AND NOT A(4) AND NOT A(1) AND NOT AS AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND AUTO_CONFIG_DONE_CYCLE(0) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	A(3) AND A(6) AND autoconfig AND DS_D AND NOT AUTOBOOT_OFF AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$126));
+</td></tr><tr><td>
+FDCPE_AUTO_CONFIG_DONE_CYCLE1: FDCPE port map (AUTO_CONFIG_DONE_CYCLE(1),AUTO_CONFIG_DONE_CYCLE_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT RESET,'0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;AUTO_CONFIG_DONE_CYCLE_D(1) <= ((NOT RW AND NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT A(1) AND NOT AS AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND A(3) AND A(6) AND autoconfig AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	DS_D AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT AUTO_CONFIG_DONE_CYCLE(1) AND NOT $OpTx$FX_DC$180)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A(2) AND NOT AUTO_CONFIG_DONE_CYCLE(0) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT AUTO_CONFIG_DONE_CYCLE(1))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(2) AND NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT AUTO_CONFIG_DONE_CYCLE(1))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT RW AND NOT A(5) AND NOT A(4) AND A(2) AND NOT A(1) AND NOT AS AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	AUTO_CONFIG_DONE_CYCLE(0) AND AUTO_CONFIG_DONE_CYCLE(1) AND A(3) AND A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	autoconfig AND DS_D AND NOT $OpTx$FX_DC$126));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(0) <= NOT ((NOT A(1) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(1) <= NOT ((NOT A(2) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(2) <= NOT (((NOT A(2) AND NOT CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(3) AND CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137)));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(3) <= ((A(4) AND CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A(3) AND NOT CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(4) <= NOT (((NOT A(5) AND CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(4) AND NOT CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137)));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(5) <= NOT (((NOT A(5) AND NOT CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(6) AND CP_CS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137)));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(6) <= ((NOT $OpTx$FX_DC$137)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A(7) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(7) <= NOT ((NOT A(8) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(8) <= NOT ((NOT A(9) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(9) <= NOT ((NOT A(10) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(10) <= NOT ((NOT A(11) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(11) <= NOT ((NOT A(12) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(12) <= NOT ((NOT A(13) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN(13) <= NOT ((NOT A(14) AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137));
+</td></tr><tr><td>
+</td></tr><tr><td>
+A_LAN_9_or0001/A_LAN_9_or0001_D2 <= ((LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1));
+</td></tr><tr><td>
+</td></tr><tr><td>
+CFOUT <= NOT ((AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0)));
+</td></tr><tr><td>
+FDCPE_CP_BASEADR0: FDCPE port map (CP_BASEADR(0),CP_BASEADR_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(0) <= ((D(8).PIN AND $OpTx$FX_DC$157)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(0) AND NOT $OpTx$FX_DC$157));
+</td></tr><tr><td>
+FDCPE_CP_BASEADR1: FDCPE port map (CP_BASEADR(1),CP_BASEADR_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(1) <= ((D(9).PIN AND $OpTx$FX_DC$157)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(1) AND NOT $OpTx$FX_DC$157));
+</td></tr><tr><td>
+FDCPE_CP_BASEADR2: FDCPE port map (CP_BASEADR(2),CP_BASEADR_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(2) <= ((D(10).PIN AND $OpTx$FX_DC$157)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(2) AND NOT $OpTx$FX_DC$157));
+</td></tr><tr><td>
+FDCPE_CP_BASEADR3: FDCPE port map (CP_BASEADR(3),CP_BASEADR_D(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(3) <= ((D(11).PIN AND $OpTx$FX_DC$157)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(3) AND NOT $OpTx$FX_DC$157));
+</td></tr><tr><td>
+FDCPE_CP_BASEADR4: FDCPE port map (CP_BASEADR(4),CP_BASEADR_D(4),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(4) <= ((D(12).PIN AND $OpTx$FX_DC$157)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(4) AND NOT $OpTx$FX_DC$157));
+</td></tr><tr><td>
+FDCPE_CP_BASEADR5: FDCPE port map (CP_BASEADR(5),CP_BASEADR_D(5),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(5) <= ((D(13).PIN AND $OpTx$FX_DC$157)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(5) AND NOT $OpTx$FX_DC$157));
+</td></tr><tr><td>
+FDCPE_CP_BASEADR6: FDCPE port map (CP_BASEADR(6),CP_BASEADR_D(6),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(6) <= ((D(14).PIN AND $OpTx$FX_DC$157)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(6) AND NOT $OpTx$FX_DC$157));
+</td></tr><tr><td>
+FDCPE_CP_BASEADR7: FDCPE port map (CP_BASEADR(7),CP_BASEADR_D(7),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_BASEADR_D(7) <= ((D(15).PIN AND $OpTx$FX_DC$157)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(7) AND NOT $OpTx$FX_DC$157));
+</td></tr><tr><td>
+FDCPE_CP_CS: FDCPE port map (CP_CS,CP_CS_D,NOT AS,'0',NOT lancp/lancp_RSTF);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_CS_D <= (cp_and0001/cp_and0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cp_and0000/cp_and0000_D2 AND NOT cp_and0002/cp_and0002_D2);
+</td></tr><tr><td>
+</td></tr><tr><td>
+CP_RD <= NOT ((NOT AS AND NOT CP_RD_S));
+</td></tr><tr><td>
+FDCPE_CP_RD_S: FDCPE port map (CP_RD_S,CP_RD_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_RD_S_D <= (RW AND NOT CP_CS AND NOT $OpTx$FX_DC$126);
+</td></tr><tr><td>
+</td></tr><tr><td>
+CP_WE <= NOT ((NOT AS AND NOT CP_WE_S AND CP_WE_QUIRK));
+</td></tr><tr><td>
+FDCPE_CP_WE_QUIRK: FDCPE port map (CP_WE_QUIRK,CP_WE_S,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
+</td></tr><tr><td>
+FDCPE_CP_WE_S: FDCPE port map (CP_WE_S,CP_WE_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;CP_WE_S_D <= (NOT RW AND NOT CP_CS AND NOT $OpTx$FX_DC$126);
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(0) <= NOT (((NOT DQ(0).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT DQ(8).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(0) <= D_I(0) when D_OE(0) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(0) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(1) <= NOT (((NOT DQ(1).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT DQ(9).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(1) <= D_I(1) when D_OE(1) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(1) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(2) <= NOT (((NOT DQ(2).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT DQ(10).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(2) <= D_I(2) when D_OE(2) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(2) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(3) <= NOT (((NOT DQ(3).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT DQ(11).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(3) <= D_I(3) when D_OE(3) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(3) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(4) <= NOT (((NOT DQ(4).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT DQ(12).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(4) <= D_I(4) when D_OE(4) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(4) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(5) <= NOT (((NOT DQ(5).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT DQ(13).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(5) <= D_I(5) when D_OE(5) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(5) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(6) <= NOT (((NOT DQ(6).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT DQ(14).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(6) <= D_I(6) when D_OE(6) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(6) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(7) <= NOT (((NOT DQ(7).PIN AND NOT $OpTx$FX_SC$167 AND NOT $OpTx$FX_DC$154)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT DQ(15).PIN AND NOT $OpTx$FX_SC$167 AND $OpTx$FX_DC$154)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(7) <= D_I(7) when D_OE(7) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(7) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(8) <= NOT (((NOT DQ(8).PIN AND $OpTx$FX_DC$152)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT DQ(0).PIN AND NOT D_and0000/D_and0000_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(8) <= D_I(8) when D_OE(8) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(8) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(9) <= NOT (((NOT DQ(9).PIN AND $OpTx$FX_DC$152)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT DQ(1).PIN AND NOT D_and0000/D_and0000_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(9) <= D_I(9) when D_OE(9) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(9) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(10) <= NOT (((NOT DQ(10).PIN AND $OpTx$FX_DC$152)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT DQ(2).PIN AND NOT D_and0000/D_and0000_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(10) <= D_I(10) when D_OE(10) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(10) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(11) <= NOT (((NOT DQ(11).PIN AND $OpTx$FX_DC$152)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT DQ(3).PIN AND NOT D_and0000/D_and0000_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(11) <= D_I(11) when D_OE(11) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(11) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(12) <= ((Dout1(0) AND $OpTx$FX_SC$167)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (DQ(12).PIN AND $OpTx$FX_DC$152)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (DQ(4).PIN AND NOT D_and0000/D_and0000_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(12) <= D_I(12) when D_OE(12) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(12) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(13) <= ((Dout1(1) AND $OpTx$FX_SC$167)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (DQ(13).PIN AND $OpTx$FX_DC$152)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (DQ(5).PIN AND NOT D_and0000/D_and0000_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(13) <= D_I(13) when D_OE(13) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(13) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(14) <= ((Dout1(2) AND $OpTx$FX_SC$167)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (DQ(14).PIN AND $OpTx$FX_DC$152)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (DQ(6).PIN AND NOT D_and0000/D_and0000_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(14) <= D_I(14) when D_OE(14) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(14) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_I(15) <= ((Dout1(3) AND $OpTx$FX_SC$167)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (DQ(15).PIN AND $OpTx$FX_DC$152)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (DQ(7).PIN AND NOT D_and0000/D_and0000_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$129 AND NOT $OpTx$FX_DC$141));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D(15) <= D_I(15) when D_OE(15) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;D_OE(15) <= NOT D_9_IOBUFE/D_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(0) <= ((D(8).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(0).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(0) <= DQ_I(0) when DQ_OE(0) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(0) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(1) <= ((D(9).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(1).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(1) <= DQ_I(1) when DQ_OE(1) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(1) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(2) <= ((D(10).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(2).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(2) <= DQ_I(2) when DQ_OE(2) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(2) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(3) <= ((D(11).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(3).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(3) <= DQ_I(3) when DQ_OE(3) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(3) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(4) <= ((A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(12).PIN AND $OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(4).PIN AND $OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(4) <= DQ_I(4) when DQ_OE(4) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(4) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(5) <= ((D(13).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(5).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(5) <= DQ_I(5) when DQ_OE(5) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(5) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(6) <= ((D(14).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(6).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(6) <= DQ_I(6) when DQ_OE(6) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(6) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(7) <= ((D(15).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND $OpTx$FX_DC$159)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(7).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$159));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(7) <= DQ_I(7) when DQ_OE(7) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(7) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(8) <= NOT (((NOT $OpTx$FX_DC$137)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT D(8).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$153)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT D(0).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$153)));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(8) <= DQ_I(8) when DQ_OE(8) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(8) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(9) <= ((NOT $OpTx$FX_DC$137)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(9).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$153)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(1).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$153));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(9) <= DQ_I(9) when DQ_OE(9) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(9) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(10) <= ((NOT $OpTx$FX_DC$137)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(10).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$153)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(2).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$153));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(10) <= DQ_I(10) when DQ_OE(10) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(10) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(11) <= ((NOT $OpTx$FX_DC$137)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(11).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$153)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(3).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$153));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(11) <= DQ_I(11) when DQ_OE(11) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(11) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(12) <= ((D(12).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$153)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(4).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND $OpTx$FX_DC$153));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(12) <= DQ_I(12) when DQ_OE(12) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(12) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(13) <= ((D(13).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$153)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(5).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND $OpTx$FX_DC$153));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(13) <= DQ_I(13) when DQ_OE(13) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(13) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(14) <= ((D(14).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$153)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(6).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND $OpTx$FX_DC$153));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(14) <= DQ_I(14) when DQ_OE(14) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(14) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_I(15) <= ((D(15).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND NOT $OpTx$FX_DC$153)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (D(7).PIN AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137 AND $OpTx$FX_DC$153));
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ(15) <= DQ_I(15) when DQ_OE(15) = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DQ_OE(15) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST;
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_9_IOBUFE/DQ_9_IOBUFE_TRST <= ((RW AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (AS AND NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$137)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT lancp AND NOT $OpTx$FX_DC$127 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A_LAN_9_or0001/A_LAN_9_or0001_D2 AND $OpTx$FX_DC$137));
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_and0000/DQ_and0000_D2 <= (NOT RW AND NOT AS AND NOT LDS AND UDS AND lancp);
+</td></tr><tr><td>
+</td></tr><tr><td>
+DQ_and0001/DQ_and0001_D2 <= (NOT RW AND NOT AS AND LDS AND NOT UDS AND lancp);
+</td></tr><tr><td>
+FDCPE_DS_D: FDCPE port map (DS_D,$OpTx$FX_DC$126,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0',RESET);
+</td></tr><tr><td>
+</td></tr><tr><td>
+DTACK_I <= '0';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DTACK <= DTACK_I when DTACK_OE = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;DTACK_OE <= (NOT AS AND ide AND IDE_WAIT);
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_9_IOBUFE/D_9_IOBUFE_TRST <= ((NOT D_and0000/D_and0000_D2 AND NOT $OpTx$FX_DC$129)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT autoconfig AND NOT ide AND NOT D_and0000/D_and0000_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$141));
+</td></tr><tr><td>
+</td></tr><tr><td>
+D_and0000/D_and0000_D2 <= (lan_adr AND NOT lan_adr_sw AND $OpTx$FX_DC$129);
+</td></tr><tr><td>
+FDCPE_Dout10: FDCPE port map (Dout1(0),Dout1_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Dout1_D(0) <= ((NOT A(5) AND A(4) AND NOT A(2) AND NOT AS AND A(3) AND NOT A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND A(4) AND A(1) AND NOT AS AND A(3) AND NOT A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT AS AND NOT A(3) AND A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND NOT A(4) AND NOT A(1) AND NOT AS AND NOT AUTO_CONFIG_DONE(1) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A(3) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND A(2) AND NOT A(1) AND NOT AS AND NOT AUTO_CONFIG_DONE(1) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A(3) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT Dout1(0) AND NOT $OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A(5) AND NOT A(4) AND A(2) AND NOT A(3) AND NOT A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(4) AND A(2) AND NOT AUTO_CONFIG_DONE(1) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT AUTO_CONFIG_DONE(0) AND NOT A(3) AND NOT A(6) AND $OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A(5) AND NOT A(4) AND A(2) AND A(1) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND NOT A(6) AND $OpTx$FX_DC$160));
+</td></tr><tr><td>
+FDCPE_Dout11: FDCPE port map (Dout1(1),Dout1_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Dout1_D(1) <= ((NOT A(5) AND NOT A(4) AND NOT AS AND NOT AUTO_CONFIG_DONE(1) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT AUTO_CONFIG_DONE(0) AND NOT A(3) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND A(4) AND NOT A(1) AND NOT AS AND A(3) AND NOT A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND A(4) AND A(2) AND NOT A(1) AND NOT AS AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	AUTO_CONFIG_DONE(1) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND NOT A(4) AND A(1) AND NOT AS AND AUTO_CONFIG_DONE(1) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A(3) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND NOT A(4) AND NOT A(1) AND NOT AS AND NOT AUTO_CONFIG_DONE(1) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A(3) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND NOT A(2) AND A(1) AND NOT AS AND NOT AUTO_CONFIG_DONE(1) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A(3) AND NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT Dout1(1) AND NOT $OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A(5) AND NOT A(4) AND A(2) AND NOT A(1) AND NOT A(3) AND NOT A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT AS AND NOT A(3) AND autoconfig AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND A(4) AND A(2) AND NOT AS AND A(3) AND NOT A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	autoconfig AND NOT $OpTx$FX_DC$126));
+</td></tr><tr><td>
+FDCPE_Dout12: FDCPE port map (Dout1(2),Dout1_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Dout1_D(2) <= ((A(2) AND A(6) AND $OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A(1) AND A(3) AND $OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A(4) AND NOT A(1) AND NOT A(3) AND $OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(2) AND NOT A(1) AND NOT A(6) AND $OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(1) AND AUTO_CONFIG_DONE(1) AND NOT A(3) AND NOT A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND NOT A(4) AND A(2) AND A(1) AND NOT AS AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND autoconfig AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (Dout1(2) AND NOT $OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A(5) AND $OpTx$FX_DC$160 AND NOT $OpTx$FX_DC$195)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A(4) AND NOT A(2) AND $OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(4) AND A(3) AND $OpTx$FX_DC$160));
+</td></tr><tr><td>
+FDCPE_Dout13: FDCPE port map (Dout1(3),Dout1_D(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;Dout1_D(3) <= ((NOT A(5) AND A(4) AND A(2) AND A(1) AND NOT AS AND NOT A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND A(4) AND A(1) AND NOT AS AND NOT A(3) AND NOT A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND A(1) AND NOT AS AND NOT AUTO_CONFIG_DONE(1) AND NOT A(3) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A(6) AND autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND A(4) AND NOT A(2) AND NOT A(1) AND NOT AS AND A(3) AND NOT A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT Dout1(3) AND NOT $OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (A(5) AND NOT A(4) AND A(2) AND NOT A(1) AND NOT A(3) AND NOT A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$160)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND NOT A(4) AND NOT A(2) AND A(1) AND NOT AS AND NOT A(3) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	autoconfig AND NOT $OpTx$FX_DC$126)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(5) AND NOT A(4) AND NOT A(2) AND NOT AS AND NOT A(3) AND A(6) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	autoconfig AND NOT $OpTx$FX_DC$126));
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+</td></tr><tr><td>
+IDE_A(0) <= A(9);
+</td></tr><tr><td>
+</td></tr><tr><td>
+IDE_A(1) <= A(10);
+</td></tr><tr><td>
+</td></tr><tr><td>
+IDE_A(2) <= A(11);
+</td></tr><tr><td>
+FDCPE_IDE_BASEADR0: FDCPE port map (IDE_BASEADR(0),IDE_BASEADR_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(0) <= ((D(8).PIN AND $OpTx$FX_DC$158)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(0) AND NOT $OpTx$FX_DC$158));
+</td></tr><tr><td>
+FDCPE_IDE_BASEADR1: FDCPE port map (IDE_BASEADR(1),IDE_BASEADR_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(1) <= ((D(9).PIN AND $OpTx$FX_DC$158)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(1) AND NOT $OpTx$FX_DC$158));
+</td></tr><tr><td>
+FDCPE_IDE_BASEADR2: FDCPE port map (IDE_BASEADR(2),IDE_BASEADR_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(2) <= ((D(10).PIN AND $OpTx$FX_DC$158)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(2) AND NOT $OpTx$FX_DC$158));
+</td></tr><tr><td>
+FDCPE_IDE_BASEADR3: FDCPE port map (IDE_BASEADR(3),IDE_BASEADR_D(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(3) <= ((D(11).PIN AND $OpTx$FX_DC$158)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(3) AND NOT $OpTx$FX_DC$158));
+</td></tr><tr><td>
+FDCPE_IDE_BASEADR4: FDCPE port map (IDE_BASEADR(4),IDE_BASEADR_D(4),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(4) <= ((D(12).PIN AND $OpTx$FX_DC$158)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(4) AND NOT $OpTx$FX_DC$158));
+</td></tr><tr><td>
+FDCPE_IDE_BASEADR5: FDCPE port map (IDE_BASEADR(5),IDE_BASEADR_D(5),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(5) <= ((D(13).PIN AND $OpTx$FX_DC$158)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(5) AND NOT $OpTx$FX_DC$158));
+</td></tr><tr><td>
+FDCPE_IDE_BASEADR6: FDCPE port map (IDE_BASEADR(6),IDE_BASEADR_D(6),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(6) <= ((D(14).PIN AND $OpTx$FX_DC$158)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(6) AND NOT $OpTx$FX_DC$158));
+</td></tr><tr><td>
+FDCPE_IDE_BASEADR7: FDCPE port map (IDE_BASEADR(7),IDE_BASEADR_D(7),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_BASEADR_D(7) <= ((D(15).PIN AND $OpTx$FX_DC$158)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (IDE_BASEADR(7) AND NOT $OpTx$FX_DC$158));
+</td></tr><tr><td>
+</td></tr><tr><td>
+IDE_CS(0) <= NOT A(12);
+</td></tr><tr><td>
+</td></tr><tr><td>
+IDE_CS(1) <= NOT A(13);
+</td></tr><tr><td>
+FDCPE_IDE_ENABLE: FDCPE port map (IDE_ENABLE,'0',SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET,IDE_ENABLE_CE);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_ENABLE_CE <= (NOT RW AND NOT AS AND ide);
+</td></tr><tr><td>
+</td></tr><tr><td>
+IDE_R <= NOT ((NOT AS AND NOT IDE_R_S));
+</td></tr><tr><td>
+FDCPE_IDE_R_S: FDCPE port map (IDE_R_S,IDE_R_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_R_S_D <= (ide AND NOT IDE_ENABLE AND $OpTx$FX_DC$129);
+</td></tr><tr><td>
+</td></tr><tr><td>
+IDE_W <= NOT ((NOT AS AND NOT IDE_W_S));
+</td></tr><tr><td>
+FDCPE_IDE_W_S: FDCPE port map (IDE_W_S,IDE_W_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;IDE_W_S_D <= (NOT RW AND NOT AS AND ide);
+</td></tr><tr><td>
+</td></tr><tr><td>
+INT2_OUT_I <= '0';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;INT2_OUT <= INT2_OUT_I when INT2_OUT_OE = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;INT2_OUT_OE <= (LAN_INT_ENABLE AND NOT LAN_IRQ_OUT);
+</td></tr><tr><td>
+</td></tr><tr><td>
+INT6_OUT_I <= '0';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;INT6_OUT <= INT6_OUT_I when INT6_OUT_OE = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;INT6_OUT_OE <= NOT CP_IRQ;
+</td></tr><tr><td>
+FDCPE_LAN_BASEADR0: FDCPE port map (LAN_BASEADR(0),LAN_BASEADR_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(0) <= ((D(8).PIN AND $OpTx$FX_DC$156)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(0) AND NOT $OpTx$FX_DC$156));
+</td></tr><tr><td>
+FDCPE_LAN_BASEADR1: FDCPE port map (LAN_BASEADR(1),LAN_BASEADR_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(1) <= ((D(9).PIN AND $OpTx$FX_DC$156)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(1) AND NOT $OpTx$FX_DC$156));
+</td></tr><tr><td>
+FDCPE_LAN_BASEADR2: FDCPE port map (LAN_BASEADR(2),LAN_BASEADR_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(2) <= ((D(10).PIN AND $OpTx$FX_DC$156)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(2) AND NOT $OpTx$FX_DC$156));
+</td></tr><tr><td>
+FDCPE_LAN_BASEADR3: FDCPE port map (LAN_BASEADR(3),LAN_BASEADR_D(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(3) <= ((D(11).PIN AND $OpTx$FX_DC$156)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(3) AND NOT $OpTx$FX_DC$156));
+</td></tr><tr><td>
+FDCPE_LAN_BASEADR4: FDCPE port map (LAN_BASEADR(4),LAN_BASEADR_D(4),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(4) <= ((D(12).PIN AND $OpTx$FX_DC$156)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(4) AND NOT $OpTx$FX_DC$156));
+</td></tr><tr><td>
+FDCPE_LAN_BASEADR5: FDCPE port map (LAN_BASEADR(5),LAN_BASEADR_D(5),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(5) <= ((D(13).PIN AND $OpTx$FX_DC$156)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(5) AND NOT $OpTx$FX_DC$156));
+</td></tr><tr><td>
+FDCPE_LAN_BASEADR6: FDCPE port map (LAN_BASEADR(6),LAN_BASEADR_D(6),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(6) <= ((D(14).PIN AND $OpTx$FX_DC$156)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(6) AND NOT $OpTx$FX_DC$156));
+</td></tr><tr><td>
+FDCPE_LAN_BASEADR7: FDCPE port map (LAN_BASEADR(7),LAN_BASEADR_D(7),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_BASEADR_D(7) <= ((D(15).PIN AND $OpTx$FX_DC$156)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(7) AND NOT $OpTx$FX_DC$156));
+</td></tr><tr><td>
+</td></tr><tr><td>
+LAN_CFG(1) <= '0';
+</td></tr><tr><td>
+</td></tr><tr><td>
+LAN_CFG(2) <= '1';
+</td></tr><tr><td>
+</td></tr><tr><td>
+LAN_CFG(3) <= '0';
+</td></tr><tr><td>
+</td></tr><tr><td>
+LAN_CFG(4) <= '0';
+</td></tr><tr><td>
+</td></tr><tr><td>
+LAN_CS <= ((RESET AND lan_adr)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT RESET AND LAN_CS_RST));
+</td></tr><tr><td>
+FDCPE_LAN_CS_RST: FDCPE port map (LAN_CS_RST,LAN_CS_RST_D,CLK_EXT,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_CS_RST_D <= ((NOT RESET AND LAN_RST_SM_FSM_FFd3)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT RESET AND LAN_RST_SM_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT LAN_RST_SM_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT RESET AND NOT LAN_RST_SM_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	LAN_RST_SM_FSM_FFd1));
+</td></tr><tr><td>
+FDCPE_LAN_INT_ENABLE: FDCPE port map (LAN_INT_ENABLE,LAN_INT_ENABLE_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT RESET,'0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_INT_ENABLE_D <= ((D(15).PIN AND $OpTx$FX_DC$172)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_INT_ENABLE AND NOT $OpTx$FX_DC$172));
+</td></tr><tr><td>
+FDCPE_LAN_IRQ_D0: FDCPE port map (LAN_IRQ_D0,LAN_INT,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+</td></tr><tr><td>
+FDCPE_LAN_IRQ_OUT: FDCPE port map (LAN_IRQ_OUT,LAN_IRQ_OUT_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_IRQ_OUT_D <= ((NOT LAN_INT AND LAN_IRQ_D0)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_INT_ENABLE AND NOT D(14).PIN AND NOT LAN_INT AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	$OpTx$FX_DC$172)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_INT_ENABLE AND NOT LAN_IRQ_OUT AND NOT LAN_INT AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT $OpTx$FX_DC$172));
+</td></tr><tr><td>
+</td></tr><tr><td>
+LAN_RD <= (LAN_RD_S AND $OpTx$FX_DC$174);
+</td></tr><tr><td>
+FDCPE_LAN_RD_S: FDCPE port map (LAN_RD_S,LAN_RD_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_RD_S_D <= (RW AND lan_adr AND NOT A(15) AND NOT $OpTx$FX_DC$126);
+</td></tr><tr><td>
+FDCPE_LAN_RST_SM_FSM_FFd1: FDCPE port map (LAN_RST_SM_FSM_FFd1,LAN_RST_SM_FSM_FFd1_D,CLK_EXT,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_RST_SM_FSM_FFd1_D <= ((NOT RESET AND NOT LAN_RST_SM_FSM_FFd3)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT RESET AND NOT LAN_RST_SM_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	LAN_RST_SM_FSM_FFd1));
+</td></tr><tr><td>
+FDCPE_LAN_RST_SM_FSM_FFd2: FDCPE port map (LAN_RST_SM_FSM_FFd2,LAN_RST_SM_FSM_FFd2_D,CLK_EXT,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_RST_SM_FSM_FFd2_D <= ((RESET)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_RST_SM_FSM_FFd2 AND LAN_RST_SM_FSM_FFd3 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	LAN_RST_SM_FSM_FFd1));
+</td></tr><tr><td>
+FDCPE_LAN_RST_SM_FSM_FFd3: FDCPE port map (LAN_RST_SM_FSM_FFd3,LAN_RST_SM_FSM_FFd3_D,CLK_EXT,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_RST_SM_FSM_FFd3_D <= ((NOT RESET AND NOT $OpTx$FX_DC$137)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT RESET AND NOT LAN_RST_SM_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	LAN_RST_SM_FSM_FFd3));
+</td></tr><tr><td>
+</td></tr><tr><td>
+LAN_WRH <= ((LAN_WR_RST AND NOT $OpTx$FX_DC$174)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_WRH_S AND $OpTx$FX_DC$174));
+</td></tr><tr><td>
+FDCPE_LAN_WRH_S: FDCPE port map (LAN_WRH_S,LAN_WRH_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_WRH_S_D <= (NOT RW AND NOT LDS AND lan_adr AND NOT A(15));
+</td></tr><tr><td>
+</td></tr><tr><td>
+LAN_WRL <= ((LAN_WR_RST AND NOT $OpTx$FX_DC$174)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_WRL_S AND $OpTx$FX_DC$174));
+</td></tr><tr><td>
+FDCPE_LAN_WRL_S: FDCPE port map (LAN_WRL_S,LAN_WRL_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_WRL_S_D <= (NOT RW AND NOT UDS AND lan_adr AND NOT A(15));
+</td></tr><tr><td>
+FDCPE_LAN_WR_RST: FDCPE port map (LAN_WR_RST,LAN_WR_RST_D,CLK_EXT,'0','0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;LAN_WR_RST_D <= ((NOT RESET AND LAN_RST_SM_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT RESET AND NOT LAN_RST_SM_FSM_FFd2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	LAN_RST_SM_FSM_FFd3 AND LAN_RST_SM_FSM_FFd1));
+</td></tr><tr><td>
+</td></tr><tr><td>
+MTACK_I <= '0';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;MTACK <= MTACK_I when MTACK_OE = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;MTACK_OE <= '0';
+</td></tr><tr><td>
+</td></tr><tr><td>
+OVR_I <= '0';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;OVR <= OVR_I when OVR_OE = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;OVR_OE <= (NOT AS AND ide);
+</td></tr><tr><td>
+</td></tr><tr><td>
+OWN_I <= '0';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;OWN <= OWN_I when OWN_OE = '1' else 'Z';
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;OWN_OE <= '0';
+</td></tr><tr><td>
+</td></tr><tr><td>
+ROM_B(0) <= '0';
+</td></tr><tr><td>
+</td></tr><tr><td>
+ROM_B(1) <= '0';
+</td></tr><tr><td>
+</td></tr><tr><td>
+ROM_OE <= NOT ((NOT AS AND NOT ROM_OE_S AND NOT AUTOBOOT_OFF));
+</td></tr><tr><td>
+FDCPE_ROM_OE_S: FDCPE port map (ROM_OE_S,ROM_OE_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ROM_OE_S_D <= (ide AND IDE_ENABLE AND $OpTx$FX_DC$129);
+</td></tr><tr><td>
+FDCPE_SHUT_UP0: FDCPE port map (SHUT_UP(0),SHUT_UP_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;SHUT_UP_D(0) <= (SHUT_UP(0) AND NOT $OpTx$FX_DC$156);
+</td></tr><tr><td>
+FDCPE_SHUT_UP1: FDCPE port map (SHUT_UP(1),SHUT_UP_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;SHUT_UP_D(1) <= (SHUT_UP(1) AND NOT $OpTx$FX_DC$157);
+</td></tr><tr><td>
+</td></tr><tr><td>
+SHUT_UP(2)/SHUT_UP(2)_CLKF <= C1
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	 XOR 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;SHUT_UP(2)/SHUT_UP(2)_CLKF <= C3;
+</td></tr><tr><td>
+FDCPE_SHUT_UP2: FDCPE port map (SHUT_UP(2),SHUT_UP_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT RESET);
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;SHUT_UP_D(2) <= (SHUT_UP(2) AND NOT $OpTx$FX_DC$158);
+</td></tr><tr><td>
+</td></tr><tr><td>
+SLAVE <= ((AS)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT lan_adr AND NOT autoconfig AND NOT ide AND CP_CS));
+</td></tr><tr><td>
+FDCPE_autoconfig: FDCPE port map (autoconfig,autoconfig_D,NOT AS,NOT lancp/lancp_RSTF,'0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;autoconfig_D <= (A(23) AND A(22) AND A(21) AND A(19) AND NOT A(17) AND NOT A(16) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A(18) AND NOT A(20) AND NOT CFIN AND CFOUT);
+</td></tr><tr><td>
+</td></tr><tr><td>
+cp_and0000/cp_and0000_D2 <= (A(23) AND A(22) AND A(21) AND A(19) AND NOT A(17) AND NOT A(16) AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT A(18) AND NOT A(20) AND NOT CFIN AND CFOUT);
+</td></tr><tr><td>
+</td></tr><tr><td>
+cp_and0001/cp_and0001_D2 <= ((SHUT_UP(0))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(4) AND NOT A(20))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(5) AND NOT A(21))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT LAN_BASEADR(5) AND A(21))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(7) AND NOT A(23))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT LAN_BASEADR(7) AND A(23))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (SHUT_UP(2)/SHUT_UP(2)_CLKF.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(2) AND NOT A(18))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT LAN_BASEADR(2) AND A(18))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(3) AND NOT A(19))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT LAN_BASEADR(3) AND A(19))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT LAN_BASEADR(4) AND A(20))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(0) AND NOT A(16))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT LAN_BASEADR(0) AND A(16))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (LAN_BASEADR(1) AND NOT A(17))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT LAN_BASEADR(1) AND A(17)));
+</td></tr><tr><td>
+</td></tr><tr><td>
+cp_and0002/cp_and0002_D2 <= ((SHUT_UP(1))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (EXP30_.EXP)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(2) AND NOT A(18))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT CP_BASEADR(2) AND A(18))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(3) AND NOT A(19))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT CP_BASEADR(3) AND A(19))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT CP_BASEADR(4) AND A(20))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(4) AND NOT A(20))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(5) AND NOT A(21))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT CP_BASEADR(5) AND A(21))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(7) AND NOT A(23))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT CP_BASEADR(7) AND A(23))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(0) AND NOT A(16))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT CP_BASEADR(0) AND A(16))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (CP_BASEADR(1) AND NOT A(17))
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT CP_BASEADR(1) AND A(17)));
+</td></tr><tr><td>
+FDCPE_ide: FDCPE port map (ide,ide_D,NOT AS,NOT lancp/lancp_RSTF,'0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;ide_D <= (cp_and0001/cp_and0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cp_and0000/cp_and0000_D2 AND cp_and0002/cp_and0002_D2 AND NOT $OpTx$FX_DC$206);
+</td></tr><tr><td>
+FDCPE_lan_adr: FDCPE port map (lan_adr,lan_adr_D,NOT AS,NOT lancp/lancp_RSTF,'0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;lan_adr_D <= (NOT cp_and0001/cp_and0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cp_and0000/cp_and0000_D2);
+</td></tr><tr><td>
+FDCPE_lan_adr_sw: FDCPE port map (lan_adr_sw,lan_adr_sw_D,NOT AS,NOT lancp/lancp_RSTF,'0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;lan_adr_sw_D <= ((NOT A(13) AND NOT cp_and0001/cp_and0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cp_and0000/cp_and0000_D2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (NOT A(14) AND NOT cp_and0001/cp_and0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	NOT cp_and0000/cp_and0000_D2));
+</td></tr><tr><td>
+FDCPE_lancp: FDCPE port map (lancp,lancp_D,NOT AS,NOT lancp/lancp_RSTF,'0');
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;lancp_D <= ((cp_and0000/cp_and0000_D2)
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	OR (cp_and0001/cp_and0001_D2 AND 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp;	cp_and0002/cp_and0002_D2 AND $OpTx$FX_DC$206));
+</td></tr><tr><td>
+</td></tr><tr><td>
+lancp/lancp_RSTF <= (RESET AND BERR);
+</td></tr><tr><td>
+Register Legend:
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; FDCPE (Q,D,C,CLR,PRE,CE); 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; FTCPE (Q,D,C,CLR,PRE,CE); 
+<br/>&nbsp;&nbsp;&nbsp;&nbsp;&nbsp; LDCP  (Q,D,G,CLR,PRE); 
+</td></tr><tr><td>
+</td></tr>
+</table>
+<form><span class="pgRef"><table width="90%" align="center"><tr>
+<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
+<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
+</tr></table></span></form>
+</body></html>
@@ -0,0 +1,13 @@
+<html>
+<head>
+  <script>
+    function init() {
+      document.open();
+      document.write(parent.leftnav.document.options.htmlStr.value);
+      document.close();
+    }
+  </script>
+</head>
+<body onload="javascript:init()">
+</body>
+</html>
@@ -0,0 +1,53 @@
+<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
+
+<html>
+
+<!--(==============================================================)-->
+<!--(Document created with RoboEditor. )============================-->
+<!--(==============================================================)-->
+
+<head>
+
+<title>Equations</title>
+
+<!--(Meta)==========================================================-->
+
+<meta name=generator content="RoboHELP by eHelp Corporation - www.ehelp.com">
+<meta name=generator-major-version content=0.1>
+<meta name=generator-minor-version content=1>
+<meta name=filetype content=kadov>
+<meta name=filetype-version content=1>
+<meta name=page-count content=1>
+<meta name=layout-height content=582>
+<meta name=layout-width content=798>
+<meta name=date content="05 1, 2002 4:30:09 PM">
+
+
+
+</head>
+
+<!--(Body)==========================================================-->
+
+
+<body>
+
+<h1>Equations</h1>
+
+<p><span style="font-size: 10pt; font-family: arial, sans-serif;">The Equations 
+ page provides a list of equations organized by signal name. <!--kadov_tag{{<spaces>}}-->&nbsp;<!--kadov_tag{{</spaces>}}-->You 
+ can use the pulldown menu in the left-hand frame of the page to select 
+ ABEL, VHDL, or Verilog as your language of display.</span> </p>
+
+<p><img src="xml8.jpg"
+		x-maintain-ratio=TRUE
+		style="border: none;
+				width: 181px;
+				height: 448px;
+				float: none;"
+		width=181
+		height=448
+		border=0></p>
+
+</body>
+
+</html>
@@ -0,0 +1,91 @@
+<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
+
+<html>
+
+<!--(==============================================================)-->
+<!--(Document created with RoboEditor. )============================-->
+<!--(==============================================================)-->
+
+<head>
+
+<title>Errors</title>
+
+<!--(Meta)==========================================================-->
+
+<meta name=generator content="RoboHELP by eHelp Corporation - www.ehelp.com">
+<meta name=generator-major-version content=0.1>
+<meta name=generator-minor-version content=1>
+<meta name=filetype content=kadov>
+<meta name=filetype-version content=1>
+<meta name=page-count content=1>
+<meta name=layout-height content=715>
+<meta name=layout-width content=798>
+<meta name=date content="05 1, 2002 4:22:26 PM">
+
+
+
+<style>
+<!--
+p.whs1 {font-family: arial, sans-serif; font-size: 10pt;}
+p.whs2 {font-family: arial, sans-serif; font-size: 10pt;}
+p.whs3 {font-family: arial, sans-serif; font-size: 10pt;}
+
+--></style><script language="javascript" title="WebHelpInlineScript">
+<!--
+function reDo() {
+  if (innerWidth != origWidth || innerHeight != origHeight)
+     location.reload();
+}
+if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == "Netscape")) {
+	origWidth = innerWidth;
+	origHeight = innerHeight;
+	onresize = reDo;
+}
+//-->
+</script><style>
+<!--
+  div.WebHelpPopupMenu {position:absolute; left:0px; top:0px; z-index:4; visibility:hidden;}
+  p.WebHelpNavBar {text-align:right;}
+-->
+</style>
+</head>
+
+<!--(Body)==========================================================-->
+
+
+<body>
+
+
+<h1>Errors/Warnings</h1>
+
+<p class="whs1">The Errors/Warnings 
+ section of the report lists all of the error, warning, and information 
+ messages generated by the fitter. By default, this section will display 
+ the number of each kind of message you have and the full text of the messages, 
+ but checkboxes at the top of the screen allow you to filter message details 
+ as you choose. </p>
+
+<p class="whs2">Checking all 
+ the boxes will give you a display like this:</p>
+
+<p><SCRIPT LANGUAGE="JavaScript"><!--
+if (navigator.appName=="Netscape")
+{ document.write("<img src='xml6.jpg' x-maintain-ratio='TRUE' width='540' height='254' border='0'>");}
+else
+{ document.write("<img src='xml6.jpg' x-maintain-ratio='TRUE' style='border: none; width: 540px; height: 254px; float: none;' width='540' height='254' border='0'>");}
+//--></SCRIPT></p>
+
+<p class="whs3">Deselecting 
+ the Warning box in this particular example would result in this less detailed 
+ display:</p>
+
+<p><SCRIPT LANGUAGE="JavaScript"><!--
+if (navigator.appName=="Netscape")
+{ document.write("<img src='xml7.jpg' x-maintain-ratio='TRUE' width='576' height='226' border='0'>");}
+else
+{ document.write("<img src='xml7.jpg' x-maintain-ratio='TRUE' style='border: none; width: 576px; height: 226px; float: none;' width='576' height='226' border='0'>");}
+//--></SCRIPT></p>
+
+</body>
+
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,95 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <meta name="generator" content="RoboHELP by eHelp Corporation - www.ehelp.com">
+   <meta name="generator-major-version" content="0.1">
+   <meta name="generator-minor-version" content="1">
+   <meta name="filetype" content="kadov">
+   <meta name="filetype-version" content="1">
+   <meta name="page-count" content="1">
+   <meta name="layout-height" content="1506">
+   <meta name="layout-width" content="639">
+   <meta name="date" content="05 24, 2002 5:49:09 PM">
+   <meta name="GENERATOR" content="Mozilla/4.79 [en]C-CCK-MCD   (Windows NT 5.0; U) [Netscape]">
+   <meta name="Author" content="gitu jain">
+   <title>Failure Table</title>
+<!--(==============================================================)-->
+<!--(Document created with RoboEditor. )============================-->
+<!--(==============================================================)-->
+<!--(Meta)==========================================================-->
+<style>
+<!--
+ul.whs1 {list-style: disc;}
+p.whs2 {margin-left: 80px;}
+ul.whs3 {list-style: disc;}
+p.whs4 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
+ul.whs5 {list-style: disc;}
+p.whs6 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
+p.whs7 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
+ul.whs8 {list-style: disc;}
+p.whs9 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
+p.whs10 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
+ul.whs11 {list-style: disc;}
+
+--></style>
+<script language="javascript" title="WebHelpInlineScript">
+<!--
+function reDo() {
+  if (innerWidth != origWidth || innerHeight != origHeight)
+     location.reload();
+}
+if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == "Netscape")) {
+	origWidth = innerWidth;
+	origHeight = innerHeight;
+	onresize = reDo;
+}
+//-->
+</script>
+<style>
+<!--
+  div.WebHelpPopupMenu {position:absolute; left:0px; top:0px; z-index:4; visibility:hidden;}
+  p.WebHelpNavBar {text-align:right;}
+-->
+</style>
+<!--(Body)==========================================================-->
+</head>
+<body>
+
+<h1>
+Failure Table</h1>
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+Failure Table section provides a table listing all logic failing to be
+placed as well as the cause for failure to fit for each individual Function
+Block. </font>The user can use this table to determine primary cause of
+failure and try to correct it.</span><!--begin!kadov{{-->
+<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><!--begin!kadov{{-->
+<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><span 
+ style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+Failure Table contains the following:&nbsp;</font></span>
+<ul type="disc" class="whs1">
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+signal name&nbsp;</font></span></li>
+</ul>
+
+<div class="whs2"><span style="font-weight: bold;
+											font-family: arial, sans-serif;
+											font-size: 10pt;"><font size=-1><b>Note:</span><span 
+ style="font-family: arial, sans-serif; font-size: 10pt;"></b>
+Clicking on the signal name will open a new window with the equations for
+that signal.&nbsp;</font></span></div>
+
+<ul type="disc" class="whs3">
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>A
+column for each Function Block in device, with reason for failure to fit
+for each FB</font></span></li>
+
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>A
+legend at the bottom listing all possible reasons for failure</font></span></li>
+</ul>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,310 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <meta name="generator" content="RoboHELP by eHelp Corporation - www.ehelp.com">
+   <meta name="generator-major-version" content="0.1">
+   <meta name="generator-minor-version" content="1">
+   <meta name="filetype" content="kadov">
+   <meta name="filetype-version" content="1">
+   <meta name="page-count" content="1">
+   <meta name="layout-height" content="3556">
+   <meta name="layout-width" content="670">
+   <meta name="date" content="05 24, 2002 6:03:49 PM">
+   <meta name="GENERATOR" content="Mozilla/4.79 [en]C-CCK-MCD   (Windows NT 5.0; U) [Netscape]">
+   <title>Function Block Specifics</title>
+<!--(==============================================================)-->
+<!--(Document created with RoboEditor. )============================-->
+<!--(==============================================================)-->
+<!--(Meta)==========================================================-->
+<style>
+<!--
+p.whs1 {font-family: arial, sans-serif; font-size: 10pt;}
+p.whs2 {font-family: arial, sans-serif; font-size: 12pt;}
+p.whs3 {font-family: arial, sans-serif; font-size: 12pt;}
+h4.whs4 {font-family: arial, sans-serif;}
+ul.whs5 {list-style: disc;}
+p.whs6 {margin-left: 80px;}
+ul.whs7 {list-style: disc;}
+p.whs8 {margin-left: 80px;}
+ul.whs9 {list-style: disc;}
+p.whs10 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
+p.whs11 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
+ul.whs12 {list-style: disc;}
+ul.whs13 {list-style: disc;}
+p.whs14 {margin-left: 80px;}
+p.whs15 {font-weight: bold; font-family: arial, sans-serif; font-size: 10pt; margin-left: 120px;}
+ul.whs16 {list-style: disc;}
+p.whs17 {margin-left: 80px;}
+p.whs18 {margin-left: 80px;}
+h4.whs19 {font-family: arial, sans-serif;}
+p.whs20 {font-family: arial, sans-serif; font-size: 10pt;}
+p.whs21 {font-family: arial, sans-serif; font-size: 10pt;}
+p.whs22 {font-family: arial, sans-serif; font-size: 10pt;}
+p.whs23 {font-family: arial, sans-serif; font-size: 10pt;}
+p.whs24 {font-family: arial, sans-serif; font-size: 10pt;}
+p.whs25 {font-family: arial, sans-serif; font-size: 10pt;}
+p.whs26 {font-family: arial, sans-serif; font-size: 10pt;}
+ul.whs27 {list-style: disc;}
+p.whs28 {font-family: arial, sans-serif; font-size: 10pt;}
+p.whs29 {font-family: arial, sans-serif; font-size: 10pt;}
+p.whs30 {font-family: arial, sans-serif; font-size: 10pt;}
+p.whs31 {font-family: arial, sans-serif; font-size: 10pt;}
+p.whs32 {font-family: arial, sans-serif; font-size: 10pt;}
+
+--></style>
+<script language="javascript" title="WebHelpInlineScript">
+<!--
+function reDo() {
+  if (innerWidth != origWidth || innerHeight != origHeight)
+     location.reload();
+}
+if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == "Netscape")) {
+	origWidth = innerWidth;
+	origHeight = innerHeight;
+	onresize = reDo;
+}
+//-->
+</script>
+<style>
+<!--
+  div.WebHelpPopupMenu {position:absolute; left:0px; top:0px; z-index:4; visibility:hidden;}
+  p.WebHelpNavBar {text-align:right;}
+-->
+</style>
+<!--(Body)==========================================================-->
+</head>
+<body>
+
+<h1>
+Function Block Specifics</h1>
+
+<div class="whs1">To access specific details for a particular function
+block, click on that function block in either the <a href="maplogicdoc.htm">Mapped
+Logic</a>, <a href="mapinputdoc.htm">Mapped Inputs</a>, or <a href="fbsdoc.htm" style="font-family: arial, sans-serif; font-size: 10pt;">Function
+Blocks</a> sections of the fitter report.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->The
+function block details page displays a table of details about the particular
+function block you selected, a view button you can click to show a graphical
+display of the function block, and a pulldown menu you can use to select
+other function blocks to see.</div>
+
+
+<p class="whs2">The Table
+
+<p class="whs3">The View
+<p><script LANGUAGE="JavaScript"><!--
+if (navigator.appName=="Netscape")
+{ document.write("<img src='xml5.jpg' x-maintain-ratio='TRUE' width='648' height='397' border='0'>");}
+else
+{ document.write("<img src='xml5.jpg' x-maintain-ratio='TRUE' style='border: none; width: 648px; height: 397px; float: none;' width='648' height='397' border='0'>");}
+//--></script>
+
+<h4 class="whs4">
+<a NAME="table"></a>The Table</h4>
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+table at the top of the function block details page provides the following
+information about the function block:</font></span>
+<ul type="disc" class="whs5">
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+signal name&nbsp;</font></span></li>
+</ul>
+
+<div class="whs6"><span style="font-weight: bold;
+											font-family: arial, sans-serif;
+											font-size: 10pt;"><font size=-1><b>Note:</span><span 
+ style="font-family: arial, sans-serif; font-size: 10pt;"></b>
+Clicking on a signal name will open a new window with the equations for
+that signal.&nbsp;</font></span></div>
+
+<ul type="disc" class="whs7">
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+total product terms used&nbsp;</font></span></li>
+
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><!--kadov_tag{{<spaces>}}--><font size=-1>&nbsp;<!--kadov_tag{{</spaces>}}-->A
+list of product terms</font></span></li>
+</ul>
+
+<div class="whs8"><span style="font-weight: bold;
+											font-family: arial, sans-serif;
+											font-size: 10pt;"><font size=-1><b>Note:</span><span 
+ style="font-family: arial, sans-serif; font-size: 10pt;"></b>
+Clicking on a&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->product
+term will open a new window with the equations for that term.&nbsp;</font></span></div>
+
+<ul type="disc" class="whs9">
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+macrocell number in which the function block is located</font></span></li>
+</ul>
+
+<div class="whs10"><span style="font-family: arial, sans-serif; font-size: 10pt;"><span 
+ style="font-weight: bold;"><font size=-1><b>Note:</span></b>
+Clicking on the underscored macrocell number will provide a graphical display
+of the macrocell that looks like this:</font></span></div>
+
+
+<p class="whs11"><script LANGUAGE="JavaScript"><!--
+if (navigator.appName=="Netscape")
+{ document.write("<img src='macrocell.gif' x-maintain-ratio='TRUE' width='540' height='420' border='0'>");}
+else
+{ document.write("<img src='macrocell.gif' x-maintain-ratio='TRUE' style='border: none; width: 540px; height: 420px; float: none;' width='540' height='420' border='0'>");}
+//--></script>
+.
+<ul type="disc" class="whs12">
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+power mode</font></span></li>
+
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+pin number - an asterisk "*" indicates a user assignment</font></span></li>
+</ul>
+
+<ul type="disc" class="whs13">
+<div class="whs14"><span style="font-family: arial, sans-serif; font-size: 10pt;"><span 
+ style="font-weight: bold;"><font size=-1><b>N</span></b>ote:</span><span style="font-family: arial, sans-serif; font-size: 10pt;">
+Clicking on the underscored pin number will provide the pin layout diagram
+for the highlighted pin.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Rolling
+your mouse over the colored pin will pop up a tooltip with the signal name
+assigned to the pin, the I/O standard,&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->the
+I/O style, the slew rate, and/or any constraints assigned to the pin:</font></span></div>
+</ul>
+
+<div class="whs15"><script LANGUAGE="JavaScript"><!--
+if (navigator.appName=="Netscape")
+{ document.write("<img src='pin.gif' x-maintain-ratio='TRUE' width='309' height='312' border='0'>");}
+else
+{ document.write("<img src='pin.gif' x-maintain-ratio='TRUE' style='border: none; width: 309px; height: 312px; float: none;' width='309' height='312' border='0'>");}
+//--></script>
+</div>
+
+<ul type="disc" class="whs16">
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+pin type</font></span></li>
+
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+pin use&nbsp;</font></span></li>
+
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1><i>XPLA3
+only</i> - The GCK (Global Clock Signal) mapping&nbsp;</font></span></li>
+</ul>
+
+<div class="whs17"><span style="font-weight: bold;
+											font-family: arial, sans-serif;
+											font-size: 10pt;"><font size=-1><b>Note:</span><span 
+ style="font-family: arial, sans-serif; font-size: 10pt;"></b>
+Moving your mouse cursor over an "I" in the Pin Use column will display
+that input signal as a tooltip.</font></span></div>
+
+<br><span style="font-family: arial, sans-serif; font-size: 10pt;">
+<br><span style="font-family: arial, sans-serif; font-size: 10pt;"><i>XBR
+only</i> - Below the resource table there is another table listing the
+<b>Function Block Control Term</b> usage, the product term mapped to the
+control term is listed. Clicking on the product term will bring up a pop-up
+window displaying that product term.
+<blockquote>
+<li>
+CTC - control term clock</li>
+
+<li>
+CTR - control term reset</li>
+
+<li>
+CTS - control term set</li>
+
+<li>
+CTE - control term output enable</li>
+</blockquote>
+
+<p><br><span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>Below
+this table you will find a list of signals used by logic in the function
+block you are viewing.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->The
+list displays output signals as links.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Clicking
+on an output signal link will open a new window showing the equations for
+that signal.</font></span><!--begin!kadov{{-->
+<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}-->
+
+<p class="whs18"><span style="font-family: arial, sans-serif;
+											font-size: 10pt;
+											font-weight: bold;"><font size=-1><b>Note:</span><span 
+ style="font-family: arial, sans-serif; font-size: 10pt;"><!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}--></b>There
+is also a&nbsp;<script LANGUAGE="JavaScript"><!--
+if (navigator.appName=="Netscape")
+{ document.write("<img src='legend.gif' x-maintain-ratio='TRUE' width='68' height='28' border='0'>");}
+else
+{ document.write("<img src='legend.gif' x-maintain-ratio='TRUE' style='border: none; width: 68px; height: 28px; float: none;' width='68' height='28' border='0'>");}
+//--></script>
+button
+below the table.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Click
+this button to open a new window describing all of the acronyms used in
+the function block table.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->You
+can select either brief descriptions or more detailed descriptions by clicking
+the "Verbose" button at the top of the window.</font></span>
+<h4 class="whs19">
+<a NAME="view"></a>The View</h4>
+
+<div class="whs20">When you click on the&nbsp;<script LANGUAGE="JavaScript"><!--
+if (navigator.appName=="Netscape")
+{ document.write("<img src='view.gif' x-maintain-ratio='TRUE' width='61' height='53' border='0'>");}
+else
+{ document.write("<img src='view.gif' x-maintain-ratio='TRUE' style='border: none; width: 61px; height: 53px; float: none;' width='61' height='53' border='0'>");}
+//--></script>
+button
+above the table, a new window will open with a graphical display of the
+function block you are examining.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->The
+pins are all color-coded: input pins are green, output pins are blue, and
+clocks are magenta:</div>
+
+
+<p class="whs21"><script LANGUAGE="JavaScript"><!--
+if (navigator.appName=="Netscape")
+{ document.write("<img src='fb1.gif' x-maintain-ratio='TRUE' width='482' height='378' border='0'>");}
+else
+{ document.write("<img src='fb1.gif' x-maintain-ratio='TRUE' style='border: none; width: 482px; height: 378px; float: none;' width='482' height='378' border='0'>");}
+//--></script>
+
+
+<p class="whs22">Right-click anywhere within the window to pull up a menu
+that allows you to zoom in or out for easier viewing.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->
+
+<p class="whs23">This menu also allows you choose to see all of the input
+connections, all of the output connections, or both at once.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->Like
+the pins, the signals are color-coded: inputs are red, outputs are yellow,
+and macrocell connections are aqua:
+
+<p class="whs24"><script LANGUAGE="JavaScript"><!--
+if (navigator.appName=="Netscape")
+{ document.write("<img src='fb.gif' x-maintain-ratio='TRUE' width='497' height='377' border='0'>");}
+else
+{ document.write("<img src='fb.gif' x-maintain-ratio='TRUE' style='border: none; width: 497px; height: 377px; float: none;' width='497' height='377' border='0'>");}
+//--></script>
+
+
+<p class="whs25">To examine the signals of single pins, simply click the
+pin whose signals you wish to see.&nbsp;<!--kadov_tag{{<spaces>}}--><!--kadov_tag{{</spaces>}}-->To
+examine multiple pins without having to see everything at once, hold down
+the control key while you click the pins you want to view.
+
+<p class="whs26">To view the signals for individual macrocells:
+<ul type="disc" class="whs27">
+<div class="whs28">Click the inside edge of the macrocell to display its
+macrocell connections and inputs.</div>
+
+
+<p class="whs29">Click the outer edge to display its output signals
+
+<p class="whs30">Click in the center to display everything
+
+<p class="whs31">Double click in the center to open a new window with a
+detailed macrocell diagram</ul>
+
+<div class="whs32"></div>
+
+</body>
+</html>
@@ -0,0 +1,103 @@
+<!doctype HTML public "-//W3C//DTD HTML 4.0 Frameset//EN">
+
+<html>
+
+<!--(==============================================================)-->
+<!--(Document created with RoboEditor. )============================-->
+<!--(==============================================================)-->
+
+<head>
+
+<title>Function Blocks</title>
+
+<!--(Meta)==========================================================-->
+
+<meta name=generator content="RoboHELP by eHelp Corporation - www.ehelp.com">
+<meta name=generator-major-version content=0.1>
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+<meta name=layout-height content=405>
+<meta name=layout-width content=615>
+<meta name=date content="05 24, 2002 5:49:51 PM">
+
+
+
+<style>
+<!--
+ul.whs1 {list-style: disc;}
+
+--></style><script language="javascript" title="WebHelpInlineScript">
+<!--
+function reDo() {
+  if (innerWidth != origWidth || innerHeight != origHeight)
+     location.reload();
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+//-->
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+<!--
+  div.WebHelpPopupMenu {position:absolute; left:0px; top:0px; z-index:4; visibility:hidden;}
+  p.WebHelpNavBar {text-align:right;}
+-->
+</style>
+</head>
+
+<!--(Body)==========================================================-->
+
+
+<body>
+
+
+<h1>Function Blocks</h1>
+
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The Function 
+ Blocks page provides a summary of all function blocks' resources. Clicking 
+ on one of the function blocks in the summary table will display the <a href="fbs_FBdoc.htm">specific details</a> for that function block. <!--kadov_tag{{<spaces>}}-->&nbsp;</FONT></span><!--kadov_tag{{</spaces>}}-->
+
+<!--begin!kadov{{--><br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}-->&nbsp; 
+ 
+
+<!--begin!kadov{{--><br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><span 
+ style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The summary table 
+ contains the following: <!--kadov_tag{{<spaces>}}-->&nbsp;</FONT></span><!--kadov_tag{{</spaces>}}-->
+
+<ul type="disc" class="whs1">
+	
+	<li class=kadov-p
+		class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The 
+ function block</FONT></span></li>
+	
+	<li class=kadov-p
+		class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The 
+ number of macrocell used </FONT></span></li>
+	
+	<li class=kadov-p
+		class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The 
+ number of function block inputs used </FONT></span></li>
+	
+	<li class=kadov-p
+		class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The 
+ number of product terms used</FONT></span></li>
+	
+	<li class=kadov-p
+		class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The 
+ pins used</FONT></span></li>
+	
+	<li class=kadov-p
+		class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The 
+ local control terms used</FONT></span></li>
+	
+	<li class=kadov-p
+		class=kadov-p><span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">The 
+ number of foldback NANDs used (CoolRunner only)</FONT></span></li>
+</ul>
+
+</body>
+
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,14 @@
+<html>
+  <head>
+    <title></title>
+  </head>
+  <frameset frameborder="NO" framespacing="0" border="0" rows="94,*,0,0" cols="*">
+    <frame name="topnav" src="../tim/topnav.htm" scrolling="no" noresize marginwidth="0" marginheight="0">
+    <frameset frameborder="NO" framespacing="0" border="0" cols="125,*">
+      <frame name="leftnav" src="leftnav.htm" noresize marginwidth="0" marginheight="0">
+      <frame name="content" src="summary.htm">
+    </frameset>
+    <frame name="eqns" src="eqns.htm" scrolling="no">
+  </frameset>
+</html>
+
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,81 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <meta name="generator" content="RoboHELP by eHelp Corporation - www.ehelp.com">
+   <meta name="generator-major-version" content="0.1">
+   <meta name="generator-minor-version" content="1">
+   <meta name="filetype" content="kadov">
+   <meta name="filetype-version" content="1">
+   <meta name="page-count" content="1">
+   <meta name="layout-height" content="1506">
+   <meta name="layout-width" content="639">
+   <meta name="date" content="05 24, 2002 5:49:09 PM">
+   <meta name="GENERATOR" content="Mozilla/4.79 [en]C-CCK-MCD   (Windows NT 5.0; U) [Netscape]">
+   <title>Mapped Logic</title>
+<!--(==============================================================)-->
+<!--(Document created with RoboEditor. )============================-->
+<!--(==============================================================)-->
+<!--(Meta)==========================================================-->
+<style>
+<!--
+ul.whs1 {list-style: disc;}
+p.whs2 {margin-left: 80px;}
+ul.whs3 {list-style: disc;}
+p.whs4 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
+ul.whs5 {list-style: disc;}
+p.whs6 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
+p.whs7 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
+ul.whs8 {list-style: disc;}
+p.whs9 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
+p.whs10 {margin-left: 80px; font-family: arial, sans-serif; font-size: 10pt;}
+ul.whs11 {list-style: disc;}
+
+--></style>
+<script language="javascript" title="WebHelpInlineScript">
+<!--
+function reDo() {
+  if (innerWidth != origWidth || innerHeight != origHeight)
+     location.reload();
+}
+if ((parseInt(navigator.appVersion) == 4) && (navigator.appName == "Netscape")) {
+	origWidth = innerWidth;
+	origHeight = innerHeight;
+	onresize = reDo;
+}
+//-->
+</script>
+<style>
+<!--
+  div.WebHelpPopupMenu {position:absolute; left:0px; top:0px; z-index:4; visibility:hidden;}
+  p.WebHelpNavBar {text-align:right;}
+-->
+</style>
+<!--(Body)==========================================================-->
+</head>
+<body>
+
+<h1>
+Unmapped Inputs</h1>
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+Unmapped Inputs section provides a table listing all inputs that failed
+to fit into the specified device. The page will appear in your browser
+sorted by Signal Name.&nbsp;</font></span><!--begin!kadov{{-->
+<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><!--begin!kadov{{-->
+<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><span 
+ style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+Unmapped Inputs table contains the following:&nbsp;</font></span>
+<ul type="disc" class="whs1">
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+input signal name&nbsp;</font></span></li>
+</ul>
+
+<ul type="disc" class="whs11">
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+Pin/FB Assignment specified by the user.</font></span></li>
+</ul>
+
+</body>
+</html>
@@ -0,0 +1,63 @@
+<html>
+<head>
+<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
+<script>var currEqnType = defEqnType = 1</script><script src="applet.js"></script><script src="leftnav.js"></script><link rel="stylesheet" type="text/css" href="../tim/toc.css">
+</head>
+<body bgcolor="#CCCCCC" text="#000000"><form name="options">
+<span class="tocRef"><table width="105" border="0" cellspacing="0" cellpadding="0">
+<tr><td colspan="2"><div align="left"><span class="HEADING">Fitter Report</span></div></td></tr>
+<tr>
+<td width="7"> </td>
+<td><a href="javascript:showSummary();" class="SECONDARY-NAV" onmouseover="window.status='goto Summary'; return true;" onmouseout="window.status=''">Summary</a></td>
+</tr>
+<tr>
+<td width="7"> </td>
+<td><a href="javascript:showError(10);" class="SECONDARY-NAV" onmouseover="window.status='goto Errors/Warnings'; return true;" onmouseout="window.status=''">Errors/Warnings</a></td>
+</tr>
+<tr>
+<td width="7"> </td>
+<td><a href="javascript:showMappedLogics(0);" class="SECONDARY-NAV" onmouseover="window.status='goto Logic'; return true;" onmouseout="window.status=''">Logic</a></td>
+</tr>
+<tr>
+<td width="7"> </td>
+<td><a href="javascript:showMappedInputs(0);" class="SECONDARY-NAV" onmouseover="window.status='goto Inputs'; return true;" onmouseout="window.status=''">Inputs</a></td>
+</tr>
+<tr>
+<td width="7"> </td>
+<td><a href="javascript:showFBSum();" class="SECONDARY-NAV" onmouseover="window.status='goto Function Blocks Summary'; return true;" onmouseout="window.status=''">Function Blocks</a></td>
+</tr>
+<tr>
+<td width="7"> </td>
+<td><a href="javascript:showEqnAll();" class="SECONDARY-NAV" onmouseover="window.status='goto Equations'; return true;" onmouseout="window.status=''">Equations</a></td>
+</tr>
+<tr>
+<td width="7"> </td>
+<td><a href="javascript:showPinOut(10);" class="SECONDARY-NAV" onmouseover="window.status='goto Pin List'; return true;" onmouseout="window.status=''">Pin List</a></td>
+</tr>
+<tr>
+<td width="7"> </td>
+<td><a href="javascript:showOptions();" class="SECONDARY-NAV" onmouseover="window.status='goto Compiler Options'; return true;" onmouseout="window.status=''">Compiler Options</a></td>
+</tr>
+<tr>
+<td width="7"> </td>
+<td><a href="javascript:showAscii();" class="SECONDARY-NAV" onmouseover="window.status='goto Text Report'; return true;" onmouseout="window.status=''">Text Report</a></td>
+</tr>
+<tr>
+<td width="7"> </td>
+<td><a href="javascript:showHelp();" class="SECONDARY-NAV" onmouseover="window.status='goto Help'; return true;" onmouseout="window.status=''">Help</a></td>
+</tr>
+</table></span><div align="left">
+<br><br><br><table width="105" border="0" cellspacing="0" cellpadding="0">
+<tr><td colspan="2"><b><span class="HEADING">Equation Display Style</span></b></td></tr>
+<tr>
+<td width="7"> </td>
+<td><select name="eqnType" onchange="doEqnFormat()"><option value="0">ABEL</option>
+<option value="1" selected>VHDL</option>
+<option value="2">Verilog</option></select></td>
+</tr>
+</table>
+<br><b> </b>
+</div>
+<input type="hidden" name="info" value="1"><input type="hidden" name="warn" value="1"><input type="hidden" name="error" value="1"><input type="hidden" name="inOn" value="1"><input type="hidden" name="outOn" value="1"><input type="hidden" name="glbOn" value="1"><input type="hidden" name="ispOn" value="1"><input type="hidden" name="vccOn" value="1"><input type="hidden" name="gndOn" value="1"><input type="hidden" name="prohibitOn" value="1"><input type="hidden" name="unuseOn" value="1"><input type="hidden" name="ncOn" value="1"><input type="hidden" name="htmlStr" value=""><input type="hidden" name="pinStr" value=""><input type="hidden" name="eqnStr" value=""><input type="hidden" name="errStr" value=""><input type="hidden" name="pinSel" value="0"><input type="hidden" name="currPage" value="summary">
+</form></body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,100 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <meta name="generator" content="RoboHELP by eHelp Corporation - www.ehelp.com">
+   <meta name="generator-major-version" content="0.1">
+   <meta name="generator-minor-version" content="1">
+   <meta name="filetype" content="kadov">
+   <meta name="filetype-version" content="1">
+   <meta name="page-count" content="1">
+   <meta name="layout-height" content="1506">
+   <meta name="layout-width" content="639">
+   <meta name="date" content="05 24, 2002 5:49:09 PM">
+   <meta name="GENERATOR" content="Mozilla/4.79 [en]C-CCK-MCD   (Windows NT 5.0; U) [Netscape]">
+   <title>Mapped Logic</title>
+<!--(==============================================================)-->
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+<!--(Body)==========================================================-->
+</head>
+<body>
+
+<h1>
+Unmapped Logic</h1>
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+Unmapped Logic section provides a table listing all logic that failed to
+fit into the specified device. The page will appear in your browser sorted
+by Signal Name.&nbsp;</font></span><!--begin!kadov{{-->
+<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><!--begin!kadov{{-->
+<br><!--}}end!kadov--><!--kadov_tag{{<implicit_p>}}--><span 
+ style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+Mapped Logic table contains the following:&nbsp;</font></span>
+<ul type="disc" class="whs1">
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+signal name&nbsp;</font></span></li>
+</ul>
+
+<div class="whs2"><span style="font-weight: bold;
+											font-family: arial, sans-serif;
+											font-size: 10pt;"><font size=-1><b>Note:</span><span 
+ style="font-family: arial, sans-serif; font-size: 10pt;"></b>
+Clicking on the signal name will open a new window with the equations for
+that signal.&nbsp;</font></span></div>
+
+<ul type="disc" class="whs3">
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+total number of product terms&nbsp;</font></span></li>
+
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+total number of inputs&nbsp;</font></span></li>
+
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+I/O standard where appropriate</font></span></li>
+
+<li class="kadov-p" class="kadov-p">
+<span style="font-family: arial, sans-serif; font-size: 10pt;"><font size=-1>The
+Pin/FB Assignment specified by the user.</font></span></li>
+</ul>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
@@ -0,0 +1,17 @@
+<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
+<html>
+<head>
+   <meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
+   <title>genmsg</title>
+</head>
+<body>
+&nbsp;
+<br>&nbsp;
+<dl>
+<dd>
+This file is currently being generated. Please recheck the link after some
+time for this report data.</dd>
+</dl>
+
+</body>
+</html>
--- a/Show More
+++ b/Show More