to much logic!
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<html><body><pre>
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</pre></body></html>
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<html><body><pre>
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I/O Style - OD - OpenDrain
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- PU - Pullup
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- PN - Pulldown
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- KPR - Keeper
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- S - SchmittTrigger
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- DG - DataGate
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Reg Use - LATCH - Transparent latch
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||||
- DFF - D-flip-flop
|
||||
- DEFF - D-flip-flop with clock enable
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||||
- TFF - T-flip-flop
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||||
- TDFF - Dual-edge-triggered T-flip-flop
|
||||
- DDFF - Dual-edge-triggered flip-flop
|
||||
- DDEFF - Dual-edge-triggered flip-flop with clock enable
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/S (after any above flop/latch type) indicates initial state is Set
|
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</pre></body></html>
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<html><body><pre>
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Legend: PU - Pull Up
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</pre></body></html>
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function showLogicLeft() { parent.leftnav.showLogicLeft(); }
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<html><body><pre>
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Legend : NC = Not Connected, unbonded pin
|
||||
PGND = Unused I/O configured as additional Ground pin
|
||||
TIE = Unused I/O floating -- must tie to VCC, GND or other signal
|
||||
VCC = Dedicated Power Pin
|
||||
GND = Dedicated Ground Pin
|
||||
TDI = Test Data In, JTAG pin
|
||||
TDO = Test Data Out, JTAG pin
|
||||
TCK = Test Clock, JTAG pin
|
||||
TMS = Test Mode Select, JTAG pin
|
||||
PE = Port Enable pin
|
||||
PROHIBITED = User reserved pin
|
||||
</pre></body></html>
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||||
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||||
<html><body><pre>
|
||||
Legend : NC = Not Connected, unbonded pin
|
||||
PGND = Unused I/O configured as additional Ground pin
|
||||
KPR = Unused I/O with weak keeper (leave unconnected)
|
||||
WPU = Unused I/O with weak pull up (leave unconnected)
|
||||
WPD = Unused I/O with weak pull down (leave unconnected)
|
||||
TIE = Unused I/O floating -- must tie to VCC, GND or other signal
|
||||
VCC = Dedicated Power Pin
|
||||
VCCAUX = Power supply for JTAG pins
|
||||
VCCIO-3.3 = I/O supply voltage for LVTTL, LVCMOS33, SSTL3_I
|
||||
VCCIO-2.5 = I/O supply voltage for LVCMOS25, SSTL2_I
|
||||
VCCIO-1.8 = I/O supply voltage for LVCMOS18
|
||||
VCCIO-1.5 = I/O supply voltage for LVCMOS15, HSTL_I
|
||||
VREF = Reference voltage for indicated input standard
|
||||
GND = Dedicated Ground Pin
|
||||
TDI = Test Data In, JTAG pin
|
||||
TDO = Test Data Out, JTAG pin
|
||||
TCK = Test Clock, JTAG pin
|
||||
TMS = Test Mode Select, JTAG pin
|
||||
PROHIBITED = User reserved pin
|
||||
</pre></body></html>
|
||||
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|
||||
<html><body><pre>
|
||||
Legend : NC = Not Connected, unbonded pin
|
||||
PE = Port Enable pin
|
||||
WPU = Unused with Internal Weak Pull Up
|
||||
TIE = Unused I/O floating -- must tie to VCC, GND or other signal
|
||||
VCC = Dedicated Power Pin
|
||||
GND = Dedicated Ground Pin
|
||||
TDI = Test Data In, JTAG pin
|
||||
TDO = Test Data Out, JTAG pin
|
||||
TCK = Test Clock, JTAG pin
|
||||
TMS = Test Mode Select, JTAG pin
|
||||
PROHIBITED = User reserved pin
|
||||
</pre></body></html>
|
||||
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<tr>
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<td width="40%"> <b>Date</b>
|
||||
</td>
|
||||
<td width="60%"> 12-28-2016, 0:50AM</td>
|
||||
<td width="60%"> 12-28-2016, 2:13AM</td>
|
||||
</tr>
|
||||
</table></span><br><span id="sumres" class="pgRef"><h5 align="center">RESOURCES SUMMARY</h5>
|
||||
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
|
||||
@@ -42,11 +42,11 @@
|
||||
<th width="20%">Function Block Inputs Used</th>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="20%" align="center">136/144 (95%)</td>
|
||||
<td width="20%" align="center">406/720 (57%)</td>
|
||||
<td width="20%" align="center">46/144 (32%)</td>
|
||||
<td width="20%" align="center">106/117 (91%)</td>
|
||||
<td width="20%" align="center">309/432 (72%)</td>
|
||||
<td width="20%" align="center">107/144 (75%)</td>
|
||||
<td width="20%" align="center">228/720 (32%)</td>
|
||||
<td width="20%" align="center">22/144 (16%)</td>
|
||||
<td width="20%" align="center">107/117 (92%)</td>
|
||||
<td width="20%" align="center">193/432 (45%)</td>
|
||||
</tr>
|
||||
</table></span><br><span id="pinres" class="pgRef"><h5 align="center">PIN RESOURCES</h5>
|
||||
<table align="center" width="90%" border="0" cellspacing="0" cellpadding="0"><tr>
|
||||
@@ -58,8 +58,8 @@
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</tr>
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||||
<tr>
|
||||
<td width="33%"> Input</td>
|
||||
<td width="33%" align="center"> 33</td>
|
||||
<td width="33%" align="center"> 33</td>
|
||||
<td width="33%" align="center"> 34</td>
|
||||
<td width="33%" align="center"> 34</td>
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||||
</tr>
|
||||
<tr>
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||||
<td width="33%"> Output</td>
|
||||
@@ -96,7 +96,7 @@
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<tr>
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||||
<td width="33%"> I/O</td>
|
||||
<td width="33%" align="center">
|
||||
100</td>
|
||||
101</td>
|
||||
<td width="33%" align="center"> 110</td>
|
||||
</tr>
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||||
<tr>
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||||
@@ -123,7 +123,7 @@
|
||||
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
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||||
<tr>
|
||||
<td width="50%"> Macrocells in high performance mode (MCHP)</td>
|
||||
<td width="50%"> 136</td>
|
||||
<td width="50%"> 107</td>
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="50%"> Macrocells in low power mode (MCLP)</td>
|
||||
@@ -131,7 +131,7 @@
|
||||
</tr>
|
||||
<tr>
|
||||
<td width="50%"> Total macrocells used (MC)</td>
|
||||
<td width="50%"> 136</td>
|
||||
<td width="50%"> 107</td>
|
||||
</tr>
|
||||
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
|
||||
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<body>
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||||
|
||||
<h1>Unmapped Inputs</h1>
|
||||
|
||||
<p class="whs1">This page shows
|
||||
input signals which were either not mapped or <span style="font-family: arial, sans-serif; font-size: 10pt;"><FONT SIZE=2 style="font-size:10pt;">not
|
||||
routed.</FONT></span></p>
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<!--(Body)==========================================================-->
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<body>
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|
||||
<p class="whs1">Unmapped Logic</p>
|
||||
|
||||
<p class="whs2">This page shows those equations whose
|
||||
logic was either not placed or not <span style="font-family: arial, sans-serif;
|
||||
font-size: 10pt;
|
||||
font-weight: normal;"><FONT SIZE=2 style="font-size:10pt;">completely
|
||||
placed in the specified device.</FONT></span></p>
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</body>
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