Merge branch 'driverupdate2' into 'master'

Driverupdate2

See merge request MHeinrichs/Zorro-LAN-IDE!4
This commit is contained in:
Matthias Heinrichs
2019-11-19 14:10:42 +00:00
20 changed files with 421 additions and 69 deletions
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@@ -44,6 +44,8 @@ PRIORITY=PRI/K/N,BPS/K/N,MTU/K/N,FULLDUPLEX/S,FLOWCONTROL/S,TIMER/K/N,MULTICAST/
note: this switch should not be enabled in normal cases. note: this switch should not be enabled in normal cases.
The module features autoconfiguration that determines The module features autoconfiguration that determines
speed and duplex automatically. speed and duplex automatically.
note(2): see miitool for changing speed/duplex
settings at runtime.
PRIORITY - server task priority (default 1) PRIORITY - server task priority (default 1)
@@ -51,8 +53,8 @@ PRIORITY=PRI/K/N,BPS/K/N,MTU/K/N,FULLDUPLEX/S,FLOWCONTROL/S,TIMER/K/N,MULTICAST/
MTU - maximum transmission unit (default 1500) MTU - maximum transmission unit (default 1500)
MULTICAST - obsolete, kept for config file backwards compatibility with MULTICAST - (V2.3+) override fine-grained automatic multicast filtering
old driver and accept all multicast frames (default: off)
FLOWCONTROL - enable automatic flow control that throttles incoming FLOWCONTROL - enable automatic flow control that throttles incoming
data when the hardware buffer gets full data when the hardware buffer gets full
@@ -64,6 +66,14 @@ PRIORITY=PRI/K/N,BPS/K/N,MTU/K/N,FULLDUPLEX/S,FLOWCONTROL/S,TIMER/K/N,MULTICAST/
Changelog: Changelog:
---------- ----------
2.4 - added second semaphore, specifically for the write list
- recompiled using GCC 2.95 for slightly smaller binary
- avoid full ethernet chip reset on startup when the
registers seem to be in a sane state (faster init, especially
with DHCP)
2.3 - implemented fine grained multicast filter hashes
2.2 - some more tuning to RX/TX scheduling 2.2 - some more tuning to RX/TX scheduling
- added optional debug code to lowlevel routines - added optional debug code to lowlevel routines
- removed some obsolete bus transfers - removed some obsolete bus transfers
@@ -110,11 +120,12 @@ Changelog:
Compilation / Development Notes Compilation / Development Notes
------------------------------- -------------------------------
Either VBCC or GCC (tested with version 2.95 only) can be used. General Either VBCC or GCC (tested with version 2.95 only) can be used for
options for compiler usage can be found in Common.mk. Also, you might want cross-compiles. General options for compiler usage can be found in
to adapt the paths to your setup (PREFX,SYSINC). In addition to the regular Common.mk. Also, you might want to adapt the paths to your setup
NDK, the sana2.h is expected in the devices/ subdir of the includes. sana2.h (PREFX,SYSINC). In addition to the regular NDK, the sana2.h is expected
may be found in the AmiTCP or Roadshow SDK, respectively. in the devices/ subdir of the includes. sana2.h may be found in the
AmiTCP or Roadshow SDK, respectively.
Call Call
@@ -125,6 +136,15 @@ for building the device.
VBCC note: When calling the GNU Make port supplied with ADE/GG natively on AmigaOS3, VBCC note: When calling the GNU Make port supplied with ADE/GG natively on AmigaOS3,
please make sure that "vc" is within the search path of "/bin/sh". please make sure that "vc" is within the search path of "/bin/sh".
Native compilation is also supported for GCC and VBCC. In addition, SAS/C
smakefiles are provided for the hardware targets.
Call
smake -f smakefile.enc
for native building with SAS/C.
Conceptually, the driver was meant to support multiple hardware targets. Therefore, Conceptually, the driver was meant to support multiple hardware targets. Therefore,
it features a SANA-II frontend (device.c,deviceheader.c,deviceinit.c), a main it features a SANA-II frontend (device.c,deviceheader.c,deviceinit.c), a main
server running in a task (server.c) and several hardware backends. A new hardware server running in a task (server.c) and several hardware backends. A new hardware
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@@ -45,6 +45,8 @@ LINKEXE = vlink -bamigahunk -x -s -mrel -Cvbcc -Bstatic
#LINK = $(CCX) -nostdlib #LINK = $(CCX) -nostdlib
CFLAGS = -Os -+ -sc -c99 -cpu=$(CPU) CFLAGS = -Os -+ -sc -c99 -cpu=$(CPU)
CFLAGS2 = -Os -+ -sc -c99 -cpu=$(CPU2) CFLAGS2 = -Os -+ -sc -c99 -cpu=$(CPU2)
VASMFORMAT = -m$(CPU) -Fhunk -nowarn=2064 -quiet -I$(SYSINC)
VASMFORMAT2 = -m$(CPU2) -Fhunk -nowarn=2064 -quiet -I$(SYSINC)
else else
@@ -52,14 +54,15 @@ else
CCX = m68k-amigaos-gcc CCX = m68k-amigaos-gcc
LINK = $(CCX) -nostartfiles -s LINK = $(CCX) -nostartfiles -s
LINKEXE = $(CCX) -s -noixemul LINKEXE = $(CCX) -s -noixemul
CFLAGS = -O3 -s -m$(CPU) -Wall -noixemul -mregparm=4 -fomit-frame-pointer -msoft-float -noixemul #$(CPU)
CFLAGS2 = -O3 -s -m$(CPU2) -Wall -noixemul -mregparm=4 -fomit-frame-pointer -msoft-float -noixemul CFLAGS = -Os -s -m$(CPU) -Wall -noixemul -mregparm=4 -fomit-frame-pointer -msoft-float -noixemul
CFLAGS2 = -Os -s -m$(CPU2) -Wall -noixemul -mregparm=4 -fomit-frame-pointer -msoft-float -noixemul
VASMFORMAT = -m$(CPU) -Faout -nowarn=2064 -quiet -I$(SYSINC)
VASMFORMAT2 = -m$(CPU2) -Faout -nowarn=2064 -quiet -I$(SYSINC)
endif endif
VASM = vasmm68k_mot VASM = vasmm68k_mot
VASMFORMAT = -m$(CPU) -Fhunk -nowarn=2064 -quiet -I$(SYSINC)
VASMFORMAT2 = -m$(CPU2) -Fhunk -nowarn=2064 -quiet -I$(SYSINC)
# unused here # unused here
#HOST = $(shell uname) #HOST = $(shell uname)
@@ -91,7 +94,11 @@ DEFINES += -DNEWSTYLE
#DEFINES2 += -DDEVICEVERSION=$(DEVICEVERSION) -DDEVICEREVISION=$(DEVICEREVISION) #DEFINES2 += -DDEVICEVERSION=$(DEVICEVERSION) -DDEVICEREVISION=$(DEVICEREVISION)
#DEFINES2 += -DDEVICEDATE=$(DEVICEDATE) #DEFINES2 += -DDEVICEDATE=$(DEVICEDATE)
#DEFINES2 += -DDEVICEEXTRA=$(DEVICEEXTRA) #DEFINES2 += -DDEVICEEXTRA=$(DEVICEEXTRA)
ifeq ($(SAME_DEVNAME),1)
DEFINES2 += -DDEVICENAME="$(DEVICEID)"
else
DEFINES2 += -DDEVICENAME="$(DEVICEID2)" DEFINES2 += -DDEVICENAME="$(DEVICEID2)"
endif
DEFINES2 += -DHAVE_VERSION_H=1 DEFINES2 += -DHAVE_VERSION_H=1
DEFINES2 += -DNEWSTYLE DEFINES2 += -DNEWSTYLE
#ASMDEFS2 += -DDEVICEVERSION=$(DEVICEVERSION) -DDEVICEREVISION=$(DEVICEREVISION) #ASMDEFS2 += -DDEVICEVERSION=$(DEVICEVERSION) -DDEVICEREVISION=$(DEVICEREVISION)
@@ -110,7 +117,11 @@ DEFINES += -DNEWSTYLE
#DEFINES2 += -D"DEVICEVERSION=$(DEVICEVERSION)" -D"DEVICEREVISION=$(DEVICEREVISION)" #DEFINES2 += -D"DEVICEVERSION=$(DEVICEVERSION)" -D"DEVICEREVISION=$(DEVICEREVISION)"
#DEFINES2 += -D"DEVICEDATE=$(DEVICEDATE)" -D"DEVICENAME="$(DEVICEID2)"" #DEFINES2 += -D"DEVICEDATE=$(DEVICEDATE)" -D"DEVICENAME="$(DEVICEID2)""
#DEFINES2 += -D"DEVICEEXTRA=$(DEVICEEXTRA)" #DEFINES2 += -D"DEVICEEXTRA=$(DEVICEEXTRA)"
ifeq ($(SAME_DEVNAME),1)
DEFINES2 += -D"DEVICENAME="$(DEVICEID)""
else
DEFINES2 += -D"DEVICENAME="$(DEVICEID2)"" DEFINES2 += -D"DEVICENAME="$(DEVICEID2)""
endif
DEFINES2 += -DHAVE_VERSION_H=1 DEFINES2 += -DHAVE_VERSION_H=1
DEFINES2 += -DNEWSTYLE DEFINES2 += -DNEWSTYLE
#ASMDEFS2 += -DDEVICEVERSION=$(DEVICEVERSION) -DDEVICEREVISION=$(DEVICEREVISION) #ASMDEFS2 += -DDEVICEVERSION=$(DEVICEVERSION) -DDEVICEREVISION=$(DEVICEREVISION)
+4 -2
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@@ -32,14 +32,16 @@ ASMOBJECTS = $(SUBDIR)/enc624j6l.o $(SUBDIR)/intervaltimer.o kprintf.o
DEVICEID=enc624j6net.device DEVICEID=enc624j6net.device
DEFINES = -DHW_DMA_TX # -DPROTO_V2EXPNET DEFINES = -DHW_DMA_TX # -DPROTO_V2EXPNET
ASMDEFS = # -DPROTO_V2EXPNET ASMDEFS = -DHW_DMA_TX # -DPROTO_V2EXPNET
CPU = 68020 CPU = 68060
DEVICEID2=enc624j6net.device_68000 DEVICEID2=enc624j6net.device_68000
DEFINES2 = # -DPROTO_V2EXPNET DEFINES2 = # -DPROTO_V2EXPNET
ASMDEFS2 = # -DPROTO_V2EXPNET ASMDEFS2 = # -DPROTO_V2EXPNET
CPU2 = 68000 CPU2 = 68000
SAME_DEVNAME=1
############################################################################### ###############################################################################
# import generic ruleset # import generic ruleset
# #
-1
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@@ -1,4 +1,3 @@
;APS00000000000000000000000000000000000000000000000000000000000000000000000000000000
; ifd DEBUG ; ifd DEBUG
; XDEF _AbsExecBase ; XDEF _AbsExecBase
; XDEF _LVORawDoFmt ; XDEF _LVORawDoFmt
+35 -3
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@@ -62,6 +62,7 @@ const UWORD dev_supportedcmds[] = {
0 0
}; };
const struct NSDeviceQueryResult NSDQueryAnswer = { const struct NSDeviceQueryResult NSDQueryAnswer = {
0, 0,
16, /* up to SupportedCommands (inclusive) */ 16, /* up to SupportedCommands (inclusive) */
@@ -75,6 +76,20 @@ const struct NSDeviceQueryResult NSDQueryAnswer = {
#include "hw.h" #include "hw.h"
#include "macros.h" #include "macros.h"
const ULONG blub[6] = {
0xDEADCAFE,
sizeof(struct Sana2DeviceStats),
sizeof(struct ServerData),
sizeof(struct DevUnit),
sizeof(struct devbase)
};
/* enable heavy debug (D2=beginIO) */
#define D2(x)
#define D4(x)
/* #define D2(x) D(x) */
/* #define D4(x) D(x) */
@@ -105,6 +120,7 @@ ASM SAVEDS struct Device *DevInit( ASMR(d0) DEVBASEP ASMREG(d0)
dbNewList( (struct List*)&db->db_Units[i].du_WriteQueue ); dbNewList( (struct List*)&db->db_Units[i].du_WriteQueue );
dbNewList( (struct List*)&db->db_Units[i].du_EventQueue ); dbNewList( (struct List*)&db->db_Units[i].du_EventQueue );
InitSemaphore( &db->db_Units[i].du_Sem ); InitSemaphore( &db->db_Units[i].du_Sem );
InitSemaphore( &db->db_Units[i].du_WrSem );
db->db_Units[i].du_MTU = DEF_MTU; db->db_Units[i].du_MTU = DEF_MTU;
db->db_Units[i].du_BitPerSec = DEF_BPS; db->db_Units[i].du_BitPerSec = DEF_BPS;
} }
@@ -382,7 +398,8 @@ ASM SAVEDS VOID DevBeginIO( ASMR(a1) struct IOSana2Req *ioreq ASMREG(a1),
/*ioreq->ios2_Req.io_Error = S2ERR_NO_ERROR; /*ioreq->ios2_Req.io_Error = S2ERR_NO_ERROR;
ioreq->ios2_WireError = S2WERR_GENERIC_ERROR;*/ ioreq->ios2_WireError = S2WERR_GENERIC_ERROR;*/
D(("BeginIO command %ld unit %ld\n",(LONG)ioreq->ios2_Req.io_Command,unit)); /* heavy debug on beginIO */
D2(("BeginIO command %ld unit %ld\n",(LONG)ioreq->ios2_Req.io_Command,unit));
switch( ioreq->ios2_Req.io_Command ) switch( ioreq->ios2_Req.io_Command )
{ {
@@ -468,12 +485,27 @@ ASM SAVEDS VOID DevBeginIO( ASMR(a1) struct IOSana2Req *ioreq ASMREG(a1),
} }
else else
{ {
#if 0
LONG code;
LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq );
ObtainSemaphore(&db->db_Units[unit].du_WrSem);
code = write_frame( db, unit, ioreq );
if( code >= 0 )
{
db->db_Units[unit].du_DevStats.PacketsSent++;
ioreq->ios2_Req.io_Error = S2ERR_NO_ERROR;
ioreq->ios2_WireError = S2WERR_GENERIC_ERROR;
}
ReleaseSemaphore(&db->db_Units[unit].du_WrSem);
#else
ioreq->ios2_Req.io_Flags &= ~SANA2IOF_QUICK; ioreq->ios2_Req.io_Flags &= ~SANA2IOF_QUICK;
ObtainSemaphore(&db->db_Units[unit].du_Sem); ObtainSemaphore(&db->db_Units[unit].du_WrSem);
ADDTAIL((struct List*)&db->db_Units[unit].du_WriteQueue,(struct Node*)ioreq); ADDTAIL((struct List*)&db->db_Units[unit].du_WriteQueue,(struct Node*)ioreq);
ReleaseSemaphore(&db->db_Units[unit].du_Sem); ReleaseSemaphore(&db->db_Units[unit].du_WrSem);
Signal( (struct Task*)db->db_ServerProc, SIGBREAKF_CTRL_F ); Signal( (struct Task*)db->db_ServerProc, SIGBREAKF_CTRL_F );
ioreq = (0); ioreq = (0);
#endif
} }
} }
} }
+2 -1
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@@ -74,6 +74,7 @@ struct DevUnit {
volatile struct List du_EventQueue; /* Event queue */ volatile struct List du_EventQueue; /* Event queue */
struct SignalSemaphore du_Sem; /* list locking (global per unit) */ struct SignalSemaphore du_Sem; /* list locking (global per unit) */
struct SignalSemaphore du_WrSem; /* experimental: separate Sempaphore for write list */
ULONG du_OpenCount; /* unit openers */ ULONG du_OpenCount; /* unit openers */
ULONG du_Flags; /* unit flags */ ULONG du_Flags; /* unit flags */
@@ -213,7 +214,7 @@ struct MCastEntry
/* PROTOS */ /* PROTOS */
ASM LONG LibNull( void ); //ASM LONG LibNull( void );
ASM SAVEDS struct Device *DevInit(ASMR(d0) DEVBASEP ASMREG(d0), ASM SAVEDS struct Device *DevInit(ASMR(d0) DEVBASEP ASMREG(d0),
ASMR(a0) BPTR seglist ASMREG(a0), ASMR(a0) BPTR seglist ASMREG(a0),
+138
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@@ -0,0 +1,138 @@
;
; device.i
;
; (C) 2018 Henryk Richter <henryk.richter@gmx.net>
;
; Device Functions and Definitions
;
;Note(1): structures are defined only partially at the moment
;Note(2): keep this in sync with device.h
;
ifnd _INC_DEVICE_I
_INC_DEVICE_I EQU 1
; defaults
MAX_UNITS EQU 4
DEF_BPS EQU 10000000
DEF_MTU EQU 1500
; includes
include "exec/lists.i"
include "exec/libraries.i"
include "exec/devices.i"
include "exec/semaphores.i"
include "devices/timer.i"
include "hw.i"
;
; this would belong in sana2.i
;
STRUCTURE Sana2DeviceStats,0
ULONG sds_PacketsReceived ;received count
ULONG sds_PacketsSent ;transmitted count
ULONG sds_BadData ;bad packets received
ULONG sds_Overruns ;hardware miss count
ULONG sds_Unused ;Unused field
ULONG sds_UnknownTypesReceived ;orphan count
ULONG sds_Reconfigurations ;network reconfigurations
STRUCT sds_LastStart,TV_SIZE ;
LABEL sds_SIZEOF
;
;
;
STRUCTURE ServerData,0
ULONG sv_flags
APTR sv_frame ;temporary frame for rx/tx
ULONG sv_framesize ;allocated bytes
STRUCT sv_mclist,LH_SIZE ;list of multicast addresses to accept
LABEL sv_SIZEOF
;
; Unit flags
;
DUB_OPEN EQU 0
DUB_EXCLUSIVE EQU 1
DUB_ONLINE EQU 2
DUB_TYPETRACK EQU 3
DUB_PROMISC EQU 4
DUF_OPEN EQU (1<<DUB_OPEN)
DUF_EXCLUSIVE EQU (1<<DUB_EXCLUSIVE)
DUF_ONLINE EQU (1<<DUB_ONLINE)
DUF_TYPETRACK EQU (1<<DUB_TYPETRACK)
DUF_PROMISC EQU (1<<DUB_PROMISC)
;
;local to each unit of the device
;
STRUCTURE DevUnit,0
STRUCT du_ReadTypes,LH_SIZE ;RX queues are sorted by type: find RX buffers
;by type, afterwards traverse active readers = networking stacks
STRUCT du_ReadOrphans,LH_SIZE ;not claimed by RX types or no buffers available -> orphan
STRUCT du_WriteQueue,LH_SIZE ;TX queue
STRUCT du_EventQueue,LH_SIZE ;Event queue
STRUCT du_Sem,SS_SIZE ;list locking (global per unit)
STRUCT du_WrSem,SS_SIZE ;write list locking
ULONG du_OpenCount ;unit openers
ULONG du_Flags ;unit flags
ULONG du_MTU ;maximum transmission unit (1500 for regular Ethernet)
ULONG du_BitPerSec ;speed in BPS
STRUCT du_HWAddr,6 ;default MAC address
STRUCT du_CFGAddr,6 ;configured MAC address
STRUCT du_DevStats,sds_SIZEOF ;collect device stats per unit
; HW Data (generic for now)
ULONG du_hwl0 ;
ULONG du_hwl1 ;
ULONG du_hwl2 ;
APTR du_hwp0 ;
APTR du_hwp1 ;
APTR du_hwp2 ;
LABEL du_SIZEOF
;
; Device Base
;
STRUCT devbase,LIB_SIZE
APTR db_SegList ;from Device Init, actually a BPTR
ULONG db_Flags ;misc
APTR db_SysBase ;Exec Base
APTR db_DOSBase ;
APTR db_UtilityBase ;
ULONG db_NBoards ;
ULONG db_ID ;device opener ID enumeration
STRUCT db_Units,du_SIZEOF*MAX_UNITS ;don't bother with lists, who's gonna have more
;than 1 network card of the same type, anyway ?
; server process data
APTR db_ServerProc ;process of main queue server
APTR db_Task ;server shutdown task address (non permanently available)
ULONG db_ServerSigMask ;shutdown signal
APTR db_ServerPort ;request forwarding (initialized by server)
STRUCT db_BufferManagement,LH_SIZE ;remember allocated instances
;services for other instances (server task, hw.c)
STRUCT db_svdat,sv_SIZEOF ;private data for main server
;from hwprivate.i
STRUCT db_hwdat,4 ;TODO: implement hwprivate.i
LABEL db_SIZEOF
;TODO:
;struct db_BufferManagement
;struct ServerMsg
;struct SanaReader
;struct SanaReadType
;struct MCastEntry
endc ;_INC_DEVICE_I
+35 -7
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@@ -22,19 +22,45 @@
#include "device.h" #include "device.h"
/* Enable this if you want pure C for the device. (disable compilation of romtag.asm in that case) /* Enable this if you want pure C for the device. (disable compilation of romtag.asm in that case)
I personally prefer the small ASM blob to steer away from linking challenges. I personally prefer a small ASM blob to steer away from linking challenges.
*/ */
#if 1 #if 1
ASM LONG LibNull( void )
{
return 0;
}
extern const char DeviceName[]; extern const char DeviceName[];
extern const char DeviceVersionString[]; extern const char DeviceVersionString[];
extern const APTR DeviceInitTab[]; extern const APTR DeviceInitTab[];
/* force moveq #0,d0;rts in front of the ROMTAG */
#if 1
struct myrt0 {
ULONG ret0;
struct Resident rt;
};
/* There is a trick here:
LibNull() is actually a function returning 0
*/
const struct myrt0 LibNull =
{
0x70004E75,
{
RTC_MATCHWORD,
( struct Resident* ) ((char *)&LibNull+sizeof(ULONG)),
( struct Resident* ) ((char *)&LibNull+sizeof(ULONG)+sizeof(struct Resident)),
RTF_AUTOINIT,
DEVICEVERSION,
NT_DEVICE,
0,
(char*)DeviceName,
(char*)DeviceVersionString+6,
(APTR)DeviceInitTab
}
};
#else
/* hope that the compiler will put LibNull first */
ASM LONG LibNull( void )
{
return 0;
}
static const struct Resident _00RomTag = { static const struct Resident _00RomTag = {
RTC_MATCHWORD, RTC_MATCHWORD,
( struct Resident* ) &_00RomTag, ( struct Resident* ) &_00RomTag,
@@ -49,5 +75,7 @@ static const struct Resident _00RomTag = {
}; };
#endif #endif
#endif
+1
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@@ -32,6 +32,7 @@ static const char _DeviceVersionString[] = "$VER: " xstr(DEVICENAME) " " xstr(DE
const char *DeviceVersionString = (const char *)_DeviceVersionString; const char *DeviceVersionString = (const char *)_DeviceVersionString;
const char DeviceName[] = xstr(DEVICENAME); const char DeviceName[] = xstr(DEVICENAME);
ASM LONG LibNull( void );
const APTR DeviceFunctions[] = { const APTR DeviceFunctions[] = {
(APTR) DevOpen, (APTR) DevOpen,
+98 -15
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@@ -1,3 +1,4 @@
;APS00000000000000000000000000000000000000000000000000000000000000000000000000000000
; ------------------------------------------------------------------------------ ; ------------------------------------------------------------------------------
; | Lowlevel Access to memory mapped ENC624J600 in PSP mode | ; | Lowlevel Access to memory mapped ENC624J600 in PSP mode |
; | Henryk Richter <henryk.richter@gmx.net> | ; | Henryk Richter <henryk.richter@gmx.net> |
@@ -19,19 +20,26 @@
; - _enc624j6l_RXReset -> won't recover from totally unresponsive chip (but exits gracefully) ; - _enc624j6l_RXReset -> won't recover from totally unresponsive chip (but exits gracefully)
; ;
; enable debugging code block (comment/uncomment, see below) ; enable debugging code block (comment/uncomment, see below)
DEBUG EQU 1 DEBUG EQU 0
GLOBALINT_BOARD EQU 1 ;if 1, then toggle board interrupt, else ENC624 INTIE GLOBALINT_BOARD EQU 0 ;if 1, then toggle board interrupt, else ENC624 INTIE
OPT_AVOID_DEFAULT_RESETS EQU 1 ;if 1, then check valid Microchip MAC OUI and don't reset the whole chip if the MAC address is ok
incdir src:baxnet/trunk/source/ incdir src:baxnet/trunk/source/
;Temp:Amiga/src/Zorro-LAN-IDE.git/Driver/enc624j6net/ ;Temp:Amiga/src/Zorro-LAN-IDE.git/Driver/enc624j6net/
include "enc624j6net/registers.i" include "enc624j6net/registers.i"
include "enc624j6net/macros.i" include "enc624j6net/macros.i"
include "debug.i"
ifnd DEBUG ifnd DEBUG
DEBUG EQU 0 DEBUG EQU 0
endc endc
ifne 1
include "debug.i"
else
WRITEDEBUG macro
nop
endm
endc
; ;
ADD_4RX EQU 1 ;add 4 to valid RX size (fake CRC), fixes shapeshifter RAW treatment ADD_4RX EQU 1 ;add 4 to valid RX size (fake CRC), fixes shapeshifter RAW treatment
_OPT_LONGRESET EQU 0 ;in testing, don't enable _OPT_LONGRESET EQU 0 ;in testing, don't enable
@@ -134,12 +142,6 @@ _LVOSignal EQU -324
section code,code section code,code
; ----------------------------------------------------------------------------- ; -----------------------------------------------------------------------------
; | | ; | |
; | Test/Debug code | ; | Test/Debug code |
@@ -277,7 +279,13 @@ regtests:
READREG ESTAT,a0,d0 READREG ESTAT,a0,d0
READREG ECON1,a0,d1 READREG ECON1,a0,d1
READREG MACON2,a0,d2 READREG MACON2,a0,d2
READREG MABBIPG,a0,d3 ; READREG MABBIPG,a0,d3
READREG ERXFCON,a0,d3
READREG EHT1,a0,d4
READREG EHT2,a0,d5
READREG EHT3,a0,d6
READREG EHT4,a0,d7
rts rts
@@ -368,6 +376,7 @@ txtestlen EQU *-txtestframe
; Please note that this call will overwrite Board registers and ; Please note that this call will overwrite Board registers and
; buffer memory. Call before initialization. ; buffer memory. Call before initialization.
_enc624j6l_CheckBoard: ;check whether board is operating correctly _enc624j6l_CheckBoard: ;check whether board is operating correctly
a
movem.l d1-d2/a0-a1,-(sp) movem.l d1-d2/a0-a1,-(sp)
move.l a0,d0 move.l a0,d0
@@ -388,17 +397,72 @@ _enc624j6l_CheckBoard: ;check whether board is operating correctly
SETREG EUDAST,a0,d0 ;clear ENC's bus (does not change anything in its regs) SETREG EUDAST,a0,d0 ;clear ENC's bus (does not change anything in its regs)
READREG EUDAST,a0,d0 ; READREG EUDAST,a0,d0 ;
cmp.w d0,d1 ;do we get the register back ? cmp.w d0,d1 ;do we get the register back ?
bne.s .err ;no -> complain bne .err ;no -> complain
; ------------- second initial check: can we read/write all bits? -----
move.w #$5555,d1
move.w d1,(a0) ;write into memory
moveq #0,d0
SETREG EUDAST,a0,d0 ;clear ENC's bus (does not change anything in its regs)
move.w (a0),d0
cmp.w d0,d1 ;do we get the data back ?
bne .err ;no -> complain
not.w d1 ;move.w #$AAAA,d1 ;d1 was $5555
move.w d1,(a0) ;write into memory
moveq #0,d0
SETREG EUDAST,a0,d0 ;clear ENC's bus (does not change anything in its regs)
move.w (a0),d0
cmp.w d0,d1 ;do we get the register back ?
bne .err ;no -> complain
; ---------------- disable board interrupt (for now) ------------------
moveq #0,d0 ;magic trick: the board enables Interrupts moveq #0,d0 ;magic trick: the board enables Interrupts
lea $4000(a0),a0 lea $4000(a0),a0
move.w d0,($4000,a0) ;0=disable interrupt move.w d0,($4000,a0) ;0=disable interrupt
lea -$4000(a0),a0 lea -$4000(a0),a0
; ------------------------- reset device ------------------------------
move #EIR_CRYPTEN|EIR_MODEXIF|EIR_HASHIF|EIR_AESIF|EIR_LINKIF|EIR_PRDYIF|EIR_PKTIF|EIR_DMAIF|EIR_TXIF|EIR_TXABTIF|EIR_RXABTIF|EIR_PCFULIF,d0 move #EIR_CRYPTEN|EIR_MODEXIF|EIR_HASHIF|EIR_AESIF|EIR_LINKIF|EIR_PRDYIF|EIR_PKTIF|EIR_DMAIF|EIR_TXIF|EIR_TXABTIF|EIR_RXABTIF|EIR_PCFULIF,d0
CLRREG EIR,a0,d0 CLRREG EIR,a0,d0
; ------------------------- reset device ------------------------------
ifne OPT_AVOID_DEFAULT_RESETS
READREG ESTAT,a0,d0
and #(ESTAT_CLKRDY|ESTAT_RSTDONE|ESTAT_PHYRDY),d0
cmp #(ESTAT_CLKRDY|ESTAT_RSTDONE|ESTAT_PHYRDY),d0
bne.s .dorst
; chip seems alive
; check whether the OUI part of the MAC address is valid,
; by comparing with OUIs registered to Microchip
lea MAADR1L+2(a0),a1 ;after first pair of bytes
move.w -(a1),d0
rol.w #8,d0
swap d0
move.w -(a1),d0
lsl.w #8,d0 ;OUI<<8
lea .valid_microchip_ouis(pc),a1
.ouiloop:
tst.l (a1)
beq.s .dorst
cmp.l (a1)+,d0
beq.s .norst
bra.s .ouiloop
; 32 bit per entry, 0-terminated
.valid_microchip_ouis:
dc.b $00,$04,$A3,0
dc.b $00,$1E,$C0,0
dc.b $04,$91,$62,0
dc.b $54,$10,$EC,0
dc.b $80,$1F,$12,0
dc.b $D8,$80,$39,0
dc.b 0,0,0,0
.dorst:
endc OPT_AVOID_DEFAULT_RESETS
; ifne _OPT_LONGRESET ; ifne _OPT_LONGRESET
; moveq #ECON2_ETHRST,d0 ; moveq #ECON2_ETHRST,d0
; swap d0 ; swap d0
@@ -426,7 +490,7 @@ _enc624j6l_CheckBoard: ;check whether board is operating correctly
READREG EUDAST,A0,d0 READREG EUDAST,A0,d0
tst.w d0 ;should have gone to 0 after reset tst.w d0 ;should have gone to 0 after reset
bne.s .err ;(see above, we've written $1234) bne.s .err ;(see above, we've written $1234)
.norst
ifne 0 ifne 0
;---------- short RAM check - write phase ---------------------------- ;---------- short RAM check - write phase ----------------------------
@@ -587,6 +651,7 @@ _enc624j6l_Init:
WRITEREG ERXST,a0,d0 ;set RX start pointer (end will be $5fff) WRITEREG ERXST,a0,d0 ;set RX start pointer (end will be $5fff)
WRITEREG PNextPacket,a0,d0 ;set user read pointer WRITEREG PNextPacket,a0,d0 ;set user read pointer
suba.l a1,a1 ;no multicast hash table (yet)
bsr _enc624j6l_bc_mc_filter ;in: A0/D1, out: D0 bsr _enc624j6l_bc_mc_filter ;in: A0/D1, out: D0
move #RXSTOP_INIT&$fffe,d0 move #RXSTOP_INIT&$fffe,d0
@@ -644,6 +709,7 @@ _enc624j6l_Init:
; ;
; in: A0 - board base ; in: A0 - board base
; D1 - init flags ; D1 - init flags
; A1 - multicast hash table (4x USHORT)
;out: D0 >0 = OK ;out: D0 >0 = OK
; <=0 = FAIL ; <=0 = FAIL
_enc624j6l_bc_mc_filter: _enc624j6l_bc_mc_filter:
@@ -658,15 +724,32 @@ _enc624j6l_bc_mc_filter:
move #ERXFCON_NOTMEEN|ERXFCON_MCEN|ERXFCON_BCEN|ERXFCON_UCEN|ERXFCON_MPEN|ERXFCON_CRCEN|ERXFCON_RUNTEN,d0 move #ERXFCON_NOTMEEN|ERXFCON_MCEN|ERXFCON_BCEN|ERXFCON_UCEN|ERXFCON_MPEN|ERXFCON_CRCEN|ERXFCON_RUNTEN,d0
bra.s .setfilter bra.s .setfilter
.no_promisc: .no_promisc:
moveq #PIO_INIT_MULTI_CAST,d0 moveq #PIO_INIT_MULTI_CAST,d0 ;all multicast ?
and d1,d0 and d1,d0
beq.s .no_multicast beq.s .no_multicast
move #ERXFCON_MCEN|ERXFCON_BCEN|ERXFCON_UCEN|ERXFCON_MPEN|ERXFCON_CRCEN|ERXFCON_RUNTEN,d0 move #ERXFCON_MCEN|ERXFCON_BCEN|ERXFCON_UCEN|ERXFCON_MPEN|ERXFCON_CRCEN|ERXFCON_RUNTEN,d0
bra.s .setfilter bra.s .setfilter
.no_multicast: .no_multicast:
move #ERXFCON_BCEN|ERXFCON_UCEN|ERXFCON_MPEN|ERXFCON_CRCEN|ERXFCON_RUNTEN,d0 move #ERXFCON_BCEN|ERXFCON_UCEN|ERXFCON_MPEN|ERXFCON_CRCEN|ERXFCON_RUNTEN,d0
; did we get a multicast hash table ?
move.l a1,d1
beq.s .nohashes
AND #$ffff-ERXFCON_MCEN,d0 ;don't accept ALL multicast
OR #ERXFCON_HTEN,d0 ;enable multicast hash table filter
move (a1),d1
WRITEREG EHT1,a0,d1
move 2(a1),d1
WRITEREG EHT2,a0,d1
move 4(a1),d1
WRITEREG EHT3,a0,d1
move 6(a1),d1
WRITEREG EHT4,a0,d1
.nohashes:
.setfilter: .setfilter:
WRITEREG ERXFCON,a0,d0 ;set filter TODO: pattern matching stuff WRITEREG ERXFCON,a0,d0 ;set filter
moveq #1,d0 moveq #1,d0
.rts: .rts:
+2
View File
@@ -545,6 +545,8 @@ void myhw_ControlIntervalTimer( DEVBASEP )
flag = -1; /* stop timer */ flag = -1; /* stop timer */
else flag = 0; /* no change */ else flag = 0; /* no change */
} }
if( hwd->timervalue < 1000 )
flag = -1;
if( flag > 0 ) if( flag > 0 )
StartIntervalTimer( &hwd->ivtimer, hwd->timervalue ); StartIntervalTimer( &hwd->ivtimer, hwd->timervalue );
@@ -11,6 +11,7 @@
#define _INC_HWPRIVATE_H #define _INC_HWPRIVATE_H
#include "compiler.h" #include "compiler.h"
#include <libraries/configvars.h>
/* sdnet/v2expnet specific: polling timer */ /* sdnet/v2expnet specific: polling timer */
#include "intervaltimer.h" #include "intervaltimer.h"
+9
View File
@@ -4,6 +4,8 @@
;include exec/exec_lib.i ;include exec/exec_lib.i
endc endc
include exec/execbase.i include exec/execbase.i
include device.i
ifnd _LVORawDoFmt ifnd _LVORawDoFmt
_LVORawDoFmt equ -$20a _LVORawDoFmt equ -$20a
@@ -42,4 +44,11 @@ _KPrintF:
rts rts
;DEBUG
dc.l $deadbeef
dc.l sds_SIZEOF
dc.l sv_SIZEOF
dc.l du_SIZEOF
dc.l db_SIZEOF
+39 -20
View File
@@ -41,6 +41,12 @@ static LONG server_queryext( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq );
/* this limits the number of processed read requests per run when enabled */ /* this limits the number of processed read requests per run when enabled */
#define ONE_READ_REQ 2 #define ONE_READ_REQ 2
/* heavy debug on read/write */
#define D2(x)
#define D4(x)
/* #define D2(x) D(x) */
/* #define D4(x) D(x) */
/* (avoid external link libraries) this call is not time critical */ /* (avoid external link libraries) this call is not time critical */
@@ -88,11 +94,12 @@ static void server_Offline_CancelRequests( DEVBASEP , ULONG unit )
type = GetSucc( type ); type = GetSucc( type );
} }
server_AbortList( db, (struct List*)&db->db_Units[unit].du_WriteQueue );
server_AbortList( db, (struct List*)&db->db_Units[unit].du_EventQueue ); server_AbortList( db, (struct List*)&db->db_Units[unit].du_EventQueue );
server_AbortList( db, (struct List*)&db->db_Units[unit].du_ReadOrphans ); server_AbortList( db, (struct List*)&db->db_Units[unit].du_ReadOrphans );
ReleaseSemaphore( &db->db_Units[unit].du_Sem ); ReleaseSemaphore( &db->db_Units[unit].du_Sem );
ObtainSemaphore( &db->db_Units[unit].du_WrSem );
server_AbortList( db, (struct List*)&db->db_Units[unit].du_WriteQueue );
ReleaseSemaphore( &db->db_Units[unit].du_WrSem );
/* clear Multicast list, TODO: subroutine */ /* clear Multicast list, TODO: subroutine */
{ {
@@ -384,6 +391,15 @@ static LONG server_changeMulticast( DEVBASEP, ULONG unit, struct IOSana2Req *ior
COPYMAC( entry->mce_start, ioreq->ios2_SrcAddr ); COPYMAC( entry->mce_start, ioreq->ios2_SrcAddr );
COPYMAC( entry->mce_stop, ioreq->ios2_SrcAddr ); COPYMAC( entry->mce_stop, ioreq->ios2_SrcAddr );
D(("ADD Multicast MAC %02lx%02lx%02lx%02lx%02lx%02lx - %02lx%02lx%02lx%02lx%02lx%02lx\n",\
(ULONG)entry->mce_start[0],(ULONG)entry->mce_start[1],\
(ULONG)entry->mce_start[2],(ULONG)entry->mce_start[3],\
(ULONG)entry->mce_start[4],(ULONG)entry->mce_start[5],\
(ULONG)entry->mce_stop[0],(ULONG)entry->mce_stop[1],\
(ULONG)entry->mce_stop[2],(ULONG)entry->mce_stop[3],\
(ULONG)entry->mce_stop[4],(ULONG)entry->mce_stop[5] \
));
ADDTAIL( &db->db_svdat.sv_mclist, entry ); ADDTAIL( &db->db_svdat.sv_mclist, entry );
apply: apply:
@@ -605,6 +621,8 @@ static LONG server_queryext( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq )
} }
s2qep->Actual = lastidx; s2qep->Actual = lastidx;
} }
#else
#warning "Building server.c without S2_DevQueryExtGetMII"
#endif #endif
#ifdef S2_DevQueryExtSetMII #ifdef S2_DevQueryExtSetMII
tval = GetTagData( S2_DevQueryExtSetMII, 0, tlist ); tval = GetTagData( S2_DevQueryExtSetMII, 0, tlist );
@@ -705,7 +723,8 @@ LONG server_writeerror( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq, LONG cod
HW_DMA_TX is defined by the Makefile. One of the chunks HW_DMA_TX is defined by the Makefile. One of the chunks
is the constant-size header (14 Bytes) and the other is the payload. is the constant-size header (14 Bytes) and the other is the payload.
*/ */
static LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq ) //static
LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq )
{ {
LONG ret;/* = SERR_OK;*/ LONG ret;/* = SERR_OK;*/
UBYTE *copy_ptr,*frame; UBYTE *copy_ptr,*frame;
@@ -715,7 +734,7 @@ static LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq )
UBYTE *header_ptr; UBYTE *header_ptr;
#endif #endif
D(("write: type %08lx, size %ld\n",ioreq->ios2_PacketType, D2(("write: type %08lx, size %ld\n",ioreq->ios2_PacketType,
ioreq->ios2_DataLength)); ioreq->ios2_DataLength));
frame = db->db_svdat.sv_frame; frame = db->db_svdat.sv_frame;
@@ -765,13 +784,13 @@ static LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq )
if( (*dbm->dbm_CopyFromBuffer32)(copy_ptr,ioreq->ios2_Data, ioreq->ios2_DataLength) ) if( (*dbm->dbm_CopyFromBuffer32)(copy_ptr,ioreq->ios2_Data, ioreq->ios2_DataLength) )
{ {
send: send:
D(("+hw_send\n")); D2(("+hw_send\n"));
#ifdef HW_DMA_TX #ifdef HW_DMA_TX
ret = hw_send_frame(db, unit, copy_ptr, framesize, header_ptr ) ? SERR_OK:SERR_ERROR; ret = hw_send_frame(db, unit, copy_ptr, framesize, header_ptr ) ? SERR_OK:SERR_ERROR;
#else #else
ret = hw_send_frame(db, unit, frame, framesize ) ? SERR_OK : SERR_ERROR; ret = hw_send_frame(db, unit, frame, framesize ) ? SERR_OK : SERR_ERROR;
#endif #endif
D(("-hw_send\n")); D2(("-hw_send\n"));
} }
else else
{ {
@@ -799,7 +818,7 @@ static LONG server_writequeue( DEVBASEP, ULONG unit )
#endif #endif
struct IOSana2Req *ioreq,*nextio; struct IOSana2Req *ioreq,*nextio;
ObtainSemaphore( &db->db_Units[unit].du_Sem ); ObtainSemaphore( &db->db_Units[unit].du_WrSem );
#if 1 #if 1
/* whole queue per call */ /* whole queue per call */
@@ -831,8 +850,8 @@ static LONG server_writequeue( DEVBASEP, ULONG unit )
type = GetSucc( type ); type = GetSucc( type );
} }
} }
db->db_Units[unit].du_DevStats.PacketsSent++; db->db_Units[unit].du_DevStats.PacketsSent++;
ioreq->ios2_Req.io_Error = S2ERR_NO_ERROR; ioreq->ios2_Req.io_Error = S2ERR_NO_ERROR;
ioreq->ios2_WireError = S2WERR_GENERIC_ERROR; ioreq->ios2_WireError = S2WERR_GENERIC_ERROR;
REMOVE( (struct Node*)ioreq ); REMOVE( (struct Node*)ioreq );
@@ -854,7 +873,7 @@ static LONG server_writequeue( DEVBASEP, ULONG unit )
#endif #endif
} }
ReleaseSemaphore( &db->db_Units[unit].du_Sem ); ReleaseSemaphore( &db->db_Units[unit].du_WrSem );
return SERR_OK; return SERR_OK;
} }
@@ -892,14 +911,14 @@ static void server_read_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq, U
{ {
frame += 14; /* skip DST,SRC,Type */ frame += 14; /* skip DST,SRC,Type */
framesize -= 18; /* also remove CRC */ framesize -= 18; /* also remove CRC */
D(("plain mode: frame flags %ld\n",bcflag)); D4(("plain mode: frame flags %ld\n",bcflag));
} }
ioreq->ios2_Req.io_Flags &= SANA2IOF_RAW; /* ignore all other flags */ ioreq->ios2_Req.io_Flags &= SANA2IOF_RAW; /* ignore all other flags */
ioreq->ios2_Req.io_Flags |= bcflag; ioreq->ios2_Req.io_Flags |= bcflag;
ioreq->ios2_Req.io_Error = 0; ioreq->ios2_Req.io_Error = 0;
ioreq->ios2_WireError = 0; ioreq->ios2_WireError = 0;
D(("ReadFrm IO %lx, DBM %lx frm %lx frmsz %ld\n",(ULONG)ioreq,(ULONG)dbm,(ULONG)frame,framesize)); D4(("ReadFrm IO %lx, DBM %lx frm %lx frmsz %ld\n",(ULONG)ioreq,(ULONG)dbm,(ULONG)frame,framesize));
if( dbm->dbm_PacketFilter ) /* Filter Packets ? */ if( dbm->dbm_PacketFilter ) /* Filter Packets ? */
{ {
@@ -918,7 +937,7 @@ static void server_read_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq, U
ioreq->ios2_WireError = S2WERR_BUFF_ERROR; ioreq->ios2_WireError = S2WERR_BUFF_ERROR;
} }
} }
D(("Copied io_Error %ld\n",(LONG)ioreq->ios2_Req.io_Error)); D4(("Copied io_Error %ld\n",(LONG)ioreq->ios2_Req.io_Error));
Remove( (struct Node*)ioreq ); Remove( (struct Node*)ioreq );
svTermIO( db, ioreq ); svTermIO( db, ioreq );
@@ -946,7 +965,7 @@ static LONG server_readqueue( DEVBASEP, ULONG unit )
/* TODO: devstats */ /* TODO: devstats */
frametype = *( (USHORT*)(frame+12) ); frametype = *( (USHORT*)(frame+12) );
D(("Have Frame size %ld type %ld\n",framesize,frametype)); D4(("Have Frame size %ld type %ld\n",framesize,frametype));
ObtainSemaphore( &db->db_Units[unit].du_Sem ); ObtainSemaphore( &db->db_Units[unit].du_Sem );
@@ -960,18 +979,18 @@ static LONG server_readqueue( DEVBASEP, ULONG unit )
/* desired type not found, get orphan list */ /* desired type not found, get orphan list */
db->db_Units[unit].du_DevStats.UnknownTypesReceived++; db->db_Units[unit].du_DevStats.UnknownTypesReceived++;
orphan: /*orphan:*/
ioreq = (struct IOSana2Req *)GetHead( (struct List*)&db->db_Units[unit].du_ReadOrphans ); ioreq = (struct IOSana2Req *)GetHead( (struct List*)&db->db_Units[unit].du_ReadOrphans );
if( ioreq ) if( ioreq )
{ {
D(("Orphaned Frame\n")); D4(("Orphaned Frame\n"));
ioreq->ios2_PacketType = frametype; ioreq->ios2_PacketType = frametype;
server_read_frame( db, unit, ioreq, frame, framesize ); server_read_frame( db, unit, ioreq, frame, framesize );
} }
else else
{ {
D(("No ioreq for orphaned frame\n")); D4(("No ioreq for orphaned frame\n"));
} }
goto nextframe; goto nextframe;
@@ -1005,8 +1024,8 @@ havetype:
{ {
db->db_Units[unit].du_DevStats.Overruns++; db->db_Units[unit].du_DevStats.Overruns++;
type->srt_Sana2PacketTypeStats.PacketsDropped++; type->srt_Sana2PacketTypeStats.PacketsDropped++;
D(("No Reader for frame\n")); D4(("No Reader for frame\n"));
goto orphan; /* does it help if we give the frame to the orphan list? */ /* goto orphan; */ /* does it help if we give the frame to the orphan list? */
} }
nextframe: nextframe:
ReleaseSemaphore( &db->db_Units[unit].du_Sem ); ReleaseSemaphore( &db->db_Units[unit].du_Sem );
@@ -1094,9 +1113,9 @@ VOID SAVEDS ServerTask(void)
} }
if( hw_recv_pending(db,i) ) if( hw_recv_pending(db,i) )
{ {
D(("Read on unit %ld start\n",i)); D4(("Read on unit %ld start\n",i));
server_readqueue( db, i ); server_readqueue( db, i );
D(("Read on unit %ld stop\n",i)); D4(("Read on unit %ld stop\n",i));
action = 1; action = 1;
} }
} }
+2 -1
View File
@@ -39,7 +39,8 @@ LONG server_writeerror( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq, LONG cod
#ifdef EXTERNAL_WRITE_FRAME #ifdef EXTERNAL_WRITE_FRAME
LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq ); LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq );
#else #else
static LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq ); //static
LONG write_frame( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq );
#endif #endif
static LONG server_writequeue( DEVBASETYPE*, ULONG ); static LONG server_writequeue( DEVBASETYPE*, ULONG );
+2 -2
View File
@@ -9,9 +9,9 @@
#define _INC_VERSION_H #define _INC_VERSION_H
#define DEVICEVERSION 2 #define DEVICEVERSION 2
#define DEVICEREVISION 2 #define DEVICEREVISION 4
#define DEVICEEXTRA #define DEVICEEXTRA
/* #define DEVICEEXTRA Beta */ /* #define DEVICEEXTRA Beta */
#define DEVICEDATE 10.03.2019 #define DEVICEDATE 27.05.2019
#endif #endif
+10 -5
View File
@@ -58,7 +58,8 @@ entity LAN_IDE_CP is
DS1 : in STD_LOGIC; DS1 : in STD_LOGIC;
FCS : in STD_LOGIC; FCS : in STD_LOGIC;
RESET : in STD_LOGIC; RESET : in STD_LOGIC;
INT_OUT : out STD_LOGIC; INT2_OUT : out STD_LOGIC;
INT6_OUT : out STD_LOGIC;
AUTOBOOT_OFF : in STD_LOGIC; AUTOBOOT_OFF : in STD_LOGIC;
ROM_B : out STD_LOGIC_VECTOR (1 downto 0); ROM_B : out STD_LOGIC_VECTOR (1 downto 0);
ROM_OE : out STD_LOGIC; ROM_OE : out STD_LOGIC;
@@ -68,7 +69,7 @@ entity LAN_IDE_CP is
IDE_R : out STD_LOGIC; IDE_R : out STD_LOGIC;
IDE_A : out STD_LOGIC_VECTOR (2 downto 0); IDE_A : out STD_LOGIC_VECTOR (2 downto 0);
IDE_CS : out STD_LOGIC_VECTOR (1 downto 0); IDE_CS : out STD_LOGIC_VECTOR (1 downto 0);
LAN_CFG : out STD_LOGIC_VECTOR (4 downto 1); -- LAN_CFG : out STD_LOGIC_VECTOR (4 downto 1);
LAN_RD : out STD_LOGIC; LAN_RD : out STD_LOGIC;
LAN_CS : out STD_LOGIC; LAN_CS : out STD_LOGIC;
LAN_WRH : out STD_LOGIC; LAN_WRH : out STD_LOGIC;
@@ -423,7 +424,7 @@ begin
LAN_WRL <= LAN_WRL_S when AS='0' and reset = '1' else LAN_WR_RST; LAN_WRL <= LAN_WRL_S when AS='0' and reset = '1' else LAN_WR_RST;
LAN_WRH <= LAN_WRH_S when AS='0' and reset = '1' else LAN_WR_RST; LAN_WRH <= LAN_WRH_S when AS='0' and reset = '1' else LAN_WR_RST;
LAN_RD <= LAN_RD_S when AS='0' and reset = '1' else '0'; LAN_RD <= LAN_RD_S when AS='0' and reset = '1' else '0';
LAN_CFG <= "0010"; -- "ZZZZ"; -- LAN_CFG <= "0010"; -- "ZZZZ";
CP_WE <= CP_WE_S when AS='0' and CP_WE_QUIRK ='1' else '1'; CP_WE <= CP_WE_S when AS='0' and CP_WE_QUIRK ='1' else '1';
CP_RD <= CP_RD_S when AS='0' else '1'; CP_RD <= CP_RD_S when AS='0' else '1';
@@ -470,11 +471,15 @@ begin
ROM_OE <= ROM_OE_S when AS='0' and AUTOBOOT_OFF = '0' else '1'; ROM_OE <= ROM_OE_S when AS='0' and AUTOBOOT_OFF = '0' else '1';
-- INT_OUT <= 'Z'; -- INT_OUT <= 'Z';
INT_OUT <= '0' when INT2_OUT <= '0' when
(LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1') (LAN_IRQ_OUT = '0' and LAN_INT_ENABLE = '1')
or CP_IRQ = '0'
else 'Z'; else 'Z';
INT6_OUT <= '0' when
CP_IRQ = '0'
else 'Z';
OWN <= 'Z';--'0' when AS='0' and (autoconfig = '1' or ide = '1' or lan_adr = '1' or cp = '1') else 'Z'; OWN <= 'Z';--'0' when AS='0' and (autoconfig = '1' or ide = '1' or lan_adr = '1' or cp = '1') else 'Z';
SLAVE <= '0' when AS='0' and (autoconfig = '1' or ide = '1' or lan_adr = '1' or cp = '1') else '1'; SLAVE <= '0' when AS='0' and (autoconfig = '1' or ide = '1' or lan_adr = '1' or cp = '1') else '1';
CFOUT <= '0' when AUTO_CONFIG_DONE=3 else '1'; CFOUT <= '0' when AUTO_CONFIG_DONE=3 else '1';