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MHeinrichs
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/*********************************************************************
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*
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* Hardware specific definitions for PIC32 Starter Kit (GP or USB) +
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* PIC32 I/O Expansion Board + Ethernet PICtail Plus (ENC28J60) or
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* Fast 100Mbps Ethernet PICtail Plus (ENC624J600)
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*
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*********************************************************************
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* FileName: HardwareProfile.h
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* Dependencies: None
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* Processor: PIC32
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* Compiler: Microchip C32 v1.05 or higher
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* Company: Microchip Technology, Inc.
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*
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* Software License Agreement
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*
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* Copyright (C) 2002-2009 Microchip Technology Inc. All rights
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* reserved.
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*
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* Microchip licenses to you the right to use, modify, copy, and
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* distribute:
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* (i) the Software when embedded on a Microchip microcontroller or
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* digital signal controller product ("Device") which is
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* integrated into Licensee's product; or
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* (ii) ONLY the Software driver source files ENC28J60.c, ENC28J60.h,
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* ENCX24J600.c and ENCX24J600.h ported to a non-Microchip device
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* used in conjunction with a Microchip ethernet controller for
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* the sole purpose of interfacing with the ethernet controller.
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*
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* You should refer to the license agreement accompanying this
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* Software for additional information regarding your rights and
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* obligations.
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*
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* THE SOFTWARE AND DOCUMENTATION ARE PROVIDED "AS IS" WITHOUT
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* WARRANTY OF ANY KIND, EITHER EXPRESS OR IMPLIED, INCLUDING WITHOUT
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* LIMITATION, ANY WARRANTY OF MERCHANTABILITY, FITNESS FOR A
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* PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* MICROCHIP BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT OR
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* CONSEQUENTIAL DAMAGES, LOST PROFITS OR LOST DATA, COST OF
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* PROCUREMENT OF SUBSTITUTE GOODS, TECHNOLOGY OR SERVICES, ANY CLAIMS
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* BY THIRD PARTIES (INCLUDING BUT NOT LIMITED TO ANY DEFENSE
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* THEREOF), ANY CLAIMS FOR INDEMNITY OR CONTRIBUTION, OR OTHER
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* SIMILAR COSTS, WHETHER ASSERTED ON THE BASIS OF CONTRACT, TORT
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* (INCLUDING NEGLIGENCE), BREACH OF WARRANTY, OR OTHERWISE.
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*
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*
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* Author Date Comment
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*~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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* Aseem swalah 02/03/09 Copied from the TCPIP Demo App
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********************************************************************/
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#ifndef __HARDWARE_PROFILE_H
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#define __HARDWARE_PROFILE_H
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#include "GenericTypeDefs.h"
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#include "Compiler.h"
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// Set configuration fuses (but only once)
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#if defined(THIS_IS_STACK_APPLICATION)
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#pragma config FPLLODIV = DIV_1, FPLLMUL = MUL_20, FPLLIDIV = DIV_2, FWDTEN = OFF, FPBDIV = DIV_1, POSCMOD = XT, FNOSC = PRIPLL, CP = OFF
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#endif
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// Clock frequency value.
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// This value is used to calculate Tick Counter value
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#define GetSystemClock() (80000000ul) // Hz
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#define GetInstructionClock() (GetSystemClock()/1)
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#define GetPeripheralClock() (GetInstructionClock()/1) // Set your divider according to your Peripheral Bus Frequency configuration fuse setting
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// Specify which SPI to use for the ENC624J600.
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#define ENC_IN_SPI2
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// Hardware mappings
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#define LED0_TRIS (TRISDbits.TRISD0) // Ref LED1
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#define LED0_IO (LATDbits.LATD0)
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#define LED1_TRIS (TRISDbits.TRISD1) // Ref LED2
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#define LED1_IO (LATDbits.LATD1)
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#define LED2_TRIS (TRISDbits.TRISD2) // Ref LED3
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#define LED2_IO (LATDbits.LATD2)
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#define LED3_TRIS (LED2_TRIS) // No such LED
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#define LED3_IO (LATDbits.LATD6)
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#define LED4_TRIS (LED2_TRIS) // No such LED
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#define LED4_IO (LATDbits.LATD6)
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#define LED5_TRIS (LED2_TRIS) // No such LED
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#define LED5_IO (LATDbits.LATD6)
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#define LED6_TRIS (LED2_TRIS) // No such LED
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#define LED6_IO (LATDbits.LATD6)
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#define LED7_TRIS (LED2_TRIS) // No such LED
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#define LED7_IO (LATDbits.LATD6)
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#define LED_GET() ((BYTE)LATD & 0x07)
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#define LED_PUT(a) do{LATD = (LATD & 0xFFF8) | ((a)&0x07);}while(0)
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#define BUTTON0_TRIS (TRISDbits.TRISD6) // Ref SW1
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#define BUTTON0_IO (PORTDbits.RD6)
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#define BUTTON1_TRIS (TRISDbits.TRISD7) // Ref SW2
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#define BUTTON1_IO (PORTDbits.RD7)
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#define BUTTON2_TRIS (TRISDbits.TRISD13) // Ref SW3
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#define BUTTON2_IO (PORTDbits.RD13)
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#define BUTTON3_TRIS (TRISDbits.TRISD13) // No BUTTON3 on this board
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#define BUTTON3_IO (1)
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// ENC624J600 Interface Configuration
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// Comment out ENC100_INTERFACE_MODE if you don't have an ENC624J600 or
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// ENC424J600. Otherwise, choose the correct setting for the interface you
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// are using. Legal values are:
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// - Commented out: No ENC424J600/624J600 present or used. All other
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// ENC100_* macros are ignored.
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// - 0: SPI mode using CS, SCK, SI, and SO pins
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// - 1: 8-bit demultiplexed PSP Mode 1 with RD and WR pins
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// - 2: 8-bit demultiplexed PSP Mode 2 with R/Wbar and EN pins
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// - 3: 16-bit demultiplexed PSP Mode 3 with RD, WRL, and WRH pins
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// - 4: 16-bit demultiplexed PSP Mode 4 with R/Wbar, B0SEL, and B1SEL pins
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// - 5: 8-bit multiplexed PSP Mode 5 with RD and WR pins
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// - 6: 8-bit multiplexed PSP Mode 6 with R/Wbar and EN pins
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// - 9: 16-bit multiplexed PSP Mode 9 with AL, RD, WRL, and WRH pins
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// - 10: 16-bit multiplexed PSP Mode 10 with AL, R/Wbar, B0SEL, and B1SEL
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// pins
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#define ENC100_INTERFACE_MODE 3
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// If using a parallel interface, direct RAM addressing can be used (if all
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// addresses wires are connected), or a reduced number of pins can be used
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// for indirect addressing. If using an SPI interface or PSP Mode 9 or 10
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// (multiplexed 16-bit modes), which require all address lines to always be
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// connected, then this option is ignored. Comment out or uncomment this
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// macro to match your hardware connections.
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#define ENC100_PSP_USE_INDIRECT_RAM_ADDRESSING
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// ENC424J600/624J600 parallel indirect address remapping macro function.
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// This section translates SFR and RAM addresses presented to the
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// ReadMemory() and WriteMemory() APIs in ENCX24J600.c to the actual
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// addresses that must be presented on the parallel interface. This macro
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// must be modified to match your hardware if you are using an indirect PSP
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// addressing mode (ENC100_PSP_USE_INDIRECT_RAM_ADDRESSING is defined) and
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// have some of your address lines tied off to Vdd. If you are using the
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// SPI interface, then this section can be ignored or deleted.
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#if (ENC100_INTERFACE_MODE == 1) || (ENC100_INTERFACE_MODE == 2) || (ENC100_INTERFACE_MODE == 5) || (ENC100_INTERFACE_MODE == 6) // 8-bit PSP
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#define ENC100_TRANSLATE_TO_PIN_ADDR(a) ((((a)&0x0100)<<6) | ((a)&0x00FF))
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#elif (ENC100_INTERFACE_MODE == 3) || (ENC100_INTERFACE_MODE == 4) // 16-bit PSP
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#define ENC100_TRANSLATE_TO_PIN_ADDR(a) (a)
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#endif
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// Auto-crossover pins on Fast 100Mbps Ethernet PICtail/PICtail Plus. If
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// your circuit doesn't have such a feature, delete these two defines.
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#define ENC100_MDIX_TRIS (TRISBbits.TRISB3)
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#define ENC100_MDIX_IO (LATBbits.LATB3)
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// ENC624J600 I/O control and status pins
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// If a pin is not required for your selected ENC100_INTERFACE_MODE
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// interface selection (ex: WRH/B1SEL for PSP modes 1, 2, 5, and 6), then
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// you can ignore, delete, or put anything for the pin definition. Also,
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// the INT and POR pins are entirely optional. If not connected, comment
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// them out.
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#define ENC100_INT_TRIS (TRISEbits.TRISE9) // INT signal is optional and currently unused in the Microchip TCP/IP Stack. Leave this pin disconnected and comment out this pin definition if you don't want it.
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#define ENC100_INT_IO (PORTEbits.RE9)
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#if (ENC100_INTERFACE_MODE >= 1) // Parallel mode
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// PSP control signal pinout
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#define ENC100_CS_TRIS (TRISAbits.TRISA5) // CS is optional in PSP mode. If you are not sharing the parallel bus with another device, tie CS to Vdd and comment out this pin definition.
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#define ENC100_CS_IO (LATAbits.LATA5)
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#define ENC100_POR_TRIS (TRISCbits.TRISC1) // POR signal is optional. If your application doesn't have a power disconnect feature, comment out this pin definition.
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#define ENC100_POR_IO (LATCbits.LATC1)
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#define ENC100_SO_WR_B0SEL_EN_TRIS (TRISDbits.TRISD4)
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#define ENC100_SO_WR_B0SEL_EN_IO (LATDbits.LATD4)
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#define ENC100_SI_RD_RW_TRIS (TRISDbits.TRISD5)
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#define ENC100_SI_RD_RW_IO (LATDbits.LATD5)
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#define ENC100_SCK_AL_TRIS (TRISBbits.TRISB15)
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#define ENC100_SCK_AL_IO (LATBbits.LATB15)
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#else
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// SPI pinout
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#if defined ENC_IN_SPI1
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#define ENC100_CS_TRIS (TRISDbits.TRISD14) // CS is mandatory when using the SPI interface
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#define ENC100_CS_IO (LATDbits.LATD14)
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#define ENC100_POR_TRIS (TRISDbits.TRISD15) // POR signal is optional. If your application doesn't have a power disconnect feature, comment out this pin definition.
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#define ENC100_POR_IO (LATDbits.LATD15)
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#define ENC100_SO_WR_B0SEL_EN_TRIS (TRISFbits.TRISF7) // SO is ENCX24J600 Serial Out, which needs to connect to the PIC SDI pin for SPI mode
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#define ENC100_SO_WR_B0SEL_EN_IO (PORTFbits.RF7)
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#define ENC100_SI_RD_RW_TRIS (TRISFbits.TRISF8) // SI is ENCX24J600 Serial In, which needs to connect to the PIC SDO pin for SPI mode
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#define ENC100_SI_RD_RW_IO (LATFbits.LATF8)
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#define ENC100_SCK_AL_TRIS (TRISFbits.TRISF6)
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#elif defined ENC_IN_SPI2
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#define ENC100_CS_TRIS (TRISFbits.TRISF12)
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#define ENC100_CS_IO (LATFbits.LATF12)
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#define ENC100_POR_TRIS (TRISFbits.TRISF13)
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#define ENC100_POR_IO (LATFbits.LATF13)
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#define ENC100_SO_WR_B0SEL_EN_TRIS (TRISGbits.TRISG7) // NOTE: SO is ENC624J600 Serial Out, which needs to connect to the PIC SDI pin for SPI mode
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#define ENC100_SO_WR_B0SEL_EN_IO (PORTGbits.RG7)
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#define ENC100_SI_RD_RW_TRIS (TRISGbits.TRISG8) // NOTE: SI is ENC624J600 Serial In, which needs to connect to the PIC SDO pin for SPI mode
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#define ENC100_SI_RD_RW_IO (LATGbits.LATG8)
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#define ENC100_SCK_AL_TRIS (TRISGbits.TRISG6)
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#define ENC100_SCK_AL_IO (PORTGbits.RG6) // NOTE: This must be the PORT, not the LATch like it is for the PSP interface.
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#endif
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#endif
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// ENC624J600 SPI SFR register selection (controls which SPI peripheral to
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// use on PICs with multiple SPI peripherals). If a parallel interface is
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// used (ENC100_INTERFACE_MODE is >= 1), then the SPI is not used and this
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// section can be ignored or deleted.
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#if defined ENC_IN_SPI1
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#define ENC100_ISR_ENABLE (IEC0bits.INT2IE)
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#define ENC100_ISR_FLAG (IFS0bits.INT2IF)
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#define ENC100_ISR_POLARITY (INTCONbits.INT2EP)
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#define ENC100_ISR_PRIORITY (IPC2bits.INT2IP)
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#define ENC100_SPI_ENABLE (ENC100_SPICON1bits.ON)
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#define ENC100_SPI_IF (IFS0bits.SPI1RXIF)
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#define ENC100_SSPBUF (SPI1BUF)
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#define ENC100_SPICON1 (SPI1CON)
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#define ENC100_SPISTATbits (SPI1STATbits)
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#define ENC100_SPICON1bits (SPI1CONbits)
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#define ENC100_SPIBRG (SPI1BRG)
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#elif defined ENC_IN_SPI2
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#define ENC100_ISR_ENABLE (IEC0bits.INT4IE)
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#define ENC100_ISR_FLAG (IFS0bits.INT4IF)
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#define ENC100_ISR_POLARITY (INTCONbits.INT4EP)
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#define ENC100_ISR_PRIORITY (IPC2bits.INT4IP)
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#define ENC100_SPI_ENABLE (ENC100_SPICON1bits.ON)
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#define ENC100_SPI_IF (IFS1bits.SPI2RXIF)
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#define ENC100_SSPBUF (SPI2BUF)
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#define ENC100_SPICON1 (SPI2CON)
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#define ENC100_SPISTATbits (SPI2STATbits)
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#define ENC100_SPICON1bits (SPI2CONbits)
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#define ENC100_SPIBRG (SPI2BRG)
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#endif
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#endif //__HARDWARE_PROFILE_H
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