ac working
This commit is contained in:
Binary file not shown.
@@ -48,22 +48,23 @@ int SoftReset(APTR *BaseAddress){
|
|||||||
// initialized correctly, I/O pins aren't connected or are
|
// initialized correctly, I/O pins aren't connected or are
|
||||||
// shorted to something, power isn't available, etc.)
|
// shorted to something, power isn't available, etc.)
|
||||||
w= 0x1234;
|
w= 0x1234;
|
||||||
//do
|
do
|
||||||
//{
|
{
|
||||||
WRITEREG(BaseAddress,EUDAST, w);
|
WRITEREG(BaseAddress,EUDAST, w);
|
||||||
v=READREG(BaseAddress, EUDAST);
|
v=READREG(BaseAddress, EUDAST);
|
||||||
printf("Read 0x%x at register 0x%x (should be 0x%x)\n",v,EUDAST,w);
|
printf("Read 0x%x at register 0x%x (should be 0x%x)\n",v,EUDAST,w);
|
||||||
//} while(v != w);
|
} while(v != w);
|
||||||
|
|
||||||
// Issue a reset and wait for it to complete
|
// Issue a reset and wait for it to complete
|
||||||
SETREG(BaseAddress,ECON2, ECON2_ETHRST);
|
SETREG(BaseAddress,ECON2, ECON2_ETHRST);
|
||||||
|
w = (WORD)(ESTAT_CLKRDY | ESTAT_RSTDONE | ESTAT_PHYRDY);
|
||||||
do{
|
do{
|
||||||
|
|
||||||
delayCIA();
|
delayCIA();
|
||||||
v = READREG(BaseAddress,ESTAT);
|
v = READREG(BaseAddress,ESTAT);
|
||||||
printf("Read 0x%x at register 0x%x\n",v,ESTAT);
|
printf("Read 0x%x at register 0x%x\n",v,ESTAT);
|
||||||
|
|
||||||
}while((v & (ESTAT_CLKRDY | ESTAT_RSTDONE | ESTAT_PHYRDY)) != (ESTAT_CLKRDY | ESTAT_RSTDONE | ESTAT_PHYRDY));
|
}while((v & w) != w);
|
||||||
|
|
||||||
// Check to see if the reset operation was successful by
|
// Check to see if the reset operation was successful by
|
||||||
// checking if EUDAST went back to its reset default. This test
|
// checking if EUDAST went back to its reset default. This test
|
||||||
@@ -106,7 +107,7 @@ int SoftReset(APTR *BaseAddress){
|
|||||||
// it means you have a hardware failure. Check all of your PSP
|
// it means you have a hardware failure. Check all of your PSP
|
||||||
// address and data lines.
|
// address and data lines.
|
||||||
if(wTestWriteData != wTestReadData)
|
if(wTestWriteData != wTestReadData)
|
||||||
printf("Error checking memory at adress %lx! Expected $x - got %x\n",(BaseAddress+w),wTestWriteData,wTestReadData);
|
printf("Error checking memory at adress %lx! Expected %x - got %x\n",(BaseAddress+w),wTestWriteData,wTestReadData);
|
||||||
|
|
||||||
}
|
}
|
||||||
return v;
|
return v;
|
||||||
|
|||||||
Binary file not shown.
@@ -21,8 +21,99 @@
|
|||||||
|
|
||||||
<sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="LAN_IDE.xise"/>
|
<sourceproject xmlns="http://www.xilinx.com/XMLSchema" xil_pn:fileType="FILE_XISE" xil_pn:name="LAN_IDE.xise"/>
|
||||||
|
|
||||||
<files xmlns="http://www.xilinx.com/XMLSchema"/>
|
<files xmlns="http://www.xilinx.com/XMLSchema">
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGDBUILD_LOG" xil_pn:name="LAN_IDE_CP.bld"/>
|
||||||
|
<file xil_pn:fileType="FILE_CMD_LOG" xil_pn:name="LAN_IDE_CP.cmd_log"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_GYD" xil_pn:name="LAN_IDE_CP.gyd"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_JEDEC" xil_pn:name="LAN_IDE_CP.jed"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_LSO" xil_pn:name="LAN_IDE_CP.lso"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_MFD" xil_pn:name="LAN_IDE_CP.mfd"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGA" xil_pn:name="LAN_IDE_CP.nga"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGC" xil_pn:name="LAN_IDE_CP.ngc"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGD" xil_pn:name="LAN_IDE_CP.ngd"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_NGR" xil_pn:name="LAN_IDE_CP.ngr"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_PNX" xil_pn:name="LAN_IDE_CP.pnx"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="LAN_IDE_CP.prj"/>
|
||||||
|
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.rpt"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_STX" xil_pn:name="LAN_IDE_CP.stx"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_REPORT" xil_pn:name="LAN_IDE_CP.syr"/>
|
||||||
|
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.tim"/>
|
||||||
|
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="LAN_IDE_CP.tspec"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_VM6" xil_pn:name="LAN_IDE_CP.vm6"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST" xil_pn:name="LAN_IDE_CP.xst"/>
|
||||||
|
<file xil_pn:fileType="FILE_HTML" xil_pn:name="LAN_IDE_CP_envsettings.html"/>
|
||||||
|
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="LAN_IDE_CP_html"/>
|
||||||
|
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="LAN_IDE_CP_ngdbuild.xrpt"/>
|
||||||
|
<file xil_pn:fileType="FILE_HTML" xil_pn:name="LAN_IDE_CP_summary.html"/>
|
||||||
|
<file xil_pn:branch="Implementation" xil_pn:fileType="FILE_XST_PROJECT" xil_pn:name="LAN_IDE_CP_vhdl.prj"/>
|
||||||
|
<file xil_pn:fileType="FILE_XRPT" xil_pn:name="LAN_IDE_CP_xst.xrpt"/>
|
||||||
|
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="_ngo"/>
|
||||||
|
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
|
||||||
|
<file xil_pn:fileType="FILE_XMSGS" xil_pn:name="_xmsgs/xst.xmsgs"/>
|
||||||
|
<file xil_pn:fileType="FILE_FITTER_REPORT" xil_pn:name="webtalk_pn.xml"/>
|
||||||
|
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xlnx_auto_0_xdb"/>
|
||||||
|
<file xil_pn:fileType="FILE_DIRECTORY" xil_pn:name="xst"/>
|
||||||
|
</files>
|
||||||
|
|
||||||
<transforms xmlns="http://www.xilinx.com/XMLSchema"/>
|
<transforms xmlns="http://www.xilinx.com/XMLSchema">
|
||||||
|
<transform xil_pn:end_ts="1483019733" xil_pn:in_ck="-2520376148396271922" xil_pn:name="TRANEXT_xstsynthesize_xc9500xl" xil_pn:prop_ck="573096660806012042" xil_pn:start_ts="1483019723">
|
||||||
|
<status xil_pn:value="SuccessfullyRun"/>
|
||||||
|
<status xil_pn:value="WarningsGenerated"/>
|
||||||
|
<status xil_pn:value="ReadyToRun"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP.lso"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP.ngc"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP.ngr"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP.prj"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP.stx"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP.syr"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP.xst"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP_vhdl.prj"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP_xst.xrpt"/>
|
||||||
|
<outfile xil_pn:name="_xmsgs/xst.xmsgs"/>
|
||||||
|
<outfile xil_pn:name="webtalk_pn.xml"/>
|
||||||
|
<outfile xil_pn:name="xst"/>
|
||||||
|
</transform>
|
||||||
|
<transform xil_pn:end_ts="1482962985" xil_pn:in_ck="176569500195729039" xil_pn:name="TRAN_compileBCD2" xil_pn:prop_ck="-8537920303570934858" xil_pn:start_ts="1482962985">
|
||||||
|
<status xil_pn:value="SuccessfullyRun"/>
|
||||||
|
<status xil_pn:value="ReadyToRun"/>
|
||||||
|
</transform>
|
||||||
|
<transform xil_pn:end_ts="1483019741" xil_pn:in_ck="-8547647177936735053" xil_pn:name="TRAN_ngdbuild" xil_pn:prop_ck="-1996509353111835880" xil_pn:start_ts="1483019733">
|
||||||
|
<status xil_pn:value="SuccessfullyRun"/>
|
||||||
|
<status xil_pn:value="WarningsGenerated"/>
|
||||||
|
<status xil_pn:value="ReadyToRun"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP.bld"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP.ngd"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP_ngdbuild.xrpt"/>
|
||||||
|
<outfile xil_pn:name="_ngo"/>
|
||||||
|
<outfile xil_pn:name="_xmsgs/ngdbuild.xmsgs"/>
|
||||||
|
</transform>
|
||||||
|
<transform xil_pn:end_ts="1483020229" xil_pn:in_ck="-2520376148396280667" xil_pn:name="TRANEXT_vm6File_xc9500xl" xil_pn:prop_ck="-7077186529500791345" xil_pn:start_ts="1483020213">
|
||||||
|
<status xil_pn:value="FailedRun"/>
|
||||||
|
<status xil_pn:value="WarningsGenerated"/>
|
||||||
|
<status xil_pn:value="ReadyToRun"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP.rpt"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP.tim"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP.tspec"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP_html"/>
|
||||||
|
</transform>
|
||||||
|
<transform xil_pn:end_ts="1482965860" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRANEXT_crtProg_xc9500" xil_pn:prop_ck="-6294026017969277533" xil_pn:start_ts="1482965858">
|
||||||
|
<status xil_pn:value="SuccessfullyRun"/>
|
||||||
|
<status xil_pn:value="ReadyToRun"/>
|
||||||
|
<status xil_pn:value="OutOfDateForInputs"/>
|
||||||
|
<status xil_pn:value="OutOfDateForPredecessor"/>
|
||||||
|
<status xil_pn:value="OutOfDateForOutputs"/>
|
||||||
|
<status xil_pn:value="InputChanged"/>
|
||||||
|
<status xil_pn:value="OutputChanged"/>
|
||||||
|
<outfile xil_pn:name="LAN_IDE_CP.jed"/>
|
||||||
|
</transform>
|
||||||
|
<transform xil_pn:end_ts="1482963012" xil_pn:in_ck="-2520376148396271803" xil_pn:name="TRAN_timRpt" xil_pn:prop_ck="111903974446" xil_pn:start_ts="1482963010">
|
||||||
|
<status xil_pn:value="AbortedRun"/>
|
||||||
|
<status xil_pn:value="WarningsGenerated"/>
|
||||||
|
<status xil_pn:value="ReadyToRun"/>
|
||||||
|
<status xil_pn:value="OutOfDateForInputs"/>
|
||||||
|
<status xil_pn:value="OutOfDateForPredecessor"/>
|
||||||
|
<status xil_pn:value="InputChanged"/>
|
||||||
|
</transform>
|
||||||
|
</transforms>
|
||||||
|
|
||||||
</generated_project>
|
</generated_project>
|
||||||
|
|||||||
@@ -40,7 +40,7 @@
|
|||||||
<property xil_pn:name="Case Implementation Style" xil_pn:value="None" xil_pn:valueState="default"/>
|
<property xil_pn:name="Case Implementation Style" xil_pn:value="None" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Clock Enable" xil_pn:value="true" xil_pn:valueState="default"/>
|
<property xil_pn:name="Clock Enable" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Collapsing Input Limit (2-54)" xil_pn:value="54" xil_pn:valueState="default"/>
|
<property xil_pn:name="Collapsing Input Limit (2-54)" xil_pn:value="54" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Collapsing Pterm Limit (1-90)" xil_pn:value="25" xil_pn:valueState="default"/>
|
<property xil_pn:name="Collapsing Pterm Limit (1-90)" xil_pn:value="10" xil_pn:valueState="non-default"/>
|
||||||
<property xil_pn:name="Compile CPLD Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
|
<property xil_pn:name="Compile CPLD Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Compile SIMPRIM (Timing) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
|
<property xil_pn:name="Compile SIMPRIM (Timing) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Compile UNISIM (Functional) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
|
<property xil_pn:name="Compile UNISIM (Functional) Simulation Library" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||||
@@ -96,7 +96,7 @@
|
|||||||
<property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
|
<property xil_pn:name="Launch SDK after Export" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
|
<property xil_pn:name="Library for Verilog Sources" xil_pn:value="" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/>
|
<property xil_pn:name="Load glbl" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Logic Optimization" xil_pn:value="Speed" xil_pn:valueState="default"/>
|
<property xil_pn:name="Logic Optimization" xil_pn:value="Density" xil_pn:valueState="non-default"/>
|
||||||
<property xil_pn:name="Macro Preserve" xil_pn:value="true" xil_pn:valueState="default"/>
|
<property xil_pn:name="Macro Preserve" xil_pn:value="true" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Macrocell Power Setting" xil_pn:value="Std" xil_pn:valueState="default"/>
|
<property xil_pn:name="Macrocell Power Setting" xil_pn:value="Std" xil_pn:valueState="default"/>
|
||||||
<property xil_pn:name="Manual Implementation Compile Order" xil_pn:value="false" xil_pn:valueState="default"/>
|
<property xil_pn:name="Manual Implementation Compile Order" xil_pn:value="false" xil_pn:valueState="default"/>
|
||||||
|
|||||||
@@ -68,3 +68,13 @@ xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/L
|
|||||||
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95144xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95144xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||||
cpldfit -intstyle ise -p xc95144xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
cpldfit -intstyle ise -p xc95144xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||||
XSLTProcess LAN_IDE_CP_build.xml
|
XSLTProcess LAN_IDE_CP_build.xml
|
||||||
|
xst -intstyle ise -ifn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.xst" -ofn "C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.syr"
|
||||||
|
ngdbuild -intstyle ise -dd _ngo -uc pinlist.ucf -p xc95144xl-TQ144-10 LAN_IDE_CP.ngc LAN_IDE_CP.ngd
|
||||||
|
cpldfit -intstyle ise -p xc95144xl-10-TQ144 -ofmt vhdl -optimize speed -htmlrpt -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||||
|
XSLTProcess LAN_IDE_CP_build.xml
|
||||||
|
cpldfit -intstyle ise -p xc95144xl-10-TQ144 -ofmt vhdl -optimize speed -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd -optimize density
|
||||||
|
cpldfit -intstyle ise -p xc95144xl-10-TQ144 -ofmt vhdl -optimize density -loc on -slew fast -init low -inputs 54 -pterms 25 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||||
|
cpldfit -intstyle ise -p xc95144xl-10-TQ144 -ofmt vhdl -optimize density -loc on -slew fast -init low -inputs 54 -pterms 15 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||||
|
cpldfit -intstyle ise -p xc95144xl-10-TQ144 -ofmt vhdl -optimize density -loc on -slew fast -init low -inputs 54 -pterms 10 -unused float -power std -terminate keeper LAN_IDE_CP.ngd
|
||||||
|
tsim -intstyle ise LAN_IDE_CP LAN_IDE_CP.nga
|
||||||
|
hprep6 -s IEEE1149 -n LAN_IDE_CP -i LAN_IDE_CP
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
Programmer Jedec Bit Map
|
Programmer Jedec Bit Map
|
||||||
Date Extracted: Wed Dec 28 23:59:28 2016
|
Date Extracted: Thu Dec 29 15:04:54 2016
|
||||||
|
|
||||||
QF93312*
|
QF93312*
|
||||||
QP144*
|
QP144*
|
||||||
@@ -164,7 +164,7 @@ L0001984 10000000 00000000 11110000 00000000 00000000 00000000 00000000 00000000
|
|||||||
L0002048 11100100 00000000 00010100 00010000 00000000 00000000 00000000 00000000*
|
L0002048 11100100 00000000 00010100 00010000 00000000 00000000 00000000 00000000*
|
||||||
L0002112 00001100 00000000 01000000 11100000 00000000 00000000 00000000 00000000*
|
L0002112 00001100 00000000 01000000 11100000 00000000 00000000 00000000 00000000*
|
||||||
L0002176 11101000 00000000 00011100 00000000 00001000 00000000 00000000 00000000*
|
L0002176 11101000 00000000 00011100 00000000 00001000 00000000 00000000 00000000*
|
||||||
L0002240 00001110 00000000 00011100 00000000 00000000 00000000 00000000 00000000*
|
L0002240 00001100 00000000 00011100 00000000 00000000 00000000 00000000 00000000*
|
||||||
L0002304 000011 000000 000011 000000 000000 000000 000000 000000*
|
L0002304 000011 000000 000011 000000 000000 000000 000000 000000*
|
||||||
L0002352 110000 000000 101000 000100 000000 000000 010000 000000*
|
L0002352 110000 000000 101000 000100 000000 000000 010000 000000*
|
||||||
L0002400 000010 000000 010000 011001 000000 000000 000000 000000*
|
L0002400 000010 000000 010000 011001 000000 000000 000000 000000*
|
||||||
@@ -463,7 +463,7 @@ L0019200 00000000 00000000 00000000 00000000 00000001 00000000 00000101 00000000
|
|||||||
L0019264 00000011 00000010 00000000 00000000 00001000 00000000 00000011 00000001*
|
L0019264 00000011 00000010 00000000 00000000 00001000 00000000 00000011 00000001*
|
||||||
L0019328 00000011 00000100 00000000 00000000 00000001 00000000 00000001 00000001*
|
L0019328 00000011 00000100 00000000 00000000 00000001 00000000 00000001 00000001*
|
||||||
L0019392 00000011 00000001 00000000 00000000 00000000 00000000 00010011 00000000*
|
L0019392 00000011 00000001 00000000 00000000 00000000 00000000 00010011 00000000*
|
||||||
L0019456 00000010 00000101 00000000 00000000 00000000 00000000 00000011 00000001*
|
L0019456 00000010 00000101 00000000 00000000 00000000 00000000 00000011 00000011*
|
||||||
L0019520 00000000 00000000 00000010 00000000 00000100 00000000 00000010 00000001*
|
L0019520 00000000 00000000 00000010 00000000 00000100 00000000 00000010 00000001*
|
||||||
L0019584 000000 000000 000000 000000 000000 000000 000000 000000*
|
L0019584 000000 000000 000000 000000 000000 000000 000000 000000*
|
||||||
L0019632 000000 000000 000000 000000 000000 000000 000000 000000*
|
L0019632 000000 000000 000000 000000 000000 000000 000000 000000*
|
||||||
|
|||||||
@@ -1305,7 +1305,7 @@ OUTPUTMC | 42 | 4 | 0 | 0 | 17 | 2 | 17 | 2 | 15 | 6 | 2 | 4 | 14 | 6 | 0 | 0 |
|
|||||||
INPUTS | 2 | C1 | C3
|
INPUTS | 2 | C1 | C3
|
||||||
INPUTP | 2 | 115 | 114
|
INPUTP | 2 | 115 | 114
|
||||||
EQ | 2 |
|
EQ | 2 |
|
||||||
lan/lan_CLKF = C1
|
!lan/lan_CLKF = C1
|
||||||
$ C3;
|
$ C3;
|
||||||
|
|
||||||
MACROCELL | 7 | 3 | autoconfig/autoconfig_RSTF
|
MACROCELL | 7 | 3 | autoconfig/autoconfig_RSTF
|
||||||
|
|||||||
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
File diff suppressed because one or more lines are too long
@@ -1,7 +1,7 @@
|
|||||||
Release 8.1i - Fit P.68d
|
Release 8.1i - Fit P.68d
|
||||||
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
|
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
|
||||||
|
|
||||||
12-28-2016 11:59PM
|
12-29-2016 3:04PM
|
||||||
|
|
||||||
NOTE: This file is designed to be imported into a spreadsheet program
|
NOTE: This file is designed to be imported into a spreadsheet program
|
||||||
such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
|
such as Microsoft Excel for viewing, printing and sorting. The pipe '|'
|
||||||
|
|||||||
@@ -1,7 +1,7 @@
|
|||||||
|
|
||||||
cpldfit: version P.68d Xilinx Inc.
|
cpldfit: version P.68d Xilinx Inc.
|
||||||
Fitter Report
|
Fitter Report
|
||||||
Design Name: LAN_IDE_CP Date: 12-28-2016, 11:59PM
|
Design Name: LAN_IDE_CP Date: 12-29-2016, 3:04PM
|
||||||
Device Used: XC95144XL-10-TQ144
|
Device Used: XC95144XL-10-TQ144
|
||||||
Fitting Status: Successful
|
Fitting Status: Successful
|
||||||
|
|
||||||
@@ -1457,9 +1457,9 @@ lan_D <= ((SHUT_UP(0))
|
|||||||
OR (NOT LAN_BASEADR(4) AND A(20)));
|
OR (NOT LAN_BASEADR(4) AND A(20)));
|
||||||
|
|
||||||
|
|
||||||
lan/lan_CLKF <= C1
|
lan/lan_CLKF <= NOT (C1
|
||||||
XOR
|
XOR
|
||||||
lan/lan_CLKF <= C3;
|
lan/lan_CLKF <= NOT (C3);
|
||||||
|
|
||||||
Register Legend:
|
Register Legend:
|
||||||
FDCPE (Q,D,C,CLR,PRE,CE);
|
FDCPE (Q,D,C,CLR,PRE,CE);
|
||||||
@@ -1474,12 +1474,12 @@ Device : XC95144XL-10-TQ144
|
|||||||
Pin Signal Pin Signal
|
Pin Signal Pin Signal
|
||||||
No. Name No. Name
|
No. Name No. Name
|
||||||
1 VCC 73 VCC
|
1 VCC 73 VCC
|
||||||
2 D<0> 74 TIE
|
2 D<0> 74 KPR
|
||||||
3 A_LAN<1> 75 AUTOBOOT_OFF
|
3 A_LAN<1> 75 AUTOBOOT_OFF
|
||||||
4 A_LAN<0> 76 LAN_WRL
|
4 A_LAN<0> 76 LAN_WRL
|
||||||
5 A_LAN<3> 77 TIE
|
5 A_LAN<3> 77 KPR
|
||||||
6 A_LAN<2> 78 TIE
|
6 A_LAN<2> 78 KPR
|
||||||
7 A_LAN<5> 79 TIE
|
7 A_LAN<5> 79 KPR
|
||||||
8 VCC 80 AS
|
8 VCC 80 AS
|
||||||
9 A_LAN<4> 81 UDS
|
9 A_LAN<4> 81 UDS
|
||||||
10 A_LAN<7> 82 LDS
|
10 A_LAN<7> 82 LDS
|
||||||
@@ -1493,25 +1493,25 @@ No. Name No. Name
|
|||||||
18 GND 90 GND
|
18 GND 90 GND
|
||||||
19 D<8> 91 A<20>
|
19 D<8> 91 A<20>
|
||||||
20 D<5> 92 A<19>
|
20 D<5> 92 A<19>
|
||||||
21 D<4> 93 TIE
|
21 D<4> 93 KPR
|
||||||
22 IDE_CS<0> 94 A<18>
|
22 IDE_CS<0> 94 A<18>
|
||||||
23 IDE_CS<1> 95 A<17>
|
23 IDE_CS<1> 95 A<17>
|
||||||
24 IDE_A<0> 96 TIE
|
24 IDE_A<0> 96 KPR
|
||||||
25 IDE_A<2> 97 A<16>
|
25 IDE_A<2> 97 A<16>
|
||||||
26 IDE_A<1> 98 BERR
|
26 IDE_A<1> 98 BERR
|
||||||
27 IDE_R 99 GND
|
27 IDE_R 99 GND
|
||||||
28 IDE_W 100 TIE
|
28 IDE_W 100 KPR
|
||||||
29 GND 101 TIE
|
29 GND 101 KPR
|
||||||
30 TIE 102 C3
|
30 KPR 102 C3
|
||||||
31 CP_IRQ 103 C1
|
31 CP_IRQ 103 C1
|
||||||
32 INT_OUT 104 CFIN
|
32 INT_OUT 104 CFIN
|
||||||
33 TIE 105 CFOUT
|
33 KPR 105 CFOUT
|
||||||
34 CP_CS 106 SLAVE
|
34 CP_CS 106 SLAVE
|
||||||
35 ROM_OE 107 OWN
|
35 ROM_OE 107 OWN
|
||||||
36 GND 108 GND
|
36 GND 108 GND
|
||||||
37 VCC 109 VCC
|
37 VCC 109 VCC
|
||||||
38 TIE 110 LAN_CFG<4>
|
38 KPR 110 LAN_CFG<4>
|
||||||
39 D<2> 111 TIE
|
39 D<2> 111 KPR
|
||||||
40 D<9> 112 DQ<15>
|
40 D<9> 112 DQ<15>
|
||||||
41 D<10> 113 DQ<13>
|
41 D<10> 113 DQ<13>
|
||||||
42 VCC 114 GND
|
42 VCC 114 GND
|
||||||
@@ -1574,7 +1574,7 @@ Keep Unused Inputs : OFF
|
|||||||
Slew Rate : FAST
|
Slew Rate : FAST
|
||||||
Power Mode : STD
|
Power Mode : STD
|
||||||
Ground on Unused IOs : OFF
|
Ground on Unused IOs : OFF
|
||||||
Set I/O Pin Termination : FLOAT
|
Set I/O Pin Termination : KEEPER
|
||||||
Global Clock Optimization : ON
|
Global Clock Optimization : ON
|
||||||
Global Set/Reset Optimization : ON
|
Global Set/Reset Optimization : ON
|
||||||
Global Ouput Enable Optimization : ON
|
Global Ouput Enable Optimization : ON
|
||||||
|
|||||||
@@ -4,13 +4,13 @@ Copyright (c) 1995-2013 Xilinx, Inc. All rights reserved.
|
|||||||
|
|
||||||
|
|
||||||
Total REAL time to Xst completion: 0.00 secs
|
Total REAL time to Xst completion: 0.00 secs
|
||||||
Total CPU time to Xst completion: 0.11 secs
|
Total CPU time to Xst completion: 0.12 secs
|
||||||
|
|
||||||
--> Parameter xsthdpdir set to xst
|
--> Parameter xsthdpdir set to xst
|
||||||
|
|
||||||
|
|
||||||
Total REAL time to Xst completion: 0.00 secs
|
Total REAL time to Xst completion: 0.00 secs
|
||||||
Total CPU time to Xst completion: 0.11 secs
|
Total CPU time to Xst completion: 0.12 secs
|
||||||
|
|
||||||
--> Reading design: LAN_IDE_CP.prj
|
--> Reading design: LAN_IDE_CP.prj
|
||||||
|
|
||||||
@@ -239,11 +239,11 @@ Cell Usage :
|
|||||||
|
|
||||||
|
|
||||||
Total REAL time to Xst completion: 8.00 secs
|
Total REAL time to Xst completion: 8.00 secs
|
||||||
Total CPU time to Xst completion: 7.85 secs
|
Total CPU time to Xst completion: 8.22 secs
|
||||||
|
|
||||||
-->
|
-->
|
||||||
|
|
||||||
Total memory usage is 290056 kilobytes
|
Total memory usage is 290020 kilobytes
|
||||||
|
|
||||||
Number of errors : 0 ( 0 filtered)
|
Number of errors : 0 ( 0 filtered)
|
||||||
Number of warnings : 13 ( 0 filtered)
|
Number of warnings : 13 ( 0 filtered)
|
||||||
|
|||||||
@@ -118,7 +118,7 @@ begin
|
|||||||
ide <='0';
|
ide <='0';
|
||||||
lan <='0';
|
lan <='0';
|
||||||
cp <='0';
|
cp <='0';
|
||||||
elsif(falling_edge(AMIGA_CLK))then
|
elsif(rising_edge(AMIGA_CLK))then
|
||||||
if(A(23 downto 16) = x"E8" and not(AUTO_CONFIG_DONE ="111") and CFIN='0')then
|
if(A(23 downto 16) = x"E8" and not(AUTO_CONFIG_DONE ="111") and CFIN='0')then
|
||||||
autoconfig <='1';
|
autoconfig <='1';
|
||||||
else
|
else
|
||||||
@@ -151,8 +151,8 @@ begin
|
|||||||
begin
|
begin
|
||||||
if(reset ='0') then
|
if(reset ='0') then
|
||||||
LAN_INT_ENABLE <='0';
|
LAN_INT_ENABLE <='0';
|
||||||
elsif rising_edge(AMIGA_CLK) then
|
elsif falling_edge(AMIGA_CLK) then
|
||||||
if(LAN_INT = '1') then --enable if high for the first time!
|
if(LAN_INT = '1' and AUTO_CONFIG_DONE ="111") then --enable if high and ac completed!
|
||||||
LAN_INT_ENABLE <= '1';
|
LAN_INT_ENABLE <= '1';
|
||||||
end if;
|
end if;
|
||||||
end if;
|
end if;
|
||||||
@@ -163,7 +163,7 @@ begin
|
|||||||
ide_rw_gen: process (AMIGA_CLK)
|
ide_rw_gen: process (AMIGA_CLK)
|
||||||
begin
|
begin
|
||||||
|
|
||||||
if rising_edge(AMIGA_CLK) then
|
if falling_edge(AMIGA_CLK) then
|
||||||
if (reset = '0') then
|
if (reset = '0') then
|
||||||
IDE_R_S <= '1';
|
IDE_R_S <= '1';
|
||||||
IDE_W_S <= '1';
|
IDE_W_S <= '1';
|
||||||
@@ -206,7 +206,7 @@ begin
|
|||||||
|
|
||||||
autoconfig_proc: process (reset, AMIGA_CLK)
|
autoconfig_proc: process (reset, AMIGA_CLK)
|
||||||
begin
|
begin
|
||||||
if rising_edge(AMIGA_CLK) then -- no reset, so wait for rising edge of the clock
|
if falling_edge(AMIGA_CLK) then -- no reset, so wait for rising edge of the clock
|
||||||
if reset = '0' then
|
if reset = '0' then
|
||||||
-- reset active ...
|
-- reset active ...
|
||||||
AUTO_CONFIG_DONE_CYCLE <="000";
|
AUTO_CONFIG_DONE_CYCLE <="000";
|
||||||
|
|||||||
+138
-138
File diff suppressed because it is too large
Load Diff
File diff suppressed because one or more lines are too long
@@ -1,10 +1,10 @@
|
|||||||
<?xml version='1.0' encoding='utf-8' ?>
|
<?xml version='1.0' encoding='utf-8' ?>
|
||||||
<!DOCTYPE document SYSTEM 'file:///c:/Xilinx/14.6/ISE_DS/ISE/chipviewer/data/xsl/buildXML.dtd'>
|
<!DOCTYPE document SYSTEM 'file:///C:/Xilinx/14.6/ISE_DS/ISE/chipviewer/data/xsl/buildXML.dtd'>
|
||||||
|
|
||||||
<document>
|
<document>
|
||||||
<design name='LAN_IDE_CP'/>
|
<design name='LAN_IDE_CP'/>
|
||||||
<rptdir name='LAN_IDE_CP'/>
|
<rptdir name='LAN_IDE_CP'/>
|
||||||
<xilinx path='c:/Xilinx/14.6/ISE_DS/ISE;'/>
|
<xilinx path='C:/Xilinx/14.6/ISE_DS/ISE;'/>
|
||||||
<projDir path='C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE'/>
|
<projDir path='C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE'/>
|
||||||
<xslDir path='chipviewer/data/xsl'/>
|
<xslDir path='chipviewer/data/xsl'/>
|
||||||
<fileDir path='/chipviewer/data/html'/>
|
<fileDir path='/chipviewer/data/html'/>
|
||||||
@@ -219,7 +219,7 @@
|
|||||||
<output file='fbs_FB8.htm'/>
|
<output file='fbs_FB8.htm'/>
|
||||||
</xslFile>
|
</xslFile>
|
||||||
</xmlFile>
|
</xmlFile>
|
||||||
<xmlFile file='c:/Xilinx/14.6/ISE_DS/ISE/chipviewer/data/xsl/pinlegend.xml'>
|
<xmlFile file='C:/Xilinx/14.6/ISE_DS/ISE/chipviewer/data/xsl/pinlegend.xml'>
|
||||||
<xslFile file='legend.xsl'>
|
<xslFile file='legend.xsl'>
|
||||||
<param name='device' value='XC95144XL-10-TQ144'/>
|
<param name='device' value='XC95144XL-10-TQ144'/>
|
||||||
<param name='verOn' value='0'/>
|
<param name='verOn' value='0'/>
|
||||||
@@ -231,7 +231,7 @@
|
|||||||
<output file='pinlegendV.htm'/>
|
<output file='pinlegendV.htm'/>
|
||||||
</xslFile>
|
</xslFile>
|
||||||
</xmlFile>
|
</xmlFile>
|
||||||
<xmlFile file='c:/Xilinx/14.6/ISE_DS/ISE/chipviewer/data/xsl/logiclegend.xml'>
|
<xmlFile file='C:/Xilinx/14.6/ISE_DS/ISE/chipviewer/data/xsl/logiclegend.xml'>
|
||||||
<xslFile file='legend.xsl'>
|
<xslFile file='legend.xsl'>
|
||||||
<param name='device' value='XC95144XL-10-TQ144'/>
|
<param name='device' value='XC95144XL-10-TQ144'/>
|
||||||
<param name='verOn' value='0'/>
|
<param name='verOn' value='0'/>
|
||||||
|
|||||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
+1569
-1033
File diff suppressed because it is too large
Load Diff
@@ -1,17 +1,28 @@
|
|||||||
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
|
|
||||||
<html>
|
<html>
|
||||||
<head>
|
<head>
|
||||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
|
||||||
<title>genmsg</title>
|
<script src="errors.js"></script><link rel="stylesheet" type="text/css" href="style.css">
|
||||||
</head>
|
</head>
|
||||||
<body>
|
<body class="pgBgnd" id="XC95144XL">
|
||||||
|
<span id="error" class="pgRef"><h3 align="center">Errors and Warnings</h3>
|
||||||
<br>
|
<b>There are 2 error(s), 12 warning(s), and 0 information.</b><br><br><table width="90%" border="1" cellpadding="0" cellspacing="0">
|
||||||
<dl>
|
<tr><td>[Warning]:Cpld - Unable to retrieve the path to the iSE Project Repository. Will use the default filename of 'LAN_IDE_CP.ise'.INFO:Cpld - Inferring BUFG constraint for signal 'CLK_EXT' based upon the LOC constraint 'P30'. It is recommended that you declare this BUFG explicitedly in your design. Note that for certain device families the output of a BUFG constraint can not drive a gated clock, and the BUFG constraint will be ignored.</td></tr>
|
||||||
<dd>
|
<tr><td>[Warning]:Cpld:936 - The output buffer 'OVR_OBUF' is missing an input and will be deleted.</td></tr>
|
||||||
This file is currently being generated. Please recheck the link after some
|
<tr><td>[Warning]:Cpld:936 - The output buffer 'MTACK_OBUF' is missing an input and will be deleted.</td></tr>
|
||||||
time for this report data.</dd>
|
<tr><td>[Warning]:Cpld:1007 - Removing unused input(s) 'A<15>'. The input(s) are unused after optimization. Please verify functionality via simulation.</td></tr>
|
||||||
</dl>
|
<tr><td>[Warning]:Cpld:1007 - Removing unused input(s) 'CLK_EXT'. The input(s) are unused after optimization. Please verify functionality via simulation.</td></tr>
|
||||||
|
<tr><td>[Warning]:Cpld:1007 - Removing unused input(s) 'DS0'. The input(s) are unused after optimization. Please verify functionality via simulation.</td></tr>
|
||||||
|
<tr><td>[Warning]:Cpld:1007 - Removing unused input(s) 'DS1'. The input(s) are unused after optimization. Please verify functionality via simulation.</td></tr>
|
||||||
|
<tr><td>[Warning]:Cpld:1007 - Removing unused input(s) 'FCS'. The input(s) are unused after optimization. Please verify functionality via simulation.</td></tr>
|
||||||
|
<tr><td>[Warning]:Cpld:1007 - Removing unused input(s) 'IDE_WAIT'. The input(s) are unused after optimization. Please verify functionality via simulation.</td></tr>
|
||||||
|
<tr><td>[Warning]:Cpld:1007 - Removing unused input(s) 'LAN_INT'. The input(s) are unused after optimization. Please verify functionality via simulation.</td></tr>
|
||||||
|
<tr><td>[Warning]:Cpld:1007 - Removing unused input(s) 'MTCR'. The input(s) are unused after optimization. Please verify functionality via simulation.</td></tr>
|
||||||
|
<tr><td>[Warning]:Cpld:868 - Cannot fit the design into any of the specified devices with the selected implementation options.</td></tr>
|
||||||
|
<tr><td>[Error]:Cpld:1007 - Removing unused input(s) 'Z3'. The input(s) are unused after optimization. Please verify functionality via simulation.</td></tr>
|
||||||
|
<tr><td>[Error]:Cpld:837 - Insufficient number of macrocells. The design needs at least 155 but only 144 left after allocating other resources.</td></tr>
|
||||||
|
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
|
||||||
|
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
|
||||||
|
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
|
||||||
|
</tr></table></span></form>
|
||||||
</body>
|
</body>
|
||||||
</html>
|
</html>
|
||||||
|
|||||||
@@ -1,17 +1,42 @@
|
|||||||
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
|
|
||||||
<html>
|
<html>
|
||||||
<head>
|
<head>
|
||||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
|
||||||
<title>genmsg</title>
|
<script src="maplogic.js"></script><link rel="stylesheet" type="text/css" href="style.css">
|
||||||
</head>
|
</head>
|
||||||
<body>
|
<body class="pgBgnd">
|
||||||
|
<h3 align="center">Failure Table</h3>
|
||||||
<br>
|
<table width="90%" border="1" cellpadding="0" cellspacing="0">
|
||||||
<dl>
|
<tr class="pgHeader">
|
||||||
<dd>
|
<th align="left">Signal Name</th>
|
||||||
This file is currently being generated. Please recheck the link after some
|
<th align="left">FB1</th>
|
||||||
time for this report data.</dd>
|
<th align="left">FB2</th>
|
||||||
</dl>
|
<th align="left">FB3</th>
|
||||||
|
<th align="left">FB4</th>
|
||||||
|
</tr>
|
||||||
|
<tr class="pgHeader">
|
||||||
|
<th align="left">Signal Name</th>
|
||||||
|
<th align="left">FB5</th>
|
||||||
|
<th align="left">FB6</th>
|
||||||
|
<th align="left">FB7</th>
|
||||||
|
<th align="left">FB8</th>
|
||||||
|
</tr>
|
||||||
|
</table>
|
||||||
|
<table width="90%" border="1" cellpadding="0" cellspacing="0"><table width="90%" border="1" cellpadding="0" cellspacing="0">
|
||||||
|
<tr><td>Legend:</td></tr>
|
||||||
|
<tr><td> ce - signal clock enable cannot be placed</td></tr>
|
||||||
|
<tr><td> clk - signal clock cannot be placed</td></tr>
|
||||||
|
<tr><td> fbi - insufficient function block inputs available to place signal</td></tr>
|
||||||
|
<tr><td> io - insufficient I/O pins available to place output</td></tr>
|
||||||
|
<tr><td> loc - signal cannot be placed in this FB because it is assigned to a different FB</td></tr>
|
||||||
|
<tr><td> mc - insufficient macrocells available to place signal</td></tr>
|
||||||
|
<tr><td> oe - signal output enable cannot be placed</td></tr>
|
||||||
|
<tr><td> pt - insufficient product terms available to place signal</td></tr>
|
||||||
|
<tr><td> sr - signal set/reset cannot be placed</td></tr>
|
||||||
|
<tr><td> unk - unknown reason for failure - Please contact Xilinx Support</td></tr>
|
||||||
|
</table></table>
|
||||||
</body>
|
</body>
|
||||||
|
<form><span class="pgRef"><table width="90%" align="center"><tr>
|
||||||
|
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
|
||||||
|
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
|
||||||
|
</tr></table></span></form>
|
||||||
</html>
|
</html>
|
||||||
|
|||||||
@@ -1,17 +1,14 @@
|
|||||||
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
|
|
||||||
<html>
|
<html>
|
||||||
<head>
|
<head>
|
||||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
|
||||||
<title>genmsg</title>
|
<script src="maplogic.js"></script><link rel="stylesheet" type="text/css" href="style.css">
|
||||||
</head>
|
</head>
|
||||||
<body>
|
<span id="maplog" class="pgRef"><h3 align="center">Unmapped Inputs</h3>
|
||||||
|
<table width="90%" border="1" cellpadding="0" cellspacing="0"><tr class="pgHeader">
|
||||||
<br>
|
<th width="28%">Signal Name</th>
|
||||||
<dl>
|
<th align="center">User Assignment</th>
|
||||||
<dd>
|
</tr></table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
|
||||||
This file is currently being generated. Please recheck the link after some
|
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
|
||||||
time for this report data.</dd>
|
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
|
||||||
</dl>
|
</tr></table></span></form>
|
||||||
|
|
||||||
</body>
|
|
||||||
</html>
|
</html>
|
||||||
|
|||||||
@@ -16,15 +16,7 @@
|
|||||||
</tr>
|
</tr>
|
||||||
<tr>
|
<tr>
|
||||||
<td width="7"> </td>
|
<td width="7"> </td>
|
||||||
<td><a href="javascript:showMappedLogics(0);" class="SECONDARY-NAV" onmouseover="window.status='goto Logic'; return true;" onmouseout="window.status=''">Logic</a></td>
|
<td><a href="javascript:showLogicLeft();" class="SECONDARY-NAV" onmouseover="window.status='goto Unmapped Logic'; return true;" onmouseout="window.status=''">UnMapped Logic</a></td>
|
||||||
</tr>
|
|
||||||
<tr>
|
|
||||||
<td width="7"> </td>
|
|
||||||
<td><a href="javascript:showMappedInputs(0);" class="SECONDARY-NAV" onmouseover="window.status='goto Inputs'; return true;" onmouseout="window.status=''">Inputs</a></td>
|
|
||||||
</tr>
|
|
||||||
<tr>
|
|
||||||
<td width="7"> </td>
|
|
||||||
<td><a href="javascript:showFBSum();" class="SECONDARY-NAV" onmouseover="window.status='goto Function Blocks Summary'; return true;" onmouseout="window.status=''">Function Blocks</a></td>
|
|
||||||
</tr>
|
</tr>
|
||||||
<tr>
|
<tr>
|
||||||
<td width="7"> </td>
|
<td width="7"> </td>
|
||||||
@@ -32,10 +24,6 @@
|
|||||||
</tr>
|
</tr>
|
||||||
<tr>
|
<tr>
|
||||||
<td width="7"> </td>
|
<td width="7"> </td>
|
||||||
<td><a href="javascript:showPinOut(10);" class="SECONDARY-NAV" onmouseover="window.status='goto Pin List'; return true;" onmouseout="window.status=''">Pin List</a></td>
|
|
||||||
</tr>
|
|
||||||
<tr>
|
|
||||||
<td width="7"> </td>
|
|
||||||
<td><a href="javascript:showOptions();" class="SECONDARY-NAV" onmouseover="window.status='goto Compiler Options'; return true;" onmouseout="window.status=''">Compiler Options</a></td>
|
<td><a href="javascript:showOptions();" class="SECONDARY-NAV" onmouseover="window.status='goto Compiler Options'; return true;" onmouseout="window.status=''">Compiler Options</a></td>
|
||||||
</tr>
|
</tr>
|
||||||
<tr>
|
<tr>
|
||||||
|
|||||||
@@ -1,17 +1,516 @@
|
|||||||
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
|
|
||||||
<html>
|
<html>
|
||||||
<head>
|
<head>
|
||||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
|
||||||
<title>genmsg</title>
|
<script src="maplogic.js"></script><link rel="stylesheet" type="text/css" href="style.css">
|
||||||
</head>
|
</head>
|
||||||
<body>
|
<span id="maplog" class="pgRef"><h3 align="center">Unmapped Logic</h3>
|
||||||
|
<table width="90%" border="1" cellpadding="0" cellspacing="0">
|
||||||
<br>
|
<tr class="pgHeader">
|
||||||
<dl>
|
<th width="28%">Signal Name</th>
|
||||||
<dd>
|
<th align="center">Total Pterms</th>
|
||||||
This file is currently being generated. Please recheck the link after some
|
<th align="center">Total Inputs</th>
|
||||||
time for this report data.</dd>
|
<th align="center">User Assignment</th>
|
||||||
</dl>
|
</tr>
|
||||||
|
<tr>
|
||||||
</body>
|
<td width="28%"><a href="javascript:showEqn('AUTO_CONFIG_DONE0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">AUTO_CONFIG_DONE<0></a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('AUTO_CONFIG_DONE1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">AUTO_CONFIG_DONE<1></a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('AUTO_CONFIG_DONE2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">AUTO_CONFIG_DONE<2></a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('AUTO_CONFIG_DONE_CYCLE0AUTO_CONFIG_DONE_CYCLE<0>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">AUTO_CONFIG_DONE_CYCLE<0>/AUTO_CONFIG_DONE_CYCLE<0>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('AUTO_CONFIG_DONE_CYCLE0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">AUTO_CONFIG_DONE_CYCLE<0></a></td>
|
||||||
|
<td align="center">3</td>
|
||||||
|
<td align="center">13</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('AUTO_CONFIG_DONE_CYCLE1AUTO_CONFIG_DONE_CYCLE<1>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">AUTO_CONFIG_DONE_CYCLE<1>/AUTO_CONFIG_DONE_CYCLE<1>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('AUTO_CONFIG_DONE_CYCLE1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">AUTO_CONFIG_DONE_CYCLE<1></a></td>
|
||||||
|
<td align="center">3</td>
|
||||||
|
<td align="center">14</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('AUTO_CONFIG_DONE_CYCLE2AUTO_CONFIG_DONE_CYCLE<2>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">AUTO_CONFIG_DONE_CYCLE<2>/AUTO_CONFIG_DONE_CYCLE<2>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('AUTO_CONFIG_DONE_CYCLE2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">AUTO_CONFIG_DONE_CYCLE<2></a></td>
|
||||||
|
<td align="center">3</td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR0CP_BASEADR<0>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<0>/CP_BASEADR<0>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<0></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">16</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR1CP_BASEADR<1>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<1>/CP_BASEADR<1>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<1></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">16</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR2CP_BASEADR<2>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<2>/CP_BASEADR<2>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<2></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">16</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR3CP_BASEADR<3>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<3>/CP_BASEADR<3>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<3></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">16</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR4CP_BASEADR<4>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<4>/CP_BASEADR<4>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<4></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">16</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR5CP_BASEADR<5>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<5>/CP_BASEADR<5>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<5></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">16</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR6CP_BASEADR<6>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<6>/CP_BASEADR<6>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<6></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">16</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR7CP_BASEADR<7>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<7>/CP_BASEADR<7>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('CP_BASEADR7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">CP_BASEADR<7></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">16</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('Dout10Dout1<0>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">Dout1<0>/Dout1<0>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('Dout10_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">Dout1<0></a></td>
|
||||||
|
<td align="center">18</td>
|
||||||
|
<td align="center">16</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('Dout11Dout1<1>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">Dout1<1>/Dout1<1>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('Dout11_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">Dout1<1></a></td>
|
||||||
|
<td align="center">19</td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('Dout12Dout1<2>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">Dout1<2>/Dout1<2>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('Dout12_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">Dout1<2></a></td>
|
||||||
|
<td align="center">16</td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('Dout13Dout1<3>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">Dout1<3>/Dout1<3>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('Dout13_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">Dout1<3></a></td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR0IDE_BASEADR<0>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<0>/IDE_BASEADR<0>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<0></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">17</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR1IDE_BASEADR<1>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<1>/IDE_BASEADR<1>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<1></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">17</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR2IDE_BASEADR<2>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<2>/IDE_BASEADR<2>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<2></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">17</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR3IDE_BASEADR<3>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<3>/IDE_BASEADR<3>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<3></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">17</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR4IDE_BASEADR<4>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<4>/IDE_BASEADR<4>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<4></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">17</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR5IDE_BASEADR<5>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<5>/IDE_BASEADR<5>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<5></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">17</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR6IDE_BASEADR<6>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<6>/IDE_BASEADR<6>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<6></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">17</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR7IDE_BASEADR<7>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<7>/IDE_BASEADR<7>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_BASEADR7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_BASEADR<7></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">17</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_ENABLE')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_ENABLE</a></td>
|
||||||
|
<td align="center">3</td>
|
||||||
|
<td align="center">6</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_ENABLEIDE_ENABLE_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_ENABLE/IDE_ENABLE_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_R_SIDE_R_S_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_R_S/IDE_R_S_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('IDE_W_SIDE_W_S_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">IDE_W_S/IDE_W_S_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR0LAN_BASEADR<0>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<0>/LAN_BASEADR<0>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<0></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR1LAN_BASEADR<1>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<1>/LAN_BASEADR<1>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<1></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR2LAN_BASEADR<2>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<2>/LAN_BASEADR<2>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<2></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR3LAN_BASEADR<3>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<3>/LAN_BASEADR<3>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR3_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<3></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR4LAN_BASEADR<4>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<4>/LAN_BASEADR<4>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR4_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<4></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR5LAN_BASEADR<5>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<5>/LAN_BASEADR<5>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR5_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<5></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR6LAN_BASEADR<6>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<6>/LAN_BASEADR<6>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR6_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<6></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR7LAN_BASEADR<7>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<7>/LAN_BASEADR<7>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('LAN_BASEADR7_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">LAN_BASEADR<7></a></td>
|
||||||
|
<td align="center">4</td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('OpTxINV124__INTUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">$OpTx$INV$124__$INT.UIM</a></td>
|
||||||
|
<td align="center">3</td>
|
||||||
|
<td align="center">5</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('ROM_OE_SROM_OE_S_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ROM_OE_S/ROM_OE_S_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('SHUT_UP0SHUT_UP<0>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">SHUT_UP<0>/SHUT_UP<0>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('SHUT_UP0_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">SHUT_UP<0></a></td>
|
||||||
|
<td align="center">3</td>
|
||||||
|
<td align="center">14</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('SHUT_UP1SHUT_UP<1>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">SHUT_UP<1>/SHUT_UP<1>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('SHUT_UP1_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">SHUT_UP<1></a></td>
|
||||||
|
<td align="center">3</td>
|
||||||
|
<td align="center">15</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('SHUT_UP2SHUT_UP<2>_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">SHUT_UP<2>/SHUT_UP<2>_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('SHUT_UP2_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">SHUT_UP<2></a></td>
|
||||||
|
<td align="center">3</td>
|
||||||
|
<td align="center">16</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('SLAVE_OBUF__INTUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">SLAVE_OBUF__$INT.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">5</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('autoconfig')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">autoconfig</a></td>
|
||||||
|
<td align="center">5</td>
|
||||||
|
<td align="center">14</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('ide')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ide</a></td>
|
||||||
|
<td align="center">19</td>
|
||||||
|
<td align="center">19</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('ideide_RSTF__INTUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">ide/ide_RSTF__$INT.UIM</a></td>
|
||||||
|
<td align="center">1</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('lan')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">lan</a></td>
|
||||||
|
<td align="center">19</td>
|
||||||
|
<td align="center">19</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="28%"><a href="javascript:showEqn('lanlan_CLKFUIM_SPECSIG')" onmouseover="window.status='show Equation'; return true;" onmouseout="window.status=''">lan/lan_CLKF.UIM</a></td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center">2</td>
|
||||||
|
<td align="center"> </td>
|
||||||
|
</tr>
|
||||||
|
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
|
||||||
|
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
|
||||||
|
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
|
||||||
|
</tr></table></span></form>
|
||||||
</html>
|
</html>
|
||||||
|
|||||||
@@ -1,17 +1,106 @@
|
|||||||
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
|
|
||||||
<html>
|
<html>
|
||||||
<head>
|
<head>
|
||||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
|
||||||
<title>genmsg</title>
|
<link rel="stylesheet" type="text/css" href="style.css">
|
||||||
|
<script>
|
||||||
|
function showTop() { document.location.href = '#'; }
|
||||||
|
</script>
|
||||||
</head>
|
</head>
|
||||||
<body>
|
<body class="pgBgnd">
|
||||||
|
<span id="legend" class="pgRef"><h3 align="center">Legends</h3>
|
||||||
<br>
|
<table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td align="right"><form><input type="button" onclick="javascript:document.location.href='logiclegendV.htm'" value="verbose"></form></td></tr></table>
|
||||||
<dl>
|
<table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
|
||||||
<dd>
|
<tr>
|
||||||
This file is currently being generated. Please recheck the link after some
|
<th width="20%">Acronym</th>
|
||||||
time for this report data.</dd>
|
<th width="80%">Brief Description</th>
|
||||||
</dl>
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> *</td>
|
||||||
|
<td width="80%"> User Assigned</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> (b)</td>
|
||||||
|
<td width="80%"> Buried macrocell</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> FB#</td>
|
||||||
|
<td width="80%"> Function Block number </td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GCK#</td>
|
||||||
|
<td width="80%"> Global Clock number</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GTS#</td>
|
||||||
|
<td width="80%"> Global Output Enable number</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GSR</td>
|
||||||
|
<td width="80%"> Global Set/Reset</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> I</td>
|
||||||
|
<td width="80%"> Input</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> I/O</td>
|
||||||
|
<td width="80%"> Input/Output</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> Latch</td>
|
||||||
|
<td width="80%"> Transparent latch</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> LOW</td>
|
||||||
|
<td width="80%"> Low Power Mode</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> MC#</td>
|
||||||
|
<td width="80%"> Macrocell number</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> O</td>
|
||||||
|
<td width="80%"> Output</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> OD</td>
|
||||||
|
<td width="80%"> Open Drain</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> PU</td>
|
||||||
|
<td width="80%"> Pullup</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> /S</td>
|
||||||
|
<td width="80%"> After any flop/latch type indicates initial state is Set</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> STD</td>
|
||||||
|
<td width="80%"> Standard Power Mode</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TCK</td>
|
||||||
|
<td width="80%"> Test clock</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TDI</td>
|
||||||
|
<td width="80%"> Test data input</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TDO</td>
|
||||||
|
<td width="80%"> Test data output</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TFF</td>
|
||||||
|
<td width="80%"> Toggle Flip-Flop</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TMS</td>
|
||||||
|
<td width="80%"> Test mode select</td>
|
||||||
|
</tr>
|
||||||
|
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
|
||||||
|
<td align="left"><input type="button" onclick="showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
|
||||||
|
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
|
||||||
|
</tr></table></span></form>
|
||||||
</body>
|
</body>
|
||||||
</html>
|
</html>
|
||||||
|
|||||||
@@ -1,17 +1,106 @@
|
|||||||
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
|
|
||||||
<html>
|
<html>
|
||||||
<head>
|
<head>
|
||||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
|
||||||
<title>genmsg</title>
|
<link rel="stylesheet" type="text/css" href="style.css">
|
||||||
|
<script>
|
||||||
|
function showTop() { document.location.href = '#'; }
|
||||||
|
</script>
|
||||||
</head>
|
</head>
|
||||||
<body>
|
<body class="pgBgnd">
|
||||||
|
<span id="legend" class="pgRef"><h3 align="center">Legends</h3>
|
||||||
<br>
|
<table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td align="right"><form><input type="button" onclick="javascript:document.location.href='logiclegend.htm'" value="brief"></form></td></tr></table>
|
||||||
<dl>
|
<table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
|
||||||
<dd>
|
<tr>
|
||||||
This file is currently being generated. Please recheck the link after some
|
<th width="20%">Acronym</th>
|
||||||
time for this report data.</dd>
|
<th width="80%">Verbose Description</th>
|
||||||
</dl>
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> *</td>
|
||||||
|
<td width="60%"> User Assigned</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> (b)</td>
|
||||||
|
<td width="60%"> Buried macrocell</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> FB#</td>
|
||||||
|
<td width="60%"> Function Block number</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GCK#</td>
|
||||||
|
<td width="60%"> Global Clock number</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GTS#</td>
|
||||||
|
<td width="60%"> Global Output Enable number</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GSR</td>
|
||||||
|
<td width="60%"> Global Set/Reset</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> I</td>
|
||||||
|
<td width="60%"> Input</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> I/O</td>
|
||||||
|
<td width="60%"> Input/Output</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> Latch</td>
|
||||||
|
<td width="60%"> Transparent latch</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> LOW</td>
|
||||||
|
<td width="60%"> Low Power Mode</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> MC#</td>
|
||||||
|
<td width="60%"> Macrocell number</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> O</td>
|
||||||
|
<td width="60%"> Output</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> OD</td>
|
||||||
|
<td width="60%"> Open Drain</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> PU</td>
|
||||||
|
<td width="60%"> Pullup</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> /S</td>
|
||||||
|
<td width="60%"> After any flop/latch type indicates initial state is Set</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> STD</td>
|
||||||
|
<td width="60%"> Standard Power Mode</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TCK</td>
|
||||||
|
<td width="60%"> One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. Test operations of the device are synchronous to TCK. Data is captured on the rising edge of TCK and outputs change on the falling edge of TCK. An internal pull-up forces TCK to a high level if left unconnected.</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TDI</td>
|
||||||
|
<td width="60%"> One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. It is the serial input for shifting data through the instruction register or selected data register. An internal pull-up forces TDI to a high level if left unconnected.</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TDO</td>
|
||||||
|
<td width="60%"> One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. It is the serial output for shifting data through the instruction register or selected data register. An internal pull-up forces TDI to a high level when it is not driven from an external source.</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TFF</td>
|
||||||
|
<td width="60%"> Toggle Flip-Flop</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TMS</td>
|
||||||
|
<td width="60%"> One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. It directs the device through its Test Access Port controller states. An internal pull-up forces TDI to a high level when it is not driven from an external source. TMS also provides the optional test reset signal of IEEE Std 1149 or IEEE Std 1532. </td>
|
||||||
|
</tr>
|
||||||
|
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
|
||||||
|
<td align="left"><input type="button" onclick="showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
|
||||||
|
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
|
||||||
|
</tr></table></span></form>
|
||||||
</body>
|
</body>
|
||||||
</html>
|
</html>
|
||||||
|
|||||||
@@ -1,17 +1,106 @@
|
|||||||
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
|
|
||||||
<html>
|
<html>
|
||||||
<head>
|
<head>
|
||||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
|
||||||
<title>genmsg</title>
|
<script src="paths.js"></script><script src="summary.js"></script><link rel="stylesheet" type="text/css" href="../tim/toc.css">
|
||||||
</head>
|
</head>
|
||||||
<body>
|
<body class="pgBgnd" id="XC95144XL">
|
||||||
|
<span id="options" class="pgRef"><h3 align="center">Compiler Options</h3>
|
||||||
<br>
|
<table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
|
||||||
<dl>
|
<tr>
|
||||||
<dd>
|
<th width="50%">Option</th>
|
||||||
This file is currently being generated. Please recheck the link after some
|
<th width="30%">Value</th>
|
||||||
time for this report data.</dd>
|
</tr>
|
||||||
</dl>
|
<tr>
|
||||||
|
<td width="50%"> <b>Device(s) Specified</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> xc95144xl-10-TQ144</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Optimization Method</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> SPEED</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Multi-Level Logic Optimization</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> ON</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Ignore Timing Specifications</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> OFF</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Default Register Power Up Value</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> LOW</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Slew Rate</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> FAST</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Keep User Location Constraints</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> ON</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>What-You-See-Is-What-You-Get</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> OFF</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Exhaustive Fitting</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> OFF</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Keep Unused Inputs</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> OFF</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Power Mode</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> STD</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Ground on Unused IOs</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> OFF</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Global Clock Optimization</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> ON</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Global Set/Reset Optimization</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> ON</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Global Ouput Enable Optimization</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> ON</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Set I/O Pin Termination</b>
|
||||||
|
</td>
|
||||||
|
<td width="30%"> KEEPER</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Input Limit</b> (2-54)</td>
|
||||||
|
<td width="30%"> 54</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> <b>Pterm Limit</b> (1-90)</td>
|
||||||
|
<td width="30%"> 25</td>
|
||||||
|
</tr>
|
||||||
|
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
|
||||||
|
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
|
||||||
|
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
|
||||||
|
</tr></table></span></form>
|
||||||
</body>
|
</body>
|
||||||
</html>
|
</html>
|
||||||
|
|||||||
@@ -1,17 +1,150 @@
|
|||||||
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
|
|
||||||
<html>
|
<html>
|
||||||
<head>
|
<head>
|
||||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
|
||||||
<title>genmsg</title>
|
<link rel="stylesheet" type="text/css" href="style.css">
|
||||||
|
<script>
|
||||||
|
function showTop() { document.location.href = '#'; }
|
||||||
|
</script>
|
||||||
</head>
|
</head>
|
||||||
<body>
|
<body class="pgBgnd">
|
||||||
|
<span id="legend" class="pgRef"><h3 align="center">Legends</h3>
|
||||||
<br>
|
<table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td align="right"><form><input type="button" onclick="javascript:document.location.href='pinlegendV.htm'" value="verbose"></form></td></tr></table>
|
||||||
<dl>
|
<table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
|
||||||
<dd>
|
<tr>
|
||||||
This file is currently being generated. Please recheck the link after some
|
<th width="20%">Acronym</th>
|
||||||
time for this report data.</dd>
|
<th width="80%">Brief Description</th>
|
||||||
</dl>
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> CLK</td>
|
||||||
|
<td width="80%"> Clock</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GCK0</td>
|
||||||
|
<td width="80%"> Global Clock 0</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GCK1</td>
|
||||||
|
<td width="80%"> Global Clock 1</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GCK2</td>
|
||||||
|
<td width="80%"> Global Clock 2</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GND</td>
|
||||||
|
<td width="80%"> Ground</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GSR</td>
|
||||||
|
<td width="80%"> Global Set/Reset</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GTS0</td>
|
||||||
|
<td width="80%"> Global Output Enable 0</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GTS1</td>
|
||||||
|
<td width="80%"> Global Output Enable 1</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GTS2</td>
|
||||||
|
<td width="80%"> Global Output Enable 2</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GTS3</td>
|
||||||
|
<td width="80%"> Global Output Enable 3</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> I/O</td>
|
||||||
|
<td width="80%"> Input/Output</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> INIT</td>
|
||||||
|
<td width="80%"> Initial state</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> ISP</td>
|
||||||
|
<td width="80%"> In system programmable</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> JTAG</td>
|
||||||
|
<td width="80%"> Joint Test Action Group</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> KPR</td>
|
||||||
|
<td width="80%"> Unused I/O with weak keeper</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> NC</td>
|
||||||
|
<td width="80%"> No Connects</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> PGND</td>
|
||||||
|
<td width="80%"> Programmable ground pin</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> PROHIBITED</td>
|
||||||
|
<td width="80%"> User reserved pin</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> R</td>
|
||||||
|
<td width="80%"> Reset</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> S</td>
|
||||||
|
<td width="80%"> Set</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TCK</td>
|
||||||
|
<td width="80%"> Test clock</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TDI</td>
|
||||||
|
<td width="80%"> Test data input</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TDO</td>
|
||||||
|
<td width="80%"> Test data output</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TIE</td>
|
||||||
|
<td width="80%"> Unused I/O floating</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TMS</td>
|
||||||
|
<td width="80%"> Test mode select</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> LVCMOS</td>
|
||||||
|
<td width="80%"> Low Voltage CMOS 3.3 Volts</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> LVCMOS25</td>
|
||||||
|
<td width="80%"> Low Voltage CMOS 2.5 Volts</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> LVCMOS33</td>
|
||||||
|
<td width="80%"> Low Voltage CMOS 2.5 to 3.3 Volts</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> LVTTL</td>
|
||||||
|
<td width="80%"> Low Voltage TTL 3.3 Volts</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> VCCIO</td>
|
||||||
|
<td width="80%"> Input/Output Supply Voltage</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> VCC</td>
|
||||||
|
<td width="80%"> Power internal</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> WPU</td>
|
||||||
|
<td width="80%"> Weak Pull Up</td>
|
||||||
|
</tr>
|
||||||
|
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
|
||||||
|
<td align="left"><input type="button" onclick="showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
|
||||||
|
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
|
||||||
|
</tr></table></span></form>
|
||||||
</body>
|
</body>
|
||||||
</html>
|
</html>
|
||||||
|
|||||||
@@ -1,17 +1,150 @@
|
|||||||
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
|
|
||||||
<html>
|
<html>
|
||||||
<head>
|
<head>
|
||||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
|
||||||
<title>genmsg</title>
|
<link rel="stylesheet" type="text/css" href="style.css">
|
||||||
|
<script>
|
||||||
|
function showTop() { document.location.href = '#'; }
|
||||||
|
</script>
|
||||||
</head>
|
</head>
|
||||||
<body>
|
<body class="pgBgnd">
|
||||||
|
<span id="legend" class="pgRef"><h3 align="center">Legends</h3>
|
||||||
<br>
|
<table align="center" width="90%" border="0" cellpadding="0" cellspacing="0"><tr><td align="right"><form><input type="button" onclick="javascript:document.location.href='pinlegend.htm'" value="brief"></form></td></tr></table>
|
||||||
<dl>
|
<table align="center" width="90%" border="1" cellpadding="0" cellspacing="0">
|
||||||
<dd>
|
<tr>
|
||||||
This file is currently being generated. Please recheck the link after some
|
<th width="20%">Acronym</th>
|
||||||
time for this report data.</dd>
|
<th width="80%">Verbose Description</th>
|
||||||
</dl>
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> CLK</td>
|
||||||
|
<td width="60%"> Global Clock</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GCK0</td>
|
||||||
|
<td width="60%"> Global clock zero</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GCK1</td>
|
||||||
|
<td width="60%"> Global clock one</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GCK2</td>
|
||||||
|
<td width="60%"> Global clock two</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GND</td>
|
||||||
|
<td width="60%"> Dedicated Ground Pin</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GSR</td>
|
||||||
|
<td width="60%"> Global set-reset</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GTS0</td>
|
||||||
|
<td width="60%"> Global tristate zero (output enable)</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GTS1</td>
|
||||||
|
<td width="60%"> Global tristate one (output enable)</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GTS2</td>
|
||||||
|
<td width="60%"> Global tristate two (output enable)</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> GTS3</td>
|
||||||
|
<td width="60%"> Global tristate three (output enable)</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> I/O</td>
|
||||||
|
<td width="60%"> Input/Output</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> INIT</td>
|
||||||
|
<td width="60%"> Initial state</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> ISP</td>
|
||||||
|
<td width="60%"> The use of the JTAG port to program the chip while it is powered in a system.</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> JTAG</td>
|
||||||
|
<td width="60%"> IEEE Standard 1149 (JTAG) boundary-scan test standard.</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> KPR</td>
|
||||||
|
<td width="60%"> Unused I/O with weak keeper (leave unconnected)</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> NC</td>
|
||||||
|
<td width="60%"> Not Connected, unbonded pin</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> PGND</td>
|
||||||
|
<td width="60%"> Programmable ground pin</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> PROHIBITED</td>
|
||||||
|
<td width="60%"> User reserved pin</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> R</td>
|
||||||
|
<td width="60%"> Reset</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> S</td>
|
||||||
|
<td width="60%"> Set</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TCK</td>
|
||||||
|
<td width="60%"> One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. Test operations of the device are synchronous to TCK. Data is captured on the rising edge of TCK and outputs change on the falling edge of TCK. An internal pull-up forces TCK to a high level if left unconnected.</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TDI</td>
|
||||||
|
<td width="60%"> One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. It is the serial input for shifting data through the instruction register or selected data register. An internal pull-up forces TDI to a high level if left unconnected.</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TDO</td>
|
||||||
|
<td width="60%"> One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. It is the serial output for shifting data through the instruction register or selected data register. An internal pull-up forces TDI to a high level when it is not driven from an external source.</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TIE</td>
|
||||||
|
<td width="60%"> Unused I/O floating -- must tie to VCC, GND or other signal</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> TMS</td>
|
||||||
|
<td width="60%"> One of four terminals required by (JTAG) IEEE Std 1149 or IEEE Std 1532. It directs the device through its Test Access Port controller states. An internal pull-up forces TDI to a high level when it is not driven from an external source. TMS also provides the optional test reset signal of IEEE Std 1149 or IEEE Std 1532.</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> LVCMOS</td>
|
||||||
|
<td width="60%"> Low Voltage Complementary Metal Oxide Semiconductor 3.3 Volts</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> LVCMOS25</td>
|
||||||
|
<td width="60%"> External I/O supply voltage for LVCMOS25</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> LVCMOS33</td>
|
||||||
|
<td width="60%"> External I/O supply voltage for LVCMOS33</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> LVTTL</td>
|
||||||
|
<td width="60%"> Low Voltage Transistor Transistor Logic 3.3Volts</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> VCCIO</td>
|
||||||
|
<td width="60%"> External power for Inputs/Outputs</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> VCC</td>
|
||||||
|
<td width="60%"> Dedicated Power Pin, Internal supply voltage for the device</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="20%"> WPU</td>
|
||||||
|
<td width="60%"> Unused I/O with Internal Weak Pull Up (leave unconnected)</td>
|
||||||
|
</tr>
|
||||||
|
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
|
||||||
|
<td align="left"><input type="button" onclick="showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
|
||||||
|
<td align="right"><input type="button" onclick="window.print()" onmouseover="window.status='print page'; return true;" onmouseout="window.status=''" value="print page"></td>
|
||||||
|
</tr></table></span></form>
|
||||||
</body>
|
</body>
|
||||||
</html>
|
</html>
|
||||||
|
|||||||
@@ -14,7 +14,7 @@
|
|||||||
<tr>
|
<tr>
|
||||||
<td width="40%"> <b>Fitting Status</b>
|
<td width="40%"> <b>Fitting Status</b>
|
||||||
</td>
|
</td>
|
||||||
<td width="60%"> Successful</td>
|
<td width="60%"> Design Rule Checking Failed</td>
|
||||||
</tr>
|
</tr>
|
||||||
<tr>
|
<tr>
|
||||||
<td width="40%"> <b>Software Version</b>
|
<td width="40%"> <b>Software Version</b>
|
||||||
@@ -30,7 +30,7 @@
|
|||||||
<tr>
|
<tr>
|
||||||
<td width="40%"> <b>Date</b>
|
<td width="40%"> <b>Date</b>
|
||||||
</td>
|
</td>
|
||||||
<td width="60%"> 12-28-2016, 11:59PM</td>
|
<td width="60%"> 12-29-2016, 2:55PM</td>
|
||||||
</tr>
|
</tr>
|
||||||
</table></span><br><span id="sumres" class="pgRef"><h5 align="center">RESOURCES SUMMARY</h5>
|
</table></span><br><span id="sumres" class="pgRef"><h5 align="center">RESOURCES SUMMARY</h5>
|
||||||
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
|
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
|
||||||
@@ -42,11 +42,11 @@
|
|||||||
<th width="20%">Function Block Inputs Used</th>
|
<th width="20%">Function Block Inputs Used</th>
|
||||||
</tr>
|
</tr>
|
||||||
<tr>
|
<tr>
|
||||||
<td width="20%" align="center">134/144 (94%)</td>
|
<td width="20%" align="center">72/144 (50%)</td>
|
||||||
<td width="20%" align="center">378/720 (53%)</td>
|
<td width="20%" align="center">147/720 (21%)</td>
|
||||||
<td width="20%" align="center">45/144 (32%)</td>
|
<td width="20%" align="center">4/144 (3%)</td>
|
||||||
<td width="20%" align="center">105/117 (90%)</td>
|
<td width="20%" align="center">105/117 (90%)</td>
|
||||||
<td width="20%" align="center">285/432 (66%)</td>
|
<td width="20%" align="center">120/432 (28%)</td>
|
||||||
</tr>
|
</tr>
|
||||||
</table></span><br><span id="pinres" class="pgRef"><h5 align="center">PIN RESOURCES</h5>
|
</table></span><br><span id="pinres" class="pgRef"><h5 align="center">PIN RESOURCES</h5>
|
||||||
<table align="center" width="90%" border="0" cellspacing="0" cellpadding="0"><tr>
|
<table align="center" width="90%" border="0" cellspacing="0" cellpadding="0"><tr>
|
||||||
@@ -83,7 +83,7 @@
|
|||||||
</tr>
|
</tr>
|
||||||
<tr>
|
<tr>
|
||||||
<td width="33%"> GSR</td>
|
<td width="33%"> GSR</td>
|
||||||
<td width="33%" align="center"> 1</td>
|
<td width="33%" align="center"> 0</td>
|
||||||
<td width="33%" align="center"> 1</td>
|
<td width="33%" align="center"> 1</td>
|
||||||
</tr>
|
</tr>
|
||||||
</table></td>
|
</table></td>
|
||||||
@@ -116,14 +116,24 @@
|
|||||||
</tr>
|
</tr>
|
||||||
</table></td>
|
</table></td>
|
||||||
</tr></table></span><br><span id="glbres" class="pgRef"><h5 align="center">GLOBAL RESOURCES</h5>
|
</tr></table></span><br><span id="glbres" class="pgRef"><h5 align="center">GLOBAL RESOURCES</h5>
|
||||||
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0"><tr>
|
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
|
||||||
<td width="50%"> Signal mapped onto global output enable net (GSR)</td>
|
<tr>
|
||||||
<td width="50%"> RESET</td>
|
<td width="50%"> Global clock net(s) used</td>
|
||||||
</tr></table></span><br><span id="pwrres" class="pgRef"><h5 align="center">POWER DATA</h5>
|
<td width="50%"> 0</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> Global output enable net(s) used</td>
|
||||||
|
<td width="50%"> 0</td>
|
||||||
|
</tr>
|
||||||
|
<tr>
|
||||||
|
<td width="50%"> Global set/rest net(s) used</td>
|
||||||
|
<td width="50%"> 0</td>
|
||||||
|
</tr>
|
||||||
|
</table></span><br><span id="pwrres" class="pgRef"><h5 align="center">POWER DATA</h5>
|
||||||
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
|
<table align="center" width="90%" border="1" cellspacing="0" cellpadding="0">
|
||||||
<tr>
|
<tr>
|
||||||
<td width="50%"> Macrocells in high performance mode (MCHP)</td>
|
<td width="50%"> Macrocells in high performance mode (MCHP)</td>
|
||||||
<td width="50%"> 134</td>
|
<td width="50%"> 72</td>
|
||||||
</tr>
|
</tr>
|
||||||
<tr>
|
<tr>
|
||||||
<td width="50%"> Macrocells in low power mode (MCLP)</td>
|
<td width="50%"> Macrocells in low power mode (MCLP)</td>
|
||||||
@@ -131,7 +141,7 @@
|
|||||||
</tr>
|
</tr>
|
||||||
<tr>
|
<tr>
|
||||||
<td width="50%"> Total macrocells used (MC)</td>
|
<td width="50%"> Total macrocells used (MC)</td>
|
||||||
<td width="50%"> 134</td>
|
<td width="50%"> 72</td>
|
||||||
</tr>
|
</tr>
|
||||||
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
|
</table></span><form><span class="pgRef"><table width="90%" align="center"><tr>
|
||||||
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
|
<td align="left"><input type="button" onclick="javascript:parent.leftnav.showTop()" onmouseover="window.status='goto top of page'; return true;" onmouseout="window.status=''" value="back to top"></td>
|
||||||
|
|||||||
@@ -1,17 +1,7 @@
|
|||||||
<!doctype html public "-//w3c//dtd html 4.0 transitional//en">
|
|
||||||
<html>
|
<html>
|
||||||
<head>
|
<head>
|
||||||
<meta http-equiv="Content-Type" content="text/html; charset=iso-8859-1">
|
<meta http-equiv="Content-Type" content="text/html; charset=UTF-8">
|
||||||
<title>genmsg</title>
|
<link rel="stylesheet" type="text/css" href="style.css">
|
||||||
</head>
|
</head>
|
||||||
<body>
|
<body class="pgBgnd"><center><h3>Processing...</h3></center></body>
|
||||||
|
|
||||||
<br>
|
|
||||||
<dl>
|
|
||||||
<dd>
|
|
||||||
This file is currently being generated. Please recheck the link after some
|
|
||||||
time for this report data.</dd>
|
|
||||||
</dl>
|
|
||||||
|
|
||||||
</body>
|
|
||||||
</html>
|
</html>
|
||||||
|
|||||||
@@ -5,7 +5,7 @@
|
|||||||
The structure and the elements are likely to change over the next few releases.
|
The structure and the elements are likely to change over the next few releases.
|
||||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||||
|
|
||||||
<application stringID="NgdBuild" timeStamp="Wed Dec 28 23:58:23 2016">
|
<application stringID="NgdBuild" timeStamp="Thu Dec 29 14:55:40 2016">
|
||||||
<section stringID="User_Env">
|
<section stringID="User_Env">
|
||||||
<table stringID="User_EnvVar">
|
<table stringID="User_EnvVar">
|
||||||
<column stringID="variable"/>
|
<column stringID="variable"/>
|
||||||
|
|||||||
@@ -1,7 +1,7 @@
|
|||||||
Release 8.1i - Fit P.68d
|
Release 8.1i - Fit P.68d
|
||||||
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
|
Copyright(c) 1995-2003 Xilinx Inc. All rights reserved
|
||||||
|
|
||||||
12-28-2016 11:59PM
|
12-29-2016 3:04PM
|
||||||
|
|
||||||
NOTE: This file is designed to be imported into a spreadsheet program
|
NOTE: This file is designed to be imported into a spreadsheet program
|
||||||
such as Microsoft Excel for viewing, printing and sorting. The comma ','
|
such as Microsoft Excel for viewing, printing and sorting. The comma ','
|
||||||
|
|||||||
|
@@ -2,7 +2,7 @@
|
|||||||
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
|
<BODY TEXT='#000000' BGCOLOR='#FFFFFF' LINK='#0000EE' VLINK='#551A8B' ALINK='#FF0000'>
|
||||||
<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
|
<TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
|
||||||
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
|
<TR ALIGN=CENTER BGCOLOR='#99CCFF'>
|
||||||
<TD ALIGN=CENTER COLSPAN='4'><B>LAN_IDE_CP Project Status (12/28/2016 - 23:58:25)</B></TD></TR>
|
<TD ALIGN=CENTER COLSPAN='4'><B>LAN_IDE_CP Project Status (12/29/2016 - 14:55:41)</B></TD></TR>
|
||||||
<TR ALIGN=LEFT>
|
<TR ALIGN=LEFT>
|
||||||
<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
|
<TD BGCOLOR='#FFFF99'><B>Project File:</B></TD>
|
||||||
<TD>LAN_IDE.xise</TD>
|
<TD>LAN_IDE.xise</TD>
|
||||||
@@ -65,9 +65,9 @@ System Settings</A>
|
|||||||
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
|
<TR ALIGN=CENTER BGCOLOR='#99CCFF'><TD ALIGN=CENTER COLSPAN='6'><B>Detailed Reports</B></TD><TD ALIGN=RIGHT WIDTH='10%'COLSPAN=1> <A HREF_DISABLED="?&ExpandedTable=DetailedReports"><B>[-]</B></a></TD></TR>
|
||||||
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
|
<TR BGCOLOR='#FFFF99'><TD><B>Report Name</B></TD><TD><B>Status</B></TD><TD><B>Generated</B></TD>
|
||||||
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
|
<TD ALIGN=LEFT><B>Errors</B></TD><TD ALIGN=LEFT><B>Warnings</B></TD><TD ALIGN=LEFT COLSPAN='2'><B>Infos</B></TD></TR>
|
||||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Mi 28. Dez 23:58:16 2016</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Warning'>13 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
|
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.syr'>Synthesis Report</A></TD><TD>Current</TD><TD>Do 29. Dez 14:55:32 2016</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/xst.xmsgs?&DataKey=Warning'>13 Warnings (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
|
||||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.bld'>Translation Report</A></TD><TD>Current</TD><TD>Mi 28. Dez 23:58:23 2016</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>1 Warning (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
|
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.bld'>Translation Report</A></TD><TD>Current</TD><TD>Do 29. Dez 14:55:40 2016</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/ngdbuild.xmsgs?&DataKey=Warning'>1 Warning (0 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'>0</TD></TR>
|
||||||
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Current</TD><TD>Mi 28. Dez 23:58:39 2016</TD><TD ALIGN=LEFT><font color="red"; face="Arial"><b>X </b></font><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Error'>2 Errors (2 new)</A></TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>12 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>1 Info (1 new)</A></TD></TR>
|
<TR ALIGN=LEFT><TD><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\LAN_IDE_CP.rpt'>CPLD Fitter Report (Text)</A></TD><TD>Out of Date</TD><TD>Mi 28. Dez 23:59:25 2016</TD><TD ALIGN=LEFT>0</TD><TD ALIGN=LEFT><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Warning'>13 Warnings (1 new)</A></TD><TD ALIGN=LEFT COLSPAN='2'><A HREF_DISABLED='C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\_xmsgs/cpldfit.xmsgs?&DataKey=Info'>1 Info (1 new)</A></TD></TR>
|
||||||
<TR ALIGN=LEFT><TD>Power Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>
|
<TR ALIGN=LEFT><TD>Power Report</TD><TD> </TD><TD> </TD><TD> </TD><TD> </TD><TD COLSPAN='2'> </TD></TR>
|
||||||
</TABLE>
|
</TABLE>
|
||||||
<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
|
<BR><TABLE BORDER CELLSPACING=0 CELLPADDING=3 WIDTH='100%'>
|
||||||
@@ -77,5 +77,5 @@ System Settings</A>
|
|||||||
</TABLE>
|
</TABLE>
|
||||||
|
|
||||||
|
|
||||||
<br><center><b>Date Generated:</b> 12/28/2016 - 23:58:43</center>
|
<br><center><b>Date Generated:</b> 12/29/2016 - 14:55:41</center>
|
||||||
</BODY></HTML>
|
</BODY></HTML>
|
||||||
@@ -5,7 +5,7 @@
|
|||||||
The structure and the elements are likely to change over the next few releases.
|
The structure and the elements are likely to change over the next few releases.
|
||||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||||
|
|
||||||
<application stringID="Xst" timeStamp="Wed Dec 28 23:58:08 2016">
|
<application stringID="Xst" timeStamp="Thu Dec 29 14:55:24 2016">
|
||||||
<section stringID="User_Env">
|
<section stringID="User_Env">
|
||||||
<table stringID="User_EnvVar">
|
<table stringID="User_EnvVar">
|
||||||
<column stringID="variable"/>
|
<column stringID="variable"/>
|
||||||
|
|||||||
@@ -1,2 +1,2 @@
|
|||||||
C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1482965896
|
C:\Users\Matze\Amiga\Hardwarehacks\Zorro-LAN-IDE\Logic\LAN_IDE\LAN_IDE_CP.ngc 1483019732
|
||||||
OK
|
OK
|
||||||
|
|||||||
@@ -1,9 +1,9 @@
|
|||||||
<?xml version='1.0' encoding='UTF-8'?>
|
<?xml version='1.0' encoding='UTF-8'?>
|
||||||
<report-views version="2.0" >
|
<report-views version="2.0" >
|
||||||
<header>
|
<header>
|
||||||
<DateModified>2016-12-28T23:09:32</DateModified>
|
<DateModified>2016-12-29T15:00:34</DateModified>
|
||||||
<ModuleName>LAN_IDE_CP</ModuleName>
|
<ModuleName>LAN_IDE_CP</ModuleName>
|
||||||
<SummaryTimeStamp>2016-12-28T23:09:26</SummaryTimeStamp>
|
<SummaryTimeStamp>2016-12-29T14:55:41</SummaryTimeStamp>
|
||||||
<SavedFilePath>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/iseconfig/LAN_IDE_CP.xreport</SavedFilePath>
|
<SavedFilePath>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/iseconfig/LAN_IDE_CP.xreport</SavedFilePath>
|
||||||
<ImplementationReportsDirectory>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\</ImplementationReportsDirectory>
|
<ImplementationReportsDirectory>C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE\</ImplementationReportsDirectory>
|
||||||
<DateInitialized>2016-12-13T22:08:29</DateInitialized>
|
<DateInitialized>2016-12-13T22:08:29</DateInitialized>
|
||||||
|
|||||||
@@ -3,7 +3,7 @@
|
|||||||
<!--The data in this file is primarily intended for consumption by Xilinx tools.
|
<!--The data in this file is primarily intended for consumption by Xilinx tools.
|
||||||
The structure and the elements are likely to change over the next few releases.
|
The structure and the elements are likely to change over the next few releases.
|
||||||
This means code written to parse this file will need to be revisited each subsequent release.-->
|
This means code written to parse this file will need to be revisited each subsequent release.-->
|
||||||
<application name="pn" timeStamp="Wed Dec 28 23:58:07 2016">
|
<application name="pn" timeStamp="Thu Dec 29 14:55:23 2016">
|
||||||
<section name="Project Information" visible="false">
|
<section name="Project Information" visible="false">
|
||||||
<property name="ProjectID" value="D176CAD312EA42C990C709B74E81AC07" type="project"/>
|
<property name="ProjectID" value="D176CAD312EA42C990C709B74E81AC07" type="project"/>
|
||||||
<property name="ProjectIteration" value="0" type="project"/>
|
<property name="ProjectIteration" value="0" type="project"/>
|
||||||
|
|||||||
Binary file not shown.
@@ -1,2 +1,2 @@
|
|||||||
AR lan_ide_cp behavioral C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd sub00/vhpl01 1482965889
|
AR lan_ide_cp behavioral C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd sub00/vhpl01 1483019725
|
||||||
EN lan_ide_cp NULL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd sub00/vhpl00 1482965888
|
EN lan_ide_cp NULL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd sub00/vhpl00 1483019724
|
||||||
|
|||||||
@@ -1,8 +1,8 @@
|
|||||||
V3 3
|
V3 3
|
||||||
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd 2016/12/28.23:58:05 P.68d
|
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd 2016/12/29.14:55:21 P.68d
|
||||||
EN work/LAN_IDE_CP 1482965888 \
|
EN work/LAN_IDE_CP 1483019724 \
|
||||||
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd \
|
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd \
|
||||||
PB ieee/std_logic_1164 1370735607
|
PB ieee/std_logic_1164 1370735607
|
||||||
AR work/LAN_IDE_CP/Behavioral 1482965889 \
|
AR work/LAN_IDE_CP/Behavioral 1483019725 \
|
||||||
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd \
|
FL C:/Users/Matze/Amiga/Hardwarehacks/Zorro-LAN-IDE/Logic/LAN_IDE/LAN_IDE_CP.vhd \
|
||||||
EN work/LAN_IDE_CP 1482965888
|
EN work/LAN_IDE_CP 1483019724
|
||||||
|
|||||||
Binary file not shown.
Binary file not shown.
Reference in New Issue
Block a user