Structure ready

2016-12-14 21:36:52 +01:00
parent dc619185b5
commit 1440afbeeb
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+----------------------------------------------------------------------------------
+-- Company: 
+-- Engineer: 
+-- 
+-- Create Date:    22:08:29 12/13/2016 
+-- Design Name: 
+-- Module Name:    LAN_IDE_CP - Behavioral 
+-- Project Name: 
+-- Target Devices: 
+-- Tool versions: 
+-- Description: 
+--
+-- Dependencies: 
+--
+-- Revision: 
+-- Revision 0.01 - File Created
+-- Additional Comments: 
+--
+----------------------------------------------------------------------------------
+library IEEE;
+use IEEE.STD_LOGIC_1164.ALL;
+
+-- Uncomment the following library declaration if using
+-- arithmetic functions with Signed or Unsigned values
+--use IEEE.NUMERIC_STD.ALL;
+
+-- Uncomment the following library declaration if instantiating
+-- any Xilinx primitives in this code.
+--library UNISIM;
+--use UNISIM.VComponents.all;
+
+entity LAN_IDE_CP is
+    Port ( A : inout  STD_LOGIC_VECTOR (23 downto 0);
+           D : inout  STD_LOGIC_VECTOR (15 downto 0);
+           DQ : inout  STD_LOGIC_VECTOR (15 downto 0);
+           A_LAN : out  STD_LOGIC_VECTOR (13 downto 0);
+           OWN : out  STD_LOGIC;
+           SLAVE : out  STD_LOGIC;
+           CFOUT : out  STD_LOGIC;
+           CFIN : in  STD_LOGIC;
+           C1 : in  STD_LOGIC;
+           C3 : in  STD_LOGIC;
+           MTCR : in  STD_LOGIC;
+           OVR : out  STD_LOGIC;
+           BERR : in  STD_LOGIC;
+           MTACK : out  STD_LOGIC;
+           DS0 : in  STD_LOGIC;
+           DTACK : out  STD_LOGIC;
+           UDS : in  STD_LOGIC;
+           LDS : in  STD_LOGIC;
+           AS : in  STD_LOGIC;
+           Z3 : in  STD_LOGIC;
+           DS1 : in  STD_LOGIC;
+           FCS : in  STD_LOGIC;
+           LAN_EN : out  STD_LOGIC;
+           AUTOBOOT_OFF : in  STD_LOGIC;
+           CP_RD : out  STD_LOGIC;
+           CP_WE : out  STD_LOGIC;
+           ROM_B : out  STD_LOGIC_VECTOR (1 downto 0);
+           ROM_OE : out  STD_LOGIC;
+           CP_CS : out  STD_LOGIC;
+           IDE_WAIT : in  STD_LOGIC;
+           INT_OUT : out  STD_LOGIC;
+           CP_IRQ : in  STD_LOGIC;
+           CLK_EXT : in  STD_LOGIC;
+           IDE_W : out  STD_LOGIC;
+           IDE_R : out  STD_LOGIC;
+           IDE_A : out  STD_LOGIC_VECTOR (2 downto 0);
+           IDE_CS : out  STD_LOGIC_VECTOR (1 downto 0);
+           LAN_CFG : out  STD_LOGIC_VECTOR (4 downto 1);
+           RESET : in  STD_LOGIC;
+           LAN_RD : out  STD_LOGIC;
+           LAN_CS : out  STD_LOGIC;
+           LAN_WRH : out  STD_LOGIC;
+           LAN_INT : in  STD_LOGIC);
+end LAN_IDE_CP;
+
+architecture Behavioral of LAN_IDE_CP is
+
+begin
+
+
+end Behavioral;
+