CP working in Z3 and driver update
A fix for int6 is needed for the first proto: Connect SJ1 right with INT6-Pad. But CP and lan are not working with AmiTCP
This commit is contained in:
MHeinrichs
@@ -64,6 +64,12 @@ PRIORITY=PRI/K/N,BPS/K/N,MTU/K/N,FULLDUPLEX/S,FLOWCONTROL/S,TIMER/K/N,MULTICAST/
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Changelog:
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----------
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2.00 - improved RX speed for buffer wraparound cases
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- some more safety checks for boards with unresponsive
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ENC chips (explicit card bus clear before verification of
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chip presence)
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- version bump
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1.99 - fixed soft reset for ZIII firmware
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- re-enabled 32 Bit Buffer copies (unless Miami is active)
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- default server task priority for AmiTCP=6 (otherwise 0)
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@@ -188,6 +188,14 @@ TIMER/K/N,MULTICAST/S
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Changelog:
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----------
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2.00 - parse Vampire 4 UUID for MAC auto-assignment
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- version bump
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1.99 - re-enabled 32 Bit Buffer copies (unless Miami is active)
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- default server task priority for AmiTCP=6 (otherwise 0)
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- tuned RX/TX balancing to make RoadShow happy
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- added Packet Filter hook processing (needs testing)
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1.95 - workaround for MiamiDX bugs, 32 Bit Buffer copy routines could not be
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used safely with it.
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@@ -162,11 +162,11 @@ ASM SAVEDS LONG DevOpen( ASMR(a1) struct IOSana2Req *ioreq ASMREG(a1),
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if( (db->db_Units[unit].du_OpenCount > 0) &&
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(flags & SANA2OPF_MINE) )
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ok = 0;
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#if 0
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if( (db->db_Units[unit].du_OpenCount > 0) &&
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(flags & SANA2OPF_PROM) )
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ok = 0;
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#endif
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if( db->db_Units[unit].du_Flags & DUF_EXCLUSIVE )
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ok = 0;
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@@ -215,6 +215,8 @@ ASM SAVEDS LONG DevOpen( ASMR(a1) struct IOSana2Req *ioreq ASMREG(a1),
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dbm->dbm_CopyFromBuffer32 = (BMCALL)((void (*)())(GetTagData(S2_CopyFromBuff32, 0,
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(struct TagItem *)ioreq->ios2_BufferManagement)));
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}
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D(("BufferMgmt CBuf32 %lx PF %lx CBuf %lx\n",(ULONG)dbm->dbm_CopyFromBuffer32,(ULONG)dbm->dbm_PacketFilter,(ULONG)dbm->dbm_CopyFromBuffer));
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if( !dbm->dbm_CopyToBuffer32 )
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dbm->dbm_CopyToBuffer32 = dbm->dbm_CopyToBuffer;
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@@ -6,7 +6,9 @@
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; - device in Mode 3, i.e. 16 Bit access
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; - register addresses shifted by 1 left, i.e. register base * 2 compared
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; to 16 Bit mode of ENC624J600 documentation (8 Bit mode alike)
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; - some byte shuffling required - which currently is in a state of flux
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; - in initial hardware/software combinations there was some byte
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; shuffling required - whose consequence is encapsulation of hardware
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; accesses in macros
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;
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; Note: This code is in some places intentionally saving more registers than
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; required by the AmigaOS ABI.
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@@ -376,8 +378,9 @@ _enc624j6l_CheckBoard: ;check whether board is operating correctly
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; ----------------- quick check for operational mode ------------------
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move.w #$1234,d1
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WRITEREG EUDAST,a0,d1 ;write data
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tst.l 4.w ;clear BUS
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READREG EUDAST,a0,d0
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moveq #0,d0
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SETREG EUDAST,a0,d0 ;clear ENC's bus (does not change anything in its regs)
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READREG EUDAST,a0,d0 ;
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cmp.w d0,d1 ;do we get the register back ?
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bne.s .err ;no -> complain
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@@ -1296,6 +1299,52 @@ _enc624j6l_RecvFrame: ;
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bra.s .end_read
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.nooptrecv:
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ifeq _OPT_BUFFER_SWAP ;1
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;
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;wraparound aware loop for big endian buffer
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;
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move.w #RXSTOP_INIT+1,d1 ;end address $6000
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lea (a0,d7.w),a2 ;read pointer
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sub.w d7,d1 ;minus start pointer = number of bytes until wrap
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cmp.w d0,d1 ;
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bhi.s .emergency_slow ;don`t trust anyone: if d1<0 or >total_length, then branch to slow routine
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move d1,d2
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lsr #2,d2 ;we copy long words
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subq #1,d2 ;dbf
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blt.s .nowords_beforewrap ;
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.loop_beforewrap:
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move.l (a2)+,(a1)+
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dbf d2,.loop_beforewrap
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.nowords_beforewrap: ;
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btst #1,d7 ;uneven longword address before wraparound ?
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beq.s .copy_afterwrap
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move.w (a2)+,(a1)+ ;copy word from uneven address
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.copy_afterwrap:
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move #RXSTART_INIT,d7 ;wrap
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lea (a0,d7.w),a2 ;read pointer
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move d0,d2 ;total bytes to read
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sub.w d1,d2 ;remaining=total-copied (D1=RXSTOP_INIT+1-D7)
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ble.s .end_read ;done, if zero
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move d2,d1 ;
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lsr #2,d2 ;we copy long words
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bra.s .enter_afterwrap
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.loop_afterwrap:
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move.l (a2)+,(a1)+
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.enter_afterwrap:
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dbf d2,.loop_afterwrap
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and.b #3,d1 ;btst #1,d1 ;1 byte or short remaining ?
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beq.s .end_read
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move.w (a2)+,(a1)+
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bra.s .end_read
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.emergency_slow:
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endc ;_OPT_BUFFER_SWAP
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endc ;_OPT_RECV
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;generic loop: check for position overflows with each word
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@@ -1427,7 +1476,7 @@ _enc624j6l_TransmitFrame:
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move.l (a1)+,(a2)+ ;save to SRAM
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endr
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move.l (a1)+,d1
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dbf d5,.largecopy
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dbf d5,.largecopy
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move.l d1,(a2)+
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@@ -1479,7 +1528,7 @@ _enc624j6l_TransmitFrame:
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;100 MBit/s frame time is max. 0.12 ms (without inter-frame spacing)
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;wait 20 us via CIA
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moveq #120,d0
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moveq #20,d0
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bsr _enc624j6l_UMinDelay
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dbf d3,.txwait ;approx. 4ms max. wait
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@@ -1,3 +1,4 @@
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;APS00000000000000000000000000000000000000000000000000000000000000000000000000000000
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; ------------------------------------------------------------------------------
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; | Flash ROM Read Serial Number |
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; | Copyright (c) 2016 APOLLO TEAM |
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@@ -21,6 +22,10 @@ FLASH_MISOn EQU $0
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;VAMPIRE_MAGIC EQU ascii "Vamp"
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VAMPIRE_MAGIC EQU $56616D70
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VAMPIDREG EQU $DFF3FC
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V4_ID1 EQU $DFF3F4
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V4_ID2 EQU $DFF3F0
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xdef _vampire_UUID
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;-------- Get 64 Bit unique ID --------------------
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@@ -31,13 +36,23 @@ VAMPIRE_MAGIC EQU $56616D70
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; >0 - success
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_vampire_UUID:
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movem.l d1-a6,-(sp) ;lazy register store
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lea VAMPIDREG,a0
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move.w (a0),d0 ;ID reg empty?
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blt.s v2$ ;yes, try flash method
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cmp.w #$2FF,d0 ;Core type << 8 | Clock_Multiplier
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ble.s v2$
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move.l V4_ID1-VAMPIDREG(a0),d0
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move.l V4_ID2-VAMPIDREG(a0),d1
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bra.s common$
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v2$
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bsr flashreadid
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cmpi.b #FLASH_ID,d0
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bne.s error$
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bsr flashuniqueid
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common$
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move.l d0,(a1)
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move.l d1,4(a1)
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@@ -35,6 +35,10 @@ static LONG server_queryext( DEVBASEP, ULONG unit, struct IOSana2Req *ioreq );
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*/
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#define S2QUERYEXT_NOLENGTHCHECK
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/* this limits the number of write requests per run, also improves
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Roadshow performance when active */
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#define ONE_WRITE_REQ
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/* (avoid external link libraries) this call is not time critical */
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static void MemSet( void *a, ULONG val, ULONG size )
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@@ -684,7 +688,7 @@ static LONG server_writequeue( DEVBASEP, ULONG unit )
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ObtainSemaphore( &db->db_Units[unit].du_Sem );
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#if 1
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#if 1 /* #ifdef ONE_WRITE_REQ */
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/* whole queue per call */
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for( ioreq = (struct IOSana2Req *)db->db_Units[unit].du_WriteQueue.lh_Head;
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(nextio= (struct IOSana2Req *)ioreq->ios2_Req.io_Message.mn_Node.ln_Succ);
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@@ -726,8 +730,10 @@ static LONG server_writequeue( DEVBASEP, ULONG unit )
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/* error handling */
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server_writeerror( db, unit, ioreq, code );
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}
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#ifdef ONE_WRITE_REQ
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if( hw_recv_pending(db,unit) )
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break;
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#endif
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}
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ReleaseSemaphore( &db->db_Units[unit].du_Sem );
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@@ -154,7 +154,7 @@ v2expeth.device: $(OBJECTS)
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-$(LD) $(OBJECTS) LIB sc:lib/sc.lib $(LDFLAGS) TO $(DEVICEID)
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clean:
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-$(RM) sdnet.device v2expeth.device \#?.oex *.osd $(SUBDIR)/\#?.oex $(SUBDIR)/\#?.osd
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-$(RM) sdnet.device v2expeth.device \#?.oex \#?.osd $(SUBDIR)/\#?.oex $(SUBDIR)/\#?.osd
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install:
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copy sdnet.device v2expeth.device DEVS:Networks
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@@ -154,7 +154,7 @@ enc624j6net.device_68000: $(OBJECTS)
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-$(LD) $(OBJECTS) LIB sc:lib/sc.lib $(LDFLAGS) TO $(DEVICEID)_68000
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clean:
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-$(RM) enc624j6net.device enc624j6net.device_68000 \#?.o00 *.o20 $(SUBDIR)/\#?.o00 $(SUBDIR)/\#?.o20
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-$(RM) enc624j6net.device enc624j6net.device_68000 \#?.o00 \#?.o20 $(SUBDIR)/\#?.o00 $(SUBDIR)/\#?.o20
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install:
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copy enc624j6net.device DEVS:Networks
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@@ -8,9 +8,10 @@
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#ifndef _INC_VERSION_H
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#define _INC_VERSION_H
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#define DEVICEVERSION 1
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#define DEVICEREVISION 99
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#define DEVICEEXTRA Beta
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#define DEVICEDATE 08.01.2019
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#define DEVICEVERSION 2
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#define DEVICEREVISION 0
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#define DEVICEEXTRA
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/* #define DEVICEEXTRA Beta */
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#define DEVICEDATE 13.01.2019
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#endif
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