Equations

********** Mapped Logic **********
$OpTx$FX_DC$19 <= ((RESET AND NOT A(6) AND NOT A(5))
      OR (RESET AND NOT A(6) AND NOT A(4) AND A(2))
      OR (RESET AND NOT A(5) AND NOT A(4) AND NOT A(2)));
$OpTx$FX_DC$28 <= (AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0));
$OpTx$FX_DC$33 <= (NOT A(1) AND A(2));
$OpTx$FX_DC$36 <= ((
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2 AND NOT $OpTx$FX_DC$19)
      OR (A(5) AND A(1) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (A(3) AND NOT A(4) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (A(3) AND A(1) AND NOT A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2));
$OpTx$FX_DC$6 <= (UDS AND LDS);
$OpTx$FX_DC$8 <= (AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0));
$OpTx$INV$5 <= ((RW AND LAN_CS AND NOT $OpTx$FX_DC$6)
      OR (RW AND NOT CP_CS AND NOT $OpTx$FX_DC$6));
FDCPE_AUTO_CONFIG_DONE0: FDCPE port map (AUTO_CONFIG_DONE(0),AUTO_CONFIG_DONE_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     AUTO_CONFIG_DONE_D(0) <= ((AS AND RESET AND AUTO_CONFIG_DONE_CYCLE(0))
      OR (NOT AS AND RESET AND AUTO_CONFIG_DONE(0)));
FDCPE_AUTO_CONFIG_DONE1: FDCPE port map (AUTO_CONFIG_DONE(1),AUTO_CONFIG_DONE_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     AUTO_CONFIG_DONE_D(1) <= ((AS AND RESET AND AUTO_CONFIG_DONE_CYCLE(1))
      OR (NOT AS AND RESET AND AUTO_CONFIG_DONE(1)));
FTCPE_AUTO_CONFIG_DONE_CYCLE0: FTCPE port map (AUTO_CONFIG_DONE_CYCLE(0),AUTO_CONFIG_DONE_CYCLE_T(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     AUTO_CONFIG_DONE_CYCLE_T(0) <= ((RESET AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2 AND N32/N32_D2)
      OR (NOT RESET AND AUTO_CONFIG_DONE_CYCLE(0) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2));
FTCPE_AUTO_CONFIG_DONE_CYCLE1: FTCPE port map (AUTO_CONFIG_DONE_CYCLE(1),AUTO_CONFIG_DONE_CYCLE_T(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     AUTO_CONFIG_DONE_CYCLE_T(1) <= ((NOT RESET AND AUTO_CONFIG_DONE_CYCLE(1) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (RESET AND AUTO_CONFIG_DONE_CYCLE(0) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2 AND N32/N32_D2));
AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2 <= ((NOT RESET)
      OR (NOT AS AND autoconfig AND NOT $OpTx$FX_DC$6));
A_LAN(0) <= A(1);
A_LAN(1) <= A(2);
A_LAN(2) <= A(3);
A_LAN(3) <= A(4);
A_LAN(4) <= A(5);
A_LAN(5) <= A(6);
A_LAN(6) <= A(7);
A_LAN(7) <= A(8);
A_LAN(8) <= A(9);
A_LAN(9) <= A(10);
A_LAN(10) <= A(11);
A_LAN(11) <= A(12);
A_LAN(12) <= A(13);
A_LAN(13) <= A(14);
CFOUT <= '1';
FDCPE_CP_BASEADR0: FDCPE port map (CP_BASEADR(0),CP_BASEADR_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     CP_BASEADR_D(0) <= ((RESET AND NOT CP_BASEADR(0) AND
      NOT CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(8).PIN AND
      CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2));
FDCPE_CP_BASEADR1: FDCPE port map (CP_BASEADR(1),CP_BASEADR_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     CP_BASEADR_D(1) <= ((RESET AND NOT CP_BASEADR(1) AND
      NOT CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(9).PIN AND
      CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2));
FDCPE_CP_BASEADR2: FDCPE port map (CP_BASEADR(2),CP_BASEADR_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     CP_BASEADR_D(2) <= ((RESET AND NOT CP_BASEADR(2) AND
      NOT CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(10).PIN AND
      CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2));
FDCPE_CP_BASEADR3: FDCPE port map (CP_BASEADR(3),CP_BASEADR_D(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     CP_BASEADR_D(3) <= ((RESET AND NOT CP_BASEADR(3) AND
      NOT CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(11).PIN AND
      CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2));
FDCPE_CP_BASEADR4: FDCPE port map (CP_BASEADR(4),CP_BASEADR_D(4),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     CP_BASEADR_D(4) <= ((RESET AND NOT CP_BASEADR(4) AND
      NOT CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(12).PIN AND
      CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2));
FDCPE_CP_BASEADR5: FDCPE port map (CP_BASEADR(5),CP_BASEADR_D(5),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     CP_BASEADR_D(5) <= ((RESET AND NOT CP_BASEADR(5) AND
      NOT CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(13).PIN AND
      CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2));
FDCPE_CP_BASEADR6: FDCPE port map (CP_BASEADR(6),CP_BASEADR_D(6),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     CP_BASEADR_D(6) <= ((RESET AND NOT CP_BASEADR(6) AND
      NOT CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(14).PIN AND
      CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2));
FDCPE_CP_BASEADR7: FDCPE port map (CP_BASEADR(7),CP_BASEADR_D(7),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     CP_BASEADR_D(7) <= ((RESET AND NOT CP_BASEADR(7) AND
      NOT CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(15).PIN AND
      CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2));
CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2 <= ((NOT RESET)
      OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND
      AUTO_CONFIG_DONE(0) AND SHUT_UP(1) AND autoconfig AND A(6) AND NOT A(5) AND A(3) AND
      NOT A(4) AND NOT A(1) AND NOT A(2) AND NOT $OpTx$FX_DC$6));
FDCPE_CP_CS: FDCPE port map (CP_CS,CP_CS_D,NOT SHUT_UP(2)/SHUT_UP(2)_CLKF,'0',NOT lan/lan_RSTF);
     CP_CS_D <= ((SHUT_UP(1))
      OR (CP_BASEADR(3) AND NOT A(19))
      OR (NOT CP_BASEADR(3) AND A(19))
      OR (CP_BASEADR(5) AND NOT A(21))
      OR (NOT CP_BASEADR(5) AND A(21))
      OR (CP_BASEADR(6) AND NOT A(22))
      OR (EXP23_.EXP)
      OR (CP_BASEADR(0) AND NOT A(16))
      OR (NOT CP_BASEADR(0) AND A(16))
      OR (NOT CP_BASEADR(6) AND A(22))
      OR (CP_BASEADR(7) AND NOT A(23))
      OR (NOT CP_BASEADR(7) AND A(23))
      OR (CP_BASEADR(4) AND NOT A(20))
      OR (NOT CP_BASEADR(4) AND A(20)));
CP_RD <= NOT ((NOT AS AND NOT CP_RD_S));
FDCPE_CP_RD_S: FDCPE port map (CP_RD_S,CP_RD_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     CP_RD_S_D <= (RW AND RESET AND NOT CP_CS AND NOT $OpTx$FX_DC$6);
CP_WE <= NOT ((NOT AS AND NOT CP_WE_S));
FDCPE_CP_WE_S: FDCPE port map (CP_WE_S,CP_WE_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     CP_WE_S_D <= (NOT RW AND RESET AND NOT CP_CS AND NOT $OpTx$FX_DC$6);
D_I(0) <= NOT ((NOT DQ(0).PIN AND $OpTx$INV$5));
     D(0) <= D_I(0) when D_OE(0) = '1' else 'Z';
     D_OE(0) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(1) <= NOT ((NOT DQ(1).PIN AND $OpTx$INV$5));
     D(1) <= D_I(1) when D_OE(1) = '1' else 'Z';
     D_OE(1) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(2) <= NOT ((NOT DQ(2).PIN AND $OpTx$INV$5));
     D(2) <= D_I(2) when D_OE(2) = '1' else 'Z';
     D_OE(2) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(3) <= NOT ((NOT DQ(3).PIN AND $OpTx$INV$5));
     D(3) <= D_I(3) when D_OE(3) = '1' else 'Z';
     D_OE(3) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(4) <= NOT ((NOT DQ(4).PIN AND $OpTx$INV$5));
     D(4) <= D_I(4) when D_OE(4) = '1' else 'Z';
     D_OE(4) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(5) <= NOT ((NOT DQ(5).PIN AND $OpTx$INV$5));
     D(5) <= D_I(5) when D_OE(5) = '1' else 'Z';
     D_OE(5) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(6) <= NOT ((NOT DQ(6).PIN AND $OpTx$INV$5));
     D(6) <= D_I(6) when D_OE(6) = '1' else 'Z';
     D_OE(6) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(7) <= NOT ((NOT DQ(7).PIN AND $OpTx$INV$5));
     D(7) <= D_I(7) when D_OE(7) = '1' else 'Z';
     D_OE(7) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(8) <= NOT ((NOT DQ(8).PIN AND $OpTx$INV$5));
     D(8) <= D_I(8) when D_OE(8) = '1' else 'Z';
     D_OE(8) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(9) <= NOT ((NOT DQ(9).PIN AND $OpTx$INV$5));
     D(9) <= D_I(9) when D_OE(9) = '1' else 'Z';
     D_OE(9) <= D_9_IOBUFE/D_9_IOBUFE_TRST;
D_I(10) <= NOT ((NOT DQ(10).PIN AND $OpTx$INV$5));
     D(10) <= D_I(10) when D_OE(10) = '1' else 'Z';
     D_OE(10) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(11) <= NOT ((NOT DQ(11).PIN AND $OpTx$INV$5));
     D(11) <= D_I(11) when D_OE(11) = '1' else 'Z';
     D_OE(11) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(12) <= ((Dout1(0) AND NOT $OpTx$INV$5)
      OR (DQ(12).PIN AND $OpTx$INV$5));
     D(12) <= D_I(12) when D_OE(12) = '1' else 'Z';
     D_OE(12) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(13) <= ((Dout1(1) AND NOT $OpTx$INV$5)
      OR (DQ(13).PIN AND $OpTx$INV$5));
     D(13) <= D_I(13) when D_OE(13) = '1' else 'Z';
     D_OE(13) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(14) <= ((Dout1(2) AND NOT $OpTx$INV$5)
      OR (DQ(14).PIN AND $OpTx$INV$5));
     D(14) <= D_I(14) when D_OE(14) = '1' else 'Z';
     D_OE(14) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
D_I(15) <= ((Dout1(3) AND NOT $OpTx$INV$5)
      OR (DQ(15).PIN AND $OpTx$INV$5));
     D(15) <= D_I(15) when D_OE(15) = '1' else 'Z';
     D_OE(15) <= D_8_IOBUFE/D_8_IOBUFE_TRST;
DQ_I(0) <= D(0).PIN;
     DQ(0) <= DQ_I(0) when DQ_OE(0) = '1' else 'Z';
     DQ_OE(0) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(1) <= D(1).PIN;
     DQ(1) <= DQ_I(1) when DQ_OE(1) = '1' else 'Z';
     DQ_OE(1) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(2) <= D(2).PIN;
     DQ(2) <= DQ_I(2) when DQ_OE(2) = '1' else 'Z';
     DQ_OE(2) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(3) <= D(3).PIN;
     DQ(3) <= DQ_I(3) when DQ_OE(3) = '1' else 'Z';
     DQ_OE(3) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(4) <= D(4).PIN;
     DQ(4) <= DQ_I(4) when DQ_OE(4) = '1' else 'Z';
     DQ_OE(4) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(5) <= D(5).PIN;
     DQ(5) <= DQ_I(5) when DQ_OE(5) = '1' else 'Z';
     DQ_OE(5) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(6) <= D(6).PIN;
     DQ(6) <= DQ_I(6) when DQ_OE(6) = '1' else 'Z';
     DQ_OE(6) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(7) <= D(7).PIN;
     DQ(7) <= DQ_I(7) when DQ_OE(7) = '1' else 'Z';
     DQ_OE(7) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(8) <= D(8).PIN;
     DQ(8) <= DQ_I(8) when DQ_OE(8) = '1' else 'Z';
     DQ_OE(8) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(9) <= D(9).PIN;
     DQ(9) <= DQ_I(9) when DQ_OE(9) = '1' else 'Z';
     DQ_OE(9) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(10) <= D(10).PIN;
     DQ(10) <= DQ_I(10) when DQ_OE(10) = '1' else 'Z';
     DQ_OE(10) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(11) <= D(11).PIN;
     DQ(11) <= DQ_I(11) when DQ_OE(11) = '1' else 'Z';
     DQ_OE(11) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(12) <= D(12).PIN;
     DQ(12) <= DQ_I(12) when DQ_OE(12) = '1' else 'Z';
     DQ_OE(12) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(13) <= D(13).PIN;
     DQ(13) <= DQ_I(13) when DQ_OE(13) = '1' else 'Z';
     DQ_OE(13) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(14) <= D(14).PIN;
     DQ(14) <= DQ_I(14) when DQ_OE(14) = '1' else 'Z';
     DQ_OE(14) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DQ_I(15) <= D(15).PIN;
     DQ(15) <= DQ_I(15) when DQ_OE(15) = '1' else 'Z';
     DQ_OE(15) <= (NOT RW AND NOT $OpTx$FX_DC$6);
DTACK_I <= '0';
     DTACK <= DTACK_I when DTACK_OE = '1' else 'Z';
     DTACK_OE <= (NOT AS AND ide AND IDE_WAIT);
D_8_IOBUFE/D_8_IOBUFE_TRST <= (($OpTx$INV$5)
      OR (RW AND autoconfig AND NOT $OpTx$FX_DC$6));
D_9_IOBUFE/D_9_IOBUFE_TRST <= (($OpTx$INV$5)
      OR (RW AND autoconfig AND NOT $OpTx$FX_DC$6));
FDCPE_Dout10: FDCPE port map (Dout1(0),Dout1_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     Dout1_D(0) <= ((NOT A(5) AND A(3) AND NOT A(4) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (A(3) AND NOT A(4) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2 AND NOT $OpTx$FX_DC$28)
      OR (AUTO_CONFIG_DONE(1) AND NOT A(5) AND NOT A(3) AND A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (NOT A(6) AND NOT A(3) AND A(1) AND NOT A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (AUTO_CONFIG_DONE(1) AND NOT A(6) AND NOT A(3) AND NOT A(2) AND
      NOT AUTOBOOT_OFF AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (AUTO_CONFIG_DONE(0) AND NOT A(6) AND NOT A(5) AND NOT A(3) AND
      A(1) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (Dout1(0) AND
      NOT AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2 AND NOT $OpTx$FX_DC$19)
      OR (A(3) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2 AND $OpTx$FX_DC$33)
      OR (NOT A(3) AND A(4) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2 AND NOT $OpTx$FX_DC$33));
FDCPE_Dout11: FDCPE port map (Dout1(1),Dout1_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     Dout1_D(1) <= (($OpTx$FX_DC$36)
      OR (AUTO_CONFIG_DONE(1) AND NOT A(3) AND A(4) AND A(1) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (NOT AUTO_CONFIG_DONE(1) AND NOT A(3) AND A(4) AND A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (NOT A(3) AND A(4) AND NOT A(1) AND NOT A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (AUTO_CONFIG_DONE(1) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND
      A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND NOT A(4) AND
      A(1) AND A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (Dout1(1) AND
      NOT AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2));
FDCPE_Dout12: FDCPE port map (Dout1(2),Dout1_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     Dout1_D(2) <= ((RESET AND AUTO_CONFIG_DONE(0) AND NOT A(6) AND NOT A(5) AND
      NOT A(3) AND NOT A(4) AND A(1) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (RESET AND NOT A(6) AND A(5) AND NOT A(3) AND NOT A(4) AND A(1) AND
      A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (RESET AND NOT A(6) AND NOT A(5) AND NOT A(3) AND A(4) AND A(1) AND
      A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (RESET AND NOT A(5) AND NOT A(3) AND NOT A(4) AND A(1) AND NOT A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (RESET AND AUTO_CONFIG_DONE(1) AND NOT A(6) AND NOT A(5) AND
      NOT A(3) AND NOT A(4) AND A(1) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (NOT Dout1(2) AND
      NOT AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (RESET AND A(6) AND NOT A(5) AND NOT A(3) AND NOT A(4) AND NOT A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (RESET AND NOT A(6) AND NOT A(5) AND A(3) AND A(4) AND NOT A(1) AND
      A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (RESET AND NOT AUTO_CONFIG_DONE(1) AND NOT A(6) AND NOT A(5) AND
      NOT A(3) AND NOT A(4) AND NOT A(1) AND A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2));
FDCPE_Dout13: FDCPE port map (Dout1(3),Dout1_D(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     Dout1_D(3) <= (($OpTx$FX_DC$36)
      OR (AUTO_CONFIG_DONE(1) AND NOT A(5) AND NOT A(4) AND A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (Dout1(3) AND
      NOT AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (NOT A(5) AND NOT A(1) AND A(2) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2)
      OR (NOT A(6) AND NOT A(5) AND NOT A(3) AND NOT A(1) AND
      AUTO_CONFIG_DONE_CYCLE_0__or0000/AUTO_CONFIG_DONE_CYCLE_0__or0000_D2));
IDE_A(0) <= A(9);
IDE_A(1) <= A(10);
IDE_A(2) <= A(11);
FDCPE_IDE_BASEADR0: FDCPE port map (IDE_BASEADR(0),IDE_BASEADR_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     IDE_BASEADR_D(0) <= ((RESET AND NOT IDE_BASEADR(0) AND
      NOT IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(8).PIN AND
      IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2));
FDCPE_IDE_BASEADR1: FDCPE port map (IDE_BASEADR(1),IDE_BASEADR_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     IDE_BASEADR_D(1) <= ((RESET AND NOT IDE_BASEADR(1) AND
      NOT IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(9).PIN AND
      IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2));
FDCPE_IDE_BASEADR2: FDCPE port map (IDE_BASEADR(2),IDE_BASEADR_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     IDE_BASEADR_D(2) <= ((RESET AND NOT IDE_BASEADR(2) AND
      NOT IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(10).PIN AND
      IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2));
FDCPE_IDE_BASEADR3: FDCPE port map (IDE_BASEADR(3),IDE_BASEADR_D(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     IDE_BASEADR_D(3) <= ((RESET AND NOT IDE_BASEADR(3) AND
      NOT IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(11).PIN AND
      IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2));
FDCPE_IDE_BASEADR4: FDCPE port map (IDE_BASEADR(4),IDE_BASEADR_D(4),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     IDE_BASEADR_D(4) <= ((RESET AND NOT IDE_BASEADR(4) AND
      NOT IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(12).PIN AND
      IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2));
FDCPE_IDE_BASEADR5: FDCPE port map (IDE_BASEADR(5),IDE_BASEADR_D(5),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     IDE_BASEADR_D(5) <= ((RESET AND NOT IDE_BASEADR(5) AND
      NOT IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(13).PIN AND
      IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2));
FDCPE_IDE_BASEADR6: FDCPE port map (IDE_BASEADR(6),IDE_BASEADR_D(6),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     IDE_BASEADR_D(6) <= ((RESET AND NOT IDE_BASEADR(6) AND
      NOT IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(14).PIN AND
      IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2));
FDCPE_IDE_BASEADR7: FDCPE port map (IDE_BASEADR(7),IDE_BASEADR_D(7),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     IDE_BASEADR_D(7) <= ((RESET AND NOT IDE_BASEADR(7) AND
      NOT IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(15).PIN AND
      IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2));
IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2 <= ((NOT RESET)
      OR (NOT AS AND NOT RW AND SHUT_UP(2) AND autoconfig AND A(6) AND
      NOT A(5) AND A(3) AND NOT A(4) AND NOT A(1) AND NOT A(2) AND NOT $OpTx$FX_DC$6 AND
      $OpTx$FX_DC$28));
IDE_CS(0) <= NOT A(12);
IDE_CS(1) <= NOT A(13);
FDCPE_IDE_ENABLE: FDCPE port map (IDE_ENABLE,IDE_ENABLE_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     IDE_ENABLE_D <= ((RESET AND NOT IDE_ENABLE)
      OR (NOT AS AND NOT RW AND RESET AND ide));
IDE_R <= NOT ((NOT AS AND NOT IDE_R_S));
FDCPE_IDE_R_S: FDCPE port map (IDE_R_S,IDE_R_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     IDE_R_S_D <= (NOT AS AND RW AND RESET AND ide AND NOT IDE_ENABLE);
IDE_W <= NOT ((NOT AS AND NOT IDE_W_S));
FDCPE_IDE_W_S: FDCPE port map (IDE_W_S,IDE_W_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     IDE_W_S_D <= (NOT AS AND NOT RW AND RESET AND ide);
INT_OUT_I <= '0';
     INT_OUT <= INT_OUT_I when INT_OUT_OE = '1' else 'Z';
     INT_OUT_OE <= NOT CP_IRQ;
FDCPE_LAN_BASEADR0: FDCPE port map (LAN_BASEADR(0),LAN_BASEADR_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     LAN_BASEADR_D(0) <= ((RESET AND NOT LAN_BASEADR(0) AND
      NOT LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(8).PIN AND
      LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2));
FDCPE_LAN_BASEADR1: FDCPE port map (LAN_BASEADR(1),LAN_BASEADR_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     LAN_BASEADR_D(1) <= ((RESET AND NOT LAN_BASEADR(1) AND
      NOT LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(9).PIN AND
      LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2));
FDCPE_LAN_BASEADR2: FDCPE port map (LAN_BASEADR(2),LAN_BASEADR_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     LAN_BASEADR_D(2) <= ((RESET AND NOT LAN_BASEADR(2) AND
      NOT LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(10).PIN AND
      LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2));
FDCPE_LAN_BASEADR3: FDCPE port map (LAN_BASEADR(3),LAN_BASEADR_D(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     LAN_BASEADR_D(3) <= ((RESET AND NOT LAN_BASEADR(3) AND
      NOT LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(11).PIN AND
      LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2));
FDCPE_LAN_BASEADR4: FDCPE port map (LAN_BASEADR(4),LAN_BASEADR_D(4),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     LAN_BASEADR_D(4) <= ((RESET AND NOT LAN_BASEADR(4) AND
      NOT LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(12).PIN AND
      LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2));
FDCPE_LAN_BASEADR5: FDCPE port map (LAN_BASEADR(5),LAN_BASEADR_D(5),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     LAN_BASEADR_D(5) <= ((RESET AND NOT LAN_BASEADR(5) AND
      NOT LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(13).PIN AND
      LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2));
FDCPE_LAN_BASEADR6: FDCPE port map (LAN_BASEADR(6),LAN_BASEADR_D(6),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     LAN_BASEADR_D(6) <= ((RESET AND NOT LAN_BASEADR(6) AND
      NOT LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(14).PIN AND
      LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2));
FDCPE_LAN_BASEADR7: FDCPE port map (LAN_BASEADR(7),LAN_BASEADR_D(7),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     LAN_BASEADR_D(7) <= ((RESET AND NOT LAN_BASEADR(7) AND
      NOT LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2)
      OR (RESET AND NOT D(15).PIN AND
      LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2));
LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2 <= ((NOT RESET)
      OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND
      NOT AUTO_CONFIG_DONE(0) AND SHUT_UP(0) AND autoconfig AND A(6) AND NOT A(5) AND A(3) AND
      NOT A(4) AND NOT A(1) AND NOT A(2) AND NOT $OpTx$FX_DC$6));
LAN_CFG_I(1) <= '0';
     LAN_CFG(1) <= LAN_CFG_I(1) when LAN_CFG_OE(1) = '1' else 'Z';
     LAN_CFG_OE(1) <= '0';
LAN_CFG_I(2) <= '0';
     LAN_CFG(2) <= LAN_CFG_I(2) when LAN_CFG_OE(2) = '1' else 'Z';
     LAN_CFG_OE(2) <= '0';
LAN_CFG_I(3) <= '0';
     LAN_CFG(3) <= LAN_CFG_I(3) when LAN_CFG_OE(3) = '1' else 'Z';
     LAN_CFG_OE(3) <= '0';
LAN_CFG_I(4) <= '0';
     LAN_CFG(4) <= LAN_CFG_I(4) when LAN_CFG_OE(4) = '1' else 'Z';
     LAN_CFG_OE(4) <= '0';
FDCPE_LAN_CS: FDCPE port map (LAN_CS,LAN_CS_D,NOT SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT lan/lan_RSTF,'0');
     LAN_CS_D <= ((SHUT_UP(0))
      OR (EXP24_.EXP)
      OR (LAN_BASEADR(3) AND NOT A(19))
      OR (NOT LAN_BASEADR(3) AND A(19))
      OR (LAN_BASEADR(5) AND NOT A(21))
      OR (NOT LAN_BASEADR(5) AND A(21))
      OR (LAN_BASEADR(7) AND NOT A(23))
      OR (LAN_RD_OBUF.EXP)
      OR (LAN_BASEADR(0) AND NOT A(16))
      OR (NOT LAN_BASEADR(0) AND A(16))
      OR (LAN_BASEADR(6) AND NOT A(22))
      OR (NOT LAN_BASEADR(6) AND A(22))
      OR (NOT LAN_BASEADR(7) AND A(23))
      OR (LAN_BASEADR(4) AND NOT A(20))
      OR (NOT LAN_BASEADR(4) AND A(20)));
LAN_RD <= (NOT AS AND LAN_RD_S);
FDCPE_LAN_RD_S: FDCPE port map (LAN_RD_S,LAN_RD_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     LAN_RD_S_D <= (RW AND RESET AND LAN_CS AND NOT $OpTx$FX_DC$6);
LAN_WRH <= (NOT AS AND LAN_WRH_S);
FDCPE_LAN_WRH_S: FDCPE port map (LAN_WRH_S,LAN_WRH_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     LAN_WRH_S_D <= (NOT RW AND RESET AND LAN_CS AND NOT UDS);
LAN_WRL <= (NOT AS AND LAN_WRL_S);
FDCPE_LAN_WRL_S: FDCPE port map (LAN_WRL_S,LAN_WRL_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     LAN_WRL_S_D <= (NOT RW AND RESET AND LAN_CS AND NOT LDS);
N32/N32_D2 <= ((NOT RW AND A(6) AND NOT A(5) AND A(3) AND NOT A(4) AND NOT A(1) AND A(2) AND
      NOT $OpTx$FX_DC$8)
      OR (NOT RW AND AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
      SHUT_UP(2) AND A(6) AND NOT A(5) AND A(3) AND NOT A(4) AND NOT A(1))
      OR (NOT RW AND NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND
      SHUT_UP(1) AND A(6) AND NOT A(5) AND A(3) AND NOT A(4) AND NOT A(1))
      OR (NOT RW AND NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND
      SHUT_UP(0) AND A(6) AND NOT A(5) AND A(3) AND NOT A(4) AND NOT A(1)));
OVR_I <= '0';
     OVR <= OVR_I when OVR_OE = '1' else 'Z';
     OVR_OE <= (NOT AS AND ide);
OWN_I <= '0';
     OWN <= OWN_I when OWN_OE = '1' else 'Z';
     OWN_OE <= NOT SLAVE;
ROM_B(0) <= '0';
ROM_B(1) <= '0';
ROM_OE <= NOT ((NOT AS AND NOT ROM_OE_S));
FDCPE_ROM_OE_S: FDCPE port map (ROM_OE_S,ROM_OE_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     ROM_OE_S_D <= (NOT AS AND RW AND RESET AND ide AND IDE_ENABLE);
FDCPE_SHUT_UP0: FDCPE port map (SHUT_UP(0),SHUT_UP_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     SHUT_UP_D(0) <= ((NOT RESET)
      OR (SHUT_UP(0) AND
      NOT LAN_BASEADR_0__or0001/LAN_BASEADR_0__or0001_D2));
FDCPE_SHUT_UP1: FDCPE port map (SHUT_UP(1),SHUT_UP_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     SHUT_UP_D(1) <= ((NOT RESET)
      OR (SHUT_UP(1) AND
      NOT CP_BASEADR_0__or0001/CP_BASEADR_0__or0001_D2));
SHUT_UP(2)/SHUT_UP(2)_CLKF <= C1
      XOR
     SHUT_UP(2)/SHUT_UP(2)_CLKF <= C3;
FDCPE_SHUT_UP2: FDCPE port map (SHUT_UP(2),SHUT_UP_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
     SHUT_UP_D(2) <= ((NOT RESET)
      OR (SHUT_UP(2) AND
      NOT IDE_BASEADR_0__or0001/IDE_BASEADR_0__or0001_D2));
SLAVE <= ((AS)
      OR (NOT LAN_CS AND NOT ide AND NOT autoconfig AND CP_CS));
FDCPE_autoconfig: FDCPE port map (autoconfig,autoconfig_D,NOT SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT lan/lan_RSTF,'0');
     autoconfig_D <= (NOT A(18) AND NOT A(17) AND NOT A(16) AND A(19) AND NOT CFIN AND NOT A(20) AND
      A(23) AND A(22) AND A(21) AND NOT $OpTx$FX_DC$8);
FDCPE_ide: FDCPE port map (ide,ide_D,NOT SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT lan/lan_RSTF,'0');
     ide_D <= ((SHUT_UP(2))
      OR (EXP27_.EXP)
      OR (IDE_BASEADR(3) AND NOT A(19))
      OR (NOT IDE_BASEADR(3) AND A(19))
      OR (IDE_BASEADR(5) AND NOT A(21))
      OR (NOT IDE_BASEADR(5) AND A(21))
      OR (IDE_BASEADR(6) AND NOT A(22))
      OR (IDE_BASEADR(0) AND NOT A(16))
      OR (NOT IDE_BASEADR(0) AND A(16))
      OR (NOT IDE_BASEADR(6) AND A(22))
      OR (IDE_BASEADR(7) AND NOT A(23))
      OR (NOT IDE_BASEADR(7) AND A(23))
      OR (IDE_BASEADR(4) AND NOT A(20))
      OR (NOT IDE_BASEADR(4) AND A(20)));
lan/lan_RSTF <= (RESET AND BERR);
Register Legend:
      FDCPE (Q,D,C,CLR,PRE,CE);
      FTCPE (Q,D,C,CLR,PRE,CE);
      LDCP (Q,D,G,CLR,PRE);