cpldfit:  version P.68d                             Xilinx Inc.
                                  Fitter Report
Design Name: LAN_IDE_CP                          Date:  1-27-2017, 11:27PM
Device Used: XC95288XL-10-TQ144
Fitting Status: Successful

*************************  Mapped Resource Summary  **************************

Macrocells     Product Terms    Function Block   Registers      Pins           
Used/Tot       Used/Tot         Inps Used/Tot    Used/Tot       Used/Tot       
137/288 ( 48%) 653 /1440 ( 45%) 402/864 ( 47%)   56 /288 ( 19%) 111/117 ( 95%)

** Function Block Resources **

Function    Mcells      FB Inps     Pterms      IO          
Block       Used/Tot    Used/Tot    Used/Tot    Used/Tot    
FB1          10/18       30/54       24/90       8/ 8*
FB2          11/18       19/54       24/90      10/10*
FB3           7/18       29/54       45/90       5/ 5*
FB4          14/18       30/54       62/90       6/ 6*
FB5           7/18       37/54       41/90       7/ 8
FB6          11/18       30/54       30/90       8/ 8*
FB7           7/18       30/54       82/90       4/ 4*
FB8           8/18       30/54       33/90       5/ 5*
FB9           0/18        0/54        0/90       9/ 9*
FB10         13/18       30/54       90/90*     10/10*
FB11         12/18       30/54       63/90       7/ 7*
FB12         15/18       23/54       57/90       6/ 6*
FB13         10/18       30/54       50/90       4/ 6
FB14          7/18       30/54       31/90       7/ 8
FB15          4/18       24/54       21/90       8/ 9
FB16          1/18        0/54        0/90       7/ 8
             -----       -----       -----      -----    
            137/288     402/864     653/1440   111/117

* - Resource is exhausted

** Global Control Resources **

Signal 'CLK_EXT' mapped onto global clock net GCK1.
Global output enable net(s) unused.
Signal 'RESET' mapped onto global set/reset net GSR.

** Pin Resources **

Signal Type    Required     Mapped  |  Pin Type            Used    Total 
------------------------------------|------------------------------------
Input         :   35          35    |  I/O              :   104     109
Output        :   42          42    |  GCK/IO           :     2       3
Bidirectional :   32          32    |  GTS/IO           :     4       4
GCK           :    1           1    |  GSR/IO           :     1       1
GTS           :    0           0    |
GSR           :    1           1    |
                 ----        ----
        Total    111         111

** Power Data **

There are 137 macrocells in high performance mode (MCHP).
There are 0 macrocells in low power mode (MCLP).
End of Mapped Resource Summary
**************************  Errors and Warnings  ***************************

WARNING:Cpld - Unable to retrieve the path to the iSE Project Repository. Will
   use the default filename of 'LAN_IDE_CP.ise'.
INFO:Cpld - Inferring BUFG constraint for signal 'CLK_EXT' based upon the LOC
   constraint 'P30'. It is recommended that you declare this BUFG explicitedly
   in your design. Note that for certain device families the output of a BUFG
   constraint can not drive a gated clock, and the BUFG constraint will be
   ignored.
WARNING:Cpld:1007 - Removing unused input(s) 'DS0'.  The input(s) are unused
   after optimization. Please verify functionality via simulation.
WARNING:Cpld:1007 - Removing unused input(s) 'DS1'.  The input(s) are unused
   after optimization. Please verify functionality via simulation.
WARNING:Cpld:1007 - Removing unused input(s) 'FCS'.  The input(s) are unused
   after optimization. Please verify functionality via simulation.
WARNING:Cpld:1007 - Removing unused input(s) 'MTCR'.  The input(s) are unused
   after optimization. Please verify functionality via simulation.
WARNING:Cpld:1007 - Removing unused input(s) 'Z3'.  The input(s) are unused
   after optimization. Please verify functionality via simulation.
*************************  Summary of Mapped Logic  ************************

** 74 Outputs **

Signal                                                                  Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
Name                                                                    Pts   Inps          No.  Type    Use     Mode Rate State
D<5>                                                                    3     6     FB1_5   20   I/O     I/O     STD  FAST 
D<4>                                                                    3     6     FB1_6   21   I/O     I/O     STD  FAST 
IDE_CS<0>                                                               1     1     FB1_8   22   I/O     O       STD  FAST 
IDE_CS<1>                                                               1     1     FB1_10  23   I/O     O       STD  FAST 
IDE_A<0>                                                                1     1     FB1_12  24   I/O     O       STD  FAST 
IDE_A<2>                                                                1     1     FB1_14  25   I/O     O       STD  FAST 
IDE_A<1>                                                                1     1     FB1_15  26   I/O     O       STD  FAST 
IDE_R                                                                   1     2     FB1_17  27   I/O     O       STD  FAST 
A_LAN<4>                                                                2     5     FB2_2   9    I/O     O       STD  FAST 
A_LAN<7>                                                                1     3     FB2_3   10   I/O     O       STD  FAST 
A_LAN<6>                                                                3     4     FB2_5   11   I/O     O       STD  FAST 
LAN_CFG<1>                                                              0     0     FB2_6   12   I/O     O       STD  FAST 
LAN_CFG<3>                                                              0     0     FB2_8   13   I/O     O       STD  FAST 
D<6>                                                                    3     6     FB2_10  14   I/O     I/O     STD  FAST 
D<3>                                                                    3     6     FB2_12  15   I/O     I/O     STD  FAST 
D<7>                                                                    3     6     FB2_14  16   I/O     I/O     STD  FAST 
D<1>                                                                    3     6     FB2_15  17   I/O     I/O     STD  FAST 
D<8>                                                                    3     7     FB2_17  19   I/O     I/O     STD  FAST 
IDE_W                                                                   1     2     FB3_2   28   I/O     O       STD  FAST 
INT_OUT                                                                 1     1     FB3_14  32   GCK/I/O O       STD  FAST 
D<0>                                                                    3     6     FB4_2   2    GTS/I/O I/O     STD  FAST 
A_LAN<1>                                                                1     3     FB4_5   3    GTS/I/O O       STD  FAST 
A_LAN<0>                                                                1     3     FB4_6   4    I/O     O       STD  FAST 
A_LAN<3>                                                                2     5     FB4_8   5    GTS/I/O O       STD  FAST 
A_LAN<2>                                                                2     5     FB4_12  6    GTS/I/O O       STD  FAST 
A_LAN<5>                                                                2     5     FB4_14  7    I/O     O       STD  FAST 
CP_CS                                                                   22    23    FB5_2   34   I/O     O       STD  FAST SET
ROM_OE                                                                  1     2     FB5_5   35   I/O     O       STD  FAST 
D<2>                                                                    3     6     FB5_10  39   I/O     I/O     STD  FAST 
D<9>                                                                    3     7     FB5_12  40   I/O     I/O     STD  FAST 
D<10>                                                                   3     7     FB5_14  41   I/O     I/O     STD  FAST 
D<11>                                                                   3     7     FB5_15  43   I/O     I/O     STD  FAST 
D<12>                                                                   6     8     FB5_17  44   I/O     I/O     STD  FAST 
LAN_CFG<2>                                                              0     0     FB6_2   135  I/O     O       STD  FAST 
A_LAN<13>                                                               1     3     FB6_3   136  I/O     O       STD  FAST 
A_LAN<12>                                                               1     3     FB6_5   137  I/O     O       STD  FAST 
A_LAN<10>                                                               1     3     FB6_6   138  I/O     O       STD  FAST 
A_LAN<11>                                                               1     3     FB6_8   139  I/O     O       STD  FAST 
A_LAN<8>                                                                1     3     FB6_10  140  I/O     O       STD  FAST 
A_LAN<9>                                                                1     3     FB6_14  142  I/O     O       STD  FAST 

Signal                                                                  Total Total Loc     Pin  Pin     Pin     Pwr  Slew Reg Init
Name                                                                    Pts   Inps          No.  Type    Use     Mode Rate State
D<13>                                                                   6     8     FB7_3   45   I/O     I/O     STD  FAST 
D<14>                                                                   6     8     FB7_5   46   I/O     I/O     STD  FAST 
D<15>                                                                   6     8     FB7_12  48   I/O     I/O     STD  FAST 
DQ<12>                                                                  8     11    FB8_2   130  I/O     I/O     STD  FAST 
DQ<14>                                                                  8     11    FB8_3   131  I/O     I/O     STD  FAST 
LAN_WRH                                                                 3     4     FB8_5   132  I/O     O       STD  FAST 
LAN_CS                                                                  2     3     FB8_8   133  I/O     O       STD  FAST 
LAN_RD                                                                  1     3     FB8_10  134  I/O     O       STD  FAST 
DQ<1>                                                                   7     10    FB10_2  117  I/O     I/O     STD  FAST 
DQ<0>                                                                   7     10    FB10_3  118  I/O     I/O     STD  FAST 
DQ<3>                                                                   7     10    FB10_5  119  I/O     I/O     STD  FAST 
DQ<2>                                                                   7     10    FB10_6  120  I/O     I/O     STD  FAST 
DQ<5>                                                                   7     10    FB10_8  121  I/O     I/O     STD  FAST 
DQ<4>                                                                   9     11    FB10_10 124  I/O     I/O     STD  FAST 
DQ<7>                                                                   7     10    FB10_11 125  I/O     I/O     STD  FAST 
DQ<6>                                                                   7     10    FB10_12 126  I/O     I/O     STD  FAST 
DQ<8>                                                                   10    12    FB10_14 128  I/O     I/O     STD  FAST 
DQ<10>                                                                  10    12    FB10_17 129  I/O     I/O     STD  FAST 
ROM_B<0>                                                                0     0     FB11_12 68   I/O     O       STD  FAST 
ROM_B<1>                                                                0     0     FB11_14 69   I/O     O       STD  FAST 
CP_WE                                                                   1     3     FB11_17 70   I/O     O       STD  FAST 
LAN_CFG<4>                                                              0     0     FB12_2  110  I/O     O       STD  FAST 
DQ<15>                                                                  8     11    FB12_5  112  I/O     I/O     STD  FAST 
DQ<13>                                                                  8     11    FB12_8  113  I/O     I/O     STD  FAST 
DQ<11>                                                                  10    12    FB12_10 115  I/O     I/O     STD  FAST 
DQ<9>                                                                   10    12    FB12_12 116  I/O     I/O     STD  FAST 
CP_RD                                                                   1     2     FB13_2  71   I/O     O       STD  FAST 
LAN_WRL                                                                 3     4     FB13_14 76   I/O     O       STD  FAST 
OVR                                                                     1     2     FB14_3  100  I/O     O       STD  FAST 
CFOUT                                                                   1     2     FB14_11 105  I/O     O       STD  FAST 
SLAVE                                                                   2     5     FB14_14 106  I/O     O       STD  FAST 
OWN                                                                     0     0     FB14_15 107  I/O     O       STD  FAST 
DTACK                                                                   1     3     FB15_12 85   I/O     O       STD  FAST 
MTACK                                                                   0     0     FB16_10 96   I/O     O       STD  FAST 

** 63 Buried Nodes **

Signal                                                                  Total Total Loc     Pwr  Reg Init
Name                                                                    Pts   Inps          Mode State
IDE_BASEADR<3>                                                          6     18    FB1_16  STD  RESET
CP_BASEADR<3>                                                           6     18    FB1_18  STD  RESET
$OpTx$INV$143__$INT                                                     3     5     FB2_18  STD  
ide/ide_RSTF__$INT                                                      1     2     FB3_11  STD  
$OpTx$FX_DC$334                                                         17    17    FB3_13  STD  
LAN_RST_SM_FSM_FFd3                                                     2     3     FB3_15  STD  RESET
LAN_CS_RST                                                              2     3     FB3_16  STD  RESET
lan_adr                                                                 21    22    FB3_18  STD  RESET
AUTO_CONFIG_DONE_CYCLE<1>                                               8     18    FB4_3   STD  RESET
CP_BASEADR<0>                                                           6     18    FB4_4   STD  RESET
CP_BASEADR<1>                                                           6     18    FB4_7   STD  RESET
IDE_BASEADR<0>                                                          6     18    FB4_9   STD  RESET
LAN_BASEADR<0>                                                          6     18    FB4_10  STD  RESET
AUTO_CONFIG_DONE<0>                                                     3     5     FB4_11  STD  RESET
AUTO_CONFIG_DONE<1>                                                     3     5     FB4_13  STD  RESET
AUTO_CONFIG_DONE_CYCLE<0>                                               13    17    FB4_15  STD  RESET
LAN_BASEADR<6>                                                          6     18    FB6_1   STD  RESET
IDE_BASEADR<6>                                                          6     18    FB6_16  STD  RESET
CP_BASEADR<7>                                                           6     18    FB6_17  STD  RESET
CP_BASEADR<6>                                                           6     18    FB6_18  STD  RESET
CP_BASEADR<2>                                                           6     18    FB7_2   STD  RESET
Dout1<2>                                                                20    15    FB7_9   STD  RESET
Dout1<1>                                                                22    15    FB7_14  STD  RESET
Dout1<3>                                                                16    14    FB7_18  STD  RESET
DS_D                                                                    2     3     FB8_16  STD  RESET
CP_WE_S                                                                 3     6     FB8_17  STD  RESET
CP_BASEADR<4>                                                           6     18    FB8_18  STD  RESET
DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT                                      4     8     FB10_7  STD  
LAN_INT_ENABLE                                                          5     8     FB10_13 STD  RESET
CP_RD_S                                                                 3     6     FB10_16 STD  RESET
Dout1<0>                                                                22    16    FB11_2  STD  RESET
CP_WE_QUIRK                                                             2     2     FB11_7  STD  RESET
SHUT_UP<2>                                                              4     17    FB11_8  STD  RESET
SHUT_UP<1>                                                              4     17    FB11_9  STD  RESET
LAN_BASEADR<7>                                                          6     18    FB11_10 STD  RESET
LAN_BASEADR<4>                                                          6     18    FB11_11 STD  RESET
LAN_BASEADR<3>                                                          6     18    FB11_13 STD  RESET
IDE_BASEADR<7>                                                          6     18    FB11_15 STD  RESET
IDE_BASEADR<4>                                                          6     18    FB11_16 STD  RESET
LAN_WR_RST                                                              1     3     FB12_6  STD  RESET

Signal                                                                  Total Total Loc     Pwr  Reg Init
Name                                                                    Pts   Inps          Mode State
ROM_OE_S                                                                2     6     FB12_7  STD  RESET
LAN_WRL_S                                                               2     5     FB12_9  STD  RESET
LAN_WRH_S                                                               2     5     FB12_11 STD  RESET
LAN_RST_SM_FSM_FFd2                                                     2     4     FB12_13 STD  RESET
LAN_RST_SM_FSM_FFd1                                                     2     4     FB12_14 STD  RESET
IDE_W_S                                                                 2     5     FB12_15 STD  RESET
IDE_R_S                                                                 2     6     FB12_16 STD  RESET
LAN_RD_S                                                                3     6     FB12_17 STD  RESET
IDE_ENABLE                                                              3     6     FB12_18 STD  RESET
SHUT_UP<0>                                                              4     17    FB13_1  STD  RESET
LAN_BASEADR<5>                                                          6     18    FB13_11 STD  RESET
LAN_BASEADR<2>                                                          6     18    FB13_12 STD  RESET
LAN_BASEADR<1>                                                          6     18    FB13_13 STD  RESET
IDE_BASEADR<5>                                                          6     18    FB13_15 STD  RESET
IDE_BASEADR<2>                                                          6     18    FB13_16 STD  RESET
IDE_BASEADR<1>                                                          6     18    FB13_17 STD  RESET
CP_BASEADR<5>                                                           6     18    FB13_18 STD  RESET
cp_and0000/cp_and0000_D2                                                2     11    FB14_2  STD  
autoconfig                                                              4     13    FB14_16 STD  RESET
ide                                                                     21    26    FB14_18 STD  RESET
Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2  16    16    FB15_1  STD  
SHUT_UP<2>/SHUT_UP<2>_CLKF                                              2     2     FB15_16 STD  
ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST                                2     3     FB15_17 STD  

** 37 Inputs **

Signal                                                                  Loc     Pin  Pin     Pin     
Name                                                                            No.  Type    Use     
CLK_EXT                                                                 FB3_10  30   GCK/I/O GCK
CP_IRQ                                                                  FB3_12  31   I/O     I
IDE_WAIT                                                                FB3_15  33   I/O     I
RESET                                                                   FB6_15  143  GSR/I/O GSR/I
A<5>                                                                    FB7_15  49   I/O     I
A<4>                                                                    FB9_2   50   I/O     I
A<6>                                                                    FB9_3   51   I/O     I
A<3>                                                                    FB9_5   52   I/O     I
A<7>                                                                    FB9_6   53   I/O     I
A<2>                                                                    FB9_8   54   I/O     I
A<8>                                                                    FB9_11  56   I/O     I
A<1>                                                                    FB9_12  57   I/O     I
A<9>                                                                    FB9_14  58   I/O     I
A<10>                                                                   FB9_17  59   I/O     I
A<11>                                                                   FB11_3  60   I/O     I
A<12>                                                                   FB11_5  61   I/O     I
A<13>                                                                   FB11_10 64   I/O     I
A<14>                                                                   FB11_11 66   I/O     I
LAN_INT                                                                 FB12_3  111  I/O     I
A<15>                                                                   FB13_8  74   I/O     I
AUTOBOOT_OFF                                                            FB13_11 75   I/O     I
C3                                                                      FB14_6  102  I/O     I
C1                                                                      FB14_8  103  I/O     I
CFIN                                                                    FB14_10 104  I/O     I
AS                                                                      FB15_3  80   I/O     I
UDS                                                                     FB15_8  81   I/O     I
LDS                                                                     FB15_10 82   I/O     I
RW                                                                      FB15_11 83   I/O     I
A<23>                                                                   FB15_14 86   I/O     I
A<22>                                                                   FB15_15 87   I/O     I
A<21>                                                                   FB15_17 88   I/O     I
A<20>                                                                   FB16_2  91   I/O     I
A<19>                                                                   FB16_3  92   I/O     I
A<18>                                                                   FB16_6  94   I/O     I
A<17>                                                                   FB16_8  95   I/O     I
A<16>                                                                   FB16_11 97   I/O     I
BERR                                                                    FB16_12 98   I/O     I

Legend:
Pin No. - ~ - User Assigned
**************************  Function Block Details  ************************
Legend:
Total Pt     - Total product terms used by the macrocell signal
Imp Pt       - Product terms imported from other macrocells
Exp Pt       - Product terms exported to other macrocells
               in direction shown
Unused Pt    - Unused local product terms remaining in macrocell
Loc          - Location where logic was mapped in device
Pin Type/Use - I  - Input             GCK - Global Clock
               O  - Output            GTS - Global Output Enable
              (b) - Buried macrocell  GSR - Global Set/Reset
X            - Signal used as input to the macrocell logic.
Pin No.      - ~  - User Assigned
*********************************** FB1  ***********************************
Number of function block inputs used/remaining:               30/24
Number of signals used by logic mapping into function block:  30
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0     0   5     FB1_1         (b)     
(unused)              0       0     0   5     FB1_2         (b)     
(unused)              0       0     0   5     FB1_3         (b)     
(unused)              0       0     0   5     FB1_4         (b)     
D<5>                  3       0     0   2     FB1_5   20    I/O     I/O
D<4>                  3       0     0   2     FB1_6   21    I/O     I/O
(unused)              0       0     0   5     FB1_7         (b)     
IDE_CS<0>             1       0     0   4     FB1_8   22    I/O     O
(unused)              0       0     0   5     FB1_9         (b)     
IDE_CS<1>             1       0     0   4     FB1_10  23    I/O     O
(unused)              0       0     0   5     FB1_11        (b)     
IDE_A<0>              1       0     0   4     FB1_12  24    I/O     O
(unused)              0       0     0   5     FB1_13        (b)     
IDE_A<2>              1       0     0   4     FB1_14  25    I/O     O
IDE_A<1>              1       0   \/1   3     FB1_15  26    I/O     O
IDE_BASEADR<3>        6       1<-   0   0     FB1_16        (b)     (b)
IDE_R                 1       0   \/1   3     FB1_17  27    I/O     O
CP_BASEADR<3>         6       1<-   0   0     FB1_18        (b)     (b)

Signals Used by Logic in Function Block
  1: $OpTx$INV$143__$INT  11: A<5>              21: LDS 
  2: AS                   12: A<6>              22: DQ<5>.PIN 
  3: AUTO_CONFIG_DONE<0>  13: CP_BASEADR<3>     23: DQ<4>.PIN 
  4: AUTO_CONFIG_DONE<1>  14: CP_CS             24: D<11>.PIN 
  5: A<12>                15: DS_D              25: RESET 
  6: A<13>                16: A<9>              26: RW 
  7: A<1>                 17: A<10>             27: SHUT_UP<2>/SHUT_UP<2>_CLKF 
  8: A<2>                 18: A<11>             28: UDS 
  9: A<3>                 19: IDE_BASEADR<3>    29: autoconfig 
 10: A<4>                 20: IDE_R_S           30: lan_adr 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
D<5>                 XX...........X.......X...X...X.......... 6
D<4>                 XX...........X........X..X...X.......... 6
IDE_CS<0>            ....X................................... 1
IDE_CS<1>            .....X.................................. 1
IDE_A<0>             ...............X........................ 1
IDE_A<2>             .................X...................... 1
IDE_A<1>             ................X....................... 1
IDE_BASEADR<3>       .XXX..XXXXXX..X...X.X..XXXXXX........... 18
IDE_R                .X.................X.................... 2
CP_BASEADR<3>        .XXX..XXXXXXX.X.....X..XXXXXX........... 18
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB2  ***********************************
Number of function block inputs used/remaining:               19/35
Number of signals used by logic mapping into function block:  19
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0     0   5     FB2_1         (b)     
A_LAN<4>              2       0     0   3     FB2_2   9     I/O     O
A_LAN<7>              1       0     0   4     FB2_3   10    I/O     O
(unused)              0       0     0   5     FB2_4         (b)     
A_LAN<6>              3       0     0   2     FB2_5   11    I/O     O
LAN_CFG<1>            0       0     0   5     FB2_6   12    I/O     O
(unused)              0       0     0   5     FB2_7         (b)     
LAN_CFG<3>            0       0     0   5     FB2_8   13    I/O     O
(unused)              0       0     0   5     FB2_9         (b)     
D<6>                  3       0     0   2     FB2_10  14    I/O     I/O
(unused)              0       0     0   5     FB2_11        (b)     
D<3>                  3       0     0   2     FB2_12  15    I/O     I/O
(unused)              0       0     0   5     FB2_13        (b)     
D<7>                  3       0     0   2     FB2_14  16    I/O     I/O
D<1>                  3       0     0   2     FB2_15  17    I/O     I/O
(unused)              0       0     0   5     FB2_16        (b)     
D<8>                  3       0     0   2     FB2_17  19    I/O     I/O
$OpTx$INV$143__$INT   3       0     0   2     FB2_18        (b)     (b)

Signals Used by Logic in Function Block
  1: $OpTx$INV$143__$INT   8: LAN_RST_SM_FSM_FFd1  14: DQ<3>.PIN 
  2: AS                    9: LAN_RST_SM_FSM_FFd2  15: DQ<1>.PIN 
  3: A<4>                 10: LAN_RST_SM_FSM_FFd3  16: DQ<0>.PIN 
  4: A<5>                 11: DQ<8>.PIN            17: RW 
  5: A<7>                 12: DQ<7>.PIN            18: autoconfig 
  6: A<8>                 13: DQ<6>.PIN            19: lan_adr 
  7: CP_CS               

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
A_LAN<4>             ..XX..X.XX.............................. 5
A_LAN<7>             .....X..XX.............................. 3
A_LAN<6>             ....X..XXX.............................. 4
LAN_CFG<1>           ........................................ 0
LAN_CFG<3>           ........................................ 0
D<6>                 XX....X.....X...X.X..................... 6
D<3>                 XX....X......X..X.X..................... 6
D<7>                 XX....X....X....X.X..................... 6
D<1>                 XX....X.......X.X.X..................... 6
D<8>                 XX....X...X....XX.X..................... 7
$OpTx$INV$143__$INT  .X....X.........XXX..................... 5
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB3  ***********************************
Number of function block inputs used/remaining:               29/25
Number of signals used by logic mapping into function block:  29
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0   /\5   0     FB3_1         (b)     (b)
IDE_W                 1       0   /\4   0     FB3_2   28    I/O     O
(unused)              0       0     0   5     FB3_3         (b)     
(unused)              0       0     0   5     FB3_4         (b)     
(unused)              0       0     0   5     FB3_5         (b)     
(unused)              0       0     0   5     FB3_6         (b)     
(unused)              0       0     0   5     FB3_7         (b)     
(unused)              0       0     0   5     FB3_8         (b)     
(unused)              0       0     0   5     FB3_9         (b)     
(unused)              0       0     0   5     FB3_10  30    GCK/I/O GCK
ide/ide_RSTF__$INT    1       0   \/3   1     FB3_11        (b)     (b)
(unused)              0       0   \/5   0     FB3_12  31    I/O     I
$OpTx$FX_DC$334      17      12<-   0   0     FB3_13        (b)     (b)
INT_OUT               1       0   /\4   0     FB3_14  32    GCK/I/O O
LAN_RST_SM_FSM_FFd3   2       0     0   3     FB3_15  33    I/O     I
LAN_CS_RST            2       0   \/2   1     FB3_16        (b)     (b)
(unused)              0       0   \/5   0     FB3_17        (b)     (b)
lan_adr              21      16<-   0   0     FB3_18        (b)     (b)

Signals Used by Logic in Function Block
  1: AS                   11: A<23>             21: LAN_BASEADR<6> 
  2: AUTO_CONFIG_DONE<0>  12: BERR              22: LAN_BASEADR<7> 
  3: AUTO_CONFIG_DONE<1>  13: CFIN              23: LAN_RST_SM_FSM_FFd1 
  4: A<16>                14: IDE_W_S           24: LAN_RST_SM_FSM_FFd2 
  5: A<17>                15: LAN_BASEADR<0>    25: LAN_RST_SM_FSM_FFd3 
  6: A<18>                16: LAN_BASEADR<1>    26: RESET 
  7: A<19>                17: LAN_BASEADR<2>    27: ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST 
  8: A<20>                18: LAN_BASEADR<3>    28: SHUT_UP<0> 
  9: A<21>                19: LAN_BASEADR<4>    29: ide/ide_RSTF__$INT 
 10: A<22>                20: LAN_BASEADR<5>   

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
IDE_W                X............X.......................... 2
ide/ide_RSTF__$INT   ...........X.............X.............. 2
$OpTx$FX_DC$334      ...XXXXXXXX...XXXXXXXX.....X............ 17
INT_OUT              ..........................X............. 1
LAN_RST_SM_FSM_FFd3  ......................XX.X.............. 3
LAN_CS_RST           .......................XXX.............. 3
lan_adr              XXXXXXXXXXX.X.XXXXXXXX.....XX........... 22
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB4  ***********************************
Number of function block inputs used/remaining:               30/24
Number of signals used by logic mapping into function block:  30
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0     0   5     FB4_1         (b)     
D<0>                  3       0   \/2   0     FB4_2   2     GTS/I/O I/O
AUTO_CONFIG_DONE_CYCLE<1>
                      8       3<-   0   0     FB4_3         (b)     (b)
CP_BASEADR<0>         6       2<- /\1   0     FB4_4         (b)     (b)
A_LAN<1>              1       0   /\2   2     FB4_5   3     GTS/I/O O
A_LAN<0>              1       0   \/1   3     FB4_6   4     I/O     O
CP_BASEADR<1>         6       1<-   0   0     FB4_7         (b)     (b)
A_LAN<3>              2       0   \/1   2     FB4_8   5     GTS/I/O O
IDE_BASEADR<0>        6       1<-   0   0     FB4_9         (b)     (b)
LAN_BASEADR<0>        6       1<-   0   0     FB4_10        (b)     (b)
AUTO_CONFIG_DONE<0>   3       0   /\1   1     FB4_11        (b)     (b)
A_LAN<2>              2       0     0   3     FB4_12  6     GTS/I/O O
AUTO_CONFIG_DONE<1>   3       0     0   2     FB4_13        (b)     (b)
A_LAN<5>              2       0   \/3   0     FB4_14  7     I/O     O
AUTO_CONFIG_DONE_CYCLE<0>
                     13       8<-   0   0     FB4_15        (b)     (b)
(unused)              0       0   /\5   0     FB4_16        (b)     (b)
(unused)              0       0     0   5     FB4_17        (b)     
(unused)              0       0     0   5     FB4_18        (b)     

Signals Used by Logic in Function Block
  1: $OpTx$INV$143__$INT        11: A<5>                 21: LDS 
  2: AS                         12: A<6>                 22: DQ<0>.PIN 
  3: AUTO_CONFIG_DONE<0>        13: CP_BASEADR<0>        23: D<9>.PIN 
  4: AUTO_CONFIG_DONE<1>        14: CP_BASEADR<1>        24: D<8>.PIN 
  5: AUTO_CONFIG_DONE_CYCLE<0>  15: CP_CS                25: RESET 
  6: AUTO_CONFIG_DONE_CYCLE<1>  16: DS_D                 26: RW 
  7: A<1>                       17: IDE_BASEADR<0>       27: SHUT_UP<2>/SHUT_UP<2>_CLKF 
  8: A<2>                       18: LAN_BASEADR<0>       28: UDS 
  9: A<3>                       19: LAN_RST_SM_FSM_FFd2  29: autoconfig 
 10: A<4>                       20: LAN_RST_SM_FSM_FFd3  30: lan_adr 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
D<0>                 XX............X......X...X...X.......... 6
AUTO_CONFIG_DONE_CYCLE<1> 
                     .XXXXXXXXXXX...X....X...XXXXX........... 18
CP_BASEADR<0>        .XXX..XXXXXXX..X....X..XXXXXX........... 18
A_LAN<1>             .......X..........XX.................... 3
A_LAN<0>             ......X...........XX.................... 3
CP_BASEADR<1>        .XXX..XXXXXX.X.X....X.X.XXXXX........... 18
A_LAN<3>             ........XX....X...XX.................... 5
IDE_BASEADR<0>       .XXX..XXXXXX...XX...X..XXXXXX........... 18
LAN_BASEADR<0>       .XXX..XXXXXX...X.X..X..XXXXXX........... 18
AUTO_CONFIG_DONE<0>  .XX.X...................X.X............. 5
A_LAN<2>             .......XX.....X...XX.................... 5
AUTO_CONFIG_DONE<1>  .X.X.X..................X.X............. 5
A_LAN<5>             ..........XX..X...XX.................... 5
AUTO_CONFIG_DONE_CYCLE<0> 
                     .XXXX.XXXXXX...X....X...XXXXX........... 17
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB5  ***********************************
Number of function block inputs used/remaining:               37/17
Number of signals used by logic mapping into function block:  37
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0   \/5   0     FB5_1         (b)     (b)
CP_CS                22      17<-   0   0     FB5_2   34    I/O     O
(unused)              0       0   /\5   0     FB5_3         (b)     (b)
(unused)              0       0   /\2   3     FB5_4         (b)     (b)
ROM_OE                1       0     0   4     FB5_5   35    I/O     O
(unused)              0       0     0   5     FB5_6         (b)     
(unused)              0       0     0   5     FB5_7         (b)     
(unused)              0       0     0   5     FB5_8   38    GCK/I/O 
(unused)              0       0     0   5     FB5_9         (b)     
D<2>                  3       0     0   2     FB5_10  39    I/O     I/O
(unused)              0       0     0   5     FB5_11        (b)     
D<9>                  3       0     0   2     FB5_12  40    I/O     I/O
(unused)              0       0     0   5     FB5_13        (b)     
D<10>                 3       0     0   2     FB5_14  41    I/O     I/O
D<11>                 3       0     0   2     FB5_15  43    I/O     I/O
(unused)              0       0   \/1   4     FB5_16        (b)     (b)
D<12>                 6       1<-   0   0     FB5_17  44    I/O     I/O
(unused)              0       0   \/5   0     FB5_18        (b)     (b)

Signals Used by Logic in Function Block
  1: $OpTx$FX_DC$334      14: CFIN              26: DQ<11>.PIN 
  2: $OpTx$INV$143__$INT  15: CP_BASEADR<0>     27: DQ<10>.PIN 
  3: AS                   16: CP_BASEADR<1>     28: DQ<9>.PIN 
  4: AUTO_CONFIG_DONE<0>  17: CP_BASEADR<2>     29: DQ<4>.PIN 
  5: AUTO_CONFIG_DONE<1>  18: CP_BASEADR<3>     30: DQ<3>.PIN 
  6: A<16>                19: CP_BASEADR<4>     31: DQ<2>.PIN 
  7: A<17>                20: CP_BASEADR<5>     32: DQ<1>.PIN 
  8: A<18>                21: CP_BASEADR<6>     33: ROM_OE_S 
  9: A<19>                22: CP_BASEADR<7>     34: RW 
 10: A<20>                23: CP_CS             35: SHUT_UP<1> 
 11: A<21>                24: Dout1<0>          36: ide/ide_RSTF__$INT 
 12: A<22>                25: DQ<12>.PIN        37: lan_adr 
 13: A<23>               

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
CP_CS                X.XXXXXXXXXXXXXXXXXXXX............XX.... 23
ROM_OE               ..X.............................X....... 2
D<2>                 .XX...................X.......X..X..X... 6
D<9>                 .XX...................X....X...X.X..X... 7
D<10>                .XX...................X...X...X..X..X... 7
D<11>                .XX...................X..X...X...X..X... 7
D<12>                .XX...................XXX...X....X..X... 8
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB6  ***********************************
Number of function block inputs used/remaining:               30/24
Number of signals used by logic mapping into function block:  30
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
LAN_BASEADR<6>        6       2<- /\1   0     FB6_1         (b)     (b)
LAN_CFG<2>            0       0   /\2   3     FB6_2   135   I/O     O
A_LAN<13>             1       0     0   4     FB6_3   136   I/O     O
(unused)              0       0     0   5     FB6_4         (b)     
A_LAN<12>             1       0     0   4     FB6_5   137   I/O     O
A_LAN<10>             1       0     0   4     FB6_6   138   I/O     O
(unused)              0       0     0   5     FB6_7         (b)     
A_LAN<11>             1       0     0   4     FB6_8   139   I/O     O
(unused)              0       0     0   5     FB6_9         (b)     
A_LAN<8>              1       0     0   4     FB6_10  140   I/O     O
(unused)              0       0     0   5     FB6_11        (b)     
(unused)              0       0     0   5     FB6_12        (b)     
(unused)              0       0     0   5     FB6_13        (b)     
A_LAN<9>              1       0     0   4     FB6_14  142   I/O     O
(unused)              0       0   \/2   3     FB6_15  143   GSR/I/O GSR/I
IDE_BASEADR<6>        6       2<- \/1   0     FB6_16        (b)     (b)
CP_BASEADR<7>         6       1<-   0   0     FB6_17        (b)     (b)
CP_BASEADR<6>         6       1<-   0   0     FB6_18        (b)     (b)

Signals Used by Logic in Function Block
  1: AS                   11: A<5>              21: LAN_RST_SM_FSM_FFd2 
  2: AUTO_CONFIG_DONE<0>  12: A<6>              22: LAN_RST_SM_FSM_FFd3 
  3: AUTO_CONFIG_DONE<1>  13: CP_BASEADR<6>     23: LDS 
  4: A<12>                14: CP_BASEADR<7>     24: D<15>.PIN 
  5: A<13>                15: DS_D              25: D<14>.PIN 
  6: A<14>                16: A<9>              26: RESET 
  7: A<1>                 17: A<10>             27: RW 
  8: A<2>                 18: A<11>             28: SHUT_UP<2>/SHUT_UP<2>_CLKF 
  9: A<3>                 19: IDE_BASEADR<6>    29: UDS 
 10: A<4>                 20: LAN_BASEADR<6>    30: autoconfig 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
LAN_BASEADR<6>       XXX...XXXXXX..X....X..X.XXXXXX.......... 18
LAN_CFG<2>           ........................................ 0
A_LAN<13>            .....X..............XX.................. 3
A_LAN<12>            ....X...............XX.................. 3
A_LAN<10>            .................X..XX.................. 3
A_LAN<11>            ...X................XX.................. 3
A_LAN<8>             ...............X....XX.................. 3
A_LAN<9>             ................X...XX.................. 3
IDE_BASEADR<6>       XXX...XXXXXX..X...X...X.XXXXXX.......... 18
CP_BASEADR<7>        XXX...XXXXXX.XX.......XX.XXXXX.......... 18
CP_BASEADR<6>        XXX...XXXXXXX.X.......X.XXXXXX.......... 18
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB7  ***********************************
Number of function block inputs used/remaining:               30/24
Number of signals used by logic mapping into function block:  30
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0   /\5   0     FB7_1         (b)     (b)
CP_BASEADR<2>         6       2<- /\1   0     FB7_2         (b)     (b)
D<13>                 6       3<- /\2   0     FB7_3   45    I/O     I/O
(unused)              0       0   /\3   2     FB7_4         (b)     (b)
D<14>                 6       1<-   0   0     FB7_5   46    I/O     I/O
(unused)              0       0   /\1   4     FB7_6         (b)     (b)
(unused)              0       0   \/5   0     FB7_7         (b)     (b)
(unused)              0       0   \/5   0     FB7_8         (b)     (b)
Dout1<2>             20      15<-   0   0     FB7_9         (b)     (b)
(unused)              0       0   /\5   0     FB7_10        (b)     (b)
(unused)              0       0   \/3   2     FB7_11        (b)     (b)
D<15>                 6       3<- \/2   0     FB7_12  48    I/O     I/O
(unused)              0       0   \/5   0     FB7_13        (b)     (b)
Dout1<1>             22      17<-   0   0     FB7_14        (b)     (b)
(unused)              0       0   /\5   0     FB7_15  49    I/O     I
(unused)              0       0   /\5   0     FB7_16        (b)     (b)
(unused)              0       0   \/5   0     FB7_17        (b)     (b)
Dout1<3>             16      11<-   0   0     FB7_18        (b)     (b)

Signals Used by Logic in Function Block
  1: $OpTx$INV$143__$INT  11: CP_BASEADR<2>     21: DQ<7>.PIN 
  2: AS                   12: CP_CS             22: DQ<6>.PIN 
  3: AUTO_CONFIG_DONE<0>  13: DS_D              23: DQ<5>.PIN 
  4: AUTO_CONFIG_DONE<1>  14: Dout1<1>          24: D<10>.PIN 
  5: A<1>                 15: Dout1<2>          25: RESET 
  6: A<2>                 16: Dout1<3>          26: RW 
  7: A<3>                 17: LDS               27: SHUT_UP<2>/SHUT_UP<2>_CLKF 
  8: A<4>                 18: DQ<15>.PIN        28: UDS 
  9: A<5>                 19: DQ<14>.PIN        29: autoconfig 
 10: A<6>                 20: DQ<13>.PIN        30: lan_adr 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
CP_BASEADR<2>        .XXXXXXXXXX.X...X......XXXXXX........... 18
D<13>                XX.........X.X.....X..X..X...X.......... 8
D<14>                XX.........X..X...X..X...X...X.......... 8
Dout1<2>             .XXXXXXXXX....X.X.......X.XXX........... 15
D<15>                XX.........X...X.X..X....X...X.......... 8
Dout1<1>             .XXXXXXXXX...X..X.......X.XXX........... 15
Dout1<3>             .X.XXXXXXX.....XX.......X.XXX........... 14
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB8  ***********************************
Number of function block inputs used/remaining:               30/24
Number of signals used by logic mapping into function block:  30
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0   \/3   2     FB8_1         (b)     (b)
DQ<12>                8       3<-   0   0     FB8_2   130   I/O     I/O
DQ<14>                8       3<-   0   0     FB8_3   131   I/O     I/O
(unused)              0       0   /\3   2     FB8_4         (b)     (b)
LAN_WRH               3       0     0   2     FB8_5   132   I/O     O
(unused)              0       0     0   5     FB8_6         (b)     
(unused)              0       0     0   5     FB8_7         (b)     
LAN_CS                2       0     0   3     FB8_8   133   I/O     O
(unused)              0       0     0   5     FB8_9         (b)     
LAN_RD                1       0     0   4     FB8_10  134   I/O     O
(unused)              0       0     0   5     FB8_11        (b)     
(unused)              0       0     0   5     FB8_12        (b)     
(unused)              0       0     0   5     FB8_13        (b)     
(unused)              0       0     0   5     FB8_14        (b)     
(unused)              0       0     0   5     FB8_15        (b)     
DS_D                  2       0     0   3     FB8_16        (b)     (b)
CP_WE_S               3       0   \/1   1     FB8_17        (b)     (b)
CP_BASEADR<4>         6       1<-   0   0     FB8_18        (b)     (b)

Signals Used by Logic in Function Block
  1: AS                   11: CP_CS                               21: D<14>.PIN 
  2: AUTO_CONFIG_DONE<0>  12: DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT  22: D<12>.PIN 
  3: AUTO_CONFIG_DONE<1>  13: DS_D                                23: D<6>.PIN 
  4: A<1>                 14: LAN_CS_RST                          24: D<4>.PIN 
  5: A<2>                 15: LAN_RD_S                            25: RESET 
  6: A<3>                 16: LAN_RST_SM_FSM_FFd2                 26: RW 
  7: A<4>                 17: LAN_RST_SM_FSM_FFd3                 27: SHUT_UP<2>/SHUT_UP<2>_CLKF 
  8: A<5>                 18: LAN_WRH_S                           28: UDS 
  9: A<6>                 19: LAN_WR_RST                          29: autoconfig 
 10: CP_BASEADR<4>        20: LDS                                 30: lan_adr 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
DQ<12>               X.........XX...XX..X.X.X.X.X.X.......... 11
DQ<14>               X.........XX...XX..XX.X..X.X.X.......... 11
LAN_WRH              X................XX.....X............... 4
LAN_CS               .............X..........X....X.......... 3
LAN_RD               X.............X.........X............... 3
DS_D                 ...................X......XX............ 3
CP_WE_S              ..........X........X....XXXX............ 6
CP_BASEADR<4>        XXXXXXXXXX..X......X.X..XXXXX........... 18
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB9  ***********************************
Number of function block inputs used/remaining:               0/54
Number of signals used by logic mapping into function block:  0
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0     0   5     FB9_1         (b)     
(unused)              0       0     0   5     FB9_2   50    I/O     I
(unused)              0       0     0   5     FB9_3   51    I/O     I
(unused)              0       0     0   5     FB9_4         (b)     
(unused)              0       0     0   5     FB9_5   52    I/O     I
(unused)              0       0     0   5     FB9_6   53    I/O     I
(unused)              0       0     0   5     FB9_7         (b)     
(unused)              0       0     0   5     FB9_8   54    I/O     I
(unused)              0       0     0   5     FB9_9         (b)     
(unused)              0       0     0   5     FB9_10        (b)     
(unused)              0       0     0   5     FB9_11  56    I/O     I
(unused)              0       0     0   5     FB9_12  57    I/O     I
(unused)              0       0     0   5     FB9_13        (b)     
(unused)              0       0     0   5     FB9_14  58    I/O     I
(unused)              0       0     0   5     FB9_15        (b)     
(unused)              0       0     0   5     FB9_16        (b)     
(unused)              0       0     0   5     FB9_17  59    I/O     I
(unused)              0       0     0   5     FB9_18        (b)     
*********************************** FB10 ***********************************
Number of function block inputs used/remaining:               30/24
Number of signals used by logic mapping into function block:  30
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0   \/5   0     FB10_1        (b)     (b)
DQ<1>                 7       5<- \/3   0     FB10_2  117   I/O     I/O
DQ<0>                 7       3<- \/1   0     FB10_3  118   I/O     I/O
(unused)              0       0   \/5   0     FB10_4        (b)     (b)
DQ<3>                 7       6<- \/4   0     FB10_5  119   I/O     I/O
DQ<2>                 7       4<- \/2   0     FB10_6  120   I/O     I/O
DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT
                      4       2<- \/3   0     FB10_7        (b)     (b)
DQ<5>                 7       3<- \/1   0     FB10_8  121   I/O     I/O
(unused)              0       0   \/5   0     FB10_9        (b)     (b)
DQ<4>                 9       6<- \/2   0     FB10_10 124   I/O     I/O
DQ<7>                 7       2<-   0   0     FB10_11 125   I/O     I/O
DQ<6>                 7       2<-   0   0     FB10_12 126   I/O     I/O
LAN_INT_ENABLE        5       2<- /\2   0     FB10_13       (b)     (b)
DQ<8>                10       7<- /\2   0     FB10_14 128   I/O     I/O
(unused)              0       0   /\5   0     FB10_15       (b)     (b)
CP_RD_S               3       0   /\2   0     FB10_16       (b)     (b)
DQ<10>               10       5<-   0   0     FB10_17 129   I/O     I/O
(unused)              0       0   /\5   0     FB10_18       (b)     (b)

Signals Used by Logic in Function Block
  1: AS                                  11: D<14>.PIN         21: D<4>.PIN 
  2: A<15>                               12: D<13>.PIN         22: D<3>.PIN 
  3: CP_CS                               13: D<12>.PIN         23: D<2>.PIN 
  4: DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT  14: D<11>.PIN         24: D<1>.PIN 
  5: LAN_INT_ENABLE                      15: D<10>.PIN         25: D<0>.PIN 
  6: LAN_RST_SM_FSM_FFd1                 16: D<9>.PIN          26: RESET 
  7: LAN_RST_SM_FSM_FFd2                 17: D<8>.PIN          27: RW 
  8: LAN_RST_SM_FSM_FFd3                 18: D<7>.PIN          28: SHUT_UP<2>/SHUT_UP<2>_CLKF 
  9: LDS                                 19: D<6>.PIN          29: UDS 
 10: D<15>.PIN                           20: D<5>.PIN          30: lan_adr 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
DQ<1>                X.XX..XXX......X.......X..X..X.......... 10
DQ<0>                X.XX..XXX.......X.......X.X..X.......... 10
DQ<3>                X.XX..XXX....X.......X....X..X.......... 10
DQ<2>                X.XX..XXX.....X.......X...X..X.......... 10
DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT 
                     X.X...XXX.................X.XX.......... 8
DQ<5>                X.XX..XXX..X.......X......X..X.......... 10
DQ<4>                X.XX.XXXX...X.......X.....X..X.......... 11
DQ<7>                X.XX..XXXX.......X........X..X.......... 10
DQ<6>                X.XX..XXX.X.......X.......X..X.......... 10
LAN_INT_ENABLE       .X..X...XX................XXXX.......... 8
DQ<8>                X.XX.XXXX.......X.......X.X.XX.......... 12
CP_RD_S              ..X.....X................XXXX........... 6
DQ<10>               X.XX.XXXX.....X.......X...X.XX.......... 12
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB11 ***********************************
Number of function block inputs used/remaining:               30/24
Number of signals used by logic mapping into function block:  30
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0   \/5   0     FB11_1        (b)     (b)
Dout1<0>             22      17<-   0   0     FB11_2        (b)     (b)
(unused)              0       0   /\5   0     FB11_3  60    I/O     I
(unused)              0       0   /\2   3     FB11_4        (b)     (b)
(unused)              0       0     0   5     FB11_5  61    I/O     I
(unused)              0       0     0   5     FB11_6        (b)     
CP_WE_QUIRK           2       0     0   3     FB11_7        (b)     (b)
SHUT_UP<2>            4       0     0   1     FB11_8        (b)     (b)
SHUT_UP<1>            4       0   \/1   0     FB11_9        (b)     (b)
LAN_BASEADR<7>        6       1<-   0   0     FB11_10 64    I/O     I
LAN_BASEADR<4>        6       1<-   0   0     FB11_11 66    I/O     I
ROM_B<0>              0       0   /\1   4     FB11_12 68    I/O     O
LAN_BASEADR<3>        6       1<-   0   0     FB11_13       (b)     (b)
ROM_B<1>              0       0   /\1   4     FB11_14 69    I/O     O
IDE_BASEADR<7>        6       1<-   0   0     FB11_15       (b)     (b)
IDE_BASEADR<4>        6       2<- /\1   0     FB11_16       (b)     (b)
CP_WE                 1       0   /\2   2     FB11_17 70    I/O     O
(unused)              0       0   \/5   0     FB11_18       (b)     (b)

Signals Used by Logic in Function Block
  1: AS                   11: CP_WE_QUIRK       21: D<15>.PIN 
  2: AUTOBOOT_OFF         12: CP_WE_S           22: D<12>.PIN 
  3: AUTO_CONFIG_DONE<0>  13: DS_D              23: D<11>.PIN 
  4: AUTO_CONFIG_DONE<1>  14: Dout1<0>          24: RESET 
  5: A<1>                 15: IDE_BASEADR<4>    25: RW 
  6: A<2>                 16: IDE_BASEADR<7>    26: SHUT_UP<1> 
  7: A<3>                 17: LAN_BASEADR<3>    27: SHUT_UP<2> 
  8: A<4>                 18: LAN_BASEADR<4>    28: SHUT_UP<2>/SHUT_UP<2>_CLKF 
  9: A<5>                 19: LAN_BASEADR<7>    29: UDS 
 10: A<6>                 20: LDS               30: autoconfig 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
Dout1<0>             XXXXXXXXXX...X.....X...X...XXX.......... 16
CP_WE_QUIRK          ...........X...............X............ 2
SHUT_UP<2>           X.XXXXXXXX..X......X...XX.XXXX.......... 17
SHUT_UP<1>           X.XXXXXXXX..X......X...XXX.XXX.......... 17
LAN_BASEADR<7>       X.XXXXXXXX..X.....XXX..XX..XXX.......... 18
LAN_BASEADR<4>       X.XXXXXXXX..X....X.X.X.XX..XXX.......... 18
ROM_B<0>             ........................................ 0
LAN_BASEADR<3>       X.XXXXXXXX..X...X..X..XXX..XXX.......... 18
ROM_B<1>             ........................................ 0
IDE_BASEADR<7>       X.XXXXXXXX..X..X...XX..XX..XXX.......... 18
IDE_BASEADR<4>       X.XXXXXXXX..X.X....X.X.XX..XXX.......... 18
CP_WE                X.........XX............................ 3
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB12 ***********************************
Number of function block inputs used/remaining:               23/31
Number of signals used by logic mapping into function block:  23
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0     0   5     FB12_1        (b)     
LAN_CFG<4>            0       0     0   5     FB12_2  110   I/O     O
(unused)              0       0     0   5     FB12_3  111   I/O     I
(unused)              0       0   \/2   3     FB12_4        (b)     (b)
DQ<15>                8       3<-   0   0     FB12_5  112   I/O     I/O
LAN_WR_RST            1       0   /\1   3     FB12_6        (b)     (b)
ROM_OE_S              2       0   \/3   0     FB12_7        (b)     (b)
DQ<13>                8       3<-   0   0     FB12_8  113   I/O     I/O
LAN_WRL_S             2       0   \/2   1     FB12_9        (b)     (b)
DQ<11>               10       5<-   0   0     FB12_10 115   I/O     I/O
LAN_WRH_S             2       0   /\3   0     FB12_11       (b)     (b)
DQ<9>                10       5<-   0   0     FB12_12 116   I/O     I/O
LAN_RST_SM_FSM_FFd2   2       2<- /\5   0     FB12_13       (b)     (b)
LAN_RST_SM_FSM_FFd1   2       0   /\2   1     FB12_14       (b)     (b)
IDE_W_S               2       0     0   3     FB12_15       (b)     (b)
IDE_R_S               2       0     0   3     FB12_16       (b)     (b)
LAN_RD_S              3       0     0   2     FB12_17       (b)     (b)
IDE_ENABLE            3       0     0   2     FB12_18       (b)     (b)

Signals Used by Logic in Function Block
  1: AS                                   9: LDS               17: D<1>.PIN 
  2: A<15>                               10: D<15>.PIN         18: RESET 
  3: CP_CS                               11: D<13>.PIN         19: RW 
  4: DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT  12: D<11>.PIN         20: SHUT_UP<2>/SHUT_UP<2>_CLKF 
  5: IDE_ENABLE                          13: D<9>.PIN          21: UDS 
  6: LAN_RST_SM_FSM_FFd1                 14: D<7>.PIN          22: ide 
  7: LAN_RST_SM_FSM_FFd2                 15: D<5>.PIN          23: lan_adr 
  8: LAN_RST_SM_FSM_FFd3                 16: D<3>.PIN         

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
LAN_CFG<4>           ........................................ 0
DQ<15>               X.XX..XXXX...X....X.X.X................. 11
LAN_WR_RST           ......XX.........X...................... 3
ROM_OE_S             X...X............XXX.X.................. 6
DQ<13>               X.XX..XXX.X...X...X.X.X................. 11
LAN_WRL_S            .X......X.........XX..X................. 5
DQ<11>               X.XX.XXXX..X...X..X.X.X................. 12
LAN_WRH_S            .X................XXX.X................. 5
DQ<9>                X.XX.XXXX...X...X.X.X.X................. 12
LAN_RST_SM_FSM_FFd2  .....XXX.........X...................... 4
LAN_RST_SM_FSM_FFd1  .....XXX.........X...................... 4
IDE_W_S              X................XXX.X.................. 5
IDE_R_S              X...X............XXX.X.................. 6
LAN_RD_S             .X......X.........XXX.X................. 6
IDE_ENABLE           X...X............XXX.X.................. 6
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB13 ***********************************
Number of function block inputs used/remaining:               30/24
Number of signals used by logic mapping into function block:  30
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
SHUT_UP<0>            4       1<- /\2   0     FB13_1        (b)     (b)
CP_RD                 1       0   /\1   3     FB13_2  71    I/O     O
(unused)              0       0     0   5     FB13_3        (b)     
(unused)              0       0     0   5     FB13_4        (b)     
(unused)              0       0     0   5     FB13_5        (b)     
(unused)              0       0     0   5     FB13_6        (b)     
(unused)              0       0     0   5     FB13_7        (b)     
(unused)              0       0     0   5     FB13_8  74    I/O     I
(unused)              0       0     0   5     FB13_9        (b)     
(unused)              0       0   \/3   2     FB13_10       (b)     (b)
LAN_BASEADR<5>        6       3<- \/2   0     FB13_11 75    I/O     I
LAN_BASEADR<2>        6       2<- \/1   0     FB13_12       (b)     (b)
LAN_BASEADR<1>        6       1<-   0   0     FB13_13       (b)     (b)
LAN_WRL               3       0   \/2   0     FB13_14 76    I/O     O
IDE_BASEADR<5>        6       2<- \/1   0     FB13_15 77    I/O     (b)
IDE_BASEADR<2>        6       1<-   0   0     FB13_16       (b)     (b)
IDE_BASEADR<1>        6       1<-   0   0     FB13_17 78    I/O     (b)
CP_BASEADR<5>         6       2<- /\1   0     FB13_18       (b)     (b)

Signals Used by Logic in Function Block
  1: AS                   11: CP_RD_S           21: LDS 
  2: AUTO_CONFIG_DONE<0>  12: DS_D              22: D<13>.PIN 
  3: AUTO_CONFIG_DONE<1>  13: IDE_BASEADR<1>    23: D<10>.PIN 
  4: A<1>                 14: IDE_BASEADR<2>    24: D<9>.PIN 
  5: A<2>                 15: IDE_BASEADR<5>    25: RESET 
  6: A<3>                 16: LAN_BASEADR<1>    26: RW 
  7: A<4>                 17: LAN_BASEADR<2>    27: SHUT_UP<0> 
  8: A<5>                 18: LAN_BASEADR<5>    28: SHUT_UP<2>/SHUT_UP<2>_CLKF 
  9: A<6>                 19: LAN_WRL_S         29: UDS 
 10: CP_BASEADR<5>        20: LAN_WR_RST        30: autoconfig 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
SHUT_UP<0>           XXXXXXXXX..X........X...XXXXXX.......... 17
CP_RD                X.........X............................. 2
LAN_BASEADR<5>       XXXXXXXXX..X.....X..XX..XX.XXX.......... 18
LAN_BASEADR<2>       XXXXXXXXX..X....X...X.X.XX.XXX.......... 18
LAN_BASEADR<1>       XXXXXXXXX..X...X....X..XXX.XXX.......... 18
LAN_WRL              X.................XX....X............... 4
IDE_BASEADR<5>       XXXXXXXXX..X..X.....XX..XX.XXX.......... 18
IDE_BASEADR<2>       XXXXXXXXX..X.X......X.X.XX.XXX.......... 18
IDE_BASEADR<1>       XXXXXXXXX..XX.......X..XXX.XXX.......... 18
CP_BASEADR<5>        XXXXXXXXXX.X........XX..XX.XXX.......... 18
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB14 ***********************************
Number of function block inputs used/remaining:               30/24
Number of signals used by logic mapping into function block:  30
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0   /\5   0     FB14_1        (b)     (b)
cp_and0000/cp_and0000_D2
                      2       2<- /\5   0     FB14_2        (b)     (b)
OVR                   1       0   /\2   2     FB14_3  100   I/O     O
(unused)              0       0     0   5     FB14_4        (b)     
(unused)              0       0     0   5     FB14_5  101   I/O     
(unused)              0       0     0   5     FB14_6  102   I/O     I
(unused)              0       0     0   5     FB14_7        (b)     
(unused)              0       0     0   5     FB14_8  103   I/O     I
(unused)              0       0     0   5     FB14_9        (b)     
(unused)              0       0     0   5     FB14_10 104   I/O     I
CFOUT                 1       0     0   4     FB14_11 105   I/O     O
(unused)              0       0     0   5     FB14_12       (b)     
(unused)              0       0     0   5     FB14_13       (b)     
SLAVE                 2       0     0   3     FB14_14 106   I/O     O
OWN                   0       0     0   5     FB14_15 107   I/O     O
autoconfig            4       0   \/1   0     FB14_16       (b)     (b)
(unused)              0       0   \/5   0     FB14_17       (b)     (b)
ide                  21      16<-   0   0     FB14_18       (b)     (b)

Signals Used by Logic in Function Block
  1: $OpTx$FX_DC$334      11: A<22>             21: CP_BASEADR<7> 
  2: AS                   12: A<23>             22: CP_CS 
  3: AUTO_CONFIG_DONE<0>  13: CFIN              23: Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2 
  4: AUTO_CONFIG_DONE<1>  14: CP_BASEADR<0>     24: SHUT_UP<1> 
  5: A<16>                15: CP_BASEADR<1>     25: SHUT_UP<2> 
  6: A<17>                16: CP_BASEADR<2>     26: autoconfig 
  7: A<18>                17: CP_BASEADR<3>     27: cp_and0000/cp_and0000_D2 
  8: A<19>                18: CP_BASEADR<4>     28: ide 
  9: A<20>                19: CP_BASEADR<5>     29: ide/ide_RSTF__$INT 
 10: A<21>                20: CP_BASEADR<6>     30: lan_adr 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
cp_and0000/cp_and0000_D2 
                     ..XXXXXXXXXXX........................... 11
OVR                  .X.........................X............ 2
CFOUT                ..XX.................................... 2
SLAVE                .X...................X...X.X.X.......... 5
OWN                  ........................................ 0
autoconfig           .XXXXXXXXXXXX...............X........... 13
ide                  XXXXXXXXXXXXXXXXXXXXX.XXX.X.X........... 26
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB15 ***********************************
Number of function block inputs used/remaining:               24/30
Number of signals used by logic mapping into function block:  24
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2
                     16      11<-   0   0     FB15_1        (b)     (b)
(unused)              0       0   /\5   0     FB15_2  79    I/O     (b)
(unused)              0       0     0   5     FB15_3  80    I/O     I
(unused)              0       0     0   5     FB15_4        (b)     
(unused)              0       0     0   5     FB15_5        (b)     
(unused)              0       0     0   5     FB15_6        (b)     
(unused)              0       0     0   5     FB15_7        (b)     
(unused)              0       0     0   5     FB15_8  81    I/O     I
(unused)              0       0     0   5     FB15_9        (b)     
(unused)              0       0     0   5     FB15_10 82    I/O     I
(unused)              0       0     0   5     FB15_11 83    I/O     I
DTACK                 1       0     0   4     FB15_12 85    I/O     O
(unused)              0       0     0   5     FB15_13       (b)     
(unused)              0       0     0   5     FB15_14 86    I/O     I
(unused)              0       0     0   5     FB15_15 87    I/O     I
SHUT_UP<2>/SHUT_UP<2>_CLKF
                      2       0     0   3     FB15_16       (b)     (b)
ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST
                      2       0   \/1   2     FB15_17 88    I/O     I
(unused)              0       0   \/5   0     FB15_18       (b)     (b)

Signals Used by Logic in Function Block
  1: AS                 9: A<23>             17: IDE_BASEADR<4> 
  2: A<16>             10: C1                18: IDE_BASEADR<5> 
  3: A<17>             11: C3                19: IDE_BASEADR<6> 
  4: A<18>             12: CP_IRQ            20: IDE_BASEADR<7> 
  5: A<19>             13: IDE_BASEADR<0>    21: IDE_WAIT 
  6: A<20>             14: IDE_BASEADR<1>    22: LAN_INT_ENABLE 
  7: A<21>             15: IDE_BASEADR<2>    23: LAN_INT 
  8: A<22>             16: IDE_BASEADR<3>    24: ide 

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2 
                     .XXXXXXXX...XXXXXXXX.................... 16
DTACK                X...................X..X................ 3
SHUT_UP<2>/SHUT_UP<2>_CLKF 
                     .........XX............................. 2
ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST 
                     ...........X.........XX................. 3
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*********************************** FB16 ***********************************
Number of function block inputs used/remaining:               0/54
Number of signals used by logic mapping into function block:  0
Signal              Total   Imp   Exp Unused  Loc     Pin   Pin     Pin
Name                Pt      Pt    Pt  Pt               #    Type    Use
(unused)              0       0     0   5     FB16_1        (b)     
(unused)              0       0     0   5     FB16_2  91    I/O     I
(unused)              0       0     0   5     FB16_3  92    I/O     I
(unused)              0       0     0   5     FB16_4        (b)     
(unused)              0       0     0   5     FB16_5  93    I/O     
(unused)              0       0     0   5     FB16_6  94    I/O     I
(unused)              0       0     0   5     FB16_7        (b)     
(unused)              0       0     0   5     FB16_8  95    I/O     I
(unused)              0       0     0   5     FB16_9        (b)     
MTACK                 0       0     0   5     FB16_10 96    I/O     O
(unused)              0       0     0   5     FB16_11 97    I/O     I
(unused)              0       0     0   5     FB16_12 98    I/O     I
(unused)              0       0     0   5     FB16_13       (b)     
(unused)              0       0     0   5     FB16_14       (b)     
(unused)              0       0     0   5     FB16_15       (b)     
(unused)              0       0     0   5     FB16_16       (b)     
(unused)              0       0     0   5     FB16_17       (b)     
(unused)              0       0     0   5     FB16_18       (b)     

Signals Used by Logic in Function Block

Signal                        1         2         3         4 FB
Name                0----+----0----+----0----+----0----+----0 Inputs
MTACK                ........................................ 0
                    0----+----1----+----2----+----3----+----4
                              0         0         0         0
*******************************  Equations  ********************************

********** Mapped Logic **********


$OpTx$FX_DC$334 <= ((SHUT_UP(0))
	OR (ide/ide_RSTF__$INT.EXP)
	OR (LAN_BASEADR(1) AND NOT A(17))
	OR (LAN_BASEADR(6) AND NOT A(22))
	OR (NOT LAN_BASEADR(6) AND A(22))
	OR (LAN_BASEADR(7) AND NOT A(23))
	OR (NOT LAN_BASEADR(7) AND A(23))
	OR (LAN_BASEADR(0) AND NOT A(16))
	OR (NOT LAN_BASEADR(0) AND A(16))
	OR (NOT LAN_BASEADR(1) AND A(17))
	OR (LAN_BASEADR(3) AND NOT A(19))
	OR (LAN_BASEADR(4) AND NOT A(20))
	OR (NOT LAN_BASEADR(4) AND A(20))
	OR (LAN_BASEADR(5) AND NOT A(21))
	OR (NOT LAN_BASEADR(5) AND A(21)));


$OpTx$INV$143__$INT <= ((AS)
	OR (NOT RW)
	OR (NOT lan_adr AND NOT autoconfig AND CP_CS));

FDCPE_AUTO_CONFIG_DONE0: FDCPE port map (AUTO_CONFIG_DONE(0),AUTO_CONFIG_DONE_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
AUTO_CONFIG_DONE_D(0) <= ((AS AND RESET AND AUTO_CONFIG_DONE_CYCLE(0))
	OR (NOT AS AND RESET AND AUTO_CONFIG_DONE(0)));

FDCPE_AUTO_CONFIG_DONE1: FDCPE port map (AUTO_CONFIG_DONE(1),AUTO_CONFIG_DONE_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
AUTO_CONFIG_DONE_D(1) <= ((AS AND RESET AND AUTO_CONFIG_DONE_CYCLE(1))
	OR (NOT AS AND RESET AND AUTO_CONFIG_DONE(1)));

FTCPE_AUTO_CONFIG_DONE_CYCLE0: FTCPE port map (AUTO_CONFIG_DONE_CYCLE(0),AUTO_CONFIG_DONE_CYCLE_T(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
AUTO_CONFIG_DONE_CYCLE_T(0) <= ((RW AND RESET)
	OR (RESET AND A(5))
	OR (RESET AND NOT DS_D)
	OR (AS AND RESET)
	OR (RESET AND NOT autoconfig)
	OR (NOT RESET AND NOT AUTO_CONFIG_DONE_CYCLE(0))
	OR (RESET AND UDS AND LDS)
	OR (RESET AND AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND NOT A(2))
	OR (RESET AND A(4))
	OR (RESET AND A(1))
	OR (RESET AND NOT A(6))
	OR (RESET AND NOT A(3)));

FTCPE_AUTO_CONFIG_DONE_CYCLE1: FTCPE port map (AUTO_CONFIG_DONE_CYCLE(1),AUTO_CONFIG_DONE_CYCLE_T(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
AUTO_CONFIG_DONE_CYCLE_T(1) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE_CYCLE(0) AND autoconfig AND NOT LDS AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND 
	A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(0) AND 
	AUTO_CONFIG_DONE_CYCLE(0) AND autoconfig AND NOT LDS AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND 
	A(3) AND DS_D)
	OR (NOT RESET AND AUTO_CONFIG_DONE_CYCLE(1))
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE_CYCLE(0) AND autoconfig AND NOT UDS AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND 
	A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(0) AND 
	AUTO_CONFIG_DONE_CYCLE(0) AND autoconfig AND NOT UDS AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND 
	A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE_CYCLE(0) AND 
	autoconfig AND NOT UDS AND A(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND 
	A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE_CYCLE(0) AND 
	autoconfig AND NOT LDS AND A(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND A(6) AND 
	A(3) AND DS_D));


A_LAN(0) <= NOT ((NOT A(1) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3));


A_LAN(1) <= NOT ((NOT A(2) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3));


A_LAN(2) <= NOT (((NOT A(2) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	NOT CP_CS)
	OR (NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND NOT A(3) AND 
	CP_CS)));


A_LAN(3) <= ((A(4) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	CP_CS)
	OR (NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND A(3) AND 
	NOT CP_CS));


A_LAN(4) <= NOT (((NOT A(5) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	CP_CS)
	OR (NOT A(4) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	NOT CP_CS)));


A_LAN(5) <= NOT (((NOT A(5) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	NOT CP_CS)
	OR (NOT A(6) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	CP_CS)));


A_LAN(6) <= ((LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1)
	OR (LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1)
	OR (A(7) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3));


A_LAN(7) <= NOT ((NOT A(8) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3));


A_LAN(8) <= NOT ((NOT A(9) AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3));


A_LAN(9) <= NOT ((NOT A(10) AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3));


A_LAN(10) <= NOT ((NOT A(11) AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3));


A_LAN(11) <= NOT ((NOT A(12) AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3));


A_LAN(12) <= NOT ((NOT A(13) AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3));


A_LAN(13) <= NOT ((NOT A(14) AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3));


CFOUT_I <= '0';
CFOUT <= CFOUT_I when CFOUT_OE = '1' else 'Z';
CFOUT_OE <= (AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0));

FTCPE_CP_BASEADR0: FTCPE port map (CP_BASEADR(0),CP_BASEADR_T(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
CP_BASEADR_T(0) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(0) AND NOT A(1) AND A(6) AND NOT D(8).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(0) AND NOT A(1) AND A(6) AND NOT D(8).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT CP_BASEADR(0))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(0) AND NOT A(1) AND A(6) AND D(8).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(0) AND NOT A(1) AND A(6) AND D(8).PIN AND A(3) AND DS_D));

FTCPE_CP_BASEADR1: FTCPE port map (CP_BASEADR(1),CP_BASEADR_T(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
CP_BASEADR_T(1) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(1) AND NOT A(1) AND A(6) AND NOT D(9).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT CP_BASEADR(1))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(1) AND NOT A(1) AND A(6) AND D(9).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(1) AND NOT A(1) AND A(6) AND D(9).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(1) AND NOT A(1) AND A(6) AND NOT D(9).PIN AND A(3) AND DS_D));

FTCPE_CP_BASEADR2: FTCPE port map (CP_BASEADR(2),CP_BASEADR_T(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
CP_BASEADR_T(2) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(2) AND NOT A(1) AND A(6) AND NOT D(10).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(2) AND NOT A(1) AND A(6) AND NOT D(10).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT CP_BASEADR(2))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(2) AND NOT A(1) AND A(6) AND D(10).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(2) AND NOT A(1) AND A(6) AND D(10).PIN AND A(3) AND DS_D));

FTCPE_CP_BASEADR3: FTCPE port map (CP_BASEADR(3),CP_BASEADR_T(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
CP_BASEADR_T(3) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(3) AND NOT A(1) AND A(6) AND NOT D(11).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT CP_BASEADR(3))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(3) AND NOT A(1) AND A(6) AND D(11).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(3) AND NOT A(1) AND A(6) AND D(11).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(3) AND NOT A(1) AND A(6) AND NOT D(11).PIN AND A(3) AND DS_D));

FTCPE_CP_BASEADR4: FTCPE port map (CP_BASEADR(4),CP_BASEADR_T(4),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
CP_BASEADR_T(4) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(4) AND NOT A(1) AND A(6) AND NOT D(12).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT CP_BASEADR(4))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(4) AND NOT A(1) AND A(6) AND D(12).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(4) AND NOT A(1) AND A(6) AND D(12).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(4) AND NOT A(1) AND A(6) AND NOT D(12).PIN AND A(3) AND DS_D));

FTCPE_CP_BASEADR5: FTCPE port map (CP_BASEADR(5),CP_BASEADR_T(5),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
CP_BASEADR_T(5) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(5) AND NOT A(1) AND A(6) AND NOT D(13).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(5) AND NOT A(1) AND A(6) AND NOT D(13).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT CP_BASEADR(5))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(5) AND NOT A(1) AND A(6) AND D(13).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(5) AND NOT A(1) AND A(6) AND D(13).PIN AND A(3) AND DS_D));

FTCPE_CP_BASEADR6: FTCPE port map (CP_BASEADR(6),CP_BASEADR_T(6),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
CP_BASEADR_T(6) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(6) AND NOT A(1) AND A(6) AND NOT D(14).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT CP_BASEADR(6))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(6) AND NOT A(1) AND A(6) AND D(14).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(6) AND NOT A(1) AND A(6) AND D(14).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	CP_BASEADR(6) AND NOT A(1) AND A(6) AND NOT D(14).PIN AND A(3) AND DS_D));

FTCPE_CP_BASEADR7: FTCPE port map (CP_BASEADR(7),CP_BASEADR_T(7),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
CP_BASEADR_T(7) <= ((NOT AS AND NOT RW AND RESET AND NOT D(15).PIN AND 
	NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND 
	NOT A(5) AND NOT A(4) AND CP_BASEADR(7) AND NOT A(1) AND A(6) AND A(3) AND 
	DS_D)
	OR (NOT RESET AND NOT CP_BASEADR(7))
	OR (NOT AS AND NOT RW AND D(15).PIN AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(7) AND NOT A(1) AND A(6) AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND D(15).PIN AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT CP_BASEADR(7) AND NOT A(1) AND A(6) AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT D(15).PIN AND 
	NOT AUTO_CONFIG_DONE(1) AND AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND 
	NOT A(5) AND NOT A(4) AND CP_BASEADR(7) AND NOT A(1) AND A(6) AND A(3) AND 
	DS_D));

FDCPE_CP_CS: FDCPE port map (CP_CS,CP_CS_D,NOT AS,'0',NOT ide/ide_RSTF__$INT);
CP_CS_D <= ((SHUT_UP(1))
	OR (NOT $OpTx$FX_DC$334)
	OR (EXP30_.EXP)
	OR (CP_BASEADR(5) AND NOT A(21))
	OR (NOT CP_BASEADR(5) AND A(21))
	OR (CP_BASEADR(6) AND NOT A(22))
	OR (NOT CP_BASEADR(6) AND A(22))
	OR (NOT CP_BASEADR(7) AND A(23))
	OR (EXP28_.EXP)
	OR (CP_BASEADR(2) AND NOT A(18))
	OR (CP_BASEADR(3) AND NOT A(19))
	OR (NOT CP_BASEADR(3) AND A(19))
	OR (CP_BASEADR(4) AND NOT A(20))
	OR (NOT CP_BASEADR(4) AND A(20))
	OR (CP_BASEADR(7) AND NOT A(23)));


CP_RD <= NOT ((NOT AS AND NOT CP_RD_S));

FDCPE_CP_RD_S: FDCPE port map (CP_RD_S,CP_RD_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
CP_RD_S_D <= ((RW AND RESET AND NOT UDS AND NOT CP_CS)
	OR (RW AND RESET AND NOT LDS AND NOT CP_CS));


CP_WE <= NOT ((NOT AS AND NOT CP_WE_S AND CP_WE_QUIRK));

FDCPE_CP_WE_QUIRK: FDCPE port map (CP_WE_QUIRK,CP_WE_S,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');

FDCPE_CP_WE_S: FDCPE port map (CP_WE_S,CP_WE_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
CP_WE_S_D <= ((NOT RW AND RESET AND NOT UDS AND NOT CP_CS)
	OR (NOT RW AND RESET AND NOT LDS AND NOT CP_CS));


D_I(0) <= NOT (((NOT AS AND RW AND NOT DQ(0).PIN AND lan_adr)
	OR (NOT AS AND RW AND NOT DQ(0).PIN AND NOT CP_CS)));
D(0) <= D_I(0) when D_OE(0) = '1' else 'Z';
D_OE(0) <= NOT $OpTx$INV$143__$INT;


D_I(1) <= NOT (((NOT AS AND RW AND NOT DQ(1).PIN AND lan_adr)
	OR (NOT AS AND RW AND NOT DQ(1).PIN AND NOT CP_CS)));
D(1) <= D_I(1) when D_OE(1) = '1' else 'Z';
D_OE(1) <= NOT $OpTx$INV$143__$INT;


D_I(2) <= NOT (((NOT AS AND RW AND NOT DQ(2).PIN AND lan_adr)
	OR (NOT AS AND RW AND NOT DQ(2).PIN AND NOT CP_CS)));
D(2) <= D_I(2) when D_OE(2) = '1' else 'Z';
D_OE(2) <= NOT $OpTx$INV$143__$INT;


D_I(3) <= NOT (((NOT AS AND RW AND NOT DQ(3).PIN AND lan_adr)
	OR (NOT AS AND RW AND NOT DQ(3).PIN AND NOT CP_CS)));
D(3) <= D_I(3) when D_OE(3) = '1' else 'Z';
D_OE(3) <= NOT $OpTx$INV$143__$INT;


D_I(4) <= NOT (((NOT AS AND RW AND NOT DQ(4).PIN AND lan_adr)
	OR (NOT AS AND RW AND NOT DQ(4).PIN AND NOT CP_CS)));
D(4) <= D_I(4) when D_OE(4) = '1' else 'Z';
D_OE(4) <= NOT $OpTx$INV$143__$INT;


D_I(5) <= NOT (((NOT AS AND RW AND NOT DQ(5).PIN AND lan_adr)
	OR (NOT AS AND RW AND NOT DQ(5).PIN AND NOT CP_CS)));
D(5) <= D_I(5) when D_OE(5) = '1' else 'Z';
D_OE(5) <= NOT $OpTx$INV$143__$INT;


D_I(6) <= NOT (((NOT AS AND RW AND NOT DQ(6).PIN AND lan_adr)
	OR (NOT AS AND RW AND NOT DQ(6).PIN AND NOT CP_CS)));
D(6) <= D_I(6) when D_OE(6) = '1' else 'Z';
D_OE(6) <= NOT $OpTx$INV$143__$INT;


D_I(7) <= NOT (((NOT AS AND RW AND NOT DQ(7).PIN AND lan_adr)
	OR (NOT AS AND RW AND NOT DQ(7).PIN AND NOT CP_CS)));
D(7) <= D_I(7) when D_OE(7) = '1' else 'Z';
D_OE(7) <= NOT $OpTx$INV$143__$INT;


D_I(8) <= NOT (((NOT AS AND RW AND lan_adr AND NOT DQ(8).PIN)
	OR (NOT AS AND RW AND NOT DQ(0).PIN AND NOT lan_adr AND NOT CP_CS)));
D(8) <= D_I(8) when D_OE(8) = '1' else 'Z';
D_OE(8) <= NOT $OpTx$INV$143__$INT;


D_I(9) <= NOT (((NOT AS AND RW AND lan_adr AND NOT DQ(9).PIN)
	OR (NOT AS AND RW AND NOT DQ(1).PIN AND NOT lan_adr AND NOT CP_CS)));
D(9) <= D_I(9) when D_OE(9) = '1' else 'Z';
D_OE(9) <= NOT $OpTx$INV$143__$INT;


D_I(10) <= NOT (((NOT AS AND RW AND lan_adr AND NOT DQ(10).PIN)
	OR (NOT AS AND RW AND NOT DQ(2).PIN AND NOT lan_adr AND NOT CP_CS)));
D(10) <= D_I(10) when D_OE(10) = '1' else 'Z';
D_OE(10) <= NOT $OpTx$INV$143__$INT;


D_I(11) <= NOT (((NOT AS AND RW AND lan_adr AND NOT DQ(11).PIN)
	OR (NOT AS AND RW AND NOT DQ(3).PIN AND NOT lan_adr AND NOT CP_CS)));
D(11) <= D_I(11) when D_OE(11) = '1' else 'Z';
D_OE(11) <= NOT $OpTx$INV$143__$INT;


D_I(12) <= ((NOT AS AND RW AND DQ(4).PIN AND NOT lan_adr AND NOT CP_CS)
	OR (AS AND Dout1(0))
	OR (NOT RW AND Dout1(0))
	OR (NOT lan_adr AND Dout1(0) AND CP_CS)
	OR (NOT AS AND RW AND lan_adr AND DQ(12).PIN));
D(12) <= D_I(12) when D_OE(12) = '1' else 'Z';
D_OE(12) <= NOT $OpTx$INV$143__$INT;


D_I(13) <= ((NOT lan_adr AND Dout1(1) AND CP_CS)
	OR (NOT AS AND RW AND lan_adr AND DQ(13).PIN)
	OR (NOT AS AND RW AND DQ(5).PIN AND NOT lan_adr AND NOT CP_CS)
	OR (AS AND Dout1(1))
	OR (NOT RW AND Dout1(1)));
D(13) <= D_I(13) when D_OE(13) = '1' else 'Z';
D_OE(13) <= NOT $OpTx$INV$143__$INT;


D_I(14) <= ((NOT AS AND RW AND DQ(6).PIN AND NOT lan_adr AND NOT CP_CS)
	OR (AS AND Dout1(2))
	OR (NOT RW AND Dout1(2))
	OR (NOT lan_adr AND Dout1(2) AND CP_CS)
	OR (NOT AS AND RW AND lan_adr AND DQ(14).PIN));
D(14) <= D_I(14) when D_OE(14) = '1' else 'Z';
D_OE(14) <= NOT $OpTx$INV$143__$INT;


D_I(15) <= ((NOT lan_adr AND Dout1(3) AND CP_CS)
	OR (NOT AS AND RW AND lan_adr AND DQ(15).PIN)
	OR (NOT AS AND RW AND DQ(7).PIN AND NOT lan_adr AND NOT CP_CS)
	OR (AS AND Dout1(3))
	OR (NOT RW AND Dout1(3)));
D(15) <= D_I(15) when D_OE(15) = '1' else 'Z';
D_OE(15) <= NOT $OpTx$INV$143__$INT;


DQ_I(0) <= ((NOT lan_adr AND LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(8).PIN)
	OR (NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(8).PIN AND CP_CS)
	OR (NOT AS AND NOT RW AND lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(0).PIN)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(8).PIN)
	OR (RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(8).PIN)
	OR (NOT AS AND NOT RW AND NOT LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(0).PIN AND NOT CP_CS));
DQ(0) <= DQ_I(0) when DQ_OE(0) = '1' else 'Z';
DQ_OE(0) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(1) <= ((AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(9).PIN)
	OR (RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(9).PIN)
	OR (NOT lan_adr AND LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(9).PIN)
	OR (NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(9).PIN AND CP_CS)
	OR (NOT AS AND NOT RW AND lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(1).PIN)
	OR (NOT AS AND NOT RW AND NOT LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(1).PIN AND NOT CP_CS));
DQ(1) <= DQ_I(1) when DQ_OE(1) = '1' else 'Z';
DQ_OE(1) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(2) <= ((RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(10).PIN)
	OR (NOT lan_adr AND LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(10).PIN)
	OR (NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(10).PIN AND CP_CS)
	OR (NOT AS AND NOT RW AND lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(2).PIN)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(10).PIN)
	OR (NOT AS AND NOT RW AND NOT LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(2).PIN AND NOT CP_CS));
DQ(2) <= DQ_I(2) when DQ_OE(2) = '1' else 'Z';
DQ_OE(2) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(3) <= ((DQ_0_IOBUFE.EXP)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(11).PIN)
	OR (RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(11).PIN)
	OR (NOT lan_adr AND LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(11).PIN)
	OR (NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(11).PIN AND CP_CS)
	OR (NOT AS AND NOT RW AND NOT LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(3).PIN AND NOT CP_CS));
DQ(3) <= DQ_I(3) when DQ_OE(3) = '1' else 'Z';
DQ_OE(3) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(4) <= ((DQ_5_IOBUFE.EXP)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(12).PIN)
	OR (RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(12).PIN)
	OR (NOT lan_adr AND LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(12).PIN)
	OR (NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(12).PIN AND CP_CS)
	OR (NOT AS AND NOT RW AND lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(4).PIN)
	OR (LAN_RST_SM_FSM_FFd2 AND LAN_RST_SM_FSM_FFd1)
	OR (LAN_RST_SM_FSM_FFd3 AND LAN_RST_SM_FSM_FFd1));
DQ(4) <= DQ_I(4) when DQ_OE(4) = '1' else 'Z';
DQ_OE(4) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(5) <= ((NOT lan_adr AND LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(13).PIN)
	OR (NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(13).PIN AND CP_CS)
	OR (NOT AS AND NOT RW AND lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(5).PIN)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(13).PIN)
	OR (RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(13).PIN)
	OR (NOT AS AND NOT RW AND NOT LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(5).PIN AND NOT CP_CS));
DQ(5) <= DQ_I(5) when DQ_OE(5) = '1' else 'Z';
DQ_OE(5) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(6) <= ((NOT lan_adr AND LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(14).PIN)
	OR (NOT AS AND NOT RW AND lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(6).PIN)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(14).PIN)
	OR (RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(14).PIN)
	OR (NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(14).PIN AND CP_CS)
	OR (NOT AS AND NOT RW AND NOT LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(6).PIN AND NOT CP_CS));
DQ(6) <= DQ_I(6) when DQ_OE(6) = '1' else 'Z';
DQ_OE(6) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(7) <= ((D(15).PIN AND NOT lan_adr AND LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3)
	OR (NOT AS AND NOT RW AND lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(7).PIN)
	OR (AS AND D(15).PIN AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3)
	OR (RW AND D(15).PIN AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3)
	OR (D(15).PIN AND NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND CP_CS)
	OR (NOT AS AND NOT RW AND NOT LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(7).PIN AND NOT CP_CS));
DQ(7) <= DQ_I(7) when DQ_OE(7) = '1' else 'Z';
DQ_OE(7) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(8) <= NOT (((CP_RD_S.EXP)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	NOT D(8).PIN)
	OR (RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	NOT D(8).PIN)
	OR (NOT UDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	NOT D(8).PIN)
	OR (LDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	NOT D(8).PIN)
	OR (NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	NOT D(8).PIN AND CP_CS)
	OR (LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1)
	OR (LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1)));
DQ(8) <= DQ_I(8) when DQ_OE(8) = '1' else 'Z';
DQ_OE(8) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(9) <= ((RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(9).PIN)
	OR (lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(9).PIN)
	OR (NOT UDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(9).PIN)
	OR (LDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(9).PIN)
	OR (NOT AS AND NOT RW AND NOT lan_adr AND UDS AND NOT LDS AND 
	NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND D(1).PIN AND NOT CP_CS)
	OR (LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1)
	OR (LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(9).PIN)
	OR (NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(9).PIN AND CP_CS));
DQ(9) <= DQ_I(9) when DQ_OE(9) = '1' else 'Z';
DQ_OE(9) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(10) <= ((RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(10).PIN)
	OR (lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(10).PIN)
	OR (NOT UDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(10).PIN)
	OR (LDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(10).PIN)
	OR (NOT AS AND NOT RW AND NOT lan_adr AND UDS AND NOT LDS AND 
	NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND D(2).PIN AND NOT CP_CS)
	OR (LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1)
	OR (LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(10).PIN)
	OR (NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(10).PIN AND CP_CS));
DQ(10) <= DQ_I(10) when DQ_OE(10) = '1' else 'Z';
DQ_OE(10) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(11) <= ((RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(11).PIN)
	OR (LDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(11).PIN)
	OR (lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(11).PIN)
	OR (NOT UDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(11).PIN)
	OR (NOT AS AND NOT RW AND NOT lan_adr AND UDS AND NOT LDS AND 
	NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND D(3).PIN AND NOT CP_CS)
	OR (LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd1)
	OR (LAN_RST_SM_FSM_FFd3 AND NOT LAN_RST_SM_FSM_FFd1)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(11).PIN)
	OR (NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(11).PIN AND CP_CS));
DQ(11) <= DQ_I(11) when DQ_OE(11) = '1' else 'Z';
DQ_OE(11) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(12) <= ((lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(12).PIN)
	OR (NOT UDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(12).PIN)
	OR (NOT AS AND NOT RW AND NOT lan_adr AND UDS AND NOT LDS AND 
	NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND D(4).PIN AND NOT CP_CS)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(12).PIN)
	OR (RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(12).PIN)
	OR (LDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(12).PIN)
	OR (NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(12).PIN AND CP_CS));
DQ(12) <= DQ_I(12) when DQ_OE(12) = '1' else 'Z';
DQ_OE(12) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(13) <= ((lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(13).PIN)
	OR (NOT UDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(13).PIN)
	OR (NOT AS AND NOT RW AND NOT lan_adr AND UDS AND NOT LDS AND 
	NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND D(5).PIN AND NOT CP_CS)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(13).PIN)
	OR (RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(13).PIN)
	OR (LDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(13).PIN)
	OR (NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(13).PIN AND CP_CS));
DQ(13) <= DQ_I(13) when DQ_OE(13) = '1' else 'Z';
DQ_OE(13) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(14) <= ((lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND D(14).PIN)
	OR (NOT UDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(14).PIN)
	OR (NOT AS AND NOT RW AND NOT lan_adr AND UDS AND NOT LDS AND 
	NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND D(6).PIN AND NOT CP_CS)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(14).PIN)
	OR (RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(14).PIN)
	OR (LDS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(14).PIN)
	OR (NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND 
	D(14).PIN AND CP_CS));
DQ(14) <= DQ_I(14) when DQ_OE(14) = '1' else 'Z';
DQ_OE(14) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_I(15) <= ((D(15).PIN AND lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3)
	OR (D(15).PIN AND NOT UDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3)
	OR (NOT AS AND NOT RW AND NOT lan_adr AND UDS AND NOT LDS AND 
	NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3 AND D(7).PIN AND NOT CP_CS)
	OR (AS AND D(15).PIN AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3)
	OR (RW AND D(15).PIN AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3)
	OR (D(15).PIN AND LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3)
	OR (D(15).PIN AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND CP_CS));
DQ(15) <= DQ_I(15) when DQ_OE(15) = '1' else 'Z';
DQ_OE(15) <= NOT DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT;


DQ_9_IOBUFE/DQ_9_IOBUFE_TRST__$INT <= ((NOT lan_adr AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3 AND CP_CS)
	OR (NOT lan_adr AND UDS AND LDS AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3)
	OR (AS AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3)
	OR (RW AND NOT LAN_RST_SM_FSM_FFd2 AND NOT LAN_RST_SM_FSM_FFd3));

FDCPE_DS_D: FDCPE port map (DS_D,DS_D_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
DS_D_D <= (UDS AND LDS);


DTACK_I <= '0';
DTACK <= DTACK_I when DTACK_OE = '1' else 'Z';
DTACK_OE <= (NOT AS AND ide AND IDE_WAIT);

FDCPE_Dout10: FDCPE port map (Dout1(0),Dout1_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
Dout1_D(0) <= ((EXP53_.EXP)
	OR (RESET AND UDS AND LDS AND NOT Dout1(0))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND A(2) AND A(5) AND 
	NOT A(4) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND 
	A(4) AND NOT A(6) AND A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND 
	NOT A(4) AND A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND NOT A(5) AND A(4) AND 
	A(1) AND NOT A(6) AND A(3))
	OR (EXP52_.EXP)
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND A(2) AND A(5) AND 
	NOT A(4) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND 
	A(4) AND NOT A(6) AND A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND 
	NOT A(4) AND A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND NOT A(5) AND A(4) AND 
	A(1) AND NOT A(6) AND A(3))
	OR (NOT AS AND RESET AND NOT AUTO_CONFIG_DONE(1) AND autoconfig AND 
	NOT LDS AND A(2) AND NOT A(5) AND NOT A(1) AND NOT A(6) AND NOT A(3))
	OR (AS AND RESET AND NOT Dout1(0))
	OR (RESET AND NOT autoconfig AND NOT Dout1(0))
	OR (NOT AS AND RESET AND NOT AUTO_CONFIG_DONE(1) AND autoconfig AND 
	NOT UDS AND NOT A(5) AND NOT A(4) AND NOT A(1) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND NOT AUTO_CONFIG_DONE(1) AND autoconfig AND 
	NOT LDS AND NOT A(5) AND NOT A(4) AND NOT A(1) AND NOT A(6) AND NOT A(3)));

FDCPE_Dout11: FDCPE port map (Dout1(1),Dout1_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
Dout1_D(1) <= ((D_15_IOBUFE.EXP)
	OR (AS AND RESET AND NOT Dout1(1))
	OR (RESET AND NOT autoconfig AND NOT Dout1(1))
	OR (RESET AND UDS AND LDS AND NOT Dout1(1))
	OR (NOT AS AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(5) AND NOT A(4) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND A(2) AND A(5) AND 
	NOT A(4) AND NOT A(1) AND NOT A(6) AND NOT A(3))
	OR (EXP41_.EXP)
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND 
	NOT A(4) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND 
	NOT A(4) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND A(2) AND NOT A(5) AND 
	A(4) AND NOT A(6) AND A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND A(2) AND NOT A(5) AND 
	A(4) AND NOT A(6) AND A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND NOT A(5) AND A(4) AND 
	NOT A(1) AND NOT A(6) AND A(3))
	OR (NOT AS AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(5) AND NOT A(4) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND NOT AUTO_CONFIG_DONE(1) AND autoconfig AND 
	NOT UDS AND A(2) AND NOT A(4) AND NOT A(1) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND NOT AUTO_CONFIG_DONE(1) AND autoconfig AND 
	NOT LDS AND A(2) AND NOT A(4) AND NOT A(1) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND A(2) AND A(5) AND 
	NOT A(4) AND NOT A(1) AND NOT A(6) AND NOT A(3)));

FDCPE_Dout12: FDCPE port map (Dout1(2),Dout1_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
Dout1_D(2) <= ((EXP35_.EXP)
	OR (AS AND RESET AND NOT Dout1(2))
	OR (RESET AND NOT autoconfig AND NOT Dout1(2))
	OR (RESET AND UDS AND LDS AND NOT Dout1(2))
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND 
	NOT A(4) AND A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND AUTO_CONFIG_DONE(0) AND autoconfig AND 
	NOT UDS AND A(2) AND NOT A(5) AND A(1) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND 
	NOT A(4) AND A(1) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND 
	NOT A(4) AND A(1) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND A(2) AND A(5) AND 
	NOT A(4) AND A(1) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND A(2) AND A(5) AND 
	NOT A(4) AND A(1) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND A(2) AND NOT A(5) AND 
	A(4) AND A(1) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND 
	NOT A(4) AND A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND AUTO_CONFIG_DONE(1) AND autoconfig AND 
	NOT UDS AND A(2) AND NOT A(5) AND A(1) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND AUTO_CONFIG_DONE(1) AND autoconfig AND 
	NOT LDS AND A(2) AND NOT A(5) AND A(1) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND AUTO_CONFIG_DONE(0) AND autoconfig AND 
	NOT LDS AND A(2) AND NOT A(5) AND A(1) AND NOT A(6) AND NOT A(3)));

FDCPE_Dout13: FDCPE port map (Dout1(3),Dout1_D(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
Dout1_D(3) <= ((CP_BASEADR(2).EXP)
	OR (NOT AS AND RESET AND NOT AUTO_CONFIG_DONE(1) AND autoconfig AND 
	NOT UDS AND NOT A(5) AND A(1) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND A(2) AND NOT A(5) AND 
	A(4) AND A(1) AND NOT A(6))
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND 
	A(4) AND NOT A(1) AND NOT A(6) AND A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND A(2) AND A(5) AND 
	NOT A(4) AND NOT A(1) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND 
	A(4) AND NOT A(1) AND NOT A(6) AND A(3))
	OR (RESET AND UDS AND LDS AND NOT Dout1(3))
	OR (NOT AS AND RESET AND NOT AUTO_CONFIG_DONE(1) AND autoconfig AND 
	NOT LDS AND NOT A(5) AND A(1) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND 
	NOT A(4) AND A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND A(2) AND NOT A(5) AND 
	A(4) AND A(1) AND NOT A(6))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND 
	NOT A(4) AND A(6) AND NOT A(3))
	OR (AS AND RESET AND NOT Dout1(3))
	OR (RESET AND NOT autoconfig AND NOT Dout1(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND 
	A(1) AND NOT A(6) AND NOT A(3))
	OR (NOT AS AND RESET AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND 
	A(1) AND NOT A(6) AND NOT A(3)));














































































IDE_A(0) <= A(9);


IDE_A(1) <= A(10);


IDE_A(2) <= A(11);

FTCPE_IDE_BASEADR0: FTCPE port map (IDE_BASEADR(0),IDE_BASEADR_T(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
IDE_BASEADR_T(0) <= ((NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(0) AND NOT A(1) AND A(6) AND NOT D(8).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT IDE_BASEADR(0))
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(0) AND NOT A(1) AND A(6) AND D(8).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(0) AND NOT A(1) AND A(6) AND D(8).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(0) AND NOT A(1) AND A(6) AND NOT D(8).PIN AND A(3) AND DS_D));

FTCPE_IDE_BASEADR1: FTCPE port map (IDE_BASEADR(1),IDE_BASEADR_T(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
IDE_BASEADR_T(1) <= ((NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(1) AND NOT A(1) AND A(6) AND NOT D(9).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT IDE_BASEADR(1))
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(1) AND NOT A(1) AND A(6) AND D(9).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(1) AND NOT A(1) AND A(6) AND D(9).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(1) AND NOT A(1) AND A(6) AND NOT D(9).PIN AND A(3) AND DS_D));

FTCPE_IDE_BASEADR2: FTCPE port map (IDE_BASEADR(2),IDE_BASEADR_T(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
IDE_BASEADR_T(2) <= ((NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(2) AND NOT A(1) AND A(6) AND NOT D(10).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT IDE_BASEADR(2))
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(2) AND NOT A(1) AND A(6) AND D(10).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(2) AND NOT A(1) AND A(6) AND D(10).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(2) AND NOT A(1) AND A(6) AND NOT D(10).PIN AND A(3) AND DS_D));

FTCPE_IDE_BASEADR3: FTCPE port map (IDE_BASEADR(3),IDE_BASEADR_T(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
IDE_BASEADR_T(3) <= ((NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(3) AND NOT A(1) AND A(6) AND NOT D(11).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT IDE_BASEADR(3))
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(3) AND NOT A(1) AND A(6) AND D(11).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(3) AND NOT A(1) AND A(6) AND D(11).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(3) AND NOT A(1) AND A(6) AND NOT D(11).PIN AND A(3) AND DS_D));

FTCPE_IDE_BASEADR4: FTCPE port map (IDE_BASEADR(4),IDE_BASEADR_T(4),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
IDE_BASEADR_T(4) <= ((NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(4) AND NOT A(1) AND A(6) AND NOT D(12).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(4) AND NOT A(1) AND A(6) AND NOT D(12).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT IDE_BASEADR(4))
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(4) AND NOT A(1) AND A(6) AND D(12).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(4) AND NOT A(1) AND A(6) AND D(12).PIN AND A(3) AND DS_D));

FTCPE_IDE_BASEADR5: FTCPE port map (IDE_BASEADR(5),IDE_BASEADR_T(5),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
IDE_BASEADR_T(5) <= ((NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(5) AND NOT A(1) AND A(6) AND NOT D(13).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(5) AND NOT A(1) AND A(6) AND NOT D(13).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT IDE_BASEADR(5))
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(5) AND NOT A(1) AND A(6) AND D(13).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(5) AND NOT A(1) AND A(6) AND D(13).PIN AND A(3) AND DS_D));

FTCPE_IDE_BASEADR6: FTCPE port map (IDE_BASEADR(6),IDE_BASEADR_T(6),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
IDE_BASEADR_T(6) <= ((NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(6) AND NOT A(1) AND A(6) AND NOT D(14).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	IDE_BASEADR(6) AND NOT A(1) AND A(6) AND NOT D(14).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT IDE_BASEADR(6))
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(6) AND NOT A(1) AND A(6) AND D(14).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(6) AND NOT A(1) AND A(6) AND D(14).PIN AND A(3) AND DS_D));

FTCPE_IDE_BASEADR7: FTCPE port map (IDE_BASEADR(7),IDE_BASEADR_T(7),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
IDE_BASEADR_T(7) <= ((NOT AS AND NOT RW AND RESET AND NOT D(15).PIN AND 
	AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND 
	NOT A(5) AND NOT A(4) AND IDE_BASEADR(7) AND NOT A(1) AND A(6) AND A(3) AND 
	DS_D)
	OR (NOT RESET AND NOT IDE_BASEADR(7))
	OR (NOT AS AND NOT RW AND D(15).PIN AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(7) AND NOT A(1) AND A(6) AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND D(15).PIN AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT IDE_BASEADR(7) AND NOT A(1) AND A(6) AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT D(15).PIN AND 
	AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND 
	NOT A(5) AND NOT A(4) AND IDE_BASEADR(7) AND NOT A(1) AND A(6) AND A(3) AND 
	DS_D));


IDE_CS(0) <= NOT A(12);


IDE_CS(1) <= NOT A(13);

FDCPE_IDE_ENABLE: FDCPE port map (IDE_ENABLE,IDE_ENABLE_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
IDE_ENABLE_D <= ((RESET AND NOT IDE_ENABLE)
	OR (NOT AS AND NOT RW AND RESET AND ide));


IDE_R <= NOT ((NOT AS AND NOT IDE_R_S));

FDCPE_IDE_R_S: FDCPE port map (IDE_R_S,IDE_R_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
IDE_R_S_D <= (NOT AS AND RW AND RESET AND ide AND NOT IDE_ENABLE);


IDE_W <= NOT ((NOT AS AND NOT IDE_W_S));

FDCPE_IDE_W_S: FDCPE port map (IDE_W_S,IDE_W_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
IDE_W_S_D <= (NOT AS AND NOT RW AND RESET AND ide);


INT_OUT_I <= '0';
INT_OUT <= INT_OUT_I when INT_OUT_OE = '1' else 'Z';
INT_OUT_OE <= ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST;

FTCPE_LAN_BASEADR0: FTCPE port map (LAN_BASEADR(0),LAN_BASEADR_T(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
LAN_BASEADR_T(0) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(0) AND NOT A(1) AND A(6) AND NOT D(8).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT LAN_BASEADR(0))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(0) AND NOT A(1) AND A(6) AND D(8).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(0) AND NOT A(1) AND A(6) AND D(8).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(0) AND NOT A(1) AND A(6) AND NOT D(8).PIN AND A(3) AND DS_D));

FTCPE_LAN_BASEADR1: FTCPE port map (LAN_BASEADR(1),LAN_BASEADR_T(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
LAN_BASEADR_T(1) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(1) AND NOT A(1) AND A(6) AND NOT D(9).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT LAN_BASEADR(1))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(1) AND NOT A(1) AND A(6) AND D(9).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(1) AND NOT A(1) AND A(6) AND D(9).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(1) AND NOT A(1) AND A(6) AND NOT D(9).PIN AND A(3) AND DS_D));

FTCPE_LAN_BASEADR2: FTCPE port map (LAN_BASEADR(2),LAN_BASEADR_T(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
LAN_BASEADR_T(2) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(2) AND NOT A(1) AND A(6) AND NOT D(10).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(2) AND NOT A(1) AND A(6) AND NOT D(10).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT LAN_BASEADR(2))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(2) AND NOT A(1) AND A(6) AND D(10).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(2) AND NOT A(1) AND A(6) AND D(10).PIN AND A(3) AND DS_D));

FTCPE_LAN_BASEADR3: FTCPE port map (LAN_BASEADR(3),LAN_BASEADR_T(3),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
LAN_BASEADR_T(3) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(3) AND NOT A(1) AND A(6) AND NOT D(11).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT LAN_BASEADR(3))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(3) AND NOT A(1) AND A(6) AND D(11).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(3) AND NOT A(1) AND A(6) AND D(11).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(3) AND NOT A(1) AND A(6) AND NOT D(11).PIN AND A(3) AND DS_D));

FTCPE_LAN_BASEADR4: FTCPE port map (LAN_BASEADR(4),LAN_BASEADR_T(4),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
LAN_BASEADR_T(4) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(4) AND NOT A(1) AND A(6) AND NOT D(12).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT LAN_BASEADR(4))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(4) AND NOT A(1) AND A(6) AND D(12).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(4) AND NOT A(1) AND A(6) AND D(12).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(4) AND NOT A(1) AND A(6) AND NOT D(12).PIN AND A(3) AND DS_D));

FTCPE_LAN_BASEADR5: FTCPE port map (LAN_BASEADR(5),LAN_BASEADR_T(5),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
LAN_BASEADR_T(5) <= ((NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(5) AND NOT A(1) AND A(6) AND D(13).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(5) AND NOT A(1) AND A(6) AND NOT D(13).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(5) AND NOT A(1) AND A(6) AND NOT D(13).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT LAN_BASEADR(5))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(5) AND NOT A(1) AND A(6) AND D(13).PIN AND A(3) AND DS_D));

FTCPE_LAN_BASEADR6: FTCPE port map (LAN_BASEADR(6),LAN_BASEADR_T(6),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
LAN_BASEADR_T(6) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(6) AND NOT A(1) AND A(6) AND NOT D(14).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	LAN_BASEADR(6) AND NOT A(1) AND A(6) AND NOT D(14).PIN AND A(3) AND DS_D)
	OR (NOT RESET AND NOT LAN_BASEADR(6))
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(6) AND NOT A(1) AND A(6) AND D(14).PIN AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(6) AND NOT A(1) AND A(6) AND D(14).PIN AND A(3) AND DS_D));

FTCPE_LAN_BASEADR7: FTCPE port map (LAN_BASEADR(7),LAN_BASEADR_T(7),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
LAN_BASEADR_T(7) <= ((NOT AS AND NOT RW AND RESET AND NOT D(15).PIN AND 
	NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND 
	NOT A(5) AND NOT A(4) AND LAN_BASEADR(7) AND NOT A(1) AND A(6) AND A(3) AND 
	DS_D)
	OR (NOT RESET AND NOT LAN_BASEADR(7))
	OR (NOT AS AND NOT RW AND D(15).PIN AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(7) AND NOT A(1) AND A(6) AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND D(15).PIN AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND 
	NOT LAN_BASEADR(7) AND NOT A(1) AND A(6) AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT D(15).PIN AND 
	NOT AUTO_CONFIG_DONE(1) AND NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND 
	NOT A(5) AND NOT A(4) AND LAN_BASEADR(7) AND NOT A(1) AND A(6) AND A(3) AND 
	DS_D));


LAN_CFG_I(1) <= '0';
LAN_CFG(1) <= LAN_CFG_I(1) when LAN_CFG_OE(1) = '1' else 'Z';
LAN_CFG_OE(1) <= '0';


LAN_CFG_I(2) <= '0';
LAN_CFG(2) <= LAN_CFG_I(2) when LAN_CFG_OE(2) = '1' else 'Z';
LAN_CFG_OE(2) <= '0';


LAN_CFG_I(3) <= '0';
LAN_CFG(3) <= LAN_CFG_I(3) when LAN_CFG_OE(3) = '1' else 'Z';
LAN_CFG_OE(3) <= '0';


LAN_CFG_I(4) <= '0';
LAN_CFG(4) <= LAN_CFG_I(4) when LAN_CFG_OE(4) = '1' else 'Z';
LAN_CFG_OE(4) <= '0';


LAN_CS <= ((RESET AND lan_adr)
	OR (NOT RESET AND LAN_CS_RST));

FDCPE_LAN_CS_RST: FDCPE port map (LAN_CS_RST,LAN_CS_RST_D,CLK_EXT,'0','0');
LAN_CS_RST_D <= ((NOT RESET AND LAN_RST_SM_FSM_FFd2)
	OR (NOT RESET AND LAN_RST_SM_FSM_FFd3));

FTCPE_LAN_INT_ENABLE: FTCPE port map (LAN_INT_ENABLE,LAN_INT_ENABLE_T,SHUT_UP(2)/SHUT_UP(2)_CLKF,NOT RESET,'0');
LAN_INT_ENABLE_T <= ((NOT RW AND D(15).PIN AND NOT LAN_INT_ENABLE AND lan_adr AND 
	A(15) AND NOT UDS)
	OR (NOT RW AND D(15).PIN AND NOT LAN_INT_ENABLE AND lan_adr AND 
	A(15) AND NOT LDS)
	OR (NOT RW AND NOT D(15).PIN AND LAN_INT_ENABLE AND lan_adr AND 
	A(15) AND NOT UDS)
	OR (NOT RW AND NOT D(15).PIN AND LAN_INT_ENABLE AND lan_adr AND 
	A(15) AND NOT LDS));


LAN_RD <= (NOT AS AND RESET AND LAN_RD_S);

FDCPE_LAN_RD_S: FDCPE port map (LAN_RD_S,LAN_RD_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
LAN_RD_S_D <= ((RW AND lan_adr AND NOT A(15) AND NOT UDS)
	OR (RW AND lan_adr AND NOT A(15) AND NOT LDS));

FDCPE_LAN_RST_SM_FSM_FFd1: FDCPE port map (LAN_RST_SM_FSM_FFd1,LAN_RST_SM_FSM_FFd1_D,CLK_EXT,'0','0');
LAN_RST_SM_FSM_FFd1_D <= ((NOT RESET AND LAN_RST_SM_FSM_FFd1)
	OR (NOT RESET AND LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3));

FDCPE_LAN_RST_SM_FSM_FFd2: FDCPE port map (LAN_RST_SM_FSM_FFd2,LAN_RST_SM_FSM_FFd2_D,CLK_EXT,'0','0');
LAN_RST_SM_FSM_FFd2_D <= ((NOT RESET AND LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd3)
	OR (NOT RESET AND LAN_RST_SM_FSM_FFd3 AND 
	NOT LAN_RST_SM_FSM_FFd1));

FDCPE_LAN_RST_SM_FSM_FFd3: FDCPE port map (LAN_RST_SM_FSM_FFd3,LAN_RST_SM_FSM_FFd3_D,CLK_EXT,'0','0');
LAN_RST_SM_FSM_FFd3_D <= ((NOT RESET AND LAN_RST_SM_FSM_FFd2 AND 
	LAN_RST_SM_FSM_FFd1)
	OR (NOT RESET AND NOT LAN_RST_SM_FSM_FFd2 AND 
	NOT LAN_RST_SM_FSM_FFd1));


LAN_WRH <= ((AS AND LAN_WR_RST)
	OR (NOT RESET AND LAN_WR_RST)
	OR (NOT AS AND RESET AND LAN_WRH_S));

FDCPE_LAN_WRH_S: FDCPE port map (LAN_WRH_S,LAN_WRH_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
LAN_WRH_S_D <= (NOT RW AND lan_adr AND NOT A(15) AND NOT UDS);


LAN_WRL <= ((AS AND LAN_WR_RST)
	OR (NOT RESET AND LAN_WR_RST)
	OR (NOT AS AND RESET AND LAN_WRL_S));

FDCPE_LAN_WRL_S: FDCPE port map (LAN_WRL_S,LAN_WRL_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
LAN_WRL_S_D <= (NOT RW AND lan_adr AND NOT A(15) AND NOT LDS);

FDCPE_LAN_WR_RST: FDCPE port map (LAN_WR_RST,LAN_WR_RST_D,CLK_EXT,'0','0');
LAN_WR_RST_D <= (NOT RESET AND LAN_RST_SM_FSM_FFd2 AND 
	LAN_RST_SM_FSM_FFd3);


MTACK_I <= '0';
MTACK <= MTACK_I when MTACK_OE = '1' else 'Z';
MTACK_OE <= '0';


Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2 <= ((IDE_BASEADR(4) AND NOT A(20))
	OR (IDE_BASEADR(5) AND NOT A(21))
	OR (NOT IDE_BASEADR(5) AND A(21))
	OR (IDE_BASEADR(7) AND NOT A(23))
	OR (NOT IDE_BASEADR(7) AND A(23))
	OR (ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST.EXP)
	OR (IDE_BASEADR(0) AND NOT A(16))
	OR (NOT IDE_BASEADR(0) AND A(16))
	OR (NOT IDE_BASEADR(1) AND A(17))
	OR (IDE_BASEADR(6) AND NOT A(22))
	OR (NOT IDE_BASEADR(6) AND A(22))
	OR (IDE_BASEADR(1) AND NOT A(17))
	OR (IDE_BASEADR(2) AND NOT A(18))
	OR (NOT IDE_BASEADR(2) AND A(18))
	OR (IDE_BASEADR(3) AND NOT A(19))
	OR (NOT IDE_BASEADR(3) AND A(19)));


OVR_I <= '0';
OVR <= OVR_I when OVR_OE = '1' else 'Z';
OVR_OE <= (NOT AS AND ide);


OWN_I <= '0';
OWN <= OWN_I when OWN_OE = '1' else 'Z';
OWN_OE <= '0';


ROM_B(0) <= '0';


ROM_B(1) <= '0';


ROM_B_0_OBUF$BUF8/ROM_B_0_OBUF$BUF8_TRST <= ((NOT CP_IRQ)
	OR (LAN_INT_ENABLE AND NOT LAN_INT));


ROM_OE <= NOT ((NOT AS AND NOT ROM_OE_S));

FDCPE_ROM_OE_S: FDCPE port map (ROM_OE_S,ROM_OE_S_D,SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
ROM_OE_S_D <= (NOT AS AND RW AND RESET AND ide AND IDE_ENABLE);

FDCPE_SHUT_UP0: FDCPE port map (SHUT_UP(0),SHUT_UP_D(0),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
SHUT_UP_D(0) <= ((NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND 
	A(6) AND A(3) AND DS_D)
	OR (RESET AND NOT SHUT_UP(0))
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND 
	A(6) AND A(3) AND DS_D));

FDCPE_SHUT_UP1: FDCPE port map (SHUT_UP(1),SHUT_UP_D(1),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
SHUT_UP_D(1) <= ((RESET AND NOT SHUT_UP(1))
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND 
	A(6) AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND NOT AUTO_CONFIG_DONE(1) AND 
	AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND 
	A(6) AND A(3) AND DS_D));


SHUT_UP(2)/SHUT_UP(2)_CLKF <= C1
	 XOR 
SHUT_UP(2)/SHUT_UP(2)_CLKF <= C3;

FDCPE_SHUT_UP2: FDCPE port map (SHUT_UP(2),SHUT_UP_D(2),SHUT_UP(2)/SHUT_UP(2)_CLKF,'0','0');
SHUT_UP_D(2) <= ((RESET AND NOT SHUT_UP(2))
	OR (NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT UDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND 
	A(6) AND A(3) AND DS_D)
	OR (NOT AS AND NOT RW AND RESET AND AUTO_CONFIG_DONE(1) AND 
	NOT AUTO_CONFIG_DONE(0) AND autoconfig AND NOT LDS AND NOT A(2) AND NOT A(5) AND NOT A(4) AND NOT A(1) AND 
	A(6) AND A(3) AND DS_D));


SLAVE <= ((AS)
	OR (NOT ide AND NOT lan_adr AND NOT autoconfig AND CP_CS));

FDCPE_autoconfig: FDCPE port map (autoconfig,autoconfig_D,NOT AS,NOT ide/ide_RSTF__$INT,'0');
autoconfig_D <= ((NOT AUTO_CONFIG_DONE(1) AND NOT CFIN AND NOT A(18) AND NOT A(17) AND 
	NOT A(16) AND A(23) AND A(22) AND A(21) AND A(19) AND NOT A(20))
	OR (NOT AUTO_CONFIG_DONE(0) AND NOT CFIN AND NOT A(18) AND NOT A(17) AND 
	NOT A(16) AND A(23) AND A(22) AND A(21) AND A(19) AND NOT A(20)));


cp_and0000/cp_and0000_D2 <= ((NOT AUTO_CONFIG_DONE(1) AND NOT CFIN AND NOT A(18) AND NOT A(17) AND 
	NOT A(16) AND A(23) AND A(22) AND A(21) AND A(19) AND NOT A(20))
	OR (NOT AUTO_CONFIG_DONE(0) AND NOT CFIN AND NOT A(18) AND NOT A(17) AND 
	NOT A(16) AND A(23) AND A(22) AND A(21) AND A(19) AND NOT A(20)));

FDCPE_ide: FDCPE port map (ide,ide_D,NOT AS,NOT ide/ide_RSTF__$INT,'0');
ide_D <= ((cp_and0000/cp_and0000_D2.EXP)
	OR (CP_BASEADR(2) AND NOT SHUT_UP(2) AND NOT A(18) AND 
	$OpTx$FX_DC$334 AND NOT cp_and0000/cp_and0000_D2 AND 
	NOT Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2)
	OR (NOT CP_BASEADR(2) AND NOT SHUT_UP(2) AND A(18) AND 
	$OpTx$FX_DC$334 AND NOT cp_and0000/cp_and0000_D2 AND 
	NOT Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2)
	OR (CP_BASEADR(3) AND NOT SHUT_UP(2) AND NOT A(19) AND 
	$OpTx$FX_DC$334 AND NOT cp_and0000/cp_and0000_D2 AND 
	NOT Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2)
	OR (NOT CP_BASEADR(3) AND NOT SHUT_UP(2) AND A(19) AND 
	$OpTx$FX_DC$334 AND NOT cp_and0000/cp_and0000_D2 AND 
	NOT Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2)
	OR (NOT CP_BASEADR(4) AND NOT SHUT_UP(2) AND A(20) AND 
	$OpTx$FX_DC$334 AND NOT cp_and0000/cp_and0000_D2 AND 
	NOT Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2)
	OR (autoconfig.EXP)
	OR (CP_BASEADR(4) AND NOT SHUT_UP(2) AND NOT A(20) AND 
	$OpTx$FX_DC$334 AND NOT cp_and0000/cp_and0000_D2 AND 
	NOT Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2)
	OR (CP_BASEADR(5) AND NOT SHUT_UP(2) AND NOT A(21) AND 
	$OpTx$FX_DC$334 AND NOT cp_and0000/cp_and0000_D2 AND 
	NOT Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2)
	OR (NOT CP_BASEADR(5) AND NOT SHUT_UP(2) AND A(21) AND 
	$OpTx$FX_DC$334 AND NOT cp_and0000/cp_and0000_D2 AND 
	NOT Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2)
	OR (CP_BASEADR(6) AND NOT SHUT_UP(2) AND NOT A(22) AND 
	$OpTx$FX_DC$334 AND NOT cp_and0000/cp_and0000_D2 AND 
	NOT Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2)
	OR (NOT CP_BASEADR(6) AND NOT SHUT_UP(2) AND A(22) AND 
	$OpTx$FX_DC$334 AND NOT cp_and0000/cp_and0000_D2 AND 
	NOT Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2)
	OR (SHUT_UP(1) AND NOT SHUT_UP(2) AND $OpTx$FX_DC$334 AND 
	NOT cp_and0000/cp_and0000_D2 AND 
	NOT Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2)
	OR (CP_BASEADR(7) AND NOT SHUT_UP(2) AND NOT A(23) AND 
	$OpTx$FX_DC$334 AND NOT cp_and0000/cp_and0000_D2 AND 
	NOT Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2)
	OR (NOT CP_BASEADR(7) AND NOT SHUT_UP(2) AND A(23) AND 
	$OpTx$FX_DC$334 AND NOT cp_and0000/cp_and0000_D2 AND 
	NOT Mcompar_ide_cmp_eq0000_AEB_or0000/Mcompar_ide_cmp_eq0000_AEB_or0000_D2));


ide/ide_RSTF__$INT <= (RESET AND BERR);

FDCPE_lan_adr: FDCPE port map (lan_adr,lan_adr_D,NOT AS,NOT ide/ide_RSTF__$INT,'0');
lan_adr_D <= ((SHUT_UP(0))
	OR (IDE_W_OBUF.EXP)
	OR (LAN_BASEADR(0) AND NOT A(16))
	OR (NOT LAN_BASEADR(0) AND A(16))
	OR (LAN_BASEADR(1) AND NOT A(17))
	OR (NOT LAN_BASEADR(1) AND A(17))
	OR (NOT LAN_BASEADR(4) AND A(20))
	OR (LAN_CS_RST.EXP)
	OR (LAN_BASEADR(4) AND NOT A(20))
	OR (LAN_BASEADR(5) AND NOT A(21))
	OR (NOT LAN_BASEADR(5) AND A(21))
	OR (LAN_BASEADR(6) AND NOT A(22))
	OR (NOT LAN_BASEADR(6) AND A(22))
	OR (LAN_BASEADR(7) AND NOT A(23))
	OR (NOT LAN_BASEADR(7) AND A(23)));

Register Legend:
 FDCPE (Q,D,C,CLR,PRE,CE); 
 FTCPE (Q,D,C,CLR,PRE,CE); 
 LDCP  (Q,D,G,CLR,PRE); 

******************************  Device Pin Out *****************************

Device : XC95288XL-10-TQ144


Pin Signal                         Pin Signal                        
No. Name                           No. Name                          
  1 VCC                              73 VCC                           
  2 D<0>                             74 A<15>                         
  3 A_LAN<1>                         75 AUTOBOOT_OFF                  
  4 A_LAN<0>                         76 LAN_WRL                       
  5 A_LAN<3>                         77 KPR                           
  6 A_LAN<2>                         78 KPR                           
  7 A_LAN<5>                         79 KPR                           
  8 VCC                              80 AS                            
  9 A_LAN<4>                         81 UDS                           
 10 A_LAN<7>                         82 LDS                           
 11 A_LAN<6>                         83 RW                            
 12 LAN_CFG<1>                       84 VCC                           
 13 LAN_CFG<3>                       85 DTACK                         
 14 D<6>                             86 A<23>                         
 15 D<3>                             87 A<22>                         
 16 D<7>                             88 A<21>                         
 17 D<1>                             89 GND                           
 18 GND                              90 GND                           
 19 D<8>                             91 A<20>                         
 20 D<5>                             92 A<19>                         
 21 D<4>                             93 KPR                           
 22 IDE_CS<0>                        94 A<18>                         
 23 IDE_CS<1>                        95 A<17>                         
 24 IDE_A<0>                         96 MTACK                         
 25 IDE_A<2>                         97 A<16>                         
 26 IDE_A<1>                         98 BERR                          
 27 IDE_R                            99 GND                           
 28 IDE_W                           100 OVR                           
 29 GND                             101 KPR                           
 30 CLK_EXT                         102 C3                            
 31 CP_IRQ                          103 C1                            
 32 INT_OUT                         104 CFIN                          
 33 IDE_WAIT                        105 CFOUT                         
 34 CP_CS                           106 SLAVE                         
 35 ROM_OE                          107 OWN                           
 36 GND                             108 GND                           
 37 VCC                             109 VCC                           
 38 KPR                             110 LAN_CFG<4>                    
 39 D<2>                            111 LAN_INT                       
 40 D<9>                            112 DQ<15>                        
 41 D<10>                           113 DQ<13>                        
 42 VCC                             114 GND                           
 43 D<11>                           115 DQ<11>                        
 44 D<12>                           116 DQ<9>                         
 45 D<13>                           117 DQ<1>                         
 46 D<14>                           118 DQ<0>                         
 47 GND                             119 DQ<3>                         
 48 D<15>                           120 DQ<2>                         
 49 A<5>                            121 DQ<5>                         
 50 A<4>                            122 TDO                           
 51 A<6>                            123 GND                           
 52 A<3>                            124 DQ<4>                         
 53 A<7>                            125 DQ<7>                         
 54 A<2>                            126 DQ<6>                         
 55 VCC                             127 VCC                           
 56 A<8>                            128 DQ<8>                         
 57 A<1>                            129 DQ<10>                        
 58 A<9>                            130 DQ<12>                        
 59 A<10>                           131 DQ<14>                        
 60 A<11>                           132 LAN_WRH                       
 61 A<12>                           133 LAN_CS                        
 62 GND                             134 LAN_RD                        
 63 TDI                             135 LAN_CFG<2>                    
 64 A<13>                           136 A_LAN<13>                     
 65 TMS                             137 A_LAN<12>                     
 66 A<14>                           138 A_LAN<10>                     
 67 TCK                             139 A_LAN<11>                     
 68 ROM_B<0>                        140 A_LAN<8>                      
 69 ROM_B<1>                        141 VCC                           
 70 CP_WE                           142 A_LAN<9>                      
 71 CP_RD                           143 RESET                         
 72 GND                             144 GND                           


Legend :  NC  = Not Connected, unbonded pin
         PGND = Unused I/O configured as additional Ground pin
         TIE  = Unused I/O floating -- must tie to VCC, GND or other signal
         KPR  = Unused I/O with weak keeper (leave unconnected)
         VCC  = Dedicated Power Pin
         GND  = Dedicated Ground Pin
         TDI  = Test Data In, JTAG pin
         TDO  = Test Data Out, JTAG pin
         TCK  = Test Clock, JTAG pin
         TMS  = Test Mode Select, JTAG pin
  PROHIBITED  = User reserved pin
****************************  Compiler Options  ****************************

Following is a list of all global compiler options used by the fitter run.

Device(s) Specified                         : xc95288xl-10-TQ144
Optimization Method                         : SPEED
Multi-Level Logic Optimization              : ON
Ignore Timing Specifications                : OFF
Default Register Power Up Value             : LOW
Keep User Location Constraints              : ON
What-You-See-Is-What-You-Get                : OFF
Exhaustive Fitting                          : OFF
Keep Unused Inputs                          : OFF
Slew Rate                                   : FAST
Power Mode                                  : STD
Ground on Unused IOs                        : OFF
Set I/O Pin Termination                     : KEEPER
Global Clock Optimization                   : ON
Global Set/Reset Optimization               : ON
Global Ouput Enable Optimization            : ON
Input Limit                                 : 54
Pterm Limit                                 : 35