| Design Name | LAN_IDE_CP |
| Fitting Status | Successful |
| Software Version | P.20131013 |
| Device Used | XC95288XL-10-TQ144 |
| Date | 2-21-2019, 1:44PM |
| Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
|---|---|---|---|---|
| 164/288 (57%) | 437/1440 (31%) | 60/288 (21%) | 112/117 (96%) | 379/864 (44%) |
|
|
| Signal mapped onto global clock net (GCK1) | CLK_EXT |
| Signal mapped onto global output enable net (GSR) | RESET |
| Macrocells in high performance mode (MCHP) | 164 |
| Macrocells in low power mode (MCLP) | 0 |
| Total macrocells used (MC) | 164 |